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Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
Description
NOV, 2015
Release
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
Table of Contents
1.0 INTRODUCTION ....................................................................................................................................................................4
1.1 JETSON TX1 Feature List ...............................................................................................................................................4
1.2 Carrier Board Feature List..............................................................................................................................................4
1.3 Jetson TX1 Carrier Board Block Diagram .....................................................................................................................5
2.0 JETSON TX1 CARRIER BOARD STANDARD CONNECTORS ...........................................................................................8
2.1 USB Ports ........................................................................................................................................................................8
2.2 Gigabit Ethernet ..............................................................................................................................................................9
2.3 SATA ..............................................................................................................................................................................10
2.4 SD Card ..........................................................................................................................................................................11
2.5 HDMI ...............................................................................................................................................................................12
2.6 M.2, Key E Expansion Slot ...........................................................................................................................................13
2.7 PCIe x4 Connector ........................................................................................................................................................14
2.8 JTAG ..............................................................................................................................................................................16
3.0 CARRIER BOARD CUSTOM EXPANSION IF CONNECTIONS .........................................................................................17
3.1 Jetson TX1 Module Connector ....................................................................................................................................17
3.2 Display Expansion Connector .....................................................................................................................................17
3.3 Camera Expansion Connector .....................................................................................................................................20
3.4 Expansion Header .........................................................................................................................................................23
3.5 Debug Connector ..........................................................................................................................................................24
3.6 GPIO Expansion Header ...............................................................................................................................................25
3.7 Serial Port ......................................................................................................................................................................26
3.8 Charge Control Receptacle ..........................................................................................................................................26
3.9 Fan Connector ...............................................................................................................................................................27
3.10 DC Power Jack ............................................................................................................................................................27
4.0 INTERFACE POWER ...........................................................................................................................................................28
5.0 QUICK-START GUIDE .........................................................................................................................................................30
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
1.0 INTRODUCTION
The NVIDIA Jetson TX1 carrier board is ideal for software development within the Linux environment. Standard connectors are
used to access Jetson TX1 features and interfaces, enabling a highly flexible and extensible development platform. Go to
http://developer.nvidia.com/jetson-tx1 or contact your NVIDIA representative for access to software updates and the developer
SDK supporting the OS image and host development platform that you want to use. The developer SDK includes an OS image
that you will load onto your Jetson TX1 device, supporting documentation, and code samples to help you get started.
Memory
4GB LPDDR4-3200
16GB eMMC 5.1
Multimedia
Image-signal processor
Connectivity
10/100/1000BASE-T Ethernet
Expansion Header
UI & Indicators
Debug/Serial
USB
Network
PCIe
Display/Touch Expansion Header
Backlight PWM/Control
Touch: SPI/I2C
HDMI Type A
Camera Expansion Header
CSI: 6, x2 3, x4
Control
Miscellaneous
DC Jack: 5.5V-19.6V
Main 3.3V/5V Supplies: 2xTPS53015
Main 1.8V Supply: APW8805
USB VBUS Supplies: RT9715 & APL3511
12V for PCIe & SATA: LM3481
Load Switches/LDOs
Charge Control Header: 10-pin Flex Receptacle
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
Jetson TX1
Tegra
X1
4GB
LPDDR4
16GB
eMMC 5.1
Thermal
Sensor
PMIC
& Regs
USB_ID
USB1
USB_SS0
RJ45
GBE_MDI
GBE_LINK
PEX0/2/RFU
USB_SS1
PCIe x4
SATA
SATA
SD Card
SDCARD
HDMI
Type A
DP1_TXx
DP1_AUX_CH
HDMI_CEC
DP1_HPD
Fan
Connector
PWM
Tach
Level Shift
UART1
JTAG
Debug
Connector
BT IF
WiFi/BT Control
Misc Co ntro l IF
Expansion
Connector
Audio CLK/Ctrl
I2S0
Level Shift
I2C_GP0
I2C_GP1
SPI1
UART1
Level Shift
Level Shift
Level Shift
Level Shift
VBUS_DET
USB0
USB 3.0
Type A
Serial Port
WiFi Audio
GPIOs
VDD_IN
USB 2.0
Micro AB
WiFi Data IF
I2C_GP0
WiFi/BT
BCM4354
DC Jack
PEX1
SDIO
USB2
I2S2
UART2
JTAG
UART0
I2C_PM
I2C_GP0
I2C_GP1
eDP (x4)
DSI[3:0]
DSI (2x4)
LCD BL Ctrl
Display Ctrl
Backlight/LCD Ctrl
LCD/Touch SPI
SPI2 (CS0)
I2C_GP1
General Ctrl
Camera Expansion
Connector
CSI[5:0]
I2C_CAM
Cam Clk
CAM[2:1] Ctrl
Flash/Strb Ctrl
DMIC
I2S3
Audio
I2C_GP0
SPI2 (CS1)
I2C_PM
I2S1
I2C_GP1
GPIOs
Control IFs
Display Expansion
Connector
DP0_TX[3:0]
DP0_AUX/HPD
LAN
Ctrlr
Audio
Control IFs
GPIO Expansion
Header
I2S1
GPIO Exp
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
GPIOs (3.3V)
J9
WiFi/BT Antenna #2
WiFi/BT Antenna #1
J8
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
SD Socket
Micro AB USB
J5
J16
Ethernet Jack
J19
J20
J25
Power Jack
J27
Charge Control
Header
J12
J18
PCIe x4 Connector
CR3
J2
CR4
M.2 LED #2
J13
Jetson TX1
Main Connector
Display Expansion
Connector
J23
Debug Connector
Camera Expansion
Connector
J22
Fan Header
SATA Connector
J15
J1
Reset Out Jumper
J8
J26
J10
JTAG Header
Power LED Header
Reset Header
Reset Switch
Volume Down Switch
Power Switch Header
Recovery Switch
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
J17
J18
J7
J11
J9
J3
J4
S1
S2
S3
CR1
J17
J21
J6
S4
GPIO Expansion
Header
J24
Voltage select
CR2
Expansion Header
J19
J20
J21
J22
J23
J24
J25
J26
J27
S1
S2
S3
S4
CR1
CR2
CR3
CR4
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
Jetson TX1
USB0_OTG_ID
USB0_VBUS_DET
A36
4.7uF
0.1uF
APL3511
Load Switch
IN
OUT
EN
OC
220@100MHz
100k
0.1F 1uF
USB 2.0
Micro AB
USB_VBUS_EN0
B37
4.7uF
USB0_EN_OC#
A17
USB1_EN_OC#
A18
USB0_D
USB0_D+
B40
USB1_D
USB1_D+
A39
A38
USB2_D
USB2_D+
B43
B42
USB_SS0_RX
USB_SS0_RX+
F44
F43
USB_SS0_TX
USB_SS0_TX+
C44
C43
B39
10nF
VBUS
DN
DP
ID
GND
VDD_5V0_IO_SYS
4.7uF
0.1uF
RT9715
Load Switch
IN
OUT
EN
OC
ESD
USB_VBUS_EN1
220@100MHz
100
470pF
100uF
USB 3.0
Type A
0.1uF
To M.2 Module
on Carrier Board
0.1uF
0.1uF
VBUS
DN
DP
GND
USB 2.0
RX_N
RX_P
GND
TX_N
TX_P
USB 3.0
See Note
ESD
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
Table 1. USB 2.0 Micro AB & USB 3.0 Type A Connector Pin Descriptions
Pin #
Signal Name
Jetson TX1
Pin Name
Notes:
Usage/Description
Type/Dir
Default
USB0_D
USB0_D+
USB0_OTG_ID
VBUS Supply
USB 2.0 #0 Data USB 2.0 #0 Data +
USB 2.0 #0 Identification
Ground
Power
Bidir
Bidir
Input
Ground
USB1_D
USB1_D+
USB_SS0_RX
USB_SS0_RX+
USB_SS0_TX
USB_SS0_TX+
VBUS Supply
USB 2.0 #1 Data USB 2.0 #1 Data +
Ground
USB 3.0 #0 Receive USB 3.0 #0 Receive +
Ground
USB 3.0 #0 Transmit USB 3.0 #0 Transmit +
Power
Bidir
Bidir
Ground
Input
Input
Ground
Output
Output
In the Type/Dir column, Output is to USB Connectors. Input is from USB Connectors. Bidir is for Bidirectional signals.
Magnetics
Jetson
TX1
GBE_MDI0+
E48
GBE_MDI0
E49
GBE_MDI1+
F47
GBE_MDI1
F48
GBE_MDI2+
G48
GBE_MDI2
G49
GBE_MDI3+
H47
GBE_MDI3
H48
+
CT
+
CT
+
CT
+
CT
ESD
GBE_LINK_ACT
E47
GBE_LINK_100
F50
GBE_LINK_1000
F46
H50
GBE_CTREF
+
CT
+
CT
+
CT
+
CT
10nF
75
0.1uF
RJ45
14
9
10
75
1
3
5
75
7
11
2
4
6
8
12
13
75
1nF
681,1%
GBE_LED0_SPICSB
GBE_LED1_SPISCK
0.1uF
0.1uF
681,1%
Signal Name
1
2
3
4
5
6
7
8
RJ45_TDP
RJ45_TDN
RJ45_RDP
RJ45_RDN
RJ45_TDP1
RJ45_TDN1
RJ45_RDP1
RJ45_RDN1
Jetson TX1
Pin Name
GPE_MDI0+
GPE_MDI0
GPE_MDI1+
GPE_MDI1
GPE_MDI2+
GPE_MDI2
GPE_MDI3+
GPE_MDI3
Usage/Description
Gigabit Ethernet MDI 0+
Gigabit Ethernet MDI 0Gigabit Ethernet MDI 1+
Gigabit Ethernet MDI 1Gigabit Ethernet MDI 2+
Gigabit Ethernet MDI 2Gigabit Ethernet MDI 3+
Gigabit Ethernet MDI 3-
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
Type/Dir
Default
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Bidir
Pin #
9
10
11
12
13
14
Notes:
Signal Name
Jetson TX1
Pin Name
GBE_LINK_ACT
GBE_LINK100
GBE_LED0_SPICSB
LED1A
GBE_LED1_SPISCK
LED2A
NC/GND
NC/GND
Usage/Description
Type/Dir
Default
Output OD
Output OD
Ground
Ground
In the Type/Dir column, Output is to RJ45 Connector. Input is from RJ45 Connector. Bidir is for Bidirectional signals.
2.3 SATA
The Jetson TX1 carrier board has a standard SATA connector (J1 - both Data & Power) as shown below.
Figure 6. SATA Connections
1
Jetson
TX1
SATA_TX+
SATA_TX
SATA_RX+
SATA_RX
D45
D46
0.01uF
0.01uF
2
3
G45
G46
0.01uF
0.01uF
5
6
7
9
10
11
12
13
14
VDD_5V0_IO_SYS
15
16
VDD_3V3_SLP
D
75k
4.7k
17
S
G
18
VDD_12V_SLP
19
20
G
S
10nF
21
22
Signal Name
GND
SATA_TX_C_P
SATA_TX_C_N
GND
SATA_RX_C_N
SATA_RX_C_P
GND
Notes:
Jetson TX1
Pin Name
SATA_TX+
SATA_TX
SATA_RX
SATA_RX+
Usage/Description
Ground
SATA Transmit+
SATA Transmit
Ground
SATA Receive
SATA Receive+
Ground
Type/Dir Pin
#
Ground 8
Output 9
Output 10
Ground 11
Input 12
Input 13
Ground 14
15
16
17
18
19
20
21
22
Signal Name
NC
NC
NC
GND
GND
GND
VDD_5V0_IO_SLP
VDD_5V0_IO_SLP
VDD_5V0_IO_SLP
GND
NC
GND
VDD_12V_SLP
VDD_12V_SLP
VDD_12V_SLP
Jetson TX1
Pin Name
Usage/Description
Type/Dir
Unused
Unused
Unused
Ground
Ground
Ground
Gated version of Main 5.0V
Supply
Unused
Unused
Unused
Ground
Ground
Ground
Power
Power
Power
Ground
Unused
Ground
Power
Power
Power
Ground
Unused
Ground
12V Supply (From Boost on
carrier board)
In the Type/Dir column, Output is to SATA Connector. Input is from SATA Connector. Bidir is for Bidirectional signals.
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
10
2.4 SD Card
A full size SD Card (J12) is implemented, supporting up to SDR104 mode (UHS-1).
Figure 7. SD Card Connections
47k
VDD_3V3_SYS
0.1uF
Load Switch
IN
VOUT
EN
Jetson TX1
SDCARD_CLK
G18
SDCARD_CMD
G19
SDCARD_D0
SDCARD_D1
H18
H17
SDCARD_D2
F19
SDCARD_D3
F18
SDCARD_VDD_EN
H16
SDCARD_CD#
F17
G
S
0.1uF
10uF
10
DATA2
10
DATA3
10
CMD
GND
VDD
CLK
GND
SDMMC_VDD_EN
10
DATA0
10
DATA1
SDMMC1_ CD*
C_DETECT
ESD
COMMON
WR_PROTECT
SDCARD_WP
F20
SDMMC1_ WP
Notes:
Signal Name
SDCARD_DAT3
SDCARD_CMD
GND
SD_CARD_SW_PWR
SDCARD_CLK
GND
SDCARD_DAT0
SDCARD_DAT1
SDCARD_DAT2
SDCARD_CD*
GND
SDCARD_WP
GND
GND
GND
Jetson TX1
Pin Name
SDCARD_D3
SDCARD_CMD
SDCARD_CLK
SDCARD_D0
SDCARD_D1
SDCARD_D2
SDCARD_CD#
SDCARD_WP
Usage/Description
SD Card Data #3
SD Card Command
Ground
SD Card Power
SD Card Clock
Ground
SD Card Data #0
SD Card Data #1
SD Card Data #2
SD Card, Card Detect
Ground
SD Card Write Protect
Ground
Ground
Ground
Type/Dir
Default
Bidir
Bidir
Ground
Power
Output
Ground
Bidir
Bidir
Bidir
Input
Ground
Input
Ground
Ground
Ground
In the Type/Dir column, Output is to SD Card Socket. Input is from SD Card Socket. Bidir is for Bidirectional signals.
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
11
2.5 HDMI
A standard HDMI type A connector (J16) is supported.
Figure 8. HDMI Connections
DP1_HPD
DP1_AUX_CH
DP1_AUX_CH+
HDMI_CEC
E36
DP1_TX2
D36
DP1_TX2+
D37
DP1_TX0+
1.8k
1.8k
10k
Level
Shifter
0.1uF
10uF
100k
100k
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
RESERVED
CEC
CK
CK_SHIELD
CK+
D0
D0_SHIELD
D0+
D1
D1_SHIELD
D1+
D2
D2_SHIELD
D2+
EMI
CEC Gating
Circuitry
0.1uF
0.1uF
EMI
0.1uF
0.1uF
0.1uF
C37
C38
0.1uF
E38
E39
0.1uF
HDMI
Type A
VDD_5V0_HDMI_CON
Level
Shifter
B33
E35
DP1_TX0
10k
A34
A35
DP1_TX3
DP1_TX1
VDD_1V8
A33
DP1_TX3+
DP1_TX1+
10k
Jetson TX1
10k
VDD_3V3_SLP
0.1uF
499,
1%
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
ESD
600
@100MHz
5V0_HDMI_EN
(GPIO Expander P14)
Enable
FET
Notes:
Signal Name
HDMI_TXD2_CON_P
SHIELD/GND
HDMI_TXD2_CON_N
HDMI_TXD1_CON_P
SHIELD/GND
HDMI_TXD1_CON_N
HDMI_TXD0_CON_P
SHIELD/GND
HDMI_TXD0_CON_N
HDMI_TXC_CON_P
SHIELD/GND
HDMI_TXC_CON_N
HDMI_CEC_CON
RESERVED
HDMI_DDC_SCL_5V0
HDMI_DDC_SDA_5V0
GND
VDD_5V0_HDMI_CON
HDMI_HPD_CON
Jetson TX1
Pin Name
DP1_TXD0+
DP1_TXD0
DP1_TXD1+
DP1_TXD1
DP1_TXD2+
DP1_TXD2
DP1_TXD3+
Usage/Description
DP1_TXD3
HDMI_CEC
DP1_AUX_CH+
DP1_AUX_CH
DP1_HPD
Type/Dir
Default
Output
Ground
Output
Output
Ground
Output
Output
Ground
Output
Output
Output
Bidir
Unused
Output /OD
Bidir/OD
Ground
Power
Input
In the Type/Dir column, Output is to HDMI Connector. Input is from HDMI Connector. Bidir is for Bidirectional signals.
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
12
PCIe (x1)
SDIO (4-bit)
USB 2.0
I2S
I2C
The connections & power rails associated with the connector are shown in the figure below.
Table 6. M.2, Key E Expansion Slot Pin Descriptions
Pin
#
1
3
5
7
9
11
13
15
17
19
GND
USB2_D_P
USB2_D_N
GND
SDIO_CLK
SDIO_CMD
SDIO_DAT0
SDIO_DAT1
SDIO_DAT2
SDIO_DAT3
Jetson TX1
Pin Name
USB2_D+
USB2_D
SDIO_CLK
SDIO_CMD
SDIO_D0
SDIO_D1
SDIO_D2
SDIO_D3
21
WIFI2_EN
SDIO_RST
WiFi #2 Enable
23
WIFI2_WAKE_AP_L
GPIO10_WIFI_
WAKE_AP
WiFi #2 Wake AP
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
NC (Key)
NC (Key)
NC (Key)
NC (Key)
GND
PEX_TX0_AP_P
PEX_TX0_AP_N
GND
PEX_RX0_AP_P
PEX_RX0_AP_N
GND
PEX_CLK1_P
PEX_CLK_N
GND
PCIE_L1_CLKREQ
PCIE_WAKE_L
GND
59
NC
Signal Name
PEX1_TX+
PEX1_TX
PEX1_RX+
PEX1_RX
PEX1_REFCLK+
PEX1_REFCLK
PEX1_CLKREQ#
PEX_WAKE#
NC
63
65
67
69
71
73
75
GND
NC
NC
GND
NC
NC
GND
Notes:
Ground
USB 2.0 Data +
USB 2.0 Data Ground
SDIO Clock
SDIO Command
SDIO Data 0
SDIO Data 1
SDIO Data 2
SDIO Data 3
Type/Dir
Default
Ground
Bidir
Bidir
Ground
Output
Bidir
Bidir
Bidir
Bidir
Bidir
Pin
Signal Name
#
2
VDD_3V3_SYS
4
VDD_3V3_SYS
6
LED1_L
8
I2S2_CLK
10 I2S2_LRCLK
12 I2S2_SDIN
14 I2S2_SDOUT
16 LED2_L
18 GND
Output 20
Input
Unused
Unused
Ground
PCIe #1 Transmit +
PCIe #1 Transmit Ground
PCIe #1 Receive +
PCIe #1 Receive Ground
PCIe #1 Reference clock +
PCIe #1 Reference clock Ground
PCIe #1 Clock Request
PCIe Wake
Ground
Ground
Output
Output
Ground
Input
Input
Ground
Output
Output
Ground
Bidir
Input
Ground
Unused
Unused
UART2_RXD
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
NC (Key)
NC (Key)
NC (Key)
NC (Key)
UART2_TXD
UART2_CTS_N
UART2_RTS_N
NC
NC
NC
NC
NC
NC
SUSCLK_32KHZ
PCIE_L1_RST
W_DISABLE2_L
W_DISABLE1_L
GEN1_I2C_SDA_
3V3_LVL
GEN1_I2C_SCL_
3V3_LVL
M2_E_ALERT_L
NC
NC
NC
NC
VDD_3V3_SYS
VDD_3V3_SYS
60
Ground
Unused
Ground
Unused
Ground
BT2_WAKE_AP_L
22
58
61
Usage/Description
Ground 62
64
Unused
66
Ground 68
70
Unused
72
Ground 74
Jetson TX1
Pin Name
Usage/Description
Type/Dir
Default
Power
I2S2_CLK
I2S2_LRCLK
I2S2_SDIN
I2S2_SDOUT
GPIO13_BT_
WAKE_AP
Output
Bidir
Bidir
Input
Bidir
Output
Ground
Bluetooth #2 Wake AP
Input
UART2_RX
UART #2 Receive
Input
Unused
Unused
UART #2 Transmit
UART #2 Clear to Send
UART #2 Request to Send
Output
Input
Output
Unused
Unused
Output
Output
Output
Output
UART2_TX
UART2_CTS#
UART2_RTS#
I2C_GP0_DAT
Unused
Unused
Power
I2C_GP0_CLK
Bidir/OD
Input
In the Type/Dir column, Output is to M.2 Module. Input is from M.2 Module. Bidir is for Bidirectional signals.
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
13
Carrier Board
Max Trace
Max Delay for
PCB Delay (ps) Delay Allowed M.2 Module
(ps)
(ps)
PCIe
PEX1_RX+
PEX1_RX
PEX1_TX+
PEX1_TX
PEX1_REFCLK+
PEX1_REFCLK
USB
USB2_D+
USB2_D
539
539
518
519
178
178
880
880
880
880
880
880
341
342
362
361
702
702
171
172
960
960
789
788
Jetson TX1
Signal
Carrier Board
PCB Delay (ps)
SDIO
SDIO_CLK
SDIO_CMD
SDIO_D0
SDIO_D1
SDIO_D2
SDIO_D3
I2S
I2S2_CLK
I2S2_LRCLK
I2S2_SDIN
I2S2_SDOUT
230
223
222
222
225
240
970
967
931
924
>SDR50
521
521
521
521
521
521
na
SDR50 >SDR50
646
291
653
298
654
299
654
299
651
296
636
281
All
na
2630
2633
2669
2676
0.1uF 0.1uF
330uF
0.1uF 0.1uF
+12v
B1
A1
PRSNT#1
+12v
B2
A2
+12v
+12v
B3
A3
+12v
GND
B4
A4
GND
GEN1_I2C_SCL_3V3_LVL
SMCLK
B5
A5
JTAG2
GEN1_I2C_SDA_3V3_LVL
SMDAT
B6
A6
JTAG3
GND
B7
A7
JTAG4
+3.3v
B8
A8
JTAG5
JTAG1
B9
A9
+3.3v
3.3Vaux
B10
A10
+3.3v
WAKE#
B11
A11
PWRGD
0.1uF 0.1uF
Jetson TX1
PEX_RFU_TX+
D39
PEX_RFU_TX
D40
PEX_RFU_RX+
G39
PEX_RFU_RX
G40
PEX2_TX+
C40
PEX2_TX_N
C41
PEX2_RX+
F40
PEX2_RX
F41
USB_SS1_TX+
D42
USB_SS1_TX
D43
USB_SS1_RX+
G42
USB_SS1_RX
G43
PEX0_TX+
E44
PEX0_TX
E45
PEX0_RX+
H44
PEX0_RX
H45
PEX1_REFCLK+
B45
PEX1_REFCLK
B46
PEX0_CKREQ#
C48
PEX0_RST#
C49
PEX_WAKE#
D48
0.1uF
0.1uF
PEX_TX1_P
PEX_TX1_N
PEX_RX1_P
PCIe#0
Lane 3
10k
PEX_RX1_N
0.1uF
0.1uF
VDD_3V3_SYS
PEX_TX2_P
PEX_TX2_N
PEX_RX2_P
PCIe#0
Lane 2
PCIE_WAKE
RSVD
B12
A12
GND
GND
B13
A13
REFCLK+
PEX_CLK0_P
PEX_TX4_P
PETp0
B14
A14
REFCLK-
PEX_CLK0_N
PEX_TX4_N
PETn0
B15
A15
GND
GND
B16
A16
PERp0
PEX_RX4_P
PRSNT#2
B17
A17
PERn0
PEX_RX4_N
PCIE0_L0_CLKREQ
PEX_RX2_N
0.1uF
0.1uF
PEX_TX3_P
PEX_TX3_N
PEX_RX3_P
PCIe#0
Lane 1
GND
B18
A18
GND
PEX_TX3_P
PETp1
B19
A19
RSVD
PEX_TX3_N
PETn1
B20
A20
GND
GND
B21
A21
PERp1
PEX_RX3_P
GND
B22
A22
PERn1
PEX_RX3_N
PEX_TX2_P
PETp2
B23
A23
GND
PEX_TX2_N
PETn2
B24
A24
GND
PEX_CLK0_P
GND
B25
A25
PERp2
PEX_RX2_P
PEX_CLK0_N
GND
B26
A26
PERn2
PEX_RX2_N
PEX_TX1_P
PETp3
B27
A27
GND
PEX_TX1_N
PETn3
B28
A28
GND
GND
B29
A29
PERp3
PEX_RX1_P
RSVD
B30
A30
PERn3
PEX_RX1_N
PRSNT#2
B31
A31
GND
GND
B32
A32
RSVD
PEX_RX3_N
0.1uF
0.1uF
PCIE0_L0_RST
Key
PEX_TX4_P
PEX_TX4_N
PEX_RX4_P
PEX_RX4_N
PCIE0_L0_CLKREQ
PCIE0_L0_RST
PCIE_WAKE
PCIe#0
Lane 0
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
14
Signal Name
GND (PRSNT1)
VDD_12V_SLP
VDD_12V_SLP
GND
NC
NC
NC
NC
VDD_3V3_SLP
VDD_3V3_SLP
PCIE0_L0_RST
GND
PEX_CLK0_P
PEX_CLK0_N
GND
PEX_RX4_P
PEX_RX4_N
GND
NC
GND
PEX_RX3_P
PEX_RX3_N
GND
GND
PEX_RX2_P
PEX_RX2_N
GND
GND
PEX_RX1_P
PEX_RX1_N
GND
NC
Notes:
Jetson TX1
Pin Name
PEX0_RST#
PEX0_REFCLK+
PEX0_REFCLK
PEX0_RX_P
PEX0_RX
USB_SS1_RX+
USB_SS1_RX
PEX2_RX+
PEX2_RX
PEX_RFU_RX+
PEX_RFU_RX
Type/ Pin
Signal Name
Direction #
Ground
Ground B1 VDD_12V_SLP
B2 VDD_12V_SLP
12V Supply (Boost)
Power
B3 VDD_12V_SLP
Ground
Ground B4 GND
B5 GEN1_I2C_SCL_3V3_LVL
B6 GEN1_I2C_SDA_3V3_LVL
Unused
Unused
B7 GND
B8 VDD_3V3_SLP
B9 PCIE_JTAG_TRST_PD
3.3V supply - off in Deep Slp
Power
B10 VDD_3V3_SYS
PCIe Lane 0 Reset
Output B11 PCIE_WAKE
Ground
Ground B12 PCIE0_L0_CLKREQ
PCIe Ctlr 0 Reference Clock + Output B13 GND
PCIe Ctlr 0 Reference Clock Output B14 PEX_TX4_C_P
Ground
Ground B15 PEX_TX4_C_N
PCIe Ctlr 0 Lane 0 Receive +
Input B16 GND
PCIe Ctlr 0 Lane 0 Receive
Input B17 NC
Ground
Ground B18 GND
Unused
Unused B19 PEX_TX3_C_P
Ground
Ground B20 PEX_TX3_C_N
PCIe Ctlr 0 Lane 3 Receive +
Input B21 GND
PCIe Ctlr 0 Lane 3 Receive
Input B22 GND
B23 PEX_TX2_C_P
Ground
Ground
B24 PEX_TX2_C_N
PCIe Ctlr 0 Lane 2 Receive +
Input B25 GND
PCIe Ctlr 0 Lane 2 Receive
Input B26 GND
B27 PEX_TX1_C_P
Ground
Ground
B28 PEX_TX1_C_N
PCIe Ctlr 0 Lane 1 Receive +
Input B29 GND
PCIe Ctlr 0 Lane 1 Receive
Input B30 NC
Ground
Ground B31 NC
Unused
Unused B32 GND
Usage/Description
Jetson TX1
Pin Name
I2C_GP0_CLK
I2C_GP0_DAT
PEX_WAKE#
PEX0_CLKREQ#
PEX0_TX+
PEX0_TX
USB_SS1_TX+
USB_SS1_TX
Type/
Direction
Usage/Description
12V Supply
Power
Ground
General I2C #0 Clock
General I2C #0 Data
Ground
3.3V supply off in Deep Slp
Pulled to GND
Main 3.3V Supply
PCIe Wake (Shared)
PCIe Ctlr 0 Clock Req.
Ground
PCIe Ctlr 0 Lane 0 Transmit +
PCIe Ctlr 0 Lane 0 Transmit
Ground
Unused
Ground
PCIe Ctlr r 0 Lane 3 Transmit +
PCIe Ctlr 0 Lane 3 Transmit
Ground
Bidir/OD
Bidir/OD
Ground
Power
Power
Input
Bidir
Ground
Output
Output
Ground
Unused
Ground
Output
Output
Ground
Ground
Output
Output
Ground
Ground
Output
Output
Ground
Unused
Unused
Ground
Ground
PEX2_TX+
PEX2_TX
PEX_RFU_TX+
PEX_RFU_TX
In the Type/Dir column, Output is to the PCIe Connector. Input is from the PCIe Connector. Bidir is for Bidirectional signals.
PCIe
PEX0_RX+
PEX0_RX
PEX0_TX+
PEX0_TX
USB_SS1_RX+
USB_SS1_RX
USB_SS1_TX+
USB_SS1_TX
Carrier Board
PCB Delay
(ps)
Max Trace
Delay
Allowed (ps)
502
502
505
504
528
527
522
522
880
880
880
880
880
880
880
880
378
378
375
376
352
353
358
358
PEX2_RX+
PEX2_RX
PEX2_TX+
PEX2_TX
PEX_RFU_RX+
PEX_RFU_RX
PEX_RFU_TX+
PEX_RFU_TX
PEX0_REFCLK+
PEX0_REFCLK
Carrier Board
PCB Delay
(ps)
540
539
521
522
539
539
518
519
521
520
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
Max Trace
Delay
Allowed (ps)
880
880
880
880
880
880
880
880
880
880
15
2.8 JTAG
The Jetson TX1 carrier board has a standard 20-pin (2x10, 2.54mm pitch) JTAG header (J7).
Figure 10. JTAG Header Connections
10k
Jetson
47k
0.1uF
47k
VDD_1V8
47k
0.1uF
JTAG
1
VCC
TRST* 3
GND
VCC
B12
A12
TDI
GND
TMS
GND
B11
A14
TCK
10
GND
RTCK 11
12
GND
TDO
13
14
GND
JTAG_GP0
A13
B13
RST
15
16
GNC
JTAG_GP1
A11
PD
17
18
GND
PD
19
20
GND
JTAG_TDO
RESET_IN#
A47
RESET_OUT#
A46
JTAG_AP_TRST_L
J8
10k
JTAG_RTCLK
10k
JTAG_TCK
47k
JTAG_TMS
47k
JTAG_TDI
Signal Name
VDD_1V8
TRST*
JTAG_AP_TDI
JTAG_AP_TMS
JTAG_AP_TCK
JTAG_AP_RTCK
JTAG_AP_TDO
RESET_IN_L
PD
PD
Notes:
Jetson TX1
Pin Name
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_RTCK
JTAG_TDO
RESET_IN#
Usage/Description
Main 1.8V Supply
JTAG Test Reset
JTAG Test Data In
JTAG Test Mode Select
JTAG Test Clock
JTAG Test Return clock
JTAG Test Data out
Main carrier board Reset
Pull-down
Pull-down
Type/
Direction
Power
Input
Input
Input
Output
Output
Input
Pin
#
2
4
6
8
10
12
14
16
18
20
Signal Name
VDD_1V8
GND
GND
GND
GND
GND
GND
GND
GND
GND
Jetson TX1
Pin Name
Usage/Description
Main 1.8V Supply
Ground
Type/
Direction
Power
Ground
In the Type/Dir column, Output is to JTAG header. Input is from JTAG header. Bidir is for Bidirectional signals.
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
16
The Routing Guidelines for the interfaces supported on the expansion connectors can be found in the Jetson TX1 OEM Product
DG. Those guidelines cover the PCB routing from Jetson TX1 to the peripheral device or actual device connector. When
designing modules for one of the Jetson TX1 Expansion connectors, the routing on the Carrier board must be accounted for.
Tables are be provided for the critical interfaces that provide the PCB delays on the Carrier board. These delays are subtracted
from the delays allowed in the Jetson TX1 OEM Product DG routing guidelines. The tables also include the max trace
guidelines and remaining max trace delay allowed on the peripheral modules. See the Jetson TX1 OEM Product DG for other
requirements (Impedance, trace spacing, skews between signals, etc.).
DSI 2 x4
eDP
eDP HPD
eDP AUX
LCD BL EN/PWM
LCD EN/TE/BIAS EN
SPI0, SPI2
I2C_GP1
Touch INT/RST/CLK
Display control
Signal Name
CON_DSI_B_D3_N
CON_DSI_B_D3_P
GND
CON_DSI_B_D2_N
CON_DSI_B_D2_P
GND
CON_DSI_B_CLK_N
Jetson TX1
Pin Name
DSI3_D1
DSI3_D1+
DSI3_D0
DSI3_D0+
DSI2_CLK
Usage/Description
DSI B Data 3DSI B Data 3+
Ground
DSI B Data 2DSI B Data 2+
Ground
DSI B Clock-
Type/Dir
Default
Output
Output
Ground
Output
Output
Ground
Output
Pin
#
2
4
6
8
10
12
14
Signal Name
VDD_SYS_BL
VDD_SYS_BL
VDD_SYS_BL
LCD_BL_EN
LCD_BL_PWM
LCD_RST_L
LCD_TE
Jetson TX1
Pin Name
LCD_BKLT_EN
LCD_BKLT_PWM
LCD_EN
LCD_TE
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
Usage/Description
Type/Dir
Default
Power
Backlight Enable
Backlight PWM
LCD Enable
LCD Tearing Effect
Output
Output
Output
Input
17
Pin
#
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
Signal Name
CON_DSI_B_CLK_P
GND
CON_DSI_B_D1_N
CON_DSI_B_D1_P
GND
CON_DSI_B_D0_N
CON_DSI_B_D0_P
GND
CON_DSI_A_D3_N
CON_DSI_A_D3_P
GND
CON_DSI_A_D2_N
CON_DSI_A_D2_P
GND
CON_DSI_A_CLK_N
CON_DSI_A_CLK_P
GND
CON_DSI_A_D1_N
CON_DSI_A_D1_P
GND
CON_DSI_A_D0_N
CON_DSI_A_D0_P
GND
VDD_3V3_SYS
VDD_3V3_SYS
GND
GND
VDD_1V8
VDD_1V8
GND
GND
VDD_1V2
VDD_1V2
GND
GND
DP_HPD0_AP
EDP_AUX_CH0_N
EDP_AUX_CH0_P
GND
EDP_TXD0_P
EDP_TXD0_N
GND
EDP_TXD1_P
EDP_TXD1_N
GND
EDP_TXD2_P
EDP_TXD2_N
GND
nc
nc
GND
EDP_TXD3_P
EDP_TXD3_N
Notes:
Jetson TX1
Pin Name
DSI2_CLK+
DSI2_D1
DSI2_D1+
DSI2_D0
DSI2_D0+
DSI1_D1
DSI1_D1+
DSI1_D0
DSI1_D0+
DSI0_CLK
DSI0_CLK+
DSI0_D1
DSI0_D1+
DSI0_D0
DSI0_D0+
Usage/Description
DSI B Clock+
Ground
DSI B Data 1DSI B Data 1+
Ground
DSI B Data 0DSI B Data 0+
Ground
DSI A Data 3DSI A Data 3+
Ground
DSI A Data 2DSI A Data 2+
Ground
DSI A ClockDSI A Clock+
Ground
DSI A Data 1DSI A Data 1+
Ground
DSI A Data 0DSI A Data 0+
Ground
Type/Dir
Default
Output
Ground
Output
Output
Ground
Output
Output
Ground
Output
Output
Ground
Output
Output
Ground
Output
Output
Ground
Output
Output
Ground
Output
Output
Ground
Power
Ground
Ground
Power
Ground
Ground
Power
Ground
Ground
Input
Bidir
Bidir
Ground
Output
Output
Ground
Output
Output
Ground
Output
Output
Ground
Unused
Unused
Ground
Display Port 0 Data Lane 3Display Port 0 Data Lane 3+
Ground
Output
Output
DP_HPD
DP0_AUX_CH
DP0_AUX_CH+
DP0_TX0+
DP0_TX0
DP0_TX1+
DP0_TX1
DP0_TX2+
DP0_TX2
DP0_TX3+
DP0_TX3
Pin
#
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
Signal Name
VDD_3V3_SLP
BRIDGE_EN
BRIDGE_IRQ
I2C_GP0_CLK_1V8
I2C_GP0_DAT_1V8
AVDD_TS_DIS
VDD_TS_1V8
Jetson TX1
Pin Name
I2C_GP0_CLK
I2C_GP0_DAT
Usage/Description
Unused
GND
Ground
TOUCH_CLK
TOUCH_CLK
Touchscreen Controller Clock
GND
VDD_DIS_3V3_LCD
Gated 3.3V analog supply
VDD_DIS_3V3_LCD
VDD_LCD_1V8_DIS
Gated 1.8V supply
GND
Ground
LCD_EN
LCD_VDD_EN
LCD Power Enable
NC
CON_DSI3_CLK_P
Unused
CON_DSI3_CLK_N
GND
Ground
CON_DSI4_CLK_P
Unused
CON_DSI4_CLK_N
GND
Ground
GND
VDD_5V0_IO_SYS
Unused
NC
ACOK
CHARGER_PRSNT AC OK
LCD_BIAS_EN
Ground
GS_V
Unused
GS_H
GND
Ground
NVSR_INT
NV Sensor Interrupt
LCD1_BKLT_PWM
unused
GND
Ground
SPI2_SCK
SPI2_SCK
SPI #2 Clock
SPI2_MISO
SPI2_MISO
SPI #2 Master In, Slave Out
SPI2_MOSI
SPI2_MOSI
SPI #2 Master Out, Slave In
SPI2_CS0
SPI2_CS0#
SPI #2 Chip Select
GND
Ground
NC
NC
Unused
NC
NC
Type/Dir
Default
Power
Output
Output
Bidir/OD
Bidir/OD
Power
Bidir/OD
Bidir/OD
Input
Output
Bidir
Bidir
Bidir
Bidir
Unused
Ground
Output
Ground
Power
Power
Ground
Output
Unused
Ground
Input
Ground
Power
Unused
Output
Output
Ground
Unused
Ground
Input
Input
Ground
Bidir
Bidir
Bidir
Bidir
Ground
Unused
In the Type/Dir column, Output is to Display Module. Input is from Display Module. Bidir is for Bidirectional signals.
DSI Guidelines
Tegra supports eight total MIPI DSI data lanes and two clock lanes, allowing up to two 4-lane interfaces. These can be be used
for two separate displays, or together for a single display (clock lane per 4 data lanes still applies for the single display case.
Each data channel has peak bandwidth up to 1.5Gbps.
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
18
Jetson
TX1
DSI0_CK+
G33
DSI0_CK
G34
DSI0_D0+
F34
DSI0_D0
DSI1_D1
F35
H32
H33
C34
C35
E32
E33
DSI2_CK+
G30
DSI2_CK
G31
DSI2_D0+
F31
DSI2_D0
F32
H29
H30
C31
C32
E29
E30
DSI0_D1+
DSI0_D1
DSI1_D0+
DSI1_D0
DSI1_D1+
A_CLKP
A_CLKN
A_D0P
A_D0N
A_D1P
A_D1N
A_D2P
A_D2N
A_D3P
A_D3N
EMI/ESD
DSI2_D1+
DSI2_D1
DSI3_D0+
DSI3_D0
DSI3_D1+
DSI3_D1
Note:
LCD_VDD_EN
B26
LCD_TE
A25
LCD_BKLT_EN
B28
LCD0_BKLT_PWM
B27
Display
Connector
(DSI)
B_CLKP
B_CLKN
B_D0P
B_D0N
B_D1P
B_D1N
B_D2P
B_D2N
B_D3P
B_D3N
Embedded
Display Control
Backlight
Control
If EMI/ESD devices are necessary, they must be tuned to minimize impact to signal quality, which must meet the DSI spec.
requirements for the frequencies supported by the design.
eDP Connector
Jetson
TX1
DP0_TX0+
DP0_TX0
DP0_TX1+
H39
H38
DP0_TX1
F38
F37
DP0_TX2+
G37
DP0_TX2
DP0_TX3+
DP0_TX3
DP0_AUX_CH+
G36
H36
H35
DP0_AUX_CH
B35
B34
DP0_HPD
B36
LCD_VDD_EN
LCD_BKLT_EN
B26
A25
B28
LCD0_BKLT_PWM
B27
LCD_TE
0.1uF
EDP_TX0_P
EDP_TX0_N
0.1uF
0.1uF
EDP_TX1_P
EDP_TX1_N
0.1uF
0.1uF
EDP_TX2_P
EDP_TX2_N
0.1uF
0.1uF
EDP_TX3_P
EDP_TX3_N
0.1uF
0.1uF
0.1uF
LN2_P
LN2_N
LN1_P
LN1_N
LN0_P
LN0_N
2-lane
4-lane
LN3_P
LN3_N
AUX_P
AUX_N
HPD
Embedded
Display Control
Backlight
Control
See the Jetson TX1 OEM Product DG for Routing Guidelines. Include the Carrier board PCB trace delays in the following table
when calculating max trace length & for skew matching.
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
19
Table 12. Display Connector Interface Related TX1 Carrier PCB Trace Delays (DSI & SPI)
Jetson TX1
Module Signal
DSI
DSI0_CK+
DSI0_CK
DSI0_D0+
DSI0_D0
DSI0_D1+
DSI0_D1
DSI1_D0+
DSI1_D0
DSI1_D1+
DSI1_D1
DSI2_CK+
DSI2_CK
Carrier Board
PCB Delay
(ps)
Max Trace
Delay
Allowed (ps)
494.07
493.22
495.21
495.92
490.3
489.32
491.84
492.8
495.04
495.98
492.54
491.63
1050
1050
1050
1050
1050
1050
1050
1050
1050
1050
1050
1050
556
557
555
554
560
561
558
557
555
554
557
558
Jetson TX1
Module Signal
DSI2_D0+
DSI2_D0
DSI2_D1+
DSI2_D1
DSI3_D0+
DSI3_D0
SPI
SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_CS0#
SPI2_SCK
SPI2_MISO
SPI2_MOSI
SPI2_CS0#
Carrier Board
PCB Delay
(ps)
491.32
491.24
492.98
492
495.72
496.48
Max Trace
Delay
Allowed (ps)
1050
1050
1050
1050
1050
1050
750
740
743
758
373
650
649
643
1865
1865
1865
1865
1865
1865
1865
1865
1115
1125
1122
1107
1492
1215
1216
1222
Table 13. Display Connector Interface Related TX1 Carrier PCB Trace Delays (DP0)
Jetson TX1 Module
Signal
DP0_TX0+
DP0_TX0
DP0_TX1+
DP0_TX1
DP0_TX2+
DP0_TX2
DP0_TX3+
DP0_TX3
DP0_AUX_CH+
DP0_AUX_CH
Carrier Board
PCB Delay (ps)
609
608
608
609
623
624
658
659
529
529
RBR/HBR
uStrip
975
975
975
975
975
975
975
975
975
975
RBR/HBR
uStrip
366
367
367
366
352
351
317
316
446
446
Signal Name
CON_CSI_A_D0_P
CON_CSI_A_D0_N
GND
CON_CSI_A_CLK_P
CON_CSI_A_CLK_N
GND
CON_CSI_A_D1_P
Jetson TX1
Pin Name
CSI0_D0+
CSI0_D0
CSI0_CLK+
CSI0_CLK
CSI0_D1+
Usage/Description
CSI A Data 0+
CSI A Data 0Ground
CSI A Clock+
CSI A ClockGround
CSI A Data 1+
Type/Dir
Default
Input
Input
Ground
Input
Input
Ground
Input
Pin
#
2
4
6
8
10
12
14
Signal Name
CON_CSI_B_D0_P
CON_CSI_B_D0_N
GND
CON_CSI_B_CLK_P
CON_CSI_B_CLK_N
GND
CON_CSI_B_D1_P
Jetson TX1
Pin Name
CSI1_D0_P
CSI1_D0_N
CSI1_CLK_P
CSI1_CLK_N
CSI1_D1_P
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
Usage/Description
CSI B Data 0+
CSI B Data 0Ground
CSI B Clock+
CSI B ClockGround
CSI B Data 1+
Type/Dir
Default
Input
Input
Ground
Input
Input
Ground
Input
20
Pin
#
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
Signal Name
61
63
65
67
CAM_UART3_TXD
CAM_UART3_RXD
CAM_UART3_CTS
CAM_UART3_RTS
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
GND
AO_DMIC_IN_CLK
AO_DMIC_IN_DAT
CAM_I2C_SCL
CAM_I2C_SDA
GND
AVDD_CAM
AVDD_CAM
CAM_AF_PWDN
I2C_PM_CLK
I2C_PM_DAT
CAM0_MCLK
CAM0_PWDN
CAM0_RST_L
FLASH_EN
GND
DVDD_CAM_IO_1V2
CON_CSI_A_D1_N
GND
CON_CSI_C_D0_P
CON_CSI_C_D0_N
GND
CON_CSI_C_CLK_P
CON_CSI_C_CLK_N
GND
CON_CSI_C_D1_P
CON_CSI_C_D1_N
GND
CON_CSI_E_D0_P
CON_CSI_E_D0_N
GND
CON_CSI_E_CLK_P
CON_CSI_E_CLK_N
GND
CON_CSI_E_D1_P
CON_CSI_E_D1_N
GND
RSVD
RSVD
CAM_UART3_PSNT_L
103
105
107
109
111
113
115
117
FLASH_INHIBIT
I2C_GP0_CLK_1V8
I2C_GP0_DAT_1V8
VDD_5V0_IO_SYS
NC
NC
GND
MDM2AP_READY_
1V8
119 VDD_SYS_EN
Notes:
Jetson TX1
Pin Name
CSI0_D1
CSI2_D0+
CSI2_D0
CSI2_CLK+
CSI2_CLK
CSI2_D1+
CSI2_D1
CSI4_D0+
CSI4_D0
CSI4_CLK+
CSI4_CLK
CSI4_D1+
CSI4_D1
I2C_CAM_CLK
I2C_CAM_DAT
Usage/Description
CSI A Data 1Ground
CSI C Data 0+
CSI C Data 0Ground
CSI C Clock+
CSI C ClockGround
CSI C Data 1+
CSI C Data 1Ground
CSI E Data 0+
CSI E Data 0Ground
CSI E Clock+
CSI E ClockGround
CSI E Data 1+
CSI E Data 1Ground
Unused
Type/Dir
Default
Input
Ground
Input
Input
Ground
Input
Input
Ground
Input
Input
Ground
Input
Input
Ground
Input
Input
Ground
Input
Input
Ground
Unused
Signal Name
Pin
#
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
Usage/Description
SPI #2 Clock
SPI #2 MISO
SPI #2 Chip Select
SPI #2 MOSI
Output
Input
Input
Output
62
64
66
68
SPI2_SCK
SPI2_MISO
SPI2_CS1
SPI2_MOSI
SPI2_CLK
SPI2_MISO
SPI2_CS1#
SPI2_MOSI
Ground
Unused
Bidir
Bidir
Ground
Power
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
GND
I2S3_CLK
I2S3_LRCLK
I2S3_SDIN
I2S3_SDOUT
GND
AVDD_CAM
VDD_3V3_SLP
RSVD
CAM1_MCLK
CAM1_PWDN
CAM1_RST_L
RSVD
CAM2_PWDN
CAM2_RST
GND
Ground
I2S3_CLK
I2S #3 Clock
I2S3_LRCLK
I2S #3 Left/Right Clock
I2S3_SDIN
I2S #3 Serial Data In
I2S3_SDOUT
I2S #3 Serial Data Out
Ground
Unused
CAM1_MCLK
Camera #1 Master Clock
GPIO1_CAM1_PWR Camera #1 Powerdown
GPIO3_CAM1_RST Camera #1 Reset
Unused
Camera #2 Powerdown
Camera #2 Reset
Ground
Unused
Ground
I2C_PM_CLK
I2C_PM_DAT
CAM0_MCLK
Ground
Ground
I2C_GP0_CLK
I2C_GP0_DAT
CON_CSI_B_D1_N
GND
CON_CSI_D_D0_P
CON_CSI_D_D0_N
GND
CON_CSI_D_CLK_P
CON_CSI_D_CLK_N
GND
CON_CSI_D_D1_P
CON_CSI_D_D1_N
GND
CON_CSI_F_D0_P
CON_CSI_F_D0_N
GND
CON_CSI_F_CLK_P
CON_CSI_F_CLK_N
GND
CON_CSI_F_D1_P
CON_CSI_F_D1_N
GND
RSVD
RSVD
NC
Jetson TX1
Pin Name
CSI1_D1
CSI3_D0+
CSI3_D0
CSI3_CLK+
CSI3_CLK
CSI3_D1+
CSI3_D1
CSI5_D0+
CSI5_D0
CSI5_CLK+
CSI5_CLK
CSI5_D1+
CSI5_D1
DVDD_CAM_IO_1V8
Flash Inhibit
Output 104 TORCH_EN
General I2C #0 Clock
Bidir/OD 106 FLASH_STROBE
General I2C #0 Data
Bidir/OD 108 VDD_3V3_SLP
Main 5.0V Supply (Switcher) Power 110 VDD_3V3_SLP
Unused
Unused 112 MOTION_INT_AP_L
114 NC
Ground
Ground 116 GND
Modem to Tegra Ready
Input 118 VDD_5V0_IO_SYS
Type/Dir
Default
Input
Ground
Input
Input
Ground
Input
Input
Ground
Input
Input
Ground
Input
Input
Ground
Input
Input
Ground
Input
Input
Ground
Unused
Bidir
Bidir
Bidir
Bidir
Ground
Bidir
Bidir
Input
Bidir
Ground
Power
Power
Unused
Output
Output
Output
Unused
Output
Output
Ground
Power
Output
Output
Power
Power
Input
Unused
Ground
Power
In the Type/Dir column, Output is to Camera Module. Input is from Camera Module. Bidir is for Bidirectional signals.
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
21
Camera/CSI Guidelines
Figure 13: Camera CSI Connections
Jetson TX1
CSI0_CK+
G28
CSI0_CK
G27
F29
CSI0_D0+
CSI0_D0
F28
CSI0_D1+
H27
H26
CSI0_D1
CSI1_CK
D28
D27
CSI1_D0+
C29
CSI1_D0
C28
CSI1_D1+
E27
E26
CSI1_CK+
CSI1_D1
CSI2_CK+
CSI2_CK
CSI2_D0+
CSI2_D0
CSI2_D1+
CSI2_D1
CSI3_D1
D25
D24
C26
C25
E24
E23
CSI4_CK+
G22
CSI4_CK
G21
F23
CSI3_CK+
CSI3_CK
CSI3_D0+
CSI3_D0
CSI3_D1+
CSI4_D0+
CSI4_D0
CSI4_D1+
CSI4_D1
CSI5_CK+
CSI5_CK
CSI5_D0+
CSI5_D0
CSI5_D1+
CSI5_D1
Note:
G25
G24
F26
F25
H24
H23
2-lane
Mapping
4-lane
Mapping
Camera #0
Camera A
(Only CSI0
Clock Used)
Camera #1
Camera #2
EMI
&
Camera B
(Only CSI2
Clock Used)
ESD
Camera #3
Camera #4
F22
H21
H20
Camera C
(Only CSI4
Clock Used)
D22
D21
C23
C22
E21
E20
Camera #5
Any EMI/ESD devices must be tuned to minimize impact to signal quality and meet the timing & Vil/Vih requirements at the
receiver & maintain signal quality and meet requirements for the frequencies supported by the design.
See the Jetson TX1 OEM Product DG for Routing Guidelines. Include the Carrier board PCB trace delays in the following table
when calculating max trace length & for skew matching.
Table 15. Camera Expansion Connector Related TX1 Carrier PCB Trace Delays
Jetson TX1
Module Signal
CSI
CSI0_CK+
CSI0_CK
CSI0_D0+
CSI0_D0
CSI0_D1+
CSI0_D1
CSI1_CK+
CSI1_CK
CSI1_D0+
CSI1_D0
Carrier Board
PCB Delay
(ps)
Max Trace
Delay
Allowed (ps)
626
626
627
627
627
626
626
625
627
626
1050
1050
1050
1050
1050
1050
1050
1050
1050
1050
424
424
423
423
423
424
424
425
423
424
Jetson TX1
Module Signal
CSI4_CK+
CSI4_CK
CSI4_D0+
CSI4_D0
CSI4_D1+
CSI4_D1
CSI5_CK+
CSI5_CK
CSI5_D0+
CSI5_D0
CSI5_D1+
Carrier Board
PCB Delay
(ps)
540
539
540
540
541
540
540
539
541
540
541
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
Max Trace
Delay
Allowed (ps)
1050
1050
1050
1050
1050
1050
1050
1050
1050
1050
1050
22
CSI1_D1+
CSI1_D1
CSI2_CK+
CSI2_CK
CSI2_D0+
CSI2_D0
CSI2_D1+
CSI2_D1
CSI3_CK+
CSI3_CK
CSI3_D0+
CSI3_D0
CSI3_D1+
CSI3_D1
627
626
587
586
586
585
588
587
587
586
588
587
588
587
1050
1050
1050
1050
1050
1050
1050
1050
1050
1050
1050
1050
1050
1050
423
424
463
464
464
465
462
463
463
464
462
463
462
463
CSI5_D1
I2S
I2S3_CLK
I2S3_LRCLK
I2S3_SDIN
I2S3_SDOUT
SPI
SPI2_SCK
SPI2_MISO
SPI2_CS1#
SPI2_MOSI
540
1050
510
472
485
497
457
3600
3600
3600
3600
3128
3115
3103
3143
373
650
513
649
1865
1865
1865
1865
1492
1215
1352
1216
Note:
I2S(See Note)
Audio Clock/Control
I2C (x2) (See Note)
SPI (See Note)
UART (See Note)
Some of these interfaces can be 1.8V or 3.3V. J14 is a 3-pin header that is used to control the voltage of the level shifter
these interfaces pass through. If J14 pin 1-2 are shorted, the interfaces are level shifted to 3.3V. If pins 2-3 are shorted, the
interfaces are 1.8V. The 3.3V only interfaces/signals are:
-
I2C_GP0_x_3V3_LVL
I2C_GP1_x_3V3
UART1_x_HDR_3V3
GPIO_EXP_P[17:16]_3V3
MOTION_INT_AP_L_LVL
SAR_TOUT_LVL
Jetson TX1
Pin Name
VDD_3V3_SYS
I2C_GP0_DAT_3V3
I2C_GP0_DAT
I2C_GP0_CLK_3V3
I2C_GP0_CLK
AUDIO_I2S_MCLK_3V3 AUDIO_MCLK
GND
UART1_RTS_HDR_3V3 UART0_RTS#
AUDIO_CDC_IRQ
GPIO_PE6
GPIO_EXP_P17_3V3
VDD_3V3_SYS
SPI1_MOSI_3V3
SPI1_MOSI
Signal Name
21 SPI1_MISO_3V3
23 SPI1_SCK_3V3
25
27
29
31
33
35
37
GND
I2C_GP1_DAT_3V3
AUD_RST
MOTION_INT_AP_L
AP_WAKE_BT_3V3
SPI1_MISO
SPI1_CLK
Usage/Description
Main 3.3V Supply
General I2C #0 Data (3.3V)
General I2C #0 Clock (3.3V)
Audio Master Clock (1.8/3.3V)
Ground
UART #0 Request to Send
Audio Codec Interrupt
From GPIO Expander (P17)
Main 3.3V Supply
SPI #1 Master Out/Slave In (1.8/3.3V)
Ground
I2C_GP1_DAT
General I2C #1 Data (3.3V)
GPIO19_AUD_RST Audio Reset (1.8/3.3V)
GPIO9_MOTION_INT Motion Interrupt (3.3V)
GPIO11_AP_WAKE_BT AP Wake Bt GPIO
AUDIO_I2S_SFSYNC_3V3 I2S0_LRCLK
AUDIO I2S #0 Left/Right Clock
GPIO8_ALS_PROX_INT (3.3V)
SAR_TOUT
Type/
Direction
Power
Bidir/OD
Bidir/OD
Bidir
Ground
Output
Bidir
Bidir
Power
Bidir
Bidir
Bidir
Ground
Bidir/OD
Output
Input
Bidir
Bidir
Output
Pin
#
2
4
6
8
10
12
14
16
18
20
Signal Name
Jetson TX1
Pin Name
VDD_5V0_IO_SYS
VDD_5V0_IO_SYS
GND
Power
Ground
UART #0 Transmit
UART #0 Receive
Audio I2S #0 Clock
Ground
Unused
Modem Wake AP GPIO
Ground
Ground
Output
Input
Bidir
Ground
Unused
Input
Ground
Bidir
Bidir
AUDIO_I2S_SRCLK_3V3 I2S0_SCLK
MDM_WAKE_AP_LVL
GND
GPIO16_MDM_WAKE_AP
22 GPIO_EXP_P16_3V3
24 SPI1_CS0_3V3
26
28
30
32
34
36
38
UART1_RXD_HDR_3V3 UART0_RX
AO_DMIC_IN_DAT_LVL
SPI1_CS0#
SPI1_CS1_3V3
I2C_GP1_CLK_3V3
GND
AO_DMIC_IN_CLK
GND
SPI1_CS1#
I2C_GP1_CLK
UART1_CTS_HDR_3V3 UART0_CTS#
AUDIO_I2S_SIN_3V3 I2S0_SDIN
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
Type/
Direction
UART1_TXD_HDR_3V3 UART0_TX
GND
Usage/Description
Bidir
Bidir/OD
Ground
Unused
Ground
Input
Input
23
Pin
Signal Name
#
39 GND
Notes:
Jetson TX1
Pin Name
Type/ Pin
Jetson TX1
Signal Name
Direction #
Pin Name
Ground 40 AUDIO_I2S_SOUT_3V3 I2S0_SDOUT
Usage/Description
Ground
Type/
Direction
Output
Usage/Description
Audio I2S #0 Data Out
In the Type/Dir column, Output is to Expansion Module. Input is from Expansion Module. Bidir is for Bidirectional
signals.
Carrier Board
PCB Delay
(ps)
Max Trace
Delay
Allowed (ps)
69
150
60
127
3600
3600
3600
3600
3531
3450
3540
3473
Jetson TX1
Module Signal
SPI
SPI1_SCK
SPI1_MISO
SPI1_MOSI
SPI1_CS0#
SPI1_CS1#
Carrier Board
PCB Delay
(ps)
Max Trace
Delay
Allowed (ps)
791
782
783
786
791
1865
1865
1865
1865
1865
1074
1083
1082
1079
1074
JTAG
UART
I2C (x3) (See Note)
Power, Force Recovery & Reset Control
GPIOs
Signal Name
ACOK
GND
JTAG_AP_TDI
JTAG_AP_TMS
JTAG_AP_TCK
JTAG_AP_RTCK
GND
JTAG_AP_TDO
RESET_IN_R_L
GND
VDD_1V8
I2C_PM_DAT
I2C_PM_CLK
UART2_TXD_DBG
UART2_RXD_DBG
LED_VDD_CORE
CPU_PWR_REQ
GND
NC
NC
NC
43 NC
45 NC
Jetson TX1
Pin Name
CHARGER_PRSNT#
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_RTCK
JTAG_TDO
I2C_PM_DAT
I2C_PM_CLK
UART2_TX
UART2_RX
AC power OK
Ground
JTAG Test Data In
JTAG Test Mode Select
JTAG Test Clock
JTAG Return Clock
Ground
JTAG Test Data Out
Reset Input
Ground
Main 1.8V Supply
I2C Interface (PM) Data
I2C Interface (PM) Clock
UART #2 Transmit
UART #2 Receive
Enable for SOC Enable LED
Tied to GND
Ground
Type/Dir
Default
Input
Ground
Input
Input
Input
Output
Ground
Output
Bidir
Ground
Power
Bidir/OD
Bidir/OD
Output
Input
Output
na
Ground
Unused
Unused
Usage/Description
Pin
#
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
Jetson TX1
Pin Name
VDD_1V8
GND
UART1_TXD_DBG_1V8 UART0_TX
UART1_RXD_DBG_1V8 UART0_RX
UART1_CTS
UART0_CTS#
UART1_RTS
UART0_RTS#
GND
I2C_GP0_CLK_1V8
I2C_GP0_CLK
I2C_GP0_DAT_1V8
I2C_GP0_DAT
NC
NC
GND
VDD_1V8
LED_VDD_CORE
NC
DBG_GPIO1
UART0_CTS
DBG_GPIO2
UART0_RTS
GND
NC
RESET_IN_R_L
RESET_IN#
FORCE_RECOVERY_R_L FORCE_RECOV#
Signal Name
Type/Dir
Default
Power
Ground
Output
Input
Input
Output
Ground
Bidir/OD
Bidir/OD
Unused
Unused
Ground
Main 1.8V Supply
Enable for SOC EN LED
Ground
Power
Output
Unused
Input
Output
Ground
Unused
Input
Input
Usage/Description
44 RESET_IN_R_L
RESET_IN#
Input
46 POWER_BTN_R
POWER_BTN#
Input
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
24
Pin
#
47
49
51
53
55
57
59
Signal Name
NC
NC
GND
JTAG_AP_TRST_L
D_FORCE_OFF_L
NC
NC
Notes:
Jetson TX1
Pin Name
Type/Dir Pin
Signal Name
Default #
48 NC
50 NC
Ground 52 GND
Input
54 I2C_GP1_CLK_3V3
Input
56 I2C_GP1_DAT_3V3
58 GND
Unused
60 VAUX_5V
Usage/Description
JTAG_GP0
Ground
Debug GPIO #0
Force Off
Unused
Jetson TX1
Pin Name
I2C_GP1_CLK
I2C_GP1_DAT
Usage/Description
Type/Dir
Default
Unused
Unused
Ground
Ground
General I2C #1 Clock
Bidir/OD
General I2C #1 Data
Bidir/OD
Ground
Ground
5V Supply from Debug Conn. Power
In the Type/Dir column, Output is to Debug Module. Input is from Debug Module. Bidir is for Bidirectional signals.
Signal Name
NC
NC
NC
NC
NC
GND
NC
NC
NC
NC
GND
I2S1_CLK
I2S1_SDIN
DSPK_OUT_CLK
DSPK_OUT_DAT
Notes:
Jetson TX1
Pin Name
Type/Dir Pin
Signal Name
Default #
2 VDD_3V3_SYS
4 VDD_1V8
Unused 6 AP2MDM_READY
8 VDD_5V0_IO_SYS
10 GND
Ground 12 NC
14 NC
16 NC
Unused
18 NC
20 NC
Ground 22 SLEEP
Bidir
24 I2S1_SDOUT
Input
26 I2S1_LRCLK
Unused 28 GND
Unused 30 GNSS_PPS
Usage/Description
Unused
Ground
Unused
I2S1_CLK
I2S1_SDIN
Ground
I2S #1 Clock
I2S #1 Data In
Unused
Unused
Jetson TX1
Pin Name
Usage/Description
Type/Dir
Default
Bidir
Power
Ground
Unused
Unused
Sleep Indicator
I2S #1 Data Out
I2S #1 Left/Right Clock
Ground
Unused
Output
Bidir
Bidir
Ground
Unused
GPIO15_AP2MDM_READY
SLEEP#
I2S1_SDOUT
I2S1_LRCLK
Power
In the Type/Dir column, Output is from GPIO Module. Input is to GPIO Module. Bidir is for Bidirectional signals.
900
893
916
911
3600
3600
3600
3600
2700
2707
2684
2689
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
25
Level Shifter
VCCB
VCCA
B1
A1
B2
A2
GND
DIR
Jetson TX1
0.1uF
UART1_CTS#
From Camera
Exp. Connector
0.1uF
2
3
E9
E10
Level Shifter
VCCA
VCCB
A1
B1
A2
B2
DIR
GND
0.1uF
CAM_UART3_CTS
CAM_UART3_RXD
CAM_UART3_TXD
CAM_UART3_RTS
VDD_1V8
5
6
0.1uF
100k
CAM_UART_PSNT_L
100k
UART1_RTS#
Serial Port
Header
100k
UART1_RX
D9
D10
100k
UART1_TX
VDD_3V3_SYS
D
G
S
Signal Name
SHIELD/GND
UART3_RTS_3V3_L
NC
UART3_RXD_3V3
UART3_TXD_3V3
UART3_CTS_3V3_L
Notes:
Jetson TX1
Pin Name
UART1_RTS#
UART1_RX
UART1_TX
UART1_CTS#
Usage/Description
Type/Dir
Default
Ground
Output
Unused
Input
Output
Input
Ground
UART Return to Send
Unused
UART Receive
UART Transmit
UART Clear to Send
In the Type/Dir column, Output is to Serial Port header. Input is from Serial Port header. Bidir is for Bidirectional signals.
Signal Name
ACOK
CHARGING
LOW_BAT
GND
I2C_PM_CLK
Notes:
Jetson TX1
Pin Name
CHARGER_PRSNT#
CHARGING#
BATLOW#
I2C_PM_CLK
Usage/Description
AC power OK
Charging indicator
Low Battery indicator
Ground
I2C (Power Monitor) Clock
Type/Dir Pin
Signal Name
Default #
Input
6 I2C_PM_DAT
Input
7 NC
Input
8 BAT_DET_L
Ground 9 TYPEC_INT
Bidir/OD 10 CHG_BD_PRSNT_L
Jetson TX1
Pin Name
I2C_PM_DAT
Usage/Description
I2C (Power Monitor) Data
Unused
Pulled up to VDD_3V3_SYS
From GPIO Expander (P02)
From GPIO Expander (P14)
Type/Dir
Default
Bidir/OD
Unused
Na
Output
Output
In the Type/Dir column, Output is to Charger Ctrl board. Input is from Charger Ctrl board. Bidir is for Bidirectional signals.
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
26
Jetson
TX1
FAN_PWM
Fan
Header
10k
D
G
C16
VDD_5V0_IO_SLP
100k
4.7k
VDD_1V8
3
2
FAN_TACH
B17
100k
10pF 10pF
10uF 0.1uF
PS_VDD_FAN_DISABLE
(GPIO Expander P04)
Notes:
Signal Name
GND
VDD_5V0_IO_SLP
FAN_TACH
FAN_PWM_Q*
Jetson TX1
Pin Name
FAN_TACH
FAN_PWM
Usage/Description
Ground
Gated version of Main 5.0V Supply (Enabled by VDD_3V3_SLP)
Fan Tachometer signal
Fan Pulse Width Modulation signal
Type/Dir
Default
Ground
Power
Input
Output
In the Type/Dir column, Output is to Fan Connector. Input is from Fan Connector. Bidir is for Bidirectional signals.
Signal Name
VDD_19V_CON
GND
GND
GND
GND
GND
Jetson TX1
Pin Name
Usage/Description
Main DC input supplying VDD_IN/VDD_MOD
Ground
Ground
Ground
Ground
Ground
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
Type/Dir
Default
Power
Ground
Ground
Ground
Ground
Ground
27
FET
VDD_MOD (VDD_IN)
Jetson TX1
VDD_MUX
TPS53015
DC-DC
TPS53015
DC-DC
VDD_5V0_IO_SYS
VDD_5V0_IO_SYS
VDD_3V3_SYS
VDD_5V0_IO_SYS
VDD_VBUS_CON
USB_VBUS
SD_CARD_SW_PWR
VDD_5V0_HDMI_CON
VDD_3V3_SYS
VDD_3V3_SYS
VDD_3V3_SYS
VDD_5V0_IO_SYS
VDD_5V0_IO_SYS
VDD_3V3_SLP
VDD_3V3_SYS
VDD_12V_SLP
VDD_12V_SLP
VDD_5V0_IO_SLP
VDD_5V0_IO_SLP
APW8805
DC-DC
VDD_1V8
VDD_3V3_SLP
VDD_1V8
VDD_3V3_SYS
VDD_1V8
VDD_1V8
VDD_3V3_SLP
VDD_1V8
Gbit LAN
M.2 Key E Socket
PCIe x4 Connector
SATA
Fan
VDD_TS_1V8
AVDD_TS_DIS
VDD_LCD_1V8_DIS
VDD_DIS_3V3_LCD
VDD_1V2
VDD_3V3_SLP
VDD_5V0_IO_SYS
VDD_3V3_SYS
VDD_1V8
Display Expansion
Connector
DVDD_CAM_IO_1V8
AVDD_CAM 2.8V
DVDD_CAM_IO_1V2
VDD_5V0_IO_SYS
VDD_3V3_SLP
VDD_5V0_IO_SYS
VDD_3V3_SYS
VDD_5V0_IO_SYS
VDD_3V3_SYS
VDD_1V8
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
Camera Expansion
Connector
Expansion
Connector
GPIO Expansion
28
The table below shows the allocation of supplies to the connectors on the Jetson TX1 carrier board.
Table 25 Interface Power Supply Allocation
#
Power Rails
Usage
(V)
VDD_IN/VDD_MUX
VDD_5V0_IO_SYS
Main 5V supply
5.0
TPS53015
VDD_MUX
CARRIER_PWR_ON
7000
VDD_3V3_SYS
3.3
TPS53015
VDD_MUX
3V3_SYS_BUCK_EN
7000
VDD_1V8
1.8
APW8805
VDD_5V0_IO_SYS
2000
VDD_3V3_SLP
3.3
FETs
VDD_3V3_SYS
1V8_IO_VREG_EN
(VDD_3V3_SYS_PG)
SOC_PWR_REQ
VDD_5V0_IO_SLP
5.0
FETs
VDD_5V0_IO_SYS
SOC_PWR_REQ
VDD_12V_SLP
12.0
LM3481MMX Boost
VDD_5V0_IO_SYS
VDD_3V3_SLP
VDD_VBUS_CON
5.0
VDD_5V0_IO_SYS
USB_VBUS_EN0
5.5-19.6 FETs
Source
Enable
DC Adapter
USB_VBUS
5.0
VDD_5V0_IO_SYS
USB_VBUS_EN1
10
SD_CARD_SW_PWR
3.3
VDD_3V3_SYS
SDCARD_VDD_EN
11
VDD_5V0_HDMI_CON
VDD_5V0_IO_SYS
12
VDD_TS_1V8
VDD_1V8
13
AVDD_TS_DIS
VDD_3V3_SLP
14
VDD_LCD_1V8_DIS
VDD_1V8
15
VDD_DIS_3V3_LCD
VDD_3V3_SYS
16
VDD_1V2
TLV73312 LDO
VDD_1V8
17
VDD_SYS_BL
5V0_HDMI_EN
(GPIO Expander U32, P14)
EN_VDD_TS_1V8_PMIC
(GPIO Expander U32, P01)
EN_VDD_TS_HV_PMIC
(GPIO Expander U32, P02)
VDD_LCD_1V8_EN
(GPIO Expander U32, P11)
EN_VDD_DISP
(GPIO Expander U32, P03)
DIS_VDD_1V2_EN
(GPIO Expander U32, P12)
Na
18
DVDD_CAM_IO_1V8
19
AVDD_CAM
2.8
APL5932
VDD_3V3_SLP
20
DVDD_CAM_IO_1V2
1.2
TLV73312
VDD_1V8
Note:
1.
2.
3.
4.
3.3
1.2
VDD_MUX
VDD_5V0_IO_SYS
VDD_1V8
CAM_VDD_1V8_EN
(GPIO Expander U31, P11)
CAM_AVDD_CAM_EN
(GPIO Expander U32, P15)
CAM_VDD_1V2_EN
(GPIO Expander U31, P12)
Max
Current
(mA)
~4000
2300
1000
1000
200
When operated near the minimum voltage, the power supported by some of the supplies may be reduced.
The supplied power adapter is rated to 90W.
The values shown in the Supported Current column indicate the total power available on the expansion connectors (not per pin).
If a given voltage rail cannot provide enough current, a possible solution is for the user to use a regulator from VDD_5V0_IO_SYS,
VDD_3V3_SYS or VDD_1V8 to generate the desired rail.
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
29
Getting Started
Individual development efforts will vary and may result in modifications to the system configuration. It is recommended that you
begin with the basic system configuration (as shipped) to ensure proper system operation prior to any further development
CAUTION:
The NVIDIA Jetson TX1 developer board contains ESD-sensitive parts. Always use appropriate anti-static and grounding
techniques when working with the system. Failure to do so can result in ESD discharge to sensitive pins, and irreparably
damage your Jetson TX1 board. NVIDIA will not replace units that have been damaged due to ESD discharge. Always
disconnect any power source prior to adding additional modules or connecting peripheral devices to the developer board.
It is important that all modules are properly seated in their connectors to ensure proper operation and to avoid damaging
the module or the developer board.
Obtaining Support
The Jetson TX1 Developer Kit is supported via NVIDIAs Embedded Developer Zone at:
https://developer.nvidia.com/embedded-computing
Powering Up the Jetson TX1 Developer Kit
1.
2.
3.
Connect the AC adapter supplied in your kit to the power connector of your device
4.
5.
They system should power on. If not, press and release the power button on the device
Login Credentials
Username: ubuntu
Password: ubuntu
Notes:
Note: Login is not required on the serial console. Please plan physical security accordingly.
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
30
ALWAYS CONNECT ALL EXTERNAL PERIPHERAL DEVICES BEFORE CONNECTING THE POWER SUPPLY TO THE AC/DC JACK.
Connecting a device while powered on may damage the developer board or peripheral device.
Power down the device. If connected, remove the AC adapter from the device. The device MUST be powered OFF, not
in a suspend or sleep state.
2.
Connect the Micro-B plug on the USB cable to the Recovery (USB Micro-B) Port on the device and the other end to an
available USB port on the host PC.
3.
4.
Press and release the POWER button, if necessary; press and hold the RECOVERY FORCE button; while depressing
the RECOVERY FORCE button, press and release the RESET button; wait two seconds and release the RECOVERY
FORCE button.
Notes:
When in Force USB Recovery Mode, the development system will not boot up (nothing appears on display or serial port).
After successfully updating the system software and restarting your developer board, the system will continue through the boot
up process.
Jetson TX1 | Developer Kit Carrier Board | Specification | 20151109 | Copyright 2013-2015 NVIDIA Corporation. All Rights Reserved
31
Notice
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS, AND OTHER
DOCUMENTS (TOGETHER AND SEPARATELY, MATERIALS) ARE BEING PROVIDED AS IS. NVIDIA MAKES NO
WARRANTIES, EXPRESSED, IMPLIED, STATUTORY, OR OTHERWISE WITH RESPECT TO THE MATERIALS, AND
EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A
PARTICULAR PURPOSE.
Information furnished is believed to be accurate and reliable. However, NVIDIA Corporation assumes no responsibility for the
consequences of use of such information or for any infringement of patents or other rights of third parties that may result from its use.
No license is granted by implication or otherwise under any patent or patent rights of NVIDIA Corporation. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
NVIDIA Corporation products are not authorized for use as critical components in life support devices or systems without express
written approval of NVIDIA Corporation.
Trademarks
NVIDIA, the NVIDIA logo and Tegra are trademarks or registered trademarks of NVIDIA Corporation in the U.S. and other countries.
Other company and product names may be trademarks of the respective companies with which they are associated.
Copyright
20132015 NVIDIA Corporation. All rights reserved.