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Name
Assessments :
Criteria
Marks
/10
Results
/20
Discussions
/20
Conclusions
/10
Questions
/40
Total marks
/100
Contents
EXPERIMENT 1 .......................................................................................................3
1.0 OBJECTIVES .....................................................................................................3
2.0 LIST OF REQUIREMENTS ............................................................................3
2.1 Equipments ....................................................................................................3
3.0 THEORY ..........................................................................................................3
4.0 PROCEDURE 1 ...............................................................................................5
4.1 QUESTION 1 ................................................................................................6
5.0 PROCEDURE 2 ...............................................................................................6
5.1 QUESTION 2 ................................................................................................8
6.0 QUESTION 3 ...................................................................................................8
7.0 INSTRUCTIONS ...........................................................................................10
8.0 REFERENCES ...............................................................................................10
Appendix 1 ...........................................................................................................11
Prepared by :
Siti Sara Binti Rais
FKE UiTM Dungun
Page 2
1.0 OBJECTIVES
i)
3.0 THEORY
A 68HC12 instruction consists of one or two bytes of opcode and zero to five bytes of
operand addressing information. The opcode byte(s) specifies the operation to be performed
Prepared by :
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FKE UiTM Dungun
Page 3
and the addressing modes to be used to access the operand(s). The first byte of a two-byte
opcode is $18.
Addressing modes determines how the CPU accesses memory locations to be operated
upon. Addressing modes supported by the 68HC12 are summarized in Table 3.0.
Table 3.0
Prepared by :
Siti Sara Binti Rais
FKE UiTM Dungun
Page 4
4.0 PROCEDURE 1
1. Install all the software required by the experiment.
2. Write a program as Figure 4.0 in MiniIDE with comments, translate to the list file and
machine file.
TABLE1:
TABLE2:
VAR1:
TABLE3:
3. Load the machine file to the HC12SIM Simulator B32 Single Chip Mode, set PC to
$0900, clear all CCR and use step execution. Observe and fill the contents of the CPU
registers and memory in Appendix 1 Table 1 Procedure 1.
4. Write a discussion regarding to this procedure. (Hint: State type of addressing modes
that are using in Procedure 1 and explain them)
Prepared by :
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FKE UiTM Dungun
Page 5
4.1 QUESTION 1
Draw a table as illustrated in Table Q1 and show each instruction in Procedure 1 correspond to
the machine code. Determine its addressing mode.
Table Q1
Address of
memory
Machine code
Mnemonic
Addressing Mode
ORG $2000
Directive Assembler
$2000
CC 98 3E
LDD #$983E
Immediate Mode
$2003
O2
INY
Inherent Mode
END
Directive Assembler
5.0 PROCEDURE 2
1. Write a program as Figure 5.0 in MiniIDE with comments, translate to the list file and
machine file.
ORG $0800
LDAA 2,X
STAB -7,Y
LDAB -244,SP
STAA 100,PC
LDD B,Y
LDAA [15,X]
STAA 2,SPLDX 5,-SP
STAA 4,+SP
END
Figure 5.0
2. Load the machine file to the HC12SIM Student Mode, clear all CCR, and fill in the initial
data in CPU registers and memory as Table 5.0 and then use step execution.
Important! Before execute the instruction, set the content of CPU registers and
memory as Table 5.0. Observe the content of the CPU registers and memory step-bystep as same as Procedure 1. Fill in the Table 2 Procedure 2 in Appendix 1. Show only
the affected CPU registers and memory for each instruction.
Prepared by :
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FKE UiTM Dungun
Page 6
Table 5.0
CPU registers /
Initial value
Memory
A
73H
68H
IX
0900H
IY
09FFH
SP
0B00H
PC
0800H
$0902
A6H
$090F
09H
$0910
80H
$0980
BFH
$0A0C
E1H
$0AF9
3EH
$0AFA
8CH
3. Write a discussion regarding to this procedure. (Hint: State type of addressing modes
that are using in Procedure 1 and explain them)
Prepared by :
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FKE UiTM Dungun
Page 7
5.1 QUESTION 2
Draw a table as illustrated in Table Q2 and show each instruction in Procedure 2 correspond to
the machine code. Determine its addressing mode.
Table Q2
Address of
memory
Machine code
$0900
A6 43
Mnemonic
Addressing Mode
ORG $0900
Directive Assembler
LDAA 3,Y
Range of offset
-16 to 15
index addressing
(IDX)
$0902
6B E2 D11B
STAB -12005,X
16-bit offset
-32,768 to 32,767
constant inex
And 0 to 216-1
addressing (IDX2)
END
Directive Assembler
6.0 QUESTION 3
1. Write a program to load an immediate data to accumulator as following :
A =89, B = 65, X = 1000H, Y=2000H
2. Write a program to store a group of data in memory with starting address at $0900 as
Table 6.02.
Table 6.02
Address of
memory
Prepared by :
Siti Sara Binti Rais
FKE UiTM Dungun
Data/Content
$0900
85H
$0901
00H
$0902
00H
$0903
00H
$0904
00H
Page 8
$0905
DDH
$0906
AAH
3. Write a program to execute actions as Table 6.03, and then determine its addressing
mode.
Table 6.03
Instruction
Executions
number
0
Prepared by :
Siti Sara Binti Rais
FKE UiTM Dungun
Page 9
7.0 INSTRUCTIONS
Pre-lab:
1. Fill in the result table.
2. Before participating first lab session, please refer to the module Chapter 3 and learn how to
use MGTEK MiniIDE and simulator at home. You can also refer to sitisararais.blogspot.com
and open in Blendspace for further clarification.
Group works:
Your final report should be included:
1. Front page.
2. Programming:List file of your programming include comments as Figure 7.0.
Figure 7.0
3. Result table.
4. Discussion for each procedure.
5. Answer all the questions.
6. Conclusion of your experiments.
7. Submit before the dateline given.
8.0 REFERENCES
[1]
[2]
S. F. Barret and D. J. Pack. (2005). Embedded Systems : Design and Application with the
68HC12 and HCS12.
H.-W. Huang. (2009). Introduction to the 68HC12 Microcontroller.
Prepared by :
Siti Sara Binti Rais
FKE UiTM Dungun
Page 10
Appendix 1
Table 1 procedure 1
Address of memory
Data/content of memory
Before execution
dc.b 20,98,56,48
dc.w $3E,$F4
ds.w 5
Prepared by :
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FKE UiTM Dungun
Page 11
dc. l 25
CPU Register
SP
Before
execution
LDX #$20FF
INX
LDY #$10AA
INY
LDAA #$EE
LDAB #$CC
DECA
ABA
LDS $902
Prepared by :
Siti Sara Binti Rais
FKE UiTM Dungun
Page 12
Table 2 Procedure 2
Before execution
Instruction
CPU
register
Data in
CPU
Register
Address of
memory
After execution
Data in
CPU
memory register
Data in Address
Data in
CPU
of
memory
Register memory
LDAA 2,X
STAB -7,Y
LDAB -244,SP
STAA 100,PC
LDD B,Y
LDAA [15,X]
STAA 2,SP-
LDX 5,-SP
STAA 4,+SP
Prepared by :
Siti Sara Binti Rais
FKE UiTM Dungun
Page 13