THE UNIVERSITY OF THE WEST INDIES

ST. AUGUSTINE, TRINIDAD & TOBAGO, WEST INDIES

FACULTY OF ENGINEERING
Department of Electrical & Computer Engineering
BSc. in Electrical & Computer Engineering

ECNG 2004
Laboratory and Project Design 2
http://myelearning.sta.uwi.edu/
Semester I 2009/2010

INDIVIDUAL DESIGN PROJECT

GENERAL INFORMATION
Project Title:
Date Assigned:
Duration of Project:
Deliverables:

Design and Construction of a Series Pass Voltage

Regulator
Monday October 12, 2009
8 weeks
1. Design Project Report (hard and electronic copies)
2. Signed plagiarism declaration form included in report
3. Fabricated design project

Due Date of Report:

Practical Examination:

Friday December 4, 2009 @ 4pm

Date to be determined (Normally after all level 2, semester
1 written examinations)

Submission Procedure:

All reports are to be submitted to Mr. Brian Small in the

Electrical Stores.

Breakdown of Assessment

Design Project Report:

Practical Examination:

30%
20%

THE UNIVERSITY OF THE WEST INDIES

ST. AUGUSTINE, TRINIDAD & TOBAGO, WEST INDIES
FACULTY OF ENGINEERING
Department of Electrical & Computer Engineering
BSc. in Electrical & Computer Engineering

PROJECT LEARNING OUTCOMES

Upon successful completion of this assignment, students will be
able to:
1. Design and construction of a Series Pass Voltage Regulator to
design specifications.
2. Apply basic laboratory tools (software as well as hardware) and
a knowledge of the fundamental principles of electrical and
computer engineering to:
a. transducers and the associated instrumentation for
electrical measurement and display
b. thermal protection and mounting of power BJTs,
MOSFETs and IGBTs to the efficient design of
electronic systems.
3. Simulate and implement digital systems utilizing Xilinx and the
Spartan III FPGA Development Board.
4. Communicate effectively, conveying technical material through
a variety of media, such as written products and graphics and
crediting the origins of ideas and other intellectual property in
the solution of engineering problems.
5. Plan and realize engineering objectives as an individual and
approach engineering responsibly,
a. recognizing laboratory protocol
b. recognizing codes of practice
c. assessing and minimizing risks to workers and property
in the operational environment
d. observing occupational safety protocols
e. employing industry standards in the design process.
6. Employ an engineering approach to the design of engineering
systems.

Cognitive
Level
Application
Application

Application
Application

Application

Application

THE UNIVERSITY OF THE WEST INDIES

ST. AUGUSTINE, TRINIDAD & TOBAGO, WEST INDIES
FACULTY OF ENGINEERING
Department of Electrical & Computer Engineering
BSc. in Electrical & Computer Engineering

SCHEDULE
Week No.
6
7
8
9
10
11
12
13

Week Starting
12- Oct
19-Oct
26-Oct
02-Nov
09-Nov
16-Nov
23-Nov
30-Nov

Activity
Design Project Brief

Individual work on the Design Project and Project Support

Lectures

Submission of the Design Project Report

PROJECT DESCRIPTION
Design and construct a 9 V 0.3 V, 1 A, series pass voltage regulator from discrete
electronic components. The regulator must exhibit a voltage regulation of 5% or better
and must be fed by a dc input voltage from a laboratory power supply. In addition, the
regulator must incorporate temperature and over current sensing circuits which would
disconnect the load from the regulator, for temperatures and currents exceeding 40
degrees centigrade and 1 A respectively.
The output regulator voltage and current, together with the temperature of the series pass
transistor must be converted to digital format using A/D converters and displayed on the
Spartan 111 FPGA Development Board when selected. The following specifications must
be met for the display of the variables.
1. The units of all variables are to be displayed along with the respective reading.
2. The voltage is to be displayed to 1 decimal point.
3. The current is to be displayed to 2 decimal points.
4. The temperature is to be displayed as a whole number.
5. The display of the readings for voltage, current and temperature are to
automatically appear in a cyclic manner, with each reading being displayed for 5
seconds.
6. All leading zeros are to be suppressed.

THE UNIVERSITY OF THE WEST INDIES

ST. AUGUSTINE, TRINIDAD & TOBAGO, WEST INDIES
FACULTY OF ENGINEERING
Department of Electrical & Computer Engineering
BSc. in Electrical & Computer Engineering

ASSESSMENT RUBRIC
Assessment
Component
Report

Weight
30%
2%

8%

15%

5%

Practical
20%
Examination

Communication Quality of report; consistency; grammar and

spelling; organization of sections; captioning
of figures, tables and graphs; proper citation
of references
Understanding Account of the background theory and its
and
application
Comprehension Outline of the work to be done in the project,
clearly stating the project objectives
Design
Clearly delineated design process flow,
Approach and
justifying the selection of all components in
Methodology
particular the transducers and heating sinking
components.
Consideration of lab protocol, codes of
practice, risk assessment, occupational safety
protocols and industry standards in the design
process.
Results and
Simulated, calculated and practical results for
Analysis
the analog and digital subsystems are neatly
(also assessed
presented.
in the practical Detailed analysis of results
exam)
Justification that design specifications have
been met
Discussion of the limitations of the design
Recommendation for further work to be done
Explanation of the operation of the circuit; verification of
results and evaluation of the performance of the system
demonstrate that the design specifications have been met

REPORT FORMAT
Students are to adhere to the guidelines given in sections 12, 13 14 and Appendix 2 of the
document entitled Engineering Practice Handbook in writing their reports. This
document is available online through myeLearning.

THE UNIVERSITY OF THE WEST INDIES

ST. AUGUSTINE, TRINIDAD & TOBAGO, WEST INDIES
FACULTY OF ENGINEERING
Department of Electrical & Computer Engineering
BSc. in Electrical & Computer Engineering

PRACTICAL EXAMINATION
Each student will be examined on the design project together with other areas of the
course. The objective of the examination is to ensure that the student understands the
practical implementation of the subject areas covered and to verify the results given in the
Design Project Report.
Students must bring to the examination the fabricated circuit and necessary hand tools.
Students will be asked a series of questions and a mark will be given in accordance with
the response to the questions.
The duration of the examination will be one hour and it will be held immediately
following all ECNG Level 2, semester 1 written end-of-semester examinations.

PENALTIES
Reports submitted after the deadline date will be given a mark of zero, unless a valid
medical certificate is submitted.
Any student who fails to attend the practical examination will be given a mark of
zero, unless a valid medical certificate is submitted.
If no signed plagiarism declaration form is submitted, the report will be marked zero.