Escolar Documentos
Profissional Documentos
Cultura Documentos
A Project report Submitted in partial fulfillment of the requirements for the award of the
degree of
BACHELOR OF TECHNOLOGY
IN
ELECTRONICS AND COMMUNICATION ENGINEERING
BY
Batch No. : B14
M. SATYA NARAYANA
07G21A0482
SHAIK SEEMA
07G21A0483
B.REKHA RANI
07G21A0474
M.VENKATESULU
08G25A0408
2007-2011
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ABSTRACT
Out new Combat robot is pc operated , it has got two barrel turret through bullet
can be fired, pc camera in synchronization with the turret can rotate up and down ,left and
right up to a safe firing limit. turret and camera mechanism has been installed on spy
robot vehicle, which has all the function like tank, Turing to any angle on its axis, moving
forward and reverse turning left and right, running instantly into reverse direction.
This robot is radio operated and has all the controls like a normal car. A gun and laser
module has been installed on it, so that it can fire on enemy remotely when required,this
is not possible until a wireless camera is installed. Wireless camera will send real time
video and audio signals which could be seen on a remote monitor and action can be taken
accordingly. It can silently enter into enemy area and send us all the information through
its tiny camera eyes. It is designed for, fighting as well as suicide attack.
The heart of the project is the AT89S52 microcontroller which will be used for
controlling the vehicle. Camera is used to visualize the path and surroundings. The aim is
to use the readily available material to construct low cost prototype. L293D is used as
motor drivers controlled by microcontroller. The RF transmitter and receiver is used for
wireless communication between robot and the user.
INDEX
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TITLE
PAGE NO
Chapter 1: INTRODUCTION
1.2: Characteristics
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LIST OF FIGURES
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CHAPTER 1
INTRODUCTION
Being able to achieve reliable communication is an important open area of
research to robotics as well as other technology areas. As interest in robotics continuous
to grow, robots are increasingly being integrated in everyday life. The results of this
integration are end-users possessing less and less technical knowledge of the technology.
Here in this project we are going to use RF communication for remote accessing
of automated system. The main theme of this project is to create a smart robot for military
and surveillance purposes controlled using wireless communication. The microcontroller
we use in the project are AT89S52, at the robot. We use camera for visualizing the path
and identifying the surroundings and targets. For defending purpose we use gun and laser
to point out targets, which are mounted on the robot section.
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Embedded systems often reside in machines that are expected to run continuously
for years without errors, and in some cases recover by themselves if an error occurs.
Therefore the software is usually developed and tested more carefully than that for
personal computers, and unreliable mechanical moving parts such as disk drives,
switches or buttons are avoided.
Specific reliability issues may include
1.The system cannot safely be shut down for repair, or it is too inaccessible to repair.
Examples include space systems, undersea cables, navigational beacons, bore-hole
systems, and automobiles.
2.The system must be kept running for safety reasons. "Limp modes" are less tolerable.
Often backups are selected by an operator. Examples include aircraft navigation, reactor
control systems, safety-critical chemical factory controls, train signals, engines on singleengine aircraft.
3.The system will lose large amounts of money when shut down: Telephone switches,
factory controls, bridge and elevator controls, funds transfer and market making,
automated sales and service.
A variety of techniques are used, sometimes in combination, to recover from errors
both software bugs such as memory leaks, and also soft errors in the hardware:
watchdog timer that resets the computer unless the software periodically notifies the
watchdog
subsystems with redundant spares that can be switched over to
software "limp modes" that provide partial function
Designing with a Trusted Computing Base (TCB) architecture[6] ensures a highly secure
& reliable system environment
An Embedded Hypervisor is able to provide secure encapsulation for any subsystem
component, so that a compromised software component cannot interfere with other
subsystems, or privileged-level system software. This encapsulation keeps faults from
propagating from one subsystem to another, improving reliability. This may also allow a
subsystem to be automatically shut down and restarted on fault detection.
Immunity Aware Programming.
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CHAPTER 2
SCOPE OF PROJECT AND PROPOSED APPROACH
2.1 BLOCK DIAGRAM OF TRANSMITTER SECTION
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rectification the obtained rippled dc is filtered using a capacitor Filter. A positive voltage
regulator is used to regulate the obtained dc voltage of 12v.
2.2.1.1.2 Microcontroller:
The major heart of this project is AT89S52 microcontroller, the reasons why
we selected this in our project are: It is a high performance, low-power Atmel 8-bit
Microcontroller with 8Kbytes of In-System RAM 32 I/O lines, three 16-bit
timer/counters, a eight-vector two-level interrupt architecture, a full duplex serial port,
on-chip oscillator, and clock circuitry.
In addition, the AT89S52 is designed with static logic for operation down to zero
frequency and supports two software selectable power saving modes. The idle mode stops
the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to
continue functioning. The power down mode saves the RAM contents but freezes the
oscillator, disabling all other chip functions until the next hardware reset. The flash
program memory supports both parallel programming and in serial In-System
Programming (ISP). The 89S52 is also In-Application Programmable (IAP), allowing the
Flash program memory to be reconfigured even while the application is running.
.
2.2.1.1..3 Motor Drivers:
L293D is a dual H-Bridge motor driver. So with one IC, two DC motors can be
interfaced which can be controlled in both clockwise and counter clockwise directions
and its direction of motion can also be fixed. The four I/Os can be used to connect up to
four DC motors.
2.2.1.1..4 DC Motors:
Here, we use Five high efficiency, high quality, low cost DC motors with
gearbox for robotics applications. A motor consists of a rotor and a permanent magnetic
field stator. DC motors are most commonly used in variable speed and torque.
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CHAPTER 3
HARDWARE COMPONENT DESCRIPTION
3.1 HARDWARE COMPONENTS USED
Power supply
Microcontroller
RF communication
Motor driver
DC motor
Camera
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general purpose device, but one that is meant to read data, perform limited calculations
on that data and control its environment based those calculations.
The prime use of a microcontroller is to control the operation of a machine
using a fixed program that is stored in ROM and that does not change over the lifetime of
the system. The design approach of a microcontroller uses a more limited set of single
byte and double byte instructions that are used to move code and data from internal
memory to ALU. Many instructions are coupled with pins on the IC package; the pins are
capable of having several different functions depending on the wishes of the programmer.
The microcontroller is concerned with getting the data from and on to its own pins; the
architecture and instruction set are optimized to handle data in bit and byte size.
3.2.2.1INTRODUCTION TO MICROCONTROLLER (AT89S52):
The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller
with 8K bytes of in-system programmable Flash memory. The device is manufactured
using Atmels high-density non-volatile memory technology and is compatible with the
Industry standard 80C51 instruction set and pin out. The on-chip Flash allows the
program memory to be reprogrammed in-system or by a conventional non-volatile
memory programmer. By combining a versatile 8-bit CPU with in-system programmable
Flash on a monolithic chip, the Atmels AT89S52 is a powerful microcontroller which
provides a highly-flexible and cost-effective solution to many embedded control
application.
3.2.2.2FEATURES:
write/Erase Cycles
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Channel
Power-off Flag
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Supply voltage.
ground
17
PORT 0:
Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin
can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as
high-impedance inputs. Port 0 can also be configured to be the multiplexed low-order
address/data bus during accesses to external program and data memory. In this mode, P0
has internal pull-ups. Port 0 also receives the code bytes during Flash programming and
outputs the code bytes during program verification. External pull-ups are required during
program verification.
PORT 1:
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output
buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are
pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that
are externally being pulled low will source current (IIL) because of the internal pull-ups.
In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count
input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown
in the following table
PORT PIN
P1.0
ALTERNATE FUNCTIONS
T2 (external count input to Timer/Counter 2), clock-out
P1.1
direction control)
P1.5
P1.6
P1.7
PORT 2:
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output
buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are
pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that
are externally being pulled low will source current (IIL) because of the internal pull-ups.
Port 2 emits the high-order address byte during fetches from external program memory
and during accesses to external data memory that uses 16-bit addresses (MOVX @
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DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During
accesses to external data memories that use 8-bit addresses (MOVX @ RI), Port 2 emits
the contents of the P2 Special Function Register. Port 2 also receives the high-order
address bits and some control signals during Flash programming
PORT 3:
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3
output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they
are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins
that are externally being pulled low will source current (IIL) because of the pull-ups. Port
3 receives some control signals for Flash programming and verification. Port 3 also
serves the functions of various special features of the AT89S52, as shown in the
following table
P3.0 RXD (serial input port)
P3.1 - TXD (serial output port)
P3.2 INT0 (external interrupt 0)
P3.3 INT1 (external interrupt 1)
P3.4 T0 (timer 0 external input)
P3.5 T1 (timer 1 external input)
P3.6 WR (external data memory write strobe)
P3.7 RD (external data memory read strobe)
Port 3 also receives some control signals for Flash programming and verification.
RST: Reset input.
A high on this pin for two machine cycles while the oscillator is running resets
the device. This pin drives high for 96 oscillator periods after the watch dog times out.
ALE/PROG:
Address Latch Enable is an output pulse for latching the low byte of the
address during accesses to external memory. This pin is also the program pulse input
(PROG) during programming.
In normal operation, ALE is emitted at a constant rate of 1/6th the
oscillator frequency and may be used for external timing or clocking purposes. Note,
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however, that one ALE pulse is skipped during each access to external data memory. If
desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit
set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is
weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in
external execution mode.
PSEN:
Program Store Enable is the read strobe to external program memory. When
the AT89S52 is executing code from external program memory, PSEN is activated twice
each machine cycle, except that two PSEN activations are skipped during each access to
external data memory.
EA/VPP:
External Access Enable. EA must be strapped to GND in order to enable the
device to fetch code from external program memory locations starting at 0000H up to
FFFFH. However that if lock bit 1 is programmed, EA will be internally latched on reset.
EA should be strapped to VCC for internal program executions. This pin also then
receives 12-volt programming enable voltage (VPP) during Flash programming when 12volt Programming is selected.
XTAL1:
Input to the inverting oscillator amplifier and input to the internal clock
operating circuit.
XTAL2:
Output from the inverting oscillator amplifier.
3.2.2.4BLOCK DIAGRAM:
The AT89S52 is designed with static logic for operation down to zero
frequency and supports two software selectable power saving modes. The Idle Mode
stops the CPU while allowing the RAM; timer/counters, serial port, and interrupt system
to continue functioning. The Power-down mode saves the RAM contents but freezes the
oscillator disabling all other chip functions until the next hardware reset.
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Function
Accumulator
Arithmetic
DPH
DPL
IE
IP
Interrupt priority
P0
P1
P2
P3
PCON
Power control
PSW
SCON
SBUF
SP
Stack pointer
TMOD
TCON
Timer/counter control
TL0
TH0
TL1
TH1
3.2.2.6INTERRUPTS:
A computer program has only two ways to determine the condition that exist
in Internal and external circuits. One method uses software instructions that jump to
Subroutines on the states of flags and port pins. The second method responds to hardware
Signals, called interrupts that force the program to call a subroutine. Software techniques
use processor time that could be devoted to other tasks, interrupts take processor time
only when action by the program is needed. Most applications of microcontrollers
involve responding to events quickly enough to control the environment that generates
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the events. Interrupts are often the only way in which real time programming can be done
successfully.
Interrupts may be generated by internal chip operations or provided by
external Sources. Any interrupt can cause the microcontroller to perform a hardware call
to an Interrupt handling sub-routine that is located at a predetermine absolute address in
Program memory.8 interrupts are provided in 89s52.Three of these are generated
automatically by internal operations: timer flag 0, timer flag1 and the serial port.
The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and
INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. Each of
these interrupt sources can be individually enabled or disabled by setting or clearing a bit
in Special Function Register IE. IE also contains a global disable bit, EA, which disables
all interrupts at once.
All interrupt functions are under the control of the program. The
programmer is able to alter the control bits in the Interrupt Enable register (IE), the
Interrupt Priority register (IP), and the Timer Control register (TCON). The program can
block all or any combination of the interrupts from acting on the program by suitably
setting or clearing bits in these registers.
After the interrupt has been handled by the interrupt subroutine, which is
placed by the programmer at the interrupt location in the program memory, the
interrupted program must resume operation at the instruction where the interrupt took
place. Program resumption is done by storing the interrupted PC address on the stack in
RAM before changing the PC to the interrupt address in ROM. The PC address will be
restored from the stack after an RET1 instruction is executed at the end of the interrupt
subroutine.
Timer flag interrupt:
When a timer /counter overflows the corresponding timer flag TF0 or TF1 is
set to 1. The flag is cleared to 0 when the resulting interrupt generates a program call to
the appropriate timer subroutine in memory.
Serial port interrupt:
If a data byte is received, an interrupt bit. RI is set to 1 in the SCON register.
When a data byte has been transmitted an interrupt bit, T1, is set in SCON. These are
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ORed together to provide a single interrupt to the processor which is the serial port
interrupt. These bits are not cleared when the interrupt generated program call is made by
the processor. The program that handles serial data communication must reset R1 or T1 to
0 to enable the next data communication operation.
External interrupts:
Pins INT0 and INT1 are used by external circuitry. Inputs on these pins can
set the interrupt flags IE0 and IE1 in the TCON register to 1 by two different methods.
The IEX flags may be set when the INTX pin signal reaches a low level, or the flags may
be set when a high to low transition takes place on the INTX pin. Bits IT0 and IT1 in
TCON program the INTX pins for low level interrupt when set to 0 and program the
INTX pins for transition interrupt when set to 1.
Flags IEX will be reset when a transition generated interrupt is accepted by the
processor and the interrupt subroutine is accessed. It is the responsibility of the system
designer and programmer to reset any level generated external interrupts when they are
serviced by the program. The external circuit must remove the low level before an RET1
is executed. Failure to remove the low will result in an immediate interrupt after RET1,
from the same source.
RESET:
A reset can be considered to be the ultimate interrupt because the program
may not block the action of the voltage on the RST pin. This type of interrupt is often
called non-makeable, because no combination of bits in any register can stop, or mask,
the reset action. Unlike other interrupts, the PC is not stored for later program
resumption. A reset is an absolute command to jump to program address 0000h and
commence running from there. Whenever a high level is applied to the RST pin, the
micro controller enters a reset condition. Internal RAM contents may change during reset.
Also the states of the internal RAM bytes when power is first applied to micro controller
are random. Register bank-0 is selected on reset as all bits in PSW are 0.
INTERRUPT CONTROL:
The program must be able, at critical times, to inhibit the action of some or
all of the interrupts so that critical operations can be finished. The IE register holds the
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programmable bits that can enable or disable all the interrupts as a group, or if the group
is enabled, each individual interrupt source can be enabled or disabled.
It is desirable to be able to set priorities among competing interrupts that
may conceivably occur simultaneously. The IP register bits may be set by the program to
assign the priorities among various interrupt sources so that more important interrupts can
be serviced first should be two or more interrupts occur at the same time.
INTERRUPT ENABLE/DISABLE:
Bits in the IE register are set to 1 if the corresponding interrupt source is to
be enabled and set to 0 to disable the interrupt source. Bit EA is the master, or global bit
that can enable or disable all the interrupts.
INTERRUPT PRIORITY:
Register IP bits determine if any interrupt is to have a high or low priority.
Bits set to 1 give the accompanying interrupt a high priority; 0 assigns a low priority.
Interrupts with a high priority can interrupt another interrupt with a low priority. The low
priority interrupt continues after the higher is finished.
SOFTWARE GENERATED INTERRUPTS:
When any interrupt flag is set to 1 by any means, an interrupt is generated
unless blocked. This means that the program itself can cause interrupts of any kind to be
generated simply by setting the desired interrupt flag to 1using a program instruction
PROGRAM COUNTER AND DATA POINTER:
The AT89S52 contains two 16-bit registers, the program counter (PC) and
the data pointer (DPTR). Each is used to hold the address of a byte in memory. Program
instructions bytes are fetched from locations in memory that are addressed by the PC.
Program ROM may be on the chip at addresses 0000h to 0FFFh, external to the chip for
addresses that exceed 0FFFh, or totally external for all addresses from 0000h to FFFFh.
The PC is automatically incremented after every instruction byte is fetched and may also
be altered by certain instructions. The PC is the only register that does not have an
internal address.
The DPTR register is made up of two 8-bit registers, named DPH and
DPL, which are used to furnish memory addresses for internal and external code access
and external data access. The DPTR is under the control of program instructions and can
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be specified by its 16-bit name, DPTR, or by each individual byte name, DPH and DPL.
DPTR does not have a single internal address; DPH and DPL are each assigned an
address.
A AND B CPU REGISTERS:
AT89S52 contains 34 general purpose, or working registers. Two of these
registers A and B, hold results of many instructions, particularly math and logical
operations, of the 8052 central processing unit. The other 32 are arranged as part of
internal RAM in four banks, B-0 to B-3 of 8 registers and comprise the mathematical
core.
The A (accumulator) register is the most versatile of the two CPU registers
and is used for many operations, including addition, subtraction, integer multiplication
and division, and Boolean bit manipulations. The A register is also used for all data
transfers between the 8052 and any external memory. The B register is used with the A
register for multiplication and division operations and has no other function other than as
a location where data may be stored.
FLAGS AND THE PROGRAM STATUS WORD (PSW):
Flags are 1-bit registers provided to store the results of certain program
instructions. Other instructions can test the condition of the flags and make decisions
based on the flag states. In order that the flags may be conveniently addresses, they are
grouped inside the program status word (PSW) and the power control (PCON) registers.
The AT89S52 has 4 math flags that respond automatically to the outcomes of math
operations and 3 general purpose user flags that can be set to 1 or cleared to 0 by the
programmer as desired. The math flags include carry (C), auxiliary carry (AC), overflow
(OV) and parity (P). User flags are named F0, GF0 and GF1. They are general purpose
flags that may be used by the programmer to record some event in the program. However
math flags are also affected by the math operations.
The PSW contains the math flags, user program flag(F0) and the register
select bits that identify which of the four general purpose register banks is currently used
by the program. The remaining 2 user flags, GF0 and GF1 are stored in PCON.
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byte is read from the stack, and then the SP decrements to point to the next available byte
of stored data.
The SP is set to 07h when the micro controller is reset and can be changed
to any internal RAM address by the programmer, using a data move command. The stack
is normally placed high in internal RAM, by an appropriate choice of the number placed
in SP register, to avoid conflict with the register, bit and scratch pad internal RAM areas.
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by a hardware reset, the device normally resumes program execution from where it left
off, up to two machine cycles before the internal reset algorithm takes control.
On-chip hardware inhibits access to internal RAM in this event, but
access to the port pins is not inhibited. To eliminate the possibility of an unexpected write
to a port pin when idle mode is terminated by a reset, the instruction following the one
that invokes idle mode should not write to a port pin or to external memory.
POWER-DOWN MODE:
In the power-down mode, the oscillator is stopped, and the instruction
that invokes power-down is the last instruction executed. The on-chip RAM and Special
Function Registers retain their values until the power-down mode is terminated. The only
exit from power-down is a hardware reset. Reset redefines the SFRs but does not change
the on-chip RAM. The reset should not be activated before VCC is restored to its normal
operating level and must be held active long enough to allow the oscillator to restart and
stabilize.
3.2.2.8ADDRESSING MODES:
The CPU can access data in various ways. The data could be in a register
or in memory or to be provided as an immediate value. The various ways of accessing
data are called addressing modes.
The various ways of the addressing modes of a microprocessor are determined when
designed and therefore cant be changed by the programmer. The 89S52 provides a total
of 5 addressing modes. They are as follows:
1. Immediate addressing mode:
In this addressing mode the source operand is a constant. In this mode the
operand comes immediately after the opcode. The immediate data must be preceded by
# sign. This mode can be used to load information into any of the registers.
Ex. Mov ro, #5h
2. Register addressing mode:
This mode involves the use of the registers to hold the data to be
executed. It should be noted that the source and the destination registers must match in
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size. We can move data between register and accumulator but movement of data between
registers is not possible.
3. Direct addressing mode:
In this mode the data is in a RAM memory location whose address is
known and this address is given as a part of the instruction. We can use direct or indirect
addressing modes to access data stored either in the RAM or registers of the 89S52.
4. Register indirect addressing mode:
In this addressing mode a register is used as a pointer to the data. If the data
is inside the CPU, only the registers R0 and R1 are used for the purpose. In other words
R2-R7 cannot be used to hold the address of an operand located in RAM.
: -55 oC to +125 o C
Storage temperature
: -65 oC to +150 oC
: -1.0V to +7.0V
: 6.6V
DC output current
: 15.0mA
Stresses beyond the absolute maximum ratings may cause permanent
damage to the device. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
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3.2.3 RF communication
The TWS-434 and RWS-434 are extremely small, and are excellent for applications
requiring short-range RF remote controls. The transmitter module is only 1/3 the size of
a standard postage stamp, and can easily be placed inside a small plastic enclosure.
TWS-434:
The transmitter output is up to 8mW at 433.92MHz with a range of
approximately 400 foot (open area) outdoors. Indoors, the range is approximately 200
foot, and will go through most walls.
The TWS-434 transmitter accepts both linear and digital inputs, can operate
from 1.5 to 12 Volts-DC, and makes building a miniature hand-held RF transmitter very
easy. The TWS-434 is approximately the size of a standard postage stamp.
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RWS-434: The receiver also operates at 433.92MHz, and has a sensitivity of 3uV.
The RWS-434 receiver operates from 4.5 to 5.5 volts-DC, and has both linear and digital
outputs.
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The 433 MHZ ASK transmitter and receivers are extremely small, and are
excellent for applications requiring short-range RF remote controls. The transmitter
module is only 1/3rd the size of a standard postage stamp, and can easily be placed inside
a small plastic enclosure. The transmitter output is up to 8mW at 433.92MHz. The
transmitter accepts both linear and digital inputs and can operate from 1.5 to 12 VoltsDC, and makes building a miniature hand-held RF transmitter very easy. The 433 MHZ
ASK transmitters is approximately the size of a standard postage stamp 433 MHZ ASK
receivers also operate at 433.92MHz, and have a sensitivity of 3uV. The receiver
operates from 4.5 to 5.5 volts-DC.
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The following schematic shows how to connect the L293 to our motor and the
Stamp. Each motor takes 3 Stamp pins. If we are using only one motor, then we leave
pins 9, 10, 11, 12, 13, 14, and 15 empty.
DIRA
DIRB
Function
Turn right
Turn left
L/H
L/H
Fast stop
Either
either
Slow stop
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41
Left Motor
Right Motor
Straight
Stop
Reverse
Straight
Straight
Reverse
Straight
Straight
Straight
Stop
Reverse
Reverse
Robot
Movement
Straight
Left
Sharp Left
Right
Sharp Right
Reverse
5kgcm torque
125gm weight
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CHAPTER 4
WORKING
In the first step the robot section is initialized by giving power supply, where It
basically consists of a transformer to step down the 230V ac to 5V/12V ac. The
rectifier converts ac to dc and the regulator eliminates ripple by setting DC output to a
fixed voltage. The operating voltage of microcontroller, DTMF receiver, ULN2003 is
5V and for motor is 12V.
In second step the transmitter section and camera section is supplied by 9V DC
power supply by using battery.
In third step the robot section has given commands by using switches in
transmitter section, where corresponding action is done accordingly to the predefined
instructions dumped in the microcontroller, by pressing a particular switch in the
transmitter section remote accordingly particular action is done by microcontroller by
commanding respective devices which are connected to it according to the dumped
code and as a result respective action is shown by robot section
By watching through monitor we can control the robot through remote this is
possible unless a wireless camera is mounted. the camera here we used will send audio
and video signals to us, so that we can easily visualize the path and identifying the
surroundings and targets.
By using laser module we can easily aim the target by visualize through
camera and can fire on the target by using gun.
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CHAPTER 5
SOFTWARE DESCRIPTION
5.1Software
5.2 Source code
CHAPTER 6
IMPLEMENTATION
CHAPTER 7
RESULT ANALYSIS
CHAPTER 8
CONCLUSION AND FUTURE SCOPE
CONCLUSION:
The project SMART ARMED ROBOT FOR MILITARY APPLICATION has
been successfully designed and tested. Integrating features of all the hardware
components used have developed it. Presence of every module has been reasoned out and
placed carefully thus contributing to the best working of the unit. Secondly, using highly
advanced ICs and with the help of growing technology the project has been successfully
implemented. With regards to the requirements gathered the manual work and the
complexity in having manual surveillance and security in all desirable places can be
achieved with the help of electronic devices without having primary human loss in case
of defense.
FUTURE SCOPE:
Robot Ants, James McLurkin invented Micro Robots that work together as a
Community.
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BIBILIOGRAPHY
REFERENCES
1. "The 8051 Microcontroller Architecture, Programming & Applications"
-- by Kenneth J Ayala.
2. "The 8051 Microcontroller & Embedded Systems"
-- by Mohammed Ali Mazidi & Janice Gillispie Mazidi.
3. "Power Electronics
-- by M.D. Singh and K.B. Khanchandan.
4. "Linear Integrated Circuits
-- by D. Roy Choudary & Shail Jain.
5. "Electrical Machines
-- by S K Bhattacharya.
WEB SITES
1.
2.
3.
4.
WWW.MITEL.DATABOOK.COM
WWW.ATMEL.DATABOOK.COM
WWW.FRANKLIN.COM
WWW.KEIL.COM
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