Escolar Documentos
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(VLSI)
Lecture 9
Content
Packaging
Input/Output pads
Overall organization
VDD and VSS pads
Output Pads
Input pads
Tristate and Bidirectional Pads
Dr. Ahmed H. Madian-VLSI
Packages
Package functions
Package Types
Chip-to-Package Bonding
Traditionally, chip is
surrounded by pad frame
Package Parasitics
Inductance, IDD
Package
Signal Pads
Signal Pins
Chip
V DD
Bond W ire
Lead Fram e
Board
V DD
Package
Capacitor
Chip
Chip
GND
Board
GND
Heat Dissipation
Power Distribution
content
Input/Output pads
Overall organization
VDD and VSS pads
Output Pads
Input pads
Tristate and Bidirectional Pads
10
I/O pads
11
12
pitch
Pad size
I/O circuitry
13
Core-limited
Pad-limited
14
Core limited
15
PAD limited
I/O circuitry
16
I/O pads
17
18
Output Pads
19
I/O pads
20
Input Pads
VDDH
Level conversion
Higher or lower off-chip V
Noise filtering
Schmitt trigger
Hysteresis changes VIH, VIL
VDDL
A
VDDL
weak
Y
Y
weak
21
I/O pads
NAND
Dout
En
Dout
NOR
Current limiting
resistor
22
Clock pads
CLK
CLK
CLK
CLK
CLK
CLK
Dr. Ahmed H. Madian-VLSI
23
to synchronize the
internal clock of a chip
with an external clock
to operate the internal
clock at a higher rate
than the external clock
input
CLK
in
ref
CLK
GLB
CLK
PLL
FF
Feedback
CLK
FF
CLK distribution
24
Bidirectional Pads
NAND
Dout
Y
En
Dout
NOR
25
Analog Pads
No buffering
Protection circuits must not distort voltages
26
Quiz 2
27