Experiment No: 10

Date:
MOSFET (Field Effect Transistor)
NMOS Measurements and Characterization

Aim:
1. To understand the operation of the MOSFET
2. To measure the I-V characteristics and to determine the transistor threshold voltage Vt
Apparatus:
MOSFET (MC14007B), Bread board, DC Supply, Multimeter, Capacitor (0.1F), connecting
wires.
Theory:

Co
The central region of the figure is called channel and is made of p-type substrate for NMOSFET device. The other two portions that are laid symmetrically in most cases, are source
and drain that are made of n type semiconductors. Since they are equivalent, it makes no
difference which one we denote as drain or source. The gate oxide which is usually made of SiO 2
insulates the gate terminal from the substrate and that is why the MOSFET is also called IGFET.
If we start with all voltages grounded and apply a positive voltage at gate (VGS), an electric field
is created. This forces electrons move towards the gate oxide pushing out holes. Since the gate
oxide is an insulator, electrons cannot pass through for a voltage that is less than some threshold
and form an electric field known as the Inversion Layer which connects the drain and source
and closes the electric circuit. Electric current can now flow from in between source and drain
and moreover drain (or source) can supply more electrons.

Depending on the values of VDS and VBS the inversion layer changes its shape since
electrons tend to stick to a positive source. Once the voltage on drain is smaller than some
defined threshold voltage, the shape of the inversion layer is rectangular and the device is called
to be in the linear mode. If we continue increasing the drain voltage above the threshold voltage,
the shape of the inversion layer changes and becomes triangular. The device with a triangular
inversion layer is called to be in a saturation (also called pinch off) operation mode. The current
gain capability of a Field-Effect-Transistor (FET) is easily explained by the fact that no gate
current is required to maintain the inversion layer and the resulting current between drain and
source. The device has therefore an infinite current gain in DC. The voltage gain of the MOSFET
is caused by the fact that the current saturates at higher drain-source voltages, so that a small
drain current variation can cause a large drain voltage variation. Value of drain current I DS
depends on the values of VGS, VDS, and VBS and other parameters of the transistor that correspond
to the physical reality such as substrate doping, oxide thickness, gate dimensions, threshold
voltages, etc.
MC14007B MOSFET Array
The MC14007B MOSFET array that contains three NMOS and three PMOS transistors
as shown in Figure. The key point to remember when using this array is that the substrate of the
NMOS (bulk connection) is connected to pin 7 and should always be connected to the most
negative supply voltage. Pin 14 is the substrate of the PMOS and must be connected to the
most positive supply voltage in the circuit!

Fig.1 The MC14007B MOSFET array.

Note: Pin 7 is connected to the substrate of the NMOS and should be connected to the most
negative voltage of the circuit; pin14 is the bulk of the PMOS and should be connected to the
most positive voltage in the circuit.

Precaution when handling MOSFETs

MOSFET transistors are easily damaged, mainly as a result of static discharge at the
gate terminal. For that reason, one should handle MOSFETs with care and not touch the
pins of the package. In many cases one uses a ground strap to ground oneself when
handling MOSFETs.
Procedure:
1. ID-VGS characteristics and determination of Vt

Fig- 2

Vgs=Vds
Volts

1.5

2.5

4.5

5.5

ID mA

a.

Build the circuit of Figure 1. You can use any of the three NMOS transistors of
the MC14007B array. The node numbers given on the schematic assume that you
use the transistor between the pins 3, 4 and 5. Do not forget to connect the
substrate pin 7 to the ground. Place a 0.1 microfarad capacitor between Pin 14 and
the ground. Notice that the transistor is always in saturation since VGS= VDS or VGS
- Vt < VDS.

b.

Vary the gate voltage (VGS= VDS) from 0 to 6V in steps of 1V and record the
corresponding drain current ID.

c.

For the report: Plot the ID-VGS graph. Find the threshold voltage Vt (the
intersection with the horizontal axis.

Observation Table:

1. ID - VDS characteristics and determination of the output resistance ro

The objective of the following experiment is to measure the output characteristics of the
NMOS transistor: ID-VDS with VGS as a parameter. From this graph you will be able to
determine the output resistor ro

Fig -3

a.

Build the circuit of Figure 2. Use the same transistor as you used for the previous
experiment.

b.

Keep the gate voltage constant at 3V and measure the drain current while varying
the drain voltage from 0, 0.5, 1.0, 1.5, 2, 4, 6, 8 to 10V.

c.

Do the same for a gate voltage VGS of 5V.

d.

For your report: Plot the two curves on the same graph. Determine the output
resistance ro (i.e. the inverse of the slope of the graphs) at a drain voltage of 5V
for each graph. Notice that the output resistance decreases with current.

Observation Table:
VDS Volts
ID (VGS 3V)
mA
ID (VGS 5V)
mA

0.5

1.5

10

Result: