[1] MOSFET Basics

The voltage between two terminals of the MOSFET controls the current
flow in the third terminal. The MOSFET can be used both as an amplifier
and as a switch.
The MOSFET has three terminals, namely the drain D , the source S
and the gate G .
The MOSFET is voltage-controlled for switching on and off.
Examples of the uses of MOSFET in power electronic circuits are in
switched mode power supplies.

1. Structure and symbol

Gate (G )

Source (S )

Drain(D )
D

Oxide( SiO2 )

Metal

channel
region

L
p type substrate

Body (B )

2. Type of MOSFET
planar, lateral, vertical.
depletion mode (normally on), enhancement mode. (normally
off)
n-channel, p-channel.

3. Operation in the triode or linear region

VGS
G
D

n channel

depletion region

p type substrate

(1) Operation with no gate voltage

With no bias voltage applied to the gate, to back-to-back diodes prevent
current conduction from drain to source.

(2) Creating a channel for current flow ( VGS > VT , V DS =0)

Positive voltage on gate cause the hole to be repelled from
the region of the substrate under the gate and then will leave
behind a carrier depletion region.
The positive gate voltage attracts electrons from the n
source and drain.
VGS increase, the depletion region widens, to create what is
called on n-channel.( VGS > VT , VT : Threshold voltage)
VT : the minimum VGS necessary to create an induced
channel (13V)
Electron can flow in this path with very low resistance.
The gate and body of the MOSFET form a parallel plate
capacitor with oxide layer acting as the capacitor dielectric.

(3) VGS > VT , V DS is increased

VG S

iS iD

iD

G
iG 0

VD S

depletion region

n - channel

p - type substrate

Having induced a channel, we apply a positive voltage V DS .

The voltage V DS causes a current i D to flow through the
induced channel. For VGS = VT , the channel is just induced and
the current conducted is small.
As VGS exceeds, more electrons are attracted into the channel.
The vertical electric field controls the amount of carrier.
Channel length modulation.
VDS VGS VT

source

drain

larger VDS

channel

pinch - off

VD S 0

4. I-V characteristics

iD
G
VS

saturation (ii )
rehion

ohmic
rehion
(iii )

RG

SW

VGS VT

RL V L
VG

cut - off
region (i )

BV DSS

VDS

Region(i) : cut-off region.

Switch is open, the MOSFET is off and a small leakage
current is the response to a forward bias voltage at the drain.
The cut-off region exists as long as VGS <VGS (TH ) and
this conduction hold for any value of drain voltage V DS
until the avalanche breakdown voltage BV DSS is reached.

Region(ii) : saturation region.

The usual operation of the MOSFET as a transistor
amplifier.
Power losses(= V DS * i D ) can be large, so in steady-state
switching operation this is avoided.

Region(iii) : ohmic region, linear or triode region.

MOSFET switch is the on-state.
Low drain-to-source resistance. ( R DS (ON ) )
iD
VGS VT 8V
slope

VGS VT 6V

1
R DS ( ON )

VGS VT 4V

VGS VT 2V
VGS VT

V DS

[2]Power MOSFET
The planar type MOSFET has a large

R DS (ON ) ,

narrow channel, so it

resistance is relatively high and its on-state voltage drop is high.

not suitable for power switching
A MOSFET design that is good for power switch is the Vertical-Diffused
MOSFET. (VDMOS)
Source

partial
short

Gate
SiO 2

channel
length

p(body)

iD
n
Drain

There are many cells in parallel both to give a high current capability and
to provide short current path for low resistance and a small voltage drop
while the device is switched on.
The vertical structure offers
1) A small R DS (ON )
2) Large blocking voltage
3) Large cross sectional area
4) Large dv dt capability

1. The two parasitic devices

Gate

Source

Gate

partial
short

Integral
diode

npn

Parasitic BJT

Rb

E
npn

Integral Diode

n
D

Drain
Within this structure two other device can be recognized, namely on
npn junction transistor, and pn diode. Both of these devices are parasitic
and have external terminals D and S .
npn structure between the drain D and source S has the form a BJT
.
The base B of BJT is unconnected, however during turn-off the
MOSFET can have a high dv dt applied across D and S .
This dv dt is shared across DB and BS .
High V BS would turn on the BJT .
BJT prevention
A small region of the p-type body region is designed to have a
partial short-circuit to the source-contact.
( # The partial short presents a low resistance between the source and
Base and prevents the accidental turn-on of the internal BJT)
This path has a low resistance shown as Rb .
A small V BS cannot rise to a high enough value to turn on the BJT
and then BJT can be ignored.
Between S and D, there is a parasitic pin diode
No ready means for elimination.
The MOSFET can never block a voltage that is positive at
the source with respect to the drain.

Disadvantage of no reverse blocking

Advantage of fast recovery time during the transition
on-state and off-state.
Optimizing the performance of this integral diode.

*** I-V characteristics

C

iD

ID

ohmic
region

pinch off
ohmic
region
VGS 4
active region
VGS 3

active region

ID

avalanche
breakdown

VGS 2

slope G I D / VGS VT

VGS 1

cutoff

VGS VGS (TH )

C

VT

VGS

vGS

BVDSS V DS

cutoff

2. Parasitic capacitors
Gate

Source

C gd

partial
short

n
p

Cds

C gd

Body
region

n
p

Drift region

C ds
n

C gs

C gs

Source
SiO2

Substrate

S
Drain

iD

RD

3. Modeling of MOSFET
RG

VG

ig
VGS

VD S

VD

4. Switching operating
Switching with a resistive load

1) Turn-on time
VG

VGS

ig

overdrive

VG S(T H )

V DS

iD

I D V D /( RD R DS ( ON ) )

VD
td

t d Dealy time
t on Turn - on time

t ri
t on
tc

t ri Rise time
t c Crossover time

To insure the operation in the deep ohmic region, the VGS should be
sufficiently larger than the VT RDS (ON ) is small

2) Turn-off time

VGS

VG

overdrive

VGS (TH )

t
VD S

ID

I D V D /( RD S( O N ) )

ID

td

t d Delay time

t o n T u r n- o n tim e

t ri

t on
tc
t ri R isetim e
t c Crossovertime

Switching with a inductive load

iD

VDS

iL
VGS

VG
VS

R
DFW

VDFW

RG

iDFW

1) Turn- on time
VG S

VG

V 'GS

VG S

overdrive

t
iDFW

iD

iL

t
VDS

VD FW

VS

VDFW
t1

t2

VDS
t3

t4

t5

* 0 < t < t1
MOSFET : cut off ( V DS = V DS , i D =0)
Diode : on ( iDFW = i L , VDFW )
* t = t1 ( VGS =VGS (TH ) )
MOSFET: cut-off active region
* t1 < t < t2
MOSFET : active region i D = G(VGS VGS (TH ) )
Diode : on, but iDFW decreasing
* t = t2

=0, and the diode turn-off, i D = i L

*t2 < t < t3
VGS is clamped at VGS + V 'GS (t=t2)
V 'GS = i L / G VGS (TH ) ( i L G (VGS VGS (TH ) ) )
V DS is decreasing
dVDS / dt d (V DG VGS ) / dt = iG / C GD
= ((VG V 'GS ) / RG ) (1 / CGD ) = constant
*t=t3
C GD increases suddenly due to the reduced V DS
*t3 < t < t4
VGS = V 'GS
iD FW

dV DS / dt ((VG V 'GS ) / RG ) (1 / CGD )

*t = t4
The MOSFET moves to the ohmic region
*t4 < t < t5
The Gate voltage becomes unclamped and rises to VG

2) Turn-off time
VG

VG S
V 'GS

overdrive

VG S(T H )

t
VDFW

VDS

VS

iD

i DFW

iL

3. MOSFET protection

1) Overvoltage cause breakdown in both pn junction and oxide junction

- Protections

(a)

(b)

a) Voltage arrester : A nonlinear resistor whose value decrease with voltage

b) Zener diode : limit to gate voltage

2) Overcurrents result in excessive increase in junction temperature

- Protection to overcurrent : Current sensing and shuting-off the gate signal

4.Safe Operating Area(SOA)

1) Switching trajectory Operating point path
IQ

Trun off

Trun on

VQ

2) SOA

IQ
Temperature limit

SOA
Second breakdown

VQ

Second breakdown : A mysterious failure in BJTs when both the voltage

and currents are high, collector-emitter voltage in a localized of CB
junction collapse suddenly increasing the collector current drastically
(Hot spot, negative temperature coefficient on state resistance)
Second breakdown of Power MOSFET
- Dont occur because MOSFET have positive temperature coefficient of
the resistance and this prevents current focusing(negative feedback)

3) Relation SOA and Load

IQ
Inductive switching
1ms pulse
10ms pulse

DC
VQ

Power MOSFET
and
gate drive circuits

: 04-08-02
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