1.

What is the minimum number of bits required to encode the decimal digits 0 through
9? Justify your answer.

2.
3.
4.

5.
6.
7.
8.
9.

Find the decimal equivalent of the binary number (1101101)2

What is meant by natural BCD code?
Represent the hexadecimal number (B65F)16 in powers of 16 & find its decimal
equivalent.
Find the 2s complement of the binary number (1011001)2.
Convert the decimal number 345 to binary number.
Find the octal equivalent of the decimal number (0.6875)10.
Why binary number system is used in digital systems?
Specify the radix and the symbols used in ternary, quinary and hexadecimal number

16.

systems.
Find the hexadecimal equivalent of the binary number (10001101011.11110)2
What are the methods used to represent negative numbers in digital systems?
Which codes are called as self complementing code?
Convert the hexadecimal number (A72E)16 into octal number.
Define sign-magnitude representation of numbers.
Which is the most commonly used code for representing alphanumeric information?
What is meant by register?

17.

List out the basic rules for binary addition.

10.
11.
12.
13.
14.
15.

18.
19.
20.

Why is a hexadecimal number system called as an alphanumeric number system?

What is meant by a non-weighted code? Give examples of non-weighted codes.
Mention the types and uses of complements in a number system.
Explain the theorems of Boolean

algebra
1. Simplify the Boolean function.
(i)F(x,y,z) = (3,4,6,7) (ii)F(x,y,z) = (0,2,4,5,6)
(iii)F(x,y,z) = (0,1,2,4,5,6,8,9,12,13,14)
2. a).Convert the following binary numbers into gray code: i) 011010111101, ii)
111010101110 iii) 0110100010101
b).Write the following numbers in excess-3 code: i) 28, ii) 396 iii) 403
3. Explain the logic gates with neat diagram.
4. (a)Implement the Boolean function with NAND gates F=AB+CD+E
(b)Prove that NOR gate is an universal gate. Also, prove the same for NAND gate.
5. Draw the 2 level OR AND Network F = (C+D) (A' +B C) ( C' +D') ( A+B+ C' )
6. Simplify the logic function of using the Quine Mc cluskey minimization technique
Y=(A,B,C,D)= m(0,1,3,7,8,9,11,15)

8.a) Find the 9s and the 10s complement of the following decimal number:
i) 98127634 ii) 72049900
b) Obtain the 1s and 2s complement of the following binary numbers :i) (11101010)
ii)(01101110)
9. Simplify the given function by using K- map technique and draw the equivalent
diagram for the output function by using logic gates.
i) F(A,B,C,D) = m(0,1,2,4,5,6,8,9,12,13,14)
ii) F (A,B,C,D) = BC' D+ A'BCD + B'CD' + A'B'C'D' + AC'D
10. Convert the following numbers with the indicated bases to decimal number
(4310)5 , (198)12
i)
(10110.0101)2 ,(16.5)16 and (26.24)8
ii)

1. What is combinational circuit? Give some examples.

2. Give the expression for borrow and difference in full subtractor.
3. Draw the logical diagram of a half adder.
4. Give the truth table of a full adder.
5. Write the output expressions for half subtractor.
6. Give the logical expression for sum and carry of a half adder.
7. What is meant by binary multiplier?
8. Draw the logic Symbol and construct the truth table for the two input EX OR gate.
9. What is code converter?
10. Define Encoder.
11. List the applications of multiplexers.
12. Define multiplexer.
13. Mention the difference between a DEMUX and a MUX.
14. What do you meant by comparator?
15. Compare a decoder with a demultiplexer.
16. List the various modelling techniques used in HDL for combinational circuit design.
17. What is meant by priority encoder?
18. Write the data flow description of a 2-to-4-line decoder by using HDL.

19. Define three state gates.

20. What is VHDL.
PART-B
1. a) Design a combinational circuit with three inputs and one output. The output is 1
when the binary value of the input is less than 3. The output is 0 otherwise.
b) Give the design procedure of combinational circuit.
2. Design a code converter circuit, which converts BCD to Excess-3 code.
3. Illustrate the design and functioning of a half adder and full adder combinational
circuit.
4. Design a half and full subtractor circuit with inputs x and y and outputs D and B
.Implement the output expression by using digital logic gates.
5. Describe the Magnitude Comparator in detail.
6. Design a 2-to-4-line and 3-to-8 line Decoder circuits.
7. a)Implement the following functions with an 4:1 multiplexer
F (A, B, C) =m (1, 3, 5, 6)
b) Implement the following functions with an 8:1 multiplexer
F(A,B,C,D)= m (0,1,3,4,8,9,15)
8. a) With a suitable design, explain the octal to binary encoder circuit.
b) Write a note on BCD adder.
9. Design and explain the working of 4: 1 and 8: 1Multiplexer with a neat diagram.
10. Explain the Hardware Description Language(HDL) with programs
1. What do you meant by sequential logic circuits?
2. List the Types of Flip flop.
3. State the difference between latches and flip-flop.
4. Give the truth table of SR flip flop.
5. List the Application of flip-flop.
6. What is a counter?
7. Define synchronous counter.
8. State the various applications of shift register.
9. Define register.
10. What are the different types of shift register?
11. What is meant by state reduction?
12. Define race around condition.
13. Name the methods of triggering a flip-flop.
14. What is meant by positive edge triggering?
15. Write the characteristic table of JK flip-flop.
16. Define state equation.
17. Mention the 2 kinds of behavioral statements in VHDL for sequential circuit.
18. What is BCD counter?

19. Mention the level of describing register and counter in HDL.

20. Write the characteristic equation of D-flip-flop.
PART-B
1.
2.
3.
4.

With logic circuit & truth table explain the operation of JK flip flop.
Explain in detail about T & D flip flops.
Discuss about the State minimization and state assignment in detail.
Using JK flip flops, design a synchronous counter which counts in the
sequence,000,001,010,011,100,101,110,111,000
5. Draw and explain the operation of a 4-bit SISO, SIPO, PIPO and PISO shift register.
6. Design and explain the working of a 4-bit ripple counter with a neat diagram.
7. a) With a suitable diagram, explain the operation of SR flip-flop in detail.
b) Write the procedure for designing synchronous sequential circuit.
8. Design a 3 bit binary UP/DOWN counter with a direction control M. Use JK FlipFlops.
9. Write the HDL behavioural and structural description of universal shift register in
detail.
10. Discuss in detail about the clocked sequential circuit design and analyze with suitable
example.

1. Define asynchronous sequential circuit.

2. Give the comparison between synchronous & asynchronous sequential circuits
3).Write down the steps for the design of asynchronous sequential circuit
4. What is fundamental mode sequential circuit?
5. Define pulse mode circuits.
6. What is the significance of state assignment?
7. When does race condition occur?
8. List the different techniques used in state assignment
9. Define cycle.
10. What is hazard?
11. Mention the static 1 hazard.
12. What are static 0 hazards?
13. Define dynamic hazard
14. Give the cause for essential hazards?

15. Define ASM chart

16. Give the advantages of ASM chart.
17. State primitive flow chart.
18. Define Merger Graph.
19. Define state equivalence theorem.
20. Define critical and non-critical races.
PART-B
1. Elucidate with neat diagram the different hazards and the way to eliminate them.
2. State with a neat example the method for the minimization of primitive flow table.
3. Illuminate in detail about Races.
4. Explain the fundamental mode asynchronous sequential circuit.
5 .Briefly explain the pulse mode asynchronous sequential circuit.
6. What are the steps in the analysis and design of asynchronous sequential circuits? Explain
with an example.
7. Implement the K-Map for the function F= (0,1,2,6) (i)Logic circuit with static Hazard
(ii)Logic circuits without Static Hazards .
8. Explicate the different methods of state assignment.
9. Explain in detail the different types of Hazards.
10. Design the Hazard Free circuits with examples. .
1. Why do we need memories in digital system?
2. List the three major operations in a flash memory.
3. What is the form in which the information is stored in memories?
4. Mention the main advantages of semiconductor memories over magnetic memories.
5. Define memory size specified.
6. What for the letter K is used in memories?
7. Mention the access time of a memory.
8. What is meant by the term reading with reference to memories?
9. What does RAM stands for?
10. Give examples of Random access memory.
11. What does EPROM stand for?
12. Define PAL.
13. Give the different types of ASIC.

14. Mention the full custom ASIC design.

15. State the standard cell-based ASIC design?
16. What is a FPGA?
17. What is CPLD?
18. Give the different types of read only memories
19. List basic types of programmable logic devices.
20. Give the classification of PLDs.
PART-B
1. Discuss in detail about the combinational programmable logic device (PLD)
2. Explain the programmable logic array with examples
3. Explain the classification of memories.
4. Explain the sequential programmable devices.
5. Design the programmable logic Array (PLA)(i) F1= AB' + AC + A' B C' + ABC'
(ii) F2 =( AC+ B C)'
6. Design the programmable Array Logic (PAL)
w(A,B,C,D) = (2,12,13)
x(A,B,C,D) = (7,8,9,10,11,12,13,14,15)
y(A,B,C,D)= (0,2,3,4,5,6,7,8,10,11,15)
z(A,B,C,D)= (1,2,8,12,13)
7. Explain the memory decoding.
8. Illustrate ASIC in detail
9. Explain the error detecting and correcting codes.
10. Discuss in detail about the RAM and ROM.