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Microprocessor

&
microcontroller
INTRODUCTION

A digital computer is a multipurpose, programmable machine that


reads binary instructions from its memory, accepts binary data as
input and processes data according to those instructions, and
provide output.

Memory
Unit
Input
Devices

Control
Unit

Output
Devices

ALU

MICROPROCESSOR
The microprocessor is a multipurpose, programmable, clockdriven
Semiconductor device consisting of electronics logic circuit manufactured
By using either LSI or VLSI technique.
. It is capable of performing various computing functions & making decision
To change the sequence of program execution.
These are operations that the microprocessor starts itself. These are usually one
of the following operations:
Memory Read : Reads data from memory
Memory Write : Writes data into the memory.
Accepts data from I/P devices
Sends data to O/P devices.
Data Processing
Arithmetic operations
Logical operations
BLOCK DIAGRAM OF MICROPROCESSOR
Processor System Architecture

The typical processor system consists of:


CPU (central processing unit)

ALU (arithmetic-logic unit)

Control Logic
Registers, etc

Memory

Input / Output interfaces


Interconnections between these units:

Address Bus
Data Bus
Control Bus
Bus: A shared group of wires used for communicating signals among devices
Address bus: the device and the location within the
device that is being
accessed.
Data bus: the data value being communicated

control bus: describes the action on the address and data


buses
CPU: Core of the processor, where instructions are executed
Memory and I/O
Memory: Where instructions (programs) and data are stored
Organized in arrays of locations (addresses), each storing one byte
(8 bits) in general
A read operation to a particular location always returns the last
value stored in that location
I/O devices: Enable system to interact with the world
Device interface (a.k.a. controller or adapter) hardware
connects actual
device to bus The CPU views the I/O device registers just like
memory
that can be accessed over the bus. However, I/O registers are connected to
external wires, device control logic, etc.
Reads may not return last value written
Writes may have side effects

EXPLANATION OF DIFERENT BLOCKS


Arithmetic and Logic unit : In this area of the microprocessor the computing
functions are performed on the data. The ALU performs arithmetic operations
such as addition and subtraction, and logic operations such as AND, OR and
EX-OR results are stored in the registers or in memory unit or send to output
unit. Register Unit : This area of the microprocessor consists of various registers.
The registers are used for temporary storage of data during execution of a
program. Some of the registers are accessible to the users through various
instructions. Control Unit : The control unit provides necessary timing and
control signals to all the operations in the microprocessor and peripherals
including memory. Memory : it stores binary information such as instructions
and data and provide that information to the microprocessor when required . To
execute programs the microprocessor reads data and instructions from the

memory and performs the computing operations. It consists of two sections


ROM ( used to store program which do not require any alteration. R/WM is also
known as user memory is used to store programs and data. System Bus: The
system bus is a communication path between the microprocessor and the
peripherals it is nothing but a group of wires that carries data in the form of bits.
8085 MICROPROCESSOR
.It is a 8 bit microprocessor.
.it has 40 pin IC.
.Its clock speed is 3 Mhz.
. It has 80 basic instructions & 246 opcodes.
Microprocessor Architecture:
Microprocessor is a complex IC of sequential circuits. It is a
programmable logic device, designed with registers, flip-flops, and timing
elements. It has a set of instructions designed to manipulate data and
communicate with peripherals. The process of data manipulation and
communication with peripherals is determined by the logic design or the
MP the logic design is called architecture.
All of the operations of the microprocessor can be classified into one of
three types:
- Microprocessor Initiated Operations
- Internal Operations
- Peripheral Initiated Operations
Microprocessor Initiated Operations
These are operations that the microprocessor starts
itself. These are usually one of the following operations:
Memory Read : Reads data from memory
Memory Write : Writes data into the memory.
Accepts data from I/P devices
Sends data to O/P devices.
Data Processing
Arithmetic operations
Logical operations

BLOCK DIAGRAM OF 8085

The 8085 Bus Structure

Address Bus

Consists of 16 address lines: A0 A15

Operates in unidirectional mode: The address bits are always


sent from the MPU to peripheral devices, not reverse.

16 address lines are capable of addressing a


total of 216 = 65,536 (64k) memory locations.

Address locations: 0000 (hex) FFFF (hex)

Data Bus

Consists of 8 data lines: D0 D7

Operates in bidirectional mode: The data bits are


sent from
the MPU to peripheral devices, as well
as from the peripheral
devices to the MPU.

Data range: 00 (hex) FF (hex)

Control Bus

Consists of various lines carrying the control signals such as read /


write enable, flag bits.

The 8085: CPU Internal Structure


The internal architecture of the 8085 CPU is
Capable of performing the following operations:

Store 8-bit data (Registers, Accumulator)

Perform arithmetic and logic operations (ALU)

Test for conditions (IF / THEN)

Sequence the execution of instructions

Store temporary data in RAM during execution

The 8085: Registers

Registers

Six general purpose 8-bit registers: B, C, D, E, H, L

They can also be combined as register pairs to


Perform 16-bit operations: BC, DE, HL

Registers are programmable (data load, move, etc.)

Accumulator

Single 8-bit register that is part of the ALU !

Used for arithmetic / logic operations the result is always stored


in the accumulator.

Flag Bits

Indicate the result of condition tests.

Carry, Zero, Sign, Parity, etc.

Conditional operations (IF / THEN) are executed


the condition of these flag bits.

based on

AC

C
Carry

Sign
Zero

Parity
Auxiliary Carry
X - Unspecified

Carry flag: If after an arithmetic operation the result in the


accumulator is greater than 8 bits then carry flag is set i.e. CY =
1, otherwise it is 0 .
Zero flag: If after an arithmetic operation the result in the
accumulator is zero then zero flag is set i.e. Z = 1, otherwise 0.
Sign Flag: If after an arithmetic operation the MSB of the result
in the accumulator is 1 then Sign flag is set i.e. S = 1, otherwise
0.
Parity Flag: If after an arithmetic operation the result contains
even number of 1s then Parity flag is is set i.e. P = 1, otherwise
0.
Auxiliary Flag: This status flag is set if there is a carry when there
is a carry from bit 3 to 4.

Program Counter: This is a 16 bit register that deals with the forth
operation of the list i.e. sequencing the execution of instructions. This
register is a memory pointer. Memory locations have 16 bit address. The
function of the program counter is to point the memory address from
which the next byte is to be fetched. When one byte is being fetched the
contents of the program counter is increased by 1. to point the next
memory location.
Stack Pointer: The stack pointer is also a 16 bit register used as memory
pointer. It points to a memory location in R/W memory, called the stack.
The beginning of the stack is defined by loading a 16 bit address in the
stack pointer.

Pin Diagram of 8085

Serial i/p, o/p


signals

X1
X2
RE O
SE S
U
T
T
O
SI
D
TRA
P
RST
RST
7.5
RST
6.5
5.5
INT
_____
R
INTA
A
AD0
D
A1
D2
A
D3
A
D
A4
D
A5
D
A6
D
V7

SS

1
2
3
4
5
6
7
8
9
10
11
12

8085
A

40
39
38
37
36
35
34
33
32
31

14
15
16
17
18
19

30
29
28
27
26
25
24
23
22

20

21

13

V
cc
HO
D
LD
HLDA
M
CLK
______________
( OUT) A
___
READY RESET
__
S1

IO / M
IN

___

R
___
D
W
A
R
L
S
E
0A
15
A14
A13
A12
A11
A10
A9
A8

PIN DESCRIPITION OF 8085


1. A8-A15 (Output): These are address bus and are used for the MSB of the
memory address. or I/O address.

2 ADo-AD7 (Input / Output): These are time multiplexed address / data


bus i.e. they serve dual purpose. They are used for the LSB of the memory
address. or I/O address during the first clock cycle of the machine cycle.
They are used as data during the second and third clock cycle of the machine
cycle.
3. ALE (Output): It is an address latch enable signal. It goes high
during the first clock cycle of the machine cycle and enables the lower
8 bits of the address to be latched either into the memory or external
latch.
__
4. IO/M (Output): It is a status signal which distinguishes whether the
address is for memory or external latch. When it goes low the address in
the address bus is for the memory.
5.So,S1 (Output): These are status signals sent by the microprocessor
to distinguish the various types of operation given .
S1,S0 Operation
1. 0,0 - Halt
2. 0,1 - write
3. 1,0 - Read
4. 1,1 - Fetch
___
6 WR (Output): It is a signal to control WRITE operation. When it is low the
data on the data bus is written into the selected memory or I/O device.
7 RD(Output): It is a signal to control READ operation. When it is low the
selected memory or I/O device is read.
8 READY (Input) It is used by the microprocessor to check whether the
peripherals is ready to transfer data or not. If READY is high . If it is low
MP waits for the signal to go high..
9 HOLD (Input): It indicates that another device is requesting the use of the
address and data bus. Having received a HOLD request the MP
relinquishes the use of the buses as soon as current machine is completed.
10 HLDA (output): It is a signal for HOLD acknowledgement. It indicates
that the HOLD request have been received.
11. INTR (input): It is an interrupt request signal. Among interrupts it has
lowest priority. When it goes high the program counter does not
increment its contents. The microprocessor suspends its normal sequence
of operations. After completing the instruction at hand it goes to the call
instruction. The INTR line is sampled in the last state of the last machine
cycle of the instruction. The microprocessor acknowledges the interrupt
signal and issues INTA signal. The interrupt is enabled or disabled by
software. An interrupt is used by I/O devices to transfer data to the MP
without wasting its time.

12 RST5.5.6.5.7.5 and trap (inputs): These are interrupts. When an interrupt


is recognized the next instruction is executed from a fixed location in the
memory as given below:
1. TRAP
0024
2. RST5.5
002C
3. RST6.5
0034
4. RST7.5
003C
RST 7.5,6.5.5.5 are the restart interrupts. They cause an internal
restart to be automatically inserted. Each of them has a programmable mask.
The TRAP has the highest priority among interrupts. It is a nonmaskable
interrupts. It is unaffected by any mask or interrupt. The priority of the
interrupts is in the order of TRAP(Highest) , RST7.5. RST6.5, RST5.5, INTR.
13. RESET IN (Input): It resets the program counter to zero. It also resets the
interrupt enable and HLDA flip-flops. It does not effect any other flag or
register except the instruction register, The CPU is held in reset condition as
long as RESET is applied.
14 RESET OUT (Output): It indicates that the CPU is being reset.
15 X1, X2: (Input): These are terminals to be connected to an external crystal
oscillator which drives an internal circuitry of the microprocessor to produce
a suitable clock for the operation of microprocessor.
16 CLK : It is a clock output for user, which can be used for other digital
ICc Its frequency is same at which processor operates.
16 SID (Input) It is data line for serial input. The data on this line is loaded
into the 7th bit of the accumulator when RIM instruction is executed.
17 SOD (Output): it is a data line for serial output. The 7th bit of the
accumulator is outputed on SOD line when SIM instruction is executed.
18 VCC: +5 Volts Supply
19 VSS: Ground Reference

DEMULTIPLEXING OF ADDRESS & DATA

The 8085 Machine Cycle and Bus Timings

An instruction is a command given to a computer to perform a specified


operation. On the given data. To perform a particular task a programmer
writes a sequence of instructions, called a program. Program and data are
stored in the memory. The processor fetches one instruction from the
memory at a time and execute it. It executes all the instructions of the
program one by one and produce the final result.
Instruction Cycle The necessary steps which a processor carries out to
fetch an instruction and data from the memory and to execute that
instruction constitute and instruction cycle.
An instruction cycle consist of two steps Fetch cycle and Execute cycle. In
the fetch cycle the processor fetches the instruction from the memory. The
necessary steps which are carried out to get data and perform the specific
operation given in the instruction constitute a execute cycle.
IC = FC + EC
Op-code & Operand : Each instruction contains two parts Operation Code
(Opcode) and Operand. The first part of the instruction which specifies a task to
be performed by the processor is called Opcode. The second part of the
instruction is the data to be operated upon is called Operand.
Example: Instruction Fetch Operation
o All instructions (program steps) are stored in memory.
To run a program, the individual instructions must
be read
from the memory in sequence, and executed.
o
Program counter puts the 16-bit memory address of the
instruction on the address bus
Control unit sends the Memory Read Enable signal to
access the memory
The 8-bit instruction stored in memory is placed on the data
bus and transferred to the instruction decoder
Instruction is decoded and executed
o

Example: Instruction Fetch Operation

Example: Instruction Fetch Operation

The steps which MP8085 takes to fetches machine codes from the memory
can be understood with the help of the command MOV C,A (4F) stored at
memory location 2005H :
1. The program places the 16 bit address on the address bus. At time T1 the
high order address 20H is placed on the address line A15-A8, the low
order memory address 05H is placed on the data bus AD7-AD0 and the

address latch signal goes high. Similarly the status signal IO/M goes low,
indicating that this is memory related operation.
2. The control unit sends the control signal RD to enable the memory chip.
This signal is sent out during the clock period T2, thus enabling the
memory chip. The RD signal is active during two clock periods.
3. The byte from the memory location is placed on the data bus. When the
memory is enabled the instruction byte (4F) is placed on the bus AD7AD0 and transferred to the microprocessor. The RD signal goes high,
the bus go into high impedance.
4. The byte is placed in the instruction decoder of the microprocessor, and
the task is carried out. The machine code 4F is decoded by the instruction
decoder and the contents of the accumulator are copied into the register
C. This task is performed during the period T4

TIMING DIAGRAM
T - State
One sub-division of the operation performed in one clock period is called
one T-state.
Machine Cycle
The time required to complete one operation of accessing either memory
or i/o is called one machine cycle. The machine cycle may consist of 3 to 6
T-state.
Instruction Cycle
The time required to complete the execution of an instruction. An
instruction cycle may consist of 1 to 5 machine cycles.
TIMING DIAGRAM(For MOV A,B)

Another
Example :- In MP8085 we have two machine codes 3EH ( MVI A, data) and 32H
are stored at memory location 2000H and 2001H respectively. Illustrate the bus
timing . Calculate the required to execute the Opcode Fetch and Memory Read
cycles and the entire instruction cycle if the clock frequency is 1.2 MHzs.

Ans :- This instruction consists of two bytes; the first op-code and the second is
the data byte. The MP reads these bytes from the memory and thus requires at
least two machine cycles. The first machine cycle is the Opcode fetch and the
second machine cycle is the memory read .
1. First machine cycle M1:1. At T1 microprocessor places the memory address 2000H from the PC on
the address bus. 20H on the A15-A8, and 00H on the bus AD7-AD0. The
ALE signal goes high during T1. which is used to latch the low order
address 00H to AD7-AD0. The status signals are S1 = 1, S0=1
2. At T2 the MP asserts the RD control signal, which enables the memory,
and memory places the byte 3EH from location 2000H on the data bus.
3. During T3 the MP places the opcode in the instruction register and
disables the RD signal . The fetch cycle is completed in state T3
4. During T4 the instruction is decoded
2. Second machine cycle M2:1. At T1 microprocessor places the memory address 2001H from the PC on
the address bus. 20H on the A15-A8, and 01H on the bus AD7-AD0. The
ALE signal goes high during T1. which is used to latch the low order
address 00H to AD7-AD0. The status signals are S1 = 1, S0=0
2. At T2 the MP activates the data bus as the input bus, memory places the
data byte 32H on the data bus.
3. During T3 the MP reads and store the byte in accumulator.
The execution time
Clock frequency f = 2 Mz
T- state = Clock Period = 1/f = 0.5 s
Execution time for fetch cycle = 4 X .5 = 2 s
Execution time for Memory Read = 3 X .5 = 1.5 s
Execution time for the instruction = 3.5 s

Example 2 :- In MP8085 explain the machine cycle for the instruction STA
2065 (32H,65,20). The machine codes are stored at the memory locations
2010H, 2011H, 2012H.
Ans :- This instruction consists of three bytes; the first op-code and the
second and the third are the address of the memory location. This
instruction stores the contents of the accumulator in the memory location
2065H. It consists of 4 machine cycles.
1. First machine cycle M1:In the first machine cycle the MP places the address 2010 on the address bus and
fetches the opcode 32h. It requires 4T states.
1. Second machine cycle M2:In the second machine cycle the memory is read. The processor places the
address 2011 and gets the low order byte 65H. It requires 3T states.
1. Third machine cycle M3:The third machine cycle is also the Memory Read cycle. The processor gets the
high order byte 20H from the memory location 2012. It requires 3 T states
1. Forth machine cycle M4 :The last machine cycle is the memory write . The MP places the address of
2065H on the address bus, identifies the operation as Memory Write ( S1=0,
S0=0 ). It places the contents of the accumulator on the data bus AD7-AD0 and

asserts the WR signal. During the last T state the contents of the data bus are
placed in memory location 2065H. It requires 3T states.

TIMING DIAGRAM OF MEMORY READ & MEMORY WRITE

Addressing Modes of MP 8085


Each instruction performs an operation on the specified data called operand. An
operand must be specified for an instruction to be executed. The operand may be
in the general purpose register, accumulator or in a memory location. The way

in which the operand is specified for an instruction is called


addressing mode. Various addressing modes used in MP 8085 are:
:

1.
2.
3.
4.
5.

Direct Addressing
Register Addressing
Register Indirect Addressing
Immediate Addressing.
Implicit Addressing

Direct addressing: In this mode of addressing the address of the operand


(data) is given in the instruction itself. For example:
1. STA 2400H: Store the content of the accumulator to memory
location 2400H.
2. IN 02: Read data from port C , 02 is the address of the port C of
an I/O port from where data is to be read.
Register Addressing: In register addressing mode the operands are in the
general purpose registers. For example:

1. MOV A,B: This instruction moves the contents of register B to


register A or Accumulator.
2. ADD B:
Add the contents of register B to accumulator.
Register indirect addressing: In this mode of addressing the address of the
operand (data) is specified by a register pair. For example:
1. LXI H, 2500H:
Load HL pair with 2500H.
MOV A,M : Move the contents of memory location whose
address is given in HL pair to the accumulator.
HLT: Stop the program.
In this program MOV A,M is the example of Register Indirect
addressing.
2. LXI H, 2500H: Load HL pair with 2500H.
ADD M :
Add the contents of memory location whose address is given in HL
pair to the accumulator.
HLT: Stop the program.
In this program ADD ,M is the example of Register Indirect
addressing.
Immediate Addressing: In immediate addressing mode the operands are
specified within the instruction itself. For example:
1. MVI A,05 : Move 05 in the Accumulator.
2. ADI 06 : Add 06 to the contents of the accumulator.
Implicit Addressing: There are certain instructions which operate on the
content or the Accumulator directly, these instructions do not require the
address of the operands. For example
1. CMA : Compliment the contents of the Accumulator.
2. RAR : Rotate the contents of the accumulator right by one bit.
RAL : Rotate the contents of the accumulator left by one bit.