Conference of Informatics and Management Sciences

ICTIC 2013

March, 25. - 29. 2013

Design and implementation of the AD and DA

converters into FPGA device
Peter evk
Department of Technical Cybernetics
University of ilina
ilina, Slovakia
peter.sevcik@fri.uniza.sk
Abstract This paper presents design and implementation of the
sigma delta () analog digital (AD) and digital analog (DA)
converters into field programmable gate array (FPGA) device.
Also the design of the printed circuit board (PCB) is presented in
the paper. The PCB is designed for using with the Xilinx Spartan
3 FPGA Starter Kit development board to expand its application
area. The presentation of the design results is at the end of the
paper.
Keywords - , AD converter, DA converter, FPGA, PCB.

I.

INTRODUCTION

sample rate, which limits their deployment to systems with

sufficient sample rate up to 100 kHz. converters are advised
to upscaling converters category, it means, they sample input
signal with a frequency exceeding necessary minimum
(Nyquist) sampling frequency.
II.

The Xilinx Spartan 3 FPGA Starter Kit board provides a low

cost, easy to use development platform for designs used
Spartan-3 FPGA device. The development board is made by
Digilent [1].

The main application area of the FPGA devices consist in

implementation of digital signal processing systems using the
maximum degree of parallelism and specific function blocks
e.g. embedded multipliers, block rams, digital clock managers
(DCM), processors cores, etc., which significantly increase the
performance of the implemented system. The basic elements
which connect the FPGA device with an external analog
environment are AD and DA converters. Consequently, most
of the development FPGA boards integrate any type AD
converter (ADC), which is used for analog signal sampling.
These converters are mostly very fast and therefore suitable for
video signal sampling. If the development board does not
integrate AD and DA converters, user if necessary, can buy the
expansion module (if exists) or can design the module by itself
to satisfy his requirements. In this paper the design and
implementation of simple ADC and DAC module based on
modulation for the Xilinx Spartan 3 FPGA Starter Kit
development board is presented. The decision to design
converters is based on the benefits offered by converters:

most of the design components consists of a digital

subsystems which are implemented directly in the
target FPGA device,

minimum of external components is needed,

low price of the module design (only few components

are located on the PCB),

possibility of the high resolution ADC and DAC

(more than 12 bits).

Figure 1. Xilinx Spartan 3 FPGA Starter Kit board top side

Figure 1 and figure 2 illustrate the Spartan 3 Starter Kit

board, which includes the following components and features:

These features allow the converters based on

modulation find very wide range of applications in digital
signal processing systems implemented on the FPGA platform.
The basic disadvantage of these converters is the relatively low

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SPARTAN 3 FPGA STARTER KIT

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15. Robotics

Xilinx Spartan-3 XC3S200 FPGA in a 256-ball thin

BGA package - XC3S200FT256 (1), which contains:
o
o
o
o

12 pieces of 18 Kb block RAMs,

12pieces of 18x18 hardware multipliers,
4 pieces of DCMs,
173 user-defined I/O signals,

2Mb Xilinx XCF02S platform flash (2),

1MB of fast asynchronous SRAM (3),

8 color VGA display port (4),

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ICTIC 2013

March, 25. - 29. 2013

RS-232 serial port (5),

PS/2 mouse/keyboard port (6),

4 pieces of seven segment LED display (7),

8 pieces of slide switches (8),

8 pieces of LED (9),

4 pieces of push button switches (10),

50 MHz crystal oscillator clock source (11),

A1 expansion connector (12),

A2 expansion connector (13),

B1 expansion connector (14).

comparator. Spartan 3 family devices contain this type of input

gate and it is included in the implementation.
Figure 3 illustrates the basic structure of the first order
AD converter. Besides the input gate, next essential element of
the ADC structure is the accumulator; it is an adder which
has one of the operands connected as the feedback from the
output. In our application, 10 bit accumulator is used, which
will accumulate output bit stream from the sampling element
(FDCE) for 1024 clock time. This means that the sampling
frequency of the input signal falls to:
Fs

FCLK 50 106

48,828kHz,
NCLK 1024

(1)

assuming the frequency of the input clock signal connected to

the sampling element is FCLK = 50 MHz.
IV.

DAC IMPLEMENTATION

Implementation of the first order DAC is even easier

than the implementation of the AD converter. As in the case of
the AD converter also there is the accumulator an essential
element of the structure (Figure 4). Output signal of the DA
converter is derived from the highest bit of the accumulator
result. In case of 8 bit DAC it is the 9th bit (adding of two 8bit
operands gives 9 bit result.).
FPGA DEVICE

ACCUMULATOR

FDCE

Figure 2. Xilinx Spartan 3 FPGA Starter Kit board bottom side

III.

ADC IMPLEMENTATION

C
CLK

Figure 4. The basic structure of the first order DAC implementable in

FPGA circuits

V.

FPGA DEVICE
IBUFDS

FDCE

ACCUMULATOR
1

R
C

CLK

Figure 3. The basic structure of the first order ADC implementable in

FPGA circuits

If the FPGA device doesnt contain this input gate (or its
functional equivalent), it must be replaced with the external

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ANALOG_OUT

MSB

The basic element of a ADC is differential input gate

IBUFDS. Input gate IBUFDS serves as very fast analog
comparator in this design.

ANALOG_IN

N+1

PCB MODULE DESIGN

PCB module is designed for connecting analog input and

output signals to the Spartan 3 FPGA Starter Kit development
board. It has been designed in a freely available variant of the
program EAGLE [2]. There are two RC elements for ADC
and DAC on the circuit boards with dimensions of 28.6 x 56.2
mm. Also there is one operational amplifier served as an
impedance transformer to separate DAC output and two BNC
connectors for easy connection of the measuring and of course
the connector to connect to the expansion connector
development board. To connect the PCB module with the
development board, expansion connector A2 was chosen.
There is a schematic of the module depicted in the figure 5.
The supplying for the low power operational amplifier is
provided from the development board supply unit 3.3 V, which
is connected to pin 3 of the expansion connector A2. This
voltage is filtered by capacitors C4, C5 and C6 located close to
the input of the supply unit to the PCB. Capacitor C3 is placed

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March, 25. - 29. 2013

close to the power terminals of an operational amplifier

according to the manufacturer's recommendations.

Figure 5. Schematic of the analog input and output for the converters

PCB was designed as a double layer with the accent on the

shortest wire routing. Originals of layers are depicted in the
figure 6 and 7. Printed circuit board is designed to be equipped
with SMD parts. Traditional components are placed only in
positions of connectors (figure 8). All the parts are available in
Farnell store [3].

Figure 8. Component placement receipt

Figure 6. TOP layer originals of the PCB

Figure 9. Finished PCB module for converters connected together with
the development board

VI.

IMPLEMENTATION RESULTS

In order to test the functionality of the designed

converters, simple digital signal processing system was
implemented. The system converts an incoming harmonic
analogue signal via ADC to its digital equivalent. This
digital equivalent is sent directly to the DAC and converts
back to its analog form. The sampling frequency for both
converters is set to 48,828 kHz. There are 3 testing harmonic
signals:

Figure 7. BOTTOM layer originals of the PCB

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10 Hz sinus signal (Figure 10),

1 kHz sinus signal (Figure 11),

10 kHz sinus signal (Figure 12).

Testing signals was generated by using arbitrary waveform

generator and was measured by the one channel of the digital

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ICTIC 2013

March, 25. - 29. 2013

storage scope. The output of the DAC was measured by the

second channel of the digital storage scope.

Figure 12. The DAC output signal for 10 kHz testing signal
Figure 10. The DAC output signal for 10 Hz testing signal

VII. CONCLUSION
This paper presents very simple and useful implementation
of the AD and DA converters. Proposed module is designed
to work with Spartan 3 FPGA Starter Kit development board,
which doesnt contain any AD or DA converter. The module
significantly extends the application possibilities of the
development board.
ACKNOWLEDGMENT
This contribution
implementation:

is

the

result

of

the

project

Centre of excellence for systems and services of intelligent

transport II, ITMS 26220120050 supported by the Research &
Development Operational Programme funded by the ERDF.
REFERENCES
[1]
Figure 11. The DAC output signal for 1 kHz testing signal
[2]
[3]

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Digilent Inc. (2013, April 08). Spartan 3 Board product page. [Online].
Available:
http://www.digilentinc.com/Products/Detail.cfm?NavPath
=2,400,799&Prod=S3BOARD
CadSoft Inc. (2013, April 08). Eagle software product page. [Online].
Available: http://www.cadsoftusa.com/
Farnell s.r.o. (2013, April 08). Farnell online shop. [Online]. Available:
http://sk.farnell.com

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