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MIPS Instruction Reference

MIPSInstructionReference
ThisisadescriptionoftheMIPSinstructionset,theirmeanings,syntax,semantics,andbitencodings.Thesyntaxgivenforeachinstructionrefersto
theassemblylanguagesyntaxsupportedbytheMIPSassembler.Hyphensintheencodingindicate"don'tcare"bitswhicharenotconsideredwhenan
instructionisbeingdecoded.
Generalpurposeregisters(GPRs)areindicatedwithadollarsign($).ThewordsSWORDandUWORDreferto32bitsignedand32bitunsigned
datatypes,respectively.
Themannerinwhichtheprocessorexecutesaninstructionandadvancesitsprogramcountersisasfollows:
1.executetheinstructionatPC
2.copynPCtoPC
3.add4orthebranchoffsettonPC
Thisbehaviorisindicatedintheinstructionspecificationsbelow.Forbrevity,thefunctionadvance_pc(int)isusedinmanyoftheinstruction
descriptions.Thisfunctionisdefinedasfollows:

voidadvance_pc(SWORDoffset)
{
PC=nPC
nPC+=offset
}

Note:ALLarithmeticimmediatevaluesaresignextended.Afterthat,theyarehandledassignedorunsigned32bitnumbers,dependinguponthe
instruction.Theonlydifferencebetweensignedandunsignedinstructionsisthatsignedinstructionscangenerateanoverflowexceptionandunsigned
instructionscannot.
Theinstructiondescriptionsaregivenbelow:

ADDAdd(withoverflow)
Description: Addstworegistersandstorestheresultinaregister
Operation: $d=$s+$tadvance_pc(4)
Syntax:
add$d,$s,$t
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Encoding:

MIPS Instruction Reference

000000ssssstttttddddd00000100000

ADDIAddimmediate(withoverflow)
Description:
Operation:
Syntax:
Encoding:

Addsaregisterandasignextendedimmediatevalueandstorestheresultinaregister
$t=$s+immadvance_pc(4)
addi$t,$s,imm
001000ssssstttttiiiiiiiiiiiiiiii

ADDIUAddimmediateunsigned(nooverflow)
Description: Addsaregisterandasignextendedimmediatevalueandstorestheresultinaregister
Operation: $t=$s+immadvance_pc(4)
Syntax:
addiu$t,$s,imm
Encoding:

001001ssssstttttiiiiiiiiiiiiiiii

ADDUAddunsigned(nooverflow)
Description: Addstworegistersandstorestheresultinaregister
Operation: $d=$s+$tadvance_pc(4)
Syntax:
Encoding:

addu$d,$s,$t
000000ssssstttttddddd00000100001

ANDBitwiseand
Description: Bitwiseandstworegistersandstorestheresultinaregister
Operation:
Syntax:
Encoding:

$d=$s&$tadvance_pc(4)
and$d,$s,$t
000000ssssstttttddddd00000100100

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MIPS Instruction Reference

ANDIBitwiseandimmediate
Description:
Operation:
Syntax:
Encoding:

Bitwiseandsaregisterandanimmediatevalueandstorestheresultinaregister
$t=$s&immadvance_pc(4)
andi$t,$s,imm
001100ssssstttttiiiiiiiiiiiiiiii

BEQBranchonequal
Description:
Operation:
Syntax:
Encoding:

Branchesifthetworegistersareequal
if$s==$tadvance_pc(offset<<2))elseadvance_pc(4)
beq$s,$t,offset
000100ssssstttttiiiiiiiiiiiiiiii

BGEZBranchongreaterthanorequaltozero
Description:
Operation:
Syntax:
Encoding:

Branchesiftheregisterisgreaterthanorequaltozero
if$s>=0advance_pc(offset<<2))elseadvance_pc(4)
bgez$s,offset
000001sssss00001iiiiiiiiiiiiiiii

BGEZALBranchongreaterthanorequaltozeroandlink
Description:
Operation:
Syntax:
Encoding:

Branchesiftheregisterisgreaterthanorequaltozeroandsavesthereturnaddressin$31
if$s>=0$31=PC+8(ornPC+4)advance_pc(offset<<2))elseadvance_pc(4)
bgezal$s,offset
000001sssss10001iiiiiiiiiiiiiiii

BGTZBranchongreaterthanzero
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Description:
Operation:
Syntax:
Encoding:

MIPS Instruction Reference

Branchesiftheregisterisgreaterthanzero
if$s>0advance_pc(offset<<2))elseadvance_pc(4)
bgtz$s,offset
000111sssss00000iiiiiiiiiiiiiiii

BLEZBranchonlessthanorequaltozero
Description:
Operation:
Syntax:
Encoding:

Branchesiftheregisterislessthanorequaltozero
if$s<=0advance_pc(offset<<2))elseadvance_pc(4)
blez$s,offset
000110sssss00000iiiiiiiiiiiiiiii

BLTZBranchonlessthanzero
Description:
Operation:
Syntax:
Encoding:

Branchesiftheregisterislessthanzero
if$s<0advance_pc(offset<<2))elseadvance_pc(4)
bltz$s,offset
000001sssss00000iiiiiiiiiiiiiiii

BLTZALBranchonlessthanzeroandlink
Description:
Operation:
Syntax:
Encoding:

Branchesiftheregisterislessthanzeroandsavesthereturnaddressin$31
if$s<0$31=PC+8(ornPC+4)advance_pc(offset<<2))elseadvance_pc(4)
bltzal$s,offset
000001sssss10000iiiiiiiiiiiiiiii

BNEBranchonnotequal
Description: Branchesifthetworegistersarenotequal
Operation: if$s!=$tadvance_pc(offset<<2))elseadvance_pc(4)
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Syntax:
Encoding:

MIPS Instruction Reference

bne$s,$t,offset
000101ssssstttttiiiiiiiiiiiiiiii

DIVDivide
Description:
Operation:
Syntax:
Encoding:

Divides$sby$tandstoresthequotientin$LOandtheremainderin$HI
$LO=$s/$t$HI=$s%$tadvance_pc(4)
div$s,$t
000000sssssttttt0000000000011010

DIVUDivideunsigned
Description:
Operation:
Syntax:
Encoding:

Divides$sby$tandstoresthequotientin$LOandtheremainderin$HI
$LO=$s/$t$HI=$s%$tadvance_pc(4)
divu$s,$t
000000sssssttttt0000000000011011

JJump
Description:
Operation:
Syntax:
Encoding:

Jumpstothecalculatedaddress
PC=nPCnPC=(PC&0xf0000000)|(target<<2)
jtarget
000010iiiiiiiiiiiiiiiiiiiiiiiiii

JALJumpandlink
Description:
Operation:
Syntax:
Encoding:

Jumpstothecalculatedaddressandstoresthereturnaddressin$31
$31=PC+8(ornPC+4)PC=nPCnPC=(PC&0xf0000000)|(target<<2)
jaltarget
000011iiiiiiiiiiiiiiiiiiiiiiiiii

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MIPS Instruction Reference

JRJumpregister
Description:
Operation:
Syntax:
Encoding:

Jumptotheaddresscontainedinregister$s
PC=nPCnPC=$s
jr$s
000000sssss000000000000000001000

LBLoadbyte
Description:
Operation:
Syntax:
Encoding:

Abyteisloadedintoaregisterfromthespecifiedaddress.
$t=MEM[$s+offset]advance_pc(4)
lb$t,offset($s)
100000ssssstttttiiiiiiiiiiiiiiii

LUILoadupperimmediate
Description:
Operation:
Syntax:
Encoding:

Theimmediatevalueisshiftedleft16bitsandstoredintheregister.Thelower16bitsarezeroes.
$t=(imm<<16)advance_pc(4)
lui$t,imm
001111tttttiiiiiiiiiiiiiiii

LWLoadword
Description:
Operation:
Syntax:
Encoding:

Awordisloadedintoaregisterfromthespecifiedaddress.
$t=MEM[$s+offset]advance_pc(4)
lw$t,offset($s)
100011ssssstttttiiiiiiiiiiiiiiii

MFHIMovefromHI
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Description:
Operation:
Syntax:
Encoding:

MIPS Instruction Reference

ThecontentsofregisterHIaremovedtothespecifiedregister.
$d=$HIadvance_pc(4)
mfhi$d
0000000000000000ddddd00000010000

MFLOMovefromLO
Description:
Operation:
Syntax:
Encoding:

ThecontentsofregisterLOaremovedtothespecifiedregister.
$d=$LOadvance_pc(4)
mflo$d
0000000000000000ddddd00000010010

MULTMultiply
Description: Multiplies$sby$tandstorestheresultin$LO.
Operation: $LO=$s*$tadvance_pc(4)
Syntax:
mult$s,$t
Encoding:

000000sssssttttt0000000000011000

MULTUMultiplyunsigned
Description:
Operation:
Syntax:
Encoding:

Multiplies$sby$tandstorestheresultin$LO.
$LO=$s*$tadvance_pc(4)
multu$s,$t
000000sssssttttt0000000000011001

NOOPnooperation
Description: Performsnooperation.
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Operation:
Syntax:
Encoding:

MIPS Instruction Reference

advance_pc(4)
noop
00000000000000000000000000000000

Note:TheencodingforaNOOPrepresentstheinstructionSLL$0,$0,0whichhasnosideeffects.Infact,nearlyeveryinstructionthathas$0asits
destinationregisterwillhavenosideeffectandcanthusbeconsideredaNOOPinstruction.

ORBitwiseor
Description:
Operation:
Syntax:
Encoding:

Bitwiselogicalorstworegistersandstorestheresultinaregister
$d=$s|$tadvance_pc(4)
or$d,$s,$t
000000ssssstttttddddd00000100101

ORIBitwiseorimmediate
Description:
Operation:
Syntax:
Encoding:

Bitwiseorsaregisterandanimmediatevalueandstorestheresultinaregister
$t=$s|immadvance_pc(4)
ori$t,$s,imm
001101ssssstttttiiiiiiiiiiiiiiii

SBStorebyte
Description: Theleastsignificantbyteof$tisstoredatthespecifiedaddress.
Operation:
Syntax:

MEM[$s+offset]=(0xff&$t)advance_pc(4)
sb$t,offset($s)

Encoding:

101000ssssstttttiiiiiiiiiiiiiiii

SLLShiftleftlogical
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MIPS Instruction Reference

Description: Shiftsaregistervalueleftbytheshiftamountlistedintheinstructionandplacestheresultinathirdregister.Zeroesareshiftedin.
Operation:
Syntax:

$d=$t<<hadvance_pc(4)
sll$d,$t,h

Encoding:

000000ssssstttttdddddhhhhh000000

SLLVShiftleftlogicalvariable
Description: Shiftsaregistervalueleftbythevalueinasecondregisterandplacestheresultinathirdregister.Zeroesareshiftedin.
Operation:
Syntax:

$d=$t<<$sadvance_pc(4)
sllv$d,$t,$s

Encoding:

000000ssssstttttddddd000100

SLTSetonlessthan(signed)
Description: If$sislessthan$t,$dissettoone.Itgetszerootherwise.
Operation: if$s<$t$d=1advance_pc(4)else$d=0advance_pc(4)
Syntax:
Encoding:

slt$d,$s,$t
000000ssssstttttddddd00000101010

SLTISetonlessthanimmediate(signed)
Description: If$sislessthanimmediate,$tissettoone.Itgetszerootherwise.
Operation: if$s<imm$t=1advance_pc(4)else$t=0advance_pc(4)
Syntax:
Encoding:

slti$t,$s,imm
001010ssssstttttiiiiiiiiiiiiiiii

SLTIUSetonlessthanimmediateunsigned
Description: If$sislessthantheunsignedimmediate,$tissettoone.Itgetszerootherwise.
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MIPS Instruction Reference

Operation:
Syntax:

if$s<imm$t=1advance_pc(4)else$t=0advance_pc(4)
sltiu$t,$s,imm

Encoding:

001011ssssstttttiiiiiiiiiiiiiiii

SLTUSetonlessthanunsigned
Description: If$sislessthan$t,$dissettoone.Itgetszerootherwise.
Operation: if$s<$t$d=1advance_pc(4)else$d=0advance_pc(4)
Syntax:
Encoding:

sltu$d,$s,$t
000000ssssstttttddddd00000101011

SRAShiftrightarithmetic
Description: Shiftsaregistervaluerightbytheshiftamount(shamt)andplacesthevalueinthedestinationregister.Thesignbitisshiftedin.
Operation: $d=$t>>hadvance_pc(4)
Syntax:
Encoding:

sra$d,$t,h
000000tttttdddddhhhhh000011

SRLShiftrightlogical
Description: Shiftsaregistervaluerightbytheshiftamount(shamt)andplacesthevalueinthedestinationregister.Zeroesareshiftedin.
Operation:
Syntax:

$d=$t>>hadvance_pc(4)
srl$d,$t,h

Encoding:

000000tttttdddddhhhhh000010

SRLVShiftrightlogicalvariable
Description: Shiftsaregistervaluerightbytheamountspecifiedin$sandplacesthevalueinthedestinationregister.Zeroesareshiftedin.
Operation:
Syntax:

$d=$t>>$sadvance_pc(4)
srlv$d,$t,$s

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Encoding:

MIPS Instruction Reference

000000ssssstttttddddd00000000110

SUBSubtract
Description: Subtractstworegistersandstorestheresultinaregister
Operation: $d=$s$tadvance_pc(4)
Syntax:

sub$d,$s,$t

Encoding:

000000ssssstttttddddd00000100010

SUBUSubtractunsigned
Description: Subtractstworegistersandstorestheresultinaregister
Operation: $d=$s$tadvance_pc(4)
Syntax:
Encoding:

subu$d,$s,$t
000000ssssstttttddddd00000100011

SWStoreword
Description: Thecontentsof$tisstoredatthespecifiedaddress.
Operation: MEM[$s+offset]=$tadvance_pc(4)
Syntax:
Encoding:

sw$t,offset($s)
101011ssssstttttiiiiiiiiiiiiiiii

SYSCALLSystemcall
Description: Generatesasoftwareinterrupt.
Operation:
Syntax:

advance_pc(4)
syscall

Encoding:

000000001100

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MIPS Instruction Reference

ThesyscallinstructionisdescribedinmoredetailontheSystemCallspage.

XORBitwiseexclusiveor
Description: Exclusiveorstworegistersandstorestheresultinaregister
Operation: $d=$s^$tadvance_pc(4)
Syntax:
Encoding:

xor$d,$s,$t
000000ssssstttttddddd100110

XORIBitwiseexclusiveorimmediate
Description: Bitwiseexclusiveorsaregisterandanimmediatevalueandstorestheresultinaregister
Operation:
Syntax:

$t=$s^immadvance_pc(4)
xori$t,$s,imm

Encoding:

001110ssssstttttiiiiiiiiiiiiiiii

UpdatedonSeptember10,1998

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