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MIPS Reference Sheet

Word
Add
Subtract
Multiply
Multiply Unsigned
Divide
Divide Unsigned
Move From High/Remainder
Move From Low/Quotient
Load Immediate And Skip
Load Word
Store Word
Set Less Than
Set Less Than Unsigned
Branch On Equal
Branch On Not Equal
Jump Register
Jump And Link Register

Basic Instruction Formats


Register
0000 00ss ssst tttt dddd d000 00ff ffff
Immediate
oooo ooss ssst tttt iiii iiii iiii iiii

R
I

s, t, d are interpreted as unsigned


i is interpreted as twos complement

Instructions
.word i
iiii iiii
add $d, $s, $t 0000 00ss
sub $d, $s, $t 0000 00ss
mult $s, $t
0000 00ss
multu $s, $t
0000 00ss
div $s, $t
0000 00ss
divu $s, $t
0000 00ss
mfhi $d
0000 0000
mflo $d
0000 0000
lis $d
0000 0000
lw $t, i($s)
1000 11ss
sw $t, i($s)
1010 11ss
slt $d, $s, $t
0000 00ss
sltu $d, $s, $t 0000 00ss
beq $s, $t, i
0001 00ss
bne $s, $t, i
0001 01ss
jr $s
0000 00ss
jalr $s
0000 00ss

R
R
R
R
R
R
R
R
R
I
I
R
R
I
I
R
R

$d = $s + $t
$d = $s - $t
hi:lo = $s * $t
hi:lo = $s * $t
lo = $s / $t; hi = $s % $t
lo = $s / $t; hi = $s % $t
$d = hi
$d = lo
$d = MEM[pc]; pc = pc + 4
$t = MEM [$s + i]
MEM [$s + i] = $t
$d = 1 if $s < $t; 0 otherwise
$d = 1 if $s < $t; 0 otherwise
if ($s == $t) pc += i * 4
if ($s != $t) pc += i * 4
pc = $s
temp = $s; $31 = pc; pc = temp

iiii
ssst
ssst
ssst
ssst
ssst
ssst
0000
0000
0000
ssst
ssst
ssst
ssst
ssst
ssst
sss0
sss0

iiii
tttt
tttt
tttt
tttt
tttt
tttt
0000
0000
0000
tttt
tttt
tttt
tttt
tttt
tttt
0000
0000

iiii
dddd
dddd
0000
0000
0000
0000
dddd
dddd
dddd
iiii
iiii
dddd
dddd
iiii
iiii
0000
0000

iiii
d000
d000
0000
0000
0000
0000
d000
d000
d000
iiii
iiii
d000
d000
iiii
iiii
0000
0000

iiii
0010
0010
0001
0001
0001
0001
0001
0001
0001
iiii
iiii
0010
0010
iiii
iiii
0000
0000

iiii
0000
0010
1000
1001
1010
1011
0000
0010
0100
iiii
iiii
1010
1011
iiii
iiii
1000
1001

When a word is stored to memory location 0xffff000c, the least-significant byte (eight bits) of the word are sent to the standard output.
Loading a word from memory location 0xffff0004 places the next byte from standard input into the least-significant byte of the destination register.

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