10.1109/TIE.2014.

2314052, IEEE Transactions on Industrial Electronics

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

A Step-Up Switched-Capacitor Multilevel

Inverter with Self Voltage Balancing
Yuanmao Ye, K.W.E. Cheng, Senior Member, IEEE, Junfeng Liu, and Kai Ding

Abstract The objective of this paper is to propose a new

inverter topology for multilevel voltage output. This topology is
designed based on switched-capacitor technique and the number
of output levels is determined by the number of switched-capacitor
cells. Only one dc voltage source is needed and the problem of
capacitor voltage balancing is avoided as well. This structure is
not only very simple and easy to be extended to higher level, its
gate driver circuits are also simplified because the number of
active switches is reduced. Operational principle of this inverter
and the targeted modulation strategies are presented, and power
losses are investigated as well. Finally, the performance of the
proposed multilevel inverter is evaluated with the experimental
results of an eleven-level prototype inverter.
Index
Terms Multilevel
inverter,
switched-capacitor,
H-bridge, sinusoidal PWM, selective harmonic elimination.

D1

C1

S1

S3

SC Cell

Di

Ci

Q1

io

D1

+
Qi

Dn

vo

Di

Cn
Dn

Qn
Q0

S2

S4

Vin

Fig. 1. The topology of the proposed multilevel inverter.

I. INTRODUCTION

ITH the increasingly higher power quality requirement for

numerous industrial applications and renewable energy

sources such as photovoltaic, wind, and fuel cells, classical
three-level inverters have difficulty to meet these requirements
of clean non-polluted sinusoidal waveforms and minimal
distortion factor. As a result, multilevel inverters have been
introduced as an alternative in high power quality situations. For
several attractive features such as near sinusoidal staircase
output voltage waveforms, reduced dv/dt stresses and operating
with lower switching frequency stress etc. [1], multilevel
inverters, as an alternative solution, have been receiving much
attention. As results, many different topologies and wide variety
of control strategies have been proposed [2].
Conventionally, multilevel inverter topologies can be divided
into three categories: neutral-point-clamped [3]; flying
capacitors [4]; and the H-bridge cascade [5]-[9]. In many
industrial applications, these inverters have been playing very
Manuscript received March 6, 2013; revised July 19, 2013 and November
12, 2013; accepted January 14, 2014.
Copyright (c) 2014 IEEE. Personal use of this material is permitted.
However, permission to use this material for any other purposes must be
obtained from the IEEE by sending a request to pubs-permissions@ieee.org.
This work was supported by the Innovation and Technology Fund of Hong
Kong under Project UIM/245.
The authors are with the Department of Electrical Engineering, The Hong
Kong Polytechnic University, Kowloon, Hong Kong (e-mail:
yuanmao.ye@connect.polyu.hk;
eeecheng@inet.polyu.edu.hk;
jf.liu@connect.polyu.hk; eekding@polyu.edu.hk).

important roles in the terms of high quality ac supplies and

motor driver because of their good performance [10], [11].
However, their drawbacks are also apparent. For instance,
multiple separated voltage sources are required for the H-bridge
cascade topologies [2], [6]-[9]. And the problem of voltage
balancing among dc link series capacitors exists in both
neutral-point-clamped and capacitor-clamped inverters
[12]-[14].
In recent years, numerous new multilevel inverter topologies
which cannot be attributed to the traditional three classifications
aforementioned have been reported in [2], [15]-[21].
Specifically, multiple sub-multilevel converter units and
full-bridge converters are employed in the new multilevel
inverter topology [15]. In [16], a simple topology is proposed
but multiple separated dc voltage sources are still required.
Coupled-inductor technique used in multilevel inverters has
been introduced in [2] and [17]. The structures are simplified
but it is difficult to expand this technique to higher levels
applications. In literatures [18], [20] and [21], novel topologies
based on switched-capacitor (SC) [22] and boost techniques are
presented but their numbers of output voltage levels are limited
at 13, 7 and 5, respectively. In contrast, the multilevel topology
introduced in [19] can be extended to higher levels. However,
the use of a large number of active switches increases the cost
and component counts in the terms of gate driver circuits and the
overall system.
Based on the SC technique which has been applied in many
applications [23], a novel multilevel inverter topology

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