ANNA UNIVERSITY CHENNAI-25

PRACTICAL EXAMINATIONS OCTOBER 2016.

REGULATION 2013
SUBJECT CODE/ NAME

: EC6311: ANALOG AND DIGITAL CIRCUITS LABORATORY

BRANCH

: B.E. - ELECTRONICS AND COMMUNICATION ENGINEERING

YEAR/SEM

: II/ III

DATE/SESSION:

QUESTION PAPER
Time: 3 Hours

Maximum Marks: 100

1. a. Construct and verify the frequency response of CE amplifier.

b. Design a gray to binary circuit and verify its truth table.

(50)
(50)

2. a. Construct and verify the frequency response of CC amplifier.

b. Design a binary to gray circuit and verify its truth table.

(50)
(50)

3. Construct and verify the frequency response of CB and CS amplifier.

(50+50)

4. Construct and verify the frequency response of Darlington amplifier.

(100)

5. Analyze the Transfer characteristics of Differential amplifier and measure the CMRR.
(100)
6.

Construct and verify the frequency response of Cascade amplifier.

(100)

7. Design a BCD to Excess-3 code and verify its truth table.

(100)

8. Construct and verify the frequency response of Cascode amplifier.

(100)

9. Design a Excess-3 code to BCD and verify its truth table.

(100)

10. a. Determine the bandwidth of single stage amplifier.

b. Simulate Common emitter amplifier using spice.

(50)
(50)

11. Construct and determine the bandwidth of multistage amplifier.

(100)

12. a. Construct and determine the ripple factor of Half wave rectifier.
b. Design a decoder using logic gates and verify its truth table.

(50)
(50)

13. a. Construct and determine the ripple factor of Full wave rectifier.
b. Design an encoder using logic gates and verify its truth table.

(50)
(50)

14. a. Design a 3-bit synchronous up-down counter and verify its truth table.
b. Simulate Common source amplifier using spice.

(50)
(50)

15. Design a 4 bit Ripple, MOD -10, MOD-12 counter using JK flip-flop and verify its truth
table.
(100)
16. Design a serial in serial out , serial in parallel out & parallel in parallel out shift register
and verify its truth table.
(100)
17. Design the binary adder & subtractor using IC 7483 & find the output for the following
inputs.
(100)
Adder
: (i) 1110 + 1010
(ii) 0001 +1100
Subtractor
: (i) 1000 - 1010
(ii) 1001- 0101
18. Design 4:1 MUX & 1:4 DEMUX using logic gates and verify its truth table.

(100)

19. Construct a Class-A power amplifier and determine the efficiency.

(100)

20. Construct a Class-B power amplifier and determine the efficiency.

(100)

INTERNAL EXAMINER
Mr.S.DINESH SUNDAR/AP/8213

EXTERNAL EXAMINER
Mrs.N.MANGAIYARKARASI/AP/8211