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OCSNM1/RMCSM1 Data Communication &

Network Principles, Section A 6


Error detection & correction

Feedback (backward) error control


Additional information is added to each
character or frame that has a high probability of
detecting errors but when an error is detected, a
retransmission is requested

Parity/VRC
BCC/LRC
CRC

Relevant section to read in Stallings' book: 6.3, 6.4


Relevant section to read in Halsalls book: 3.4
Certain information in these notes is intentionally left
blank and will be provided in the lecture
Data Communications, Ed. 2, D. Lauder

Approaches to error detection and correction

Section A 6, Page 1

Forward error control


Additional redundant information is added to
each character or frame that has a high
probability of detecting errors and also allows
errors to be corrected, e.g.:
______________________________________
CDs, Digital audio & TV broadcasting
Data Communications, Ed. 2, D. Lauder

Generation of a
parity bit

Parity bits

(Halsall Fig 3.14a)

A parity check detects all single bit errors


What is the Hamming distance for parity
2 (because valid code words differ by 2)
code? ____________________________
Data Communications, Ed. 2, D. Lauder

Section A 6, Page 2

Section A 6, Page 3

With even
parity, there is
always an even
number of logic
1 bits in the
(Halsall Fig 3.14c, d)
code word (i.e.
the data with the
parity bit added)
Data Communications, Ed. 2, D. Lauder

Section A 6, Page 4

Block sum check

(Halsall Fig 3.15ad)

Data Communications, Ed. 2, D. Lauder

(n, k) Block codes

Block Check
Character
(BCC)
significantly
reduces the
probability of
undetected
errors compared
to parity alone
Section A 6, Page 5

(7,4) block code (Hamming Code)


This is a 7 digit
codeword with 4
information digits
(I1 to I4) and
three parity check
digits (P1 to P3),
commonly
referred to as a
(7,4) block code.
Data Communications, Ed. 2, D. Lauder

Section A 6, Page 7

This is a
block coder
with k
information
digits going
in and n
digits
coming out

k information digits

Data Communications, Ed. 2, D. Lauder

n encoded digits

Block coder

Rate, R = k/n
k

n-k

Information
digits

Parity
digits

n digit codeword

Section A 6, Page 6

(7,4) block code - generation of check digits


This generates
three parity check
digits for a (7,4)
block code
P1 is the modulo2 sum of I1, I3
and I4. P2 is the
sum of I1, I2 and
I4. etc.

Data Communications, Ed. 2, D. Lauder

Section A 6, Page 8

(7,4) block code - example


For the data sequence 1011, the 3-input
modulo-2 adders count the total number of
ones which are present at the inputs, and
output the least significant bit as the binary
coded sum.
Thus P1 = 1, P2 = 0 and P3 = 0,
The coder output is 1011100.
Data Communications, Ed. 2, D. Lauder

Section A 6, Page 9

Properties of Cyclic Redundancy Check


(CRC) or Frame Check Sequence (FCS)
Unlike parity and BCC, polynomial codes
such as CRC with an R bit generator
polynomial will detect all burst errors of <R
bits and most burst errors >= R bits
For each frame transmitted, a CRC is
appended (usually 16 or 32 bits). Other
CRC on hard & floppy discs
applications? Sector
________________________
CRC is checked at the receiver and gives a
remainder of zero if there are no errors
Data Communications, Ed. 2, D. Lauder

Section A 6, Page 10

N.B. G(x) has n+1


CRC Generator Polynomials bits, with MSB
and LSB = 1

CRC Generation
Let M(x) be the message to be transmitted,
which is k bits long
An n bit CRC is added such that k>n
Let G(x) be the divisor or generator which
is an (n+1) bit number
Let R(x) be the remainder which is the n bit
CRC. The CRC is appended to the message
before transmission

CRC-16, G(x) = x16+x15+x2+1


Binary form, G(x) = 1 1000 0000 0000 0101
CRC-CCITT, G(x) = x16+x12+x5+1
Binary form, G(x) = 1 0001 0000 0010 0001
CRC-32, G(x) = x32+x26+x23+x16+x12+x11
+x10+x8+x7+x5+x4+x2+1
Binary form, G(x) = 1 0000 0100 1000 0001
0001 1101 1011 0101

Data Communications, Ed. 2, D. Lauder

Data Communications, Ed. 2, D. Lauder

Section A 6, Page 11

Section A 6, Page 12

CRC example

CRC Generation example

A practical application of a CRC is CRC-32


on Ethernet LANs with a frame length up to
1518 bytes (12144 bits)
As an example for ease of calculation, an 8
bit message with a 4 bit CRC will be used
Let generator G(x) = x4+x3+1
11001
In binary form, G(x) = ________
1110 0110
Let message M(x) = ___________
Data Communications, Ed. 2, D. Lauder

Section A 6, Page 13

0000 is
appended
to message
(message is
multiplied
by 2n), then
CRC is
calculated

Indicates Bitwise
Exclusive OR operation
Transmitted
frame =
1110 0110 0110
Message CRC
(Halsall Fig 3.17a)

Data Communications, Ed. 2, D. Lauder

Decimal long division versus binary Modulo2 long division

Section A 6, Page 14

CRC Checking Example

Errors are
detected
whether
they are in
the message
bits or CRC
bits
(Halsall Fig 3.17b)

Data Communications, Ed. 2, D. Lauder

Section A 6, Page 15

Data Communications, Ed. 2, D. Lauder

Section A 6, Page 16

CRC generation by
hardware
Example shows 8 bit
message with 4 bit
CRC
The FCS shift
register contains all
0 bits initially
The data is sent
serially, followed by
the CRC
(Halsall Fig 3.18a)
Data Communications, Ed. 2, D. Lauder

Section A 6, Page 17

(Halsall Fig 3.18b)

Data Communications, Ed. 2, D. Lauder

CRC checking by
hardware
The serial data is
received followed by
the CRC
After the data and
CRC have been
received, the FCS
shift register should
contain all 0 bits if
there are no errors
Section A 6, Page 18

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