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Nagaraj Chandrashekar Siddeshwar

Apartment 7,2747, Glenwood Ct., Boulder, CO-80304 |


nasi8225@colorado.edu | Phone - +1 720 755 7271
OBJECTIVE

To be a part of an organization in which I am able to show innovation, to contribute towards


the growth of the organization and add value to organization and self.
EDUCATION

Aug 2016 Present


[ University of Colorado Boulder]
[Masters in Electrical Engineering]

[Boulder, CO]

2009 2013
[Visvesvaraya Technological University] [India]
[Bachelor in Electronics and Communication Engineering]

Aggregate 78%

WORK EXPERIENCE

07/2013 - 07/2016 [UTC Aerospace Systems]

[ Electronics Design Engineer]

Responsible for the complete Product Design and Development of Boeing 777x Generator Control
Unit
Responsible for the design and development of Automated Test Equipment of Boeing 777x
Generator Control Unit and Boeing 777x Bus Power Control Unit
Responsible for the complete Product Design and Development of Airbus A320 Neo Electronic
Engine Control
Responsible for the design and development of Automated Test Equipment of Airbus A320 Neo
Electronic Engine Control
Responsible for the design and development of Embraer KC-390 Flight Control Electronics
Module
Responsible in the procurement of Thermostream Test Equipment for Testing of Firmware
through Localized Heating
Responsible in the procurement of Tektronix Logic Analyser for Testing of Firmware with High
Speed Interfaces
Filed an Invention Disclosure for proposing a new Design of Voltage Protection of Analog Signals
upto a resolution of 1 V
Filed an Invention Disclosure for proposing a new Design of Frequency Protection of Analog
Signals using discrete components up to a resolution of 0.6 Hz

SKILLS

[India]

Programming Languages: C, Java, HDL


Scripting Languages: Python
Web Technologies: HTML 5, CSS, JavaScript
Tools: Cadence, LT Spice, Saber, Quartus Prime 15.1, Code Blocks, Eclipse IDE, Python IDE,
MS Office, MS Visio
Source Control: DOORs, GitHub
Standards : DO -160, DO-254

ACADEMIC PROJECTS

An FPGA based Implementation of Effective Removal of White Noise in Images


Developed a VHDL algorithm for removing White Noise from images in Xilinx 10.1 IDE
and implemented on Xilinx Spartan 3 FPGA.
An FPGA Based Finger Temperature Sensing Device
Developed a VHDL Code to sense Finger Temperature in Quartus Prime 15.1 and
implemented on Altera MAX 10 FPGA Board
A Hotel Menu cum Billing Application
Developed an application for Hotel Menu and billing on Java using Eclipse IDE
Media Player for Windows
Developed a Media Player to play .mp4 files for Windows on Java using Eclipse IDE

AWARDS AND ACCOMPLISHMENTS

UTC Partner award from UTC Aerospace Systems for an exemplary contribution to Boeing
777x Generator Control Unit Design
Employee of the Month award from UTC Aerospace Systems recognizing individual
contribution

DISCLAIMER

I hereby agree that all the above furnished data are true as per my knowledge.
Date: Sept - 17 - 2016

Place Boulder, CO, USA


Nagaraj Chandrashekar Siddeshwar

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