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Profissional Documentos
Cultura Documentos
HTQFP
QFN
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FEATURES
APPLICATIONS
Televisions
DESCRIPTION
The TPA3100D2 is a 20-W (per channel) efficient,
Class-D audio power amplifier for driving bridged-tied
stereo speakers. The TPA3100D2 can drive stereo
speakers as low as 4 . The high efficiency of the
TPA3100D2, 92%, eliminates the need for an
external heat sink when playing music.
The gain of the amplifier is controlled by two gain
select pins. The gain selections are 20, 26, 32,
36 dB.
The outputs are fully protected against shorts to
GND, VCC, and output-to-output shorts with an auto
recovery feature and monitor output.
RINP
1 mF
RINN
TV Audio
Processor
0.22 mF
TPA3100D2
1 mF
LINN
1 mF
BSRN
ROUTN
ROUTP
BSRP
LINP
Shutdown
Control
Mute Control
Gain Select
PGNDR
10 nF
VREG
MUTE
GAIN0
MSTR/SLV
Sync Control
SYNC
10 V to 26 V
1 mF
SHUTDOWN
FAULT
PVCCR
PVCCL
AVCC
AGND
1 mF
VBYP
ROSC
100 kW
GAIN1
Fault Flag
0.22 mF
VCLAMPR
BSLN
LOUTN
0.22 mF
LOUTP
BSLP
VCLAMPL
PGNDL
0.22 mF
1 mF
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Supply voltage
VI
Input voltage
AVCC, PVCC
0.3 V to 30 V
SHUTDOWN, MUTE
TA
40C to 85C
TJ
40C to 150C
Tstg
65C to 150C
RLoad
Load Resistance
3.2 Minimum
Human body model
Electrostatic discharge
Machine model
(4)
(3)
(2)
(3)
(4)
(5)
2 kV
(all pins)
Charged-device model
(1)
(all pins)
(5)
200 V
(all pins)
500 V
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operations of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The TPA3100D2 incorporates an exposed thermal pad on the underside of the chip. This acts as a heatsink, and it must be connected
to a thermally dissipating plane for proper power dissipation. Failure to do so may result in the device going into thermal protection
shutdown. See TI Technical Briefs SCBA017D and SLUA271 for more information about using the QFN thermal pad. See TI Technical
Briefs SLMA002 for more information about using the HTQFP thermal pad.
In accordance with JEDEC Standard 22, Test Method A114-B.
In accordance with JEDEC Standard 22, Test Method A115-A
In accordance with JEDEC Standard 22, Test Method C101-A
THERMAL INFORMATION
THERMAL METRIC (1)
TPA3100D2
(2)
25
28.7
qJA
qJCtop
16.5
19.2
qJB
12.8
12.4
yJT
0.2
0.2
yJB
4.9
6.6
qJCbot
1.0
0.7
(1)
(2)
UNITS
C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.
TEST CONDITIONS
Supply voltage
PVCC, AVCC
VIH
VIL
MIN
MAX
10
26
UNIT
V
V
0.8
TPA3100D2
www.ti.com
TEST CONDITIONS
MIN
MAX
UNIT
125
75
SHUTDOWN, VI = 0, VCC = 24 V
IIL
VOH
FAULT, IOH = 1 mA
VOL
FAULT, IOL = -1 mA
fOSC
Oscillator frequency
TA
VREG - 0.6
V
AGND + 0.4
200
300
kHz
40
85
DC CHARACTERISTICS
TA = 25C, VCC = 24 V, RL = 8 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
VI = 0 V, Gain = 36 dB
VBYP, no load
PSRR
ICC
22
26.5
ICC(SD)
180
250
ICC(MUTE)
10
mA
rDS(on)
| VOS |
GAIN1 = 0.8 V
G
Gain
GAIN1 = 2 V
50
1.1
1.25
1.45
3.75
4.25
-70
mV
dB
High Side
200
Low side
200
Total
400
500
mA
GAIN0 = 0.8 V
19
20
21
GAIN0 = 2 V
25
26
27
GAIN0 = 0.8 V
31
32
33
GAIN0 = 2 V
35
36
37
dB
dB
Gain matching
Between channels
tON
Turn-on time
C(VBYP) = 1 F, SHUTDOWN = 2 V
2%
25
ms
tOFF
Turn-off time
0.1
ms
DC CHARACTERISTICS
TA = 25C, VCC = 12 V, RL = 8 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
VI = 0 V, Gain = 36 dB
VBYP, no load
VREG, no load
PSRR
ICC
18
22.5
ICC(SD)
80
200
ICC(MUTE)
mA
| VOS |
50
1.1
1.25
1.45
3.75
4.25
-70
dB
mV
mA
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
www.ti.com
DC CHARACTERISTICS (continued)
TA = 25C, VCC = 12 V, RL = 8 (unless otherwise noted)
PARAMETER
rDS(on)
TEST CONDITIONS
VCC = 12 V, IO = 500 mA,
TJ = 25C
GAIN1 = 0.8 V
Gain
GAIN1 = 2 V
MIN
TYP MAX
High Side
200
Low side
200
Total
400
500
UNIT
m
GAIN0 = 0.8 V
19
20
21
GAIN0 = 2 V
25
26
27
GAIN0 = 0.8 V
31
32
33
GAIN0 = 2 V
35
36
37
dB
dB
tON
Turn-on time
C(VBYP) = 1 F, SHUTDOWN = 2 V
25
ms
tOFF
Turn-off time
0.1
ms
AC CHARACTERISTICS
TA = 25C, VCC = 24 V, RL = 8 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
70
dB
20.6
21.8
KSVR
PO
THD+N
Vn
Crosstalk
Signal-to-noise ratio
SNR
TYP
0.11%
100
80
dBV
92
dB
102
dB
150
30
AC CHARACTERISTICS
TA = 25C, VCC = 12 V, RL = 8 (unless otherwise noted)
PARAMETER
KSVR
PO
THD+N
Vn
SNR
TEST CONDITIONS
TYP
70
9.4
10
15.6
16.4
RL = 8 , f = 1 kHz, PO = 5 W (half-power)
0.11%
RL = 4 , f = 1 kHz, PO = 8 W (half-power)
0.15%
Crosstalk
Signal-to-noise ratio
MIN
MAX
UNIT
dB
100
80
dBV
94
dB
98
dB
150
30
TPA3100D2
www.ti.com
AVCC
NC
FAULT
MUTE
SHUTDOWN
BSRP
ROUTP
ROUTP
ROUTN
ROUTN
BSRN
NC
48 47 46 45 44 43 42 41 40 39 38 37
NC
RINN
RINP
AGND
LINP
LINN
NC
GAIN0
GAIN1
MSTR/SLV
SYNC
NC
48 47
36
35
34
33
5
6
7
32
Exposed
Thermal Pad
31
30
29
28
10
27
11
26
12
25
NC
PVCCR
PVCCR
PGNDR
PGNDR
VCLAMPR
VCLAMPL
PGNDL
PGNDL
PVCCL
PVCCL
NC
GND
RINN
RINP
AGND
LINP
LINN
GAIN0
GAIN0
GAIN1
MSTR/SLV
SYNC
GND
13 14 15 16 17 18 19 20 21 22 23 24
46 45 44 43 42 41 40 39 38 37
36
35
34
33
32
Exposed
Thermal Pad
6
7
31
30
29
28
10
27
11
26
12
25
GND
PVCCR
PVCCR
PGNDR
PGNDR
VCLAMPR
VCLAMPL
PGNDL
PGNDL
PVCCL
PVCCL
GND
GND
ROSC
VREG
VBYP
AGND
BSLP
LOUTP
LOUTP
LOUTN
LOUTN
BSLN
GND
NC
ROSC
VREG
VBYP
AGND
BSLP
LOUTP
LOUTP
LOUTN
LOUTN
BSLN
NC
13 14 15 16 17 18 19 20 21 22 23 24
TERMINAL FUNCTIONS
TERMINAL
QFN
NO.
HTQFP
NO.
I/O
SHUTDOWN
44
44
RINN
RINP
LINN
LINP
GAIN0
7, 8
Gain select least significant bit. TTL logic levels with compliance to VREG.
GAIN1
Gain select most significant bit. TTL logic levels with compliance to VREG.
NAME
1, 12, 13,
24, 25, 36,
37
GND
DESCRIPTION
MUTE
45
45
FAULT
46
46
BSLP
18
18
I/O
PVCCL
26, 27
26, 27
LOUTP
19, 20
19, 20
PGNDL
28, 29
28, 29
LOUTN
21, 22
21, 22
BSLN
23
23
I/O
VCLAMPL
30
30
VCLAMPR
31
31
BSRN
38
38
I/O
ROUTN
39, 40
39, 40
PGNDR
32, 33
32, 33
Power supply for left channel H-bridge, not internally connected to PVCCR
or AVCC.
O
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
www.ti.com
QFN
NO.
HTQFP
NO.
I/O
ROUTP
41, 42
41, 42
PVCCR
34, 35
34, 35
DESCRIPTION
Class-D 1/2-H-bridge positive output for right channel.
Power supply for right channel H-bridge, not connected to PVCCL or AVCC.
BSRP
43
43
AGND
4, 17
4, 17
ROSC
14
14
I/O
MSTR/SLV
10
10
SYNC
11
11
I/O
VBYP
16
16
VREG
15
15
4-V regulated output for use by internal cells, GAINx, MUTE, and
MSTR/SLV pins only. Not specified for driving other external circuitry.
AVCC
48
47, 48
Thermal Pad
1, 7, 12,
13, 24, 25,
36, 37, 47
NC
I/O
Connect to AGND and PGND should be star point for both grounds.
Internal resistive connection to AGND and PGND. Thermal vias on the PCB
should connect this pad to a large copper area on an internal or bottom
layer for the best thermal performance. The Thermal Pad must be soldered
to the PCB for mechanical reliability.
TPA3100D2
www.ti.com
PVCCR
VCLAMPR
PVCCR
VBYP
BSRN
VBYP
AVCC
AVCC
Gain
RINN
Gate
Drive
Gain
Control
RINP
ROUTN
VClamp
Gen
PWM
Logic
PVCCR
VBYP
GAIN0
GAIN1
BSRP
Gain
Control
Gate
Drive
To Gain Adj.
Blocks and
Startup Logic
ROUTP
Gain
FAULT
PGNDR
SC
Detect
VBYP AVCC
Thermal
ROSC
VREG
Ramp
Generator
SYNC
Startup
Protection
Logic
Biases
and
References
MSTR/SLV
VREGok
PVCCL
AVCC
PVCCL
VCCok
VREG
VREG
4V Reg
PVCCL
SHUTDOWN
TLL Input
Buffer
(VCC Compliant)
MUTE
TLL Input
Buffer
(VCC Compliant)
BSLN
Gate
Drive
Gain
LINP
LOUTN
VClamp
Gen
VBYP
LINN
VCLAMPL
Gain
Control
PVCCL
BSLP
PWM
Logic
Gate
Drive
Gain
LOUTP
PGNDL
AGND
TYPICAL CHARACTERISTICS
Table 1. TABLE OF GRAPHS (1)
FIGURE
THD+N
vs Frequency
1, 2, 3, 4
THD+N
vs Output power
5, 6, 7, 8
Closed-loop response
vs Frequency
9, 10
Output power
vs Supply voltage
11. 12
Efficiency
vs Output power
13, 14
Supply current
15, 16
Crosstalk
vs Frequency
17, 18
vs Frequency
19, 20
VCC
kSVR
(1)
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
www.ti.com
RL = 8 W,
Gain = 20 dB
1
PO = 5 W
0.1
PO = 2.5 W
PO = 0.5 W
0.01
0.005
0.003
20
10
10
VCC = 12 V,
100
10k 20k
1k
f - Frequency - Hz
RL = 8 W,
Gain = 20 dB
1
PO = 10 W
0.1
PO = 5 W
0.01
PO = 1 W
0.005
0.003
20
100
10k 20k
VCC = 24 V,
1
PO = 10 W
0.1
PO = 5 W
PO = 1 W
0.01
100
1k
f - Frequency - Hz
10k 20k
VCC = 12 V,
RL = 4 W,
Gain = 20 dB
PO = 5 W
PO = 10 W
0.1
PO = 1 W
0.01
0.005
0.003
20
Figure 3.
1k
f - Frequency - Hz
Figure 2.
RL = 8 W,
Gain = 20 dB
0.005
0.003
20
VCC = 18 V,
Figure 1.
10
100
1k
f - Frequency - Hz
10k 20k
Figure 4.
TPA3100D2
www.ti.com
10
VCC = 12 V,
RL = 8 W,
Gain = 32 dB
10 kHz
0.1
0.05
1 kHz
0.02
20 Hz
0.01
10m
100m 200m
10 V = 18 V,
CC
RL = 8 W,
Gain = 32 dB
10 kHz
0.1
0.05
1 kHz
20 Hz
0.02
0.01
10m
10 20 40
100m 200m
PO - Output Power - W
Figure 5.
Figure 6.
10
VCC = 24 V,
RL = 8 W,
Gain = 32 dB
10 kHz
0.1
0.05
1 kHz
20 Hz
0.02
0.01
10m
10 20 40
PO - Output Power - W
100m 200m
10 20 40
10
VCC = 12 V,
RL = 4 W,
Gain = 32 dB
1
10 kHz
0.1
1 kHz
0.05
20 kHz
0.02
0.01
10m
100m 200m
10 20 40
PO - Output Power - W
PO - Output Power - W
Figure 7.
Figure 8.
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
www.ti.com
Gain dB
25
150
35
100
30
50
25
Phase
20
15
VCC = 12 V
RL = 8 W
VI = 0.1 Vrms
10
CI = 10 mF
Gain = 32 dB
RC Filter = 100 W, 10 nF
5
0
10
100
1k
10k
200
Gain
100
50
Phase
20
50
15
100
10
150
200
100k
0
50
VCC = 24 V
RL = 8 W
VI = 0.1 Vrms
100
CI = 10 mF
Gain = 32 dB
RC Filter = 100 W, 10 nF
150
10
100
f Frequency Hz
1k
200
100k
10k
f Frequency Hz
Figure 9.
Figure 10.
OUTPUT POWER
vs
SUPPLY VOLTAGE
OUTPUT POWER
vs
SUPPLY VOLTAGE
35
50
45
150
Phase
30
40
Phase
Gain
35
200
Gain dB
40
RL = 8 W
Gain = 20 dB
RL = 4 W
Gain = 20 dB
30
PO Output Power W
PO Output Power W
40
35
30
25
THD+N = 10%
20
THD+N = 1%
15
25
THD+N = 10%
20
15
THD+N = 1%
10
10
Power Represented by
Dash Lines May Require
More Heatsinking.
5
0
10
12
14
16
18
20
22
24
26
Power Represented by
Dash Lines May Require
More Heatsinking.
28
0
10
12
13
14
15
16
Figure 11.
10
11
Figure 12.
TPA3100D2
www.ti.com
EFFICIENCY
vs
OUTPUT POWER
100
100
VCC = 12 V
90
90
80
80
VCC = 18 V
60
VCC = 24 V
50
VCC = 12 V
70
Efficiency %
70
Efficiency %
EFFICIENCY
vs
OUTPUT POWER
40
60
50
40
30
30
20
20
RL = 8 W
Gain = 32 dB
10
RL = 4
Gain = 32 dB
10
0
0
0
10
12
14
16
18
20
10
12
14 15
Figure 13.
Figure 14.
SUPPLY CURRENT
vs
TOTAL OUTPUT POWER
SUPPLY CURRENT
vs
TOTAL OUTPUT POWER
2.5
3.5
RL = 8
Gain = 20 dB
VCC = 18 V
RL = 4
Gain = 20 dB
VCC = 12 V
1.5
VCC = 24 V
2.5
VCC = 12 V
2
1.5
1
0.5
Power Represented by
Dash Lines May Require
More Heatsinking.
0
10
20
30
Power Represented by
Dash Lines May Require
More Heatsinking.
0.5
40
Figure 15.
10
20
30
40
Figure 16.
11
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
www.ti.com
CROSSTALK
vs
FREQUENCY
CROSSTALK
vs
FREQUENCY
-40
-40
60
VCC = 12 V
RL = 8
Gain = 20 dB
VO = 1 Vrms
60
VCC = 24 V
RL = 8
Gain = 20 dB
VO = 1 Vrms
L to R
80
R to L
100
Crosstalk dB
Crosstalk dB
L to R
R to L
100
120
120
140
20
80
100
1k
140
20
10k 20k
100
Figure 17.
Figure 18.
20
30
40
50
60
70
80
90
100
20
100
1k
10k 20k
10
20
VCC = 18 V
RL = 8
Gain = 20 dB
V(RIPPLE) = 200 mVPP
30
40
50
60
70
80
90
100
20
f Frequency Hz
100
1k
10k 20k
f Frequency Hz
Figure 19.
12
10k 20k
0
VCC = 12 V
RL = 8
Gain = 20 dB
V(RIPPLE) = 200 mVPP
0
10
1k
f Frequency Hz
f Frequency Hz
Figure 20.
TPA3100D2
www.ti.com
Fault Output
Shutdown
and Mute
Control
APPLICATION INFORMATION
33 mH
1 nF
1 mF
20 W
8W
1 mF
1 nF
33 mH
20 W
10 V - 26 V
220nF
220nF
10 mF
Differential
Analog
Inputs
NC
BSRN
ROUTN
ROUTN
ROUTP
BSRP
ROUTP
MUTE
RINN
SHUTDOWN
1 mF
NC
NC
FAULT
AVCC
1 mF
NC
10 V - 26 V
1 mF
PVCCR
RINP
PVCCR
AGND
PGNDR
LINP
PGNDR
220 mF
1 mF
1 mF
1 mF
LINN
VCLAMPR
TPA3100D2
100 kW
BSLN
LOUTN
BSLP
LOUTN
PVCCL
NC
LOUTP
SYNC
LOUTP
PVCCL
AGND
PGNDL
MSTR/SLV
VBYP
GAIN1
VREG
PGNDL
NC
Synchronize Multiple
Class-D Devices
GAIN0
ROSC
4-Step
Gain Control
1 mF
VCLAMPL
NC
NC
1 mF
NC
220 mF
1 mF
10 V - 26 V
220nF
220nF
1 nF
10 nF
20 W
1 mF
1 nF
33 mH
1 mF
8W
20 W
33 mH
1 mF
13
TPA3100D2
Shutdown
and Mute
Control
www.ti.com
Fault Output
1 nF
33 mH
1 mF
20 W
8W
1 mF
1 nF
33 mH
20 W
10 V - 26 V
220nF
220nF
10 mF
Single-Ended
Analog
Inputs
NC
BSRN
ROUTN
ROUTN
ROUTP
BSRP
ROUTP
MUTE
RINN
SHUTDOWN
1 mF
NC
NC
FAULT
AVCC
1 mF
NC
10 V - 26 V
1 mF
PVCCR
RINP
PVCCR
AGND
PGNDR
LINP
PGNDR
220 mF
1 mF
1 mF
1 mF
VCLAMPR
TPA3100D2
100 kW
BSLN
BSLP
LOUTN
PVCCL
NC
LOUTN
SYNC
LOUTP
PVCCL
LOUTP
MSTR/SLV
VBYP
PGNDL
AGND
GAIN1
VREG
PGNDL
NC
Synchronize Multiple
Class-D Devices
GAIN0
ROSC
4-Step
Gain Control
1 mF
VCLAMPL
NC
NC
1 mF
LINN
NC
220 mF
1 mF
10 V - 26 V
220nF
220nF
1 nF
10 nF
20 W
1 mF
1 nF
33 mH
1 mF
8W
20 W
33 mH
1 mF
14
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
Fault Output
Shutdown
and Mute
Control
www.ti.com
33 mH
1 nF
1 mF
20 W
8W
1 mF
1 nF
33 mH
20 W
10 V - 26 V
220nF
220nF
10 mF
Differential
Analog
Inputs
BSRN
GND
ROUTN
ROUTN
ROUTP
ROUTP
BSRP
MUTE
FAULT
RINN
SHUTDOWN
1 mF
AVCC
GND
AVCC
1 mF
10 V - 26 V
GND
1 mF
PVCCR
RINP
PVCCR
AGND
PGNDR
220 mF
1 mF
1 mF
LINP
PGNDR
1 mF
TPA3100D2
LINN
VCLAMPR
1 mF
BSLN
BSLP
GND
PVCCL
GND
LOUTN
SYNC
LOUTP
PVCCL
LOUTN
MSTR/SLV
LOUTP
PGNDL
AGND
GAIN1
VBYP
PGNDL
VREG
GAIN0
GND
Synchronize Multiple
Class-D Devices
VCLAMPL
ROSC
4-Step
Gain Control
GAIN0
1 mF
220 mF
1 mF
GND
10 V - 26 V
100 kW
220nF
220nF
10 nF
1 nF
1 mF
20 W
1 nF
33 mH
1 mF
8W
20 W
33 mH
1 mF
15
TPA3100D2
www.ti.com
Fault Output
Shutdown
and Mute
Control
33 mH
1 nF
1 mF
20 W
8W
1 mF
1 nF
33 mH
20 W
10 V - 26 V
220nF
220nF
10 mF
Single-Ended
Analog
Inputs
RINN
BSRN
GND
ROUTN
ROUTN
ROUTP
BSRP
ROUTP
MUTE
FAULT
SHUTDOWN
1 mF
AVCC
GND
AVCC
1 mF
10 V - 26 V
GND
1 mF
PVCCR
RINP
PVCCR
AGND
PGNDR
220 mF
1 mF
1 mF
LINP
PGNDR
1 mF
TPA3100D2
LINN
VCLAMPR
1 mF
BSLN
BSLP
GND
PVCCL
GND
LOUTN
SYNC
LOUTN
PVCCL
LOUTP
MSTR/SLV
LOUTP
PGNDL
AGND
GAIN1
VBYP
PGNDL
VREG
GAIN0
ROSC
Synchronize Multiple
Class-D Devices
VCLAMPL
GND
4-Step
Gain Control
GAIN0
1 mF
220 mF
1 mF
GND
10 V - 26 V
100 kW
220nF
10 nF
220nF
1 nF
1 mF
20 W
1 nF
33 mH
1 mF
8W
20 W
33 mH
1 mF
16
TPA3100D2
www.ti.com
CLASS-D OPERATION
This section focuses on the class-D operation of the TPA3100D2.
OUTP
OUTN
+12 V
Differential Voltage
Across Load
0V
-12 V
Current
Figure 25. Traditional Class-D Modulation Scheme's Output Voltage and Current Waveforms into an
Inductive Load With No Input
17
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
www.ti.com
OUTP
OUTN
Differential
Voltage
Across
Load
Output = 0 V
+12 V
0V
-12 V
Current
OUTP
OUTN
Differential
Voltage
Across
Load
Output > 0 V
+12 V
0V
-12 V
Current
Figure 26. The TPA3100D2 Output Voltage and Current Waveforms Into an Inductive Load
18
TPA3100D2
www.ti.com
Most applications require a ferrite bead filter. The ferrite filter reduces EMI around 1 MHz and higher (FCC and
CE only test radiated emissions greater than 30 MHz). When selecting a ferrite bead, choose one with high
impedance at high frequencies, but low impedance at low frequencies.
Use an LC output filter if there are low frequency (<1 MHz) EMI-sensitive circuits and/or there are long wires
from the amplifier to the speaker.
When both an LC filter and a ferrite bead filter are used, the LC filter should be placed as close as possible to
the IC followed by the ferrite bead filter.
33 mH
OUTP
L1
C2
1 mF
33 mH
OUTN
L2
C3
1 mF
Figure 27. Typical LC Output Filter, Cutoff Frequency of 28 kHz, Speaker Impedance = 8
15 mH
OUTP
L1
C2
2.2 mF
15 mH
OUTN
L2
C3
2.2 mF
Figure 28. Typical LC Output Filter, Cutoff Frequency of 28 kHz, Speaker Impedance = 4
Ferrite
Chip Bead
OUTP
1 nF
Ferrite
Chip Bead
OUTN
1 nF
Figure 29. Typical Ferrite Chip Bead Filter (Chip Bead Example: Fair-Rite 2512067007Y3)
19
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
www.ti.com
Using the LC filter in Figure 27, the TPA3100D2 EMI EVM passed the FCC Part 15 Class B radiated emissions
with 21-inch speaker wires. Quasi-peak measurements were taken for the 4 standard test configurations, and the
TPA3100D2 EVM passed with at least 17-dB margin. A plot of the peak measurement for the horizontal rear
configuration is shown in Figure 30.
National Technical Systems, Plano TX
Radiated Emissions 30 MHz - 1000 MHz
FCC B
70
60
FCC B Limit
50
40
30
Peak dB
20
20
0
30 M
230 M
430 M
630 M
f - Frequency - Hz
830 M
20
TPA3100D2
www.ti.com
Closest Competitor
V - Voltage = 1 V/div
V - Voltage = 10 V/div
TPA3100D2
Closest Competitor
t - Time = 20 ms/div
INPUT IMPEDANCE
(k)
TYP
TYP
20
32
26
16
32
16
36
16
GAIN1
GAIN0
0
1
1
INPUT RESISTANCE
Changing the gain setting can vary the input resistance of the amplifier from its smallest value, 16 k 20%, to
the largest value, 32 k 20%. As a result, if a single capacitor is used in the input high-pass filter, the -3 dB or
cutoff frequency may change when changing gain steps.
21
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
www.ti.com
Zf
Ci
IN
Input
Signal
Zi
The -3-dB frequency can be calculated using Equation 1. Use the ZI values given in Table 2.
f =
1
2p Zi Ci
(1)
INPUT CAPACITOR, CI
In the typical application, an input capacitor (CI) is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, CI and the input impedance of the amplifier (ZI) form a
high-pass filter with the corner frequency determined in Equation 2.
-3 dB
fc =
1
2p Zi Ci
fc
(2)
The value of CI is important, as it directly affects the bass (low-frequency) performance of the circuit. Consider
the example where ZI is 20 k and the specification calls for a flat bass response down to 20 Hz. Equation 2 is
reconfigured as Equation 3.
Ci =
1
2p Zi fc
(3)
In this example, CI is 0.4 F; so, one would likely choose a value of 0.47 mF as this value is commonly used. If
the gain is known and is constant, use ZI from Table 2 to calculate CI. A further consideration for this capacitor is
the leakage path from the input source through the input network (CI) and the feedback network to the load. This
leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially
in high gain applications. For this reason, a low-leakage tantalum or ceramic capacitor is the best choice. When
polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most
applications as the dc level there is held at 2 V, which is likely higher than the source dc level. Note that it is
important to confirm the capacitor polarity in the application. Additionally, lead-free solder can create dc offset
voltages and it is important to ensure that boards are cleaned properly.
Power Supply Decoupling, CS
The TPA3100D2 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling
to ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is
achieved by using two capacitors of different types that target different types of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR)
ceramic capacitor, typically 0.1 mF to 1 F placed as close as possible to the device VCC lead works best. For
filtering lower frequency noise signals, a larger aluminum electrolytic capacitor of 220 mF or greater placed near
the audio power amplifier is recommended. The 220 mF capacitor also serves as local storage capacitor for
supplying current during large signal transients on the amplifier outputs. The PVCC terminals provide the power
to the output transistors, so a 220 F or larger capacitor should be placed on each PVCC terminal. A 10 F
capacitor on the AVCC terminal is adequate.
22
TPA3100D2
www.ti.com
IC Output Snubbers
1-nF capacitors in series with 20- resistors from the outputs of the TPA3100D2 IC to ground are switching
snubbers. These are illustrated in Figure 33. They linearize switching transitions and reduce overshoot and
ringing. By doing so they improve THD+N, reducing it by a factor near 3 at 1kHz, 1W; and they improve EMC by
2 to 6 dB at middle frequencies. They increase quiescent current by 5 to 15 mA depending on power supply
voltage.
OUTP
OUTN
1 nF
20 W
1 nF
20 W
23
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
www.ti.com
A secondary function of the VBYP capacitor is to filter high-frequency noise on the internal 1.25-V bias generator.
A value of at least 0.47F is recommended for the VBYP capacitor. For the best power-up and shutdown pop
performance, the VBYP capacitor should be greater than or equal to the input capacitors.
ROSC Resistor Selection
The resistor connected to the ROSC terminal controls the class-D output switching frequency using Equation 4:
1
FOSC =
2 x ROSC x COSC
(4)
COSC is an internal capacitor that is nominally equal to 20 pF. Variation over process and temperature can
result in a 15% change in this capacitor value.
For example, if ROSC is fixed at 100 k, the frequency from device to device with this fixed resistance could
vary from 217 kHz to 294 kHz with a 15% variation in the internal COSC capacitor. The tolerance of the ROSC
resistor should also be considered to determine the range of expected switching frequencies from device to
device. It is recommended that 1% tolerance resistors be used.
Differential Input
The differential input stage of the amplifier cancels any noise that appears on both input lines of the channel. To
use the TPA3100D2 with a differential source, connect the positive lead of the audio source to the INP input and
the negative lead from the audio source to the INN input. To use the TPA3100D2 with a single-ended source, ac
ground the INP or INN input through a capacitor equal in value to the input capacitor on INN or INP and apply
the audio source to either input. In a single-ended input application, the unused input should be ac grounded at
the audio source instead of at the device input for best noise performance.
SHUTDOWN OPERATION
The TPA3100D2 employs a shutdown mode of operation designed to reduce supply current (ICC) to the absolute
minimum level during periods of nonuse for power conservation. The SHUTDOWN input terminal should be held
high (see specification table for trip point) during normal operation when the amplifier is in use. Pulling
SHUTDOWN low causes the outputs to mute and the amplifier to enter a low-current state. Never leave
SHUTDOWN unconnected, because amplifier operation would be unpredictable.
For the best power-off pop performance, place the amplifier in the shutdown or mute mode prior to removing the
power supply voltage.
MUTE Operation
The MUTE pin is an input for controlling the output state of the TPA3100D2. A logic high on this terminal
disables the outputs. A logic low on this pin enables the outputs. This terminal may be used as a quick
disable/enable of outputs when changing channels on a television or transitioning between different audio
sources.
The MUTE terminal should never be left floating. For power conservation, the SHUTDOWN terminal should be
used to reduce the quiescent current to the absolute minimum level.
The MUTE terminal can also be used with the FAULT output to automatically recover from a short-circuit event.
When a short-circuit event occurs, the FAULT terminal transitions high indicating a short-circuit has been
detected. When directly connected to MUTE, the MUTE terminal transitions high, and clears the internal fault
flag. This causes the FAULT terminal to cycle low, and normal device operation resumes if the short-circuit is
removed from the output. If a short remains at the output, the cycle continues until the short is removed.
If external MUTE control is desired, and automatic recovery from a short-circuit event is also desired, an OR gate
can be used to combine the functionality of the FAULT output and external MUTE control, see Figure 34.
24
TPA3100D2
www.ti.com
TPA3100D2
External GPIO
Control
MUTE
FAULT
25
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
www.ti.com
THERMAL PROTECTION
Thermal protection on the TPA3100D2 prevents damage to the device when the internal die temperature
exceeds 150C. There is a 15C tolerance on this trip point from device to device. Once the die temperature
exceeds the thermal set point, the device enters into the shutdown state and the outputs are disabled. This is not
a latched fault. The thermal fault is cleared once the temperature of the die is reduced by 30C. The device
begins normal operation at this point with no external system interaction.
TPA3100D2
www.ti.com
The generator output and amplifier input must be ac-coupled. However, the EVMs already have the ac-coupling
capacitors, (CIN), so no additional coupling is required. The generator output impedance should be low to avoid
attenuating the test signal, and is important because the input resistance of APAs is not high. Conversely, the
analyzer-input impedance should be high. The output resistance, ROUT, of the APA is normally in the hundreds of
milliohms and can be ignored for all but the power-related calculations.
Figure 35(a) shows a class-AB amplifier system. It takes an analog signal input and produces an analog signal
output. This amplifier circuit can be directly connected to the AP-II or other analyzer input.
This is not true of the class-D amplifier system shown in Figure 35(b), which requires low-pass filters in most
cases in order to measure the audio output waveforms. This is because it takes an analog input signal and
converts it into a pulse-width modulated (PWM) output signal that is not accurately processed by some
analyzers.
Power Supply
Signal
Generator
APA
RL
Analyzer
20 Hz - 20 kHz
Power Supply
Low-Pass RC
Filter
Signal
Generator
Class-D APA
RL
(See note A)
Low-Pass RC
Filter
Analyzer
20 Hz - 20 kHz
For efficiency measurements with filter-free Class-D, RL should be an inductive load like a speaker.
27
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
www.ti.com
Generator
Analyzer
Low-Pass
RC Filter
CIN
RGEN
VGEN
RIN
ROUT
RIN
ROUT
CIN
RGEN
Twisted-Pair Wire
RL
Low-Pass
RC Filter
RANA
CANA
RANA
CANA
Twisted-Pair Wire
28
DC POWER LOSS
(MW)
AWG Size
AC POWER LOSS
(MW)
POUT (W)
RL()
10
18
22
16
40
18
42
18
22
3.2
3.7
8.5
22
28
2.1
8.1
< 0.75
22
28
1.5
6.1
1.6
6.2
TPA3100D2
www.ti.com
CFILT
VL= VIN
RL
AP Analyzer Input
RC Low-Pass Filters
RFILT
CANA
RANA
CANA
RANA
VOUT
RFILT
CFILT
To APA
GND
( )
VOUT
VIN
(
=
RANA
RANA + RFILT
1 + j
( )
w
wO
(5)
fc = 2 x fmax
(6)
An exception occurs with the efficiency measurements, where RFILT must be increased by a factor of ten to
reduce the current shunted through the filter. CFILT must be decreased by a factor of ten to maintain the same
cutoff frequency. See Table 4 for the recommended filter component values.
Once fC is determined and RFILT is selected, the filter capacitance is calculated using Equation 7. When the
calculated value is not available, it is better to choose a smaller capacitance value to keep fC above the minimum
desired value calculated in Equation 7.
1
CFILT =
2p x fc x RFILT
(7)
29
TPA3100D2
SLOS469F OCTOBER 2005 REVISED AUGUST 2010
www.ti.com
Table 4 shows recommended values of RFILT and CFILT based on common component values. The value of fC
was originally calculated to be 28 kHz for an fMAX of 20 kHz. CFILT, however, was calculated to be 57,000 pF, but
the nearest values of 56,000 pF and 51,000 pF were not available. A 47,000-pF capacitor was used instead, and
fC is 34 kHz, which is above the desired value of 28 kHz.
Table 4. Typical RC Measurement Filter Values
MEASUREMENT
RFILT
CFILT
Efficiency
1000
5,600 pF
100
56,000 pF
spacer
REVISION HISTORY
Changes from Revision E (May 2007) to Revision F
30
Page
Replaced the TYPICAL DISSIPATION RATINGS table with the Thermal Inforamtion table ............................................... 2
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Eco Plan
Lead/Ball Finish
(2)
Op Temp (C)
Top-Side Markings
(3)
(4)
TPA3100D2PHP
ACTIVE
HTQFP
PHP
48
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
TPA3100D2
TPA3100D2PHPG4
ACTIVE
HTQFP
PHP
48
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
TPA3100D2
TPA3100D2PHPR
ACTIVE
HTQFP
PHP
48
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
TPA3100D2
TPA3100D2PHPRG4
ACTIVE
HTQFP
PHP
48
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
TPA3100D2
TPA3100D2RGZR
ACTIVE
VQFN
RGZ
48
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
TPA
3100D2
TPA3100D2RGZRG4
ACTIVE
VQFN
RGZ
48
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
TPA
3100D2
TPA3100D2RGZT
ACTIVE
VQFN
RGZ
48
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
TPA
3100D2
TPA3100D2RGZTG4
ACTIVE
VQFN
RGZ
48
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
TPA
3100D2
(1)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
Samples
www.ti.com
11-Apr-2013
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPA3100D2 :
Automotive: TPA3100D2-Q1
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
30-May-2013
Device
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TPA3100D2PHPR
HTQFP
PHP
48
1000
330.0
16.4
9.6
9.6
1.5
12.0
16.0
Q2
TPA3100D2RGZT
VQFN
RGZ
48
250
180.0
16.4
7.3
7.3
1.5
12.0
16.0
Q2
Pack Materials-Page 1
30-May-2013
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPA3100D2PHPR
TPA3100D2RGZT
HTQFP
PHP
48
1000
367.0
367.0
38.0
VQFN
RGZ
48
250
210.0
185.0
35.0
Pack Materials-Page 2
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