Chapter 2 :Operational-Amplifier

Introduction of Operation Amplifier (Op-

Amp)
Understand the Differential Amplifier
Comparison of ideal and non-ideal Op-Amp
Non-ideal Op-Amp consideration

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 Operational Amplifier (Op-Amp)
The circuit symbol for an +Vcc
Input 1
op-amp is shown to the +
right, where: Vo
Vd Output
Input 1: non-inverting input
Input 2
Input 2: inverting input
Vo: output R in~inf -V cc Rout~0

+Vcc: positive power The power supply pins ( and ) can

supply be labeled in different ways
Despite different labeling, the
-Vcc: negative power function remains the same
supply
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 Very high differential gain
High input impedance
Low output impedance
Provide voltage changes (amplitude and
polarity)
Used in oscillator, filter and instrumentation
Accumulate a very high gain by multiple
stages

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 IC Product

OFFSET OUTPUT A 1 8 V+
NULL
1 8 N.C.

-IN 2 7 V+ -IN A 2 7 OUTPUT B

+
+IN 3 + 6 OUTPUT
+IN A 3 6 -IN B

OFFSET V 4 + 5 +IN B
V 4 5 NULL

DIP-741 Dual op-amp 1458 device

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 Op- Amp Block Diagram

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 Differential Amplifier
The input stage is a differential
amplifier. The differential amplifier
used as an input stage provides
differential inputs and a frequency
response down to d.c. Special
techniques are used to provide the high
input impedance necessary for the
operational amplifier .

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 More Stages of Gain Amplifier
The second stage is a high-gain
voltage amplifier. This stage may be
made from several transistors to
provide high gain. A typical
operational amplifier could have a
voltage gain of 200,000. Most of this
gain comes from the voltage
amplifier stage.
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 The final stage of the OP AMP is an output
amplifier. The output amplifier provides
low output impedance. The actual circuit
used could be an emitter follower. The
output stage should allow the operational
amplifier to deliver several milliamperes to
a load. The operational amplifier can be
used with three different input conditions
(modes). With differential inputs (first
mode), both input terminals are used and
two input signals which are 180 degrees out
of phase with each other are used.
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 Push-pull amplifier
Push-pull amplifier An electronic circuit in which two
transistors (or vacuum tubes) are used, one as a source
of current and one as a sink, to amplify a signal. One
device pushes current out into the load, while the
other pulls current from it when necessary. A
common example is the complementary-symmetry
push-pull output stage widely used to drive
loudspeakers (see illustration), where an npn transistor
can source (push) current from a positive power
supply into the load, or a pnp transistor can sink (pull)
it into the negative power supply.
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 Single-Ended Input
+
V o + terminal : Source
~ Vi terminal : Ground
0o phase change

+
Vo
+ terminal : Ground
terminal : Source

180o phase change
~
V i

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 Double-Ended Input
Differential input
+
V d V V d V V
o
~
0o phase shift change
between Vo and Vd

+ Qu: What Vo should be if,

Vo

~ V1 V 2

~
V 2
V 1

Ans: (A or B) ?
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(A) (B) 11
 Distortion
+V =+5V cc

+5V
+
V o
V d 0

5V

V =5V cc

The output voltage never excess the DC

voltage supply of the Op-Amp

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 Common-Mode Operation
Same voltage source is applied +
at both terminals V o

Ideally, two input are equally

amplified
Output voltage is ideally zero
due to differential voltage is
zero
Practically, a small output
signal can still be measured
V i ~
Note for differential circuits:
Opposite inputs : highly amplified
Common inputs : slightly amplified
Common-Mode Rejection

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Common-Mode Rejection Ratio (CMRR)
Differential voltage input : Noninverting
V d V V Input +
Output
Common voltage input : Inverting
1 Input
Vc (V V )
2 Common-mode rejection ratio:
Gd G
Output voltage : CMRR 20 log10 d (dB)
Gc Gc
Vo Gd Vd GcVc
Note:
Gd : Differential gain When Gd >> Gc or CMRR
Gc : Common mode gain Vo = GdVd
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 CMRR Example
What is the CMRR?
100V + 100V +
80600V 60700V
20V 40V

Solution :
Vd 1 100 20 80V Vd 2 100 40 60V
(1) (2)
100 20 100 40
Vc1 60V Vc 2 70V
2 2
From (1) Vo 80Gd 60Gc 80600V
From (2) Vo 60Gd 70Gc 60700V
Gd 1000 and Gc 10 CMRR 20 log(1000 / 10) 40dB
NB: This method is Not work! Why?

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 Op-Amp Properties
(1) Infinite Open Loop gain V1
+
- The gain without feedback Vo
- Equal to differential gain V2
- Zero common-mode gain
- Pratically, Gd = 20,000 to 200,000
i1~0 +
(2) Infinite Input impedance Vo
- Input current ii ~0A i2~0
- T- in high-grade op-amp
- m-A input current in low-grade op-amp
Rout
(3) Zero Output Impedance
- act as perfect internal voltage source Vo' +
Rload
- No internal resistance
- Output impedance in series with load
- Reducing output voltage to the load Rload
- Practically, Rout ~ 20-100 Vload Vo
Rload Rout
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 Frequency-Gain Relation
Ideally, signals are amplified
from DC to the highest AC 20log(0.707)=3dB
(Voltage Gain)
frequency
Gd
Practically, bandwidth is limited 0.707Gd
741 family op-amp have an limit
bandwidth of few KHz.
Unity Gain frequency f1: the
gain at unity
Cutoff frequency fc: the gain 1
drop by 3dB from dc gain Gd 0 fc f1
(frequency)

GB Product : f1 = Gd fc

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 GB Product
Example: Determine the cutoff frequency of an op-amp
having a unit gain frequency f1 = 10 MHz and voltage
differential gain Gd = 20V/mV
(Voltage Gain)
Sol: ? Hz
Gd
Since f1 = 10 MHz 0.707Gd
By using GB production equation
f1 = Gd fc
10MHz
fc = f1 / Gd = 10 MHz / 20 V/mV
1
= 10 106 / 20 103
0 fc f1
= 500 Hz (frequency)

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 Ideal Vs Practical Op-Amp
Ideal Practical Ideal op-amp
+ AVin
Open Loop gain A 105 Vin ~ Vout
Bandwidth BW 10-100Hz Zout=0

Input Impedance Zin >1M

Output Impedance Zout 0 10-100
Practical op-amp
Output Voltage Vout Depends only Depends slightly +
on Vd = (V+V) on average input Zin Zout
Differential Vc = (V++V)/2 Vin Vout
~
mode signal Common-Mode
signal AVin
CMRR 10-100dB

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 Ideal Op-Amp Applications
Analysis Method :
Two ideal Op-Amp Properties:
(1) The voltage between V+ and V is zero V+ = V
(2) The current into both V+ and V termainals is zero

For ideal Op-Amp circuit:

(1) Write the kirchhoff node equation at the noninverting
terminal V+
(2) Write the kirchhoff node eqaution at the inverting
terminal V
(3) Set V+ = V and solve for the desired closed-loop gain

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 Noninverting Amplifier
(1) Kirchhoff node equation at V+
yields, V V
V in +
i V
o

(2) Kirchhoff node equation at V

yields, V 0 V Vo Ra Rf
0
Ra Rf

(3) Setting V+ = V yields

Vi Vi Vo Vo Rf
0 or 1
Ra Rf Vi Ra

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 v+ v+
v
i + vi +
v R1 v-
vo
v-

o
R2

R a R f Ra Rf
Noninverting amplifier Noninverting input with voltage divider
Rf Rf R2
vo (1 )vi vo (1 )( )vi
Ra Ra R1 R2

v+ v+
vi + vi +
vo R1 v-
vo
v-

R2

Rf Rf
Less than unity gain
Voltage follower
vo vi vo
R2
vi
R1 R2
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 Inverting Amplifier
(1) Kirchhoff node equation at V+ Rf
yields, V 0 Ra

V o
(2) Kirchhoff node equation at V V ~ in +
yields, Vin V_ V V
o 0
Ra Rf

(3) Setting V+ = V yields Notice: The closed-loop gain Vo/Vin is

Vo R f dependent upon the ratio of two resistors,
and is independent of the open-loop gain.
Vin Ra This is caused by the use of feedback output
voltage to subtract from the input voltage.

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 Multiple Inputs
(1) Kirchhoff node equation at V+ Rf
yields, V 0
Va Ra

Rb
(2) Kirchhoff node equation at V
Vb
Rc V o
Vc +
yields,
V_ Vo V Va V Vb V Vc
0
Rf Ra Rb Rc

(3) Setting V+ = V yields

Va Vb Vc c V
Vo R f R f
j

Ra Rb Rc j a R j

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 Inverting Integrator
Now replace resistors Ra and Rf by complex Zf
components Za and Zf, respectively, Za
therefore Zf
Vo Vin V o
Za
Supposing in V ~ +
(i) The feedback component is a capacitor C,
i.e., Z 1
j C
f

(ii) The input component is a resistor R, Za = R

Therefore, the closed-loop gain (Vo/Vin) become:
C
1 R
vo (t )
RC vi (t )dt

vi (t ) Vi e jt V o
where V ~ in +
What happens if Za = 1/jC whereas, Zf = R?
Inverting differentiator

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 Op-Amp Integrator
Example:
C 0.01F
(a) Determine the rate of change +5V R
of the output voltage. 0
100s
V
i
10 k
V o
(b) Draw the output waveform.
+
Vo(max)=10 V
Solution:
(a) Rate of change of the output voltage
Vo V 5V
i +5V
t RC (10 k)(0.01 F)
50 mV/ s
0 V i
0
(b) In 100 s, the voltage decrease -5V

Vo (50 mV/ s)(100s) 5V

-10V V o

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 Op-Amp Differentiator
R
C
0
to t1 t2 V
i V
o 0
+
to t1 t2

dV
vo i RC
dt

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 Non-ideal case (Inverting Amplifier)
Rf Practical op-amp
Ra +
Zin Zout
V o Vin
~
Vout
Vin ~ + AVin

Equivalent Circuit
Rf 3 categories are considering
Ra Close-Loop Voltage Gain
V in Input impedance
R R
V V o Output impedance
+ +
-AV

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 Close-Loop Gain
Applied KCL at V terminal, Rf
Vin V V Vo V V
Ra

0 in
R R
Ra R Rf V Vo

By using the open loop gain, + +

-AV
Vo AV
Vin Vo V V V Ra Rf
o o o 0
V
Ra ARa AR R f AR f in V o

R R Ra R f Ra R ARa R
Vin Vo f V R
Ra ARa R R f
The Close-Loop Gain, Av
Vo AR R f
Av
Vin R R f Ra R f Ra R ARa R
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 Close-Loop Gain
When the open loop gain is very large, the above equation become,
Rf
Av ~
Ra

Note : The close-loop gain now reduce to the same form

as an ideal case

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 Input Impedance
Rf
Input Impedance can be regarded as, Ra

Rin Ra R // R V in
V R
R V o

where R is the equivalent impedance + +

-AV
of the red box circuit, that is
V
R R'
if
However, with the below circuit,
V ( AV ) i f ( R f Ro ) if Rf

V R f Ro
R R
if 1 A V
+
-AV

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 Input Impedance
Finally, we find the input impedance as,
1
1 1 A R ( R f Ro )
Rin Ra

Rin Ra

R R f R
o R f Ro (1 A) R
Since, R f Ro (1 A) R , Rin become,
( R f Ro )
Rin ~ Ra
(1 A)
Again with R f Ro (1 A)
Rin ~ Ra

Note: The op-amp can provide an impedance isolated from

input to output
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 Output Impedance
Only source-free output impedance would be considered,
i.e. Vi is assumed to be 0
Rf
Firstly, with figure (a), Ra
V
Ra // R
Vo V
Ra R
Vo R R io
R f Ra // R Ra R f Ra R R f R V
Vo
+
By using KCL, io = i1+ i2 -AV
Vo V ( AV )
io o
R f Ra // R f Ro
By substitute the equation from Fig. (a),
The output impedance, Rout is i2
V
Rf R i1
Vo Ro ( Ra R f Ra R R f R )
V V
io (1 Ro )(Ra R f Ra R R f R ) (1 A) Ra R +
Ra R -AV
R and A comparably large,
Ro ( Ra R f )
Rout ~
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