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PD - 94818

IRF520NPbF
HEXFET Power MOSFET
 Advanced Process Technology
 Dynamic dv/dt Rating D
 175C Operating Temperature VDSS = 100V
 Fast Switching
 Fully Avalanche Rated RDS(on) = 0.20
 Lead-Free G

Description ID = 9.7A
Fifth Generation HEXFETs from International Rectifier S
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.

The TO-220 package is universally preferred for all


commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220 TO-220AB
contribute to its wide acceptance throughout the
industry.

Absolute Maximum Ratings


Parameter Max. Units
ID @ TC = 25C Continuous Drain Current, VGS @ 10V 9.7
ID @ TC = 100C Continuous Drain Current, VGS @ 10V 6.8 A
IDM Pulsed Drain Current  38
PD @TC = 25C Power Dissipation 48 W
Linear Derating Factor 0.32 W/C
VGS Gate-to-Source Voltage 20 V
EAS Single Pulse Avalanche Energy 91 mJ
IAR Avalanche Current 5.7 A
EAR Repetitive Avalanche Energy 4.8 mJ
dv/dt Peak Diode Recovery dv/dt  5.0 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbfin (1.1Nm)

Thermal Resistance
Parameter Typ. Max. Units
RJC Junction-to-Case 3.1
RCS Case-to-Sink, Flat, Greased Surface 0.50 C/W
RJA Junction-to-Ambient 62

11/5/03
IRF520NPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 V VGS = 0V, ID = 250A
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient 0.11 V/C Reference to 25C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance 0.20 VGS = 10V, ID = 5.7A 
VGS(th) Gate Threshold Voltage 2.0 4.0 V VDS = VGS, ID = 250A
gfs Forward Transconductance 2.7 S VDS = 50V, ID = 5.7A
25 VDS = 100V, VGS = 0V
IDSS Drain-to-Source Leakage Current A
250 VDS = 80V, VGS = 0V, TJ = 150C
Gate-to-Source Forward Leakage 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage -100 VGS = -20V
Qg Total Gate Charge 25 ID = 5.7A
Qgs Gate-to-Source Charge 4.8 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge 11 VGS = 10V, See Fig. 6 and 13 
td(on) Turn-On Delay Time 4.5 VDD = 50V
tr Rise Time 23 ID = 5.7A
ns
td(off) Turn-Off Delay Time 32 RG = 22
tf Fall Time 23 RD = 8.6, See Fig. 10 
Between lead, D
LD Internal Drain Inductance 4.5
6mm (0.25in.)
nH
from package G

LS Internal Source Inductance 7.5


and center of die contact S

Ciss Input Capacitance 330 VGS = 0V


Coss Output Capacitance 92 pF VDS = 25V
Crss Reverse Transfer Capacitance 54 = 1.0MHz, See Fig. 5

Source-Drain Ratings and Characteristics


Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current MOSFET symbol D

9.7
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

38
(Body Diode)  p-n junction diode. S

VSD Diode Forward Voltage 1.3 V TJ = 25C, IS = 5.7A, VGS = 0V 


trr Reverse Recovery Time 99 150 ns TJ = 25C, IF = 5.7A
Qrr Reverse RecoveryCharge 390 580 nC di/dt = 100A/s 

Notes:
 Repetitive rating; pulse width limited by  ISD 5.7A, di/dt 240A/s, VDD V(BR)DSS,
max. junction temperature. ( See fig. 11 ) TJ 175C
 VDD = 25V, starting TJ = 25C, L = 4.7mH  Pulse width 300s; duty cycle 2%.
RG = 25, IAS = 5.7A. (See Figure 12)
IRF520NPbF

100 100 VGS


VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V
7.0V 7.0V

I , Drain-to-Source Current (A)


I , Drain-to-Source Current (A)

6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
BOTTOM 4.5V BOTTOM 4.5V

10 10

4.5V

D
D

4.5V
20s PULSE WIDTH 20s PULSE WIDTH
TC = 25C TC = 175C
1 A 1 A
0.1 1 10 100 0.1 1 10 100
VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

100 3.0
I D = 9.5A
R DS(on) , Drain-to-Source On Resistance
I D , Drain-to-Source Current (A)

2.5

2.0
TJ = 25C
(Normalized)

TJ = 175C
10 1.5

1.0

0.5

V DS= 50V
20s PULSE WIDTH VGS = 10V
1 0.0 A
A
4 5 6 7 8 9 10 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature (C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance


Vs. Temperature
IRF520NPbF

600 20
V GS = 0V, f = 1MHz I D = 5.7A
C iss = Cgs + C gd , Cds SHORTED VDS = 80V
C rss = C gd VDS = 50V

V GS , Gate-to-Source Voltage (V)


500
C oss = C ds + C gd 16 VDS = 20V
Ciss
C, Capacitance (pF)

400
12

300 Coss
8
200
Crss
4
100

FOR TEST CIRCUIT


SEE FIGURE 13
0 A 0 A
1 10 100 0 5 10 15 20 25
VDS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.


Drain-to-Source Voltage Gate-to-Source Voltage

100 100
OPERATION IN THIS AREA LIMITED
BY R DS(on)
ISD , Reverse Drain Current (A)

10s
I D , Drain Current (A)

10

TJ = 175C 100s

10
TJ = 25C
1ms

1
10ms

TC = 25C
TJ = 175C
VGS = 0V Single Pulse
1 A 0.1 A
0.4 0.6 0.8 1.0 1.2 1.4 1 10 100 1000
VSD , Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area


Forward Voltage
IRF520NPbF
RD
VDS
10.0
VGS
D.U.T.
RG
+
8.0 - VDD
ID , Drain Current (A)

10V
Pulse Width 1 s
6.0
Duty Factor 0.1 %

4.0
Fig 10a. Switching Time Test Circuit
VDS
90%
2.0

0.0
25 50 75 100 125 150 175 10%
TC , Case Temperature ( C) VGS
td(on) tr t d(off) tf

Fig 10b. Switching Time Waveforms


Fig 9. Maximum Drain Current Vs.
Case Temperature

10
Thermal Response (Z thJC )

D = 0.50

1
0.20

0.10
0.05
0.02 SINGLE PULSE PDM
0.01 (THERMAL RESPONSE)
0.1
t1
t2

Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case


IRF520NPbF

L
VDS 200
ID

EAS , Single Pulse Avalanche Energy (mJ)


D.U.T. TOP 2.3A
4.0A
RG + 160 BOTTOM 5.7A
V
- DD

10 V IAS
120
tp
0.01

Fig 12a. Unclamped Inductive Test Circuit 80

V(BR)DSS
40
tp
VDD
VDD = 25V
0 A
25 50 75 100 125 150 175
VDS Starting TJ , Junction Temperature (C)

Fig 12c. Maximum Avalanche Energy


IAS Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

50K

QG 12V .2F
.3F
10 V +
QGS QGD V
D.U.T. - DS

VGS
VG
3mA

Charge IG ID
Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit
IRF520NPbF

Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations


D.U.T
Low Stray Inductance
Ground Plane

Low Leakage Inductance
Current Transformer
-

+


- +
-


RG dv/dt controlled by RG +
Driver same type as D.U.T. VDD
-
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test

Driver Gate Drive


P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFETS


IRF520NPbF

TO-220AB Package Outline


Dimensions are shown in millimeters (inches)
10.54 (.415) 3.78 (.149) -B-
2.87 (.113) 10.29 (.405) 3.54 (.139) 4.69 (.185)
2.62 (.103) 4.20 (.165)
-A- 1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045) LEAD ASSIGNMENTS
MIN HEXFET IGBTs, CoPACK
1 - GATE
1 2 3 2 - DRAIN
1- GATE 1- GATE
2- DRAIN
3 - SOURCE 2- COLLECTOR
3- SOURCE
4 - DRAIN 3- EMITTER
4- DRAIN 4- COLLECTOR
14.09 (.555)
13.47 (.530) 4.06 (.160)
3.55 (.140)

0.93 (.037) 0.55 (.022)


3X 3X
0.69 (.027) 0.46 (.018)
1.40 (.055)
3X
1.15 (.045) 0.36 (.014) M B A M 2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

TO-220AB Part Marking Information


EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
ASSEMBLED O N WW 19, 1997 INTERNATIO NAL PART NUMBER
IN THE ASSEMBLY LINE "C" RECTIFIER
LOGO
Note: "P" in assembly line
position indicates "Lead-Free" DATE CODE
YEAR 7 = 1997
ASSEMBLY
LOT CODE WEEK 19
LINE C

Data and specifications subject to change without notice.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/03
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/

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