HCPL-2533

Dual Channel, High Speed Logic Interface Optocoupler

Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product

Description Features
The HCPL-2533 is a dual channel optocoupler which is Data rates to 250 kb/s NRZ
specified for use in LSTTL-to-LSTTL and TTL-to-LSTTL
logic interfaces. A nominal 8 mA LSTTL sink current LSTTL compatible
through the input LED will provide enough output High common mode transient immunity:
current for proper operation of 1 LSTTL gate under > 1000 V/s
worst-case conditions when used in the recommended High density packaging
circuits. The CTR of the HCPL-2533 is 15% minimum at
IF = 8 mA. Open collection outputs
Guaranteed performance from temperature:
The HCPL-2533 contains a pair of light emitting diodes
0C to 70C
and integrated photon detectors with a 3000 Vdc
withstand test between input and output. Separate Safety approval
connection for the photodiode bias and output tran- - UL Recognized - 3750Vrms for 1min (5000Vrms for
sistor collector reduce the base-collector capacitance, 1 min Option 020 devices) per UL1577.
giving improved speed compared with conventional
- IEC/EN/DIN EN 60747-5-2 Approved
phototransistor couplers.
- VIORM = 630 Vpeak for option 060

Schematic
1 I F1 ICC Applications
VCC
+ 8
High speed logic ground isolation
VF1 LSTTL-to-LSTTL and TTL-to-LSTTL
I O1
-
VO1 High voltage isolation
7
2 Analog signal ground isolation

3 I F2
- I O2
VO2
VF2 6

+
4

GND
5

SHIELD

USE OF A 0.1 F BYPASS CAPACITOR CONNECTED

BETWEEN PINS 5 AND 8 IS RECOMMENDED.

CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
Ordering Information
HCPL-2533 is UL Recognized with 3750 Vrms and 5000 Vrms (Option 020) for 1 minute per UL1577 and are approved
under CSA Component Acceptance Notice #5, File CA 88324.
Option
Part RoHS Non RoHS Surface Gull Tape UL 5000 Vrms/ IEC/EN/DIN
number Compliant Compliant Package Mount Wing & Reel 1 Minute rating EN 60747-5-2 Quantity
-000E No option 50 per tube
-300E -300 X X 50 per tube
-500E -500 X X X 1000 per reel
-020E -020 X 50 per tube
300mil
HCPL-2533 -320E -320 X X X 50 per tube
DIP-8
-520E -520 X X X X 1000 per reel
-060E -060 X 50 per tube
-360E -360 X X X 50 per tube
-560E -560 X X X X 1000 per reel

To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
HCPL-2533-500E to order product of 300mil DIP Gull Wing Surface Mount package in Tape and Reel packag-
ing with RoHS compliant.
Example 2:
HCPL-2533 to order product of 300mil DIP package in tube packaging and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Remarks: The notation #XXX is used for existing products, while (new) products launched since 15th July 2001 and
RoHS compliant option will use -XXXE.

Absolute Maximum Ratings

Storage Temperature.......................................................................................................................................................... 55C to +125C
Operating Temperature .................................................................................................................................................... 55C to +100C
Lead Solder Temperature (1.6 mm below seating plane) . ......................................................................................... 260C for 10 s
Average Input Current IF (each channel)...................................................................................................................................25 mA[1]
Peak Input Current IF (each channel) (50% duty cycle, 1 ms pulse width) . .................................................................50 mA[2]
Peak Transient Input Current IF (each channel) (1 s pulse width, 300 pps).................................................................... 1.0 A
Reverse Input Voltage VR (each channel).............................................................................................................................................5 V
Input Power Dissipation (each channel)......................................................................................................................................45 mW[3]
Average Output Current IO (each channel).....................................................................................................................................8 mA
Peak Output Current IO (each channel).........................................................................................................................................16 mA
Supply and Output Voltage VCC (Pin 8-5), VO (Pin 7, 6-5)..............................................................................................0.5 V to 7 V
Output Power Dissipation (each channel)..................................................................................................................................35 mW[4]
Notes:
1. Derate linearly above +70C free-air temperature at a rate of 0.8 mA/C.
2. Derate linearly above +70C free-air temperature at a rate of 1.6 mA/C.
3. Derate linearly above +70C free-air temperature at a rate of 0.9 mW/C.
4. Derate linearly above +70C free-air temperature at a rate of 1.0 mW/C.


Solder Reflow Thermal Profile
300
PREHEATING RATE 3C + 1C/- 0.5C/SEC.
REFLOW HEATING RATE 2.5C 0.5 C/SEC. PEAK
PEAK
TEMP.
TEMP.
245C
240C
PEAK
TEMP.
230C
200
TEMPERATURE ( C)

2.5C 0.5 C/SEC.

SOLDERING
30 TIME
160C 200C
150C SEC.
140C
30
3C + 1C/- 0.5C SEC.

100
PREHEATING TIME
150C, 90 + 30 SEC. 50 SEC.

TIGHT
TYPICAL
ROOM
TEMPERATURE LOOSE

0
0 50 100 150 200 250

TIME (SECONDS)

Note: Non-halide flux should be used.

Recommended Pb-Free IR Profile

TIME WITHIN 5 C of ACTUAL
PEAK TEMPERATURE
tp
20-40 SEC.
260 +0/-5 C
Tp
217 C
TL
RAMP-UP
RAMP-DOWN
TEMPERATURE

3 C/SEC. MAX.
150 - 200 C 6 C/SEC. MAX.
Tsmax
Tsmin
ts tL
PREHEAT 60 to 150 SEC.
60 to 180 SEC.

25
t 25 C to PEAK
TIME
NOTES:
THE TIME FROM 25 C to PEAK TEMPERATURE = 8 MINUTES MAX.
Tsmax = 200 C, Tsmin = 150 C

Note: Non-halide flux should be used.

Regulatory Information
The devices contained in this data sheet have been approved by the following organizations:
UL IEC/EN/DIN EN 60747-5-2
Recognized under UL 1577, Component Recognition Approved under:
Program, File E55361. IEC 60747-5-2:1997 + A1:2002
EN 60747-5-2:2001 + A1:2002
CSA DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01.
(Option 060 only)
Approved under CSA Component Acceptance Notice
#5, File CA 88324.


Insulation and Safety Related Specifications
8-Pin DIP
(300 Mil) SO-8
Parameter Symbol Value Value Units Conditions
Minimum External L(101) 7.1 4.9 mm Measured from input terminals to output to
Air Gap (External to output terminals, shortest distance through
Clearance) air.
Minimum External L(102) 7.4 4.8 mm Measured from input terminals to output
Tracking (External terminals, shortest distance path along body.
Creepage)
Minimum Internal 0.08 0.08 mm Through insulation distance, conductor to
Plastic Gap conductor, usually the direct distance
(Internal Clearance) between the photoemitter and photodetector
inside the optocoupler cavity.
Minimum Internal NA NA mm Measured from input terminals to output
Tracking (Internal terminals, along internal cavity.
Creepage)
Tracking Resistance CTI 200 200 Volts DIN IEC 112/VDE 0303 Part 1
(Comparative
Tracking Index)
Isolation Group IIIa IIIa Material Group (DIN VDE 0110, 1/89, Table 1)

Option 300 - surface mount classification is Class A in accordance with CECC 00802.


IEC/EN/DIN EN 60747-5-2 Insulation Characteristics (Option 060)
Characteristic
Description Symbol HCPL-2533 Unit
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage 150 V rms
for rated mains voltage 300 V rms I-IV
for rated mains voltage 600 V rms I-III
Climatic Classification 55/100/21
Pollution Degree (DIN VDE 0110/1.89) 2
Maximum Working Insulation Voltage VIORM 630 Vpeak
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test VPR 1181 Vpeak
with tm = 1 sec, Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.5 = VPR, Type and Sample Test, VPR 945 Vpeak
tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage VIOTM 6000 Vpeak
(Transient Overvoltage, tini = 10 sec)
Safety Limiting Values
(Maximum values allowed in the event of a failure.)
Case Temperature TS 175 C
Input Current** IS,INPUT 230 mA
Output Power** PS,OUTPUT 600 mW
Insulation Resistance at TS, VIO = 500 V RS > 109

* Refer to the optocoupler section of the Isolation and Control Components Designer's Catalog, under Product Safety Regulations section,
IEC/EN/DIN EN 60747-5-2, for a detailed description of Method a and Method b partial discharge test profiles.
** Refer to the following figure for dependence of PS and IS on ambient temperature.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits in application.
OUTPUT POWER PS, INPUT CURRENT IS

800
PS (mW)
700
IS (mA)
600

500

400

300

200

100

0
0 25 50 75 100 125 150 175 200
TS CASE TEMPERATURE C


Electrical Specifications, LSTTL-to-LSTTL
Over recommended temperature (TA = 0C to +70C) unless otherwise specified.
Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note
Current Transfer Ratio CTR 15 22 % IF = 8 mA, VO = 0.5 V, 1 5,6
VCC = 4.5 V, TA = 25
11 15 % IF = 8 mA, VO = 0.5 V,
VCC = 4.5 V
Logic Low Output VOL 0.2 0.5 V IF = 8 mA, IO = 0.7 mA, 5
Voltage VCC = 4.5 V
Logic Low Supply ICCL 40 A IF1 = IF2 = 8 mA
Current V01 = V02 = Open,
VCC = 5.5 V
Input Forward VF 1.5 1.7 V IF = 8 mA, TA = 25C 2 5
Voltage
Temperature VF 1.6 mV/C IF = 8 mA 5
Coefficient of Forward TA
Voltage

*All typicals at 25C.

Switching Specifications at TA = 25C

VCC = 5 V, IF = 8 mA, RL = 7.5 k unless otherwise specified.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
Propagation Delay tPHL 0.8 1.5 s 4,6 10
Time to Logic Low
at Output
Propagation Delay tPLH 1.0 2.5 s 4,6 10
Time to Logic High
at Output
Common Mode CMH 1000 V/s IF = 0 mA, VCM = 10 VPP 7 9,10
Transient Immunity at
Logic High Level
Output
Common Mode CML 1000 V/s VCM = 10 VPP 7 9,10
Transient Immunity at
Logic Low Level Output


Electrical Specifications, TTL-to-LSTTL
Over recommended temperature (TA = 0C to +70C) unless otherwise specified.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
Current Transfer Ratio CTR 12 18 % IF = 16 mA, VO = 0.5 V, 1 5,6
VCC = 4.5 V, TA = 25C
9 13 % IF = 16 mA, VO = 0.5 V,
VCC = 4.5 V
Logic Low Output VOL 0.2 0.5 V IF = 16 mA, IO = 1.1 mA, 5
Voltage VCC = 4.5 V
Logic Low Supply ICCL 80 A IF1 = IF2 = 16 mA
Current V01 = V02 = Open,
VCC = 5.5 V
Input Forward VF 1.5 1.7 V IF = 16 mA, TA = 25C 2 5
Voltage
Temperature VF 1.6 mV/C IF = 16 mA 5
Coefficient of Forward TA
Voltage
*All typicals at 25C.

Switching Specifications at TA = 25C

VCC = 5 V, IF = 16 mA, RL = 4.7 k unless otherwise specified.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
Propagation Delay tPHL 0.3 1.5 s 4,6 11
Time to Logic Low
at Output
Propagation Delay tPLH 1.1 2.5 s 4,6 11
Time to Logic High
at Output
Common Mode CMH 1000 V/s IF = 0 mA, VCM = 10 VPP 7 9,11
Transient Immunity at
Logic High Level
Output
Common Mode CML 1000 V/s VCM = 10 VPP 7 9,11
Transient Immunity at
Logic Low Level Output


Electrical Specifications
Over recommended temperature (TA = 0C to +70C) unless otherwise specified.
Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note
Logic High IOH 0.5 nA TA = 25C, 5 5
Output Current IF1 = IF2 = 0 mA
VO1 = VO2 = VCC = 5.5 V
50 A IF1 = IF2 = mA 5
VO1 = VO2 = VCC = 5.5 V
Logic High ICCH 0.05 4 A IF1 = IF2 = 0 mA
Supply Current VO1 = VO2 = Open,
VCC = 5.5 V
Input Reverse VR 5 V IF = 10 A, TA = 25C 5
Breakdown Voltage
Input Capacitance CIN 60 pF f = 1 MHz, VF = 0 V 5
Input-Output IIO 1.0 A 45% Relative Humidity, 7
Insulation Leakage t = 5s
Current VIO = 3000 Vdc,
TA = 25C
Resistance RIO 1012 VIO = 500 Vdc 7
(InputOutput)
Capacitance CIO 0.6 pF f = 1 MHz 7
(InputOutput)
InputInput III 0.005 A 45% Relative Humidity, 8
Insulation Leakage t = 5s
Current VII = 500 Vdc
Resistance RII 1011 VII = 500 Vdc 8
(InputInput)
Capacitance CII 0.25 pF f = 1 MHz 8
(InputInput)
*All
typicals at 25C.

Notes:
5. Each channel.
6. Current Transfer Ratio is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
7. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
8. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
9. Common mode transient immunity in Logic High level is the maximum tolerable (positive) dVCM/dt on the leading edge of the common mode
pulse VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in Logic Low level is
the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain
in a Logic Low state (i.e., VO < 0.8 V).
10. The 7.5 k load represents 1 LSTTL unit load of 0.36 mA and a 20 k pull-up resistor.
11. The 4.7 k load represents 1 LSTTL unit load of 0.36 mA and an 8.2 k pull-up resistor.


 NORMALIZED CURRENT TRANSFER RATIO
NORMALIZED CURRENT TRANSFER RATIO
1000
1.4 1.2

IF FORWARD CURRENT mA
100
1.2 IF
TA = 25C 1.0
+
1.0 10 VF
0.8
0.8 1.0
VO = 0.5 V 0.6
0.6 VCC = 5.0 V 0.1 VO = 0.5 V
TA = 25C 0.4 VCC = 5.0 V
0.4
NORMALIZED TO IF = 8 mA
IF = 8 mA 0.01 IF = 16 mA
0.2 0.2
IF = 16 mA NORMALIZED TO TA = 25C
0 0.001 0
0 4 8 12 16 20 24 1.10 1.20 1.30 1.40 1.50 -60 -40 -20 0 20 40 60 80 100

IF INPUT CURRENT mA VF FORWARD VOLTAGE VOLTS TA TEMPERATURE C

Figure 1. Current transfer ratio vs. input current Figure 2. Input current vs. forward voltage Figure 3. Current transfer ratio vs. temperature

HCPL-2533 fig 3
HCPL-2533 fig 1
HCPL-2533 fig 2

1.5 VCC = 5.0 V

IF = 8 mA
tP PROPAGATION DELAY s

IOH OUTPUT CURRENT nA

RL = 7.5 k
IF = 16 mA
100
RL = 4.7 k
tPLH
1.0

tPHL 10
0.5

0 1
-60 -40 -20 0 20 40 60 80 100 0 10 20 30 40 50 60 70 80 90 100 110
TA TEMPERATURE C TA TEMPERATURE C

Figure 4. Propagation delay vs. temperature Figure 5. Logic high output current vs. temperature

HCPL-2533 fig 4 HCPL-2533 fig 5

HP 8007
PULSE IF
IF GEN.
ZO = 50 1 8 +5 V
0 tr = 5 ns
2 7 RL
10% DUTY CYCLE
VO 5V
1/f 500 s
3 6 VO
1.3 V 1.3 V IF MONITOR
VOL 4 5
CL = 15 pF
100
tPHL tPLH

Figure 6. Switching test circuit

HCPL-2533 fig 6


 tr, tf = 8 ns
VCM 10 V IF +5 V
90% 10% 1 8
10% 90%
0V
tr 2 7 RL
tf
A
B
3 6 VO
VO 5V
VFF
SWITCH AT A: IF = 0 mA 4 5

VO VOL VCM
SWITCH AT B: IF = 16 mA +

HP 8007
PULSE GEN.

Figure 7. Test circuit for transient immunity and typical waveforms

HCPL-2533 fig 7

VCC1

VCC1 VCC2 VCC2

RIN

1 8 1 8
IF A
RL IF RL
RIN
2 7 2 7
A B B
IO RL IO RL
RIN
3 6 3 6
RIN
7404
74LS04 4 5 4 5
7405 74LS04
74LS05 HCPL-2533 74LS05 7405 HCPL-2533 74LS04
74LS05 74LS05
A) TYPICAL NON-INVERTING CIRCUIT B) TYPICAL INVERTING CIRCUIT
(SEE NOTE 12)

Figure 8. Recommended circuits

HCPL-2533 fig 8

Recommended Operation
The HCPL-2533 optocoupler is specified for use in LSTTL-
to-LSTTL and TTL-to-LSTTL interfaces. The recommended
circuits show the interface design and give suggested
component values. The input current IF is given as both
a nominal value and a range. The range in IF results
from the tolerances in VCC and the input resistor RIN.
The CTR of the optocoupler is given as the minimum
initial value over temperature, taken directly from the
Electrical Specifications. The value given for IOL (min) is
based on the minimum CTR and the minimum IF using
worst case values for RL and VCC. The resulting IOL (min)
has ample design margin, allowing more than 20% for
CTR degradation even under these worst case condi-
tions. For additional information on CTR degradation
see Application Note 1002.
Recommended Circuit Design Parameters
LSTTL-to- TTL-to-
Parameter Symbol LSTTL LSTTL Units Comments Fig. Note
Input
Logic Low Output VOL (A) 0.5 0.4 V Maximum
Voltage Input Gate
Supply Voltage Input VCC1 5.0 5.0 V 5%
Input Resistor RIN 360 180 5% 8a
430 200 8b
Input Current IF 8 16 mA Nominal
Input Current Range IF 6.7510 14.020 mA 8a
14.520 8b
Output
Logic Low Output VOL (B) 0.5 0.5 V Maximum
Voltage HCPL-2533
Supply Voltage Input VCC2 5.0 5.0 V 5%
Pull-Up Resistor RL 20 8.2 k 5% 13
Required Current Sink IOL 0.61 1.0 mA Worst Case VCC, 14
for Logic Low (max) RL, IIL (B)
HCPL-2533 Current CTR 11 9 % Minimum TA = 0C to
Transfer Ratio +70C
Logic Low Output IOL 0.74 1.26 mA Worst Case VCC, CTR, IF 8a 15
Current HCPL-2533 (min) 1.30 TA = 0C to +70 C 8b
Data Rate fD 250 250 Kb/s NRZ, TA = 25C 16
Notes:
12. The inverting circuit has higher power consumption and must use open collector gates on the input.
13. The load resistor RL must be large enough to guarantee logic LOW and small enough to guarantee logic HIGH under worst case conditions:
VCC (max) VOL VCC (min) VIH (B)
RL
IOL (2533) IIL (B) IOH (2533) IIH (B)

The selection of RL is the same for both inverting and non-inverting circuits.
14. The maximum current sink required for logic LOW is:

IOL (max) = IIL (B) (max) + IR (max)

where IR is the current through RL.

15. The ratio of IOL (min) to IOL (max) gives the design margin for CTR degradation. See Application Note 1002.
16. The maximum data rate is defined as:
1
fD t
= bits/second NRZ
PHL + tPLH

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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright 2007 Avago Technologies Limited. All rights reserved. Obsoletes 5953-0458
AV02-0521EN - June 19, 2007