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Design by J. F. Verrij
To the point
The A-D converter presented in this arti-
cle shows that it is possible to build
something nice using only a small num-
ber of components. An integrated A-D
converter (National Semiconductor
type ADC0804, a low-cost thorough-
bred which has been available for
many years) and a few 4000-series
buffers are basically all that is needed
to allow analogue voltages to be mea-
sured via the serial port. The parallel-to-
serial conversion of the output data is
implemented in the hardware in a sim-
ple manner by making clever use of
the serial ports handshaking signals.
Technical data The digital values are read in two steps
via the ports control lines. This means
measurement range: 0 to 5 V
that only a pair of inexpensive logic ICs
resolution: 8 bits
are needed in addition to the A-D con-
step size: 20 mV
verter chip.
measurement error: 1 bit
conversion time: 150 s
supply voltage: 5V The schematic
current consumption: 5 mA
interface: RS232 Figure 1 depicts the schematic dia-
software: QBASIC (for example) gram of the circuit. The serial port sig-
nals are shown at the right-hand side of
the figure, and the analogue input is at
the left-hand side. A 5-V supply voltage
It is by no means always necessary to cuit presented here is a typical exam- is produced from the RS232 signals by
use a super-accurate, fast A-D con- ple of a simple, inexpensive design means of three diodes, a capacitor
verter to measure analogue signals. If which is nonetheless quite useful. It has and an integrated voltage regulator.
reasonable resolution (such as 256 a resolution of 20 mV, is easily con- The reference voltage for IC1 is derived
steps covering a range of 5 volts) and trolled by a BASIC program (for exam- from the supply voltage using a simple
conversion speed are adequate for a ple), and does not make any extraor- voltage divider (P1). The RC network
given application, then there is no dinary demands on the computer. In consisting of R2 and C3 is added to fil-
need to make things more difficult for addition, it does not consume very ter out HF noise. The required supply-
ourselves than they need to be. The cir- much power (5 mA at 5 V), so that it decoupling capacitors are also pro-
R2
4k7
C5 R9 R3
C3
47K
47K
P1
100n IC3a
20k 100n D4
20 3 2
1
9
VREF INTR
5 2x
1N4148
18 D5
K1
6
6 DB0 A1 10
VI+ IC1 17 7 D1
D6 C2 DB1 B1 DCD 1
16 4 IC2
DB2 A2 11 DSR 6
100n 15 5 D2
7 DB3 B2 2
VI 14 2
DB4 A3 12 RTS 7
1N4148 R1 ADC0804 D3
13 3
19 DB5 B3 4019 TxD 3
10k CLKR 12 15
JP1 DB6 A4 13 CTS 8
11 1 D4
4 DB7 B4 DTR 4
CLK
1 2 SB SA RI 9
CS RD 5V
8 3 14 9 5
C1 AGND WR R8
47K
150p 10
DTR
3x
T1
1N4148
R7 R4 D3
IC3b IC4
IC3 = 4050 47k 47k
LP2950-CZ5.0
5 4
5V 1 BC547B D2 5V
IC3c IC3d
R5 D1
16 C6 1 C7 7 6 10 9 RTS
1 1 47k
IC2 IC3
100n 100n C8 C4
8 8
IC3f IC3e
R6 100n
14 15 12 11 TxD 100 25V
1 1 47k
980055 - 11
Figure 1. Schematic diagram of the simple A-D converter. The serial interface is used here as a sort of simple parallel port.
vided. For this approach to work, it is are four control lines of the RS232 port. controlled via the serial port. Transistor
necessary that the software ensures In this way, the serial port is adapted to T1 forms a discrete inverter, which
that a high-level voltage (+12 V) is act as a sort of parallel port. makes either SA or SB active depend-
always present on the TxD, RTS or DTR In addition, the /WR and /RD lines of the ing on the level present on the DTR line.
line. A-D converter, and the selection lines RTS and TxD are used to control /WR
The built-in clock generator of the A-D SA and SB of the multiplexer IC, are also and /RD respectively.
converter uses an external RC timing
network consisting of R1 and C1. With
the chosen component values, the
clock frequency is on the order of WR
400 kHz. The resulting conversion time
is approximately 150 s.
The analogue signal which is to be
A/D conversion busy
measured is applied to the terminals
marked PC1 (+) and PC2 (). The cir-
cuit works by default with an asymmet-
ric input, but this can be converted to INTR
H3
R1 = 10k
ROTKELE )C(
1-550089
IC2 = 4019
K1
R2 = 4k7
IC3 = 4050
R3-R9 = 47k
D2 D3 IC4 = LP2950-CZ5.0
R4 P1 = 20k multiturn preset
R6
R3 D1
D5
Miscellaneous:
T1
IC4
R8
Capacitors: JP1 = jumper
C1 = 150pF K1 = 9-way sub-D socket (female), PCB
C4
R7
mount
C6
C8
R9
C5
C7
980055-1
IC1
plete. As soon as the DCD line goes command must then be issued (by
low, the computer knows that the con- making /RD low), which causes the A-D
IC3
R1 version has been completed. A read converter to place the result of the con-
C2
D4
D6
R2
JP1
COMadres = &H3F8
C1
C3
R5
LOOP1:
H4
H1
- + T
read (TxD) not active, write (RTS) active
OUT COMadres + 4, INP(COMadres + 4) OR 1 DTR=SA=H, SB=L
OUT COMadres + 4, INP(COMadres + 4) AND &HFD RTS=WRnot=L
OUT COMadres + 3, INP(COMadres + 3) OR 64 TxD=RDnot=H
Wait 50 ms until circuit is stable before starting a conversion
Start = TIMER
DO
TIME = TIMER
LOOP UNTIL TIME >= Start + .05
Start conversion by making Write not active
OUT COMadres + 4, INP(COMadres + 4) OR 2 RTS=WRnot=H
Wait for interrupt (DCD), signalling end of conversion
DO
intr = INP(COMadres + 6) AND 128
LOOP UNTIL intr = 0 wait until DCD=L
Reset interrupt by making read active
OUT COMadres + 3, INP(COMadres + 3) AND 0 TxD=RDnot=L
980055-1
(C) ELEKTOR
PC software
competition
8 test & measurement
8 circuit design
8 communications
As in the past two years, this magazine will pub-
lish a design competition in the July/August
issue (on sale 18 June), for which a number
of advertiser sponsors have made available cal quantity with the aid
some glittering prizes. of a PC, but which also
Since more and more readers are inter- needs some additional hardware. Oth-
ested and/or engaged not only in electronics, ers may create software for testing
but also in computers (although this is just a logic circuits, or a small circuit design system
branch of electronics), this years competition that is driven by a PC, or a program to
will link the two as the subtitle suggests: the decode the output of weather reporting sta-
design of PC software for use in test and mea- tions. The main thing is that the PC plays an
surement, circuit design, or communications. active role in the design.
The aim of the competition should be seen Full details of the competition and the prizes
in its broadest sense. Competitors may well will be published in next months issue of this
devise a program to test or measure a physi- magazine. Dont miss it! [980060]
RS232-controlled
8-channel switch
Using CMOS logic and Visual Basic
tive voltage.
The type 4029 counter is automati-
cally reset at power-on by C3-R5. The
counter operates in BCD (binary coded
decimal) mode, and responds to rising
pulse edges at its clock input, pin 15.
This pulse transition is supplied to the cir-
cuit by the PC sending the word 0
(0000 0000 binary) over the TxD (trans-
mitted data) line. Potential divider R1-
R4 and the internal clamping diodes
protect the clock input of the 4029
against harmful voltage levels.
Binary outputs Q1, Q2 and Q3
(pins 6, 11 and 14) of the 4029 are
connected to the corresponding
inputs of a type 4051 bilateral 8-way
analogue multiplexer, IC2. Depending
on the channel selection code
received at its control inputs, the 4051
switches the voltage at pin 3 (COM) to
one of the eight outputs marked 0
through 7. In this way, the 4051 acts as
a digitally controlled rotary switch. A
Using a PC to control real-world loads software to control the switch in a user- high (+10 V) voltage level on the RTS
like lamps, relays and so on is an ever- friendly-way using an attractive user- line disables the 4051 via pin 6, caus-
popular subject, and various designs of interface which appears on the screen. ing all channels to be disconnected
PC-controlled switching units have simultaneously. Here, again, a resistor-
appeared in this magazine over the The hardware diode combination is used to ward off
past few years. However, many at you the risk of negative voltages on the RTS
may have hesitations about building Remarkably, there are only two inte- line damaging the 4051.
such complex circuits, which, in the grated circuits in this design, as evi- The 4051 is by no means a power
worst case, are insertion cards. Unless denced by the circuit diagram shown switch, and capable of switching cur-
you are into industrial control systems in Figure 1. Whats more, the 4029 and rents up to about 1 mA only, while the
and have lots of PCs to play around 4051 ICs are traditional CMOS devices voltage level should be between 0 V
with, it is best to opt for a switching sys- which anyone should be able to and 9 V. If you want the circuit to con-
tem which is connected to the PC as an obtain at a very small outlay. trol much heavier loads, say, a relay or
external unit, and controlled by way of The circuit is powered by the +10 V a lamp, then we suggest adding a
one of the PCs ports (RS232 or parallel). voltage tapped from the PCs RS232 BUZ10 MOSFET current booster as
The good news is that the present port via the DTR (data terminal ready) shown in Figure 2. Note that the +10 V
design is cheap, open to experiments, line. Because the DTR line can also control voltage arriving by way of the
totally external, RS232-driven, and it drop down to 10V, a diode, D1, is 4051 is again stolen from the DTR line,
does not even require a power supply! inserted in the supply line to the circuit and that the load (obviously!) has to
Whats more, we have available the to protect it against the harmful nega- be powered by an external supply
100k
will discuss further on. K1 IC1
That more or less wraps up the dis- 10
U/D
1 1 COM
cussion of the hardware. The circuit is R1 C3
6 15 IC2
connected to a free COM port on the 2
10k
R4 9
1.2+/1.2-
B/D 13
PC via a 9-way sub-D PCB-style socket, MDX 0
100k
7 RTS 5 3 0
G1 14
K1, and a standard serial interface 3 TxD 1
15
1
2 2
cable. 8 CTS 4
3D
6 11
0 12
4 DTR 12 11 10 3 3
1 8x 0 1
9 13 14 9 7 4 4
2
Construction 5 3 2 5
5
2
5
6 6 6
1.2CT=15 G8 4
7
The 8-channel switch is built on a small 1.2CT=0
7 7
100k
not available ready-made from the
Publishers. 982042 - 11
Construction should not cause
undue difficulty even to (relative)
Figure 1. Circuit diagram of the RS-232 controlled 8-way switching unit.
beginners to the noble art of soldering.
It is recommended to use IC sockets
for the 4029 and the 4051. Watch their RTS high. Next, the value 0 is repeat-
+
polarity and also that of the diode! edly written (via TxD) until CTS drops
low. Next, the user can click on the
Control software Switch button in the user interface
box to step through the channels.
The program for controlling the switch Each mouse click causes a further 0,
was written in Visual BASIC 3.0. Its that is, a clock pulse, to be sent to the LOAD
flowchart is shown in Figure 4. First all 4029, which is incremented in this way.
channels are switched off by pulling Once channel 7 is reached, the next
4051 13
COMPONENTS LIST Semiconductors: 14
D1 = 1N4148 15
47k
Resistors: IC1 = 4029 BUZ10
+10V 12
R1,R2 = 10k IC2 = 4051 (DTR)
R3,R4 = 100k
Miscellaneous:
R5 = 100k MUX
K1 = 9-way PCB mount sub-D socket
(female), angled pins. (equivalent) 982042 - 12
Capacitors:
Control software on disk, order code
C1,C2,C3 = 100nF
986015-1, see Readers Services page.
Figure 2. Optional power driver extension
(up to eight required) to enable real
Figure 3. Copper track layout and component mounting plan of the PCB designed for loads to be controlled.
the switching unit (board not available ready-made).
mouse click causes the program to
send the number of pulses needed to
make Q1=Q2=Q3=0 again, i.e.,
channel 0 is selected again (assuming
(C) Segment
982042-1
982042-1
1-240289
R1
IC2
program to automatically step through
all eight channels at the indicated
C2
6
8
4
1
7
2
5
3
COM
START
N CTS
= LOW carry arrived?
Figure 5. The user interface is a window with buttons offering full control over
?
the eight switched devices, as well as useful status information indicators.
Y
The computers processor must per- in question. After this communication is controller ICs are connected together
form a large variety of tasks. It must completed, the CPU continues with causes certain deviations from this rule,
execute programs, look after memory whatever it was doing at the time that it as indicated in Table 1.
management, maintain communica- received the interrupt request. Not all of the IRQ lines are available for
tions with various system components The interrupts are all handled by an expansion cards. Some are only pre-
(ranging from the real-time clock IC to interrupt-controller IC. The original XT sent on the motherboard, and the high-
the hard-disk drive) and much more. machines had 8 interrupt lines, while in er-numbered lines are only available
Good communications between the later models two controllers are with 16-bit ISA slots (which is of course
various elements of the system, and a arranged in series to provide a total of not a problem with relatively modern
certain amount of hierarchical structure, 15 available IRQ lines. computers). All available IRQ lines are
are needed for this to all work smooth- Unfortunately, several IRQs are claimed present on the PCI connectors.
ly and efficiently. The interrupt lines and by internal components such as the As can be seen from Table 1, there is
DMA channels of the PC were devel- timer IC, the keyboard driver and the not all that much room for expansion.
oped to aid in this process. Every coprocessor, so that relatively few free IRQ5, 9, 10, 11 and 12 are the only free
device which is either located inside the IRQs are left for use with ISA and PCI interrupt lines. When you consider that
computer or connected to the comput- expansion cards. Table 1 summarizes a sound card often takes two IRQs and
er (such as a joystick port or a sound the available IRQs and the devices to that a graphics card also demands an
card) first has one or more I/O which they are assigned. interrupt line, you can see that there is
(Input/Output) addresses assigned to it PC users are frequently confused by very little left over. We will return to this
for transferring data between the lines 2 and 9. IRQ9 from the second IC subject later on.
processor and the device. A special I/O actually replaces IRQ2 from the first IC,
address region is set aside for this pur- so that both of these lines have the DMA
pose. In addition, there are two addi- same function. In certain cases, prob- DMA (Direct Memory Access) is a radi-
tional types of signal lines present to lems can occur with a component cal technique which allows one system
support fast interactions between a sys- using IRQ2 or IRQ9. As a rule, the soft- component lay claim to other system
tem component and the CPU or ware will recognize one of these IRQ components. In contrast to IRQ, in
between two system components: IRQ lines but not both of them. If the com- which a component signals the CPU
and DMA. ponent in question does not work prop- that it must give its attention that com-
erly with IRQ2, try it with IRQ9 (or vice ponent, with DMA a component can
IRQ versa). One of these two settings will exchange data directly with another
IRQ stands for Interrupt Request. A usually work okay. component without the intervention of
system component sends such a The order of precedence (or priority) of the CPU. The CPU can thus continue to
request to the CPU to indicate that the the IRQ lines is also clearly defined. In perform its own regular tasks. In order
processor must temporarily suspend its principle it runs from low to high (IRQ0 to properly manage the DMA traffic, a
current activities and communicate as thus takes precedence over IRQ1), but special DMA controller IC is provided to
quickly as possible with the component in practice the fact that two interrupt execute the necessary tasks. Using
Solving problems
If two components in the PC use the
same IRQ or DMA line, a conflict situa-
tion is produced which can have seri-
ous consequences for the stability of
the system. There are several ways to
see which components use which IRQ
and DMA lines. Under Windows 95 you
can simply have a look at the system
configuration under Settings - Control
Panel - System - Device Manager -
Properties. If you are still using
Windows 3.1 or DOS, you can use the
program MSD (which is normally pro-
vided along with Windows or DOS).
Figure 1 illustrates a situation in which
the computer is pretty well filled with
expansion cards. Based on this exam-
ple, lets have a look at the possible
problems and their solutions.
Serial ports
A modern PC normally has two RS232
connectors which use IRQ4 (COM1)
and IRQ3 (COM2). COM1 is usually
reserved for the mouse. If a modem is
added, it can always be connected to
COM2. An internal modem can be con-
figured to be COM3 or COM4. You
should choose COM4, since COM3
shares an interrupt line with COM1 and
COM2 shares an interrupt line with
COM4; COM1 and COM3 can thus not
be used at the same time. If you want to
also connect a drawing tablet or an IR
remote control, then it is a good idea to
use the special PS/2 connector for the
mouse (this connector is found on the
motherboard of most Pentium PCs)
but first make sure that the mouse can
be used with a PS/2 interface! IRQ12 is
normally reserved for a PS/2 mouse. If
you do not use the PS/2 bus, then the
Figure 1. An example of IRQ and DMA utilization in a Windows-95 PC.
IRQ assignment can usually be dis-
abled by a jumper on the motherboard. booted up). The graphics card usually BIOS settings
However, Windows often has problems uses one of IRQ9, 10 or 11. The peripheral devices integrated on
with releasing IRQ12 for general use, so the motherboard use interrupt lines and
dont just take it for granted that you Sound card DMA channels which can be configured
can use it for some other application. Sound cards are frequently a source of via the BIOS. It is possible to choose
conflicts, since they use a relatively among several I/O addresses and
Printer port large number of interrupts and DMA (sometimes) several IRQ lines for the
The parallel printer port normally uses channels. The traditional 8-bit COM ports. This is a handy way to
one interrupt line (usually IRQ7). This SoundBlaster card normally used IRQ5 exchange COM numbers; you can (for
applies to the standard EPP printer and DMA0 or DMA1, under the example) assign COM4 to an internal
port. If you select an ECP port in the assumption that the second printer port modem even though it is physically
BIOS setup, then a DMA channel is also either would not always be used or was configured as COM3. The printer
used (channel 3). If you add a second not present (a single IRQ line can be port(s) can also be set up in the same
printer port, it usually uses IRQ5. assigned to two different devices as manner; it is thus possible to select one
long as they are not both used at the of two DMA channels and one of two or
Graphics card same time). The modern-day 16-bit three IRQ lines in the ECP mode. If the
Actually, a basic graphics card does not Soundblaster (as well as higher-perfor- second IDE controller on the mother-
need an interrupt line or a DMA chan- mance models, such as the AWE64) board is not used, you can disable it in
nel. However, modern cards with their still uses only one interrupt, but it needs the BIOS, so that IRQ15 can be made
extended functions normally do two DMA channels (such as 1 and 5) available for some other application.
demand an interrupt line. Older-model since it must transfer 16-bit data. Other
(982051-1)
cards which use an S3 chip are notori- types of sound cards almost always
ous for insisting on using IRQ11, which need two IRQ lines in addition to the
in many cases leads to annoying con- two DMA channels.
flicts. Modern graphics cards are gen-
erally more flexible and can choose Network adapters and SCSI cards
from several different interrupt lines Since these types of cards must
(this happens when the computer is process a lot of data, they normally use
With contributions by
E. Saccasijn and K.H.A. Duesman
10k
23
2
related reference for the length of the 10
3 22
pulses received from the RC5 IR 9
remote control. It also displays a block SFH506
21
1 -36
of eight bytes, which hold essential 8
Capacitors:
C1 = 4nF7 SMA
C2 = 220F, 16V, radial
Semiconductors:
D1 = LL4148 (SMA)
D2 = 5V1 zener diode (SMA)
IC1 = SFH506-36 (Siemens)
IC2 = 4093 (SMA)
IRLED = LD271
LED1 = low-current LED, 3mm, red
Figure 4. Copper track layout and component mounting plan for the PCRemote inter- Q1 = BC847B (SMA)
face (shown at 200%).
Miscellaneous:
K1 = 9-way sub-D socket (female) cable
mount
Software
In true experimenters spirit, Mr.
Duesman has supplied a number of
files for this project, including executa-
Figure 5. Prototype of the PCRemote interface.
bles, PCB designs in HPGL format and
documentation. The following are the
emitted by any RC5 remote control. and a miniature infrared receiver/inter- main files you will require:
Two small batch programs are pro- face for connecting to the PCs RS232 PCRemote.com driver
vided to get you going. R.BAT is an port. The combination of the hardware PCRemote.dat sample data file
example of RC5.COM being launched and software enables just about any Manage.exe learn & edit key-
without a system-code argument, infrared remote control to supply PC stroke combinations
while R5.BAT passes system-code 5 keyboard codes. The program even (shell program)
as a filter to RC5.COM, forcing the supports different brands of IR remote Turnoff.com a help utility
decoder software to return function control. By linking keystroke combina- Testfreq.com a help utility
codes from VCR1 remote controls tions on the PC keyboard to a certain
only. All other remote controls then key on the remote control, PCRemote Obtaining the software
return 128 as the errorlevel code. may be taught to put certain code
Noise and nonsense signals produce strings into the PCs keyboard buffer. All programs and files discussed in this
errorlevel code 255. The program The interface required for this purpose is article may be found on a CD-ROM
may be left by pressing the Escape of the KISS type (Keep It Simple Stupid). entitled Software Competition
key. 1996/97, available through the
Hardware Publishers Readers Services as order
PCRemote Figure 3 shows the circuit diagram of code 976003-1.
the infrared interface. As in the previ- RC5 decoder project: look in subdi-
Mr. K. Duesman from the Netherlands ous project, an SFH506-36 from rectory Nl/10/.
produced the second mini project we Siemens is used to receive and PCRemote project: look in subdirecto-
present in this article. The project is demodulate the infra-red signals. The ry NL/7.
comprised of a program for MS-DOS interface also comprises an IR trans- (982052-1)
STACKED ANTENNAS
The underlying principle is illustrated Figure 2. Position of the nulls in the directivity diagram
in Figure 1. Two identical antennas are of a horizontally polarized pair of yagi antennas.
mounted at a distance d, and their
signals are taken to a power combiner
by way of two coax cables having the transmitter
same length.
As the antenna array is aimed at
3 X K55 A1
the desired (weak) station, the
received signals will arrive in-phase at 150
the inputs of the power coupler. If the transmitter
antennas are spaced by the so-called Y
optimum stacking distance, the gain so 180 0
obtained is 3 dB in theory. However,
this distance is not used here, because
we aim at cancelling interference, and
not increasing the antenna gain or
sharpening the antenna pattern!
A signal picked up from an inter- A2 980041 - 13
fering station at an angle will arrive
with different phase angles at each of Figure 3. A practical case based on two transmitters
the two antennas (actually, just the sharing the same frequency in the UHF band. Transmit-
dipoles). In fact, the signal arriving at ter X is the source of interference, transmitter Y, the
antenna A2 covers an extra distance, s, wanted station.
of
2 1V8 +5V
22k
R1 DVM
DVM
P3 P1
8V4 IC1 5k
50k
5V 3V4 MT
D1 78L05
C5
22k
R2
1N4001
47 1V8 0 DPM951
1 R6 10V DVM
S1
C4
270k
2 6
DC1 VREF
S2a 2g (200mV)
3 9
DC4 VOUT
22n IC2
BT1 C1 C2
7 10 5g (50mV)
ST VIN
100 100n ADXL05 R4 R3
9V 16V 4 8
ODC VPR C7 C6
28k7
3k16
5 100n 1
C3
1% 1%
22n P2 R5
47k 980047 - 11
20k MT
COMPONENT LIST
3
H1
H3
Resistors: C1 P1
C5 0
R1,R2 =22k - R2 5V
IC1
R3 =3k16 1% (Philips MRS25 P2 +
BT1
series) -
R4 =28k7 1% (Philips MRS25 series) + C2
R5 DVM
R5 =47k IC2 R4 +
D1
R1
R6 =270k S1 C7
P1 =5k multiturn 10 turn horizontal R3
R6
S2
P2 =20k multiturn 10 turn horizon- C4 C3
tal C6
980047-1
P3 =50k multiturn 10 turn horizon-
H4
tal
H2
1-7400P3
89 980047-1
Capacitors:
C1 = 100F 16V radial
C2 = 100nF Sibatit (Siemens) Figure 3. Copper track layout and component
C3,C4 = 22nF MKT (Siemens) level (0 g), and mounting plan (board not available ready-made).
C5 = 4F7 10V radial adjust P3 for 1.80 V
C6 = 1F MKT (Siemens) again. Now con-
C7 = 100nF MKT (Siemens) nect the DVM module to the Finally a few words about the DVM
accelerometer board. module used in this project. This mod-
Semiconductors:
2. Change back and forth between ule has an option for floating mea-
D1 = 1N4001
IC1 = 78L05 the two ranges. The indicated surements, which allows the circuit to
IC2 = ADXL05JH (Analog Devices) value should remain the same. If be powered by a single battery. The
not, adjust P3. Next, adjust P1 accelerometer board has a 5-volt con-
Miscellaneous: again until the module indicates nection for powering the DVM mod-
BT1 = 9V battery PP3 block 0 g. Repeat these adjustments ule. It should be noted that the nega-
S1 = rocker switch, 1 make contact until a reasonable optimum is tive connection of the DVM module
S2 = rocker switch, 1 c/o contact, or
achieved. represents a low resistance. Conse-
3x c/o contact for decimal point on
dvm 3. Select the 2-g range, and hold quently it can not be connected to the
DVM = DPM951 DVM module (Con- the board perpendicular with negative terminal of the accelerometer
rad) pin 10 of IC1 pointing upwards. board. So it is connected to the
Adjust P2 for a reading of 1.000 (buffered) positive terminal instead.
(1 g). Now turn the board so that The only difference it makes is the ori-
pin 10 of IC1 points downwards. entation of the sensor (simply turn the
and DVM) are wired up as illustrated The DVM should then indicate accelerometer board 180 degrees). By
in Figure 4. Do not yet connect the 1.000. If not, adjust P2 until the using a triple changeover switch in
DVM module, however, because the deviation for +1 g equals that for position S2, the decimal point on the
accelerometer has to be adjusted first. 1 g. This deviation is caused by DVM module can be switched accord-
the above-mentioned (small) ing to the range selected.
ADJUSTMENT transverse sensitivity of the (980047-1)
1. Connect a digital multimeter to ADXL05.
the circuit ground and DVM ter- That completes the adjustment of the Reference:
minal, and adjust P1 for a reading instrument. Having boxed the project, Accelerometer Type ADXL05, Applica-
of 1.80 V. Next, you should be ready to tion Note, Elektor Electronics April 1997.
connect the multi- Figure 4. Suggested do some real-world g
meter between wiring diagram. The testing in a fast elevator
ground and decimal point on the or one of those stomach-
+DVM. Make DVM module is churning machines you
sure the board is switched with two sec- see at funfairs.
tions of S2.
DVM
4 -
BT1
1
INHI
2
INLO
LK4
3
9V VDD
C1 P1 0 4
C5 VSS
- R2 5V
+ IC1
P2 + 5
BT1 COMMON
- 6
+ C2
R5 DVM
IC2 R4 + 7
D1
R1
REFLO
LK5
S1 C7 5g 2g 8
S1 REFHI
R3 S2a
R6
S2 9
C4 C3 BP
C6
980047-1 10
BP
P3
11
12
S2b DP3
LK6
13
DP2
14
DP1
S2c DPM951
980047 - 12
C13
K8 IC2 5V 5V
1
C6
7805 5V 5V
R13 2
100n K2
C15 V+
10k
1 16
C2 C1 C3 C4 C7 C10 14 C1+
1
6 TXD5 3 IC7 6
100 100n 100n 10 100n 100n RB0 C1
25V 16V PD1 18 7 RXD5 11 14 RXD 2
RA0 RB1 T1IN T1OUT
PD0 17 8 CTS5 10 7 CTS 7
R5 RA1 IC8 RB2 T2IN T2OUT
PD2 1 9 PMISO 12 13 TXD 3
12V 10k RA2 RB3 R1OUT R1IN
IC6 PD3 2 PIC16C84 10 RTS5 9 8 RTS 8
RA3 RB4 R2OUT R2IN
78L12 BS250 R6 DEBUG 3 -10/P 11 PONL 4 C17 4
MCLR RA4 RB5 C2+
1k 12 PMOSI 9
4 RB6 MAX232
5V MCLR 13 AT RES 5 15 5
R4 R7 RB7 C2
C26 C24 C23 C27 T1 C16 V-
100k
4k7
OSC1 CLKOUT
R9 6
10 100n 100n 10
16 15 5 5V C14
U D1
100
270
25V 16V R8 C13 ...C17= 1 / 16V
X2
IC5c 6 14 5V
1N4001 C5
C20 C18 C19 IC5 5V K1
1 100n
5V IC5 = 74LS07 7 P1 1
R3 1 8x 1k 5 100n 18p 10MHz 18p
2
PD3
3
10k B3 RS 4
B2 R/W 5
PD1
PD0
PMISO
U
PONL
PMOSI
2 3 4 5 6 7 8 9 B1 EN 6
S4
7
B7
B7
B5
B6
A2 A2 13
A0 2 12 B0
A3 PD0 PB0 A3 14
A1 3
PD1
IC9 PB1
13 B1
A4 15
A2 6 14 B2
A5 5V PD2 PB2 16
A3 7 15 B3
A6 PD3 PB3
14 A4 8
AT90 16 B4
PD4 S1200 PB4
S3 A5 9 17 B5
6 B0 PD5 PB5 K3
RB0 A6 11 18 B6 MCLR MCLR VPP
A0 18 7 B1 PD6 PB6
RA0 RB1 19 B7 B6 CLK
A1 17 8 B2 PB7
RA1 IC1 RB2 RESET 1 B7 DATA
A2 1 9 B3 RESET
RA2 RB3
A3 2 PIC16C84 10 B4 XTAL1 XTAL2
RA3 RB4 5V 5V
A4 3 11 B5 5 4 10
RA4 RB5
12 B6
5V MCLR 4 RB6 R10 5V
MCLR 13 B7 S5
R1 1 8x 1k RB7 K6
10k
RESET
OSC1 CLKOUT
B7
16 15 5
DEBUG B6
K4
270
R2 5V B5
2 3 4 5 6 7 8 9
S1 X1 X3 1
AT RES
T3 T2 R11 B0 2
C25
10k
A0
A1
A2
A3
A4
A5
A6
B7 9
B4
10
B5 19 1 IC3 19 1 IC4
2 3 4 5 6 7 8 9 2 3 4 5 6 7 8 9
B6 5V
B7 & &
5V K5
S2 EN EN
1
A0 2
A1 3
74HC541 18 17 16 15 14 13 12 11 74HC541 18 17 16 15 14 13 12 11
A2 4
5V
D10
D11
D12
D13
D14
D15
D16
D2
D3
D4
D5
D6
D7
D8
D9
A3 5
A4 6
20 C8 20 9 8 7 6 5 4 3 2 9 8 7 6 5 4 3 2 A5 7
IC3 IC4 A6 8
10 100n 10 9
10
R14 1 8x 2k2 R12 1 8x 2k2 980049 - 11
Controller Clock RAM Progr.Flash EEPROM I/O TIMER RS232 SPI PWM
PIC 16C(F)84 10 MHz 36 B 1024 W 64 B 13 1
AVR AT90S1200 16 MHz 0 B* 512 W 64 B 15 1
AVR AT90S2313 20 MHz 128 B* 1024 W 128 B 15 2 X X
AVR AT90S4414 20 MHz 256 B* 2048 W 256 B 32 2 X X X
AVR AT90S8515 20 MHz 512 B* 4096 W 512 B 32 2 X X X
* + 32 8 Bit Registers
H1
H2
C1
D1
+
C4 at the full clock rate makes
C26 C8 them four times as fast as a
- C23
IC3 IC4 PIC, assuming the same
C24 C10
K8
C27 C3
clock rate is used.
R3
C2 R7 For comparison pur-
980049-1 980049-1
R4 R1
R5 T1 R6 S1 S4 poses, Table 1 lists the main
R13
K2
C14 features of the individual
microcontrollers. Currently,
S3
C16
S2 the best available microcon-
IC8
IC5
trollers are the PIC16F84,
IC7
C9
C13 AT90S1200 and AT90S8515
IC1 IC9
(max. 8 MHz).
C17
C7
C15
C6
C20 R2 K4 S5 K5
X2 R9 X1
HARDWARE
R8
C5 DESCRIPTION
P1 C25 C12
C19
K3 AND
X3
C11 K1
C18 K6 CONSTRUCTION
T2 R10 R11 K7 T The hardware and software
T3 presented in this article
H3
H4
C21 C22
allows you to program
Microchips PIC16C84/16F84
as well as all currently avail-
able (early 1998) Atmel AVR
microcontrollers (AT90S1200,
AT90S2313, AT90S4414,
AT90S8515). All RISC micro-
controllers supported by the
present design are in-circuit
programmable using a
shell called PICAVR32
which runs under Win-
dows 95. These controllers
offer an internal Flash/EEP-
ROM program memory,
SRAM, a plethora of
(C) Segment
980049-1
Figure 2. Every-
thing fits on this
double-sided
through-plated
board (available
ready-made
through the Pub-
lishers).
chips may be programmed and tested firmware PIC, IC8. This chip responds the PIC chips S1.7 and S1.8 are
by inserting them in a DIL socket on by forwarding control commands set switched on. The other switches in S1
the programmer board. Mind you, up by the PC software either to the PIC and all switches in S4 should be on.
these are the chips you want to pro- or the AVR to be programmed (posi- All switches in S2 and S3 should be set
gram, not the PIC mentioned above tions IC1 and IC9 respectively). In the to off .
(containing the firmware code). present programmer both microcon- The /RESET line of an AVR chip is
In addition, all microcontrollers troller types are programmed serially controlled via transistor T2. The falling
may be programmed in-circuit via con- by way of an SP interface. For this the pulse edge at the /RESET pin is essen-
nectors K6 (AVR) and K3 (PIC), which is AVR chips employ I/O pins 5, 6 and 7 tial to initiate a programming sequence
particularly useful for the AT90S4414 on Port B (MOSI, MISO, SCK)). The on an AVR chip. Because the /MCLR
and AT90S8515 which come in a PLCC PICs are programmed via I/O pins 6 pin on PIC chips has to be at 12 V dur-
case. and 7 of Port B (CLK, DATA). To these ing programming, T1 is required in
The programmer board is powered programming signals should be added addition to T3 which arranges the
by a mains-adaptor (15 V, 500 mA) con- the supply voltage (GND, VCC) and actual resetting of the PIC. Normally,
nected to K8. When only AVR chips are the /RESET or /MCLR signals, all of T1 and T3 are both switched off. The
programmed, a 9-volt adaptor is suffi- which are also needed during pro- junction R5-R7 supplies a voltage of
cient because AVR devices do not gramming. All relevant signals are about 4 V, which arrives at the /MCLR
require an additional programming taken into account in the pinning of input of the PIC to be programmed,
voltage. The supply voltage is stabi- the in-circuit programming connectors via resistor R6. To reset the PIC, the
lized by a 7805 voltage regulator (IC2) mentioned above. When designing /MCLR pin is pulled to ground via T3.
and its satellite decoupling capacitors your own (application) circuits in The programming voltage is applied
C1-C4 for smoothing and decoupling. which this type of programming is to by switching on the p-channel MOS-
A 78L12 regulator (IC6) is responsible be employed, you should make sure FET. When the MOSFET conducts, it
for the extra 12-V PIC programming that collisions between the program- short-circuits R5, so that 12 V is applied
voltage. mer hardware and the target system to R6.
The heart of the PICAVR32 pro- hardware are avoided! In particular, be PICs to be programmed are clocked
grammer is PIC IC8, which contains sure to provide series resistors on the at 4 MHz other clock frequencies are
the firmware code and arranges all signal lines used during programming. also possible. For AVR chips a quartz
communication with two parties: at To prevent the risk of your own cir- crystal is available, and, as an alterna-
one side, the PC, and at the other side, cuits under test causing damage to the tive, a complete crystal-controlled oscil-
the microcontroller to be read or pro- programmer hardware, the latter con- lator.
grammed. The link with the PC is tains an open-collector driver type The DIP switches provide assis-
established using an ordinary 9-way 1- 74LS07 (IC5) as well as transistors T2 tance with the testing of input/output
to-1 sub-D extension cable (socket & and T3, which buffer all lines of the operations of the two microcontrollers.
plug). The well-known level converter firmware PIC, IC8. The use of open- Switches S1 and S4 connect 1-k pull-
type MAX232 (IC7) on the program- collector drivers does, however, neces- up resistors to all port lines, while S2
mer board changes RS232 voltage levels sitate the switching on of the DIP and S3 allow port input lines to be held
(12 V) into TTL/CMOS compatible switches for the pull-up resistors. For logic low. Users should take care not to
signals (5-V), and feeds them directly the AVR chips, the Port-B lines are use the input switched on port lines
to the corresponding I/O pins of the pulled up (S1.6, S1.7, S1.8), while for declared as outputs! Doing so (by acci-
WINDOWS 95
CONTROL SOF TWARE
The software developed for the PIC &
AVR Programmer also enables assem-
bly code for PICs and AVRs to be
developed, programmed and read. For
this purpose, the program as well as
the EEPROM memory may be read
and written. You can get started with
the programmer once it is connected
up to the PCs serial port (via a 9-way
sub-D cable with no crossed wires),
and connected to its power supply. To
begin with, you should burn a PIC
with the file TESTPIC.ASM, or an AVR
chip with the file TESTAVR.ASM. In
addition to a controller test, all LED
outputs are checked with the aid of a
running light. Follow this procedure.
Launch PICAVR32
The PICAVR32 shell first looks for the
programmer hardware. When the
hardware does not report back, a mes-
sage reading No COM Port Selected is
indicated near the bottom of the
screen.
Assemble file
Use FILE|START ASSEMBLER to
launch the assembly-code to object-
code translation.
Figure 3. Some
screenshots showing
PICAVR32 in action.
controller is started, and the LEDs on procedure and the relevant routines settings are very simple, because they
the programmer board act as a (slightly are discussed in greater detail in the only cover the Flash program protec-
mixed-up) running lights. PICAVR32 Help file. tion option. With PICs, the settings not
By selecting OPTIONS|SHOW only control the program memory and
OPTIONS ERRORS you enable the program to EEPROM protection, but also the con-
The software offers various optional display the assembler s error report figuration of the oscillator and the
functions in addition to the straight- file. The Error-Viewer is also opened power-up and watchdog timers.
forward load-file-and-program-away automatically whenever the assembler CONTROLLER|ERASE CON-
sequence outlined above. Help with writes an error entry in the Error file. TROLLER enables microcontrollers to
the individual menu options can be be cleared (erased). This option is useful
summoned up by pressing the F1 key. All functions found under the menu if you want to reprogram a read-pro-
The menus FILE, EDIT and HELP option CONTROLLER cover the tected PIC.
should be self-explanatory, so they are downloading/uploading of programs, CONTROLLER|START CON-
not discussed here. EEPROM and the internal configura- TROLLER performs a hardware reset
Under OPTIONS|CONTROLLER tions of the individual microcon- of the microcontroller.
you can select the controller to be pro- trollers. The individual functions are,
grammed. If the controller type is of course, dependent on the selected PROGRAMMING THE
included in the first line of the assem- microcontroller type. MICROCONTROLLERS
bly-code file, behind the semicolon, CONTROLLER|DOWNLOAD writes A discussion of the programming pro-
then it is automatically selected when a currently loaded hex file or the object tocols for the two rival microcontroller
the assembly-code file is loaded. code (resulting from a previously com- families is, unfortunately, beyond the
The OPTIONS|EDITOR menu entry piled assembly-code file) into the con- scope of this article. Those of you inter-
allows you to select editor cosmetics troller. PICAVR32 has an internal buffer ested in these matters are referred to
like font, colour and type, as well as for the object code to be written into the following publications:
background colour. the microcontroller. A hexadecimal file - Atmel AVR Enhanced RISC Micro-
OPTIONS|ASSEMBLER OPTIONS loaded using the FILE|LOAD INTEL- controller Data Book
serves to adjust the assembler and the HEXFILE32 option is also transferred - Microchip Datasheets DS30430A and
parameter required for calling the to this buffer, which has no graphics DS30189D.
assembler. For PIC devices you should display in PICAVR32.
use Microchip Assembler Release 1.4. For These publications not only contain
AVR devices, use AVRASM Version 1.1. FILE|SAVE HEX enables a controller extensive descriptions of the program-
Be sure to obtain the DOS versions of to be read, and its contents to be writ- ming algorithms and procedures rec-
these programs, which are not ten into a hex file. ommended by the respective chip
included on diskette 986019-1. They manufacturers, but also provide dis-
are, however, available free of charge CONTROLLER/UPLOAD reads the cussions on the controller structures
from the Microchip and Atmel Internet program memory in the microcon- and explanations of all assembly-code
sites. troller, and provides a window dis- instructions.
OPTIONS|AUTODOWNLOAD, playing the contents word by word in Finally, excellent support for the
when enabled, automatically launches hexadecimal notation. If a microcon- Atmel AVR series of microcontrollers is
a program download operation, fol- troller is read-protected an empty available from our advertiser Equinox
lowing successful source code assem- program memory is displayed (FFFFh Technologies.
bly. for AVRs, and 3FFFh for PICs). Output (980049-1)
OPTIONS|PIC DIFF DOWNLOAD is in the form of words, because each
enables a difference-file download for of the two controller families has its References:
PICs. It is particularly useful if only cer- own memory organisation. With PICs, 1. Electronic Handyman,
tain parameters of a program are to be the word length is 14 bits, with AVRs, Elektor Electronics December 1997.
modified, or just a couple of bytes. This 16 bits. 2. Programmer for
option is only available for PICs CONTROLLER|WRITE TO EEP- Handyman/AT90S1200,
because AVR chips have to be com- ROM enables you to modify individ- Elektor Electronics December 1997.
pletely erased before any program- ual bytes in the EEPROM range of the
ming of the program memory. microcontroller. The EEPROMs in the
OPTIONS|SLOW PC should be PIC and the AVR are organised byte-
switched on when using a sluggish PC wise.
not having a serial FIFO for the RS232 CONTROLLER|UPLOAD EEPROM
interface. Use this option if errors occur enables the complete EEPROM to be
frequently when downloading pro- read, and the contents to be displayed
grams. bytewise in hexadecimal notation.
OPTIONS|DEBUG MONITOR Under CONTROLLER|CONFIGURE
launches a Debugging monitor that CONTROLLER you can define the
alows hex values to be produced using basic configuration data of the relevant
a test-output routine. The Debugging microcontroller. With the AVR chip, the
Flat-panel dis-
plays have been
in use in televi-
sion receivers
and computer
monitors since
the early 1980s.
Strictly speaking,
all electronic dis-
play devices,
except the cath-
ode ray tube
(CRT) can be
classified as flat
panel types. But
Sony introduced
a flat CRT television (Trinitron) as early as 1982. What the world is waiting
for now is the thin flat-panel display, which can be hung on a wall like a pic-
ture. However, in spite of early optimism after its introduction some years
ago, lowering the cost of materials for the monolithic types and, more par-
ticularly, the assembly costs of hybrid devices have posed far greater prob-
lems in practical applications than originally expected.
5
15,1" 15,1"
12,1" 12,1" 12,1"
19" 19"
15,1" 15,1"
980020 - 15
In principle, use is made of phosphors some time for use in good-quality tele- modifications ensure that the electron
that are ignited by an electron beam. vision sets and computer monitors. gun gives a sharp picture at the edges
The cathode consists of a strip of The development of the flat panel an in the corners of the tube, and min-
conducting material on to which tiny CRT over the past twenty-odd years imizes any distortion resulting from
cones (some 10,000 per pixel) are has been one of overcoming a great spreading of the electrons in the cor-
deposited. The cathode in this type of many technical difficulties. One of ners.
display fulfils the same function as the these was the design of a rugged, Other firms, such as Hitachi, Pana-
electron gun in a CRT. A potential of mechanical construction able to with- sonic, LG, Mitsubishi and Samsung
200800 V applied between the cath- stand the large forces resulting from have also developed flat panel CRTs
ode and anode ensures that the phos- the high vacuum inside the tube. Such which will shortly be used in 17 in and
phor is ignited to generate light. a large, heavy tube is difficult to man- 19 in computer monitors (and, of
The FED technology is new. Pre- ufacture, but is now produced from course, in smaller TV sets).
production models are available to glass that is also used for automobile [980020]
designers with aperture diagonals of windscreens.
56 in. Another difficulty was the use by
most manufacturers of a shadow mask
THE CRT FIGHTS BACK or aperture grill that ensures correct
So as to ensure their ruggedness division of the electron beam for the
(remember that there is a high vacuum three primary colours.
inside), cathode ray tubes are curved Sonys Trinitron uses a single
at the front. This curvature causes electron gun with three cathodes
some distortion in the picture and aligned horizontally, an aperture grille,
results in increased sensitivity to reflec- and vertically striped phosphors. The
tions in the glass. cathodes are tilted towards the centre
Flat panel type CRTs have been so that the electron beams intersect
around for some time, but only with twice, once within the electron lens
small apertures. However, Sonys focusing system and once at the aper-
Trinitron, RCAs beam-guide CRT, ture grille. This type of tube is there-
and Mitsubishis Diamondtron that fore much lighter and cheaper to pro-
are now available in aperture diago- duce than three-gun tubes.
nals of up to 50 in (full colour) are to The accuracy with which the elec-
all intents and purposes large size, flat tron gun can focus the electron beam
panel CRTs. Moreover, the recently is of vital importance for the quality of
introduced Wega FD Trinitron from the picture. New technologies have
Sony is a true flat panel CRT. Because made it possible to modify the electron
of the frontal flatness of these CRTs, gun to such an extent that focusing is
the picture can be seen at large view- improved greatly. This means that the
ing angles without loss of contrast or tube need not be made deeper. More-
colour resolution. Moreover, the CRTs over, the deflectors have been made
do not suffer from annoying reflec- larger, which further increases the
tions They have been available for accuracy of the beam. Other, smaller
programs on the ESPRESSO disk, copy ure 46. The low-pass filtering is neces- about amplitude modulation, it was
the entire folder from the CD-ROM to the sary to suppress any unwanted spec- seen that when a signal is multiplied
hard disk: the programs can then be run tral components of the signal. with the sinusoidal output of a local
from the hard disk. This procedure is oscillator (LO), the spectrum is shifted
also explained in the README file on the BBC REVISITED by the frequency of the LO. It is, there-
CD-ROM. The envelope detector may be used to fore, possible to restore the original
demodulate the 198 kHz BBC signal spectrum by a second multiplication.
When copying a file or folder under Win-
(file BBC188. WAV) with a local oscillator The corresponding experiment, XDE-
dows, its read-only setting is also (LO) frequency of 188 kHz, which MOD5.SPP is shown in Figure 47, and
copied. With many ESPRESSO programs, results in an intermediate frequency the result in Figure 48. If the LO signal
the read-only attribute causes an error (IF) of 10 kHz. This is done with file is exactly the same as that used to
report to appear, or graphics to disap- XDEMOD3.SPP, and the result is heard modulate the original signal, that sig-
pear. This problem is solved by using the with the use of file TMP4.WAV. When we nal can be regained by multiplication
Explorer, selecting all files in the study the spectrum of file BBC188.WAV and low-pass filtering (Figure 3 and
(experiment XDEMOD2B), we will note a Figure 4 top).
ESPRESSO folder on the hard disk, and
peak at 10 kHz, which is the converted Should the phase of the LO signal
clicking on file Properties. Remove the carrier (IF) of the signal, and a less pro- be 90 out of phase with the carrier of
check in the read-only box by clicking on nounced peak at 5 kHz. the received signal, there would be no
it. Close by pressing OK, whereupon The weak spurious IF of 5 kHz signal left after the low-pass filtering. It
everything should function normally. results from the mixing of the LO sig- is, therefore, essential that the LO is in
nal with the carrier of Europa 1 (trans- phase with the carrier of the AM signal.
mitting at 183 kHz). And, indeed, This is called synchronous or coherent
By Dr. Ing. M. Ohsmann when file BBC188.WAV is demodulated demodulation. When the two frequen-
46
HIGH-RESOLUTION
S P E C T R U M A N A LY S E R
We have already seen that with the aid 47 tmp1
H (f)
scope
of an AM signal generator or by means
tmp2
of multiplication with a sinusoidal fre-
f
quency the spectrum of a signal may
be shifted. This principle is used in
sine
modern receivers to convert the input
signal into an intermediate frequency LO
49 RDS DETECTION
A practical application of quadrature
demodulation is found in VHF and
UHF radio. A car radio, for instance, is
switched on or off when travel news is
broadcast on a 57 kHz subcarrier. This
is amplitude-modulated with an audio
frequency of, say, 125 Hz when travel
news is being broadcast. This is the I
constituent.
Today, the same channel is used for
the radio data system (RDS). To pre-
vent the ARI and RDS signals affecting
one another, the subcarrier for the RDS
is 90 out of phase with the main car-
rier. This means that the RDS data are
conveyed in the Q constituent. Experi-
Strictly speaking, this treats frequency Figure 50. Composition Figure 51. This is how
modulation as a variation of phase of a system for quadra- the ARI and RDS sig-
modulation. There is then no longer a ture modulation. nals are demodulated.
simple connection for calculating the
spectrum of the transmitted signal.
Even with a sinusoidal signal, the spec-
trum soon becomes fairly complex: 51 H (f)
ARI
WARBLE SIGNAL
52
The CD-ROM accompanying the
course contains an example of a simple
FM signal with sinusoidal modulation.
In Germany, ARD (Arbeitsgemein-
schaft der ffentlich-rechtligen Rund-
funkanstalten der Bundesrepublik
Deutschland or, simply, Germany I)
transmits a special signal to indicate
the onset of travel news. This consists
of a 2350 Hz carrier that is frequency
modulated at 123 Hz with a modula-
tion index of 1. See Figure 54.
[This is, of course, of no interest to
readers in the UK, where the BBC and
Independent Radio Stations provide a
54
(see Figure 55) has a quiescent state, START BIT STOP BIT
marked SPACE, which pertains when 55
the teletype service is not active. A sin-
gle character begins with the START BIT,
at which the signal transfers to the
MARK state. The start bit lasts, in case of
a transfer rate of 50 symbols, 1/50 = 0 1 1 0 0
20 ms. This is followed by the data bits. MARK = 850 Hz
The old Baudot code (which is still
used here and there) uses five bits to
represent 64 alphanumeric characters.
Each bit has the same length as the SPACE = 1300 Hz
start bit. These are followed by a STOP
BIT that lasts 1.42 data bits whereupon
the system is in state SPACE. There then 20 ms
leader bit
follows a fairly long pause (asynchro- BIT = 0 = MARK
nous transfer), after which the data bit
stream is continued BAUDOT character "8" = 00110
980015 - 6 - 21
In FSK, the MARK state is given a fre-
quency of 850 Hz, and SPACE one of Figure 55. Typical
1350 Hz. The signals are transmitted in radio teletype signal. Figure 56. Configura-
line with the prevailing state by means tion of a filter decoder
of, for instance, a voltage-controlled for radio teletype sig-
oscillator (VCO). The distance between 850 Hz nals.
the two frequencies is called the SHIFT. 56 band-pass
57
58
47
100
100
47
L1
Heavy duty 50 m/cell battery to be discharged to a certain D2
-
general to discontinue the use of NiCd voltage of 0.651.2 V, the voltage has to 2 980050-1
R1
batteries in most consumer products. be raised. To this end, the astable mul- R2
tivibrator formed by T1 and T2 oscil-
C1
MEMORY EFFECT lates at a rate of 25 kHz. When T2 is on,
Another disadvantage of sintered (not current flows through inductor L1, so
mass plate) NiCd batteries is, as that energy is stored in the magnetic
T2 C2
T1
already mentioned, their memory field. When T2 is off, the inductor is
effect. This manifests itself in the cell discharged via the LED, whereupon
1-050089
980050-1
R3
retaining the characteristics of previous this lights.
tnemgeS )C(
(C) Segment
R4
cycling. That is, after repeated shallow- Diode D1 prevents the energy
D1
depth discharges the cell will fail to stored in the inductor from leaking
L1
provide a satisfactory full-depth dis- away via the base of T1. This might
D2
charge. Note, however, that Eveready happen because the capacitors in the
+
cylindrical nickel-cadmium cells are circuit have fairly high values, whereas
particularly noted for their lack of the resistors have low ones. The cho- Figure 2. The discharge circuit is
memory effect. sen values ensure that the discharge intended for 1.2 V batteries. If
The memory effect is a nuisance, current is sufficiently high. When the several of these, or a 9 V
because it means that a battery with a battery voltage is 1.2 V, the discharge rechargeable NiCd battery, have
nominal capacity of, say, 600 mAh, after current is some 200 mA; at 0.8 V, it has to be discharged, an appropriate
a number of charge/discharge cycles dropped to about 100 mA, and at number of PCBs are needed.
has a useful capacity of only 300 or 400 0.65 V to around 50 mA. When the bat-
mAh. This has nothing to do with the tery voltage drops to 0.65 V, the dis-
life of the battery: even a new battery charge process is discontinued.
if charged as stated will soon lose part Parts list
of its capacity. CONSTRUCTION Resistors:
Fortunately, this reduction in capac- The tiny circuit is best built on the R1, R4 = 4.7
ity can be prevented fairly simply. printed-circuit board shown in Fig- R2, R3 = 100
Moreover, batteries that already suffer ure 2, but this is not available ready
from the memory effect can be made. However, a small prototyping Capacitors:
C1 = 0.22 F
restored to their nominal capacity. The board will do very nicely as well.
C2 = 0.47 F
cure is simply to ensure that a battery Inductor L1 is a small choke which
is occasionally fully discharged before should be readily available from most Inductors:
it is recharged. Occasionally means electronics retailers. L1 = choke, 4.7 mH
before every third or so recharge. Note The LED should be a high-effi-
that there are chargers on the market ciency type, while, because of the Semiconductors:
that have the discharge facility built in, threshold discharge voltage, D1 must D1 = BAT85
but this will certainly not be the case in be a Schottky type. D2 = LED, red, high efficiency
T1, T2 = BC63
the less expensive types.
USAGE
CORRECT There is not much that can be said
DISCHARGING about using the discharge unit. It is sim-
There is no need for extensive circuitry ply a matter of connecting the 1.2 V bat- will be fine.
to discharge a battery: a simple resis- tery with correct polarity, checking that If a battery is suspected of suffering
tor or light bulb will accomplish it the LED lights, and disconnecting the from the memory effect, discharge and
readily. It is, however, necessary to battery when the LED goes (or is) out. recharge it two or three times in suc-
keep an eye on the discharge time, In general, the discharge period will cession. This action will in almost all
because otherwise there is the risk that normally be three to four hours. As cases restore the capacity of the battery
the battery is discharged beyond a cer- mentioned before, the battery does not completely (commensurate with its life,
tain voltage. When this happens, it need to be discharged fully before it is of course).
may cause polarity reversal in the cells recharged: before every third recharge (980050-I)
The U2514B is an
integrated bipolar
radio circuit suitable
for digital tuning sys-
tems. It contains an
FM front end with pre-
Figure 1. Block schematic of the
amplifier and FM Type U2514B AM/FM Receiver IC.
stereo decoder as
well as a complete
AM receiver and Features:
FM wideband AGC
demodulator. Stop-
manufacturers
not
from manufacturers
does not
Mute function
use in small radios,
Pilot canceller
or their
imply practical experience by Elektor Electronics
on information
timedia applications.
electronics industries
based on
is based
and electronics
The FM preamplifier input, FMIN (pin bypassed via the wideband AGC tran-
this note
28) see the block diagram in Fig- sistor. A capacitor (C18 in Fig-ure 2), is
electrical and
content of this
excellent noise performance and large and to shorten the transistor base to
signal behaviour. It is recommended to ground (pin 4). A tuned r.f. (radio fre-
connect a source impedance of 100
in the
to achieve optimal performance. The pins 3 (FMRF) and 27 (VS). The amplified
direct current through the amplifying r.f. signal is fed internally to the mixer
transistor is reduced by the internal input.
A Telefunken Semiconductors automatic gain control (AGC). This The FM local oscillator consists of a
Application means that in the case of large input transistor in a grounded-collector con-
Figure 2. Typical
application of the
U2514B circuit in
conjunction with a
Type U4285B phase-
locked loop.
52 Elektor 5/98
Pin Symbol Function AM FM
1 AMIN AM antenna input VRef High impedance
2 FMAGC FM AGC time constant VRef VRef 80 mV
3 FMRF FM RF tank High impedance VS / 0 to 1 mA
4 GNDRF Ground RF GND GND
5 FMOSCE FM oscillator emitter VRef 2VBE / 0 A 0.95 V
6 FMOSCB FM oscillator base VRef VBE / 0 A 1.7 V
7 AMOSC AM oscillator VRef /0.3 mA High impedance
8 OSCOUT Buffered AM/FM oscillator output VRef /0.3 mA VRef /0.7 mA
9 AMSADJ Current input for AM stop-signal adjustment AMsearch=VBE, AM=0.1 V 0.1 V
10 IFOUT AM/FM IF output VS /in 50 A VS /in 0.4 mA
11 AFSM AF smoothing 0.8 to 1.2 V 1.2 V
12 FMIFIN FM IF amplifier input VBE to GND/ 0 A VBE to GND
13 AMIFIN AM IF amplifier input 3.3 k to VRef 3.3 k to VRef
14 VREF Reference voltage input VRef = 2.4 V VRef = 2.4 V
15 FMDET FM discriminator VRef /1 A VRef /0 A
16 GND Ground GND GND
17 METER Field-strength output 0 to 2,3 V 0 to 2 V
18 OUTR AF output right 0 to 2.3 V/0.15 mA 0 to 2.3 V/0.15 mA
19 OUTL AF output left 0 to 2.3 V/0.15 mA 0 to 2.3 V/0.15 mA
20 CERES Ceramic resonator 456 kHz for AM search and for pilot-PLL in FM mode 0,1 to 2.3 V 0.1 to 2.3 V
Low-pass filter for pilot-PLL AM 0.2 V -
21 LPF
Low-pass filter for pilot-PLL AM search and FM 0.5 to 2 V 0.5 to 2 V
22 CTRLA Control input for mute, search mode and search sensitivity 0 to VRef 0 to VRef
Control input for forced mono, Control output for stop function,
23 CTRLB 0.1 V to VS ,30 k 0.1 V to VS, 30 k
Mono/stereo information
24 MPXIN Stereo decoder MPX input 0.8 V 0.8 V
25 MPXOUT AM/FM MPX output 0.8 to 1,2 V 1.2 V
26 AMFM AM/FM switch and pilot canceller time constant GND 1.54 V
27 VS Supply-voltage input 3 to 12 V/in 5 mA 3 to 12 V/in 9 mA
28 FMIN FM antenna input VRef VBE /0 A 1.5 V
To drive both the compensation pled out at the mixers output and fed in the stereo or mono mode. When the
network to pin 24 and an optional RDS via a ceramic filter to the demodulator. control voltage applied to pin 23 <1.1
(radio data service), the output imped- The demodulated audio signal is avail- V, the receiver is forced to mono.
ance at pin 25 (MPXOUT) is low. The able at pin 25 (MPXOUT) In the search mode (VCTRLA<0.8 V),
direct voltage is 1.2 V in FM mode In the AM mode, the signal is fed the internally generated stop signal is
(depending on the discriminator coil directly to the mixer. The antenna available at pin 23 as a low active sig-
alignment) and 0.81.2 V in the AM impedance must be higher than 25 k nal.
mode (depending on the signal level). to ensure correct operation of the level If both conditions
The open-collector output at pins 18 control in case of large signals. The LO
and 19 (OUTR and OUTL respectively) signal is generated by an integrated for AM: VMETER>VCTRLA
requires and external resistor to oscillator. The buffered LO signal is
ground (R7 and R6 in Figure 2 respec- used to drive the PLL. If the AM search for FM: VMETER (90/R8) >VCTRLA
tively). The deemphasis may be mode is required, the IF must be
achieved by an additional parallel 455 kHz. The IF output is fed via a and
capacitor (C13 and C12 respectively). ceramic filter to the demodulator. The
demodulated audio signal is available 1.1 V<VAFSM<1.3 V
FUNCTIONAL at pin 25 (MPXOUT).
DESCRIPTION When a control voltage is applied to for AM: current adjust into pin 9 for
In the FM mode, the antenna signal is pin 22 (CTRLA), the mode of the receiver fpin 20 = 455 kHz
fed via a tuned r.f. circuit to the inte- may be selected.
grated pre-stage, which consists of a The search mode is selected when for FM: detector coil adjust to
transistor grounded-base circuit. To the control voltage is <800 mV. Vpin 11 = 1.2 V for 10.7 MHz
protect the pre-stage against overload, The search sensitivity may be
an automatic gain control (AGC) is selected by varying the control voltage are fulfilled, a stop signal is generated.
included on the chip. in the range 100800 mV. When the [980058]
A tuned r.f. circuit on the collector is control voltage is 100 mV, the highest
necessary for amplifying and filtering sensitivity is achieved.
the FM signal, which is fed internally to In the reception mode, muting is
the mixer. It consists of a double-bal- possible by varying the control voltage
anced Gilbert Cell. in the range 0.81.4 V. When the con-
The local oscillator (LO) signal is trol voltage is 0.8 V, the highest mute
generated by an integrated oscillator. depth is achieved.
The buffered LO signal is used to drive The output at pin 23 (CTRLB) indi-
a PLL. THE IF signal (10.7 MHz) is cou- cates whether the receiver is operating
The conductance
tester goes one step
further than the usual
continuity tester found
in so many work-
shops. It contains a
buzzer to indicate a
very low resistance
between two points
along a conductor or
circuit and an LED
display to show the
order of resistance
between these points
Arguably, one of the most useful gad- (LEDs). These are driven by the well-
when the buzzer does gets in a small workshop is a continu- known display driver IC Type LM3915.
not sound. ity tester which enables the rapid
checking of whether a conductor or cir-
This circuit is designed specifically to
display the value of an analogue volt-
cuit is open-circuited or short-circuited. age via a row of LEDs.
It normally uses a buzzer to indicate a The LM3915 contains a reference
short-circuit (that is, a continuity in the voltage source and an accurate decadic
conductor or circuit). Such a device is potential divider. The voltages at the
improved considerably if it is given a taps of this divider are applied to a
means of showing the order of resis- series of comparators. These compara-
tance between the two probes when tors are driven sequentially in line with
the buzzer remains quiet. This quickly a rising input to the IC. The compara-
solves the question of is it a bad con- tor outputs can drive an LED directly.
tact? or is it a break in a cable?, and so The row of LEDs may be set to the dot
on. The simple indication provided in or bar mode. The brightness of the
the present tester shows at a glance the diodes can also be adjusted in accor-
relative magnitude of the resistance dance with individual needs.
between the two probes. One of the attractions of the
LM3915 is that it requires relatively few
INDICATOR external components (other than the
For a rough indication of a measured LEDs). The high-impedance input cir-
value of resistance (or its reciprocal, cuit of the IC accepts signals at levels
conductance) a liquid-crystal display from 0 V to 1.5 V below the supply
(LCD) or other fairly expensive indica- voltage. Provided that the input signals
tor is not necessary, and in the present do not exceed 35 V, there is no need
tester the indicator is formed by a for an external protection circuit. The
Design by L. Koch number of light-emitting diodes input voltage is indicated in 3 dB steps.
RESISTANCE D11
MEASUREMENT 1 1N4148
Since the LM3915 is designed for indi- D10
C1
D9
cating voltages, and the present circuit BT1
100n
is intended for measuring conductance
9V 2V7
D8
(or its reciprocal, resistance), a means 400mW
3
2k2
13
L7
tional potential divider at the input of 14
P1 LM3915 L6 D5 T2
the LM3915 and ensuring that the divi- 5
SIG L5
15
sion ratio is influenced by the magni- R1 50 7 L4
16
D4
REFOUT
tude of the resistance between the test L3
17
75
8 18
probes. REFADJ L2 D3 R5 R6 R7
4 1
In the circuit diagram of the tester RLO L1
10k
10k
100
D2
in Figure 1, the external potential 2
divider at the input of IC1 is formed by D1
BZ1
17k8
1k2
parallel with R3 via resistor R1 and pre-
set P1. This means that this resistance
affects the division ratio of the divider,
980045 - 11
and thus the signal applied to pin 5 of
IC1.
The design arranges for resistance Figure 1. The circuit dia-
values of 10 to 7.5 k to be indicated effected by leaving pin 9 (MODE) of the (arrows), gram of the conductance
tester is an example of
in seven 3 dB steps by the sequential IC open. If the bar mode is wanted, two for the
simplicity.
lighting of D2D9. The first diode, D1, pin 9 must be linked to pin 3. b u z z e r
lights when the resistance is lower than (Bz 1), and
10 ; this level may be preset to 0 CONSTRUCTION two for the
(that is, full conduction) with P1. The tester must, of course, be as com- power supply.
Transistors T1 and T2 in parallel pact as possible so that it can be car- The tester is best powered by a 9 V
with D1 ensure that in case of very low ried about in ones pocket. battery. Since the current drain of the
resistance between the test probes only Consequently, the printed-circuit circuit is at most 30 mA (with buzzer
D1 lights and that the buzzer, Bz1, is board for it (see Figure 2) is small. sounding), an alkaline-manganese
energized. Building the tester on this board is battery should last about a year in
The diagram in Figure 1 shows IC1 simplicity itself, as is wiring it up. normal use.
configured for the dot mode, which There are only three connections to The tester, complete with battery, is
keeps the current drain low. This is be made: two for the probes best housed in a small plastic case.
[980045]
D11 P1
D9
R3 = 17.8 k
R4 = 1.2 k
R5, R6 = 10 k
R7 = 100
IC1
R4
R3
R2
R1
tnemgeS )C(
P1 = 47 k preset potentiometer
Capacitors:
R5
R6 C1 = 0.1 F
T
R7
T2 T1 Semiconductors:
D1D9 = LED, 3 mm
H2
H3
Integrated circuits:
Bz1 = buzzer, 12 V
Bt1 = 9 V battery with connecting clip
2 off test probes
(C) Segment
980045-1
Topology: (1) study of geometrical properties and spatial relations unaffected by contin-
uous deformation, such as twisting or stretching. Mathematical approaches employing
topology are of great importance in modern theories of the four fundamental interac-
tions (gravitational, electromagnetic, weak and strong); (2) in electronics: generic circuit
By M Kupfner structure or collection of working structures.
of the capacitor.
switched-capacitor basics Because of its easy programmability, switched-capaci-
tor devices find application in adaptive filtering, anti-alias-
In switched-capacitor (SC) technology, a resistance is ing, phase-locked loops, and digital signal processing
replaced by a switched capacitance. The current through (DSP).
a resistance, and thus through a switched capacitor, is
directly proportional to the voltage, U, applied across the
resistance.
If, in the diagram, the switch is as shown, the capacitor, R
Cs, is charged to a charge Q = UCs. When the switch is in
the other position, the capacitor is discharged. The
process of the capacitor being charged and discharged
continuously results in an average current I = UCs/Ts, CS
where Ts is one charge/discharge cycle, that is, 1/fs (fs is the
switching frequency). Substituting fs for 1/Ts gives
I = UCs fs. In analogy to Ohms law, I = U/R, it follows that
R = 1/Cs fs. In other words, the resistance is inversely pro- 980059 - 15
portional to the switching frequency and the capacitance
SINGLE CAB
The diagram of a single configurable
analogue block is shown in Figure 3.
Each capacitor array consists of 255 sta-
tically switched capacitors, which
means that the array can be pro-
grammed in 255 stepped values.
The static switches, which can be
set only once during the program-
ming, are also used to control the
routeing resources.
The resistance (switched-capacitor
effect) is obtained by dynamic
switches, which also affect the phase of
the input signal.
Additional switches enable the
number and kind of limited local con-
nections between two adjacent CABs.
structured in a grid that contains 20 instance, anti-aliasing or smoothing fil- There are, however, also global lines to
CABs arranged in a 4 5 matrix (see ters (external resistors and capacitors enable non-adjacent CABs to be inter-
Figure 2). are then required). connected.
The programmable CABs rely on Configuring an analogue design
the configuration logic in the upper within the array is performed by 20-CELL VERSION
portion of the chip to control the con- downloading 6 kbits of data via RS232 The MPAA020 is a field programmable
nectivity within the array and func- communications from a PC or analogue array based on a general pur-
tionality in each CAB. Two buses move EPROM. The data stream contains pose analogue cell that may be config-
data from the shift register to the CABs; information to configure the individ- ured, either alone or in combinations,
the data control bus retrieves and ual cell, the cell interconnections, inter- as any of a wide range of analogue
moves the data from the shift register nal bandgap voltage reference, and functions from simple comparators to
and the transfer control bus latches the I/Os. During this configuration down- complex filters. These cells are
data into local SRAM. load process, all cells are placed in a arranged in a 45 array with support-
Custom functions can be added to power down mode. ing circuitry to provide input/output
the chip to meet customer specific
applications. An 8-bit programmable
bandgap voltage reference is available
to each CAB.
Op amps are provided on the chip
periphery that can be configured for Figure 3. Diagram of one of the Config-
unity gain buffering or filteringfor urable Analogue Blocks on which the
MPAA020 is based.
EASYANALOG
PROGRAM Figure 4. Example of a
The EasyAnalog program may be configuration possible
compared with a circuit editor. After with EasyAnalog
the desired function has been selected, software.
it is placed on one or more free CABs,
and the input and outputs connected
as needed. Freeware EasyAnalog
runs under Windows 95 or NT and
may be downloaded from the Internet (>80 dB), a bandwidth of 1 MHz, inter-
http://sps.motorola.com/fpaa nal feedback facilities, for instance, for
The available functions are listed in automatic gain control (AGC), and a
Table 2. multiplier. A higher voltage family is
also planned which will operate in
PERFORMANCE applications with voltages greater than
A summary of the MPAA020s perfor- 10 V.
mance features is listed in Table 1. The
MPAA020s circuit topology provides F I N A L LY
advantages relative to chip area, pin Use of the array may initially be prob-
count, and rail-to-rail voltage swing lematic since it is housed in a 160-pin
with improvements being made to the Quadratic Flat Pack (QPF) with a pin
signal-to-noise ratio and signal band- pitch of 0.25 mm. This makes manual
width in arrays that will be introduced soldering a little difficult.
later this year. One of these, the [980059]
MPAA132, has a signal-to-noise ratio
Gain stages (max=20 min=1/20) Low Q biquad filter (high- or low-pass); 2 cells
Sum & diff. amps (3 weight inputs) Low Q biquad filter (notch, band-pass); 3 cells
Sample&hold High Q biquad filter (high- or low-pass); 2 cells
Track&hold High Q biquad filter (notch, band-pass); 3 cells
Integrator Maximum cor ner frequency = T/10
N-path integrator Minimum cor ner frequency = T/100
Differentiator Limiter
Half-wave rectifier Interpolator
Full-wave rectifier Schmidt trigger
LPF rectifier Voltage-controlled oscillator
Cosine filter Sine-wave oscillator
Decimator Square-wave oscillator
Bi-linear filter Triangle-wave oscillator
5V
C8
1 C3
D3 D2 C6 ...C9 = 1 /25V
2
1 V+
R2 R4 100n R6 R7 C6 C1+
D4 16
470
470
100k
10k
1 3 IC3
C1
11 14
19 T1IN T1OUT
PA0 10 7 K1
1N4148 5 18 T2IN T2OUT
NMI PA1 12 13
17 R1OUT R1IN TxD
R1 PA2 9 8
16 RE R2OUT R2IN
220k PA3 4
C7 C2+
IC2f IC2e IC1 15 S1 MAX232 15
PB0 5
13 11 2 14 1 C2
1 1 10 TIMER PB1 V-
12 13 2
PB2 6
ST62T20 12 3
PB3
11
PB4 12V C9
7 10 K2
SENSOR RESET PB5
9
6 PB6 C
VPP/TEST 8 D1 RE1
PB7
OSC 2 1
IN OUT NO
SK CS
3 X1 4 20 4 8 12V
DOUT
C13 1N4148 NC
IC5 T1
R3
S2 93C06CB1 R5
C5 C4 3 5 100n
4MHz DIN
10k
C1 C2 4k7
100 1 7 6 BC547
16V 16V 22p 22p
12V
IC4
IC2c IC2d
78L05 5V
5 6 9 8
K3 1 1
14
C10 C11 C12
IC2 1 2 3 4
1 1
7
100 330n 100n
16V IC2a IC2b
IC2 = 74HC14 970056 - 11
C2
C1
V2
V3
IC2
R4
D4
X1
R2 R1
C3
C4
R3
IC5 IC1
SENSOR
C5
D2
C13
R7
S1
R6
D1 R5
D3
C9
C7
C6
S2
T1
IC3
RE1
C10
970056-1
1-650079
IC4
C11
C8
970056-1
K3
K1
K2
V4
V1
TxD
T
NO
NC
+
0
6/98
Integrated Circuits Passive Components
Microprocessor, Interfacing DATASHEET 6/98 Relays DATASHEET 6/98
Table 1 Coil voltages
Divisor Latch
0 DLAB = 1
Bit 10
Bit 11
Bit 12
Bit 13
Bit 14
Bit 15
(MS)
Bit 8
Bit 9
Coil number
Order Code, Minimum voltage UI Maximum voltage UII
Block 2 V DC
V DC V DC
Elektor Electronics
Divisor Latch
0 DLAB = 1
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
(LS)
DLL
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
SCR
7
Ring Indicator
Ring Indicator
Clear to Send
Table 2 Contact specifications V23127-A0*** and V23057-A0***/-B0*** with single contacts
Delta Clear to
MODEM Sta-
Detect (DCD)
Send (DCTS)
Ready (DSR)
Trailing Edge
tus Register
Data Carrier
rier Detect
Data Set
(DDCD)
(TERI)
(CTS)
MSR
(RI)
Ordering Code, block 3 A101 A201 A401 A102 A202 A402
6
Holding Regis-
Empty (TEMT)
Framing Error
Overrun Error
Line Status
Data Ready
Parity Error
Transmitter
Transmitter
ter (THRE)
Contacts (see also base terminals) double, change-over single, make
Register
(OR)
(DR)
(PE)
LSR
(FE)
(BI)
5
0
Max. switching voltage as per V DC 300
VDE 0110 group C V AC 250
trol Register
Ready (DTR)
Send (RTS)
Request To
Out 1
Out 2
Loop
MCR
0
W 50...330 24 V: 100 35...330 50...330 24 V: 100 35...330
W 30 V: 80 30 V: 80
W (voltage 200 V: 30 (voltage (voltage 200 V: 30 (voltage
dependent) dependent) dependent) dependent)
Divisor Latch
Parity Enable
Word Length
Word Length
Line Control
Select Bit 0
Select Bit 1
Stick Parity
Even Parity
Access Bit
Number of
Set Break
Stop Bits
Register
(WLS0)
(WLS1)
W 250 V: 50 250 V: 50
(DLAB)
Select
(PEN)
(STB)
(TxD)
LCR
3
* Bit 0 is the least significant bit. It is the first bit serially transmitted or received. Max. continuous current A 8
Interrupt ID Bit
Interrupt ID Bit
0 if Interrupt
Ident. Regis-
ter (Read
approx. 2 x 107
Interrupt
(0)
(1)
IIR
2
1 higher current may flow for a maximum of 4 seconds for up to 10% of on time.
Holding Register
Enable Received
Enable Receiver
Enable MODEM
Empty Interrupt
Status Interrupt
Data Available
1 DLAB = 0
(DESSI)
(ETBEI)
70
IER
ister (Write
Transmitter
Data Bit 0
Data Bit 1
Data Bit 2
Data Bit 3
Data Bit 4
Data Bit 5
Data Bit 6
Data Bit 7
THR
Buffer Reg-
ister (Read
Data Bit 0*
Data Bit 1
Data Bit 2
Data Bit 3
Data Bit 4
Data Bit 5
Data Bit 6
Data Bit 7
Receiver
DC voltage W voltage-dependent 5
Only)
RBR
AC voltage VA 500
1 higher current may flow for a maximum of 4 seconds for up to 10% of on time.
#