Modeling simulation of transmitter-receiver system using
VHDL-AMS
Jamila BHAR, Monji ZAIDI and Najeh CHROUDI
jamilabhar@yahoo.fr
Electronic and Micro-Electronic Laboratory (ElE, IT-06) FSM,
University of Monastir, Monastir 5000, Tunisia
Summary
It is important to provide reliable and efficient communication
for data transmission in wireless sensor networks. To attempt
this purpose, implementation details for several blocks of
communication system must be carefully modeled. In this
context, the present paper introduces transmitter-receiver system
architecture for sensors networks applications. It presents the
study, design and simulation of communication system using
VHDL-AMS (Very High Speed Integrated Circuit Hardware
Description Language-Analog and Mixed-Signal) language. We
expose implementation details of system parts based on a direct
sequence spread-spectrum with a 2.4 GHz carrier, the model of
BPSK modulation for digital transmission, and functional filter
side. The proposed architecture is validated on Matlab
environment. The designed architecture respects the specific
context of wireless sensors networks (frequency, BER...).
Obtained results validate the proposed architecture and prove
the way to determining and discussing some critical parameters
values.
Key words:
WSWAN, communication system, AWGN channel, VHDL-AMS,
BPSK, PN-code.
1. Introduction
A new challenge recently appears with the design of
mixed signal systems. VHDL-AMS language has been
developed for the modeling and simulating of multi-
technological systems. It is analogue and mixed-signal
extensions of a well-known language VHDL. Using
VHDL-AMS will allow developing and studying
different blocks of radio-communication system. The full
expansion of wireless communication architecture leads
to the emergence of new communication techniques.
Particularly, wireless sensor networks are poised to
become a very significant enabling technology in many
sectors. A sensor mainly consists of sensing,
transmission, storage and power units. Its tasks contain
collecting the information from some object in the real
world, storing sensing data, making simple calculation
and transmitting them to some observer [1].
During the last decade, an extensive attention is explored
to the IEEE 802.15.4 standard. It defines the protocol and
interconnection of devices via radio communication in a
18 NNGT JOURNAL: International Journal of Embedded Systems
personal area network (PAN) [11]. The base layers
physical and link are part of the radio standard
IEEE802.15.4. This last is considered as a new wireless
networking technology that provides ultra-low cost, ultra-
low power, low speed, short time delay, large network
capacity and high reliability. Thus these characteristics
will work useful for indoor localization [13]. Based on
these features provided by IEEE 802.15.4, characteristics
of this technology are considered for our application.
The conception of communication system architecture is
considered complicated since many different techniques
(RF, numeric, analogic) must coexist together. Thus, to
satisfy such approach, the designer must choose system
parameters with respect of some constraints such as
function block interactions, need of high rate, minimizing
error rate, etc. In this context, the main goal for our
research is to develop transmitter-receiver architecture.
We will discuss the choice of some system parameters.
We will also solve some constraints to ensure block
interaction. This study allows us to design the optimum
architecture for our communication system. The paper is
organized as follows. Firstly, we describe the wireless
sensor network architecture and we define various
elements composing a sensor node. After that, we present
the global model of the considered architecture. We give
details of different functional block description and we
explain system constraints. Then, we will present
simulation results, which allow us to validate the system
performances of our proposition. Finally, a conclusion
will highlight the important results and will propose an
optimization of the proposed architecture for future
works.
2. Wireless sensor network
The architecture of the wireless sensor network (WSN) is
shown in Fig .1. It consists of an interconnected set of
sensor nodes that are spatially distributed. Sensors are
deployed to monitor and collect information about
physical or environmental conditions, such as
temperature, sound, pressure, etc. A wide range of
promising applications employ such information in
environmental and industrial sensing and diagnostics,
health save, and disaster relief. Collected data are
Volume 1 July 30,2014
generally relayed by intermediate nodes and finally
transmitted to sink node to be analyzed.
Fig. 1 Wireless sensor network architecture
A basic sensor node in the WSN typically consists of one
or more sensors, a radio transceiver, a microprocessor and
a small battery. It may also have additional application-
dependent components attached, such as location finding
system (GPS), actuator and power generator. In Fig .1,
blocks composing sensor node are classified in four units.
Capture unit comprises sensors and actuators which
present the interface to the physical world. Processing
unit includes processor capable of executing all the
appropriate data and memory used to store programs and
various data. Power unit contains a battery which is
necessary to provide energy. In wireless sensor networks,
energy consumption efficiency is one of the most
important factor considerations. Finally, Communication
unit is composed of transmitter and receiver stack. These
communication devices are used to exchange data
between different nodes. In fact, data is communicated
between diverse nodes through radio frequencies. This
characteristic of wireless medium satisfies the
requirements of most wireless sensor applications. Radio
frequency based communication provides relatively wide
range and high data rates, acceptable error rates at
reasonable energy expenses, and does not require line of
sight between sender and receiver. For actual
communication, both a transmitter and a receiver are
required in a sensor node. The essential task is to convert
a bit stream to and from radio waves using multiple
operations like modulation, demodulation, amplifiers,
filters, mixers, etc.
To develop these tasks we need to modulate a global
chain containing transmission and reception blocks. We
have also to find a good choice of functions parameters.
In the following paragraphs we explain our approach to
modulate a designed architecture.
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3. VHDL-AMS architecture modeling
VHDL-AMS, new IEEE standard focused on the analog
and mixed-signal model and simulation, has been proved
very helpful for modeling and simulation of sensors,
signal processing circuitry and the external
environment[2]. A major reason for modeling our
transmitter and receiver architectures blocks using
VHDL-AMS language is due to the heterogeneous nature
of the different blocks (digital and analogic) and also the
complexity of this architecture (synchronization). As a
unified modeling language, VHDL-AMS is, then,
considered the ideal candidate for our architecture. In
fact, it is designed to allow description of global system
and its subsystems, specification of block functions and
equation. It must make synthesized design and support
interaction between the digital part of a model and its
analog part in an efficient manner. In the other side, the
use of flexible prototypes permits to decrease the design
cycle. Our approach focuses on modeling transmitter-
receiver system blocks in a way that they can be used by
various radio communication systems. In order to
accomplish our finality, various parts which define the
communication performances are discussed to make the
best choice such as code sequences, as well as lengths
and synchronization between some functions. To design
our mixed-signal (digital/analog/RF) systems, analogic
blocks are modeled by VHDL-AMS and digital blocks
are modeled by VHDL. These blocks are validated by
simulation using Modelsim and Simplorer tools. For the
purpose of mixing digital simulations with analog or RF
simulations in order to analyze a complete system, we
have to compile and export the global system to Simulink
environment.
4. Global system presentation
Communication systems are composed of a transmitted
part and a receiver part. Firstly, transmitter system
receives a digital signal as input. The digital part allows
shaping the signal from the sensor. Then, it have to be
transmitted by a differential encoder and, subsequently, to
spread it with a personal Pseudo-noise code (PN-Code).
Then, the output data go through the radiofrequency stage
(RF). This last applies several operations such as
modulation, amplification and filtering. Finally, it sends
out the output signal over a carrying 2.44 GHz frequency.
Next, channel coding will be applied to code data. It
makes an AWGN (Additives White Gaussian Noise)
encoding. After this, the coded data is transmitted. The
signal coming from channel is amplified for resembling
the received signal according to the required data rate. In
the receiver part, the opposite operations are performed.
In fact, the obtained signals pass through low-pass filters.
The differential decoding function is used to avoid a
coherent detection in the demodulation process by the
Volume 1 July 30,2014
receiver. It provides an acceptable signal reception. This
block is carried out using two logic gates (NOT) and
(XOR). Output signals from the demodulator are then
digitized in N bit.
The system to develop is based on the 802.15.4 standard
transmitting frequency of 2.44 GHz and a bandwidth of
80MHz. Modulation may use a BPSK (Binary phase Shift
Keying). In this work we give some details of transmitter
and receiver parts.
4.1 Transmitter system
4.1.1. Transmitter modeling design
Different created blocks of transmitter system are shown
by fig.2. The transmitter consists of two separate sides. A
digital side processes the baseband signal and a
conventional radiofrequency side. Transmitter system
allows to code the signals from the sensors and to spread
out the encoded signal with a personal Pseudo-Noise code
(PN-Code). The radiofrequency stages include mixed
functionalities (digital and analog). It is composed by
band-pass filters and LNA amplifier, oscillation and
BPSK modulation operation. Specific parameters used in
the design of each block are discussed separately in the
following paragraphs.
simulation.
Fig. 3 Block diagram of overall transmitter system
Fig .3 illustrates a Simulink model that includes an HDL
Co-simulation block. The connection is used by TCP/IP
socket. Using the EDA Simulator Link communications
interface, an HDL Co-simulation block co-simulates a
hardware component by applying input signals to and
reading output signals from an HDL model under
simulation in the HDL simulator.
4.2 Receiver system
Fig. 4 shows a global receiver system. The main function
of receiver system is to regenerate transmitted data from
received signal. It integrates different parameters and
characteristics. We can classify receiver system blocks
into two basic stages. The receiver includes the numerical
stages composed of the synchronization elements, the
spectrum spreading function via a pseudo-random
sequence stage and the signals decoding block. The
radiofrequency stages include mixed functionalities
(digital and analog). It is composed of band-pass filters
and a low-pass filter blocks, oscillation and BPSK
demodulation operation.

Fig. 2 Transmitter system model blocks diagram

4.1.2. Matlab/Simulink block diagram of the transmitter

system
We start our design by using MATLAB-Simulink version
(7.8.0). It is considered as an attractive simulation tool
providing the designer many facilities to rapidly design,
implement and test the desired system. Also it gives the
designer a focused resource to plan the system
parameters. Results gained from MATLAB-Simulink
implementation will be helpful to optimize the cost and Fig. 4 Receiver system model blocks diagram
speed development using Field Programmable Gate Array
(FPGA) implementation. All receiver processes uses one clock. This configuration
Fig .3 shows a block diagram of the global transmitter may generate some problems as synchronization and data
system. The basic block diagram of the system shows errors. To make in phase some functions, we introduce
baseband block, radiofrequency block and the HDL co- the resynchronization block. The choice of using a short

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information packet size will be potentially faster than an
architecture using longer information packet size. Some
work in [4] and [5] investigate that receiver architecture
introducing 4 bits provides a good compromise between
performance and receiver bus width.
5. Transmitter blocks description (digital
part)
It consists of 4 blocks: the differential coder, the
spreading code generator, the multiplier and the
Resynchronization block. The digital transmitter part
architecture is presented us flow in Fig.5.
Fig. 5 Transmitter baseband part block diagram
5.1 Differential encoding
The output of the differential encoder is dependent on
whether the present symbol is the same or different than
the previous symbol. The first bit in the sequence is
arbitrarily chosen. There are several methods of
implementing the coding, for example:
d(k) <= not(d(k-1) xor b(k))
Where b(k) is the present data bit and d(k-1) is the
previous differentially encoded bit. This block is carried
out using two logic gates (NOT) and (XOR).
5.2 PN Code generator
CDMA employs spread spectrum technology and a
special coding scheme (where each transmitter is
assigned a code) to allow multiple users to be multiplexed
over the physical channel. A key element of the
transmitters digital part is the PN Code generator used to
generate codes of different lengths N (N standing for the
number of states present in the basic time Tc), directly
impacting data rate and communication performances,
more or less easily in noised environment. The width of
the permitted band at 2.44 GHz being 80 MHz, PN code
speed will therefore be 40 MHz (40 Mcps=Mega Chip
per second). The chipping code C(n) is a redundant bit
pattern for each transmitted bit, thereby increasing the
resistance of the signal to interference and corruption.
The original data can be recovered if a number of bits in
the pattern are damaged during transmission. The goal of
this technique is that the signals bandwidth must be
spread by using a spreading signal or code that is
independent of the data.
21 NNGT JOURNAL: International Journal of Embedded Systems
5.3 Results of the baseband stages
All the parts of the transmitter system were implemented
completely using VHDL. After association of all these
digitals blocks (PN Code generator, differential encoder,
multiplier and bascules), the simulation results are
presented in Fig. 6. Corrected Delay
111101011001000
Fig. 6 ModelSim simulation test of the CDMA Transmitter
A multiplier has been used to operate like a spreader.
Spreader causes the data symbols to be spreaded to a
higher bandwidth by multiplying the random data
symbols (with bit rate Ts=375 ns) with a high bit rate
spreading sequence (with chip rate Tc=25ns).The figure
shows The PN generator output for initializing generator
polynomial C(i)=000000001001. The PN-code
111101011001000 and the spread out data can be seen
aligned with the fifteen master clock cycles.
6. Receiver blocks description (digital part)
6.1 Desynchronized receiver part
This block executes classical operation of despreading
and decoding (Fig. 7). Despreading function (Fig. 8) is
composed of two parts: multiplier block and integrator
block. The direct sequence spread spectrum (DSSS)
technique is chosen because of its high indoor constraints
immunity (fading, jamming...).
Data_Test
data_code[3:0] Despreading data_despread data_av_decoded Decoder Output
code_receiv
dump_receiv
Fig. 7 Structural scheme of desynchronized receiver
Volume 1 July 30,2014
 of the shift register and is desirable for high-speed
hardware implementation as well as software
implementation. The other way, known as a Fibonacci
"Multiplier" "Integrater/ feedback generator, can generate several delays of
data_code[3:0] data_despread blocker result_test[M:0]
Function sequences without any additional logic. A n-length LFSR
gives a m-sequence length of N=2n-1.
160 MHz

q(11) q(3) q(2) q(1) q(0) Output

d(11) + d(10) + d(3) + d(2) + d(1) + d(0)

Fig. 8 Despreading block diagram

The multiplier is equivalent of not XOR function. If a
signed signal changes the receiver gets Data or inversed
a(11) a(10) a(3) a(2) a(1) a(0)
Data. Results of VHDL implementation of C(2)
C(11) C(10) C(3) C(1) C(0)
desynchronized receiver is depicted in fig. 9.
and and and and and and

feedback

111101011001000 Fig. 10 A Galois sequence generator.

In our work, for the implementation we use the generator

polynomial 010000000010 and a 4-LFSR. It can thus
generate codes with a maximum length N=4093 and lead
to higher process gain in a noisy environment.
The simulation results are presented in Fig. 11. The figure
shows The PN generator output for initializing code. The
PN-code and the spread out data can be seen aligned with
the master clock cycles.
Fig. 9 ModelSim simulation test of desynchronized receiver.

6.2 Synchronization element

It synchronizes a code generated by the PN-Code
generator with transmitted data. It proceeds with a
method based on a maximum processing gain. In fact, the
synchronization principle consists, first, of finding the
PN-code phase (origin) in the received sequence. This
function is the acquisition (or initial synchronization).

6.3 PN-code generator Fig. 11 Simulation result of PN-code generator

PN-code is referred as pseudo-noise. M-Sequences have

good auto-correlation properties. An m-sequence can be
7. Radio frequency part modeling
easily generated by using a shift register with the help of
The transmitter includes a digital part (coding, spread)
simple feedback logic according to a particular primitive
and an analog part (channel, RF layers). The analog
polynomial. As presented in Fig. 10, for a n-length linear
stages are used to transpose the baseband signal received
feedback shift register (LFSR), the PN-Code generation
into a RF signal, through an intermediate frequency at
requires a polynomial d(i) for initialization, and a
2.44 GHz. In fact, the binary signal coming from the
primitive generator polynomial c(i). The m-Sequences
digital part is sent to the RF stages, where it is
can be generated from output of the LFSR with certain
subsequently modulated with the HF output of the
feedback logic. The generator polynomial governs all
oscillator. Multipliers and oscillator are carrying out the
major characteristics of the generator [7]. For a given
BPSK modulation on a carrier frequency of low-noise
generator polynomial, there are two ways of
amplifier (LNA) and a band-pass filter in order to limits
implementing LFSR. A Galois feedback generator uses
the emission band in accordance with ISM band. BPSK is
only the output bit to add (in Galois field) several stages
used as a digital-to-analogue encoding scheme in this

22 NNGT JOURNAL: International Journal of Embedded Systems Volume 1 July 30,2014

system as it is one of the more power efficient modulation These LPFs also perform as matched filters whose
schemes. impulse responses are matched to the transmitted signal
The radiofrequency stages modeling of the receiver takes to provide the maximum signal-to-noise ratio (SNR) at
advantage of analog and mixed functionalities of VHDL- their output. Then detectors decide which of the possible
AMS language. These stages consist of multipliers, signal waveforms was transmitted from the output of the
oscillators carrying out the BPSK demodulation on a LPFs.
frequency carrier, band-pass filters and a low-pass filter
in order to eliminate double frequencies at the in1 out1 in1 bandpass out1 input output
LNA
demodulator output. BPSK modulation consists of a sinus _Mult_
analog
__Filter__

ref
carrier phase shift according to the binary data RSP
pos p ref REM REFPB

transmitted. This is done by the implementation of a Signal

_puls_
OL

digital-analog multiplier: a mix of binary signal and the neg

n

carrier frequency (2,44GHz).

in_channel out_channel
AWGN

BPSK modulator BPSK demodulator ref RA

baseband Transmitter

spreading_data

baseband receiver
in1 bandpass out1 input output in1 out1 in1 Low_pass out1 input output
LNA LNA
__Filter__
sinus _Mult_ __Filter__
AWGN Channel ref
analog
ref

RRFPB R p ROL ref RRM RRFb RR

bandpass filter bandpass filter low pass filter OL

(filter of chebytchev) (filter of chebytchev) (filter of Bessel)
n

Acos(t) Acos(t) 0

Fig. 13 Radio frequency set developed by Simplorer

radio frequency Transmitter radio frequency receiver
8. Simulation results of radiofrequency
Fig. 12 Transmitter and receiver chain set. stages
Fig. 13 describes radio frequency set developed by 8.1 BPSK modulation
Simplorer. Demodulation is a process of extracting the
original signal from a modulated carrier wave. This block BPSK modulation technique is still commonly used in
is the most important performance taking part in the wireless communication such as WPAN (Wireless
communication system. The BPSK demodulator consists Personal Area Network). BPSK Modulation is a form of
of down-converter, oscillator, a low-pass filter (to Phase Shift Keying (PSK). PSK is a digital modulation
eliminate aliases), and A/D converter (which works by scheme that uses a finite number of phases, where the
sensing zero-crossings). Note that BPSK requires a carrier phase is keyed by the digital modulation signal,
coherent detection. After demodulation, the signal is low- each assigned to a unique pattern of binary bits. In BPSK
pass filtered and sampled at the middle of each bit period. modulation the carrier phase acquires two discrete states
Low-pass filter was implemented using Laplace (0 and 180), which correspond to one bit of the
transform package. BER was calculated by comparing modulation signal. Fig. 14 shows the modeling scheme of
demodulated signal to the original data stream. BPSK modulator.
Since the information is carried in the phase of the
modulated carrier, the receiver is assumed to be able to
generate a reference carrier whose frequency and phase
are identical to those of the carrier at the transmitter. At
the receiver, the received high frequency signal is first
down-converted to a lower intermediate frequency (IF)
before being further processed. The demodulator Fig. 14 Modeling of BPSK modulation
performs the majority of its work at an intermediate or
baseband frequency. The mixer in the coherent BPSK modulation is done by the implementation of a
demodulator converts the IF signal to a baseband signal, digital-analog multiplier: a mix of binary signal (data
by multiplying the incoming IF signal with a locally spread) and the carrier frequency (2,44GHz). Fig. 15
generated carrier reference and the product is passed shows BPSK modulation. In this figure, blue signal
through a low-pass filter (LPF). The LPF removes the presents the waveform of bipolar format and the pink
high-frequency components and selects the difference waveform shows the modulated signal.
component from the mixer output.

23 NNGT JOURNAL: International Journal of Embedded Systems Volume 1 July 30,2014

 Fig. 15 BPSK Modulation

The primary factors in choosing a low noise amplifier

(LNA) scheme are noise and power consumption. LNA is
not the first block of a transmitter system. Considering
the system we have chosen to implement, LNA is placed
in behind of modulator stage. It is followed by a band-
pass filter, an AWGN channel that has to be implemented
as a first block of the receiver chain. The Low Noise
Amplifier (LNA) amplifies incoming signals up to levels
suitable for further processing without significantly
reducing the SNR [11]. We modeled this device using a
VHDL-AMS description.
The code below shows VHDL-AMS syntax for the global
LNA amplifier process:
-- Compression Point
if (v_input >= compression_voltage) use
compressed_voltage== compression_voltage;
elsif (v_input <= -compression voltage) use
compressed_voltage== - compression_voltage;
else
compressed_voltage== v_input;
end use;
-- Gain
Fig. 16 Computed signals involved in vhdl-ams mixed: data spread (a)
(F=40 MHz), filtered signal (b), noise added (c), receiver input (d).
8.3 AWGN (Additif White Gaussian Noise)
The channel is a medium through which signal is sent
from one place to another place. The selection of different
channels in digital communication is based on the
following parameter like, bandwidth, power, amplitude,
attenuation and phase requirement at the output, linear
and non-linear characteristics requirement, effect of
external interference on the channel. In this
communication system we are using AWGN channel.
BER for BPSK modulation in Rayleigh channel
AWGN-Theory
Rayleigh-Theory
-1 Rayleigh-Simulation
10

v_gain == gain* compressed_voltage;

v_output == v_gain;
-2 attnuation de 11 dB
10
Bit Error Rate

8.2 Transmitter output signal

-3
10
The CDMA transmitter output signal (Fig. 16-a) is under
a 40 MHz. (Fig. 16-b) and (Fig. 16-d) show, respectively,
a band-pass filter simulation in front of channel and the -4
10
output signal of the AWGN channel. The noise signal
added is weighted to achieve the desired Signal to Noise
Ratio (Fig. 16-c). -5
10
0 5 10 15 20 25 30 35
Eb/No, dB

Fig. 17 BER variation according to Eb/No of BPSK modulated signal in

AWGN channel and Rayleigh+AWGN channel.

Noise generator is necessary for calculating one of the

most fundamental characteristics of a complete RF
system: bit error rate (BER) vs. signal-to-noise ratio
(SNR). Since a new noise value is produced at a given
rate, one must make sure that in the transient simulation a
new noise value is assigned to each original signal
sample. For that, the sample rate of the original signal

24 NNGT JOURNAL: International Journal of Embedded Systems Volume 1 July 30,2014

must be less than or equal to the rate at which noise is
produced.
As the noise libraries are not implemented in VHDLAMS
language, we develop a channel model based on the Box
Muller noise generation method, allowing the user to set
directly the signal to noise ratio parameter (SNR). This
AWGN channel is composed of a white Gaussian noise
generator added to the emitted signal on the carrier
frequency. In order to get a WGN we used the Box-
Muller [17] transformation which allows generating the
noise signal:
Although other types of noise and interference are
Where x and y are two random variables.
8.4 Band-pass filter
Band-pass filter is placed in front of demodulator. It
limits the emission band in accordance with ISM band
(transmitted bandwidth = 80MHz). The transfer function
is defined as
Tchbyscheff filter configuration is considered as
optimal. It was chosen for its good rejection despite a bad
phase linearity and frequency response oscillation in the
useful band. The characteristics used are: order 5
Tchbyscheff filter, cutoff frequency 2.44 GHz 40 MHz
with a band-pass undulation of 0.05 dB [4]. Fig. 18 and
19 show, respectively, a band-pass filter simulation in
front of channel and behind a channel.
Fig. 18 Simplorer band-pass filter simulation in front of channel.
Fig. 19 Simplorer band-pass filter simulation in behind of channel.
25 NNGT JOURNAL: International Journal of Embedded Systems
8.5 LNA (Low Noise Amlificat)
It is necessary to apply a filter which is designed to
eliminate the signal which comes from the other reader
operating in the same channel. The power amplifier (PA)
and the low-noise amplifier (LNA) are implemented as
ideal pure gain blocks so that the functionality of the
algorithm and relation to the theoretical system is quickly
confirmed in simulation. The channel that contains both
the effects of transmitting and receiving antennas and
propagation effects is implemented as an ideal gain block
with an additive white Gaussian noise (AWGN).
possible in a realistic RF environment, AWGN is most
common. It also allows one to compare BER simulation
results to the theoretical calculations.
Fig. 20 Signal simulation after application of LNA and filter.
8.6 Oscillator
The oscillator defines synchronic instruction for output
voltage.
Vout==sin(2.0*math_pi*now*2.44e9+phase).
Fig. 21 Oscillator simulation using Simplorer.
8.7 Multiplier
It is composed by a single instruction: Vout=Vin1*Vin2.
Fig. 22 Simulation result after application of a multiplier.
8.8 Low-Pass filter
Low-pass filter is placed on the output of the
demodulator. Bessel filter has the best properties. Indeed,
the rejection is reduced due to the frequency offset
between the useful signal and signal to be rejected (4.88
Volume 1 July 30,2014
GHz). It makes little deformations of impulsion response.
It also shows a very good linearity in phase. The Bessel
filter of order 5 and cutoff frequency of 40MHz was
chosen [5]. Transfer function is defined as:

Fig. 25 Simulation result of signal variation before, during and after

transmission in AWGN channel.

Fig. 23 simulation of Low-pass filter

9. Matlab/Simulink block diagram and

simulation result
A global system of communication (transmission and
reception) is verified by Simulink as chown in Fig. 24.
The signal arriving at the receiver is noisy due to its
transmission across the AWGN channel. The input signal
in the receiver is then processed by the RF section to
cancel the noise. Then it will be implemented in
baseband. The data received will be despread by the
despreading block. To recover the transmitted frame
correctly, the PN-code must be synchronized with the
received signal by synchronization block. Finally, the
signal is decoded by a decoding block passed to stage
data processing. Output and input signals are phase shift.
This shift is caused by signal treatment time. (time to
signal cross radiofrequency stages).
Fig. 26 Signal variation simulation after band-pass filter, after BPSK
demodulator and after low-pass filter.
Fig. 27 shows three waveforms. Two top waveforms are
transmitted and received digital data streams (taken on
the input of D/A converter and the output of the A/D
converter). The bottom waveform is the received analog
signal (after filtering but before sampling). One can
clearly see several bit errors (discrepancies between input
and output digital data bits) for this particular time
interval due to high noise level (SNR is 0dB) in the
system. The BER for ideal theoretical BPSK system is
given by the following formula:
where Eb is energy per bit and No is noise power density.

Fig. 24 Radio frequency set developed by Simulink

Fig. 27 Signal simulation after and before A/D conversion.

26 NNGT JOURNAL: International Journal of Embedded Systems Volume 1 July 30,2014

10. Conclusion
This paper presents a contribution to the modeling of a
chain of transmission using the direct sequence spread
spectrum. Different blocks of system architecture are
developed considering WSN propriety. VHDL-AMS
language is applied. Work presented in this paper shows
the interest of VHDL-AMS. It also demonstrates the
advantages of co-simulation Matlab-VHDL. The tools
should be used for different design including validation.
The latter must be able to simulate electrical behavior. It
should permit a co-simulation be useful for the physics of
failure explanations as well as interface for tools
designing circuits towards certain reliability. The
included models will be based on circuit simulation
(Simplorer), We presented and implemented all the
blocks constituting the system (differential coding, PN-
Code generation, spreading spectrum and modulation).
The length of the generated codes can easily be modified
by changing only the input coefficients of the polynomial
generator without any modification of the implemented
system. Simulations tests and the signals obtained
validate the descriptions suggested for the parameters
presented in the specifications (standard 802.15.4). This
model can be considered as a new IP and can be reused
easily by many teams. As the modulation and de-
modulation process is very important for communication
system, it can be useful to try other modulation process
such as OFDM (orthogonal frequency division
multiplexer). This last can transmit signal for long
distance and permit receiving the accurate information.
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Volume 1 July 30,2014