Report Matter

1.
INTRODUCTION
1.1. Problem Definition

The aim of this project is to design security system for the private societies, companies and
restricted area by identifying the vehicle entry in the campus. For permitting entry of vehicle,
vehicle code and driver code will be entered from vehicle cabin. The controller will process
the data sent by vehicle cabin and will give the necessary signal to barricade
1.2. Problem Analysis

In private societies, companies, the entry of vehicles as well as men are not allowed. So
instead of employing large man power an automatic secured parking system is employed.
This saves lot of money and chances of errors are also less. Some methods to meet these
requirements are used of RFID and Bar Code. But they have certain limitations. Once RFID
tag is programmed, it cannot be easily programmed again. And in Bar Codes, the Bar pattern
can be easily duplicated. So we are designing a system, which reprogrammable. So even if the
code is leaked out it can be changed.
The basic theme of the project is to monitor and control the entry of the vehicles in private
and restricted zones. Such a system in our case will be P89V51RD2 based microcontroller
board. The system will check the code for entry and keep the record of vehicle number, date
and time of entry. A 4x matrix keyboard is interfaced with microcontroller P89V51RD2 in the
vehicle cabin for the driver to enter the required code for transmission of that vehicle number.
The code can be alphanumeric. The code entered by the driver is given to the microcontroller
and it matches with specified code, if the code is matched, the microcontroller will send its
vehicle number to the receiver in the security cabin. After receiving the vehicle number, the
microcontroller will open the gate of parking and sending the empty slot number available in
the parking to the microcontroller in vehicle cabin. The microcontroller in the vehicle cabin
displays this slot number to the driver on the LCD display which is fixed in the vehicle cabin.
The entry of the user will get recorded with the help of RTC. In the similar way, at the time of
leaving the driver must enter the code to open the gate of parking. The exit time also gets
recorded and stored in the memory. The entry and exit records of all vehicles can be obtained
any time from the memory. The record can be displayed on LCD fixed in the receiver cabin
or on a computer.
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1.3. Introduction to RF Theory
1.3.1. History
Somewhere around 1889 a German physicist Herinrich Hertz[3] actually succeeded in
generating the first airborne RF wave in his laboratory. For all his daring & brilliance the RF
engineers of the world have honoured him by using his name as the unit of measure for
frequency. Before progressing into today's radio technology it is interesting to put it in
perspective & look at in the way in which radio developed. The story of its development is
fascinating.
Maxwell worked into electromagnetic theory. Much of his work was theoretical & not
practical. Later a German scientist Herinrich Hertz proved existence of these waves & its
properties. As Hertz has discovered these waves they soon became to be known as "Hertzian
Waves ". Once existence of electromagnetic waves was confirmed, it did not take long before
people started to think of using them for communicating. Marconi managed to receive a
signal over 2 Kilometres (km) away from transmitter .The navy saw the possibilities of using
wireless equipment for communication at sea & they showed considerable interest. Marconi
started to investigate its use for providing a long distance communication link. The main goal
was to be able to send a message across Atlantic, which was not easy .Finally on 12th
December 1901 the first transmission, was received when the letter 'S' was detected in
receiver. The term radio frequency (RF) refers to the electromagnetic field that is generated
when an alternating current is input to an antenna. This field also called an RF field or radio
wave can be used for wireless broadcasting & communication over a significant portion of the
electromagnetic radiation spectrum from 9 KHz to 1000's GHz. This portion is referred to as
the RF spectrum. As the frequency is increased beyond the RF spectrum, electromagnetic
energy takes form of infrared (IR), visible light. Ultraviolet (UV), X-rays & gamma rays.
Radio technology is becoming increasingly important in today’s highly sophisticated
electronics industry. There are traditional uses including broadcasting & point to point
communication, as well as new technology associated with cellular phones & new wireless
data. In limited area communication we can expand our network from a single building to a
complex consisting of multiple building. Now the actual information may be of still lower
frequencies of the order of few KHz & term wireless implies RF. Many types of wireless
devices make use of RF fields, television, cordless & cellular telephones, satellite
communication system & many measuring & instrument system used in manufacturing.
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1.3.2. Radio Frequency Bands
The FCC shares responsibility for RF assignment with the national telecommunication and
Information Administration (NTIA), which is responsible for regulating federal uses of the
RF spectrum. The highest bands are reserved for satellite and radio astronomy. The sample
chart below lists of major categories with approximated RF ranges. In actuality, there is no
gap between categories, as hundreds of other uses are also assigned, from garage door
openers and alarm system to amateur radio and emergency broadcasting.
Table 1 RF bands
Designation Abbreviation Frequency Band Wavelength
Very Low Frequency VLF 9KHz-30KHz 33Km-

10Km
Low Frequency LF 30KHz-300KHz 10Km-1Km
Medium Frequency MF 300KHz-3MHz 1Km-100m
High Frequency HF 3MHz-30MHz 100m-10m
Very High Frequency VHF 30MHz-300MHz 10m-1m
Ultra High Frequency UHF 300MHz-3GHz 1m-100mm
Super High Frequency SHF 3GHz-30GHz 100mm-

10mm
Extremely High Frequency EHF 30GHz-300GHz 10mm-1mm
1.3.3. Advantages of Radio Communication

Radio communications are used over cable based communication network for several
reasons:
1) LINE OF SITE: - Line of site when speaking of RF means more than just being able to
see the receiving antenna from the transmitting antenna .In, order to have true line of site no
objects (including trees, houses or the ground) can be in the Fresnel zone. The Fresnel zone is
the area around the visual line of sight that radio waves spread out into after they leave the
antenna. This area must be clear or else signal strength will weaken
2) COST EFFECTIVENESS: - The cost of setting up a cable based network can be huge,
due to the amount of buried or aerial cabling required. The cabling is costly to install &
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maintain. These problems are solved by the use of a radio link where the only hardware
required is the building for housing the equipment, the equipment itself the mast & antenna.
3) QUICK SET-UP:- The set-up time for a microwave link is a shorter than for a cable
based network. If there is already a tower & building located in the link placement area, the
installation time is in hours or days. If tower & equipment building have to build, the
installation time will be measured in weeks rather than months. This would be the case if a
similar cable based network would be installed.
4) REALLOCATION: - Relocation of radio communication equipment is extremely fast,

as the equipment only has to be moved to another location &set up along with its antenna.
5) INACCESSIBILITY: - In some places the only practical way to provide

communication normally due to the environment is to use a radio based link, as it may be
impossible to install a cable based network.
1.3.4. RF Technology
What is Radio Frequency

A radio wave is electromagnetic wave propagated by an antenna. Radio frequency
(abbreviated RF) is a term that refers to alternating current (AC) having characteristics such
that, if the current is input to an antenna, an electromagnetic (EM) field is generated suitable
for wireless broadcasting and/or communications. These frequencies over a significant
portion of the electromagnetic radiation spectrum, extending from 9 KHz; the lowest
allocated wireless communications frequency (it’s within the range of human hearing), to
thousands of gigahertz (GHz).
When an RF current is supplied to an antenna, it gives rise to an electromagnetic field that

propagates through space. This field is sometimes called an RF field; in less technical jargon
it is a “radio wave”. Any RF field has a wavelength that is inversely proportional to the
frequency.
The frequency of an RF signal is inversely proportional to the wavelength of the EM field

to which it corresponds. At 9 KHz, the free space wavelength is approximately 33 kilometres
(km) or 21 miles (mi). At the highest frequencies, the EM wavelengths measure
approximately one millimetre (1 mm). As the frequency is increased beyond that of the RF
spectrum, EM energy takes the form of infrared (IR), visible, ultraviolet (UV), X-rays, and
gamma rays.
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Many types of wireless devices make use of RF fields. Cordless and cellular telephone,
radio and television broadcast stations, satellite communication systems, and two-way radio
services all operate in RF spectrum. Some wireless devices operate at IR or visible-light
frequencies, whose electromagnetic wavelengths are shorter than those of RF fields.
Examples include most television-set remote-control boxes, some cordless computer
keyboards and mice, and a few wireless hi-fi stereo headsets.
The RF spectrum is divided into several ranges, or bands. With the exception of the lowest
frequency segment, each band represents an increase of frequency corresponding to an order
of magnitude (power of 10). The table depicts the eight bands in a RF spectrum, showing
frequency and bandwidth ranges. The SHF and EHF bands are often referred to as the
microwave spectrum.
1.3.5. Applications of Radio Frequency

• Garage door openers, alarm system, etc. –Around 40 MHz
• Standard cordless phones: Bands from 40 to 50 MHz
• Radio controlled airplanes: Around 72MHz
• Radio controlled cars: Around 75MHz
• Wildlife tracing collars: 215 to 220 MHz
• MIR space station: 145 MHz and 437 MHz
• Cell phones: 824 to 849 MHz
• New 500 MHz cordless phones: Obviously above 900 MHz!
• Air traffic control radar: 960 to 1,215 MHz
• Global positioning system: 1,227 and 1,575 MHz
Some more applications of RF with the respective frequency band are as mentioned in the
following table:
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Table 2 Application of RF bands
Application Frequency Bands
Aeronautical/ Maritime 9 KHz – 535 KHz
FM Radio 535 KHz – 1,700 KHz
Shortwave radio 5.9 MHz – 26.9 MHz
Citizen’s Band (CB) 26.96 MHz – 27.41 MHz
TV station 2-6 54 MHz – 88 MHz
FM Radio 88 MHz – 108 MHz
TV stations 7-13 174 MHz – 220MHz
Cell phones CDMA 824 MHz – 849 MHz
Cell phones GSM 869 MHz – 894 MHz
Air traffic controller 960 MHz – 1,215 MHz
GPS 1,227 MHz – 1,575 MHz
Cell phones PCS 1,850 MHz – 1,990 MHz
The RF bands most of us are familiar with are VHF(Very High Frequency), used by radio
and television station 2-13, and UHF(Ultra High Frequency), used by other television
stations, mobile phones and two-way radios. Microwave ovens even use RF waves to cook
food, but these waves are in a super high frequency band or SFH. Following the
electromagnetic spectrum into even higher frequencies, one finds infrared waves, and finally
invisible light.
Radio Frequency, the mode of communication for wireless technologies of all kinds,
including cordless phones, radar, ham radio, GPS, and radio and television broadcasts. From
baby monitors to cell phones, Bluetooth to remote control toys, RF waves are all around us.
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2. INTRODUCTION TO 8051 AND PERIPHERAL
INTERFACING
2.1. 8051 Standard

Microcontroller manufacturers have been competing for a long time for attracting choosy
customers and every couple of days a new chip with a higher operating frequency, more
memory and upgraded A/D converters appeared on the market. However, most of them had
the same or at least very similar architecture known in the world of microcontrollers as “8051
compatible”. What is all this about?
The whole story has its beginnings in the far 80s when Intel launched the first series of
microcontrollers called the MCS 051. Even though these microcontrollers had quite modest
features in comparison to the new ones, they conquered the world very soon and became a
standard for what nowadays is called the microcontroller.
The main reason for their great success and popularity is a skilfully chosen configuration
which satisfies different needs of a large number of users allowing at the same time constant
expansions (refers to the new types of microcontrollers). Besides, the software has been
developed in great extend in the meantime, and it simply was not profitable to change
anything in the microcontroller’s basic core. This is the reason for having a great number of
various microcontrollers which basically are solely upgraded versions of the 8051 family.
What makes this microcontroller so special and universal so that almost all manufacturers all
over the world manufacture it today under different name?
Figure 1 8051 Microcontroller Overview
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As seen in figure above, the 8051 microcontroller has nothing impressive in appearance:
• 4 Kb of ROM is not much at all.
• 128b of RAM (including SFRs) satisfies the user's basic needs.
• 4 ports having in total of 32 input/output lines are in most cases sufficient to make
all necessary connections to peripheral environment.
The whole configuration is obviously thought of as to satisfy the needs of most

programmers working on development of automation devices. One of its advantages is that
nothing is missing and nothing is too much. In other words, it is created exactly in accordance
to the average user‘s taste and needs. Other advantages are RAM organization, the operation
of Central Processor Unit (CPU) and ports which completely use all recourses and enable
further upgrade.
2.1.1. Pin Description
Figure 2 Pin Configuration
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Pins 1-8’ Port 1: Each of these pins can be configured as an input or an output.
Pin 9’RS: A logic one on this pin disables the microcontroller and clears the contents of most
registers. In other words, the positive voltage on this pin resets the microcontroller. By
applying logic zero to this pin, the program starts execution from the beginning.
Pins 10-17’ Port 3: Similar to port 1, each of these pins can serve as general input or output.
Besides, all of them have alternative functions:
Pin 10’ RXD: Serial asynchronous communication input or Serial synchronous

communication output.
Pin 11’ TXD: Serial asynchronous communication output or Serial synchronous

communication clock output.
Pin 12’ INT0: Interrupt 0 input.
Pin 13’ INT1: Interrupt 1 input.
Pin 14’ T0: Counter 0 clock input.
Pin 15’ T1: Counter 1 clock input.
Pin 16’ WR: Write to external (additional) RAM.
Pin 17’ RD: Read from external RAM.
Pin 18, 19’ X2, X1: Internal oscillator input and output. A quartz crystal which specifies
operating frequency is usually connected to these pins. Instead of it, miniature ceramics
resonators can also be used for frequency stability. Later versions of microcontrollers operate
at a frequency of 0 Hz up to over 50 Hz.
Pin 20’ GND: Ground.
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Pin 21-28’ Port 2: If there is no intention to use external memory then these port pins are
configured as general inputs/outputs. In case external memory is used, the higher address
byte, i.e. addresses A8-A15 will appear on this port. Even though memory with capacity of
64Kb is not used, which means that not all eight port bits are used for its addressing, the rest
of them are not available as inputs/outputs.
Pin 29’ PSEN: If external ROM is used for storing program then logic zero (0) appears on it
every time the microcontroller reads a byte from memory.
Pin 30’ ALE: Prior to reading from external memory, the microcontroller puts the lower
address byte (A0-A7) on P0 and activates the ALE output. After receiving signal from the
ALE pin, the external register (usually 74HCT373 or 74HCT375 add-on chip) memorizes the
state of P0 and uses it as a memory chip address. Immediately after that, the ALU pin is
returned its previous logic state and P0 is now used as a Data Bus. As seen, port data
multiplexing is performed by means of only one additional (and cheap) integrated circuit. In
other words, this port is used for both data and address transmission.
Pin 31’ EA: By applying logic zero to this pin, P2 and P3 are used for data and address
transmission with no regard to whether there is internal memory or not. It means that even
there is a program written to the microcontroller, it will not be executed. Instead, the program
written to external ROM will be executed. By applying logic one to the EA pin, the
microcontroller will use both memories, first internal then external (if exists).
Pin 32-39’ Port 0: Similar to P2, if external memory is not used, these pins can be used as
general inputs/outputs. Otherwise, P0 is configured as address output (A0-A7) when the ALE
pin is driven high (1) or as data output (Data Bus) when the ALE pin is driven low (0).
Pin 40’ VCC: +5V power supply.
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2.1.2. Input/output Ports (I/O Ports)
All 8051 microcontrollers have 4 I/O ports each comprising 8 bits which can be
configured as inputs or outputs. Accordingly, in total of 32 input/output pins enabling the
microcontroller to be connected to peripheral devices are available for use.
Pin configuration, i.e. whether it is to be configured as an input (1) or an output (0),

depends on its logic state. In order to configure a microcontroller pin as an input, it is
necessary to apply logic zero (0) to appropriate I/O port bit. In this case, voltage level on
appropriate pin will be 0.
Similarly, in order to configure a microcontroller pin as an input, it is necessary to apply a

logic one (1) to appropriate port. In this case, voltage level on appropriate pin will be 5V (as
is the case with any TTL input).
Figure 3 Input/Output Ports (I/O Ports)
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Figure 4 Input/Output (I/O) pin
Input/output (I/O) pin

Figure above illustrates a simplified schematic of all circuits within the microcontroller
connected to one of its pins. It refers to all the pins except those of the P0 port which do not
have pull-up resistors built-in.
Figure 5 Output pin
Output pin
Logic zero (0) is applied to a bit of the P register. The output FE transistor is turned on,
thus connecting the appropriate pin to ground.
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Figure 6 Input pin
Input pin
Logic one (1) is applied to a bit of the P register. The output FE transistor is turned off and
the appropriate pin remains connected to the power supply voltage over a pull-up resistor of
high resistance.
In short, logic state (voltage) of any pin can be changed or read at any moment. A logic
zero (0) and logic one (1) are not equal. Logic one (0) represents a short circuit to ground.
Such a pin acts as an output.
A logic one (1) is “loosely” connected to the power supply voltage over a resistor of high
resistance. Since this voltage can be easily “reduced” by an external signal, such a pin acts as
an input.
Port 0
The P0 port is characterized by two functions. If external memory is used then the lower
address byte (addresses A0-A7) is applied on it. Otherwise, all bits of this port are configured
as inputs/outputs.
The other function is expressed when it is configured as an output. Unlike other ports
consisting of pins with built-in pull-up resistor connected by its end to 5V power supply, pins
of this port have this resistor left out. This apparently small difference has its consequences:
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Figure 7 Input Configuration
If any pin of this port is configured as an input then it acts as if it “floats”. Such an input
has unlimited input resistance and undetermined potential.
Figure 8 Output Configuration
When the pin is configured as an output, it acts as an “open drain”. By applying logic 0 to
a port bit, the appropriate pin will be connected to ground (0V). By applying logic 1, the
external output will keep on “floating”. In order to apply logic 1 (5V) on this output pin, it is
necessary to build in an external pull-up resistor.
Only in case P0 is used for addressing external memory, the microcontroller will provide
internal power supply source in order to supply its pins with logic one. There is no need to
add external pull-up resistors.
Port 1
P1 is a true I/O port, because it doesn't have any alternative functions as is the case with
P0, but can be configured as general I/O only. It has a pull-up resistor built-in and is
completely compatible with TTL circuits.
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Port 2
P2 acts similarly to P0 when external memory is used. Pins of this port occupy addresses
intended for external memory chip. This time it is about the higher address byte with
addresses A8-A15. When no memory is added, this port can be used as a general input/output
port showing features similar to P1.
Port 3
All port pins can be used as general I/O, but they also have an alternative function. In
order to use these alternative functions, a logic one (1) must be applied to appropriate bit of
the P3 register. In terms of hardware, this port is similar to P0, with the difference that its pins
have a pull-up resistor built-in.
Pin's Current limitations

When configured as outputs (logic zero (0)), single port pins can receive a current of
10mA. If all 8 bits of a port are active, a total current must be limited to 15mA (port P0:
26mA). If all ports (32 bits) are active, total maximum current must be limited to 71mA.
When these pins are configured as inputs (logic 1), built-in pull-up resistors provide very
weak current, but strong enough to activate up to 4 TTL inputs of LS series.
In short, as seen from description of some ports, even though all of them have more or less
similar architecture, it is necessary to pay attention to which of them is to be used for what
and how.
For example, if they shall be used as outputs with high voltage level (5V), then P0 should
be avoided because its pins do not have pull-up resistors, thus giving low logic level only.
When using other ports, one should have in mind that pull-up resistors have a relatively high
resistance, so that their pins can give a current of several hundred microamperes only.
2.1.3. Memory Organisation

The 8051 has two types of memory and these are Program Memory and Data Memory.
Program Memory (ROM) is used to permanently save the program[1] being executed, while
Data Memory (RAM) is used for temporarily storing data and intermediate results created and
used during the operation of the microcontroller. Depending on the model in use (we are still
talking about the 8051 microcontroller family in general) at most a few Kb of ROM and 128
or 256 bytes of RAM is used.
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All 8051 microcontrollers have a 16-bit addressing bus and are capable of addressing 64
kb memory. It is neither a mistake nor a big ambition of engineers who were working on
basic core development. It is a matter of smart memory organization which makes these
microcontrollers a real “programmers’ goody“.
Program memory
The first models of the 8051 microcontroller family did not have internal program
memory. It was added as an external separate chip. These models are recognizable by their
label beginning with 803 (for example 8031 or 8032). All later models have a few Kbyte
ROM embedded. Even though such an amount of memory is sufficient for writing most of the
programs, there are situations when it is necessary to use additional memory as well. A
typical example is so called lookup tables. They are used in cases when equations describing
some processes are too complicated or when there is no time for solving them. In such cases
all necessary estimates and approximates are executed in advance and the final results are put
in the tables (similar to logarithmic tables).
Data Memory
As already mentioned, Data Memory is used for temporarily storing data and intermediate
results created and used during the operation of the microcontroller. Besides, RAM memory
built in the 8051 family includes many registers such as hardware counters and timers,
input/output ports, serial data buffers etc. The previous models had 256 RAM locations, while
for the later models this number was incremented by additional 128 registers. However, the
first 256 memory locations (addresses 0-FFh) are the heart of memory common to all the
models belonging to the 8051 family. Locations available to the user occupy memory space
with addresses 0-7Fh, i.e. first 128 registers. This part of RAM is divided in several blocks.
The first block consists of 4 banks each including 8 registers denoted by R0-R7. Prior to
accessing any of these registers, it is necessary to select the bank containing it. The next
memory block (address 20h-2Fh) is bit- addressable, which means that each bit has its own
address (0-7Fh). Since there are 16 such registers, this block contains in total of 128 bits with
separate addresses (address of bit 0 of the 20h byte is 0, while address of bit 7 of the 2Fh byte
is 7Fh). The third group of registers occupies addresses 2Fh-7Fh, i.e. 80 locations, and does
not have any special functions or features.
Additional RAM
In order to satisfy the programmers’ constant hunger for Data Memory, the manufacturers
decided to embed an additional memory block of 128 locations into the latest versions of the
8051 microcontrollers. The problem is that electronics performing addressing has 1 byte (8
16
bits) on disposal and is capable of reaching only the first 256 locations, therefore. In order to
keep already existing 8-bit architecture and compatibility with other existing models a small
trick was done.
It means that additional memory block shares the same addresses with locations intended
for the SFRs (80h- FFh). In order to differentiate between these two physically separated
memory spaces, different ways of addressing are used. The SFRs memory locations are
accessed by direct addressing, while additional RAM memory locations are accessed by
indirect addressing.
Figure 9 Registers Overview
Addressing
While operating, the processor processes data as per program instructions. Each
instruction consists of two parts. One part describes WHAT should be done, while the other
explains HOW to do it. The latter part can be a data (binary number) or the address at which
the data is stored. Two ways of addressing are used for all 8051 microcontrollers depending
on which part of memory should be accessed:
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Direct Addressing
On direct addressing, the address of memory location containing data to be read is
specified in instruction. The address may contain a number being changed during operation
(variable). For example:
Since the address is only one byte in size (the largest number is 255), only the first 255
locations of RAM can be accessed this way. The first half of RAM is available for use, while
another half is reserved for SFRs.
MOV A,33h; Means: move a number from address 33 hex. to accumulator
Indirect Addressing
On indirect addressing, a register containing the address of another register is specified in
instruction. Data to be used in the program is stored in the letter register. For example:
Indirect addressing is only used for accessing RAM locations available for use (never for
accessing SFRs). This is the only way of accessing all the latest versions of the
microcontrollers with additional memory block (128 locations of RAM). Simply put, when
the program encounters instruction including “@” sign and if the specified address is higher
than 128 ( 7F hex.), the processor knows that indirect addressing is used and skips memory
space reserved for SFRs.
MOV A,@R0; Means: Store the value from the register whose address is
in the R0 register into accumulator
On indirect addressing, registers R0, R1 or Stack Pointer are used for specifying 8-bit
addresses. Since only 8 bits are available, it is possible to access only registers of internal
RAM this way (128 locations when speaking of previous models or 256 locations when
speaking of latest models of microcontrollers). If an extra memory chip is added then the 16-
bit DPTR Register (consisting of the registers DPTRL and DPTRH) is used for specifying
address. In this way it is possible to access any location in the range of 64K.
2.1.4. Special Function Registers (SFRs)

Special Function Registers (SFRs) are a sort of control table used for running and
monitoring the operation of the microcontroller. Each of these registers as well as each bit
they include, has its name, address in the scope of RAM and precisely defined purpose such
as timer control, interrupt control, serial communication control etc. Even though there are
128 memory locations intended to be occupied by them, the basic core, shared by all types of
8051 microcontrollers, has only 21 such registers. Rest of locations is intentionally left
unoccupied in order to enable the manufacturers to further develop microcontrollers keeping
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them compatible with the previous versions. It also enables programs written a long time ago
for microcontrollers which are out of production now to be used today.
Figure 10 SFRS (SPECIAL FUNCTIION REGISTERS)
A Register (Accumulator)
Figure 11 A Register (Accumulator)
A register is a general-purpose register used for storing intermediate results obtained

during operation. Prior to executing an instruction upon any number or operand it is necessary
to store it in the accumulator first. All results obtained from arithmetical operations performed
by the ALU are stored in the accumulator. Data to be moved from one register to another
must go through the accumulator. In other words, the A register is the most commonly used
register and it is impossible to imagine a microcontroller without it. More than half
instructions used by the 8051 microcontroller use somehow the accumulator.
B Register
Multiplication and division can be performed only upon numbers stored in the A and B
registers. All other instructions in the program can use this register as a spare accumulator
(A).
Figure 12 B Register
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During the process of writing a program, each register is called by its name so that their
exact addresses are not of importance for the user. During compilation, their names will be
automatically replaced by appropriate addresses.
R Registers (R0-R7)
This is a common name for 8 general-purpose registers (R0, R1, R2 ...R7). Even though
they are not true SFRs, they deserve to be discussed here because of their purpose. They
occupy 4 banks within RAM. Similar to the accumulator, they are used for temporary storing
variables and intermediate results during operation. Which one of these banks is to be active
depends on two bits of the PSW Register. Active bank is a bank the registers of which are
currently used.
Figure 13 R Registers (R0-R7)
Program Status Word (PSW) Register
Figure 14 PSW Register (Program Status Word)
PSW register is one of the most important SFRs. It contains several status bits that reflect
the current state of the CPU. Besides, this register contains Carry bit, Auxiliary Carry, two
register bank select bits, Overflow flag, parity bit and user-definable status flag.
P - Parity bit. If a number stored in the accumulator is even then this bit will be
automatically set (1), otherwise it will be cleared (0). It is mainly used during data transmit
and receive via serial communication.
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OV Overflow occurs when the result of an arithmetical operation is larger than 255 and
cannot be stored in one register. Overflow condition causes the OV bit to be set (1).
Otherwise, it will be cleared (0).
RS0, RS1 - Register bank select bits. These two bits are used to select one of four
register banks of RAM. By setting and clearing these bits, registers R0-R7 are stored in one of
four banks of RAM.
Table 3 Bank select bits
RS1 RS2 Space in RAM
0 0 Bank0 00h-07h
0 1 Bank1 08h-0Fh
1 0 Bank2 10h-17h
1 1 Bank3 18h-1Fh
F0 - Flag 0. This is a general-purpose bit available for use.
AC - Auxiliary Carry Flag is used for BCD operations only.
CY - Carry Flag is the (ninth) auxiliary bit used for all arithmetical operations and shift
instructions.
Data Pointer Register (DPTR)

DPTR register is not a true one because it doesn't physically exist. It consists of two
separate registers: DPH (Data Pointer High) and (Data Pointer Low). For this reason it may
be treated as a 16-bit register or as two independent 8-bit registers. Their 16 bits are primarly
used for external memory addressing. Besides, the DPTR Register is usually used for storing
data and intermediate results.
Figure 15 DPTR Register (Data Pointer)
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Stack Pointer (SP) Register
Figure 16 SP Register (Stack Pointer)
A value stored in the Stack Pointer points to the first free stack address and permits stack
availability. Stack pushes increment the value in the Stack Pointer by 1. Likewise, stack pops
decrement its value by 1. Upon any reset and power-on, the value 7 is stored in the Stack
Pointer, which means that the space of RAM reserved for the stack starts at this location. If
another value is written to this register, the entire Stack is moved to the new memory location.
P0, P1, P2, P3 - Input/output Registers
Figure 17 P0, P1, P2, P3 - Input/Output Registers
If neither external memory nor serial communication system are used then 4 ports within
total of 32 input/output pins are available for connection to peripheral environment. Each bit
within these ports affects the state and performance of appropriate pin of the microcontroller.
Thus, bit logic state is reflected on appropriate pin as a voltage (0 or 5 V) and vice versa,
voltage on a pin reflects the state of appropriate port bit.
As mentioned, port bit state affects performance of port pins, i.e. whether they will be
configured as inputs or outputs. If a bit is cleared (0), the appropriate pin will be configured as
an output, while if it is set (1), the appropriate pin will be configured as an input. Upon reset
and power-on, all port bits are set (1), which means that all appropriate pins will be
configured as inputs.
In short, I/O ports are directly connected to the microcontroller pins. Accordingly, logic
state of these registers can be checked by voltmeter and vice versa, voltage on the pins can be
checked by inspecting their bits.
22
2.2. Inter IC Communication (I2C)
2.2.1. Introduction
What is I2C?
Figure 18 I2C Bus
In modern electronic systems there are a number of peripheral ICs that have to
communicate with each other and the outside world. To maximize hardware efficiency and
simplify circuit design, Philips developed a simple bi-directional 2-wire, serial data (SDA)
and serial clock (SCL) bus for inter-IC control. This I2C-bus supports any IC fabrication
process and, with the extremely broad range of I2C-compatible chips from Philips and other
suppliers, it has become the worldwide industry standard proprietary control bus. Each device
is recognized by a unique address and can operate as either a receiver-only device (e.g. an
LCD Driver) or a transmitter with the capability to both receive and send information (such as
memory). Transmitters and/or receivers can operate in either master or slave mode, depending
on whether the chip has to initiate a data transfer or is only addressed. I2C is a multi-master
bus, i.e. it can be controlled by more than one IC connected to it.
The basic I2C-bus, with a data transfer rate up to 100 kbits/s and 7-bit addressing, was
originally introduced nearly 20 years ago. But, as data transfer rates and application
functionality rapidly increased, the I2C-bus specification was enhanced to include Fast-mode
and 10-bit addressing, meeting the demand for higher speeds and more address space. Most
recently, High-speed Mode has been added; with speeds of up to 3.4 Mbits/s it ensures the
capacity of the I2C-bus to support existing and future high speed serial transfer rates for
applications such as EEPROM and Flash memory.
23
2.2.2. I2C Bus Specification and Concept
The I2C-bus supports any IC fabrication process (NMOS, CMOS, bipolar). Two wires,
serial data (SDA) and serial clock (SCL), carry information between the devices connected to
the bus. Each device is recognized by a unique address (whether it’s a microcontroller, LCD
driver, memory or keyboard interface) and can operate as either a transmitter or receiver,
depending on the function of the device. Obviously an LCD driver is only a receiver, whereas
a memory can both receive and transmit data. In addition to transmitters and receivers,
devices can also be considered as masters or slaves when performing data transfers. A master
is the device which initiates a data transfer on the bus and generates the clock signals to
permit that transfer. At that time, any device addressed is considered a slave.
The I2C-bus is a multi-master bus. This means that more than one device capable of
controlling the bus can be connected to it. As masters are usually micro-controllers, let's
consider the case of a data transfer between two microcontrollers connected to the I2C-bus
(see figure above).
1) Suppose microcontroller A wants to send information to microcontroller B:
• Microcontroller A (master), addresses microcontroller B (slave).
• Microcontroller A (master-transmitter), sends data to microcontroller B (slave-

receiver).
• Microcontroller A terminates the transfer.
2) If microcontroller A wants to receive information from microcontroller B:
• Microcontroller A (master) addresses microcontroller B (slave).
• Microcontroller A (master-receiver) receives data from microcontroller B (slave-

transmitter).
• Microcontroller A terminates the transfer.
Generation of clock signals on the I2C-bus is always the responsibility of master devices;
each master generates its own clock signals when transferring data on the bus. Bus clock
signals from a master can only be altered when they are stretched by a slow-slave device
holding-down the clock line or by another master when arbitration occurs.
24
Data Validity Condition
The data on the SDA line must be stable during the HIGH period of the clock. The HIGH
or LOW state of the data line can only change when the clock signal on the SCL line is LOW.
Figure 19 Bit-transfer on I2C Bus
Start and Stop Condition

Within the procedure of the I2C-bus, unique situations arise, which are defined as START
(S) and STOP (P) conditions. A HIGH to LOW transition on the SDA line while SCL is
HIGH is one such unique case. This situation indicates a START condition.
A LOW to HIGH transition on the SDA line while SCL is HIGH defines a STOP
condition. START and STOP conditions are always generated by the master. The bus is
considered to be busy after the START condition. The bus is considered to be free again a
certain time after the STOP condition.
The bus stays busy if a repeated START (Sr) is generated instead of a STOP condition. In
this respect, the START (S) and repeated START (Sr) conditions are functionally identical
For the remainder of this document, therefore, the S symbol will be used as a generic term to
represent both the START and repeated START conditions, unless Sr is particularly relevant.
Detection of START and STOP conditions by devices connected to the bus is easy if they
incorporate the necessary interfacing hardware. However, microcontrollers with no such
interface have to sample the SDA line at least twice per clock period to sense the transition.
Figure 20 I2C Start and Stop condition
25
Data Transfer
Byte Format:
Every byte put on the SDA line must be 8-bits long. The number of bytes that can be
transmitted per transfer is unrestricted. Each byte has to be followed by an acknowledge bit.
Data is transferred with the most significant bit (MSB) first (see Fig.6). If a slave can’t
receive or transmit another complete byte of data until it has performed some other function,
for example servicing an internal interrupt, it can hold the clock line SCL LOW to force the
master into a wait state. Data transfer then continues when the slave is ready for another byte
of data and releases clock line SCL.
In some cases, it’s permitted to use a different format from the I2C-bus format (for CBUS
compatible devices for example). A message which starts with such an address can be
terminated by generation of a STOP condition, even during the transmission of a byte. In this
case, no acknowledge is generated.
Figure 21 I2C Data Transfer
Acknowledge:
Data transfer with acknowledge is obligatory. The acknowledge-related clock pulse is

generated by the master. The transmitter releases the SDA line (HIGH) during the
acknowledge clock pulse.
The receiver must pull down the SDA line during the acknowledge clock pulse so that it
remains stable LOW during the HIGH period of this clock pulse (see Fig.7). Of course, set-up
and hold times must also be taken into account.
Usually, a receiver which has been addressed is obliged to generate an acknowledgement

after each byte has been received. The master can then generate either a STOP condition to
abort the transfer, or a repeated START condition to start a new transfer.
26
If a slave-receiver does acknowledge the slave address but, sometime later in the transfer
cannot receive any more data bytes, the master must again abort the transfer. This is indicated
by the slave generating the not-acknowledge on the first byte to follow. The slave leaves the
data line HIGH and the master generates a STOP or a repeated START condition.
If a master-receiver is involved in a transfer, it must signal the end of data to the slave-
transmitter by not generating an acknowledge on the last byte that was clocked out of the
slave. The slave-transmitter must release the data line to allow the master to generate a STOP
or repeated START condition.
Figure 22 I2C Acknowledge
Writing on I2C Bus:
Figure 23 Format of I2C frame when writing data to slave
Shaded Area describes data transfer from Master controller to slave device, clear block
describes data transfer from Slave to master controller.
27
Following is the sequence we need to follow when writing data:
1. Send start condition.
2. Send 7-bit slave address with read/write bit. If we want to write on to slave device
then R/W bit will be 0 and if a read is to be performed then R/W will be set to 1.
3. Slave will send Ack bit.
4. Send data byte to slave and slave will acknowledge every byte, if its last byte to be
sent, slave will reply with No-Acknowledge bit (NAK).
5. Send stop condition to end data transfer.
Reading from I2C Bus:
Figure 24 Format of I2C frame when reading data from slave
When reading from I2C bus, if you want to read from a specific location or (sub address)
address usually in case of serial EEPROM or RTC etc., we need to send a dummy write byte
to put the read pointer to that particular location. This dummy write is demonstrated in figure
above. The data flow is explained below:
1. Send start condition.
2. Send 7-bit slave address with write bit (R/W = 0).
3. Send sub address or location on I2C device where u want to read from, after this the
internal address pointer of I2C device points to location where u want to read from.
This is called dummy write.
4. Now send a repeated start condition.
5. Send 7-bit slave address with read bit (R/W = 1).
6. Now slave will send data to master and master will acknowledge after each byte read.
If it is the last byte to be read from slave then master will send a not acknowledge.
7. Master sends a stop condition to end the transfer.
28
In case of reading a device with no sub addresses like adc etc. then you just need to send
slave address with read bit as shown in figure below.
Figure 25 I2C Bus read
2.3. Peripheral Interfacing to 8051
2.3.1. LCD Display
Introduction
The most commonly used Character based LCDs are based on Hitachi's HD44780
controller or other which are compatible with HD44580. Here, we will discuss about
character based LCDs, their interfacing with various microcontrollers, various interfaces (8-
bit/4-bit), programming, special stuff and tricks you can do with these simple looking LCDs
which can give a new look to your application.
Pin Description
The most commonly used LCDs found in the market today are 1 Line, 2 Line or 4 Line
LCDs which have only 1 controller and support at most of 80 characters, whereas LCDs
supporting more than 80 characters make use of 2 HD44780 controllers.
Most LCDs with 1 controller has 14 Pins and LCDs with 2 controller has 16 Pins (two
pins are extra in both for back-light LED connections). Pin description is shown in the table
below.
Figure 26 LCD pin diagram
29
Table 2 Character LCD pins with 1 Controller
Pin No. Name Description
Pin no. 1 VSS Power supply (GND)
Pin no. 2 VCC Power supply (+5V)
Pin no. 3 VEE Contrast adjust
Pin no. 4 RS 0 = Instruction input

1 = Data input
Pin no. 5 R/W 0 = Write to LCD module

1 = Read from LCD module
Pin no. 6 EN Enable signal
Pin no. 7 D0 Data bus line 0 (LSB)
Pin no. 8 D1 Data bus line 1
Pin no. 14 D7 Data bus line 7 (MSB)
DDRAM - Display Data RAM

Display data RAM (DDRAM) stores display data represented in 8-bit character codes. Its
extended capacity is 80 X 8 bits, or 80 characters[2]. The area in display data RAM
(DDRAM) that is not used for display can be used as general data RAM. So whatever you
send on the DDRAM is actually displayed on the LCD. For LCDs like 1x16, only 16
characters are visible, so whatever you write after 16 chars is written in DDRAM but is not
visible to the user. Figures below will show you the DDRAM addresses of 1 Line, 2 Line and
4 Line LCDs.
Figure 27 DDRAM Address for 1 Line LCD
30
CGROM - Character Generator ROM

The character generator ROM generates 5 x 8 dot or 5 x 10 dot character patterns from 8-
bit character codes. It can generate 208 5 x 8 dot character patterns and 32 5 x 10 dot
character patterns. User defined character patterns are also available by mask-programmed
ROM.
Figure 30 LCD characters code map for 5x8 dots
31
Figure 31 LCD characters code map for 5x10 dots
As you can see in both the code maps, the character code from 0x00 to 0x07 is occupied
by the CGRAM characters or the user defined characters. If user wants to display the fourth
custom character then the code to display it is 0x03 i.e. when user sends 0x03 code to the
LCD DDRAM then the fourth user created character or pattern will be displayed on the LCD.
CGRAM - Character Generator RAM

As clear from the name, CGRAM area is used to create custom characters in LCD. In the
character generator RAM, the user can rewrite character patterns by program. For 5 x 8 dots,
eight character patterns can be written, and for 5 x 10 dots, four character patterns can be
written.
BF - Busy Flag
Busy Flag is a status indicator flag for LCD. When we send a command or data to the
LCD for processing, this flag is set (i.e. BF =1) and as soon as the instruction is executed
successfully this flag is cleared (BF = 0). This is helpful in producing and exact amount of
delay for the LCD processing.
To read Busy Flag, the condition RS = 0 and R/W = 1 must be met and The MSB of the
LCD data bus (D7) act as busy flag. When BF = 1 means LCD is busy and will not accept
next command or data and BF = 0 means LCD is ready for the next command or data to
process.
32
Instruction Register (IR) and Data Register (DR)
There are two 8-bit registers in HD44780 controller Instruction and Data register.
Instruction register corresponds to the register where you send commands to LCD e.g. LCD
shift command, LCD clear, LCD address etc. and Data register is used for storing data which
is to be displayed on LCD. When send the enable signal of the LCD is asserted, the data on
the pins is latched in to the data register and data is then moved automatically to the DDRAM
and hence is displayed on the LCD.
Data Register is not only used for sending data to DDRAM but also for CGRAM, the
address where you want to send the data, is decided by the instruction you send to LCD.
Commands and Instruction set

Only the instruction register (IR) and the data register (DR) of the LCD can be controlled
by the MCU. Before starting the internal operation of the LCD, control information is
temporarily stored into these registers to allow interfacing with various MCUs, which operate
at different speeds, or various peripheral control devices. The internal operation of the LCD is
determined by signals sent from the MCU. These signals, which include register selection
signal (RS), read/write signal (R/W), and the data bus (DB0 to DB7), make up the LCD
instructions (Table 3). There are four categories of instructions that:
• Designate LCD functions, such as display format, data length, etc.
• Set internal RAM addresses
• Perform data transfer with internal RAM
• Perform miscellaneous functions
33
Figure 32 Command and Instruction set for LCD
34
LCD interfacing in 4-bit mode
Till now whatever we discussed in the previous part, we were dealing with 8-bit mode.
Now we are going to learn how to use LCD in 4-bit mode. There are many reasons why
sometime we prefer to use LCD in 4-bit mode instead of 8-bit. One basic reason is lesser
number of pins are needed to interface LCD.
In 4-bit mode the data is sent in nibbles, first we send the higher nibble and then the lower
nibble. To enable the 4-bit mode of LCD, we need to follow special sequence of initialization
that tells the LCD controller that user has selected 4-bit mode of operation. We call this
special sequence as resetting the LCD. Following is the reset sequence of LCD.
 Wait for about 20mS
 Send the first init value (0x30)
 Send second init value (0x30)
 Send third init value (0x30)
 Wait for 1mS
 Select bus width (0x30 - for 8-bit and 0x20 for 4-bit)
 Wait for 1mS
The busy flag will only be valid after the above reset sequence. Usually we do not use
busy flag in 4-bit mode as we have to write code for reading two nibbles from the LCD.
Instead we simply put a certain amount of delay usually 300 to 600uS. This delay might vary
depending on the LCD you are using, as you might have a different crystal frequency on
which LCD controller is running. So it actually depends on the LCD module you are using.
So if you feel any problem running the LCD, simply try to increase the delay. This usually
works.
35
LCD connections in 4-bit Mode
Figure 33 LCD 4-bit connections
Above is the connection diagram of LCD in 4-bit mode, where we only need 6 pins to
interface an LCD. D4-D7 are the data pins connection and Enable and Register select are for
LCD control pins. We are not using Read/Write (RW) Pin of the LCD, as we are only writing
on the LCD so we have made it grounded permanently. If you want to use it.. then you may
connect it on your controller but that will only increase another pin and does not make any big
difference. Potentiometer RV1 is used to control the LCD contrast. The unwanted data pins of
LCD i.e. D0-D3 are connected to ground.
Sending data/command in 4-bit Mode

We will now look into the common steps to send data/command to LCD when working in
4-bit mode. As i already explained in 4-bit mode data is sent nibble by nibble, first we send
higher nibble and then lower nibble. This means in both command and data sending function
we need to separate the higher 4-bits and lower 4-bits.
The common steps are:
 Mask lower 4-bits
 Send to the LCD port
 Send enable signal
 Mask higher 4-bits
 Send to LCD port
 Send enable signal
36
2.3.2. Keyboard
Introduction
Keypads are a part of HMI or Human Machine Interface and play really important role in a
small embedded system where human interaction or human input is needed. Matrix keypads
are well known for their simple architecture and ease of interfacing with any microcontroller.
Constructing a Matrix Keypad

Construction of a keypad is really simple. As per the outline shown in the figure below we
have four rows and four columns. In between each overlapping row and column line there is a
key.
So keeping this outline we can construct a keypad using simple SPST Switches as shown
below:
Figure 34 4x4 matrix Keypad schematic
37
Now our keypad is ready, all we have to do is connect the rows and columns to a port of
microcontroller and program the controller to read the input.
Scanning a Matrix Keypad

There are many methods depending on how you connect your keypad with your controller,
but the basic logic is same. We make the columns as i/p and we drive the rows making them
o/p, this whole procedure of reading the keyboard is called scanning.
In order to detect which key is pressed from the matrix, we make row lines low one by one
and read the columns. Let’s say we first make Row1 low, and then read the columns. If any of
the key in row1 is pressed will make the corresponding column as low i.e. if second key is
pressed in Row1, then column2 will give low. So we come to know that key 2 of Row1 is
pressed. This is how scanning is done.
So to scan the keypad completely, we need to make rows low one by one and read the
columns. If any of the buttons is pressed in a row, it will take the corresponding column to a
low state which tells us that a key is pressed in that row. If button 1 of a row is pressed then
Column 1 will become low, if button 2 then column2 and so on.
Figure 19 Connection diagram for 8051 with keypad
38
2.3.3. RF Module
Why we are using RF Module?

We can use the bar code system and RFID tags for the same purpose but both are having
some disadvantages over RF modules which are not suitable for our designing a system,
which is reprogrammable and RF module allows the reprogramming .that’s why we are using
RF module instead of bar code system and RFID tag.
Bar code system is having many disadvantages some of those are listed down:-
1) The bar code is fixed at the time of printing and it cannot be changed.
2) For the bar code to be read by the scanner there should be clear optical line of
sight and in many practical application, it is difficult to achieve this.
3) It is very easy to deface the barcode.
4) With just a laser printer, it is very easy to duplicate bar code causing security
violations.
To overcome this problem, RF technology can be effectively used for materials

management and assets tracking .In fact last few years Radio frequency has a lot of
importance and many innovative applications are being developed using this technology. RF
module is going to revolutionise the business all over the world in coming years.
Initially objective of our project was to transmit data between two microcontrollers, which
were 100m apart by using ISM band at frequency of 2.4GHZ .For that we went through
various sites like Atmel, Maxstream, Zigbee, Chipcon etc. But the main hurdle was support;
availability also set up cost is too high. Some modules are available which transmit data up to
500m but with higher cost. For our purpose, it doesn’t require so long range of 500 metre. 100
metre range is sufficient to our application. So we decided to go for lower range RF modules
of low cost and high accuracy.
Hence we decided to design low cost RF module, which forms a platform for Wireless
communication system. This module works on 433MHz frequency and can be easily absorbed
in any project. Free scale semiconductor (Motorola), Reynolds Electronics, Dallas,
Semiconductor (MAXIX), Atmel, Maxstream, Micrel etc. are the manufacturers working in
this field. We studied some of RF Modules available in companies. After comparing RF IC’s
we decided to use small sized ‘Crystal Tuned PLL Based ASK Modules’ because of its
availability, cost and support
39
Crystal Tuned PLL Based ASK Modules
We are using a ‘Crystal Tuned PLL Based ASK Module’. This Module uses the technique
of On-Off keyed (OOK's) modulation. Local Oscillator is based on PLL. The Module is high
performance, simple-to-use and miniaturized. Applications like remote control, wireless
security, etc.... operating at 315 / 434 MHz can easily be implemented using this module.
Transmitter:-
Figure 36 Transmitter Module
Table 4 Transmitter module pin details
Pin No. ( From L Purpose Description Notes

to R )
1 Gnd Ground 0 Volts

2 Data Digital Data Input 1k - 10k bps
3 Vcc Positive Power Supply 3V - 12V
4 Ant Antenna Whip Ant. 22.6cm : 315
MHz 17.2 cm :
434 MHz.
Table 4 Transmitter module Characteristics
40
Parameter Symbol Condition Value Unit
min. typ. max.
Output Vcc = 3.0V, 315 2 3 6 mW

Power TA - 27°C MHz
50 Ohms load 434 1 3 6 mW
MHz
Supply Icc 9 10 19 mA
Current
Supply Vcc 3 V
Voltage
Range
Receiver:
Figure 37 Receiver module
Table 5 Receiver module characteristics
41
Parameter Symbol Condition Value Unit
min. typ. max.
Sensitivity Psens Vcc = 5.0V, 315 -105 -103 dBm

TA - 27°C MHz
BER =- 3 / 434 -104 -102 dBm
100, 2Kbps MHz
ASK out VOH Iload = 0.7*Vcc V
logic High 10uA
ASK out VOL Iload = 0.3*VCC V
Logic Low 10uA
Supply Icc 2.4 3 mA
Current
Supply Vcc +4.75 +5 +5.25 V
Voltage
Range
Data Rate 300 1K 10 K bps
Table 6 Reciever module pin Details
Pin No. ( From L to Purpose Description Notes

R)
1 Ant Antenna Whip Ant. 22.6cm : 315

MHz 17.2 cm :
434 MHz.
2 ,3 and 8 Gnd Ground 0 Volts
4&5 Vcc Positive Power Supply 3V - 12V
6&7 Data Digital Data Output 1k - 10k bps
2.3.4. HT12E Encoder

The 212 encoders are a series of CMOS LSIs for remote control system applications. They
are capable of encoding information which consists of N address bits and 12-N data bits. Each
address/data input can be set to one of the two logic states. The programmed addresses/ data
are transmitted together with the header bits via an RF or an infrared transmission medium
upon receipt of a trigger signal. The capability to select a TE trigger on the HT12E further
enhances the application flexibility of the 212 series of encoders.
42
The 212 series of encoders begin a 4-word transmission cycle upon receipt of a
transmission enable (TE for the HT12E, active low). This cycle will repeat itself as long as
the transmission enable (TE) is held low. Once the transmission enable returns high the
encoder output completes its final cycle and then stops
The status of each address/data pin can be individually pre-set to logic _high_ or _low_. If
a transmission-enable signal is applied, the encoder scans and transmits the status of the 12
bits of address/data serially in the order A0 to AD11 for the HT12E encoder and A0 to D11
for the HT12A encoder.
During information transmission these bits are transmitted with a preceding

synchronization bit. If the trigger signal is not applied, the chip enters the standby mode and
consumes a reduced current of less than 1_A for a supply voltage of 5V. Usual applications
preset the address pins with individual security codes using DIP switches or PCB wiring,
while the data is selected by push buttons or electronic switches.
Figure 3820 Encoder Application Circuit
2.3.5. HT12D Decoder

The 212 decoders are a series of CMOS LSIs for remote control system applications. They
are paired with Holtek’s 212 series of encoders (refer to the encoder/decoder cross reference
table). For proper operation, a pair of encoder/decoder with the same number of addresses and
data format should be chosen. The decoders receive serial addresses and data from a
programmed 212 series of encoders that are transmitted by a carrier using an RF or an IR
transmission medium. They compare the serial input data three times continuously with their
local addresses. If no error or unmatched codes are found, the input data codes are decoded
and then transferred to the output pins. The VT pin also goes high to indicate a valid
43
transmission. The 212 series of decoders are capable of decoding information that consists of N
bits of address and 12-N bits of data. Of this series, the HT12D is arranged to provide 8
address bits and 4 data bits, and HT12F is used to decode 12 bits of address information.
The 212 series of decoders provides various combinations of addresses and data pins in
different packages so as to pair with the 212 series of encoders. The decoders receive data that
are transmitted by an encoder and interpret the first N bits of code period as addresses and the
last 12-N bits as data, where N is the address code number. A signal on the DIN pin activates
the oscillator which in turn decodes the incoming address and data. The decoders will then
check the received address three times continuously. If the received address codes all match
the contents of the decoder’s local address, the 12-N bits of data are decoded to activate the
output pins and the VT pin is set high to indicate a valid transmission. This will last unless the
address code is incorrect or no signal is received. The output of the VT pin is high only when
the transmission is valid. Otherwise it is always low.
Figure 39 Decoder application circuit
2.3.6. DS1307 RTC

The DS1307 serial real-time clock (RTC) is a low-power, full binary-coded decimal
(BCD) clock/calendar plus 56 bytes of NV SRAM. Address and data are transferred serially
through an I²C, bidirectional bus. The clock/calendar provides seconds, minutes, hours, day,
date, month, and year information. The end of the month date is automatically adjusted for
months with fewer than 31 days, including corrections for leap year. The clock operates in
either the 24-hour or 12-hour format with AM/PM indicator. The DS1307 has a built-in
power-sense circuit that detects power failures and automatically switches to the backup
supply. Timekeeping operation continues while the part operates from the backup supply.
44
The DS1307 operates as a slave device on the serial bus. Access is obtained by
implementing a START condition and providing a device identification code followed by a
register address. Subsequent registers can be accessed sequentially until a STOP condition is
executed.
Figure 40 DS1307 interfacing with 8051
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy
of the match between the capacitive load of the oscillator circuit and the capacitive load for
which the crystal was trimmed. Additional error will be added by crystal frequency drift
caused by temperature shifts. External circuit noise coupled into the oscillator circuit may
result in the clock running fast. For other specifications, see Datasheet for DS1307 in
Appendix
2.3.7. 24C512 EEPROM

The AT24C512 provides 524,288 bits of serial electrically erasable and programmable
read only memory (EEPROM) organized as 65,536 words of 8 bits each. The devices
cascadable feature allows up to four devices to share a common two-wire bus. The device is
optimized for use in many industrial and commercial applications where low power and low-
voltage operation are essential.
Its features are
 Low-voltage and Standard-voltage Operation
45
 5.0 (VCC = 4.5V to 5.5V)
 2.7 (VCC = 2.7V to 5.5V)
 1.8 (VCC = 1.8V to 3.6V)
 Internally Organized 65,536 x 8
 2-wire Serial Interface
 Schmitt Triggers, Filtered Inputs for Noise Suppression
 Bidirectional Data Transfer Protocol
 Write Protect Pin for Hardware and Software Data Protection
 128-byte Page Write Mode (Partial Page Writes Allowed)
 Self-timed Write Cycle (5ms Typical)
 High Reliability
 Endurance: 100,000 Write Cycles
 Data Retention: 40 Years
46
3. SOLUTION DESIGN
3.1. Block Diagram
3.1.1. Vehicle Cabin Section
Figure 1 Vehicle cabin section block diagram
3.1.2. Security Cabin Section
Figure 2 Security cabin section block diagram
47
3.2. Functional Description
Every vehicle is allocated with a specific password of four bytes. There is record of
vehicle number, parking account number for every code number.
We are using two RF modules, one for transmitting the vehicle code and other one is used
for receiving the vehicle code. The RF module which is used to transmit the vehicle number is
placed in the vehicle cabin and the other RF module is placed in security cabin for receiving
that vehicle code.
When a user wants to park his vehicle in the parking zone, user has to enter the password
provided to him. Each distinct 4 digit password is stored in the respective microcontroller.
The password which is entered by the user is checked by the microcontroller in the vehicle
cabin if it is correct then the microcontroller sends the vehicle code to the RF module placed
in the security cabin. The RF modules in security cabin will receive that vehicle code. The
microcontroller in security cabin finds the available empty slot number and displays on the
security cabin’s LCD the closest empty slot number calculated, which is visible to the user in
the vehicle. The microcontroller will then open the gate. Also at the same time it stores in its
memory the code of the vehicle entered, along with the time the vehicle has entered.
The microcontroller in the security cabin also checks whether the vehicle is parked in
correct slot allocated or not. If it is parked in wrong slot number then the incorrect slot in
which vehicle is parked is found. This information is used to find the empty slot number,
when the next vehicle has to enter. The number which was allocated to user is then stored as
vacant slot. Each slot is provided a separate switch for it. If a vehicle is parked in a slot then
the corresponding key will get pressed and its output will go high. The output of each switch
is given to the port pins of microcontroller. The status of each slot is decided by input to these
port pins. The entries in the memory for the vacant slot are updated as per this input
At the exit time, user has to again enter that four digit password provided to him and
microcontroller will check if that password is correct or not. If the entered password is correct
then RF module will send the vehicle code to the security cabin and microcontroller in the
security cabin will receive the code through the RF receiver module. Now microcontroller
will open the gate and store the exit time in the memory along with the vehicle code.
For security purpose, when a user enters wrong password three times, a special code is
sent from the vehicle to security cabin. When this code is detected by the microcontroller in
the security cabin, it will activate a buzzer. At this time security personnel can interfere and
solve the case.
48
4. IMPLEMENTATION
4.1. Hardware Solution
4.1.1. Circuit Diagrams
Vehicle cabin circuitry
Figure 3 Vehicle cabin circuit diagram
Security cabin circuitry
Figure 4 Security cabin circuit diagram
49
4.1.2. Schematic level working
Circuit in the vehicle cabin

In the vehicle cabin, the microcontroller is interfaced with the RF module, LCD display
and a keypad. The microcontroller has four 8-pin ports named as p0, p1, p2 and p3
A 4x4 keypad is a matrix keypad which has four rows and four columns. It is connected to
p3 of the microcontroller. Four rows are connected separately to pins p3.0, p3.1, p3.2 and
p3.3 and columns are connected to p3.4, p3.5, p3.6 and p3.7 pins of the microcontroller. The
microcontroller scans every key pressed and generates a separate code for each key. There are
16 different codes for all combinations of pressed rows and columns.
A 16x2 LCD display is connected to the port p1 of the microcontroller. LCD has 8 data
pins and three control signal pins. The pin no.4 (RS), 5(R/W) and 6(EN) are connected to
p1.5, p1.6 and p1.7 pins of microcontroller respectively. Only four data lines are used for
sending the 8 bit data by dividing the 8-bit data into group of 4-bits. Four data pins 11(D4),
12(D5), 13(D6) and 14(D7) are connected to port pins p1.0, p1.1, p1.2 and p1.3 respectively.
The microcontroller is also interfaced with the RF module through an encoder. The
encoder has 4 parallel data input pins and 1 serial output pin. The data provided to the
encoder through the 4 data pins by the microcontroller is converted to serial and send on the
serial output pin. The address pins A0-A7 of the encoder are left open. Port pins p2.0, p2.1,
p2.2 and p2.3 are connected to pin 10(AD8), 11(AD9), 12(AD10) and 13(AD11) of the
encoder. Pin 14(EN) of encoder is grounded, thus leaving the encoder always enabled.
The serial output of the encoder is fed to RF transmitter module. Serial output on pin
17(Dout) of encoder is connected to pin 3 (Data) of the RF transmitter module.
50
Circuit in security cabin
In the security cabin the microcontroller is interfaced with serial RTC (DS1307), an
external EEPROM memory, The RF module, LCD display and 8 on/off switches.
There are 8 switches connected to port pins of the microcontroller. Every slot has separate
switch placed in it and connected to one port pin. By checking the voltage levels of these port
pins microcontroller will find whether the slot is empty or not. When a vehicle is parked in
the slot, the switch in that slot connects Vcc(+5V) to the corresponding port pin and in the
absence of vehicle, the port is connected to ground. 8 switches are connected to port pins
p3.0-p3.7 sequentially.
A 16x2 LCD display is connected to the port p1 of the microcontroller. LCD has 8 data
pins and three control signal pins. The pin no.4 (RS), 5(R/W) and 6(EN) are connected to
p1.5, p1.6 and p1.7 pins of microcontroller respectively. Only four data lines are used for
sending the 8 bit data by dividing the 8-bit data into group of 4-bits. Four data pins 11(D4),
12(D5), 13(D6) and 14(D7) are connected to port pins p1.0, p1.1,01.2 and p1.3 respectively.
An external EEPROM memory is used to store the record of incoming and outgoing
vehicles. AT24C512 is a serial EEPROM data memory which is controlled by two lines SDA
(serial data line) and SCL (serial clock line). The port pins p0.0 and p0.1 of the
microcontroller are used as SDA and SCL respectively. Pin number 5 and 6 of AT24C512 are
connected to the port pins p0.0 and p0.1 of the microcontroller.
A serial RTC DS1307 is interfaced with microcontroller for date and time information.
RTS DS1307 requires two wires interface same as the EEPROM memory. Same lines SDA
(p0.0) and SCL (p0.1) of the microcontroller are used for serial communication. Pin 5(SDA)
and pin 6(SCL) of RTC are connected to p0.0 and p0.1 of the microcontroller. A 32 KHz
crystal oscillator is used between pin no 1(X1) and pin 2 (X2). The battery supply is given to
the RTC through pin VBat(pin 3) of RTC
51
4.2. Software Solution
4.2.1. Flowcharts
Vehicle cabin routine
Start
Initialise C=0
Display “ You
are at Auto-
Parking
Receive password
entered on keypad
Is password
Increment C No
valid?
yes
Is C<3 Send vehicle code

No Send Buzzer
Activation Code
Yes
Display
“Proceed to
Display “Wrong
slot no
Password”
displayed”
“Enter Password
again” Access Denied
Stop
Figure 5 Vehicle Cabin Routine
52
Security cabin routine
Start
Vehicle Check if parking

Yes
arrived? slots full?
No
No
Vehicle Display
exiting? “Parking full”
No Yes
Valid
Transmission?
Receive
Code
Is buzzer activation
Activate buzzer Yes
code received?
No
Stop
Calculate
shortest distance
empty slot no.
Display “Go to
slot no.”
calculated
No
Vehicle
parked?
Figure 6 Security Cabin Routine
53
4.2.2. Programs
Vehicle block program

lcd_port equ P1 ;LCD connected to Port1 in
4-bit mode
en equ P1.7 ;Enable connected to P1.7
rw equ P1.6 ;RW connected to P1.6
rs bit P1.5 ;RS connected to P1.5
delay equ 00H
temp equ 09H
com equ 0FCH ;commands follow this
header
dat equ 0FDH ;Data follows this header
eot equ 0FEH ;end-of-message character
org 0000H
mov 45H,#30H ;byte 1 of stored password
mov sp,#0FH ;stack pointer=0FH
mov r3,#03H ;no of attempts to enter
wrong password after which access will be denied
mov dptr,#welcome ;initialise LCD and display
acall display
mov delay,#250 ;Delay 250mS
acall delayms
mov dptr,#askpass ;display “Enter password”
acall display
sjmp key
send: mov p2,#01H ;encodr interfaced to port2
loop: sjmp loop
KEY: mov r1,#40H
mov dptr,#lcd_init
acall display
nexkey: MOV DELAY,#1
ACALL DELAYMS ;call delay function
MOV P3,#0FEH ;row0 made 0
MOV A,P3
ANL A,#0F0H
CJNE A,#0F0H,ROW_0
MOV P3,#0FDH ;row1 made 0
MOV A,P3
ANL A,#0F0H
CJNE A,#0F0H,ROW_1
MOV P3,#0FBH ;row2 made 0
MOV A,P3
ANL A,#0F0H
CJNE A,#0F0H,ROW_2
MOV P3,#0F7H ;row3 made 0
MOV A,P3
ANL A,#0F0H
CJNE A,#0F0H,ROW_3
SJMP nexkey
ROW_0: MOV DPL,#"0" ;determine column no.
RO1: RLC A
JNC MATCH
INC DPL
SJMP RO1
54
RO2: RLC A
JNC MATCH
INC DPL
SJMP RO2
RO3: RLC A
jnc match
inc dpl
sjmp RO3
ROW_3: MOV DPL,#"C" ;determine column no.
RO4: RLC A
JNC MATCH
INC DPL
SJMP RO4
MATCH: mov @r1,dpl ;store key in given add.
inc r1
mov dptr,#star
acall display
cjne r1,#44H,jnexkey
ljmp codecheck
jnexkey: ljmp nexkey
codecheck: mov r1,#40H ;comp enterd & stored key
SC equ 45H
nexcode: mov a,@r1
cjne a,SC,wrong
inc r1
inc sc
cjne r1,#44H,nexcode
mov dptr,#proceed ;proceed if code correct
acall display
ljmp loop
wrong: djnz r3,nexatt ;try again if wrong
sjmp acdens
nexatt: mov dptr,#wpass
acall display
mov dptr,#askpasa
acall display
ljmp key
acdens: mov dptr,#accden ;deny access if 3 errors
acall display
ljmp loop
display: clr a ;use DPTR only
movc a,@a+dptr ;get character
inc dptr ;point to next char
cjne a,#eot,comd ;see if eot string
ret ;return if eot
comd: cjne a,#com,data ;if command header, RS=0
mov 50H,#00H
sjmp display
datta: cjne a,#dat,sendit ;if data header, RS=1
mov 50H,#20H
sjmp display
sendit: mov temp,a ;Keep copy of data in temp
swap a ;We need higher nibble
anl a,#0FH ;Mask first four bits
add a,#80H ;Enable = 1
orl a,50H
mov lcd_port,a ;Move to lcd port
nop
clr en ;Enable = 0
55
mov a,temp ;Reload the data from temp
anl a,#0FH ;we need lower nibble now
orl a,50H
nop
clr en ;Enable = 0
mov delay,#255 ;Delay 1mS
acall delayms
sjmp display
delayms: mov r4,#delay ;delay in milliseconds
again: mov r5,#250
here: nop
nop
djnz r5,here
djnz r4,again
ret
welcome: db com,2CH,0CH,06H,01H,83H,dat,"Welcome
to",com,0C2H,dat,"Auto Parking",eot
askpass: db com,2CH,0CH,06H,01H,81H,dat,"Enter Password",eot

lcd_init: db com,2CH,0EH,06H,01H,80H,eot
star: db dat,"*",eot
wpass: db com,2CH,0CH,06H,01H,81H,dat,"Wrong Password",eot
askpasa: db com,2CH,0CH,06H,01H,82H,dat,"Enter
correct",com,0C4h,dat,"password",eot
proceed: db com,2CH,0CH,06H,01H,80H,dat,"Proceed to
slot",com,0C2H,dat,"No displayed",eot
accden: db com,2CH,0CH,06H,01H,81H,dat,"Access denied",eot
end
Security cabin block

lcd_port equ P1 ;LCD connected to Port1 in
4-bit mode
slotsw equ p3 ;slot switches con to P3
en equ P1.7 ;Enable connected to P1.7
rw equ P1.6 ;R/W connected to P1.6
rs bit P1.5 ;RS connected to P1.5
delay1 equ 00H
temp equ 09H
com equ 0FCH ;comm follows this header
dat equ 0FDH ;data follows this header
eot equ 0FEH ;End of transmission char
sda equ P0.0 ;SDA line to P0.0
scl equ P0.1 ;SCL line to P0.1
VA equ P0.0 ;vehicle arrived bit
VT equ P0.1 ;valid transmission bit
VE equ P0.2 ;vehicle exit bit
buz equ P1.4 ;buzzer bit
org 0000H
acall i2cinit ;initialise I2C bus
mov sp,#0FH ;move SP above used reg
mov P0,#0FCH ;configure P0 bits as i/p
56
chkveh: jb VA,entry
jb VE,vldtx
sjmp chkveh
entry: mov a,slotsw
cjne a,#0FFH,vldtx
disful: mov dptr,#full
acall displays
sjmp chkveh
vldtx: jnb VT,vldtx
mov a,p0
anl a,#0F0H
swap a
cjne a,#00H,cont
ljmp buzz
cont: mov 40H,a
acall startc
mov a,0D0H
acall send
setb scl
acall delay
clr scl
mov a,#00H
acall send
setb scl
acall delay
clr scl
acall startc
mov a,#0D1H
acall send
setb scl
acall delay
clr scl
mov r1,#41H
recnex: acall recv
mov @r1,a
acall ack
inc r1
cjne r1,#47H,recnex
acall recv
mov 48H,a
acall nak
acall stop
acall startc
mov a,#0A0H
acall send
setb scl
clr scl
mov a,#00H
acall send
setb scl
clr scl
mov a,#00H
acall send
setb scl
clr scl
mov r1,40H
sndnex: mov a,@r1
acall send
inc r1
cjne r1,#48H,sndnex
acall stop
57
mov a,slotsw
mov 3EH,slotsw
mov r1,#08H
clr c
rot: rrc a
djnz r1,chkc
sjmp disful
chkc: jnc rot
mov a,r1
add a,#30H
mov 3FH,a
mov dptr,#goto
acall displays
mov a,3FH
acall displayc
update: mov a,slotsw
cjne a,3EH,chkveh1
sjmp update
chkveh1: ljmp chkveh
buzz: setb buz
loop: sjmp loop
displayc: mov temp,a ;Keep copy of data in temp
nop
clr en ;Enable = 0
nop
clr en ;Enable = 0
ret
displays: clr a
movc a,@a+dptr
inc dptr
cjne a,#eot,comd
ret
comd: cjne a,#com,datta
mov 50H,#00H
sjmp displays
datta: cjne a,#dat,sendit
mov 50H,#20H
sjmp displays
sendit: mov temp,a ;Keep copy of data in temp
orl a,50H
nop
clr en ;Enable = 0
orl a,50H
nop
58
clr en ;Enable = 0
mov delay1,#255 ;Delay 255mS
acall delayms
sjmp displays
delayms: mov r4,#delay1 ;delay subroutine
again: mov r5,#250
here: nop
nop
djnz r5,here
djnz r4,again
ret
full: db com,2CH,0CH,06H,01H,82H,dat,"Parking full",eot
goto: db com,2CH,0CH,06H,01H,82H,dat,"Go to slot no ",eot

;***************************************
;Initializing I2C Bus Communication
;***************************************
i2cinit: setb sda
setb scl
ret
;****************************************
;Start Condition for I2C Communication
;****************************************
startc: setb scl
acall delay
clr sda
clr scl
ret
;*****************************************
;Stop Condition For I2C Bus
;*****************************************
stop: clr scl
clr sda
acall delay
setb scl
acall delay
setb sda
ret
;*****************************************
;Sending Data to slave on I2C bus
;*****************************************
send: mov r7,#08
back: clr scl
acall delay
rlc a
mov sda,c
setb scl
acall delay
djnz r7,back
clr scl
acall delay
setb sda
ret
;*****************************************
;ACK and NAK for I2C Bus
;*****************************************
ack: clr sda
setb scl
acall delay
clr scl
59
setb sda
ret
nak: setb sda

setb scl
clr scl
setb scl
ret
;*****************************************
;Receiving Data from slave on I2C bus
;*****************************************
recv: mov r7,#08
back2: clr scl
setb scl
mov c,sda
rlc a
djnz r7,back2
clr scl
setb sda
ret
delay: nop ;delay for I2C bus
ret
end
4.2.3. Softwares used
Keil's 8051 Assembler for PC-hosted Systems

The A51 Assembler Kit for the 8051 microcontroller family enables you to write
assembler programs for practically any 8051 derivatives including those from companies like
Analog Devices, Atmel, Cypress Semiconductor, Dallas Semiconductor, Goal, Hynix,
Infineon, Intel, OKI, Philips, Silicon Labs, SMSC, STMicroelectronics, Synopsis, TDK,
Temic, Texas Instruments, and Winbond. The following components are included in the A51
8051 Assembler Kit:
A51 Macro Assembler

The A51 Assembler is a macro assembler for the 8051 family of microcontrollers. It
supports all 8051 derivatives. It translates symbolic assembly language mnemonics into re-
locatable object code where the utmost speed, small code size, and hardware control are
critical. The macro facility speeds development and conserves maintenance time since
common sequences need only be developed once. The A51 assembler supports symbolic
access to all features of the 8051 architecture.
The A51 assembler translates assembler source files into re-locatable object modules. The
DEBUG control adds full symbolic information to the object module and supports debugging
60
with the µVision3 Debugger or an in-circuit emulator. In addition to object files, the A51
assembler generates list files which optionally may include symbol table and cross reference
information.
µVision4 IDE
The µVision4 IDE from Keil Software combines project management, make facilities,
source code editing, program debugging, and complete simulation in one powerful
environment. µVision3 helps you get programs working faster than ever while providing an
easy-to-use development platform. The editor and debugger are integrated into a single
application and provide a seamless embedded project development environment. µVision4
features include:
The Device Database which automatically sets the assembler, compiler, and linker options
for the chip you select. This prevents you from wasting your time configuring the tools and
helps you get started writing code faster.
A robust Project Manager which lets you create several different configurations of your
target from a single project file. The Keil µVision4 IDE allows you to create an output file for
simulating, an output file for debugging with an emulator, and an output file for programming
an EPROM -- all from the same Project file.
An integrated Make facility with automatic dependency generation. You don't have to
figure out which header files and include files are used by which source files. The Keil
compilers and assemblers do that automatically.
Interactive Error Correction. As your project compiles, errors and warnings appear in an
output window. You may make corrections to the files in your project while µVision3
continues to compile in the background. Line numbers associated with each error or warning
are automatically resynchronized when you make changes to the source.
BL51 Code Banking Linker/Locator

The BL51 code banking linker/locator combines OMF51 object modules and creates
executable 8051 programs. The linker resolves external and public references and assigns
absolute or fixed addresses to relocatable program segments.
61
The BL51 Linker processes object files created by the Keil C51 Compiler and A51
Assembler and the Intel PL/M-51 Compiler and ASM-51 Assembler. These object modules
must adhere to the OMF51 object module specification. BL51 outputs an absolute OMF51
object module that may be loaded into practically any emulator, the Keil µVision3 Debugger,
or the OH51 Object-HEX converter (to create an Intel HEX file).
OH51 Object-HEX Converter

The OH51 Object-HEX converter creates Intel HEX files from absolute OMF51 object
modules, created by the Keil A51 assembler, BL51 code banking linker, or OC51 banked
object converter.
Intel HEX files are ASCII files that contain a hexadecimal representation of your program.
They easily may be loaded into a device programmer for writing EPROMs or other memory
devices
Figure 7 Screenshot of Keil µvision 4
62
Flash Magic
Flash Magic is a PC tool for programming flash based microcontrollers from NXP using a
serial or Ethernet protocol while in the target hardware.
Figure 8 Screenshot of Flash Magic
63
5. CONCLUSION
Features of design
• The most immediate benefits of the proposed solution are the ability to reduce the
number of personnel required to operate the gates and entrances.
• This project includes measures to control the traffic entering the system
• Provides a convenient and time saving system
• It can provide a system which could control the traffic without much human
intervention, which leads to greater accuracy and reliability
• Security is provided by allotting passwords for the customers. This prevents

intruder from entering the parking zone.
• It can also alert security personnel on security violation by activating an alarm

system.
• Records of many users can be stored.
• Its power consumption is less and is cost effective
• No separate power supply is required as vehicle block derives power from the
vehicle battery, thus proves to be efficient.
• Congestion is prevented as there is either parking or de-parking at a time
Future prospects
• This project can be implemented as a multi-storeyed car parking system, allowing

the cars to be stacked one above the other, thus making more efficient use of
available space.
• Prioritization can be done according to the hierarchy of users in an organization.
64
APPENDIX
Datasheets and Papers published
65
66
67
68
69
References
Books
1. 8051 Microcontrollers and embedded systems by Mazzidi
2. 8051 Microcontrollers and embedded systems by K. G. Ayala
3. Electronics For You Magazine
Websites
www.google.co.in/
www.8051projects.net
www.mikroe.com
http://www.vegakitindia.com
70

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1.

1.1. Problem Definition

1.2. Problem Analysis

Designation Abbreviation Frequency Band Wavelength

Very Low Frequency VLF 9KHz-30KHz 33Km-

Low Frequency LF 30KHz-300KHz 10Km-1Km

Medium Frequency MF 300KHz-3MHz 1Km-100m

High Frequency HF 3MHz-30MHz 100m-10m

Very High Frequency VHF 30MHz-300MHz 10m-1m

Ultra High Frequency UHF 300MHz-3GHz 1m-100mm

Super High Frequency SHF 3GHz-30GHz 100mm-

Extremely High Frequency EHF 30GHz-300GHz 10mm-1mm

1.3.3. Advantages of Radio Communication

4) REALLOCATION: - Relocation of radio communication equipment is extremely fast,

5) INACCESSIBILITY: - In some places the only practical way to provide

What is Radio Frequency

When an RF current is supplied to an antenna, it gives rise to an electromagnetic field that

The frequency of an RF signal is inversely proportional to the wavelength of the EM field

1.3.5. Applications of Radio Frequency

• Standard cordless phones: Bands from 40 to 50 MHz

• Radio controlled airplanes: Around 72MHz

• Radio controlled cars: Around 75MHz

• Wildlife tracing collars: 215 to 220 MHz

• MIR space station: 145 MHz and 437 MHz

• Cell phones: 824 to 849 MHz

• New 500 MHz cordless phones: Obviously above 900 MHz!

• Air traffic control radar: 960 to 1,215 MHz

• Global positioning system: 1,227 and 1,575 MHz

Application Frequency Bands

Aeronautical/ Maritime 9 KHz – 535 KHz

FM Radio 535 KHz – 1,700 KHz

Shortwave radio 5.9 MHz – 26.9 MHz

Citizen’s Band (CB) 26.96 MHz – 27.41 MHz

TV station 2-6 54 MHz – 88 MHz

FM Radio 88 MHz – 108 MHz

TV stations 7-13 174 MHz – 220MHz

Cell phones CDMA 824 MHz – 849 MHz

Cell phones GSM 869 MHz – 894 MHz

Air traffic controller 960 MHz – 1,215 MHz

GPS 1,227 MHz – 1,575 MHz

Cell phones PCS 1,850 MHz – 1,990 MHz

2.1. 8051 Standard

Figure 1 8051 Microcontroller Overview

• 4 Kb of ROM is not much at all.

• 128b of RAM (including SFRs) satisfies the user's basic needs.

The whole configuration is obviously thought of as to satisfy the needs of most

2.1.1. Pin Description

Figure 2 Pin Configuration

Pin 10’ RXD: Serial asynchronous communication input or Serial synchronous

Pin 11’ TXD: Serial asynchronous communication output or Serial synchronous

Pin 12’ INT0: Interrupt 0 input.

Pin 13’ INT1: Interrupt 1 input.

Pin 14’ T0: Counter 0 clock input.

Pin 15’ T1: Counter 1 clock input.

Pin 16’ WR: Write to external (additional) RAM.

Pin 17’ RD: Read from external RAM.

Pin 20’ GND: Ground.

Pin 40’ VCC: +5V power supply.

Pin configuration, i.e. whether it is to be configured as an input (1) or an output (0),

Similarly, in order to configure a microcontroller pin as an input, it is necessary to apply a

Figure 3 Input/Output Ports (I/O Ports)

Input/output (I/O) pin

Figure 5 Output pin

Figure 8 Output Configuration