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Published in IET Power Electronics

Received on 3rd September 2008
Revised on 2nd May 2009
doi: 10.1049/iet-pel.2008.0281

ISSN 1755-4535

Control strategy and space vector modulation

for three-leg four-wire voltage source inverters
under unbalanced load conditions
A. Mohd1 E. Ortjohann1 N. Hamsic1 W. Sinsukthavorn1
M. Lingemann1 A. Schmelter1 D. Morton2
1
University of Applied Sciences South Westphalia/Division Soest, Luebecker Ring 2, Soest D-59494, Germany
2
Bolton University, Deane Road, Bolton, UK
E-mail: AlaaMohd@gmail.com

Abstract: One of the desirable characteristics of inverters in three-phase systems is the ability to feed unbalanced/
non-linear loads with voltage and frequency nominal values. Therefore three-leg four-wire inverters are expected
to play an essential role in future power systems because of their ability to handle the neutral current caused by
unbalanced or non-linear loads. This study introduces an original control method in combination with three-
dimensional space-vector modulation (3D-SVM) strategy. The steps for the 3D-SVM implementation are
identied. The switching vectors, 3D-SVM diagrams and the boundary planes equations, as well as the
matrices for the duty cycles and symmetric switching sequences are discussed in detail. Experimental results
including different loads are presented to validate the proposed SVM control strategy for three-leg four-wire
voltage source inverters. The experimental results of this study show that the developed control scheme in
combination with three-leg four-wire inverters can carry out the grid feeding requirements and supply good
power quality to loads under extreme unbalanced conditions efciently.

1 Introduction However, all of these sources need power electronic devices

Fossil fuels are currently the major source of energy in
the world today. However, as the world is considering
more economical and environmentally friendly alternative
energy generation systems, the global energy mix is
becoming more complex. Factors forcing these
considerations are (a) the increasing demand for electric
power by both developed and developing countries,
(b) many developing countries lacking the resources to
build power plants and distribution networks, (c) some
industrialised countries facing insufcient power generation
and (d) greenhouse gas emission and climate change
concerns. Renewable Energy Sources (RESs) such as wind
turbines, photovoltaic solar systems, solar-thermo power,
biomass power plants, fuel cells, gas micro-turbines,
hydropower turbines, combined heat and power micro-
turbines and hybrid power systems will be part of future
power generation systems [1, 2].
to connect them to the grid. These units are multifunctional
and should be well controlled to do many utility functions.
An essential component at the grid side of such systems
is the inverter due to the wide range of functions it has
to perform. It has to convert the DC voltage to sinusoidal
current for use by the grid in addition to act as the
interface between the energy converting systems (ECSs),
the local load and the grid. It also has to handle the
variations in the electricity it receives due to varying levels
of generation by the RESs, loads and grid voltages [3 7].
The necessity of feeding three-phase unbalanced loads,
irregularly distributed single-phase loads or balanced three-
phase loads running at fault condition [8] leads to
investigate different methods to handle the neutral current.
If the phases are unequally loaded, they produce undesired
negative and zero sequence currents. The negative sequence
will cause excessive heating in machines, saturation of

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transformers and ripple in rectiers. The zero sequence
currents cause not only excessive power losses in neutral
lines but also affect protection [9]. Past research shows that
there are mainly three ways to provide neutral current
compensation: using zigzag transformers, using four-wire
voltage source inverter topology while tying the neutral
point to the mid-point of the fourth neutral leg [10]
or using split DC-link capacitors while tying the neutral
point to the mid-point of the DC-linked capacitors [8].
Several modulation strategies, differing in concept and
performance, have been developed for these topologies in
order to achieve variety of aims, including wide linear
modulation range, less switching loss, less total harmonic
distortion (THD) in the spectrum of switching waveform,
easy implementation and less computation time [11].
With the development of microprocessors, space-vector
modulation (SVM) has become one of the most important
pulse-width modulation (PWM) methods for three-phase
inverters because of its ability to reduce the commutation
losses and the harmonic contents of the output voltage,
as well as obtaining higher amplitude modulation indexes
[12, 13].
While the use of three-dimensional SVM (3D-SVM)
with four-leg inverter was explored by many authors using
different approaches, on the other hand, the use of 3D-
SVM with three-leg four-wire got less attention. It was
discussed briey in [14 18]. In [19], a discussion about
the 3D-SVM for three-leg four-wire voltage source
inverters was made including theory, implementation and
application examples. In a recent paper [20], a discrete
sliding mode control with modied SVM was discussed.
In this paper, SVM in combination with advanced control
strategy based on symmetrical components for three-leg four-
wire topology is presented and validated using experimental
results. It will be shown that the developed 3D-SVM
control schemes in combination with three-leg four-wire
inverters can perform the feeding requirements of grid
under extreme unbalanced load conditions efciently.
This paper will start in Section 2 with discussion of
the used inverter topology. In the next step, a detailed
description of the sequence decomposition used to transfer
the asymmetrical voltage/current into the dq 0 symmetrical
components will be given in Section 3. From there, the
paper will introduce the developed control strategy in
Section 4. In Section 5, the proposed 3D-SVM will be
described in detail. Experimental results to validate the
introduced method are presented in Sections 6.
2 Three-phase four-wire inverter
topologies
Three-phase four-wire voltage source inverters (three-phase
inverters with neutral point) are an evolution from the
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& The Institution of Engineering and Technology 2010
Figure 1 Three-phase three-leg inverter with a neutral
point
single-phase ones. Three half-bridge single-phase inverters
joined together can be seen as a three-phase four-wire
inverter, see Fig. 1, where each output feeds one phase.
This topology can be used to feed balanced/unbalanced
loads. In case of unbalanced loads, the sum of the output
currents ia , ib and ic will not be zero and the neutral
current will ow in the connection between the neutral
point and the mid-point of the capacitive divider [21 23].
To maintain symmetrical voltage across the two capacitors,
an adequate power electronics and voltage stage
management are needed. However, this will not be taken
further into discussion since it is out of scope of this paper.
The additional neutral inductor Ln is optional, as it can
reduce switching frequency ripple [24]. Furthermore, the
high unbalanced current owing through the DC-link
capacitors of the three-leg four-wire inverter requires higher
capacitance [25, 26]. However, compared with the four-leg
inverters, the three-leg four-wire inverter has a lower
number of semiconductor switches and the control function
can be built like three individual single-line inverters
which makes it an attractive option.
3 Sequence decomposition
Symmetrical sequence decomposition (SSD) is used mainly
in power electric fault analysis. In [27] a controller based
on symmetrical components for handling unbalanced
conditions with a multi-level inverter was introduced. In
the present work, sequence decomposition is used in the
implementation of the three-leg four-wire inverter control.
The SSD is able to represent asymmetrical three-phase
signal (voltage/current) as a sum of positive, negative and
zero sequence. The positive and negative components are
three-phase symmetrical signals, whereas the zero sequence
is a single-phase one.
In dq0-coordinates, the negative sequence appears as a
disturbance in d and q variables at a frequency of 2v [28,
29]. This is because the dq reference frame is rotating in
the positive direction at an angular frequency of v, whereas
the negative sequence disturbance rotates at an angular
frequency of v in the opposite direction. The zero sequence
appears at a frequency of v, because the zero-axis is
stationary [30].
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Asymmetrical three-phase signals va , vb and vc (the transformation process is done, each line is represented in
following method applies to currents in exactly the same detach dq-components. These signals in the dq-plane can
way) can be decomposed into two symmetrical three-phase be interpreted as complex values
waves: the positive component
Va dq = Va d + jVa q (6)
vp = {va p , vb p , vc p } (1) Vb dq = Vb d + jVb q (7)

and the negative components, that is Vc dq = Vc d + jVc q (8)

vn = {va n , vb n , vc n } (2) These asymmetrical complex dq-values for each line can
now be decoupled by the use of SSD. The relationship
and the zero-component v0 . The asymmetrical signals can be between the symmetrical dq-components corresponding
rearranged by the sums to the three-phase asymmetrical dq signals is given by (9)

va = va p + va + v0 (3)
n Vp dq 1 a a2 Va dq
Vn dq
= 11 a2 a V b dq
(9)
vb = vb p + vb n + v0 (4) V0 3 Vc
dq 1 1 1 dq

vc = vc p + vc n + v0 (5)
where
The general idea is shown in Fig. 2a. Therefore voltage of a = e j(2p/3) and a2 = e j(4p/3) (10)
each line is transformed by an ideal selective lter into va and
v components [31 33]. Then, a Park transformation is The phasors are dened in complex dq-plane. The back
performed to obtain the vd and vq components. When this transformation into a, b and g components is easier since

Figure 2 Sequence decomposition and composition

a Sequence decomposition
b Sequence composition

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no transformation to the complex domain is needed. and the units own qualications. An inverter in
Summing up vp and vn as they are both in the ab-plane, grid-parallel mode is a power production unit that is not
while taking into account that the negative component is controlled according to the requirements of the electrical
rotating anticlockwise, we obtain system. RESs such as wind energy converters and
photovoltaic systems may be used to feed their maximum
va = vp a + vn a (11) power into the grid (standard applications in conventional
grids). In such a case, these systems are considered as
vb = vp b vn b (12) grid parallel units. Advanced control strategies based on
symmetrical components in combination with four-leg or
vg = v0 a (13) three-leg four-wire inverter were developed by the authors
in [34, 35] and will be briey discussed here.
From the last equation, it can be pointed out that the
zero-component v0_a equals the g-component and both of As a grid forming unit, the inverter has to provide the
them are single-phase signals. The complete transformation voltage and the frequency of the grid (voltage source). This
starting from dq-plane of each line is shown in Fig. 2b. is done as following: the voltage and the current sensed
values are transformed from the abc-frame to the positive
The composed a, b and g components can be used for the negative zero dq sequence components.
SVM to produce the pulse pattern for the power electronic
switches [24]. In the following section, the control strategy The controller block comprises current and voltage PI
based on the symmetrical components will be discussed. controllers for each component. Six controllers are needed
for the voltage and the current components of the load.
4 Proposed control method For the controller only the d-component of the positive
sequence Vp_d_ref is considered. The other reference values
A general feeding philosophy to supply electric energy are set to zero since the inverter has to supply symmetrical
through power electronic inverters is discussed in [21]. In three-phase voltage. The output reference values from the
this philosophy, the power ow from an ECS into the control unit are transformed to the abg-space and the
grid may be driven by the grid or by the ECS itself, as SVM block uses them to calculate the pulse pattern for
summarised in Fig. 3 and Table 1. An inverter in grid- the switches. Fig. 4 shows an inverter in grid forming
forming mode is responsible for establishing the voltage mode for unbalanced loads. The control functions can be
and the frequency of the grid and maintaining them. described as vectors according to the following denition
An inverter in grid-supporting mode produces predened
amounts of power which are normally specied by a
management unit. The management system may change
Vp d ref Vp d act
the reference values according to the systems requirements Vp Vp
q ref q act

Vn Vn act
= , = ,
d ref d
V pn0 dq ref V V pn0 dq act V
n q ref n q act

V0 d ref V0 d act
V0 q ref V0 q act

Vp d Ip d act
Vp Ip
q q act

Vn d In act
= , =
d
V pn0 dq V I pn0 dq act I
n q n q act

V0 d I0 d act
V0 q I0 q act

Figure 3 Feeding modes at the grid-side (14)

Table 1 Control modes denition

Inverter mode Type Function

forming voltage source establish and control grid voltage and frequency
supporting voltage/current source power balance based on voltage and frequency
parallel current source none

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Figure 4 Inverter in grid forming mode for unbalanced loads

The control strategies of asymmetrical grid supporting be approximated as

and parallel are detailed in [35] and will not be repeated here.
V ref = da va + db vb + dc vc (16)
5 SVM for three-leg four-wire
inverters in which da , db and dc are the duty cycles of vectors va , vb
and vc . In [36], 3D-SVM algorithm based on generating a
SVM is based on vector selection in the abg (stationary) or
zero-vector was introduced. Still, the proposed algorithm
in the dq 0 (rotating) reference frame. A set of three vectors
has a drawback of stressing the insulated gate bipolar
va , vb and vc in the abg-frame can generate a normalised
transistors (IGBTs) unequally. In this paper, another SVM
reference vector Vref in the same plane using PWM-
algorithm without using a zero-vector is launched. This
averaged approximation. The average reference vector can
algorithm based on vectors compensation (compensated
be obtained by sequentially applying these vectors in a
vectors approach) is more practical as it is not only stressing
modulation period in accordance with
the IGBTs equally but less as well. The proposed SVM
algorithm can be achieved through the following steps:
TS T1 T2 TS
1 1 1 1
V ref dt = V a dt + V b dt + V c dt 1. Determining the switching combinations and the
TS TS TS TS
0 0 T1 T1 +T2 corresponding vectors.

(15) 2. Calculating the voltage drop related to each vector.

where TS is the modulation period and T1 + T2 TS . Since 3. Identifying the position for each vector in the abg-space
Vref remains constant during the modulation period, (15) can vector diagram.

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4. Identifying the reference vector position.

5. Calculating the duty cycles.

6. Building a vector sequence.

7. Computing pulse patterns.

These steps are described in detail in the following

paragraphs.

5.1 Steps one, two and three

In similar way to two-level three-phase inverters, there
are eight different switching combinations where the output
terminals will be connected to +1/2 or 21/2 of the
input DC voltage. However, unlike two-level three-leg
inverters none of these switching combinations is
Figure 5 3D space vectors
generating zero voltage at the output terminals, which make
the implementation of its SVM more difcult. Table 2
presents the eight possible switching vectors and the 5.2 Step four: reference vector position
corresponding output voltages related to the DC-voltage as identication
reference voltage. The switching vectors can be represented
Given that 12 tetrahedrons exist, there are 12 possibilities for
in the abg-coordinates using Clarkes transformation.
the reference vector position. We can identify the position
Table 2 shows the normalised abg-values of each switching
of the reference vector using the boundary planes limiting
vector.
the tetrahedron. Each tetrahedron is limited by three
planes. The boundary planes can be determined by means
The representation for these switching vectors in abg-
of the following linear equations
space is shown in Fig. 5. The vectors are taking place in
layers according to the value of their g component. Three 1
E71 : Vb = 0 (17)
vectors (V2 , V4 and V6) are located at the layer 3
Vg 1/6(VDC). The vectors (V1 , V3 and V5) are lying at
E12 :Va 3Vb + 4Vg = 0 (18)
the layer Vg 21/6(VDC). The vectors V7 and V0 are
located at the g-axis at Vg 1/2(VDC) and Vg 21/
3 1
2(VDC), respectively. The projection of the vectors in the E27 : V V =0 (19)
6 a 6 b
ab-frame is shown in Fig. 5 which is divided into six
prisms. The six prisms in the abg-space are shown in E23 : 2Va + 2Vg = 0 (20)
Fig. 6. Each prism is divided into two tetrahedrons, upper
and lower tetrahedron. Each tetrahedron is characterised by 3 1
E37 : Va + Vb = 0 (21)
three vectors. 6 6

Table 2 Switching states, the corresponding output voltages and normalised components of each switching vector

Switches (on) Vectors Normalised output voltage Normalised abg-components

Va /VDC Vb /VDC Vc /VDC Va /VDC Vb /VDC Vg /VDC
S4 S6 S2 V0 21/2 21/2 21/2 0 0 21/2
S1 S6 S2 V1 1/2 21/2 21/2 2/3 0 21/6

S1 S3 S2 V2 1/2 1/2 21/2 1/3 1/ 3 1/6

S4 S3 S2 V3 21/2 1/2 21/2 21/3 1/ 3 21/6
S4 S3 S5 V4 21/2 1/2 1/2 22/3 0 1/6

S4 S6 S5 V5 21/2 21/2 1/2 21/3 1/ 3 21/6

S1 S6 S5 V6 1/2 21/2 1/2 1/3 1/ 3 1/6
S1 S3 S5 V7 1/2 1/2 1/2 0 0 1/2

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Figure 6 3D prisms for three-leg four-wire inverters

the intermediate circuit voltage, the duty cycles in matrix

E34 :Va + 3Vb + 4Vg = 0 (22) form can be written as following
The zero-vector is compensated by the vectors V0 and V7 ,
da Varef
both lying against each other direction on the g-axis. The
d 1
reference vector can be expressed as following b= [v v v ]1 Vbref (26)
VDC a b c
V ref = da V a + db V b + dg V c (23) dg Vgref
where for the upper tetrahedron (24) applies and for the The duty cycles for the vectors V7 and/or V0 can be
lower tetrahedron (25) applies determined according to the position of the reference
vector. For the upper tetrahedron using (27) and for the
V c = V 7 and dg = d7 d0 (24)
lower tetrahedron using (28)
V c = V 0 and dg = d0 d7 (25)
1 (da + db ) + dg
d7 = where d0 = d7 dg (27)
5.3 Step ve: duty cycles calculation 2

Once the target tetrahedron is dened the nearest three 1 (da + db ) + dg

d0 = where d7 = d0 dg (28)
vectors are chosen. By normalising the standard vectors at 2

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Table 3 Vector sequence for the upper and lower Table 4 Inverter parameters
tetrahedrons in each prism
Parameters Values
Prism Sequence
line frequency 50 Hz
1 v0-v1-v2-v7-v7-v2-v1-v0
DC-link voltage 650
2 v0-v3-v2-v7-v7-v2-v3-v0
switching frequency 10 kHz
3 v0-v3-v4-v7-v7-v4-v3-v0
lter inductance (Lf) 3 mH
4 v0-v5-v4-v7/-v7-v4-v5-v0
lter capacitance (Cf) 10 mF
5 v0-v5-v6-v7-v7-v6-v5-v0
output power 10 kVA
6 v0-v1-v6-v7-v7-v6-v1-v0
PWM output mode symmetrical PWM

5.4 Steps six and seven: building vector
sequence and pulse pattern computation
In order to reduce the current ripple, switching vectors
adjacent to the reference vector should be selected since
they produce non-conicting voltage pulses (same voltage
polarity) [11]. Table 3 shows the vector sequence for the
upper and lower tetrahedrons in each prism.
An example for determining the switching sequence for
the rst prism is shown in Fig. 7a. The pulse sequence can

Figure 7 Building vector sequence and pulse pattern computation

a Steps for the modulation in the rst prism
b Symmetric modulation in the rst prism

Figure 8 Experimental results

a Voltage under asymmetrical resistive load
b Current under asymmetrical resistive load

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Figure 9 Experimental results
a Transient response, load step down, current under asymmetrical resistive load
b Transient response, load step up, voltage under asymmetrical resistive load
Figure 10 Current transient response under resistive-
inductive load, load step down at one phase
be achieved by comparing the duty cycles with a carrier signal.
The pulse sequence for phase a, b and c are shown in Fig. 7b
for the same mentioned case.
6 Experimental results
A 10 kW experimental prototype using IGBTs was
successfully built to validate the 3D-SVM PWM
algorithm. The inverter main parameters can be seen in
Figure 11 Voltage transient response under resistive-inductive load, load step down at one phase
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Table 4. Different scenarios were tested experimentally.
In the rst case, an unbalanced resistive load was placed.
The resistance at phase a and b has been kept at 50 V
and the resistance of phase c is set to 25 V. The output
voltage is a constant three-phase signal in amplitude and
phase while the current is different due to the load
unbalance, see Fig. 8. The voltage THD 2.12% and the
current THD 2.40%.
In the second case, balanced resistive load was placed. The
resistance at all phases was set to 50 V initially. Afterwards,
a load step was done from 50 to 25 V at phase a. The
output voltage is a constant three-phase signal in amplitude
and phase while the current is increasing to compensate for
the load step, see Fig. 9.
In the third case, an unbalanced resistive-inductive load
was placed. The resistance at all phases was set to 50 V
initially, except phase a which includes a 3 mH inductance
in series as well. Afterwards, a load step down was done
from 50 to 25 V at phase a. The output voltage is a
constant three-phase signal in amplitude and phase, while
the current is increasing to compensate for the load step,
see Figs. 10 and 11. The voltage THD 2.29% and the
current THD 2.47%.
331
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7 Conclusion
This paper introduces control functions for three-leg four-
wire inverters. These functions are capable of providing
good power quality to loads even under extreme unbalanced
conditions. These control strategies are based on sequence
decomposition where asymmetrical three-phase signals
(voltage/current) can be represented as sum of positive,
negative and zero-sequence. As part of this control strategy,
a new approach of 3D-SVM for three-leg four-wire voltage
source inverters is introduced. The steps for the 3D-SVM
implementation are identied. The switching vectors,
3D-SVM diagrams and the boundary planes equations, as
well as the matrices for the duty cycles and symmetric
switching sequences are discussed in detail. Experimental
results including different loads are presented to validate
the proposed novel SVM control strategy for three-leg
four-wire voltage source inverters.
Experimental results show that the proposed 3D-SVM
control schemes for three-leg four-wire inverters can carry
out the feeding requirements of unbalanced loads in an
efcient way. It can supply good quality balanced regulated
three-phase voltage in the presence of unbalanced loads.
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& The Institution of Engineering and Technology 2010