DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING

QUESTION BANK

Course Name: Computer Organization Course Code:

A40506 Branch: CSE Year/Semester: II
Academic Year:2016-2017

UNIT-III

2 Mark Questions

1. What is Associative Memory?

2. What is Memory address Map?
3. What are Hit and Miss Ratio?
4. What are the main advantages of CAM?
5. Give the size of Argument, Key and Match registers for a CAM of size M N.
6. Define Locality of Reference.
7. List the different Mapping for cache.
8. Differentiate between Associative and Set-associative mapping for cache.
9. Explain write-through and write-back in cache.
10. What is virtual memory?
11. Differentiate Address space and Memory space.
12. Define page frame.
13. Define page fault.
14. How is a page fault handled?
15. What is a page replacement policy
16. Differentiate between FIFO and LRU page replacement strategies
17. Explain a scenario where LRU is more efficient tan FIFO page replacement strategy.
5 Mark Questions

1. Explain with illustration the hardware organization of CAM

2. Derive the match logic in the functioning of CAM
3. Describe in detail the mapping strategies used in Cache organization
4. Explain in detail about the address mapping using pages in virtual memory
5. Explain how the virtual memory mapping table can be organized using associative
memory
6. Explain in detail about Page replacement
 10 Marks Question
1. Describe in detail the mapping strategies used in Cache organization
2. Explain the mapping between address space and memory space of virtual memory

UNIT-IV
2 Mark Questions

1. What is 8086 microprocessor?

2. Differentiate between microprocessor and microcontroller
3. List the different types of 8086 registers
4. Explain AX,AH and AL
5. What is the use of segment registers?
6. What is ES? Give its uses.
7. What is PSW?
8. What are the contents of PSW?
9. List the status flags of PSW
10. List the control flags of PSW
11. What are the functions of BIU?
12. Explain Address adder of BIU.
13. If the content of Data segment register is 10B3 (Hexadecimal) and the content of Source
index register is 5D28(Hexadecimal), Calculate the Physical address of the operand.
14. What are the parts of the flag register?
15. When is the Auxiliary carry flag set?
16. What is pipeline processing
17. Illustrate the Register to/from Memory with displacement addressing mode
18. What is register relative addressing mode
19. Explain intrasegment direct mode
20. Differentiate between intrasegment direct mode and intrasegment indirect mode.

5 Mark Questions

1. Describe in detail about the register organization in 8086.

2. Illustrate and explain the 8086 architecture
3. Draw the 8086 pin diagram and explain the line common to both modes of operation
4. Describe the pipelined processing of 8086
5. Describe the different Addressing modes of 8086 with suitable examples

10 Mark Questions

1. Draw the 8086 pin diagram and explain

2. Describe the different Addressing modes of 8086 with suitable examples
3. Illustrate and explain the 8086 architecture
4. Illustrate and explain the set of lines in the pin configuration of 8086that aid in
pipelining.
UNIT-V
2 Mark Questions

1. What are Data copy/ Transfer Instructions? Give examples

2. What are Machine control instructions? Give examples
3. What are Flag manipulation instructions? Give examples
4. What is XCHG
5. Explain JNLE/JE
6. Describe STOS
7. Explain XLAT

5 Mark Questions
1. Describe Data copy/ Transfer Instructions with examples
2. Describe Branch Instructions with examples
3. Describe Machine control Instructions with examples
4. Describe Flag manipulation Instructions with examples
5. Describe shift and rotate instructions with examples

10 Mark Questions

1. Explain evaluation of Arithmetic expression in 8086

2. Write and explain a simple sorting program for 8086