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----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 22:34:41 04/10/2017
-- Design Name:
-- Module Name: binaryconv - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating

-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity binaryconv is
port(BTN_EAST : in STD_LOGIC;
clk : in STD_LOGIC;
BTN_NORTH : in STD_LOGIC;
BTN_SOUTH : in STD_LOGIC;
BTN_WEST : in STD_LOGIC;
SW: IN STD_LOGIC_VECTOR(3 DOWNTO 0);--SWITCH
"INPUT"
reset: in std_logic;
out3:OUT STD_LOGIC;
out2:OUT STD_LOGIC;
out1:OUT STD_LOGIC;
out0:OUT STD_LOGIC;
LCD_E: out STD_LOGIC;
LCD_RS: out STD_LOGIC;
LCD_RW : out STD_LOGIC;
sf_ce0: out std_logic;
LED:OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
);
end binaryconv;
architecture Behavioral of binaryconv is

signal oszz: std_logic_vector(5 downto 0);
signal count : std_logic_vector(26 downto 0) :=
"000000000000000000000000000";
begin
process (clk,reset,BTN_SOUTH,BTN_NORTH,BTN_EAST,BTN_WEST,sw)
variable switch: integer :=0;
begin
if clk'event and clk='1' then
if(BTN_SOUTH = '1') then
switch:=1;
else
end if;
if(BTN_EAST = '1') then
switch:=2;
else
end if;
if(BTN_WEST = '1') then
switch:=3;
else
end if;
if(BTN_NORTH = '1') then
switch:=4;
else
end if;
if reset = '1' then
count <= count + 1;
sf_ce0 <= '1';
case (count(26 downto 21)) is
when "000000" => oszz <= "000011"; --X"03"
when "000001" => oszz <= "000011"; --X"03"
when "000010" => oszz <= "000000"; --X"03"
when "000011" => oszz <= "000010"; --X"02"
when "000100" => oszz <= "000010"; --X"02"
function set
when "000101" => oszz <= "001000"; --X"08"
when "000110" => oszz <= "000000"; -- X"00"
entry mode
when "000111" => oszz <= "000110"; --X"06"
when "001000" => oszz <= "000000"; --
display on/off
when "001001" => oszz <= "001100";
when "001010" => oszz <= "000000"; --
display clear
when "001011" => oszz <= "000001";
when "001100" => oszz <= "000000"; -- Take
cursor home
when "001101" => oszz <= "001111";
--------------------------------------------------------------------------
when "001110" => oszz <= "100100"; --upper nibble
byte
when "001111" => oszz <= "101001";-- I lower nibble
byte
byte
byte
byte
byte
byte
when "010101" => oszz <= "100100";-- T lower nibble
byte
when others => oszz <= "010000";
end case;
LCD_E<=count(20);
(LCD_RS,LCD_RW,out3,out2,out1,out0)<=oszz;
end if;
case switch is
when 1=> --BINARY TO GREY
LED(3) <= SW(3);
LED(2) <= SW(3) xor SW(2);
LED(1) <= SW(2) xor SW(1);
LED(0) <= SW(1) xor SW(0);
LED(7 DOWNTO 4)<="0000";
when 2=> --BINARY TO DECIMAL
oszz<="10" & sw;
(LCD_RS,LCD_RW,out3,out2,out1,out0) <= oszz;
when 3=> --GRAY TO BINARY
if (SW="0000") then
LED <= "00000000";
elsif (SW="0001") then
LED <= "00000001";
LED <= "00000011";
LED <= "00000010";
LED <= "00000111";
LED <= "00000110";
LED <= "00000100";
LED <= "00000101";
LED <= "00001111";
LED <= "00001110";
LED <= "00001100";
LED <= "00001101";
LED <= "00001000";
LED <= "00001001";
LED <="00001011";
else
LED <="00001010";
end if;
when 4 => -- BINARY TO HEXADECIMAL
IF SW<="1001" THEN
oszz<= "010000";
oszz<="10" & sw;
elsif SW>="1001" THEN
oszz<= "010000";
if (SW="1010") then
oszz <= "100100";
oszz <= "100001";
oszz <= "100100";
oszz <= "100010";
oszz <= "100100";
oszz <= "100011";
oszz <= "100100";
oszz <= "100100";
oszz <="100100";
oszz <= "100101";
oszz <="100100";
oszz <= "100110";
END IF;
end if;
when others =>
end case;
end if;
end process;
end Behavioral;
# PlanAhead Generated physical constraints
NET "clk" LOC = C9;

NET "LCD_E" LOC = M18;
NET "LCD_RS" LOC = L18;
NET "LCD_RW" LOC = L17;
NET "sf_ce0" LOC = D16;
NET "out0" LOC = R15;
NET "out1" LOC = R16;
NET "out2" LOC = P17;
NET "out3" LOC = M15;
NET "BTN_EAST" LOC=H13;
NET "BTN_NORTH" LOC=V4;
NET "BTN_SOUTH" LOC=K17;
NET "BTN_WEST" LOC=D18;
NET "SW<0>" LOC=L13;
NET "SW<1>" LOC=L14;
NET "SW<2>" LOC=H18;
NET "SW<3>" LOC=N17;
NET "reset" LOC=V16;
NET"LED<7>" LOC=F9;
NET"LED<6>" LOC=E9;
NET"LED<5>" LOC=D11;
NET"LED<4>" LOC=C11;
NET"LED<3>" LOC=F11;
NET"LED<2>" LOC=E11;
NET"LED<0>" LOC=E12;
NET"LED<7>" LOC=F12;

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----------------------------------------------------------------------------------

-- Uncomment the following library declaration if instantiating

architecture Behavioral of binaryconv is

# PlanAhead Generated physical constraints

NET "clk" LOC = C9;

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