MP2212 r1.01

MP2212
16V, 3A, 600kHz Synchronous

Step-Down Converter
The Future of Analog IC Technology
DESCRIPTION FEATURES
The MP2212 is an internally compensated 3A Output Current
600kHz fixed frequency PWM synchronous Input Supply Range: 3V to 16V
step-down regulator. With a 3V to 6V bias 80m Internal Power MOSFET Switches
supply (VCC), MP2212 operates from a 3V to
All Ceramic Output Capacitors Design
16V input and generates an adjustable output
Up to 95% Efficiency
voltage from 0.8V to 0.9xVIN at up to 3A load
current. 600kHz Fixed Switching Frequency
Adjustable Output from 0.8V to 0.9xVIN
The MP2212 integrates an 80m high-side Internal Soft-Start
switch and an 80m synchronous rectifier for Frequency Synchronization Input
high efficiency without an external Schottky Thermal Shutdown
diode. With peak current mode control and Cycle-by-Cycle Current Limiting
internal compensation, it is stable with a
Hiccup Short Circuit Protection
ceramic output capacitor and a small inductor.
10-lead, 3mm x 3mm QFN Package and 8-
Fault protection includes hiccup short-circuit
lead SOICE package
protection, cycle-by-cycle current limiting and
thermal shutdown. Other features include APPLICATIONS
frequency synchronization input and internal
soft-start. P/ASIC/DSP/FPGA Core and I/O Supplies
Printers and LCD TVs
The MP2212 is available in small 3mm x 3mm Network and Telecom Equipment
10-lead QFN and 8-lead SOIC with exposed Point of Load Regulators
pad packages.
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Quality Assurance. MPS and The
Future of Analog IC Technology are Trademarks of Monolithic Power Systems,
Inc.
TYPICAL APPLICATION
Efficiency vs.
Load Current
VIN 100
3V to 16V VIN=5V
95
4, 7 5
IN BS 90
VIN=12V
VCC
EFFICIENCY (%)
6 3, 8
VCC SW VOUT 85
3V to 6V
1.8V / 3A
80
MP2212 C6
560PF 75
10 1
OFF ON EN/SYNC FB
GND 70
2, 9 65
60
VOUT=3.3V
55
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
LOAD CURRENT (A)
MP2212 Rev. 1.01 www.MonolithicPower.com 1

2/22/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
2012 MPS. All Rights Reserved.
MP2212 16V, 3A, 600kHz SYNCHRONOUS STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number Package Top Marking Free Air Temperature (TA)
MP2212DQ* QFN10 (3mm x 3mm) Z7 -40C to +85C
MP2212DN** SOIC8E MP2212DN -40C to +85C
* For Tape & Reel, add suffix Z (e.g. MP2212DQZ);

For RoHS compliant packaging, add suffix LF (e.g. MP2212DQLFZ)
** For Tape & Reel, add suffix Z (e.g. MP2212DNZ);

For RoHS compliant packaging, add suffix LF (e.g. MP2212DNLFZ)
PACKAGE REFERENCE
TOP VIEW
FB 1 8 EN/SYNC
GND 2 7 SW
IN 3 6 SW
BS 4 5 VCC
EXPOSED PAD
ON BACKSIDE
CONNECT TO GND
QFN10 (3mm x 3mm) SOIC8E
(4)
ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance JA JC
IN to GND ..................................... -0.3V to +18V QFN10 (3mm x 3mm) .............50 ...... 12 ... C/W
SW to GND ........................... -0.3V to VIN + 0.3V SOIC8E ...................................50 ...... 10 ... C/W
.............................-2.5V to VIN + 2.5V for < 50ns Notes:
FB, EN/SYNC, VCC to GND........... -0.3V to +6.5V 1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
BS to SW ..................................... -0.3V to +6.5V maximum junction temperature TJ(MAX), the junction-to-
(2) ambient thermal resistance JA, and the ambient temperature
Continuous Power Dissipation (TA = +25C)
TA. The maximum allowable continuous power dissipation at
QFN10 (3mm x 3mm) ............... .......... ..... 2.5W any ambient temperature is calculated by PD(MAX)=(TJ(MAX)-
SOIC8E..................................... .......... ..... 2.5W TA)/ JA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
Junction Temperature ...............................150C into thermal shutdown. Internal thermal shutdown circuitry
Lead Temperature ....................................260C protects the device from permanent damage.
Storage Temperature............... -65C to +150C 3) The device is not guaranteed to function outside of its
operating conditions.
(3) 4) Measured on JESD51-7 4-layer PCB.
Recommended Operating Conditions
Supply Voltage VIN ..............................3V to 16V
Bias Voltage VCC ...................................3V to 6V
EN/SYNC Voltage...................no more than VCC
Output Voltage VOUT ...................0.8V to 0.9x VIN
Maximum Junction Temp. (TJ) ................+125C

ELECTRICAL CHARACTERISTICS (5)

VCC = 3.6V, VIN=12V, TA = +25C, unless otherwise noted.
Parameters Condition Min Typ Max Units
VEN = VCC
VCC Supply Current 750 A
VFB = 0.85V
VCC Shutdown Current VEN = 0V, VCC= 6V 1 A
VCC Under Voltage Lockout Threshold Rising Edge 2.8 3 V
VCC Under Voltage Lockout
200 mV
Hysteresis
IN Shutdown Current VEN = 0V 4 A
IN Under Voltage Lockout Threshold,
2.85 2.95 V
Rising Edge
IN Under Voltage Lockout Hysteresis 300 mV
TA = +25C 0.780 0.800 0.820 V
Regulated FB Voltage
-40C TA +85C 0.772 0.828 V
FB Input Current VFB = 0.85V -50 50 nA
EN High Threshold -40C TA +85C 1.6 V
EN Low Threshold -40C TA +85C 0.4 V
Internal Soft-Start Time 120 s
High-Side Switch On-Resistance ISW = 300mA 80 m
Low-Side Switch On-Resistance ISW = 300mA 80 m
VEN = 0V; VIN = 12V
SW Leakage Current -10 10 A
VSW = 0V or 12V
BS Under Voltage Lockout Threshold 1.8 V
High-Side Switch Current Limit Sourcing 6 A
Low-Side Switch Current Limit Sinking 3 A
Oscillator Frequency 450 600 750 kHz
Synch Frequency 0.5 2 MHz
Minimum On Time 50 ns
Maximum Duty Cycle 90 %
Thermal Shutdown Threshold Hysteresis = 20C 150 C
Note:
5) Production test at +25C. Specifications over the temperature range are guaranteed by design and characterization.

PIN FUNCTIONS
8-SOICE 10-QFN
Name Description
Pin # Pin #
Bias Supply. This supplies power to both the internal control circuit and the
5 6 VCC
gate drivers. A decoupling capacitor to ground is required close to this pin.
Input Supply. This supplies power to the high side switch. A decoupling
3 4, 7 IN
capacitor to ground is required close to this pin to reduce switching spikes.
Switch Node Connection to the Inductor. These pins connect to the internal
67 3, 8 SW high and low-side power MOSFET switches. All SW pins must be
connected together externally.
GND, Ground. Connect these pins with larger copper areas to the negative
2 2, 9 Exposed terminals of the input and output capacitors. Connect Exposed Pad and
Pad GND pin to the same plane.
Bootstrap. A capacitor between this pin and SW provides a floating supply
4 5 BS
for the high-side gate driver.
Feedback. This is the input to the error amplifier. An external resistive
1 1 FB divider connected between the output and GND is compared to the internal
0.8V reference to set the regulation voltage.
Enable and Frequency Synchronization Input Pin. Forcing this pin below
0.4V shuts down the part. Forcing this pin above 1.6V but no more than VCC
turns on the part. Attach to VCC with a 100k pull up resistor for automatic
8 10 EN/SYNC start-up.
Applying a 500kHz to 2MHz clock signal to this pin synchronizes the internal
oscillator frequency to the external source. Dont apply a voltage more than
VCC to this pin.

TYPICAL PERFORMANCE CHARACTERISTICS

VCC = 5V, VOUT = 1.8V, TA = +25C, unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

VCC = 5V, VOUT = 1.8V, TA = +25C, unless otherwise noted (continued)
Switching Waveform
VIN=12V, IOUT=3A
VOUT AC
Coupled
10mV/div VOUT/AC VOUT/AC
50mV/div 50mV/div
VSW
5V/div
IINDUCTOR
IINDUCTOR 2A/div
2A/div
IINDUCTOR
2A/div

FUNCTIONAL BLOCK DIAGRAM

VCC
UVLO UVLO
IN
EN
IN
BS
EN/SYNC EN/SYNC EN
LOGIC
--
+
EXCLK PWM
LOGIC
CURRENT
CLK COMPARATOR
OSC SW
SLOPE
SW
0.5pF
1.2 MEG 17pF

SLOPE
COMPENSATION
FB -- COMP AND PEAK
0.8V + CURRENT LIMIT
+ GND
SOFT
-START GND
Figure 1Functional Block Diagram

FUNCTIONAL DESCRIPTION
PWM Control At this point the reference voltage takes over at
The MP2212 is a constant frequency peak- the non-inverting error amplifier input. The soft-
current-mode control PWM switching regulator. start time is internally set at 120s. If the output of
Refer to the functional block diagram. The high the MP2212 is pre-biased to a certain voltage
side N-Channel DMOS power switch turns on at during startup, the IC will disable the switching of
the beginning of each clock cycle. The current in both high-side and low-side switches until the
the inductor increases until the PWM current voltage on the internal soft-start capacitor
comparator trips to turn off the high side DMOS exceeds the sensed output voltage at the FB pin.
switch. The peak inductor current at which the
Over Current Protection
current comparator shuts off the high side power
The MP2212 offers cycle-to-cycle current limiting
switch is controlled by the COMP voltage at the
for both high-side and low-side switches. The
output of feedback error amplifier. The
high-side current limit is relatively constant
transconductance from the COMP voltage to the
regardless of duty cycles. When the output is
output current is set at 11.25A/V.
shorted to ground, causing the output voltage to
This current-mode control greatly simplifies the drop below 50% of its nominal output, the IC is
feedback compensation design by approximating shut down momentarily and begins discharging
the switching converter as a single-pole system. the soft start capacitor. It will restart with a full
Only Type II compensation network is needed, soft-start when the soft-start capacitor is fully
which is integrated into the MP2212. The internal discharged. This hiccup process is repeated until
compensation in the MP2212 simplifies the the fault is removed.
compensation design, minimizes external
Bootstrap (BST PIN)
component counts. The loop bandwidth can be
The gate driver for the high-side N-channel
adjusted by adding a feed-forward capacitor
DMOS power switch is supplied by a bootstrap
which is in parallel with the feedback resistor from
capacitor connected between the BS and SW pins.
output to FB pin.
When the low-side switch is on, the capacitor is
Enable and Frequency Synchronization charged through an internal boost diode. When
(EN/SYNC PIN) the high-side switch is on and the low-side switch
This is a dual function input pin. Forcing this pin turns off, the voltage on the bootstrap capacitor is
below 0.4V for longer than 4s shuts down the boosted above the input voltage and the internal
part; forcing this pin above 1.6V for longer than bootstrap diode prevents the capacitor from
4s turns on the part. Applying a 500kHz to 2MHz discharging.
clock signal to this pin also synchronizes the
internal oscillator frequency to the external clock. Input UVLO
When the external clock is used, the part turns on Both VCC and IN pins have input UVLO detection.
after detecting the first few clocks regardless of Until both VCC and IN voltage exceed under
duty cycles. If any ON or OFF period of the clock voltage lockout threshold, the parts remain in
is longer than 4s, the signal will be intercepted shutdown condition. There are also under voltage
as an enable input and disables the lockout hysesteres at both VCC and IN pins.
synchronization. For automatic startup, connect VCC Power Supply
this pin to VCC with a pull-up resistor. Dont apply VCC is the power supply of both the internal
a voltage more than VCC to this pin. control circuit and the gate drivers.
Soft-Start and Output Pre-Bias Startup Generally, the VCC power supply could be
When the soft-start period starts, an internal provided directly by a proper power rail or
current source begins charging an internal soft- generated from other VCC generation circuits. For
start capacitor. During soft-start, the voltage on instance, Figure6 shows a typical VCC generation
the soft-start capacitor is connected to the non- circuit for VOUT=5V application.
inverting input of the error amplifier. The soft-start
period lasts until the voltage on the soft-start It is noteworthy that the voltage applied on the
capacitor exceeds the reference voltage of 0.8V. VCC pin should never be higher than 6V.

APPLICATION INFORMATION
is recommended for most applications. For best
Setting the Output Voltage
efficiency, the inductor DC resistance shall be
The external resistor divider sets the output
<10m. See Table 2 for recommended inductors
voltage (see Figure 1). For typical applications,
and manufacturers. For most designs, the
choose R2 to be 10k . R1 is then given by:
inductance value can be derived from the
VOUT following equation:
R1 = R2 ( 1)
0.8V
VOUT x(VIN VOUT )
Table 1Resistor Selection vs. Output L=
VIN xIL xfOSC
Voltage Setting
where IL is Inductor Ripple Current. Choose
COUT
VOUT (V) R1 (k) R2 (k) L (H) inductor ripple current approximately 30% of the
(ceramic)
maximum load current, 3A.The maximum
1.2 5 10 1H-4.7H 47F inductor peak current is:
1.5 8.75 10 1H-4.7H 47F
1.8 12.5 10 1H-4.7H 47F IL
IL(MAX) = ILOAD +
2.5 21.25 10 1H-4.7H 47F 2
3.3 31.25 10 1H-4.7H 47F Under light load conditions, larger inductance is
Feed-forward capacitor recommended for improved efficiency
For applications with VOUT other than 0.8V, Input Capacitor Selection
adding a feed-forward capacitor in parallel with The input capacitor reduces the surge current
the feedback resistor from output to FB pin can drawn from the input and switching noise from
increase loop bandwidth, help reducing transient the device. The input capacitor impedance at the
overshoot and undershoot and startup overshoot switching frequency shall be less than input
if any. Figure 2 shows typical 5 VOUT application source impedance to prevent high frequency
circuit with a 390pF feed-forward capacitor. switching current passing to the input. Ceramic
Selecting the Inductor capacitors with X5R or X7R dielectrics are highly
recommended because of their low ESR and
A 1H to 4.7H inductor with DC current rating at small temperature coefficients. For most
least 25% higher than the maximum load current applications, a 47F capacitor is sufficient.
Table 2Suggested Surface Mount Inductors
Max Current
Inductance Dimensions
Manufacturer Part Number DCR Rating
(H) L x W x H (mm3)
(m) (A)
TOKO
FDA1055-3R3M 3.3 7.3 11.7 10.8x11.6x5.5
Wurth Electronics
744314330 3.3 9.6 8 7x6.9x5
TDK
ULF100457-3R3N6R9 3.3 11.6 7.5 10x9.7x4.5

Output Capacitor Selection PCB Layout Guide

The output capacitor keeps output voltage ripple PCB layout is very important to achieve stable
small and ensures regulation loop stable. The operation. It is highly recommended to duplicate
output capacitor impedance shall be low at the EVB layout for optimum performance. If change
switching frequency. Ceramic capacitors with is necessary, please follow these guidelines as
X5R or X7R dielectrics are recommended. If follows. Here, the typical application circuit is
electrolytic capacitor is used, pay attention to taken as an example to illustrate the key layout
output ripple voltage, extra heating, and the rules should be followed.
selection of feedback resistor R1 (refer to Output
1) For MP2212DQ, a PCB layout with more than
Voltage Setting section) due to large ESR of
(or) four layers is recommended.
electrolytic capacitor. The output ripple VOUT is
approximately: 2) The high current paths (GND, IN and SW)
should be placed very close to the device with
VOUT x(VIN VOUT ) 1
VOUT x(ESR + ) short, direct and wide traces.
VIN xfOSC xL 8xfOSC xC3
3) For MP2212DQ, two input ceramic capacitors
The output capacitance is recommended to be (2 x (10F~22F)) are strongly recommended to
less than 100F. be placed on both sides of the MP2212DQ
package and keep them as close as possible to
External Schottky Diode
the IN and GND pins.
For this part, an external schottky diode is
For MP2212DN, an input ceramic capacitor
recommended to be placed close to "SW" and
should be placed as close as possible to IN and
"GND" pins, especially when the output current is
GND pins.
larger than 2A.
4) A RC low pass filter is recommended for VCC
With the external schottky diode, the voltage
supply. The VCC decoupling capacitor must be
spike and negative kick on "SW" pin can be
placed as close as possible to VCC pin and
minimized; moreover, the conversion efficiency
GND pin.
can also be improved a little.
5) The external feedback resistors shall be
For the external schottky diode selection, it's
placed next to the FB pin. Keep the FB trace as
noteworthy that the maximum reverse voltage
short as possible.
rating of the external diode should be larger than
the maximum input voltage. As for the current 6) Keep the switching node SW short and away
rating of this diode, 0.5A rating should be from the feedback network.
sufficient.
Top Layer Inner Layer1

Inner Layer2 Bottom Layer

Figure2Recommended PCB Layout of MP2212DQ
Top Layer Bottom Layer

Figure 3Recommended PCB Layout of MP2212DN
TYPICAL APPLICATION CIRCUITS

VIN
4, 7 5 C3
IN BS 100nF
VCC 6 3, 8
VCC SW VOUT
5V / 3A
MP2212
10 1
OFF ON EN/SYNC FB
GND
2, 9 C5
390pF
Figure 45V VOUT Application Circuit with a 390pF Feed-forward Capacitor

Vin C5
3V to 16V C1 C2 100nF
4,7 5
R4 22 22 L1
IN BS 3.3
10 6 3,8
Vcc Vcc SW Vout
3V to 6V C4 D1 1.8V/3A
1 MP2212DQ B0530 C6 560pF
10 1
EN/SYNC FB
R3 GND C3
R2 R1
100k 2,9 47
10k 12.4k
Figure 5Typical Application Circuit of MP2212DQ
D2
B0530
Vin C5
9~16V C1 C2 100nF
R4 4,7 5
22 22 L1
10k
IN BS 3.3
6 3,8
Vcc SW Vout
Q1 C4 5V/3A
Z1 D1
4.7V
MMBT3904 1 MP2212DQ B0530 R1
10 EN/SYNC 10k
FB 1
R3 GND C3
100k 2,9 R2 47
1.91k
Figure6MP2212DQ with A VCC Generation Circuit

Vin C4
3V to 16V C1 100nF
3 4
22 L1
IN BS 3.3
5 6,7
Vcc Vcc SW Vout
3V to 6V R3 C3 D1 1.8V/3A
10 1 MP2212DN B0530 C5 560pF
8 1
EN/SYNC FB
R4 GND R1 C2
R2 12.4k 47
100k 2
10k
Figure 7 Typical Application Circuit of MP2212DN

PACKAGE INFORMATION
QFN10 (3mm x 3mm)
2.90 0.30 1.45 PIN 1 ID
3.10 0.50 1.75 SEE DETAIL A
PIN 1 ID
MARKING
0.18
10 1
0.30
2.90 2.25
PIN 1 ID 2.55
3.10 0.50
INDEX AREA
BSC
6 5
TOP VIEW BOTTOM VIEW
PIN 1 ID OPTION A PIN 1 ID OPTION B

R0.20 TYP. R0.20 TYP.
0.80
1.00
0.20 REF
0.00
0.05
SIDE VIEW DETAIL A
NOTE:
2.90
1) ALL DIMENSIONS ARE IN MILLIMETERS.
0.70 1.70 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX.
0.25 4) DRAWING CONFORMS TO JEDEC MO-229, VARIATION VEED-5.
5) DRAWING IS NOT TO SCALE.
2.50
0.50
RECOMMENDED LAND PATTERN

SOIC8E (EXPOSED PAD)

0.189(4.80) 0.124(3.15)
0.197(5.00) 0.136(3.45)
8 5
0.150(3.80) 0.228(5.80) 0.089(2.26)

PIN 1 ID 0.157(4.00) 0.244(6.20) 0.101(2.56)
1 4
TOP VIEW BOTTOM VIEW
SEE DETAIL "A"
0.051(1.30)
0.067(1.70)
0.0075(0.19)
SEATING PLANE
0.0098(0.25)
0.000(0.00)
0.013(0.33) 0.006(0.15)
0.020(0.51) SIDE VIEW
0.050(1.27)
BSC
FRONT VIEW 0.010(0.25)

x 45o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC
0.024(0.61) 0.050(1.27)
0.016(0.41)
0o-8o 0.050(1.27)
0.063(1.60)
DETAIL "A"
0.103(2.62) 0.213(5.40)
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
0.138(3.51) OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
RECOMMENDED LAND PATTERN 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.


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MP2212

16V, 3A, 600kHz Synchronous

MP2212 Rev. 1.01 www.MonolithicPower.com 1

* For Tape & Reel, add suffix Z (e.g. MP2212DQZ);

** For Tape & Reel, add suffix Z (e.g. MP2212DNZ);

QFN10 (3mm x 3mm) SOIC8E

MP2212 Rev. 1.01 www.MonolithicPower.com 2

ELECTRICAL CHARACTERISTICS (5)

MP2212 Rev. 1.01 www.MonolithicPower.com 3

MP2212 Rev. 1.01 www.MonolithicPower.com 4

TYPICAL PERFORMANCE CHARACTERISTICS

MP2212 Rev. 1.01 www.MonolithicPower.com 5

TYPICAL PERFORMANCE CHARACTERISTICS

MP2212 Rev. 1.01 www.MonolithicPower.com 6

FUNCTIONAL BLOCK DIAGRAM

1.2 MEG 17pF

Figure 1Functional Block Diagram

MP2212 Rev. 1.01 www.MonolithicPower.com 7

MP2212 Rev. 1.01 www.MonolithicPower.com 8

MP2212 Rev. 1.01 www.MonolithicPower.com 9

Output Capacitor Selection PCB Layout Guide

Top Layer Inner Layer1

MP2212 Rev. 1.01 www.MonolithicPower.com 10

Inner Layer2 Bottom Layer

Top Layer Bottom Layer

TYPICAL APPLICATION CIRCUITS

Figure 45V VOUT Application Circuit with a 390pF Feed-forward Capacitor

MP2212 Rev. 1.01 www.MonolithicPower.com 11

Figure 5Typical Application Circuit of MP2212DQ

Figure6MP2212DQ with A VCC Generation Circuit

Figure 7 Typical Application Circuit of MP2212DN

MP2212 Rev. 1.01 www.MonolithicPower.com 12

TOP VIEW BOTTOM VIEW

PIN 1 ID OPTION A PIN 1 ID OPTION B

SIDE VIEW DETAIL A

RECOMMENDED LAND PATTERN

MP2212 Rev. 1.01 www.MonolithicPower.com 13

SOIC8E (EXPOSED PAD)

0.150(3.80) 0.228(5.80) 0.089(2.26)

TOP VIEW BOTTOM VIEW

SEE DETAIL "A"

FRONT VIEW 0.010(0.25)

MP2212 Rev. 1.01 www.MonolithicPower.com 14

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