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PCB STACK UP
6L Dis. & UMA SW9 (14") BLOCK DIAGRAM 01
27MHz
LAYER 1 : TOP
CPU HDMI CON
A
LAYER 2 : SGND A

nVIDIA (40nm) PAGE 20


DDRIII-SODIMM1 DDRIII 800/1066 MT/s
LAYER 3 : IN1 PCI-Express
1333MT/s CFD only Arrandale 45nm 16X
N11M-GE1 512MB
LAYER 4 : IN2 PAGE 12 CRT
processor
LAYER 5 : VCC
64 Bit PAGE 20
DDRIII-SODIMM2 DDRIII 800/1066 MT/s
PAGE 14~18
1333MT/s CFD only 533p Dual Link
LAYER 6 : BOT PAGE 13 PAGE 3~6 LCD CONN
PAGE 19
32.768KHz 25MHz
DMI LINK
HDMI Level Shifter
Chrontel CH7318C-BF-TR
SATA - HDD
SATA0 150MB PAGE 2
PAGE 25 CRT
LVDS
B
SATA - CD-ROM
SATA1 150MB B

14.318MHz
PAGE 25 CLOCK GEN Mini PCI-E Card x2
9LRS3197
Express Card x1
PCH PAGE 2

USB2.0 6,8,10
Ibex-M(Intel HM55) 0,1,2
UMA GPU CORE (RT8152A) SATA5 150MB 12 5 4
E-SATA
PAGE 31 USB2.0 Ports BlueTooth Webcam RTS5159
PAGE 26 PAGE 7~11 PAGE 21 PAGE 22 PAGE 19 PAGE 21
X2
SYSTEM POWER RT8206B
PAGE 32 PCI-E
X1 X1 X1
32.768KHz
VCCP +1.1VTT(RT8208A) AND PCH Mini PCI-E LAN Express
1.05V(RT8204) Card Atheros Card
PAGE 33 (Wireless LAN PCIE-LAN
C C
/ Robson) AR8131(M)
Keyboard PAGE 26 ENE KBC LPC PAGE 28
GagaLAN

CPU CORE ADP3212 Touch Pad PAGE 25 PAGE 24


PAGE 34 KB3926 C0 SIM Card
PAGE 28 25MHz

VGACORE(1.025V) RT8208A PAGE 27


PAGE 35 RJ45/RJ11
PAGE 24
GMT G9931P1U
DDR III SMDDR_VTERM SPI Azalia
SPI MDC CONN
1.5V/1.5VSUS(RT8207) FAN PAGE 27
PAGE 36 PAGE 26 PAGE 7 PAGE 23

SYSTEM CHARGER(ISL6251AHAZ-T)
PAGE 38 Analog
D ALC272 D

PAGE 22

AUDIO
PROJECT : SW9
microphone Audio Jacks Amplifier Jack to Quanta Computer Inc.
(Phone/ MIC) TPA6017A2 Speaker Size Document Number Rev
PAGE 22 Custom 1A
PAGE 22 PAGE 23 PAGE 23 Block Diagram
Date: W ednesday, December 02, 2009 Sheet 1 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+1.05V +VDDIO_CLK
L28
1 2
HCB1608KF-181T15_6 C640
C644
C643
C642
.1U/10V_4
.1U/10V_4
10U/6.3V_6S
*10U/6.3V_6S
02
Place each 0.1uF cap as close as CLOCK GENERATOR +3V

possible to each VDD IO pin. Place


the 10uF caps on the VDD_IO plane.
A R294 A
U17 *10K/F_4
+3V

C646 4.7U/6.3V_6 1 23 CLK_BUF_BCLK_P [8] CPU_SEL


C654 4.7U/6.3V_6 VDD_USB CPU-0 133 or 100 Mhz output to PCH
5 VDD_LCD CPU-0# 22 CLK_BUF_BCLK_N [8]
C652 .1U/10V_4 17
C641
C645
.1U/10V_4
.1U/10V_4
24
29
VDD_SRC
VDD_CPU RTM875N- CPU-1 20
19
R296
10K/F_4
C651 .1U/10V_4 VDD_REF CPU-1#
C653 .1U/10V_4
+VDDIO_CLK
632-GRT 3 96Mhz output for generate 48Mhz
DOT96T_LPR CLK_BUF_DREFCLK [8]
18 VDD_CPU_IO DOT96C_LPR 4 CLK_BUF_DREFCLK# [8] ( USB ) and 24 Mhz ( HDA )clk
15 VDD_SRC_IO
[8,12,13] CGDAT_SMB 31 SDATA SRC-1 13 CLK_BUF_PCIE_3GPLL [8]
[8,12,13] CGCLK_SMB 32 14 CLK_BUF_PCIE_3GPLL# [8] 100Mhz output for DMI reference clk
SCLK SRC-1#
0 1
+3V R273 10K/F_4 16 10 CLK_BUF_DREFSSCLK [8]
CLK_ICH_14M R295 33_4 CPU_SEL CPU_STOP# SATA 100Mhz output for SATA reference clk
[8] CLK_ICH_14M 30 REF_0/CPU_SEL SATA# 11 CLK_BUF_DREFSSCLK# [8]
C389 10P/50V_4
EMI 11/26 CK_PW RGD_R CLK_VGA_27M_NOSS R280 *33_4
25 CK_PWRGD/PD#_3.3 27MHz_nonSS 6
CLK_VGA_27M_SS
CLK_27M_NONSS [16] CPU0/1=133MHz CPU0/1=100MHz
7 R278 *33_4 CLK_27M_SS [16] CPU_SEL
Place the 33 ohm XTAL_OUT 27
27MHz_SS (default)
resistors close to the CK 505 XTAL_IN 28
XOUT
33
Discrete Only
9
XIN
VSS_SATA
QFN32 GND
VSS_REF 26 C647
2 VSS_USB VSS_CPU 21 18P/50V_4
8 12 EMI 11/26
VSS_LCD VSS_SRC

+3V RTM875N-632-VB-GRT
B B

R297
1K/F_4

CK_PW RGD_R
Y3
XTAL_IN 1 2XTAL_OUT
3

Q28
2N7002E
14.318MHZ
1

1
R298
[34] VR_PW RGD_CLKEN# 2 100K/F_4 C388 C387
33P/50V_4 33P/50V_4
2

2
1

MDC Hole.
PAD and HOLE MINI CARD Hole. H40
H-C236D62P2
H39
H-C236D62P2

C
CPU bracket Hole. C
H31 H7 H17 H11 H12 H36
H19 H20 H35 H34 *h-s276d118p2 *H-C236D162P2 *h-c315d118p2 *h-c315d118p2 *h-c315d118p2 H-C236D63P2 H6 H8 H2 H1
*h-c256d165p2 *h-c256d165p2 *h-c256d165p2 *h-c256d165p2 *H-C236D162P2 *H-C236D162P2 *H-C236D63P2 *H-C236D63P2

1
EMI capacitive
1

1
1

1
H5 AGND
*O-SW 9-4 +VIN C336 .1U/25V_4
H24 H9 H10 H21 H22 C481 .1U/25V_4
*H-c98d98n *O-sw9-2 *O-sw9-3 *O-sw9-5 *O-sw9-5 10/12 C565 .1U/25V_4
C570 .1U/25V_4
C572 .1U/25V_4
1

C637 .1U/25V_4
C638 .1U/25V_4
1

C639 .1U/25V_4

EMI C378 *.22U/10V_4

H37 H16 H13 H38 C350 *.22U/10V_4


H-C236D63P2 *h-c315d118p2 *h-c315d118p2 *H-C315D118P2
PAD2 PAD3 PAD6 PAD1 PAD7 PAD8 C374 *.22U/10V_4
VGA bracket Hole. 1 1 1 *EMI PAD *EMI PAD *PAD-RE406X157

+3V C31 *.1U/10V_4


MDC_SPRING MDC_SPRING MDC_SPRING C323 *.1U/10V_4
1

1
D D
C133 *.1U/10V_4
H14 H15 H3 H4 C427 *.1U/10V_4
*h-c256d165p2 *h-c256d165p2 PAD4 PAD5 *h-o110x130d110x130n *h-o039x102d39x102n
1 1
H32 H18 H33
*o-sw9-7 *h-c315d118p2 *o-sw9-6
MDC_SPRING MDC_SPRING PROJECT : SW9
Quanta Computer Inc.
1

1
Size Document Number Rev
1

Custom 1A
[7,8,9,11,27,31,33,34,39] +1.05V CLOCK & Screw Holes
[3,7,8,9,10,11,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V
Date: W ednesday, December 02, 2009 Sheet 2 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

DIS UMA

U22A
Ra
Rb
Rc
NA 0 ohm
0 ohm NA
0 ohm NA
03
PEG_ICOMPI B26 PEG_COMP R355 49.9/F_4
PEG_ICOMPO A26
[9] DMI_TXN0 A24 B27 U22B For ITP CLk
DMI_RX#[0] PEG_RCOMPO
[9] DMI_TXN1 C23 DMI_RX#[1] PEG_RBIAS A25 PEG_RBIAS R356 750/F_4 R77 20/F_4 H_COMP3 AT23
COMP3 BCLK A16 CLK_CPU_BCLK [10]
[9] DMI_TXN2 B22 PEG_RX#[0..15] [14] R76 20/F_4 H_COMP2 AT24 B16 CLK_CPU_BCLK# [10]
DMI_RX#[2] PEG_RX#0 R25 49.9/F_4 H_COMP1 G16 COMP2 BCLK#
A [9] DMI_TXN3 A21 DMI_RX#[3] PEG_RX#[0] K35 COMP1 MISC A
J34 PEG_RX#1 R79 49.9/F_4 H_COMP0 AT26 AR30
PEG_RX#[1] PEG_RX#2 COMP0 BCLK_ITP
[9] DMI_TXP0 B24 DMI_RX[0] PEG_RX#[2] J33 AH24 SKTOCC# BCLK_ITP# AT30 CLK_PCIE_3GPLL [8]
[9] DMI_TXP1 D23 G35 PEG_RX#3 CLK_PCIE_3GPLL# [8]
DMI_RX[1] PEG_RX#[3] PEG_RX#4
[9] DMI_TXP2 B23 DMI_RX[2] PEG_RX#[4] G32
PEG_RX#5 H_CATERR# AK14 CLOCKSPEG_CLK#
PEG_CLK E16 Rc
[9] DMI_TXP3 A22 F34 D16 R358 *0_4
DMI_RX[3] PEG_RX#[5] PEG_RX#6 CATERR#
PEG_RX#[6] F31
PEG_RX#7
[10] H_PECI AT15 PECI R357 3
Ra
D24 D35 AN26 THERMAL A18 4 0_4P2R
[9]
[9]
DMI_RXN0
DMI_RXN1 G24
F23
DMI_TX#[0]
DMI_TX#[1] DMI PEG_RX#[7]
PEG_RX#[8] E33
C33
PEG_RX#8
PEG_RX#9
[34] H_PROCHOT#
[10,27] PM_THRMTRIP# AK15
PROCHOT#
THERMTRIP#
DPLL_REF_SSCLK
DPLL_REF_SSCLK# A17
Rb
1 2
DREFSSCLK [8]
DREFSSCLK# [8]
[9] DMI_RXN2 DMI_TX#[2] PEG_RX#[9]
[9] DMI_RXN3 H23 D32 PEG_RX#10 R359 *0_4
DMI_TX#[3] PEG_RX#[10] PEG_RX#11 RESET_OBS#
PEG_RX#[11] B32 AP26 RESET_OBS# SM_DRAMRST# F6 DDR3_DRAMRST# [12]
[9] DMI_RXP0 D25 C31 PEG_RX#12 [9] PM_SYNC AL15
DMI_TX[0] PEG_RX#[12] PM_SYNC
[9] DMI_RXP1 F24 DMI_TX[1] PEG_RX#[13] B28 PEG_RX#13
PEG_RX#14 R363 0_4
AN14 VCCPWRGOOD_1 DDR3 SM_RCOMP[0] AL1 SM_RCOMP_0 R34 100/F_4
[9] DMI_RXP2 E23 DMI_TX[2] PEG_RX#[14] B30 [10] H_PW RGOOD AN27 VCCPWRGOOD_0 AM1 SM_RCOMP_1 R41 24.9/F_4
[9] DMI_RXP3 G23 DMI_TX[3] PEG_RX#[15] A31 PEG_RX#15 [9] PM_DRAM_PW RGD AK13 SM_DRAMPWROK MISC SM_RCOMP[1]
SM_RCOMP[2] AN1 SM_RCOMP_2 R35 130/F_4

1
PV R67 10K/F_4
PEG_RX[0..15] [14] +1.1V_VTT
J35 PEG_RX0 C426 H_PW RGD_XDP AM26 AN15 PM_EXT_TS#0 R69 0_4 PM_EXTTS#0 [12]
PEG_RX[0] T24 TAPPWRGOOD PM_EXT_TS#[0]
2.7GT/s data rate H34 PEG_RX1 33P/50V_4 AP15 PM_EXT_TS#1 R64 0_4 PM_EXTTS#1 [13]

2
PEG_RX[1] PEG_RX2 H_VTTPW RGD AM15 PM_EXT_TS#[1] R65 10K/F_4
[9] FDI_TXN[7:0] PEG_RX[2] H33 VTTPWRGOOD +1.1V_VTT
FDI_TXN0 E22 F35 PEG_RX3 [8,24,27,28,29] PLTRST# CPU_PLTRST# AL14
FDI_TXN1 FDI_TX#[0] PEG_RX[3] PEG_RX4 R51 1.5K/F_4 RSTIN#
D21 FDI_TX#[1] PEG_RX[4] G33 PRDY# AT28
FDI_TXN2 D19 E34 PEG_RX5 AP27 XDP_PREQ# T25
FDI_TXN3 FDI_TX#[2] PEG_RX[5] PEG_RX6 R60 750/F_4 PREQ# XDP_TCLK
FDI_TXN4
D18
G21
FDI_TX#[3] PEG_RX[6] F32
D34 PEG_RX7
PWR MANAGEMENT TCK AN28 T1
FDI_TXN5 FDI_TX#[4] PEG_RX[7] PEG_RX8 XDP_TMS
E19 F33 AP28
Intel(R) FDI

FDI_TX#[5] PEG_RX[8] TMS T4


FDI_TXN6 F21 B33 PEG_RX9
PCI EXPRESS -- GRAPHICS
FDI_TXN7 FDI_TX#[6] PEG_RX[9] PEG_RX10 XDP_TRST#
G18 D31 AT27

B [9] FDI_TXP[7:0]
FDI_TX#[7] PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
A32
C30
PEG_RX11
PEG_RX12
AJ22
AK22
BPM#[0]
BPM#[1]
JTAG & BPM TRST#

TDI AT29 XDP_TDI_R


T8

T22 B
FDI_TXP0 D22 A28 PEG_RX13 AK24 AR27 XDP_TDO_R T19
FDI_TXP1 FDI_TX[0] PEG_RX[13] PEG_RX14 BPM#[2] TDO
C21 FDI_TX[1] PEG_RX[14] B29 AJ24 BPM#[3] TDI_M AR29 XDP_TDI_M T21
FDI_TXP2 D20 A30 PEG_RX15 AJ25 AP29 XDP_TDO_M T20
FDI_TXP3 FDI_TX[2] PEG_RX[15] BPM#[4] TDO_M
C18 FDI_TX[3] PEG_TX#[0..15] [14] AH22 BPM#[5]
FDI_TXP4 G22 L33 C_PEG_TX#0 C494 .1U/10V_4 PEG_TX#0 AK23
FDI_TXP5 FDI_TX[4] PEG_TX#[0] C_PEG_TX#1 C491 .1U/10V_4 PEG_TX#1 BPM#[6]
E20 FDI_TX[5] PEG_TX#[1] M35 AH23 BPM#[7] DBR# AN25 XDP_DBRESET# [9]
FDI_TXP6 F20 M33 C_PEG_TX#2 C483 .1U/10V_4 PEG_TX#2
FDI_TXP7 FDI_TX[6] PEG_TX#[2] C_PEG_TX#3 C471 .1U/10V_4 PEG_TX#3 IC,AUB_CFD_rPGA,R1P0
G19 FDI_TX[7] PEG_TX#[3] M30
L31 C_PEG_TX#4 C470 .1U/10V_4 PEG_TX#4
PEG_TX#[4] C_PEG_TX#5 C466 .1U/10V_4 PEG_TX#5
[9] FDI_FSYNC0 F17 FDI_FSYNC[0] PEG_TX#[5] K32
E17 M29 C_PEG_TX#6 C467 .1U/10V_4 PEG_TX#6
[9] FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6]
J31 C_PEG_TX#7 C465 .1U/10V_4 PEG_TX#7
PEG_TX#[7] C_PEG_TX#8 C463 .1U/10V_4 PEG_TX#8
[9] FDI_INT C17 FDI_INT PEG_TX#[8] K29
H30 C_PEG_TX#9 C460 .1U/10V_4 PEG_TX#9
PEG_TX#[9] C_PEG_TX#10 C461 .1U/10V_4 PEG_TX#10
[9] FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29
D17 F29 C_PEG_TX#11 C455 .1U/10V_4 PEG_TX#11
[9] FDI_LSYNC1 FDI_LSYNC[1] PEG_TX#[11] +1.1V_VTT
E28 C_PEG_TX#12 C457 .1U/10V_4 PEG_TX#12
PEG_TX#[12] C_PEG_TX#13 C451 .1U/10V_4 PEG_TX#13
PEG_TX#[13] D29
D27 C_PEG_TX#14 C456 .1U/10V_4 PEG_TX#14 RESET_OBS# R168 *68
PEG_TX#[14] C_PEG_TX#15 C448 .1U/10V_4 PEG_TX#15
PEG_TX#[15] C26
Discrete Only L34 C_PEG_TX0 C492 .1U/10V_4 PEG_TX0
PEG_TX[0..15] [14]
XDP_TDO_R R430 51_4
JTAG MAPPING
R24 FDI_INT PEG_TX[0] C_PEG_TX1 C489 .1U/10V_4 PEG_TX1 H_CATERR# R369 49.9/F_4
PEG_TX[1] M34
R23 *0_4 FDI_FSYNC0 M32 C_PEG_TX2 C480 .1U/10V_4 PEG_TX2 H_PROCHOT# R368 68_4
*1K/F_4 R26 *0_4 FDI_FSYNC1 PEG_TX[2] C_PEG_TX3 C478 .1U/10V_4 PEG_TX3 CPU_PLTRST# R46 *68 XDP_TDI_M
PEG_TX[3] L30
R20 *0_4 FDI_LSYNC0 M31 C_PEG_TX4 C477 .1U/10V_4 PEG_TX4 XDP_TMS R62 *51
FDI_LSYNC1 PEG_TX[4] C_PEG_TX5 C468 .1U/10V_4 PEG_TX5 XDP_TDI_R R445 *51 R433
PEG_TX[5] K31
M28 C_PEG_TX6 C469 .1U/10V_4 PEG_TX6 XDP_PREQ# R85 *51
R19 FDI_FSYNC can PEG_TX[6] C_PEG_TX7 C462 .1U/10V_4 PEG_TX7
C PEG_TX[7] H31 C
*1K/F_4 gang all these K28 C_PEG_TX8 C464 .1U/10V_4 PEG_TX8 XDP_TCLK R61 *51 *0_4
PEG_TX[8] C_PEG_TX9 C458 .1U/10V_4 PEG_TX9
4 signals PEG_TX[9] G30
G29 C_PEG_TX10 C459 .1U/10V_4 PEG_TX10 XDP_TDO_M
together and PEG_TX[10]
F28 C_PEG_TX11 C452 .1U/10V_4 PEG_TX11
tie them with PEG_TX[11] C_PEG_TX12 C454 .1U/10V_4 PEG_TX12
PEG_TX[12] E27
only one 1K D28 C_PEG_TX13 C450 .1U/10V_4 PEG_TX13
resistor to GND PEG_TX[13] C_PEG_TX14 C453 .1U/10V_4 PEG_TX14 +3V XDP_TRST# R82 51_4
PEG_TX[14] C27
( Check list C25 C_PEG_TX15 C449 .1U/10V_4 PEG_TX15
PEG_TX[15] U8
1.0 ).

5
IC,AUB_CFD_rPGA,R1P0
R127
MC74VHC1G08DFT2G 2 Scan Chain STUFF -> R97, R89, R90
4 H_VTTPW RGD (Default) NO STUFF -> R84, R512
[19,27,31,32,33,35,36] HW PG 1
2K/F_4 R128 CPU Only STUFF -> R97, R84

3
+3VS5 1K/F_4 NO STUFF -> R89, R512, R90

R123 DRAM_PW G3 GMCH Only STUFF -> R512, R90


3K/F_4 NO STUFF -> R97, R84, R89
R182
3

1K/F_4
+1.5VSUS_CPU DRAM_PW G1 2 Q74
MMBT3904-7-F +1.5VSUS_CPU
R237
1

1.33K/F_4
2

DRAM_PW G4 1.1V
D
R33 D
976/F_4
3

R233
+1.1V_VTT 1K/F_4 DRAM_PW G2 2 Q75 1 3 PM_DRAM_PW RGD
MMBT3904-7-F
Use a voltage divider with VDDQ
1

Q73
R50 DTC144EUA
R38
3K/F_4
(1.5V) rail (ON in S3) and
resistor combination of 4.75K (to
PROJECT : SW9
3K/F_4 VDDQ)/12K(to GND) to generate the Quanta Computer Inc.
required voltage.
Note: CRB uses a 3.3V (always ON) Size Document Number Rev
[5,10,11,31,34,35] +1.1V_VTT rail with 2K and 1K combination. Custom 1A
[5,12,13,36,37,39] +1.5VSUS PROCESSER 1/4(HOST&PEX)
[2,7,8,9,10,11,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V
Date: W ednesday, December 02, 2009 Sheet 3 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3) 04


A [13] M_B_DQ[63:0] A
[12] M_A_DQ[63:0] U22C U22D
M_A_DQ0 A10 AA6 M_A_CLK0 [12] M_B_DQ0 B5 W8 M_B_CLK0 [13]
M_A_DQ1 C10 SA_DQ[0] SA_CK[0] M_B_DQ1 SB_DQ[0] SB_CK[0]
SA_DQ[1] SA_CK#[0] AA7 M_A_CLK0# [12] A5 SB_DQ[1] SB_CK#[0] W9 M_B_CLK0# [13]
M_A_DQ2 C7 P7 M_A_CKE0 [12] M_B_DQ2 C3 M3 M_B_CKE0 [13]
M_A_DQ3 SA_DQ[2] SA_CKE[0] M_B_DQ3 SB_DQ[2] SB_CKE[0]
A7 SA_DQ[3] B3 SB_DQ[3]
M_A_DQ4 B10 Y6 M_A_CLK1 [12] M_B_DQ4 E4 V7 M_B_CLK1 [13]
M_A_DQ5 D10 SA_DQ[4] SA_CK[1] M_B_DQ5 SB_DQ[4] SB_CK[1]
SA_DQ[5] SA_CK#[1] Y5 M_A_CLK1# [12] A6 SB_DQ[5] SB_CK#[1] V6 M_B_CLK1# [13]
M_A_DQ6 E10 P6 M_A_CKE1 [12] M_B_DQ6 A4 M2 M_B_CKE1 [13]
M_A_DQ7 SA_DQ[6] SA_CKE[1] M_B_DQ7 SB_DQ[6] SB_CKE[1]
A8 SA_DQ[7] C4 SB_DQ[7]
M_A_DQ8 D8 AE2 M_A_CS#0 [12] M_B_DQ8 D1 AB8 M_B_CS#0 [13]
M_A_DQ9 F10 SA_DQ[8] SA_CS#[0] M_B_DQ9 SB_DQ[8] SB_CS#[0]
SA_DQ[9] SA_CS#[1] AE8 M_A_CS#1 [12] D2 SB_DQ[9] SB_CS#[1] AD6 M_B_CS#1 [13]
M_A_DQ10 E6 M_B_DQ10 F2
M_A_DQ11 F7 SA_DQ[10] M_B_DQ11 SB_DQ[10]
SA_DQ[11] SA_ODT[0] AD8 M_A_ODT0 [12] F1 SB_DQ[11] SB_ODT[0] AC7 M_B_ODT0 [13]
M_A_DQ12 E9 AF9 M_A_ODT1 [12] M_B_DQ12 C2 AD1 M_B_ODT1 [13]
M_A_DQ13 B7 SA_DQ[12] SA_ODT[1] M_B_DQ13 SB_DQ[12] SB_ODT[1]
SA_DQ[13] M_A_DM[7:0] [12] F5 SB_DQ[13] M_B_DM[7:0] [13]
M_A_DQ14 E7 B9 M_A_DM0 M_B_DQ14 F3 D4 M_B_DM0
M_A_DQ15 C6 SA_DQ[14] SA_DM[0] SB_DQ[14] SB_DM[0]
SA_DQ[15] SA_DM[1] D7 M_A_DM1 M_B_DQ15 G4 SB_DQ[15] SB_DM[1] E1 M_B_DM1
M_A_DQ16 H10 H7 M_A_DM2 M_B_DQ16 H6 H3 M_B_DM2
M_A_DQ17 G8 SA_DQ[16] SA_DM[2] SB_DQ[16] SB_DM[2]
SA_DQ[17] SA_DM[3] M7 M_A_DM3 M_B_DQ17 G2 SB_DQ[17] SB_DM[3] K1 M_B_DM3
M_A_DQ18 K7 AG6 M_A_DM4 M_B_DQ18 J6 AH1 M_B_DM4
M_A_DQ19 SA_DQ[18] SA_DM[4] SB_DQ[18] SB_DM[4]
J8 SA_DQ[19] SA_DM[5] AM7 M_A_DM5 M_B_DQ19 J3 SB_DQ[19] SB_DM[5] AL2 M_B_DM5
M_A_DQ20 G7 AN10 M_A_DM6 M_B_DQ20 G1 AR4 M_B_DM6
SA_DQ[20] SA_DM[6] SB_DQ[20] SB_DM[6]

DDR SYSTEM MEMORY A


M_A_DQ21 G10 AN13 M_A_DM7 M_B_DQ21 G5 AT8 M_B_DM7

DDR SYSTEM MEMORY B


M_A_DQ22 SA_DQ[21] SA_DM[7] M_B_DQ22 SB_DQ[21] SB_DM[7]
J7 SA_DQ[22] M_A_DQS#[7:0] [12] J2 SB_DQ[22] M_B_DQS#[7:0] [13]
M_A_DQ23 J10 C9 M_A_DQS#0 M_B_DQ23 J1 D5 M_B_DQS#0
M_A_DQ24 SA_DQ[23] SA_DQS#[0] M_A_DQS#1 M_B_DQ24 SB_DQ[23] SB_DQS#[0] M_B_DQS#1
L7 SA_DQ[24] SA_DQS#[1] F8 J5 SB_DQ[24] SB_DQS#[1] F4
M_A_DQ25 M6 J9 M_A_DQS#2 M_B_DQ25 K2 J4 M_B_DQS#2
M_A_DQ26 M8 SA_DQ[25] SA_DQS#[2] SB_DQ[25] SB_DQS#[2]
SA_DQ[26] SA_DQS#[3] N9 M_A_DQS#3 M_B_DQ26 L3 SB_DQ[26] SB_DQS#[3] L4 M_B_DQS#3
B M_A_DQ27 L9 AH7 M_A_DQS#4 M_B_DQ27 M1 AH2 M_B_DQS#4 B
M_A_DQ28 SA_DQ[27] SA_DQS#[4] SB_DQ[27] SB_DQS#[4]
L6 SA_DQ[28] SA_DQS#[5] AK9 M_A_DQS#5 M_B_DQ28 K5 SB_DQ[28] SB_DQS#[5] AL4 M_B_DQS#5
M_A_DQ29 K8 AP11 M_A_DQS#6 M_B_DQ29 K4 AR5 M_B_DQS#6
M_A_DQ30 N8 SA_DQ[29] SA_DQS#[6] SB_DQ[29] SB_DQS#[6]
SA_DQ[30] SA_DQS#[7] AT13 M_A_DQS#7 M_B_DQ30 M4 SB_DQ[30] SB_DQS#[7] AR8 M_B_DQS#7
M_A_DQ31 P9 M_A_DQS[7:0] [12] M_B_DQ31 N5 M_B_DQS[7:0] [13]
M_A_DQ32 AH5 SA_DQ[31] SB_DQ[31]
SA_DQ[32] SA_DQS[0] C8 M_A_DQS0 M_B_DQ32 AF3 SB_DQ[32] SB_DQS[0] C5 M_B_DQS0
M_A_DQ33 AF5 F9 M_A_DQS1 M_B_DQ33 AG1 E3 M_B_DQS1
M_A_DQ34 AK6 SA_DQ[33] SA_DQS[1] SB_DQ[33] SB_DQS[1]
SA_DQ[34] SA_DQS[2] H9 M_A_DQS2 M_B_DQ34 AJ3 SB_DQ[34] SB_DQS[2] H4 M_B_DQS2
M_A_DQ35 AK7 M9 M_A_DQS3 M_B_DQ35 AK1 M5 M_B_DQS3
M_A_DQ36 AF6 SA_DQ[35] SA_DQS[3] SB_DQ[35] SB_DQS[3]
SA_DQ[36] SA_DQS[4] AH8 M_A_DQS4 M_B_DQ36 AG4 SB_DQ[36] SB_DQS[4] AG2 M_B_DQS4
M_A_DQ37 AG5 AK10 M_A_DQS5 M_B_DQ37 AG3 AL5 M_B_DQS5
M_A_DQ38 AJ7 SA_DQ[37] SA_DQS[5] SB_DQ[37] SB_DQS[5]
SA_DQ[38] SA_DQS[6] AN11 M_A_DQS6 M_B_DQ38 AJ4 SB_DQ[38] SB_DQS[6] AP5 M_B_DQS6
M_A_DQ39 AJ6 AR13 M_A_DQS7 M_B_DQ39 AH4 AR7 M_B_DQS7
M_A_DQ40 AJ10 SA_DQ[39] SA_DQS[7] M_B_DQ40 SB_DQ[39] SB_DQS[7]
SA_DQ[40] M_A_A[15:0] [12] AK3 SB_DQ[40] M_B_A[15:0] [13]
M_A_DQ41 AJ9 Y3 M_A_A0 M_B_DQ41 AK4 U5 M_B_A0
M_A_DQ42 AL10 SA_DQ[41] SA_MA[0] M_A_A1 M_B_DQ42 SB_DQ[41] SB_MA[0] M_B_A1
SA_DQ[42] SA_MA[1] W1 AM6 SB_DQ[42] SB_MA[1] V2
M_A_DQ43 AK12 AA8 M_A_A2 M_B_DQ43 AN2 T5 M_B_A2
M_A_DQ44 AK8 SA_DQ[43] SA_MA[2] M_A_A3 M_B_DQ44 SB_DQ[43] SB_MA[2] M_B_A3
SA_DQ[44] SA_MA[3] AA3 AK5 SB_DQ[44] SB_MA[3] V3
M_A_DQ45 AL7 V1 M_A_A4 M_B_DQ45 AK2 R1 M_B_A4
M_A_DQ46 AK11 SA_DQ[45] SA_MA[4] M_A_A5 M_B_DQ46 SB_DQ[45] SB_MA[4] M_B_A5
SA_DQ[46] SA_MA[5] AA9 AM4 SB_DQ[46] SB_MA[5] T8
M_A_DQ47 AL8 V8 M_A_A6 M_B_DQ47 AM3 R2 M_B_A6
M_A_DQ48 AN8 SA_DQ[47] SA_MA[6] M_A_A7 M_B_DQ48 SB_DQ[47] SB_MA[6] M_B_A7
SA_DQ[48] SA_MA[7] T1 AP3 SB_DQ[48] SB_MA[7] R6
M_A_DQ49AM10 Y9 M_A_A8 M_B_DQ49 AN5 R4 M_B_A8
M_A_DQ50 AR11 SA_DQ[49] SA_MA[8] M_A_A9 M_B_DQ50 SB_DQ[49] SB_MA[8] M_B_A9
SA_DQ[50] SA_MA[9] U6 AT4 SB_DQ[50] SB_MA[9] R5
M_A_DQ51 AL11 AD4 M_A_A10 M_B_DQ51 AN6 AB5 M_B_A10
M_A_DQ52 AM9 SA_DQ[51] SA_MA[10] M_A_A11 M_B_DQ52 SB_DQ[51] SB_MA[10] M_B_A11
SA_DQ[52] SA_MA[11] T2 AN4 SB_DQ[52] SB_MA[11] P3
M_A_DQ53 AN9 U3 M_A_A12 M_B_DQ53 AN3 R3 M_B_A12
M_A_DQ54 AT11 SA_DQ[53] SA_MA[12] M_A_A13 M_B_DQ54 SB_DQ[53] SB_MA[12] M_B_A13
SA_DQ[54] SA_MA[13] AG8 AT5 SB_DQ[54] SB_MA[13] AF7
M_A_DQ55 AP12 T3 M_A_A14 M_B_DQ55 AT6 P5 M_B_A14
M_A_DQ56AM12 SA_DQ[55] SA_MA[14] M_A_A15 M_B_DQ56 SB_DQ[55] SB_MA[14] M_B_A15
C SA_DQ[56] SA_MA[15] V9 AN7 SB_DQ[56] SB_MA[15] N1 C
M_A_DQ57 AN12 M_B_DQ57 AP6
M_A_DQ58AM13 SA_DQ[57] M_B_DQ58 SB_DQ[57]
SA_DQ[58] AP8 SB_DQ[58]
M_A_DQ59 AT14 M_B_DQ59 AT9
M_A_DQ60 AT12 SA_DQ[59] M_B_DQ60 SB_DQ[59]
SA_DQ[60] AT7 SB_DQ[60]
M_A_DQ61 AL13 M_B_DQ61 AP9
M_A_DQ62 AR14 SA_DQ[61] M_B_DQ62 SB_DQ[61]
SA_DQ[62] AR10 SB_DQ[62]
M_A_DQ63 AP14 M_B_DQ63 AT10
SA_DQ[63] SB_DQ[63]

[12] M_A_BS#0 AC3 SA_BS[0] [13] M_B_BS#0 AB1 SB_BS[0]


[12] M_A_BS#1 AB2 SA_BS[1] [13] M_B_BS#1 W5 SB_BS[1]
[12] M_A_BS#2 U7 SA_BS[2] [13] M_B_BS#2 R7 SB_BS[2]

[12] M_A_CAS# AE1 SA_CAS# [13] M_B_CAS# AC5 SB_CAS#


[12] M_A_RAS# AB3 SA_RAS# [13] M_B_RAS# Y7 SB_RAS#
[12] M_A_W E# AE9 SA_WE# [13] M_B_W E# AC6 SB_WE#
IC,AUB_CFD_rPGA,R1P0 IC,AUB_CFD_rPGA,R1P0

D D

PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
PROCESSER 2/4(DDR)
Date: W ednesday, December 02, 2009 Sheet 4 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+VCORE
3/25

C485
C513
C523
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
AG35
AG34
AG33
U22F
VCC1
VCC2
VCC3
VTT0_1
VTT0_2
VTT0_3
AH14
AH12
AH11 C522
C509
10U/6.3V_8
10U/6.3V_8
+1.1V_VTT
Rc
DIS
NA
UMA
4.7K
05
AG32 AH10
C503 10U/6.3V_8 AG31
VCC4 VTT0_4
J14 C482 10U/6.3V_8 Rd NA 0 ohm
C504 10U/6.3V_8 VCC5 VTT0_5 C39 10U/6.3V_8
AG30 J13
C502 10U/6.3V_8 AG29
VCC6 VTT0_6
H14 C33 10U/6.3V_8 U22G Re NA 0 ohm
C500 10U/6.3V_8 VCC7 VTT0_7 C446 10U/6.3V_8
AG28 H12
A C501 10U/6.3V_8 AG27
VCC8 VTT0_8
G14 C32 10U/6.3V_8 AT21
Rf NA NA A
C484 10U/6.3V_8 VCC9 VTT0_9 C967 22U VAXG1

SENSE
LINES
AG26 VCC10 VTT0_10 G13 AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE [31]
C487 10U/6.3V_8 AF35 G12 C38 22U AT18 AT22 VSS_AXG_SENSE [31]
C488 10U/6.3V_8 VCC11 VTT0_11 C443 22U Please note that +VCC_GFX_CORE VAXG3 VSSAXG_SENSE
AF34 VCC12 VTT0_12 G11 AT16 VAXG4
AF33 F14 C476 10U_NC should be 1.05V in Auburndale AR21
C519 .1U/10V_4 VCC13 VTT0_13 C486 10U_NC VAXG5
AF32 VCC14 VTT0_14 F13 AR19 VAXG6
C520 .1U/10V_4 AF31 F12 AR18

GRAPHICS VIDs
VCC15 VTT0_15 VAXG7
AF30 VCC16 VTT0_16 F11 AR16 VAXG8 GFX_VID[0] AM22 GFXVR_VID_0 [31]
AF29 VCC17 VTT0_17 E14 AP21 VAXG9 GFX_VID[1] AP22 GFXVR_VID_1 [31]
AF28 VCC18 VTT0_18 E12 AP19 VAXG10 GFX_VID[2] AN22 GFXVR_VID_2 [31]
AF27 VCC19 VTT0_19 D14 AP18 VAXG11 GFX_VID[3] AP23 GFXVR_VID_3 [31]
AF26 VCC20 VTT0_20 D13 AP16 VAXG12 GFX_VID[4] AM23 GFXVR_VID_4 [31]
AD35 VCC21 VTT0_21 D12 AN21 VAXG13 GFX_VID[5] AP24 GFXVR_VID_5 [31]
AD34 D11 AN19 AN24

1.1V RAIL POWER


VCC22 VTT0_22 VAXG14 GFX_VID[6] GFXVR_VID_6 [31]

GRAPHICS
AD33 C14 AN18 PV
VCC23 VTT0_23 VAXG15 GFXVR_EN
AD32 VCC24 VTT0_24 C13 AN16 VAXG16 Rc R94 470/F_4
AD31 VCC25 VTT0_25 C12 AM21 VAXG17 GFX_VR_EN AR25 GFXVR_EN [31]
AD30 C11 AM19 AT25 Rd R93 0_4 GFXVR_DPRSLPVR [31]
VCC26 VTT0_26 VAXG18 GFX_DPRSLPVR R92 0_4
AD29 VCC27 VTT0_27 B14 AM18 VAXG19 GFX_IMON AM24 Re R91
GFXVR_IMON [31]
AD28 VCC28 VTT0_28 B12 +VGACORE_UMA AM16 VAXG20 Rf
AD27 A14 C306 22U AL21 *1K/F_4
VCC29 VTT0_29 C123 22U VAXG21
AD26 VCC30 VTT0_30 A13 AL19 VAXG22
AC35 A12 C124 10U/6.3V_8 AL18
VCC31 VTT0_31 C125 10U/6.3V_8 VAXG23
AC34 VCC32 VTT0_32 A11 AL16 VAXG24
AC33 VCC33 AK21 VAXG25 VDDQ1 AJ1

- 1.5V RAILS
AC32 AK19 AF1 C52 1U/6.3V_4
VCC34 VAXG26 VDDQ2 C49 1U/6.3V_4
AC31 VCC35 AK18 VAXG27 VDDQ3 AE7
AC30 AF10 +1.1V_VTT AK16 AE4 C54 1U/6.3V_4
VCC36 VTT0_33 C445 22U VAXG28 VDDQ4 C45 1U/6.3V_4

POWER
AC29 VCC37 VTT0_34 AE10 AJ21 VAXG29 VDDQ5 AC1
AC28 AC10 C442 22U AJ19 AB7 C46 1U/6.3V_4 +1.5VSUS_CPU +1.5VSUS
B VCC38 VTT0_35 VAXG30 VDDQ6 B
CPU CORE SUPPLY

AC27 AB10 AJ18 AB4 C42 22U


VCC39 VTT0_36 VAXG31 VDDQ7 C43 22U R804 *0_8
AC26 Y10 AJ16 Y1
VCC40 VTT0_37 DIS UMA VAXG32 VDDQ8 C40 *330u_2.5V_7343 R805 *0_8

+
AA35 VCC41 VTT0_38 W10 AH21 VAXG33 VDDQ9 W7
AA34 VCC42 VTT0_39 U10 VTT Rail Values are Ra 0 ohm NA AH19 VAXG34 VDDQ10 W4
AA33 T10 AH18 U1
AA32
VCC43 VTT0_40
J12
Auburndal VTT=1.05V AH16
VAXG35 VDDQ11
T7
VCC44 VTT0_41 VAXG36 VDDQ12

D
Clarksfield VTT=1.1V
POWER

AA31 VCC45 VTT0_42 J11


R83
Ra *0_4 VDDQ13 T4 3
AA30 VCC46 VTT0_43 J16 VDDQ14 P1 2 5
AA29 J15 N7 1

DDR3
VCC47 VTT0_44 VDDQ15
AA28 7/22 N4

G
VCC48 VDDQ16 C788
AA27 VCC49 VDDQ17 L1

FDI
AA26 AN33 H_PSI# [34] +1.1V_VTT J24 H1 10/05 .1U/25V_4

4
VCC50 PSI# C496 22U VTT1_45 VDDQ18 Q3
Y35 VCC51 J23 VTT1_46
Y34 C441 22U H25 [37] MAIND AON6426L
VCC52 VTT1_47
Y33 VCC53 VID[0] AK35 CPU_VID0 [34]
Y32 VCC54 VID[1] AK33 CPU_VID1 [34]
Y31 VCC55 VID[2] AK34 CPU_VID2 [34] VTT0_59 P10 +1.1V_VTT
Y30 AL35 CPU_VID3 [34] +1.1V_VTT K26 N10 C505 10U/6.3V_8
VCC56 VID[3] VTT1_48 VTT0_60

PEG & DMI


Y29 AL33 C35 22U J27 L10 C521 10U/6.3V_8
CPU VIDS

VCC57 VID[4] CPU_VID4 [34] VTT1_49 VTT0_61


Y28 AM33 CPU_VID5 [34] C493 22U J26 K10 C447 22U
VCC58 VID[5] C36 22U VTT1_50 VTT0_62 C490 22U
Y27 AM35 CPU_VID6 [34] J25 J22

1.1V
VCC59 VID[6] C475 22U VTT1_51 VTT1_63
Y26 VCC60 PROC_DPRSLPVR AM34 DPRSLPVR [34] H27 VTT1_52 VTT1_64 J20
V35 VCC61 G28 VTT1_53 VTT1_65 J18
V34 VCC62 G27 VTT1_54 VTT1_66 H21
V33 VCC63 G26 VTT1_55 VTT1_67 H20
V32 VCC64 VTT_SELECT G15 H_VTTVID1 [35] F26 VTT1_56 VTT1_68 H19
V31 VCC65 E26 VTT1_57
V30 VCC66 H_VTTVID1=Low, 1.1V E25 VTT1_58
V29 L26 +1.8V

1.8V
C VCC67 H_VTTVID1=High, 1.05V VCCPLL1 C
V28 L27 C474 22U
VCC68 VCCPLL2 C495 4.7U/6.3V_6
V27 VCC69 VCCPLL3 M26
V26 C497 2.2U/6.3V_6 +1.5VSUS_CPU
VCC70 C472 1U/6.3V_4
U35 VCC71
U34 IC,AUB_CFD_rPGA,R1P0 C473 1U/6.3V_4
VCC72
U33 AN35
SENSE LINES

VCC73 ISENSE I_MON [34]


U32 C635 .1U/25V_4
VCC74 R9
U31 VCC75 VTT_SENSE B15 VTT_SENSE [35] 10/12
U30 A15 C636 .1U/25V_4 220_8
VCC76 VSS_SENSE_VTT
U29 VCC77
U28 VCC78
U27 R378 100/F_4 +VCORE
VCC79 DS_1.5VS
U26 VCC80 VCC_SENSE AJ34 VCCSENSE [34]
R35 VCC81 VSS_SENSE AJ35 VSSSENSE [34]

3
R34 VCC82
R33 R379 100/F_4
VCC83
R32 VCC84
R31 CPU_VID0 R399 1K/F_4 +1.1V_VTT [12,37] MAINON_G 2
VCC85 R382 *1K/F_4 Q31
R30 VCC86
R29 CPU_VID1 R400 1K/F_4 BSS138
VCC87 R383 *1K/F_4
R28 VCC88
R27 CPU_VID2 R406 1K/F_4

1
VCC89 R409 *1K/F_4
R26 VCC90
P35 CPU_VID3 R405 *1K/F_4
VCC91 R408 1K/F_4
P34 VCC92
P33 CPU_VID4 R412 *1K/F_4
VCC93 R416 1K/F_4
P32 VCC94
P31 CPU_VID5 R429 1K/F_4
VCC95 R425 *1K/F_4
D P30 VCC96 D
P29 CPU_VID6 R411 *1K/F_4
VCC97 R415 1K/F_4
P28 VCC98
P27 DPRSLPVR R420 1K/F_4
VCC99 R423 *1K/F_4
P26 VCC100 H_PSI# R417 *1K/F_4
IC,AUB_CFD_rPGA,R1P0 R419 1K/F_4
PROJECT : SW9
HFM_VID : Max 1.4V
Quanta Computer Inc.
LFM_VID : Min 0.65V [34] +VCORE
[3,10,11,31,34,35] +1.1V_VTT Size Document Number Rev
Custom 1A
[12,13,36,37,39] +1.5VSUS PROCESSER 3/4(POWER)
[10,11,33,37,39] +1.8V
Date: W ednesday, December 02, 2009 Sheet 5 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)


U22H U22I
AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)
U22E
06
K27 VSS161
AT20 VSS1 VSS81 AE34 K9 VSS162 [12] DDR_VREF_DQ0 J17 SA_DIMM_VREF RSVD_NCTF_41 AT2
AT17 VSS2 VSS82 AE33 K6 VSS163 [13] DDR_VREF_DQ1 H17 SB_DIMM_VREF RSVD_NCTF_42 AT3
AR31 VSS3 VSS83 AE32 K3 VSS164 RSVD_NCTF_43 AR1
A AR28 AE31 J32 CFG0 AM30 AL28 A
VSS4 VSS84 VSS165 CFG[0] RSVD45
AR26 VSS5 VSS85 AE30 J30 VSS166 AM28 CFG[1] RSVD46 AL29
AR24 VSS6 VSS86 AE29 J21 VSS167 AP31 CFG[2] RSVD47 AP30
AR23 AE28 J19 CFG3 AL32 AP32
VSS7 VSS87 VSS168 CFG4 CFG[3] RSVD48
AR20 VSS8 VSS88 AE27 H35 VSS169 AL30 CFG[4] RSVD49 AL27
AR17 VSS9 VSS89 AE26 H32 VSS170 AM31 CFG[5] RSVD50 AT31
AR15 VSS10 VSS90 AE6 H28 VSS171 AN29 CFG[6]
AR12 AD10 H26 CFG7 AM32 AT32
VSS11 VSS91 VSS172 CFG[7] RSVD51
AR9 VSS12 VSS92 AC8 H24 VSS173 AK32 CFG[8] RSVD52 AP33
AR6 VSS13 VSS93 AC4 H22 VSS174 AK31 CFG[9] RSVD53 AR33
AR3 VSS14 VSS94 AC2 H18 VSS175 AK28 CFG[10] RSVD_NCTF_54 AT33
AP20 VSS15 VSS95 AB35 H15 VSS176 AJ28 CFG[11] RSVD_NCTF_55 AT34
AP17 VSS16 VSS96 AB34 H13 VSS177 AN30 CFG[12] RSVD_NCTF_56 AP35
AP13 VSS17 VSS97 AB33 H11 VSS178 AN32 CFG[13] RSVD_NCTF_57 AR35
AP10 VSS18 VSS98 AB32 H8 VSS179 AJ32 CFG[14] RSVD58 AR32
AP7 VSS19 VSS99 AB31 H5 VSS180 AJ29 CFG[15] RSVD_TP_59 E15
AP4 VSS20 VSS100 AB30 H2 VSS181 AJ30 CFG[16] RSVD_TP_60 F15
AP2 VSS21 VSS101 AB29 G34 VSS182 AK30 CFG[17]
AN34 VSS22 VSS102 AB28 G31 VSS183 H16 RSVD_TP_86 KEY A2
AN31 VSS23 VSS103 AB27 G20 VSS184 RSVD62 D15
AN23 VSS24 VSS104 AB26 G9 VSS185 AP25 RSVD1 RSVD63 C15
AN20 VSS25 VSS105 AB6 G6 VSS186 AL25 RSVD2 RSVD64 AJ15 RSVD64_R R63 0_4
AN17 AA10 G3 AL24 AH15 RSVD65_R R39 0_4

RESERVED
VSS26 VSS106 VSS187 RSVD3 RSVD65
AM29 VSS27 VSS107 Y8 F30 VSS188 AL22 RSVD4 RSVD_TP_66 AA5
AM27 VSS28 VSS108 Y4 F27 VSS189 AJ33 RSVD5 RSVD_TP_67 AA4
AM25 VSS29 VSS109 Y2 F25 VSS190 AG9 RSVD6 RSVD_TP_68 R8
AM20 VSS30 VSS110 W35 F22 VSS191 M27 RSVD7 RSVD_TP_69 AD3
AM17 VSS31 VSS111 W34 F19 VSS192 L28 RSVD8 RSVD_TP_70 AD2
AM14 VSS32 VSS112 W33 F16 VSS193
B AM11 VSS33 VSS113 W32 E35 VSS194 G25 RSVD11 RSVD_TP_71 AA2 B
AM8 VSS34 VSS114 W31 E32 VSS195 G17 RSVD12 RSVD_TP_72 AA1
AM5 VSS35 VSS115 W30 E29 VSS196 E31 RSVD13 RSVD_TP_73 R9
AM2 VSS36 VSS116 W29 E24 VSS197 E30 RSVD14 RSVD_TP_74 AG7
AL34 W28 E21 B19 AE3
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
E18
E13
VSS198
VSS199
VSS200
VSS R21 0_4 TP_RSVD17_R
A19
A20
RSVD15
RSVD16
RSVD17
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
V4
V5
AL20 W6 E11 R22 0_4 TP_RSVD18_R B20 N2
VSS40 VSS120 VSS201 RSVD18 RSVD_TP_78
AL17 VSS41 VSS121 V10 E8 VSS202 U9 RSVD19 RSVD_TP_79 AD5
AL12 VSS42 VSS122 U8 E5 VSS203 T9 RSVD20 RSVD_TP_80 AD7
AL9 VSS43 VSS123 U4 E2 VSS204
AL6 VSS44 VSS124 U2 D33 VSS205 AC9 RSVD21 RSVD_TP_81 W3
AL3 VSS45 VSS125 T35 D30 VSS206 AB9 RSVD22 RSVD_TP_82 W2
AK29 VSS46 VSS126 T34 D26 VSS207 C1 RSVD_NCTF_23 RSVD_TP_83 N3
AK27 VSS47 VSS127 T33 D9 VSS208 A3 RSVD_NCTF_24 RSVD_TP_84 AE5
AK25 VSS48 VSS128 T32 D6 VSS209 J29 RSVD26 RSVD_TP_85 AD9
AK20 VSS49 VSS129 T31 D3 VSS210 J28 RSVD27
AK17 VSS50 VSS130 T30 C34 VSS211 A34 RSVD_NCTF_28
AJ31 VSS51 VSS131 T29 C32 VSS212 A33 RSVD_NCTF_29
AJ23 VSS52 VSS132 T28 C29 VSS213 C35 RSVD_NCTF_30 VSS AP34
AJ20 VSS53 VSS133 T27 C28 VSS214
AJ17 VSS54 VSS134 T26 C24 VSS215 B35 RSVD_NCTF_31
AJ14 VSS55 VSS135 T6 C22 VSS216 AJ13 RSVD32
AJ11 VSS56 VSS136 R10 C20 VSS217 AJ12 RSVD33
AJ8 VSS57 VSS137 P8 C19 VSS218 AH25 RSVD34
AJ5 VSS58 VSS138 P4 C16 VSS219 AK26 RSVD35
AJ2 VSS59 VSS139 P2 B31 VSS220 AL26 RSVD36
AH35 VSS60 VSS140 N35 B25 VSS221 AR2 RSVD_NCTF_37
AH34 VSS61 VSS141 N34 B21 VSS222 AJ26 RSVD38
C AH33 VSS62 VSS142 N33 B18 VSS223 AJ27 RSVD39 C
AH32 VSS63 VSS143 N32 B17 VSS224 AP1 RSVD_NCTF_40
AH31 VSS64 VSS144 N31 B13 VSS225
AH30 N30 B11 IC,AUB_CFD_rPGA,R1P0
VSS65 VSS145 VSS226
AH29 VSS66 VSS146 N29 B8 VSS227
AH28 VSS67 VSS147 N28 B6 VSS228
AH27 VSS68 VSS148 N27 B4 VSS229
AH26 VSS69 VSS149 N26 A29 VSS230
AH20 VSS70 VSS150 N6 A27 VSS231
AH17 VSS71 VSS151 M10 A23 VSS232
AH13 VSS72 VSS152 L35 A9 VSS233
AH9 VSS73 VSS153 L32
AH6 VSS74 VSS154 L29 AT35 VSS_NCTF1
AH3 VSS75 VSS155 L8 AT1 VSS_NCTF2
AG10 L5 AR34
NCTF

VSS76 VSS156 VSS_NCTF3


AF8 VSS77 VSS157 L2 B34 VSS_NCTF4
AF4 VSS78 VSS158 K34 B2 VSS_NCTF5
AF2 VSS79 VSS159 K33 B1 VSS_NCTF6
AE35 VSS80 VSS160 K30 A35 VSS_NCTF7 CFG0 R59 *3.01K/F_4
IC,AUB_CFD_rPGA,R1P0 CFG3 R40 3.01K/F_4
IC,AUB_CFD_rPGA,R1P0 CFG4 R45 *3.01K/F_4 For discrete only
CFG7 R52 *3.01K/F_4

1 0
CFG[ 1:0 ] - PCI_Epress Configuration Select
D CFG4 Enabled; An external Display port * 11= 1 x 16 PEG D
(Display Port Disabled; No Physical Display Port device is connected to the Embedded * 10= 2 x 8 PEG
Presence) attached to Embedded Diplay Port Display port
The Clarkfield processor's PCI Express interface may
not meet PCI Express 2.0 jitter specifications. Intel CFG0
recommends placing a 3.01K +/- 5% pull down resistor to (PCI-Epress Single PEG Bifurcation enabled
PROJECT : SW9
VSS on CFG[7] pin for both rPGA and BGA components.
This pull down resistor should be removed when this
Configuration Select) Quanta Computer Inc.
issue is fixed. CFG3
Normal Operation Lane Numbers Reversed Size Document Number Rev
(PCI-Epress Static Custom
PROCESSER 4/4(GND) 1A
Lane Reversal) 15 -> 0 , 14 -> 1
Date: W ednesday, December 02, 2009 Sheet 6 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

INTVRMEN - Integrated SUS 1.1V VRM Enable


High - Enable Internal VRs

C582 18P/50V_4
UMA LVDS & CRT signals 07
2
IBEX PEAK-M (HDA,JTAG,SATA) IBEX PEAK-M (LVDS,DDI)
1
A Y6 R506 A
U29D
32.768KHZ 10M_4 U29A

[17,19] LVDS_BLON R118 0_4 LVDS_BLON_PCH T48 Ibex-M SDVO_TVCLKINN BJ46


3
4

RTC_X1 R117 0_4 DISP_ON_PCH L_BKLTEN


B13 RTCX1 Ibex-M FWH0 / LAD0 D33 LAD0 [27,28] [17,19] DISP_ON T47 L_VDD_EN 4 OF 10 SDVO_TVCLKINP BG46
C583 18P/50V_4 RTC_X2 D13 1 OF 10 B33
RTCX2 FWH1 / LAD1 LAD1 [27,28]
C32 R119 0_4 DPST_PW M_PCH Y48 BJ48
LPC FWH2 / LAD2
FWH3 / LAD3 A32
LAD2
LAD3
[27,28]
[27,28]
[17,19] DPST_PW M L_BKLTCTL SDVO_STALLN
SDVO_STALLP BG48
RTC_RST# C14 C34 [17,19] EDIDCLK R122 0_4 EDIDCLK_PCH AB48
RTCRST# FWH4 / LFRAME# LFRAME# [27,28] L_DDC_CLK
A34 [17,19] EDIDDATA R96 0_4 EDIDDATA_PCH Y45 BF45
SRTC_RST# LDRQ0# R196 10K/F_4 L_DDC_DATA SDVO_INTN
D17 F34 SDVO BH45
SRTCRST# RTC (+3V) LDRQ1# / GPIO23
SERIRQ AB9
+3V
SERIRQ [27] R121 10K/F_4 L_CTRL_CLK AB46 L_CTRL_CLK
SDVO_INTP
SM_INTRUDER# A16 R120 10K/F_4 L_CTRL_DATA V48 T51 DPB_CTRL_CLK
INTRUDER#
AK7
SATA HDD1
SATA_RXN0_C [25]
+3V L_CTRL_DATA SDVO_CTRLCLK
T53 DPB_CTRL_DATA
R510 330K_6 PCH_INVRMEN SATA0RXN R132 2.37K/F_4 LVDS_IBG SDVO_CTRLDATA
+RTC_CELL A14 INTVRMEN SATA0RXP AK6 SATA_RXP0_C [25] AP39 LVD_IBG
AK11 SATA_TXN0 [25] LVDS_VBG AP41 BG44 TP7
SATA0TXN TP1 LVD_VBG DDPB_AUXN TP8
SATA0TXP AK9 SATA_TXP0 [25] DDPB_AUXP BJ44

DISPLAY PORT B
AT43 AU38 DPB_HPD_Q
ACZ_BCLK LVD_VREFH DDPB_HPD
A30 HDA_BCLK SATA1RXN AH6 SATA_RXN1_C [25] AT42 LVD_VREFL
ACZ_SYNC D29 AH5 SATA_RXP1_C [25] BD42 DPB_LANE0_N
HDA_SYNC SATA1RXP DDPB_0N DPB_LANE0_P
[10,22] SPKR P1 AH9 SATA_TXN1 [25] LVDS--A BC42

Digital Display Interface


ACZ_RST# SPKR SATA1TXN DDPB_0P DPB_LANE1_N
C30 HDA_RST# SATA1TXP AH8 SATA_TXP1 [25] [19] LA_CLK# AV53 LVDSA_CLK# DDPB_1N BJ42
[22] ACZ_SDIN0 G30 [19] LA_CLK AV51 BG42 DPB_LANE1_P
HDA_SDIN0 LVDSA_CLK DDPB_1P DPB_LANE2_N
F30 AF11 BB40
[23] ACZ_SDIN1
E32
HDA_SDIN1 IHDA SATA2RXN
AF9
SATA ODD [19] LA_DATAN0 BB47
DDPB_2N
BA40 DPB_LANE2_P
HDA_SDIN2 SATA2RXP LVDSA_DATA#0 DDPB_2P DPB_LANE3_N
F32 HDA_SDIN3 SATA2TXN AF7 [19] LA_DATAN1 BA52 LVDSA_DATA#1 DDPB_3N AW38
ACZ_SDOUT B29 AF6 [19] LA_DATAN2 AY48 BA38 DPB_LANE3_P
HDA_SDO SATA2TXP LVDSA_DATA#2 DDPB_3P
[10] PCH_GPIO33 H32 HDA_DOCK_EN# / GPIO33 (+3V) AV47 LVDSA_DATA#3
J30 HDA_DOCK_RST# / GPIO13(+3V_S5) SATA3RXN AH3 DDPC_CTRLCLK Y49
AH1 BB48 AB49
B
SATA SATA3RXP
SATA3TXN AF3
[19] LA_DATAP0
[19] LA_DATAP1 BA50
LVDSA_DATA0
LVDSA_DATA1
DDPC_CTRLDATA B

DISPLAY PORT C
SATA3TXP AF1 [19] LA_DATAP2 AY49 LVDSA_DATA2 DDPC_AUXN BE44
R234 51_4 PCH_JTAG_TCK_BUF M3 AV48 BD44
JTAG_TCK LVDSA_DATA3 DDPC_AUXP
SATA4RXN AD9 DDPC_HPD AV40
PCH_JTAG_TMS
TP18 K3 JTAG_TMS SATA4RXP AD8
AD6 AP48
LVDS--B BE40
SATA4TXN [19] LB_CLK# LVDSB_CLK# DDPC_0N
PCH_JTAG_TDI K1 AD5 AP47 BD40
TP17 JTAG_TDI JTAG SATA4TXP [19] LB_CLK LVDSB_CLK DDPC_0P
DDPC_1N BF41
PCH_JTAG_TDO J2 AD3 SATA_RXN5_C [26] [19] LB_DATAN0 AY53 BH41
TP11 JTAG_TDO SATA5RXN LVDSB_DATA#0 DDPC_1P
SATA5RXP AD1 SATA_RXP5_C [26] [19] LB_DATAN1 AT49 LVDSB_DATA#1 DDPC_2N BD38
PCH_JTAG_RST# J4 AB3 [19] LB_DATAN2 AU52 BC38
TP14 TRST# SATA5TXN SATA_TXN5 [26] LVDSB_DATA#2 DDPC_2P
SATA5TXP AB1 SATA_TXP5 [26] [19] LB_DATAP0 AT53 LVDSB_DATA#3 DDPC_3N BB36
[19] LB_DATAP1 DDPC_3P BA36
AY51
SPI_CLK_R BA2 AF16
E-SATA [19] LB_DATAP2
AT48
LVDSB_DATA0
U50
SPI_CLK SATAICOMPO LVDSB_DATA1 DDPD_CTRLCLK
AU50 LVDSB_DATA2 DDPD_CTRLDATA U52
SPI_CS0#_R AV3 AF15 SATA_COMP R157 37.4/F_4 +1.05V CRT_B_PCH R444 0_4 CRT_B_1 AT51
SPI_CS0# SATAICOMPI LVDSB_DATA3

DISPLAY PORT D
R454 150/F_4 BC46
SPI_CS1# SATA_LED# CRT_G_PCH R443 0_4 CRT_G_1 AA52 DDPD_AUXN
AY3 T3 BD46
TP13 SPI_CS1# SPI SATALED# SATA_LED# [23]
R453 150/F_4 AB53
CRT_BLUE
CRT_GREEN
DDPD_AUXP
DDPD_HPD AT38
CRT_R_PCH R451 0_4 CRT_R_1 AD53
SPI_SI_R R452 150/F_4 CRT_RED
AY1 SPI_MOSI CRT DDPD_0N BJ40
Y9 SATA_DET0# DDCCLK_PCH R448 0_4 DDCCLK_INT V51 BG40
SPI_SO (+3V) SATA0GP / GPIO21 SATA_DET1# DDCDATA_PCH R447 0_4 DDCDATA_INT V53 CRT_DDC_CLK DDPD_0P
AV1 SPI_MISO (+3V_S5) SATA1GP / GPIO19 V1 CRT_DDC_DATA DDPD_1N BJ38
DDPD_1P BG38
IbexPeak-M_Rev1_0 HSYNC_PCH R100 0_4 HSYNC Y53 BF37
VSYNC_PCH R98 0_4 VSYNC CRT_HSYNC DDPD_2N
Y51 CRT_VSYNC DDPD_2P BH37
DDPD_3N BE36
C
R105 1K/F_4 DAC_IREF AD48 BD36 C
DAC_IREF DDPD_3P
AB51 CRT_IRTN
+3V
UMA HDMI signals IbexPeak-M_Rev1_0
Q24 [16,20] CRT_B R49 0_4 CRT_B_PCH
2

2N7002K [16,20] CRT_G R48 0_4 CRT_G_PCH


DPB_CTRL_CLK R438 0_4 SDVO_CLK [30] [16,20] CRT_R R47 0_4 CRT_R_PCH
DPB_CTRL_DATA R437 0_4 SDVO_DATA [30] DPB_HPD_Q 1 3 HDMI_HPD_CON [30] [17,20] DDCCLK R436 0_4 DDCCLK_PCH 1205 The SATALED# signal is
DPB_LANE0_N C184 .1U/10V_4 IN_D2# [30] [17,20] DDCDATA R449 0_4 DDCDATA_PCH open-collector and requires a
DPB_LANE0_P C189 .1U/10V_4 IN_D2 [30] [16,20] HSYNC_COM R446 0_4 HSYNC_PCH weak external pull-up (8.2 k
DPB_LANE1_N C568 .1U/10V_4 IN_D1# [30] [16,20] VSYNC_COM R492 0_4 VSYNC_PCH
to 10 k ) to +V3.3.
DPB_LANE1_P C569 .1U/10V_4 IN_D1 [30] R465
DPB_LANE2_N C192 .1U/10V_4 IN_D0# [30] 100K_4 R466 *0_4
DPB_LANE2_P C198 .1U/10V_4 IN_D0 [30] R522 10K/F_4 SATA_LED#
DPB_LANE3_N C207 .1U/10V_4 IN_CLK# [30]
DPB_LANE3_P C201 .1U/10V_4 IN_CLK [30] +3V
R207 *10K/F_4 SATA_DET0# R232 10K/F_4
UMA ony R536 *10K/F_4 SATA_DET1# R552 10K/F_4

For AUDIO 4M byte SPI ROM for ME 2M byte SPI ROM for ME
[22] ACZ_RST#_AUDIO
[22] ACZ_SDOUT_AUDIO
R480
R485
C571
33_4 ACZ_RST#
33_4 ACZ_SDOUT
*10P/50V_4
RTC +RTC_CELL
2M byte SPI ROM for ME MXIC AKE39FP0Z00 MXIC: AKE38FP0Z00
+3VPCU RB500V-40 CR2 C303 1U/6.3V_4 12/1 WINBOND: AKE38FP0N01
[22] ACZ_SYNC_AUDIO R495 33_4 ACZ_SYNC U32 AIT: AKE38ZN0800
C580 *10P/50V_4 +3VRTC_2 R190 20K/F_4 RTC_RST# +3V 8 1 SPI_CS0# R528 0_4 SPI_CS0#_R
RB500V-40 CR1 C304 1U/6.3V_4 VDD CE# SPI_CLK R550 0_4 SPI_CLK_R
SCK 6
D [22] BIT_CLK_AUDIO R145 33_4 ACZ_BCLK 1 2 5 SPI_SI R551 0_4 SPI_SI_R SPI ROM Socket D
C221 10P/50V_4 J1 *SHORT_ PAD1 SPI_HOLD# 7 SI SPI_SO_R R527 0_4 SPI_SO
HOLD# SO 2
R194 20K/F_4 SRTC_RST# R542 10K/F_4 DG008000031
C305 1U/6.3V_4 C594 .1U/10V_4 4 3 SPI_W P# R553 10K/F_4 +3V
R479 33_4 ACZ_RST# VSS WP#
[23] ACZ_RST#_MDC 1 2
For MDC [23] ACZ_SDOUT_MDC R489 33_4 ACZ_SDOUT J2 *SHORT_ PAD1
C573 *10P/50V_4 R186 1M_4 SM_INTRUDER# 2M SPI ROM
AKE39FP0Z00 PROJECT : SW9
[23] ACZ_SYNC_MDC R491
C576
33_4 ACZ_SYNC
*10P/50V_4 R205 1K/F_4 +3VRTC_1 1
CN13
2
X6179-10XXXX-8P-SOCKET Quanta Computer Inc.
R140 33_4 ACZ_BCLK 20 mil BAT_CONN [2,8,9,11,27,31,33,34,39] +1.05V Size Document Number Rev
[23] BIT_CLK_MDC Custom
C211 *10P/50V_4 [2,3,8,9,10,11,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V PCH 1/5 (SATA,HDA,LPC) 1A
[19,21,23,26,27,28,31,32,33,35,37,38,39] +3VPCU
Date: W ednesday, December 02, 2009 Sheet 7 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1

IBEX PEAK-M (GND)


AY7
B11
U29I
VSS[159]
VSS[160]
VSS[259]
VSS[260]
H49
H5 IBEX PEAK-M (PCI-E,SMBUS,CLK)
08
B15 VSS[161] VSS[261] J24
B19 K11 U29B
VSS[162] VSS[262] +3VS5
B23 VSS[163] VSS[263] K43
B31 K47 Ibex-M
B35
VSS[164]
VSS[165]
VSS[264]
VSS[265] K7 [28] PCIE_RXN0 PCIE_RXN0 BG30
PERN1 2 OF 10 SMBus
B39 L14 [28] PCIE_RXP0 PCIE_RXP0 BJ30 B9 SMBALERT# 10K/F_4 R515
D VSS[166] VSS[266] C575 .1U/10V_4 PCIE_TXN0_C BF29 PERP1 (+3V_S5) SMBALERT# / GPIO11 PCLK_SMB 2.2K_4 R164
D
B43 VSS[167] VSS[267] L18 [WLAN] [28] PCIE_TXN0
C578 .1U/10V_4 PCIE_TXP0_C BH29 PETN1 SMBCLK H14
PDAT_SMB 2.2K_4 R167
B47 VSS[168] VSS[268] L2 [28] PCIE_TXP0 PETP1 SMBDATA C8
B7 L22 J14 SMBL0ALERT# 10K/F_4 R161
VSS[169] VSS[269] (+3V_S5) SML0ALERT# / GPIO60 SMB_CLK_ME0 4.7K_4 R188
BG12 VSS[170] VSS[270] L32 [24] PCIE_RXN1_LAN AW30 PERN2 SML0CLK C6
BB12 L36 [24] PCIE_RXP1_LAN BA30 G8 SMB_DATA_ME0 4.7K_4 R191
VSS[171] VSS[271] C247 .1U/10V_4 PCIE_TXN1_C BC30 PERP2 SML0DATA SML1ALERT# 10K/F_4 R158
BB16 VSS[172] VSS[272] L40 [LAN] [24] PCIE_TXN1_LAN
C234 .1U/10V_4 PCIE_TXP1_C BD30 PETN2 (+3V_S5) SML1ALERT# / GPIO74 M14
SMB_CLK_ME1 4.7K_4 R171
BB20 L52 [24] PCIE_TXP1_LAN E10
BB24
VSS[173] VSS[273]
M12
PETP2 (+3V_S5) SML1CLK / GPIO58
G12 SMB_DATA_ME1 4.7K_4 R172
VSS[174] VSS[274] (+3V_S5) SML1DATA / GPIO75
BB30 VSS[175] VSS[275] M16 AU30 PERN3
BB34 M20 AT30 SMB_CLK_ME0
VSS[176] VSS[276] PERP3 SMB_CLK_ME0 [24]
BB38 VSS[177] VSS[277] N38 AU32 PETN3
BB42 M34 AV32 SMB_DATA_ME0
VSS[178] VSS[278] PETP3 SMB_DATA_ME0 [24]
BB49 VSS[179] VSS[279] M38 CL_CLK1 T13
PCIE_RXN4
BB5
BC10
VSS[180] VSS[280] M42
M46
[28] PCIE_RXN4
PCIE_RXP4
BA32
BB32
PERN4 Controller T11
FOR LAN IC
VSS[181] VSS[281] [28] PCIE_RXP4 PERP4 CL_DATA1
BC14 M49 Robson C218 .1U/10V_4 PCIE_TXN4_C BD32
BC18
VSS[182] VSS[282]
M5
[28] PCIE_TXN4
C224 .1U/10V_4 PCIE_TXP4_C BE32
PETN4 Link T9
VSS[183] VSS[283] [28] PCIE_TXP4 PETP4 CL_RST1#
BC2 VSS[184] VSS[284] M8
BC22 VSS[185] VSS[285] N24 BF33 PERN5
BC32 VSS[186] VSS[286] P11 BH33 PERP5
BC36 VSS[187] VSS[287] AD15 BG32 PETN5
BC40 VSS[188] VSS[288] P22 BJ32 PETP5
BC44 VSS[189] VSS[289] P30
PCI-E* PEG
BC52 VSS[190] VSS[290] P32 BA34 PERN6
BH9 VSS[191] VSS[291] P34 AW34 PERP6 H1 PEG_CLKREQ# PEG_CLKREQ# [14]
BD48 P42 BC34 (+3V_S5)PEG_A_CLKRQ# / GPIO47 AD43
VSS[192] VSS[292] PETN6 CLKOUT_PEG_A_N CLK_PCIE_VGA# [14]
BD49 VSS[193] VSS[293] P45 BD34 PETP6 CLKOUT_PEG_A_P AD45 CLK_PCIE_VGA [14]
BD5 VSS[194] VSS[294] P47 CLKOUT_DMI_N AN4 CLK_PCIE_3GPLL# [3]
C BE12 VSS[195] VSS[295] R2 AT34 PERN7 CLKOUT_DMI_P AN2 CLK_PCIE_3GPLL [3] C
BE16 VSS[196] VSS[296] R52 AU34 PERP7
BE20 VSS[197] VSS[297] T12 AU36 PETN7
BE24 VSS[198] VSS[298] T41 AV36 PETP7 CLKOUT_DP_N / CLKOUT_BCLK1_N AT1 DREFSSCLK# [3]
BE30 VSS[199] VSS[299] T46 CLKOUT_DP_P / CLKOUT_BCLK1_P AT3 DREFSSCLK [3]
BE34 VSS[200] VSS[300] T49 BG34 PERN8
BE38 VSS[201] VSS[301] T5 BJ34 PERP8
BE42 VSS[202] VSS[302] T8 BG36 PETN8 CLKIN_DMI_N AW24 CLK_BUF_PCIE_3GPLL# [2]
BE46 VSS[203] VSS[303] U30 BJ36 PETP8 CLKIN_DMI_P BA24 CLK_BUF_PCIE_3GPLL [2]
BE48 VSS[204] VSS[304] U31 AK48 CLKOUT_PCIE0N
BE50 VSS[205] VSS[305] U32 AK47 CLKOUT_PCIE0P
BE6 VSS[206] VSS[306] U34 CLKIN_BCLK_N AP3 CLK_BUF_BCLK_N [2]
BE8 P38 PCIE_CLK_REQ0# P9 AP1 CLK_BUF_BCLK_P [2]
VSS[207] VSS[307] PCIECLKRQ0# / GPIO73(+3V_S5) CLKIN_BCLK_P
BF3 V11 AM43

From CLK BUFFER


VSS[208] VSS[308] [28] CLK_PCIE_W LAN# CLKOUT_PCIE1N
BF49 VSS[209] VSS[309] P16 [28] CLK_PCIE_W LAN AM45 CLKOUT_PCIE1P
BF51 VSS[210] VSS[310] V19 MiniWLAN CLKIN_DOT_96N F18 CLK_BUF_DREFCLK# [2]
BG18 V20 [28] PCIE_CLK_REQ1# R213 0_4 CLK1_OE# U4 E18 CLK_BUF_DREFCLK [2]
VSS[211] VSS[311] PCIECLKRQ1# / GPIO18 (+3V) CLKIN_DOT_96P
BG24 VSS[212] VSS[312] V22
BG4 VSS[213] VSS[313] V30 [28] CLK_PCIE_W W AN# AM47 CLKOUT_PCIE2N
BG50 VSS[214] VSS[314] V31 [28] CLK_PCIE_W W AN AM48 CLKOUT_PCIE2P CLKIN_SATA_N / CKSSCD_N AH13 CLK_BUF_DREFSSCLK# [2]
BH11 VSS[215] VSS[315] V32 CLKIN_SATA_P / CKSSCD_P AH12 CLK_BUF_DREFSSCLK [2]
BH15 V34 WWAN [28] PCIE_CLK_REQ2# R523 0_4 CLK2_OE# N4
VSS[216] VSS[316] +3V PCIECLKRQ2# / GPIO20(+3V)
BH19 VSS[217] VSS[317] V35
BH23 VSS[218] VSS[318] V38 [24] CLK_PCIE_LAN# AH42 CLKOUT_PCIE3N REFCLK14IN P41 CLK_ICH_14M [2]
BH31 V43 CLK1_OE# R214 10K/F_4 LAN AH41
VSS[219] VSS[319] [24] CLK_PCIE_LAN CLKOUT_PCIE3P
BH35 V45 CLK2_OE# R524 10K/F_4
VSS[220] VSS[320] PCIE_CLK_REQ3#_R A8 CLK_PCI_FB
BH39 VSS[221] VSS[321] V46 [24] PCIE_CLK_REQ3# PCIECLKRQ3# / GPIO25(+3V_S5) CLKIN_PCILOOPBACK J42 CLK_PCI_FB [9]
BH43 V47 +3VS5 R517 0_4
VSS[222] VSS[322]
BH47 VSS[223] VSS[323] V49 AM51 CLKOUT_PCIE4N
B BH7 V5 PCIE_CLK_REQ0# R178 10K/F_4 AM53 AH51 PCH_XT25MHZ_IN B
VSS[224] VSS[324] PCIE_CLK_REQ3#_R R518 10K/F_4 CLKOUT_PCIE4P XTAL25_IN PCH_XT2MHZ_OUT
C12 VSS[225] VSS[325] V7 XTAL25_OUT AH53
C50 V8 PCIE_CLK_REQ4#_R R180 10K/F_4 PCIE_CLK_REQ4#_R M9
VSS[226] VSS[326] PCIE_CLK_REQB#_R PCIECLKRQ4# / GPIO26(+3V_S5)
D51 VSS[227] VSS[327] W2 R155 10K/F_4
XCLK_RCOMP AF38 XCLK_RCOMP +1.05V
E12 W52 PCIE_CLK_REQ5# R192 10K/F_4 R126 90.9/F_4
VSS[228] VSS[328]
E16 VSS[229] VSS[329] Y11 AJ50 CLKOUT_PCIE5N
E20 Y12 PEG_CLKREQ# R526 *10K/F_4 AJ52 T45 CLK_FLEX0 T11
E24
VSS[230] VSS[330]
Y15
CLKOUT_PCIE5P (+3V) CLKOUTFLEX0 / GPIO64 P43 CLK_FLEX1 T12
VSS[231] VSS[331] PCIE_CLK_REQ5# (+3V_S5) (+3V) CLKOUTFLEX1 / GPIO65 CLK_FLEX2 T13
E30 Y19 H6 T42
E34
VSS[232] VSS[332]
Y23
PCIECLKRQ5# / GPIO44 (+3V) CLKOUTFLEX2 / GPIO66 N50 CLK_FLEX3
VSS[233] VSS[333] (+3V) CLKOUTFLEX3 / GPIO67 R135 22_4
CLK_48M_CR [21]
E38 VSS[234] VSS[334] Y28
E42 VSS[235] VSS[335] Y30 AK53 CLKOUT_PEG_B_N
1203 Intel EDS1.0
E46 Y31 Q13 2N7002E AK51
E48
VSS[236] VSS[336]
Y32 SMB_CLK_ME1 3 1
CLKOUT_PEG_B_P Clock Flex spec change to no
VSS[237] VSS[337] MBCLK2 [17,27]
PCIE_CLK_REQB#_R P13 support 27and 24MHZ
E6 VSS[238] VSS[338] Y38 PEG_B_CLKRQ# / GPIO56(+3V_S5)
E8 Y43 R269
VSS[239] VSS[339]
F49 Y46
2

VSS[240] VSS[340] 2.2K_4 IbexPeak-M_Rev1_0


F5 VSS[241] VSS[341] P49
G10 VSS[242] VSS[342] Y5 +3V
G14 VSS[243] VSS[343] Y6
G18 Y8 R270 +3VS5 R481 1M_4
VSS[244] VSS[344]
G2 VSS[245] VSS[345] P24
2

G22 T43 2.2K_4 Y7


VSS[246] VSS[346] Q14 2N7002E PCH_XT2MHZ_OUT PCH_XT25MHZ_IN
G32 VSS[247] VSS[347] AD51 3 1
G36 AT8 SMB_DATA_ME1 3 1 U13 C330
VSS[248] VSS[348] MBDATA2 [17,27]
G40 AD47 *MC74VHC1G08DFT2G *.1U/10V_4
VSS[249] VSS[349]
5

G44 Y47 C786 C787


VSS[250] VSS[350] PLT_RST-R# 18P/50V_4 18P/50V_4
G52 VSS[251] VSS[351] AT12 [9] PLT_RST-R# 2 4 2
AF39 AM6 Q10 2N7002E 4
VSS[252] VSS[352] PLTRST# [3,24,27,28,29]
H16 AT13 PDAT_SMB 3 1 1 25MHZ
A VSS[253] VSS[353] CGDAT_SMB [2,12,13] A
H20 VSS[254] VSS[354] AM5
H30 AK45 R211 R245 R248
3

VSS[255] VSS[355]
H34 AK39 10K/F_4 100K/F_4 *100K/F_4
2

VSS[256] VSS[356]
H38 VSS[257] VSS[366] AV14
H42 +3V R247 0_4
VSS[258]
IbexPeak-M_Rev1_0 PROJECT : SW9
R210 Quanta Computer Inc.
2

10K/F_4
Q9 2N7002E [3,9,10,11,14,37] +3VS5
PCLK_SMB 3 1 [2,7,9,11,27,31,33,34,39] +1.05V Size Document Number Rev
CGCLK_SMB [2,12,13] Custom
[2,3,7,9,10,11,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V PCH 2/5 (PCIE, SMBUS,CK) 1A

Date: W ednesday, December 02, 2009 Sheet 8 of 44


5 4 3 2 1
1 2 3 4 5 6 7 8

+3VS5

For Switchable only

R587 *0_4 SATA2GP


PCH_GPIO61
R586
10K/F_4
09
IBEX PEAK-M (PCI,USB,NVRAM) [27,29] DGPU_HOLD_RST#
[27] DGPU_PW R_EN#
[27,30] DGPU_SELECT#
R386
R387
*0_4
*0_4
REQ1#
REQ2#
SATA2GP [10]

[27] EDID_SELECT# R585 *0_4 REQ3#


U29E
H40 Ibex-M AY9 [27,29] DGPU_PW ROK R588 *0_4 SATA3GP SATA3GP [10]
AD0 NV_CE#0
A N34 AD1 5 OF 10 NV_CE#1 BD1
Discrete Only A
C44 AD2 NV_CE#2 AP15
A38 BD8 FDI_INT R505 *1K/F_4
AD3 NV_CE#3 FDI_FSYNC0 R514 *1K/F_4
C36 AD4
J34 AV9 FDI_FSYNC1 R509 *1K/F_4
AD5 NV_DQS0 FDI_LSYNC0 R511 *1K/F_4
A40 BG8
D45
E36
AD6
AD7 NVRAM NV_DQS1
AP7 IBEX PEAK-M (DMI,FDI,GPIO)
FDI_LSYNC1 R508 *1K/F_4
AD8 NV_DQ0 / NV_IO0
H48 AD9 NV_DQ1 / NV_IO1 AP6
E40 AD10 NV_DQ2 / NV_IO2 AT6
C40 AT9 U29C
AD11 NV_DQ3 / NV_IO3
M48 AD12 NV_DQ4 / NV_IO4 BB1 FDI_RXN0 BA18 FDI_TXN0 [3]
M45 AD13 NV_DQ5 / NV_IO5 AV6 [3] DMI_RXN0 BC24 DMI0RXN Ibex-M FDI_RXN1 BH17 FDI_TXN1 [3]
F53 AD14 NV_DQ6 / NV_IO6 BB3 [3] DMI_RXN1 BJ22 DMI1RXN 3 OF 10 FDI_RXN2 BD16 FDI_TXN2 [3]
M40 AD15 NV_DQ7 / NV_IO7 BA4 [3] DMI_RXN2 AW20 DMI2RXN FDI_RXN3 BJ16 FDI_TXN3 [3]
M43 AD16 NV_DQ8 / NV_IO8 BE4 [3] DMI_RXN3 BJ20 DMI3RXN FDI_RXN4 BA16 FDI_TXN4 [3]
J36 AD17 NV_DQ9 / NV_IO9 BB6 FDI_RXN5 BE14 FDI_TXN5 [3]
K48 AD18 NV_DQ10 / NV_IO10 BD6 [3] DMI_RXP0 BD24 DMI0RXP FDI_RXN6 BA14 FDI_TXN6 [3]
F40 AD19 NV_DQ11 / NV_IO11 BB7 [3] DMI_RXP1 BG22 DMI1RXP FDI_RXN7 BC12 FDI_TXN7 [3]
C42 AD20 NV_DQ12 / NV_IO12 BC8 [3] DMI_RXP2 BA20 DMI2RXP
K46 AD21 NV_DQ13 / NV_IO13 BJ8 [3] DMI_RXP3 BG20 DMI3RXP FDI_RXP0 BB18 FDI_TXP0 [3]
M51 AD22 NV_DQ14 / NV_IO14 BJ6 FDI_RXP1 BF17 FDI_TXP1 [3]
J52 AD23 NV_DQ15 / NV_IO15 BG6 [3] DMI_TXN0 BE22 DMI0TXN FDI_RXP2 BC16 FDI_TXP2 [3]
K51 BF21 BG16
L34
AD24
AD25 NV_ALE BD3 NV_ALE [10]
[3]
[3]
DMI_TXN1
DMI_TXN2 BD20
DMI1TXN
DMI2TXN
DMI FDI FDI_RXP3
FDI_RXP4 AW16
FDI_TXP3
FDI_TXP4
[3]
[3]
F42 AD26 NV_CLE AY6 NV_CLE [10] [3] DMI_TXN3 BE18 DMI3TXN FDI_RXP5 BD14 FDI_TXP5 [3]
J40 AD27 FDI_RXP6 BB14 FDI_TXP6 [3]
G46 AD28 [3] DMI_TXP0 BD22 DMI0TXP FDI_RXP7 BD12 FDI_TXP7 [3]
F44 AD29 NV_RCOMP AU2 NV_RCOMP R529 32.4/F_4 [3] DMI_TXP1 BH21 DMI1TXP
M47 BC20
B
H36
AD30
AD31 PCI NV_RB# AV7
[3]
[3]
DMI_TXP2
DMI_TXP3 BD18
DMI2TXP
DMI3TXP FDI_INT BJ14
BF13
FDI_INT [3]
B

FDI_FSYNC0 FDI_FSYNC0 [3]


J50 C/BE0# NV_WR#0_RE# AY8 FDI_FSYNC1 BH13 FDI_FSYNC1 [3]
G42 C/BE1# NV_WR#1_RE# AY5 BH25 DMI_ZCOMP FDI_LSYNC0 BJ12 FDI_LSYNC0 [3]
H47 +1.05V DMI_COMP BF25 BG14 FDI_LSYNC1 [3]
C/BE2# R153 49.9/F_4 DMI_IRCOMP FDI_LSYNC1
G34 C/BE3# NV_WE#_CK0 AV11
NV_WE#_CK1 BF5
PCI_PIRQA# G38 System Power Management
PCI_PIRQB# PIRQA#
H51 PIRQB# [3] XDP_DBRESET# T6 SYS_RESET# SLP_S3# P12 SUSB# [27]
PCI_PIRQC# B37 H18 M6 H7 SUSC# [27]
PIRQC# USBP0N USBP0- [21] SYS_PWROK SLP_S4#
PCI_PIRQD# R204 0_4
A44 PIRQD# USBP0P J18
A18
USBP0+ [21] USB [34] IMVP_PW RGD
R203 *0_4
B17
PCH_PW ROK K5 PWROK
K8 SLP_M#
USBP1N USBP1- [21] [27] ECPW ROK MEPWROK SLP_M# TP2
REQ0#
REQ1#
F51
A46
REQ0# USBP1P C18
N20
USBP1+ [21] USB RSV_ICH_LAN_RST# A10 TP23 N2
REQ1# / GPIO50 (+5V) USBP2N USBP2- [26] LAN_RST#
REQ2#
REQ3#
B45
M53
REQ2# / GPIO52 (+5V) USBP2P P20
J20
USBP2+ [26] ESATA-USB [3] PM_DRAM_PW RGD D9
C16
DRAMPWROK (+3V_S5) SUS_PWR_DN_ACK / GPIO30 M1
P7 AC_PRESENT
SUS_PW R_ACK [27]
REQ3# / GPIO54 (+5V) USBP3N [27] RSMRST# RSMRST# (+3V_S5) ACPRESENT / GPIO31
L20 Y1 CLKRUN# [27]
F48
USBP3P
F20 R209 PM_PW RBTN#_R P5 (+3V) CLKRUN# / GPIO32 P8 PCH_GPIO61
[10] GNT0# GNT0# USBP4N USBP4- [21] [27] DNBSW ON# PWRBTN# (+3V_S5) SUS_STAT# / GPIO61
0_4 SUSCLK
[10] GNT1# K45
PCI_GNT2# F36 GNT1# / GPIO51 (+3V) USBP4P G20
A20
USBP4+ [21] Card reader (+3V_S5) SUSCLK / GPIO62 F3
E4 SLP_S5#
TP16
GNT3# GNT2# / GPIO53 (+3V) USBP5N USBP5- [19]
PM_RI#
(+3V_S5) SLP_S5# / GPIO63 PM_BATLOW #
TP15
[10] GNT3# H53 GNT3# / GPIO55 (+3V) USBP5P C20
M22
USBP5+ [19] Camera F14
J12
RI# (+3V_S5) BATLOW# / GPIO72 A6 PM_BATLOW # [27]
USBP6N [24,28] PCIE_W AKE# WAKE#
PIRQE# B41 N22 [3] PM_SYNC BJ10 F6 BOARD_ID6 [10]
PIRQF# PIRQE# / GPIO2 (+5V) USBP6P PMSYNCH (+3V_S5) SLP_LAN# / GPIO29
K53 PIRQF# / GPIO3 (+5V) USBP7N B21
PIRQG# A36 D21
INTH# PIRQG# / GPIO4 (+5V) USBP7P IbexPeak-M_Rev1_0
A48 PIRQH# / GPIO5 (+5V) USBP8N H22
J22 [28] BT_COMBO_EN# R590 *0_4 GNT3#
USBP8P
K6 PCIRST# USBP9N E22
C USBP9P F22 C
PCI_SERR# E44 A22
[27] PCI_SERR#
PCI_PERR# E50
SERR#
PERR# USB USBP10N
USBP10P C22
G24
USBP10-
USBP10+
[28]
[28] WLAN
USBP11N USBP11- [28] +3V
+3V
PCI_IRDY# A42
USBP11P H24
L24
USBP11+ [28] WWAN RP34
IRDY# USBP12N USBP12- [25]
BT_COMBO_EN# PCI_PIRQD# REQ2# R116 8.25K/F_4
PCI_DEVSEL#
H44
F46
PAR USBP12P M24
A24
USBP12+ [25] Blue tooth PCI_IRDY#
5
4
6
7 PCI_SERR# PIRQE# R115 8.25K/F_4
PCI_FRAME# DEVSEL# USBP13N PCI_STOP# REQ1# PIRQF# R471 8.25K/F_4
C46 FRAME# USBP13P C24 3 8
PCI_PIRQA# 2 9 PCI_FRAME# PIRQG# R131 8.25K/F_4
PCI_PLOCK# D49 R139 PCI_PIRQC# 1 10 +3V +3V
PLOCK#
USBRBIAS# B25 USB_BIAS R498 22.6/F_4
PCI_STOP# D41 *1K/F_4 10P8R-8.2K 11/17
PCI_TRDY# STOP# CLKRUN# R532 8.25K/F_4
C48 TRDY# USBRBIAS D25
+3VS5 XDP_DBRESET# R200 1K/F_4
PME# M7 RP27
TP4 PME#
N16 USB_OC0# 5 6 USB_OC0#
PLT_RST-R# D5
(+3V_S5)OC0# / GPIO59 J16 USB_OC1# USB_OC4# 4 7 USB_OC1# +3VS5
[8] PLT_RST-R# PLTRST# (+3V_S5)OC1# / GPIO40 F16 USB_OC2# USB_OC5# 3 8 USB_OC2#
R441 33_4 CLK_33M_DEBUG_RN52
(+3V_S5)OC2# / GPIO41 L16 USB_OC3# USB_OC6# 2 9 USB_OC3# PM_RI# R162 10K/F_4
[28] CLK_33M_DEBUG CLKOUT_PCI0 (+3V_S5)OC3# / GPIO42
[27] CLK_33M_KBC R439 33_4 CLK_33M_KBC_R P53 E14 USB_OC4# USB_OC7# 1 10 +3VS5 PM_BATLOW # R519 10K/F_4
CLKOUT_PCI1 (+3V_S5)OC4# / GPIO43 USB_OC5# PCIE_W AKE# R170 1K/F_4
P46 CLKOUT_PCI2 G16
R440 22_4 CLK_PCI_FB_C P51 (+3V_S5)OC5# / GPIO9 F12 USB_OC6# 10P8R-8.2K
[8] CLK_PCI_FB CLKOUT_PCI3 (+3V_S5)OC6# / GPIO10
P48 T15 USB_OC7# +3V
CLKOUT_PCI4 (+3V_S5)OC7# / GPIO14 RP33 SUS_PW R_ACK R525 10K/F_4
5 6 PCI_TRDY# [27] AC_PRESENT AC_PRESENT R177 10K/F_4
CLK_33M_DEBUG C405 *33P/50V_4 IbexPeak-M_Rev1_0 PCI_DEVSEL# 4 7 INTH# 11/17
CLK_33M_KBC C131 *33P/50V_4 PCI_PLOCK# 3 8 REQ0#
CLK_PCI_FB C562 *33P/50V_4 PCI_PERR# 2 9 PCI_PIRQB# RSMRST# R503 10K/F_4
D EMI REQ3# 1 10 +3V RSV_ICH_LAN_RST# R513 10K/F_4 D
PCH_PW ROK R501 10K/F_4
10P8R-8.2K

PROJECT : SW9
Quanta Computer Inc.
[2,7,8,11,27,31,33,34,39] +1.05V
[2,3,7,8,10,11,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V Size Document Number Rev
Custom 1A
[3,8,10,11,14,37] +3VS5 PCH 3/5(PCI,ONFI,USB,DMI)
Date: W ednesday, December 02, 2009 Sheet 9 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

IBEX PEAK-M (GND)


IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)
BMBUSY#

SIO_EXT_SMI#
Y3
U29F

BMBUSY# / GPIO0(+3V)
Ibex-M
6 OF 10 CLKOUT_PCIE6N
CLKOUT_PCIE6P
AH45
AH46
AB16
AA19
U29H

VSS[0]
VSS[1]
VSS[80]
VSS[81]
AK30
AK31 [9] GNT3# R470
10
*10K_NC
[27] SIO_EXT_SMI# C38 TACH1 / GPIO1 (+3V) AA20 VSS[2] VSS[82] AK32
AA22 VSS[3] VSS[83] AK34
SIO_EXT_SCI# D37 AM19 AK35 A16 swap override Strap/Top-Block
[27] SIO_EXT_SCI# TACH2 / GPIO6 (+3V) VSS[4] VSS[84]
CLKOUT_PCIE7N AF48 AA24 VSS[5] VSS[85] AK38 Swap Override jumper
J32 AF47 AA26 AK43
A
[25] BT_OFF# TACH3 / GPIO7 (+3V) GPIO CLKOUT_PCIE7P
AA28
VSS[6]
VSS[7]
VSS[86]
VSS[87] AK46 A
11/17 ACCLED_EN F10 AA30 AK49 Low = A16 swap
GPIO8(+3V_S5) MISC AA31
VSS[8]
VSS[9]
VSS[88]
VSS[89] AK5 override/Top-Block
LAN_DISABLE_R# K9 U2 GATEA20 [27] AA32 AK8 GNT3# Swap Override enabled
LAN_PHY_PWR_CTRL / GPIO12(+3V_S5) A20GATE VSS[10] VSS[90]
AB11 VSS[11] VSS[91] AL2 High = Default
[28] RF_OFF# R302 *0_4/S T7 AB15 AL52
short0402 GPIO15(+3V_S5) VSS[12] VSS[92]
AB23 VSS[13] VSS[93] AM11
SATA4GP AA2 AM3 CLK_CPU_BCLK# [3] AB30 BB44
SATA4GP / GPIO16(+3V) CLKOUT_BCLK0_N/CLKOUT_PCIE8N VSS[14] VSS[94]
AB31 VSS[15] VSS[95] AD24
[28] W AN_OFF# R133 *0_4/S PCH_GPIO17 F38 AM1 CLK_CPU_BCLK [3] AB32 AM20
short0402 TACH0 / GPIO17(+3V) CLKOUT_BCLK0_P/CLKOUT_PCIE8P VSS[16] VSS[96] SV_SET_UP R198 10K/F_4
AB39 VSS[17] VSS[97] AM22 +3V
BIOS_REC Y7 BG10 PCH_PECI_R R516 0_4 H_PECI [3] AB43 AM24
SCLOCK / GPIO22(+3V) PECI VSS[18] VSS[98]
GPIO27 left NC for AB47 VSS[19] VSS[99] AM26
internal VR. TP3 GPIO27 AB12 T1 RCIN# [27] AB5 AM28
GPIO27(+3V_S5) RCIN# VSS[20] VSS[100]
AB8 BA42
TP_PCH_GPIO28 V13 GPIO28 (+3V_S5)
CPU PROCPWRGD BE10 H_PW RGOOD [3] AC2
VSS[21]
VSS[22]
VSS[101]
VSS[102] AM30 SV_SET_UP 1-X High = Strong (Default)
AC52 VSS[23] VSS[103] AM31
[9] SATA2GP SATA2GP AB7 BD10 PCH_THRMTRIP#_R PM_THRMTRIP# [3,27] AD11 AM32
SATA2GP / GPIO36 (+3V) THRMTRIP# R169 56.2/F_4 AD12
VSS[24] VSS[104]
AM34
SATA3GP VSS[25] VSS[105]
[9] SATA3GP AB13 SATA3GP / GPIO37 TP1 BA22 +1.1V_VTT AD16 VSS[26] VSS[106] AM35
(+3V) AW22 R165 56.2/F_4 AD23 AM38
TP2 VSS[27] VSS[107] GNT0# R106 *1K/F_4
[19] LCD_BK P3 SDATAOUT0 / GPIO39(+3V) TP3 BB22 AD30 VSS[28] VSS[108] AM39 [9] GNT0#
AY45 AD31 AM42 [9] GNT1# GNT1# R107 *1K/F_4
TP4 VSS[29] VSS[109]
TP5 AY46 AD32 VSS[30] VSS[110] AU20
[12,13] PS_S3RSTGATE PS_S3RSTGATE F1 AV43 AD34 AM46
PCIECLKRQ7# / GPIO46(+3V_S5) TP6 VSS[31] VSS[111]
TP7 AV45 AU22 VSS[32] VSS[112] AV22
SV_SET_UP AB6 AF13 +3V AD42 AM49
SDATAOUT1 / GPIO48 (+3V) TP8 VSS[33] VSS[113]
TP9 M18 AD46 VSS[34] VSS[114] AM7 Boot BIOS Strap
[21] 5158_RST_R# R242 SATA5GP AA4 N18 AD49 AA50
*0_4 SATA5GP / GPIO49 (+3V) TP10 BIOS_REC R197 10K/F_4 VSS[35] VSS[115] PCI_GNT0# GNT#1 Boot BIOS Location
B RSVD TP11 AJ24
AK41 BIOS RECOVERY
AD7
AE2
VSS[36] VSS[116] BB10
AN32
B
TP12 VSS[37] VSS[117] LPC
TP13 AK42 HIGH : DISABLE AE4 VSS[38] VSS[118] AN50 0 0
TP14 M32 LOW : ENABLE AF12 VSS[39] VSS[119] AN52
BOARD_ID0 H10 N32 Y13 AP12 0 1 Reserved (NAND)
BOARD_ID1 GPIO24 (+3V_S5) TP15 VSS[40] VSS[120]
H3 PCIECLKRQ6# / GPIO45(+3V_S5) TP16 M30 AH49 VSS[41] VSS[121] AP42
BOARD_ID2 F8 N30 AU4 AP46 1 0 PCI
BOARD_ID3 GPIO57 (+3V_S5) TP17 VSS[42] VSS[122]
M11 STP_PCI# / GPIO34 TP18 H12 AF35 VSS[43] VSS[123] AP49
BOARD_ID4 V6 (+3V) AA23 AP13 AP5 1 1 SPI
BOARD_ID5 SATACLKREQ# / GPIO35(+3V) TP19 +3VS5 VSS[44] VSS[124]
V3 AB45 AN34 AP8
SLOAD / GPIO38 (+3V) NC_1
AB38 AF45
VSS[45] VSS[125]
AR2
NC_2 VSS[46] VSS[126]
NC_3 AB42 AF46 VSS[47] VSS[127] AR52
AB41 PS_S3RSTGATE R554 10K/F_4 AF49 AT11
+3VS5 NC_4 VSS[48] VSS[128]
NC_5 T39 AF5 VSS[49] VSS[129] BA12
INIT3_3V# P6 AF8 VSS[50] VSS[130] AH48 11/17
C10 +3V AG2 AT32 R521 *1K/F_4
TP24 VSS[51] VSS[131] [9] NV_ALE
R176 10K/F_4 TP_PCH_GPIO28 AG52 AT36 [9] NV_CLE R520 *1K/F_4 +1.8V
VSS[52] VSS[132]
A4 VSS_NCTF_1 VSS_NCTF_16 BH2 AH11 VSS[53] VSS[133] AT41
A49 VSS_NCTF_2 VSS_NCTF_17 BH52 AH15 VSS[54] VSS[134] AT47
A5 BH53 RCIN# R539 10K/F_4 AH16 AT7
VSS_NCTF_3 VSS_NCTF_18 GATEA20 R215 10K/F_4 VSS[55] VSS[135]
A50
A52
VSS_NCTF_4 NCTF VSS_NCTF_19 BJ1
BJ2 SATA2GP R206 10K/F_4
AH24
AH32
VSS[56] VSS[136] AV12
AV16 Danbury Technology Enabled
VSS_NCTF_5 VSS_NCTF_20 SATA3GP R163 10K/F_4 VSS[57] VSS[137]
A53 VSS_NCTF_6 VSS_NCTF_21 BJ4 AV18 VSS[58] VSS[138] AV20
B2 BJ49 SATA4GP R531 10K/F_4 AH43 AV24 High = Enable
VSS_NCTF_7 VSS_NCTF_22 SATA5GP R530 10K/F_4 VSS[59] VSS[139] NV_ALE
B4 VSS_NCTF_8 VSS_NCTF_23 BJ5 AH47 VSS[60] VSS[140] AV30
B52 BJ50 BMBUSY# R533 10K/F_4 AH7 AV34 Low = Disable
VSS_NCTF_9 VSS_NCTF_24 SIO_EXT_SMI# R130 10K/F_4 VSS[61] VSS[141]
B53 VSS_NCTF_10 VSS_NCTF_25 BJ52 AJ19 VSS[62] VSS[142] AV38
BE1 BJ53 SIO_EXT_SCI# R129 10K/F_4 AJ2 AV42
VSS_NCTF_11 VSS_NCTF_26 BT_OFF# R141 10K/F_4 VSS[63] VSS[143]
BE53 VSS_NCTF_12 VSS_NCTF_27 D1 AJ20 VSS[64] VSS[144] AV46
C BF1 D2 LCD_BK R540 10K/F_4 AJ22 AV49 DMI Termination Voltage C
VSS_NCTF_13 VSS_NCTF_28 VSS[65] VSS[145]
BF53 VSS_NCTF_14 VSS_NCTF_29 D53 AJ23 VSS[66] VSS[146] AV5
BH1 VSS_NCTF_15 VSS_NCTF_30 E1 AJ26 VSS[67] VSS[147] AV8
E53 PCH_GPIO17 R125 10K/F_4 AJ28 AW14 Set to Vcc when LOW
VSS_NCTF_31 1204 ( need to pull up to 3V VSS[68] VSS[148] NV_CLE
AJ32 VSS[69] VSS[149] AW18
IbexPeak-M_Rev1_0 from check list request ) AJ34 AW2 Set to Vcc/2 when HIGH
VSS[70] VSS[150]
AT5 VSS[71] VSS[151] BF9
Board ID ID0 ID1 ID2 ID3 ID4 ID5 ID6 AJ4 VSS[72] VSS[152] AW32
AK12 VSS[73] VSS[153] AW36
+3VS5
LG/CB 0=LG AM41
AN19
VSS[74] VSS[154] AW40
AW52
1=CB ACCLED_EN R173 10K/F_4 AK26
VSS[75] VSS[155]
AY11
RF_OFF# R195 1K/F_4 VSS[76] VSS[156]
UMA/Dis. 0=UMA AK22
AK23
VSS[77] VSS[157] AY43
AY47
No Reboot Strap
VSS[78] VSS[158]
1=Dis. AK28 VSS[79]
LAN_DISABLE_R# R181 10K/F_4
15.6"/ 14" 0=QL4/TW9 1204 ( need to pull up to 3V_S5 IbexPeak-M_Rev1_0
1=QL2/SW9 from check list request )
SPKR
[7,22] SPKR +3V
*1K/F_4 R541
MDC 0=YES
1=NO
R142 *100K/F_4
BOARD ID SETTING [7] PCH_GPIO33

R193 RU0 10K/F_4 BOARD_ID0 R189 RD0 *10K/F_4


+3VS5
Board ID ID6 ID5 ID4 ID3 ID2 ID1 ID0 R538 RU1 *10K/F_4 BOARD_ID1 R537 RD1 10K/F_4
D TBD RD6 (0) RD5 (0) RD4 (0) RD3 (0) RD2 (0) RD1 (0) RU0 (1) R185 RU2 10K/F_4 BOARD_ID2 R187 RD2 *10K/F_4 D

TBD RD6 (0) RD5 (0) RD4 (0) RD3 (0) RD2 (0) RU1 (1) RD0 (0) R201 RU3 *10K/F_4 BOARD_ID3 R202 RD3 10K/F_4
+3V
TBD RD6 (0) RD5 (0) RD4 (0) RD3 (0) RD2 (0) RU1 (1) RU0 (1) R199 RU4 *10K/F_4 BOARD_ID4 R208 RD4 10K/F_4
TBD RD6 (0) RD5 (0) RD4 (0) RD3 (0) RU2 (1) RD1 (0) RD0 (0) R534 RU5 *10K/F_4 BOARD_ID5 R535 RD5 10K/F_4 PROJECT : SW9
TBD RD6 (0) RD5 (0) RD4 (0) RD3 (0) RU2 (1) RD1 (0) RU0 (1) R183 RU6 *10K/F_4 BOARD_ID6 R184 RD6 10K/F_4 Quanta Computer Inc.
+3VS5
TBD RD6 (0) RD5 (0) RD4 (0) RD3 (0) RU2 (1) RU1 (1) RD0 (0) [3,5,11,31,34,35] +1.1V_VTT
Size Document Number Rev
[9] BOARD_ID6 [5,11,33,37,39] +1.8V
Custom 1A
TBD RD6 (0) RD5 (0) RD4 (0) RD3 (0) RU2 (1) RU1 (1) RU0 (1) [2,3,7,8,9,11,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V PCH 4/5 (GPIO & Strap)
[3,8,9,11,14,37] +3VS5
Date: W ednesday, December 02, 2009 Sheet 10of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

R86 0_6
11
POWER
+3V
+3V_LDO U29J POWER
U29G Ibex-M
+1.05V 1.524A AB24 AE50 C132 10U/6.3V_8 DIS UMA TP5 VCCACLK AP51 10 OF 10VCCIO[5] V24 3.208A +1.05V
C222 1U/6.3V_4 VCCCORE[1] VCCADAC[1] C152 .1U/10V_4 VCCACLK[1]
A AB26 VCCCORE[2] Ibex-M Ra 0 ohm NA VCCIO[6] V26 A
C239 10U/6.3V_6S AB28 7 OF 10 AE52 C153 .01U/16V_4 AP53 Y24 C215 1U/6.3V_4
VCCCORE[3] VCCADAC[2] DCPSUSBYP VCCACLK[2] VCCIO[7]
AD26 Y20 Y26
AD28
VCCCORE[4] Rb NA 0 ohm C251 .1U/10V_4 DCPSUSBYP VCCIO[8]
AF26
VCCCORE[5] CRT VSSA_DAC[1] AF53 USB V28 0.163A
AF28
VCCCORE[6]
AF51
Rc 0 ohm NA VCCSUS3_3[1]
U28 C262 .1U/10V_4
+3VS5
VCCCORE[7] VSSA_DAC[2] VCCSUS3_3[2] C227 .1U/10V_4
AF30 U26
AF31
VCCCORE[8]
Ra R90 *0_6 Rd NA 0 ohm +1.05V AF23
VCCSUS3_3[3]
U24 C240 *.033U/10V_4
VCCCORE[9] VCCLAN[1] VCCSUS3_3[4]
AH26 VCCCORE[10] VCCALVDS AH38 Rb R95 0_6 +3V VCCSUS3_3[5] P28
AH28 VCCCORE[11] VSSA_LVDS AH39 AF24 VCCLAN[2] VCCSUS3_3[6] P26
AH30 VCCCORE[12] LVDS +1.8V_PCHLVDS
Rc R108 *0_6
VCCSUS3_3[7] N28
AH31 VCCCORE[13] VCCTX_LVDS[1] AP43
C170 10U/6.3V_8
Rd R113 0_6 +1.8V
C200 22U VCCSUS3_3[8] N26
AJ30 VCCCORE[14] VCCTX_LVDS[2] AP45 AD38 VCCME[1] VCCSUS3_3[9] M28
AJ31 AT46 C182 .1U/10V_4 M26
VCCCORE[15] VCCTX_LVDS[3] C163 .01U/16V_4 C197 22U VCCSUS3_3[10]
VCCTX_LVDS[4] AT45 AD39 VCCME[2] VCCSUS3_3[11] L28
VCC CORE C183 1U/6.3V_4 AD41
VCCSUS3_3[12] L26
J28
+1.05V 3.208A AK24 VCCIO[24] VCC3_3[2] AB34 0.357A +3V
C180 1U/6.3V_4 AF43
VCCME[3] VCCSUS3_3[13]
VCCSUS3_3[14] J26
H28
+V1.1LAN_VCCAPLL_EXP VCCME[4] VCCSUS3_3[15]
TP9 BJ24 VCCAPLLEXP VCC3_3[3] AB35 VCCSUS3_3[16] H26
C204 .1U/10V_4 C187 1U/6.3V_4
AN20
HVCMOS AD35
AF41 VCCME[5] VCCSUS3_3[17] G28
G26
+1.05V 3.208A AN22
VCCIO[25]
VCCIO[26]
VCC3_3[4]
AF42 VCCME[6]
VCCSUS3_3[18]
VCCSUS3_3[19] F28

Clock and Miscellaneous


C254 10U/6.3V_6S AN23 F26
C236 1U/6.3V_4 VCCIO[27] VCCSUS3_3[20]
AN24 VCCIO[28] V39 VCCME[7] VCCSUS3_3[21] E28
C223 1U/6.3V_4 AN26 E26
C241
C235
1U/6.3V_4
1U/6.3V_4
AN28
VCCIO[29]
VCCIO[30] VCCVRM[2] AT24 0.035A +1.8V V41 VCCME[8]
VCCSUS3_3[22]
VCCSUS3_3[23] C28
BJ26 C26
AT16 0.061A
C238 .1U/10V_4 VCCIO[31] VCCSUS3_3[24]
BJ28 VCCIO[32] VCCDMI[1] +1.1V_VTT V42 VCCME[9] VCCSUS3_3[25] B27
B 11/11 C237 .1U/10V_4 AT26 VCCIO[33] DMI VCCSUS3_3[26] A28 B
C242 .1U/10V_4 AT28 AU16 Y39 A26
VCCIO[34] VCCDMI[2] C264 1U/6.3V_4 VCCME[10] VCCSUS3_3[27]
AU26 VCCIO[35]
AU28 VCCIO[36] Y41 VCCME[11] VCCSUS3_3[28] U23
AV26
AV28
VCCIO[37]
VCCIO[38] PCI E* VCCPNAND[1] AM16 Y42 VCCME[12] VCCIO[56] V23 3.208A +1.05V
AW26 AK16
AW28
VCCIO[39] VCCPNAND[2]
AK20 +VCCRTCEXT V9 F24 R152 >1mA
100/F_4
BA26
VCCIO[40]
VCCIO[41]
VCCPNAND[3]
VCCPNAND[4] AK19 0.156A +1.8V C297 .1U/10V_4 DCPRTC V5REF_SUS
D11
+5VS5
RB500V-40 +3VS5
BA28 AK15
BB26
VCCIO[42]
VCCIO[43]
VCCPNAND[5]
VCCPNAND[6] AK13 +1.8V 0.072A AU24 VCCVRM[3]
BB28 VCCIO[44] VCCPNAND[7] AM12 C255 .1U/10V_4 C253 1U/6.3V_4
BC26 AM13
BC28
VCCIO[45]
VCCIO[46]
VCCPNAND[8]
VCCPNAND[9] AM15 0.073A +1.05V R795 0_6 +1.05V_VCCADPLL BB51
VCCADPLLA[1]
>1mA
BD26 VCCIO[47] BB53 VCCADPLLA[2]
BD28 +1.05V R803 0_6 K49 R103 100/F_4 +5V
VCCIO[48] V5REF
BE26 VCCIO[49] NAND / SPI
BE28 C146 1U/6.3V_4 BD51 D10 RB500V-40 +3V
VCCIO[50] C161 1U/6.3V_4 VCCADPLLB[1]
BG26 AM8 BD53 PCI/GPIO/LPC
BG28
VCCIO[51]
VCCIO[52]
VCCME3_3[1]
VCCME3_3[2] AM9 0.085A +3V
3.208A
VCCADPLLB[2] C154 1U/6.3V_4
BH27 AP11 AH23
AN30
VCCIO[53]
VCCIO[54]
VCCME3_3[3]
VCCME3_3[4] AP9
C296 .1U/10V_4
+1.05V
C231 1U/6.3V_4
AJ35
VCCIO[21]
VCCIO[22] VCC3_3[8] J38 0.357A
C214 .1U/10V_4
+3V
AN31 VCCIO[55] AH35 VCCIO[23] VCC3_3[9] L38
C225 1U/6.3V_4 AF34 M36 C188 .1U/10V_4
+3V 0.357A AN35 VCC3_3[1]
C205 1U/6.3V_4 AH34
VCCIO[2]
VCCIO[3]
VCC3_3[10]
VCC3_3[11] N36
AF32 VCCIO[4] VCC3_3[12] P36
U35
+1.8V 0.035A AT22 VCCVRM[1] C267 .1U/10V_4 +VCCSST
VCC3_3[13]
VCC3_3[14] AD13

+V1.1LAN_VCCAPLL_FDI BJ18
FDI V12 DCPSST
C TP10 VCCFDIPLL C
+V1.1LAN_INT_VCCSUS Y22
+1.05V 3.208A AM23 VCCIO[1]
C250 .1U/10V_4
1208 Intel recommend
DCPSUS
3.208A
PCI/GPIO/LPC VCCSATAPLL[1] AK3
IbexPeak-M_Rev1_0 P18 AK1 +V1.1LAN_VCCAPLL
+3VS5 0.163A U19
VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSATAPLL[2] TP12
U20 VCCSUS3_3[31]
C229 .1U/10V_4 U22 AT20
UMA Only VCCSUS3_3[32] VCCVRM[4] +1.8V
+5V
U7
+3V_LDO V15 VCC3_3[5] VCCIO[9] AH22 0.035A +1.05V
V16 AH19
*G910T21U +3V 0.357A
C263 .1U/10V_4
Y16
VCC3_3[6]
VCC3_3[7]
VCCIO[10]
VCCIO[11] AD20 C220 1U/6.3V_4
3 Vin Vout 1 VCCIO[12] AF22
AD19
GND

+1.1V_VTT >1mA
C266 4.7U/6.3V_6
AT18
AU18
V_CPU_IO[1]
VCCIO[13]
VCCIO[14] AF20

C118 C256 .1U/10V_4 V_CPU_IO[2] SATA VCCIO[15] AF19


CPU AH20
2

*1U/6.3V_4 C265 .1U/10V_4 VCCIO[16]


VCCIO[17] AB19
AB20
+RTC_CELL 2mA
C299 .1U/10V_4
A12 VCCRTC
VCCIO[18]
VCCIO[19] AB22
RTC VCCIO[20] AD22
C300 .1U/10V_4

+3VS5 6mA L30 VCCSUSHDA VCCME[13] AA34 1.998A +1.05V


VCCME[14] Y34
C228 1U/6.3V_4 HDA Y35
VCCME[15]
VCCME[16] AA35

D
IbexPeak-M_Rev1_0 D

[2,7,8,9,27,31,33,34,39] +1.05V
[3,5,10,31,34,35] +1.1V_VTT
PROJECT : SW9
[5,10,33,37,39] +1.8V Quanta Computer Inc.
[2,3,7,8,9,10,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V
[3,8,9,10,14,37] +3VS5
[19,20,22,23,25,26,28,30,37] +5V Size Document Number Rev
Custom 1A
[37] +5VS5 PCH 5/5 (POWER)
Date: W ednesday, December 02, 2009 Sheet 11of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

12
JDIM1A M_A_DQ[63:0] [4]
[4] M_A_A[15:0]
A M_A_A0 98 5 M_A_DQ0 A
M_A_A1 A0 DQ0 M_A_DQ1 +1.5VSUS +1.5VSUS +1.5VSUS_CPU
97 A1 DQ1 7
M_A_A2 96 15 M_A_DQ2
M_A_A3 A2 DQ2 M_A_DQ3
95 A3 DQ3 17
M_A_A4 92 4 M_A_DQ4
M_A_A5 A4 DQ4 M_A_DQ5 JDIM1B C514 .1U/10V_4
91 A5 DQ5 6
M_A_A6 90 16 M_A_DQ6 75 44
M_A_A7 A6 DQ6 M_A_DQ7 VDD1 VSS16 C530 .1U/10V_4
86 A7 DQ7 18 EMI +1.5VSUS
76 VDD2 VSS17 48
M_A_A8 89 21 M_A_DQ8 81 49
M_A_A9 A8 DQ8 M_A_DQ9 VDD3 VSS18 C541 .1U/10V_4
85 A9 DQ9 23 82 VDD4 VSS19 54
M_A_A10 107 33 M_A_DQ10 87 55
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD5 VSS20 C542 .1U/10V_4
84 A11 DQ11 35 88 VDD6 VSS21 60
M_A_A12 83 22 M_A_DQ12 C342 C320 C321 93 61
SO-DIMMA SPD Address is 0XA0 M_A_A13 A12/BC# DQ12 M_A_DQ13 .22U/10V_4 .22U/10V_4 .22U/10V_4 VDD7 VSS22
119 A13 DQ13 24 94 VDD8 VSS23 65
SO-DIMMA TS Address is 0X30 M_A_A14 80 34 M_A_DQ14 99 66
M_A_A15 A14 DQ14 M_A_DQ15 VDD9 VSS24
78 A15 DQ15 36 100 VDD10 VSS25 71
39 M_A_DQ16 105 72
DQ16 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


[4] M_A_BS#0 109 41 M_A_DQ17 106 127

PC2100 DDR3 SDRAM SO-DIMM


BA0 DQ17 M_A_DQ18 VDD12 VSS27 +0.75V_DDR_VTT
[4] M_A_BS#1 108 BA1 DQ18 51 111 VDD13 VSS28 128
[4] M_A_BS#2 79 53 M_A_DQ19 112 133
BA2 DQ19 M_A_DQ20 VDD14 VSS29
[4] M_A_CS#0 114 S0# DQ20 40 117 VDD15 VSS30 134
[4] M_A_CS#1 121 42 M_A_DQ21 118 138
S1# DQ21 M_A_DQ22 VDD16 VSS31
[4] M_A_CLK0 101 CK0 DQ22 50 123 VDD17 VSS32 139
[4] M_A_CLK0# 103 52 M_A_DQ23 124 144 R11
CK0# DQ23 M_A_DQ24 VDD18 VSS33
[4] M_A_CLK1 102 CK1 DQ24 57 VSS34 145 27_6
[4] M_A_CLK1# 104 59 M_A_DQ25 +3V 199 150
CK1# DQ25 M_A_DQ26 VDDSPD VSS35
[4] M_A_CKE0 73 CKE0 DQ26 67 VSS36 151
[4] M_A_CKE1 74 69 M_A_DQ27 77 155
CKE1 DQ27 M_A_DQ28 NC1 VSS37
[4] M_A_CAS# 115 CAS# DQ28 56 122 NC2 VSS38 156
B [4] M_A_RAS# 110 58 M_A_DQ29 +3V R154 *10K/F_4 125 161 DS_0.75VS B
RAS# DQ29 M_A_DQ30 NCTEST VSS39
[4] M_A_W E# 113 WE# DQ30 68 VSS40 162

3
R159 10K/F_4 DIMM0_SA0 197 70 M_A_DQ31 [3] PM_EXTTS#0 PM_EXTTS#0 198 167
R160 10K/F_4 DIMM0_SA1 SA0 DQ31 M_A_DQ32 C_DDR3_DRAMRST# EVENT# VSS41
201 SA1 DQ32 129 [13] C_DDR3_DRAMRST# 30 RESET# VSS42 168
[2,8,13] CGCLK_SMB 202 131 M_A_DQ33 172
SCL DQ33 M_A_DQ34 VSS43
[2,8,13] CGDAT_SMB 200 SDA DQ34 141 VSS44 173 [5,37] MAINON_G 2
143 M_A_DQ35 SMDDR_VREF_DQ0_M2 R28 0_4 SMDDR_VREF_DQ0 1 178 Q36
DQ35 M_A_DQ36 SMDDR_VREF_DIMM 126 VREF_DQ VSS45 BSS138
[4] M_A_ODT0 116 ODT0 DQ36 130 VREF_CA VSS46 179
[4] M_A_ODT1 120 132 M_A_DQ37 184
ODT1 DQ37 M_A_DQ38 VSS47
[4] M_A_DM[7:0] 140 185

1
M_A_DM0 DQ38 M_A_DQ39 VSS48
11 DM0 DQ39 142 2 VSS1 VSS49 189
M_A_DM1 28 147 M_A_DQ40 3 190
M_A_DM2 DM1 DQ40 M_A_DQ41 VSS2 VSS50
46 DM2 DQ41 149 SMDDR_VREF_DIMM [13] 8 VSS3 VSS51 195
M_A_DM3 M_A_DQ42

(204P)
63 157 9 196
(204P)

M_A_DM4 DM3 DQ42 M_A_DQ43 R74 0_4 VSS4 VSS52


136 DM4 DQ43 159 DDR_VTTREF [36] 13 VSS5
M_A_DM5 153 146 M_A_DQ44 14
M_A_DM6 DM5 DQ44 M_A_DQ45 VSS6
170 DM6 DQ45 148 19 VSS7
M_A_DM7 187 158 M_A_DQ46 20 +0.75V_DDR_VTT
DM7 DQ46 M_A_DQ47 C498 VSS8
[4] M_A_DQS[7:0] DQ47 160 25 VSS9
M_A_DQS0 12 163 M_A_DQ48 C_DDR3_DRAMRST# 1 2 26 203
M_A_DQS1 DQS0 DQ48 M_A_DQ49 VSS10 VTT1
29 DQS1 DQ49 165 31 VSS11 VTT2 204
M_A_DQS2 47 175 M_A_DQ50 32
M_A_DQS3 DQS2 DQ50 M_A_DQ51 33P/50V_4 VSS12
64 DQS3 DQ51 177 37 VSS13 EMI
M_A_DQS4 137 164 M_A_DQ52 38 C346 C347
M_A_DQS5 DQS4 DQ52 M_A_DQ53 VSS14 .22U/10V_4 .22U/10V_4
154 166 43

GND

GND
M_A_DQS6 DQS5 DQ53 M_A_DQ54 VSS15
171 DQS6 DQ54 174
[4] M_A_DQS#[7:0] M_A_DQS7 188 176 M_A_DQ55
M_A_DQS#0 DQS7 DQ55 M_A_DQ56 R235 DDR3-DIMM0
10 181 +1.5VSUS

205

206
M_A_DQS#1 DQS#0 DQ56 M_A_DQ57 1K/F_4
27 DQS#1 DQ57 183
C
M_A_DQS#2 45 191 M_A_DQ58 C
M_A_DQS#3 DQS#2 DQ58 M_A_DQ59
62 DQS#3 DQ59 193
M_A_DQS#4 135 180 M_A_DQ60
M_A_DQS#5 DQS#4 DQ60 M_A_DQ61
152 DQS#5 DQ61 182
M_A_DQS#6 169 192 M_A_DQ62
M_A_DQS#7 DQS#6 DQ62 M_A_DQ63
186 DQS#7 DQ63 194

DDR3-DIMM0
R44 *0_4

[3] DDR3_DRAMRST# 1 3

R53 C322 Q39


100K/F_4 4700P/25V_4 2 BSS138
Place these Caps near So-Dimm0.
11/6 PS_S3RSTGATE

+1.5VSUS 10/9
+0.75V_DDR_VTT
C61 10U/6.3V_6S C103 470P/50V_4
C88 10U/6.3V_6S C292 1U/6.3V_4 SMDDR_VREF_DQ0_M2
C83 10U/6.3V_6S C592 1U/6.3V_4
C53 10U/6.3V_6S C294 1U/6.3V_4
C65 10U/6.3V_6S C293 1U/6.3V_4 R66 R71 +1.5VSUS
C98 10U/6.3V_6S C586 *10U/6.3V_8 1K/F_4 1K/F_4 [13,36] +0.75V_DDR_VTT
C73 1U C587 *10U/6.3V_8 [5,13,36,37,39] +1.5VSUS
D
C48 1U C590 10U/6.3V_6S [2,3,7,8,9,10,11,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V D
C91 1U [7,19,21,23,26,27,28,31,32,33,35,37,38,39] +3VPCU
C60 1U R27 *0_4 SMDDR_VREF_DQ0 [27,31,32,33,34,35,36,37] +5VPCU
C68 1U SMDDR_VREF_DQ0

C178 .1U/10V_4 1 3
+3V [6] DDR_VREF_DQ0
C171 2.2U/6.3V_6 Q37
AO3402 PROJECT : SW9
C246 2.2U/6.3V_6 SMDDR_VREF_DIMM R58
Quanta Computer Inc.
2

C249 .1U/10V_4 100K/F_4


C107 .1U/10V_4
C109 2.2U/6.3V_6 PS_S3RSTGATE PS_S3RSTGATE [10,13] Size Document Number Rev
Custom 1A
DDR3 DIMM-0
Date: W ednesday, December 02, 2009 Sheet 12 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

13
JDIM2A M_B_DQ[63:0] [4]
[4] M_B_A[15:0] +1.5VSUS
M_B_A0 98 5 M_B_DQ0
M_B_A1 A0 DQ0 M_B_DQ1
A 97 A1 DQ1 7 A
M_B_A2 96 15 M_B_DQ2
M_B_A3 A2 DQ2 M_B_DQ3
95 A3 DQ3 17 JDIM2B
M_B_A4 92 4 M_B_DQ4
M_B_A5 A4 DQ4 M_B_DQ5
91 A5 DQ5 6 75 VDD1 VSS16 44
M_B_A6 90 16 M_B_DQ6 76 48
M_B_A7 A6 DQ6 M_B_DQ7 VDD2 VSS17
86 A7 DQ7 18 81 VDD3 VSS18 49
M_B_A8 89 21 M_B_DQ8 82 54
M_B_A9 A8 DQ8 M_B_DQ9 VDD4 VSS19
85 A9 DQ9 23 87 VDD5 VSS20 55
M_B_A10 107 33 M_B_DQ10 88 60
M_B_A11 A10/AP DQ10 M_B_DQ11 VDD6 VSS21
84 A11 DQ11 35 93 VDD7 VSS22 61
M_B_A12 83 22 M_B_DQ12 94 65
M_B_A13 A12/BC# DQ12 M_B_DQ13 VDD8 VSS23
119 A13 DQ13 24 99 VDD9 VSS24 66
M_B_A14 80 34 M_B_DQ14 100 71
M_B_A15 A14 DQ14 M_B_DQ15 VDD10 VSS25
78 A15 DQ15 36 105 VDD11 VSS26 72
39 M_B_DQ16 106 127

PC2100 DDR3 SDRAM SO-DIMM


DQ16 M_B_DQ17 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


[4] M_B_BS#0 109 BA0 DQ17 41 111 VDD13 VSS28 128
[4] M_B_BS#1 108 51 M_B_DQ18 112 133
BA1 DQ18 M_B_DQ19 VDD14 VSS29
[4] M_B_BS#2 79 BA2 DQ19 53 117 VDD15 VSS30 134
[4] M_B_CS#0 114 40 M_B_DQ20 118 138
S0# DQ20 M_B_DQ21 VDD16 VSS31
[4] M_B_CS#1 121 S1# DQ21 42 123 VDD17 VSS32 139
[4] M_B_CLK0 101 50 M_B_DQ22 124 144
CK0 DQ22 M_B_DQ23 VDD18 VSS33
[4] M_B_CLK0# 103 CK0# DQ23 52 VSS34 145
[4] M_B_CLK1 102 57 M_B_DQ24 199 150
CK1 DQ24 +3V VDDSPD VSS35
[4] M_B_CLK1# 104 59 M_B_DQ25 151
CK1# DQ25 M_B_DQ26 VSS36
[4] M_B_CKE0 73 CKE0 DQ26 67 77 NC1 VSS37 155
[4] M_B_CKE1 74 69 M_B_DQ27 122 156
CKE1 DQ27 M_B_DQ28 R149 *10K/F_4 NC2 VSS38
[4] M_B_CAS# 115 CAS# DQ28 56 +3V 125 NCTEST VSS39 161
[4] M_B_RAS# 110 58 M_B_DQ29 162
RAS# DQ29 M_B_DQ30 PM_EXTTS#1 VSS40
B [4] M_B_W E# 113 WE# DQ30 68 [3] PM_EXTTS#1 198 EVENT# VSS41 167 B
R147 10K/F_4 DIMM1_SA0 197 70 M_B_DQ31 [12] C_DDR3_DRAMRST# 30 168
10K/F_4 DIMM1_SA1 SA0 DQ31 M_B_DQ32 RESET# VSS42
+3V R148 201 SA1 DQ32 129 VSS43 172
[2,8,12] CGCLK_SMB 202 131 M_B_DQ33 173
SCL DQ33 M_B_DQ34 SMDDR_VREF_DQ1 VSS44
[2,8,12] CGDAT_SMB 200 SDA DQ34 141 1 VREF_DQ VSS45 178
143 M_B_DQ35 [12] SMDDR_VREF_DIMM 126 179
DQ35 M_B_DQ36 VREF_CA VSS46
[4] M_B_ODT0 116 ODT0 DQ36 130 VSS47 184
[4] M_B_ODT1 120 132 M_B_DQ37 185
ODT1 DQ37 M_B_DQ38 VSS48
[4] M_B_DM[7:0] DQ38 140 2 VSS1 VSS49 189
M_B_DM0 11 142 M_B_DQ39 3 190
SO-DIMMB SPD Address is 0XA4 M_B_DM1 DM0 DQ39 M_B_DQ40 VSS2 VSS50
28 DM1 DQ40 147 8 VSS3 VSS51 195
M_B_DM2 M_B_DQ41

(204P)
SO-DIMMB TS Address is 0X34 46 DM2 DQ41 149 9 VSS4 VSS52 196
M_B_DM3 63 157 M_B_DQ42 C507 13
(204P)

M_B_DM4 DM3 DQ42 M_B_DQ43 33P/50V_4 VSS5


136 DM4 DQ43 159 14 VSS6
M_B_DM5 153 146 M_B_DQ44 19
M_B_DM6 DM5 DQ44 M_B_DQ45 C_DDR3_DRAMRST# 1 VSS7
170 DM6 DQ45 148 2 20 VSS8
M_B_DM7 187 158 M_B_DQ46 25
DM7 DQ46 M_B_DQ47 VSS9
[4] M_B_DQS[7:0] DQ47 160 26 VSS10 VTT1 203 +0.75V_DDR_VTT
M_B_DQS0 12 163 M_B_DQ48 31 204
M_B_DQS1 DQS0 DQ48 M_B_DQ49 VSS11 VTT2
29 DQS1 DQ49 165 32 VSS12
M_B_DQS2 47 175 M_B_DQ50 37
M_B_DQS3 DQS2 DQ50 M_B_DQ51 VSS13
64 DQS3 DQ51 177 38 VSS14
M_B_DQS4 137 164 M_B_DQ52 43

GND

GND
M_B_DQS5 DQS4 DQ52 M_B_DQ53 VSS15
154 DQS5 DQ53 166
M_B_DQS6 171 174 M_B_DQ54
M_B_DQS7 DQS6 DQ54 M_B_DQ55 DDR3-DIMM1
[4] M_B_DQS#[7:0] 188 176

205

206
M_B_DQS#0 DQS7 DQ55 M_B_DQ56
10 DQS#0 DQ56 181
M_B_DQS#1 27 183 M_B_DQ57
M_B_DQS#2 DQS#1 DQ57 M_B_DQ58
45 DQS#2 DQ58 191
C
M_B_DQS#3 62 193 M_B_DQ59 C
M_B_DQS#4 DQS#3 DQ59 M_B_DQ60
135 DQS#4 DQ60 180
M_B_DQS#5 152 182 M_B_DQ61
M_B_DQS#6 DQS#5 DQ61 M_B_DQ62
169 DQS#6 DQ62 192
M_B_DQS#7 186 194 M_B_DQ63
DQS#7 DQ63

DDR3-DIMM1

C186 470P/50V_4
SMDDR_VREF_DQ1_M2 R138 0_4 SMDDR_VREF_DQ1

R134 R104
Place these Caps near So-Dimm1. 1K/F_4 1K/F_4
+1.5VSUS

+1.5VSUS +0.75V_DDR_VTT

C64 10U/6.3V_6S C258 1U/6.3V_4


C71 10U/6.3V_6S C591 1U/6.3V_4 R490 *0_4
C75 10U/6.3V_6S C257 1U/6.3V_4
C85 10U/6.3V_6S C259 1U/6.3V_4
C44 10U/6.3V_6S C261 *10U/6.3V_8 [6] DDR_VREF_DQ1 1 3
C80 10U/6.3V_6S C589 10U/6.3V_6S Q38 [12,36] +0.75V_DDR_VTT
D
C72 1U C260 10U/6.3V_6S AO3402 [5,12,36,37,39] +1.5VSUS D
C47 1U [2,3,7,8,9,10,11,12,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V
2

C77 1U R244 [7,19,21,23,26,27,28,31,32,33,35,37,38,39] +3VPCU


C62 1U SMDDR_VREF_DIMM 100K/F_4 [27,31,32,33,34,35,36,37] +5VPCU
C57 1U PS_S3RSTGATE [10,12]
C108 .1U/10V_4
C96 2.2U/6.3V_6
PROJECT : SW9
+3V
SMDDR_VREF_DQ1 Quanta Computer Inc.
C245 2.2U/6.3V_6
C248 .1U/10V_4 C213 .1U/10V_4 Size Document Number Rev
C212 2.2U/6.3V_6 Custom 1A
DDR3 DIMM-1
Date: W ednesday, December 02, 2009 Sheet 13 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1

+1.05V_GFX ~C134
500mA
*.1U/10V_4
AC9
U27A
PBGA533-NVIDIA-GEFORCE6250
N10M

PEX_IOVDD_01
1/13 PCI_EXPRESS
(NC) PEX_CLKREQ AE9 PEX_CLKREQ# R81
+3V_GFX

*10K/F_4
14
AD7 PEX_IOVDD_02 PEX_RST* AD9 VGA_RST# R80 *100/F_4
PEGX_RST# [29]
C155 *.1U/10V_4 AD8
C110
C149
C551
*1U/6.3V_4
*1U/6.3V_4
*4.7U/6.3V_6
AE7
AF7
PEX_IOVDD_03
PEX_IOVDD_04
PEX_IOVDD_05 PEX_REFCLK AB10 CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_VGA [8]
power up sequence
AG7 PEX_IOVDD_06 PEX_REFCLK* AC10 CLK_PCIE_VGA# [8]
C556 *10U/6.3V_6S
D C81 *22U AD10 C_PEG_RX0 C99 *.1U/10V_4 D
PEX_TX0 PEG_RX15 [3]
AB13 AD11 C_PEG_RX#0C100 *.1U/10V_4
PEX_IOVDDQ_01 PEX_TX0* PEG_RX#15 [3]
AB16 AD12 C_PEG_RX1 C101 *.1U/10V_4
+1.05V_GFX 1600mA
C142 *.1U/10V_4
AB17
PEX_IOVDDQ_02
PEX_IOVDDQ_03
PEX_TX1
PEX_TX1* AC12 C_PEG_RX#1C105
C_PEG_RX2 C94
*.1U/10V_4
*.1U/10V_4
PEG_RX14 [3]
PEG_RX#14 [3]
AB7 PEX_IOVDDQ_04 PEX_TX2 AB11 PEG_RX13 [3] PXE 1.05VDD
C122 *.1U/10V_4 AB8 AB12 C_PEG_RX#2C97 *.1U/10V_4
PEX_IOVDDQ_05 PEX_TX2* PEG_RX#13 [3]
C87 *1U/6.3V_4 AB9 AD13 C_PEG_RX3 C106 *.1U/10V_4
PEX_IOVDDQ_06 PEX_TX3 PEG_RX12 [3]
C121 *1U/6.3V_4 AC13 AD14 C_PEG_RX#3C112 *.1U/10V_4
PEX_IOVDDQ_07 PEX_TX3* PEG_RX#12 [3]
C552 *4.7U/6.3V_6 AC7 AD15 C_PEG_RX4 C113 *.1U/10V_4
PEX_IOVDDQ_08 PEX_TX4 PEG_RX11 [3]
C559 *10U/6.3V_6S AD6 AC15 C_PEG_RX#4C119 *.1U/10V_4 I/O 3.3V
PEX_IOVDDQ_09 PEX_TX4* PEG_RX#11 [3]
C548 *22U AE6 AB14 C_PEG_RX5 C120 *.1U/10V_4
PEX_IOVDDQ_10 PEX_TX5 PEG_RX10 [3]
AF6 AB15 C_PEG_RX#5C129 *.1U/10V_4
PEX_IOVDDQ_11 PEX_TX5* PEG_RX#10 [3]
AG6 AC16 C_PEG_RX6 C130 *.1U/10V_4
PEX_IOVDDQ_12 PEX_TX6 PEG_RX9 [3]
AD16 C_PEG_RX#6C135 *.1U/10V_4
+VGACORE PEX_TX6* PEG_RX#9 [3]
AD17 C_PEG_RX7 C136 *.1U/10V_4 NVCORE
PEX_TX7 PEG_RX8 [3]
AD18 C_PEG_RX#7C140 *.1U/10V_4
PEX_TX7* PEG_RX#8 [3]
AC18 C_PEG_RX8 C143 *.1U/10V_4
PLACE UNDER BALLS
C138 *.01U/16V_4
10.87A J10 PEX_TX8
PEX_TX8* AB18
AB19
C_PEG_RX#8C147
C_PEG_RX9 C150
*.1U/10V_4
*.1U/10V_4
PEG_RX7 [3]
PEG_RX#7 [3]
VDD_01 PEX_TX9 PEG_RX6 [3]
C141 *.01U/16V_4 J12 AB20 C_PEG_RX#9C156 *.1U/10V_4 1.8VFBDDQ
VDD_02 PEX_TX9* PEG_RX#6 [3]
C128 *.01U/16V_4 J13 AD19 C_PEG_RX10C158 *.1U/10V_4
VDD_03 PEX_TX10 PEG_RX5 [3]
C162 *.01U/16V_4 J9 AD20 C_PEG_RX#10
C167 *.1U/10V_4
VDD_04 PEX_TX10* PEG_RX#5 [3]
C127 *.01U/16V_4 L9 AD21 C_PEG_RX11C168 *.1U/10V_4
VDD_05 PEX_TX11 PEG_RX4 [3]
C139 *.01U/16V_4 M11 AC21 C_PEG_RX#11
C176 *.1U/10V_4
VDD_06 PEX_TX11* PEG_RX#4 [3]
C165 *.047U/25V_4 M17 AB21 C_PEG_RX12C177 *.1U/10V_4
VDD_07 PEX_TX12 PEG_RX3 [3]
C169 *.047U/25V_4 M9 AB22 C_PEG_RX#12
C181 *.1U/10V_4 NB9M: VGACORE +0.90V (Normal) , +1.09V
VDD_08 PEX_TX12* PEG_RX#3 [3]
C166 *.047U/25V_4 N11 AC22 C_PEG_RX13C185 *.1U/10V_4
VDD_09 PEX_TX13 PEG_RX2 [3]
C126 *.1U/10V_4 N12 AD22 C_PEG_RX#13
C190 *.1U/10V_4
N13
VDD_10 PEX_TX13*
AD23 C_PEG_RX14C194 *.1U/10V_4
PEG_RX#2 [3]
PEG_RX1 [3]
NVVDD Maximum Settling Time
PLACE NEAR BALLS VDD_11 PEX_TX14 C_PEG_RX#14
C199 *.1U/10V_4
C N14 VDD_12 PEX_TX14* AD24 PEG_RX#1 [3] C
C174 *4.7U/6.3V_6 N15 AE25 C_PEG_RX15C203 *.1U/10V_4
VDD_13 PEX_TX15 PEG_RX0 [3]
N16 AE26 C_PEG_RX#15
C210 *.1U/10V_4
VDD_14 PEX_TX15* PEG_RX#0 [3]
N17 VDD_15
2 1 N19 VDD_16
+

N9 VDD_17
C144 7/22 P11 NVVDD
*330u_2.5V_3528 VDD_18
P12 VDD_19
P13 VDD_20
P14 VDD_21
P15 VDD_22
P16 AE12 PEG_TX15
VDD_23 PEX_RX0 PEG_TX15 [3]
P17 AF12 PEG_TX#15
VDD_24 PEX_RX0* PEG_TX#15 [3]
R11 AG12 PEG_TX14
VDD_25 PEX_RX1 PEG_TX14 [3]
R12 AG13 PEG_TX#14
VDD_26 PEX_RX1* PEG_TX#14 [3]
R13 AF13 PEG_TX13
VDD_27 PEX_RX2 PEG_TX13 [3]
R14 AE13 PEG_TX#13
VDD_28 PEX_RX2* PEG_TX#13 [3]
R15 AE15 PEG_TX12
VDD_29 PEX_RX3 PEG_TX12 [3]
R16 AF15 PEG_TX#12 GPIO
VDD_30 PEX_RX3* PEG_TX#12 [3]
R17 AG15 PEG_TX11
VDD_31 PEX_RX4 PEG_TX11 [3]
R9 AG16 PEG_TX#11
VDD_32 PEX_RX4* PEG_TX#11 [3]
T11 AF16 PEG_TX10
VDD_33 PEX_RX5 PEG_TX10 [3]
T17 AE16 PEG_TX#10
VDD_34 PEX_RX5* PEG_TX#10 [3]
T9 AE18 PEG_TX9
VDD_35 PEX_RX6 PEG_TX9 [3]
U19 AF18 PEG_TX#9 tsNVVDD<= 192us
VDD_36 PEX_RX6* PEG_TX#9 [3]
U9 AG18 PEG_TX8
VDD_37 PEX_RX7 PEG_TX8 [3]
W10 AG19 PEG_TX#8
VDD_38 PEX_RX7* PEG_TX#8 [3]
W12 AF19 PEG_TX7
VDD_39 PEX_RX8 PEG_TX7 [3]
W13 AE19 PEG_TX#7
VDD_40 PEX_RX8* PEG_TX#7 [3]
B W18 AE21 PEG_TX6 B
VDD_41 PEX_RX9 PEG_TX6 [3]
W19 AF21 PEG_TX#6
VDD_42 PEX_RX9* PEG_TX#6 [3]
W9 AG21 PEG_TX5
VDD_43 PEX_RX10 PEG_TX5 [3]
AG22 PEG_TX#5
PEX_RX10* PEG_TX#5 [3]
GPU_VDD_SENSE W15 AF22 PEG_TX4
[35] GPU_VDD_SENSE
W16
VDD_SENSE PEX_RX11
AE22 PEG_TX#4
PEG_TX4 [3] For Switchable only
E15
GND_SENSE PEX_RX11*
AE24 PEG_TX3
PEG_TX#4 [3]
PEG_TX3 [3]
PEX_RST timing
VDD_SENSE (NC) PEX_RX12 PEG_TX#3 +3V_GFX
E14 GND_SENSE (GND) PEX_RX12* AF24 PEG_TX#3 [3]
AG24 PEG_TX2
+3V_GFX 80mA
C160 *4.7U/6.3V_6
A12 VDD33_01
PEX_RX13
PEX_RX13* AF25 PEG_TX#2
PEG_TX1
PEG_TX2 [3]
PEG_TX#2 [3]
R633 *10K/F_4 +3VS5
B12 VDD33_02 PEX_RX14 AG25 PEG_TX1 [3]
+1.05V_GFX C137 *1U/6.3V_4 C12 AG26 PEG_TX#1 I/O 3.3V
VDD33_03 PEX_RX14* PEG_TX#1 [3]
C145 *.1U/10V_4 D12 AF27 PEG_TX0 R634
VDD33_04 PEX_RX15 PEG_TX0 [3] PEG_CLKREQ# [8]
C546 *4.7U/6.3V_6 C102 *.1U/10V_4 E12 AE27 PEG_TX#0 *10K/F_4
VDD33_05 PEX_RX15* PEG_TX#0 [3]
L24 C95 *.1U/10V_4 F12 PEX_RST
VDD33_06

3
*100nH_6
C553 *.01U/16V_4 Q32
C554 *.1U/10V_4
C555 *1U/6.3V_4
+PEX_PLLVDD 110mA AF9 PEX_PLLVDD
CLKRQ1 2 *DTC144EUA

12~16 mils
3
Trise >= 1uS Tfail <=500nS
R442 *200_4 AE10 Q34

1
PEX_TSTCLK_OUT*
+3V_GFX L25 *0_6 AF10 PEX_TSTCLK_OUT
PEX_CLKREQ# 2 *DTC144EUA
C557 *.01U/16V_4
C558 *.1U/10V_4 +PEX_SVDD_3V3 AG9 PEG_SVDD (NC)
1

*2.49K/F_4 R432 PEX_TERMP AG10 PEX_TERMP

A A

PROJECT : SW9
VGA Thermal Circuit ==> Del 6/16 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
N10M-GE (PCIE I/F) 1/5
Date: W ednesday, December 02, 2009 Sheet 14 of 44
5 4 3 2 1
5 4 3 2 1
U27B
+1.5V_GFX

15
PBGA533-NVIDIA-GEFORCE6250
1.63A N10M
U27I
N10M
C172 *0.047U/16V_4 A13 2/13 FRAME_BUFFER PBGA533-NVIDIA-GEFORCE6250
C159 *0.047U/16V_4 FBVDDQ_01 VMA_DQ0
B13 FBVDDQ_02 (FBA_D8) FBA_D0 D22 13/13 GND_NC
C179 *0.047U/16V_4 C13 E24 VMA_DQ1 C15
C151 *.1U/10V_4 FBVDDQ_03 (FBA_D10) FBA_D1 VMA_DQ2 NC_01
D13 FBVDDQ_04 (FBA_D9) FBA_D2 E22 AC11 GND_01 NC_02 D15
C148 *.1U/10V_4 D14 D24 VMA_DQ3 AC14 J5
C164 *.1U/10V_4 FBVDDQ_05 (FBA_D11) FBA_D3 VMA_DQ4 GND_02 NC_03
E13 FBVDDQ_06 (FBA_D12) FBA_D4 D26 AC17 GND_03
C173 *4.7U/6.3V_6 F13 D27 VMA_DQ5 AC2
FBVDDQ_07 (FBA_D13) FBA_D5 [18] VMA_DQ[63..0] GND_04
F14 C27 VMA_DQ6 AC20
FBVDDQ_08 (FBA_D14) FBA_D6 VMA_DQ7 GND_05
F15 FBVDDQ_09 (FBA_D15) FBA_D7 B27 [18] VMA_DM[7..0] AC23 GND_06
F16 A21 VMA_DQ8 AC26
FBVDDQ_10 (FBA_D31) FBA_D8 VMA_DQ9 GND_07
D F17 FBVDDQ_11 (FBA_D30) FBA_D9 B21 [18] VMA_W DQS[7..0] AC5 GND_08 D
F19 C21 VMA_DQ10 AC8
FBVDDQ_12 (FBA_D29) FBA_D10 VMA_DQ11 GND_09
F22 FBVDDQ_13 (FBA_D28) FBA_D11 C19 [18] VMA_RDQS[7..0] AF11 GND_10
H23 C18 VMA_DQ12 AF14
FBVDDQ_14 (FBA_D26) FBA_D14 VMA_DQ13 GND_11
H26 FBVDDQ_15 (FBA_D27) FBA_D14 D18 AF17 GND_12
J15 B18 VMA_DQ14 AF2
FBVDDQ_16 (FBA_D25) FBA_D14 VMA_DQ15 GND_13
J16 FBVDDQ_17 (FBA_D24) FBA_D15 C16 AF20 GND_14
J18 E21 VMA_DQ16 AF23
FBVDDQ_18 (FBA_D22) FBA_D16 VMA_DQ17 GND_15
J19 FBVDDQ_19 (FBA_D23) FBA_D17 F21 AF26 GND_16
L19 D20 VMA_DQ18 AF5
FBVDDQ_20 (FBA_D20) FBA_D18 VMA_DQ19 GND_17
L23 FBVDDQ_21 (FBA_D21) FBA_D19 F20 AF8 GND_18
L26 D17 VMA_DQ20 B11
FBVDDQ_22 (FBA_D18) FBA_D20 VMA_DQ21 GND_19
M19 FBVDDQ_23 (FBA_D19) FBA_D21 F18 B14 GND_20
N22 D16 VMA_DQ22
FBVDDQ_24 (FBA_D16) FBA_D22 VMA_DQ23 FBA_CMD28 R547 *10K/F_4
U22 FBVDDQ_25 (FBA_D17) FBA_D23 E16 B17 GND_21
Y22 A22 VMA_DQ24 B2
FBVDDQ_26 (FBA_D3) FBA_D24 VMA_DQ25 FBA_CMD7 R226 *10K/F_4 GND_22
(FBA_D4) FBA_D25 C24 B20 GND_23
D21 VMA_DQ26 B23
(FBA_D0) FBA_D26 VMA_DQ27 FBA_CMD15 R546 *10K/F_4 GND_24
(FBA_D2) FBA_D27 B22 B26 GND_25
[18] FBA_CMD0 F26 C22 VMA_DQ28 B5
FBA_CMD0 (FBA_D1) FBA_D28 VMA_DQ29 FBA_CMD18 R223 *10K/F_4 GND_26
[18] FBA_CMD1 J24 FBA_CMD1 (FBA_D6) FBA_D29 A25 B8 GND_27
[18] FBA_CMD2 F25 B25 VMA_DQ30 E11
FBA_CMD2 (FBA_D5) FBA_D30 VMA_DQ31 FBA_CMD30 R222 *10K/F_4 GND_28
[18] FBA_CMD3 M23 FBA_CMD3 (FBA_D7) FBA_D31 A26
[18] FBA_CMD4 N27 U24 VMA_DQ32 E17
FBA_CMD4 (FBA_D37) FBA_D32 VMA_DQ33 GND_30
[18] FBA_CMD5 M27 FBA_CMD5 (FBA_D39) FBA_D33 V24 E2 GND_31
[18] FBA_CMD6 K26 V23 VMA_DQ34 E20
FBA_CMD6 (FBA_D38) FBA_D35 VMA_DQ35 GND_32
[18] FBA_CMD7 J25 FBA_CMD7 (FBA_D35) FBA_D35 R24 E23 GND_33
[18] FBA_CMD8 J27 T23 VMA_DQ36 E26
FBA_CMD8 (FBA_D36) FBA_D36 VMA_DQ37 GND_34
[18] FBA_CMD9 G23 FBA_CMD9 (FBA_D34) FBA_D37 R23 E5 GND_35
C [18] FBA_CMD10 G26 P24 VMA_DQ38 E8 C
FBA_CMD10 (FBA_D33) FBA_D38 VMA_DQ39 GND_36
[18] FBA_CMD11 J23 FBA_CMD11 (FBA_D32) FBA_D39 P22 H2 GND_37
[18] FBA_CMD12 M25 AC24 VMA_DQ40 H5
FBA_CMD12 (FBA_D55) FBA_D40 VMA_DQ41 GND_38
[18] FBA_CMD13 K27 FBA_CMD13 (FBA_D53) FBA_D41 AB23 J11 GND_39
[18] FBA_CMD14 G25 AB24 VMA_DQ42 J14
FBA_CMD14 (FBA_D54) FBA_D42 VMA_DQ43 GND_40
[18] FBA_CMD15 L24 FBA_CMD15 (FBA_D51) FBA_D43 W24
[18] FBA_CMD16 K23 AA22 VMA_DQ44 J17
FBA_CMD16 (FBA_D52) FBA_D44 VMA_DQ45 GND_41
[18] FBA_CMD17 K24 FBA_CMD17 (FBA_D50) FBA_D45 W23 K19 GND_42
[18] FBA_CMD18 G22 W22 VMA_DQ46 K9
FBA_CMD18 (FBA_D49) FBA_D46 VMA_DQ47 GND_43
[18] FBA_CMD19 K25 FBA_CMD19 (FBA_D48) FBA_D47 V22 L11 GND_44
[18] FBA_CMD20 H22 AA25 VMA_DQ48 L12
FBA_CMD20 (FBA_D59) FBA_D48 VMA_DQ49 GND_45
[18] FBA_CMD21 M26 FBA_CMD21 (FBA_D58) FBA_D49 W27 L13 GND_46
[18] FBA_CMD22 H24 W26 VMA_DQ50 L14
FBA_CMD22 (FBA_D57) FBA_D50 VMA_DQ51 GND_47
[18] FBA_CMD23 F27 FBA_CMD23 (FBA_D56) FBA_D51 W25 L15 GND_48
[18] FBA_CMD24 J26 AB25 VMA_DQ52 L16
FBA_CMD24 (FBA_D60) FBA_D52 VMA_DQ53 GND_49
[18] FBA_CMD25 G24 FBA_CMD25 (FBA_D61) FBA_D53 AB26 L17 GND_50
[18] FBA_CMD26 G27 AD26 VMA_DQ54 L2
FBA_CMD26 (FBA_D62) FBA_D54 VMA_DQ55 GND_51
[18] FBA_CMD27 M24 FBA_CMD27 (FBA_D63) FBA_D55 AD27 L5 GND_52
[18] FBA_CMD28 K22 V25 VMA_DQ56 M12
FBA_CMD28 (FBA_D46) FBA_D56 VMA_DQ57 GND_53
[18] FBA_CMD29 J22 FBA_CMD29 (FBA_D42) FBA_D57 R25 M13 GND_54
[18] FBA_CMD30 L22 V26 VMA_DQ58 M14
FBA_CMD30 (FBA_D45) FBA_D58 VMA_DQ59 GND_55
(FBA_D47) FBA_D59 V27 M15 GND_56
R26 VMA_DQ60 M16
(FBA_D43) FBA_D60 VMA_DQ61 GND_57
(FBA_D44) FBA_D61 T25 P19 GND_58
N25 VMA_DQ62 P2
VMA_CLK0 (FBA_D40) FBA_D62 VMA_DQ63 GND_59
[18] VMA_CLK0 F24 FBA_CLK0 (FBA_D41) FBA_D63 N26 P23 GND_60
VMA_CLK0# F23
[18] VMA_CLK0# FBA_CLK0*
VMA_CLK1 N24 P26
[18] VMA_CLK1 FBA_CLK1 GND_61
VMA_CLK1# N23 C26 VMA_DM0 P5
[18] VMA_CLK1# FBA_CLK1* (DQM1) FBA_DQM0 GND_62
B B19 VMA_DM1 P9 B
(DQM3) FBA_DQM1 VMA_DM2 GND_63
(DQM2) FBA_DQM2 D19 T12 GND_64
D23 VMA_DM3 T13
(DQM0) FBA_DQM3 VMA_DM4 GND_65
(DQM4) FBA_DQM4 T24 T14 GND_66
+1.5V_GFX R101 *40.2/F_4 FB_CAL_PD_VDDQ B15 AA23 VMA_DM5 T15
FB_CAL_PD_VDDQ (DQM6) FBA_DQM5 VMA_DM6 GND_67
(DQM7) FBA_DQM6 AB27 T16 GND_68
R99 *40.2/F_4 FB_CAL_PU_GND A15 T26 VMA_DM7 U11
FB_CAL_PU_GND (DQM5) FBA_DQM7 GND_69
U12 GND_70
R102 *60.4/F_4 FB_CAL_TERM_GND B16 U13
FB_CAL_TERM_GND VMA_W DQS0 GND_71
(WP1) FBA_DQS_WP0 C25 U14 GND_72
A19 VMA_W DQS1 U15
*60.4/F_4 R114 FBA_DEBUG (WP3) FBA_DQS_WP1 VMA_W DQS2 GND_73
+1.5V_GFX M22 FBA_DEBUG (WP2) FBA_DQS_WP2 E19 U16 GND_74
A24 VMA_W DQS3 U17
10mA (WP0) FBA_DQS_WP3 VMA_W DQS4 GND_75
For debug only (WP4) FBA_DQS_WP4 T22 U2 GND_76
AA24 VMA_W DQS5 U23
(WP6) FBA_DQS_WP5 VMA_W DQS6 GND_77
(WP7) FBA_DQS_WP5 AA26 U26 GND_78
+1.05V_GFX 15mils width 25mA T27 VMA_W DQS7 U5
(WP5) FBA_DQS_WP7 GND_79
V19 GND_80
L27 *PBY160808T-301Y-N_6 +FB_PLLAVDD R19 FB_PLLAVDD VMA_RDQS0
(RN1) FBA_DQS_RN0 D25 V9 GND_81
C574 *4.7U/6.3V_6 T19 A18 VMA_RDQS1 W11
C577 *1U/6.3V_4 FB_DLLAVDD (RN3) FBA_DQS_RN1 VMA_RDQS2 GND_82
(RN2) FBA_DQS_RN2 E18 W14 GND_83
C175 *.1U/10V_4 AC19 B24 VMA_RDQS3 W17
FB_PLLAVDD (NC) (RN0) FBA_DQS_RN3 VMA_RDQS4 GND_84
(RN4) FBA_DQS_RN4 R22 Y2 GND_85
Y24 VMA_RDQS5 Y23
(RN6) FBA_DQS_RN5 VMA_RDQS6 GND_86
(RN7) FBA_DQS_RN6 AA27 Y26 GND_87
R27 VMA_RDQS7 Y5
(RN5) FBA_DQS_RN7 GND_88

A A16 +FB_VREF1 TP6 A


FB_VREF

PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
N10M-GE (MEMORY I/F) 2/5
Date: W ednesday, December 02, 2009 Sheet 15 of 44
5 4 3 2 1
5 4 3 2 1
U27F
U27G
N10M

16
PBGA533-NVIDIA-GEFORCE6250
N10M
PBGA533-NVIDIA-GEFORCE6250 U27D
6/13 IFPAB V4 8/13 IFPE
IFPA_TXD0* EXT_TXLOUT0- [19]
V5 DVI DP PBGA533-NVIDIA-GEFORCE6250
IFPA_TXD0 EXT_TXLOUT0+ [19] N10M
+IFPD_PLLVDD N6
IFPD_PLLVDD
T7 M6 IFPD_RSET
5/13 DACC
AA4 +DACB_VDD W5 U6

L8
200 mA
*FBMA-10-160808-300T_6 +IFPAB_PLLVDD
IFPA_TXD1*
IFPA_TXD1 AA5
EXT_TXLOUT1- [19]
EXT_TXLOUT1+ [19] R68 DACB_VDD DACB_HSYNC
DACB_VSYNC U4
+1.05V_GFX AD5 IFPAB_PLLVDD IFPD_AUX* D4 T6 R6 DACB_VREF
C93 *.1U/10V_4 AB6 A *10K/F_4 D3 R75
C92 *1U/6.3V_4 IFPAB_RSET IFPD_AUX
IFPA_TXD2* Y4 EXT_TXLOUT2- [19] T9 V6 DACB_RSET
C84 *4.7U/6.3V_6 W4 EXT_TXLOUT2+ [19] *10K/F_4 T5
IFPA_TXD2 DACB_RED
D IFPD_L3* B4 DACB_GREEN T4 D
TXC
D TXC IFPD_L3 B3 DACB_BLUE R4
R73 *1K/F_4 AB5
IFPA_TXD3*
IFPA_TXD3 AB4 IFPD_L2* C4
TXD0
TXD0 IFPD_L2 C3
DATA
IFPB_TXD4* V1 EXT_TXUOUT0- [19] TXD1 IFPD_L1* D5
W1 EXT_TXUOUT0+ [19] +IFPDE_IOVDD H6 TXD1 E4
IFPB_TXD4 IFPDE_IOVDD IFPD_L1

IFPD_L0* F4
R78 TXD2
IFPB_TXD5* W2 EXT_TXUOUT1- [19] IFPD_L0 F5
TXD2
IFPB_TXD5 W3 EXT_TXUOUT1+ [19]
*10K/F_4

L20
200 mA
*FBMA-10-160808-300T_6 +IFPAB_IOVDD V3
B
+1.8V_VGA IFPA_IOVDD IFPB_TXD6* AA3 EXT_TXUOUT2- [19]
C532 *.1U/10V_4 AA2 U27E
IFPB_TXD6 EXT_TXUOUT2+ [19] N10M
C533 *.1U/10V_4 V2 PBGA533-NVIDIA-GEFORCE6250
C539 *1U/6.3V_4 IFPB_IOVDD
C527 *4.7U/6.3V_6
IFPB_TXD7* AA1 8/13 IFPE Mount for Discrete Only
AB1 DVI DP
IFPB_TXD7 IFPE_PLLVDD D7 IFPE_PLLVDD(DACB_VDD)
F8 G6 CRT_R_DGPU R473 *0_4 CRT_R
T10 IFPD_RSET(DACB_RSET) IFPE_AUX* CRT_R [7,20]
AD4 EXT_TXLCLKOUT- [19] F7 CRT_G_DGPU R474 *0_4 CRT_G
IFPA_TXC* IFPE_AUX CRT_G [7,20]
A AC4 EXT_TXLCLKOUT+ [19] R70 CRT_B_DGPU R475 *0_4 CRT_B
IFPA_TXC CRT_B [7,20]
CLOCK CRT_HSYNC R476 *0_4 HSYNC_COM
HSYNC_COM [7,20]
*10K/F_4 CRT_VSYNC R477 *0_4 VSYNC_COM
VSYNC_COM [7,20]
IFPB_TXC* AB2 EXT_TXUCLKOUT- [19]
B IFPB_TXC AB3 EXT_TXUCLKOUT+ [19]
IFPE_L3* E7
E TXC E6
C IFPE_L3 C
U27H TXC
N10M
PBGA533-NVIDIA-GEFORCE6250 B7
TXD0 IFPE_L2*
7/13 IFPC
IFPE_L2 B6
TXD0
120 mA
*FBMA-10-160808-300T_6 +IFPC_PLLVDD
DVI DP
TXD1 IFPE_L1* A7 CRT_R_DGPU R54 *150/F_4
+3V_GFX L19 P6 IFPC_PLLVDD IFPE_L1 A6
R5 TXD1 CRT_G_DGPU R55 *150/F_4
IFPC_RSET
IFPE_L0* C6
C540 *1U/6.3V_4 TXD2 D6 CRT_B_DGPU R56 *150/F_4
C534 *.1U/10V_4 HDMI_SDA_DGPU TXD2 IFPE_L0
IFPC_AUX* G5 HDMI_SDA_DGPU [30]
C531 *.1U/10V_4 G4 HDMI_SCL_DGPU Close to GPU
IFPC_AUX HDMI_SCL_DGPU [30]
C528 *4.7U/6.3V_6

J4 H_TXC_HDMI-
TXC IFPC_L3* H_TXC_HDMI- [30]
R72 1K/F_4 H4 H_TXC_HDMI+ U27C
TXC IFPC_L3 H_TXC_HDMI+ [30]
C +3V_GFX
K4 H_TX0_HDMI-
TXD0 IFPC_L2* H_TX0_HDMI- [30] N10M
L4 H_TX0_HDMI+ PBGA533-NVIDIA-GEFORCE6250
TXD0 IFPC_L2 H_TX0_HDMI+ [30]
500
L23
mA (1.05V +/- 3% )
*MLB-201209-0030P-N1-RU_8+IFPC_IOVDD J6
TXD1 IFPC_L1* M4
M5
H_TX1_HDMI-
H_TX1_HDMI+
H_TX1_HDMI- [30]
L21 120 mA
*PBY160808T-301Y-N_6 +DACA_VDD AG2
3/13 DACA
AD2 CRT_HSYNC
+1.05V_GFX IFPC_IOVDD TXD1 IFPC_L1 H_TX1_HDMI+ [30] DACA_VDD DACA_HSYNC
C114 *.1U/10V_4 C511 *.1U/10V_4
DACA_VSYNC AD1 CRT_VSYNC
C115 *.1U/10V_4 N4 H_TX2_HDMI- C510 *.1U/10V_4 AF1
TXD2 IFPC_L0* H_TX2_HDMI- [30] DACA_VREF
C550 *1U/6.3V_4 P4 H_TX2_HDMI+ C515 *.1U/10V_4
TXD2 IFPC_L0 H_TX2_HDMI+ [30]
C549 *4.7U/6.3V_6 C516 *1U/6.3V_4 AE1
C526 *4.7U/6.3V_6 DACA_RSET CRT_R_DGPU
DACA_RED AE2
C525 *4700P/25V_4 AE3 CRT_G_DGPU
C524 *470P/50V_4 DACA_GREEN CRT_B_DGPU
DACA_BLUE AD3
B
C535 *.1U/10V_4 DACA_VREF B
R396 *124/F_4 DACA_RSET

65mA
+1.05V_GFX L10 *100nH_6 +NV_PLLVDD
U27J
50mA N10M
PBGA533-NVIDIA-GEFORCE6250
C117 *.1U/10V_4 12/13 XTAL_PLL
C116 *.1U/10V_4
C104 *1U/6.3V_4 K5
C111 *4.7U/6.3V_6 PLLVDD
K6 VID_PLLVDD

+1.05V_GFX L22 *100nH_6 25mA+SP_PLLVDD L6


C538 *.1U/10V_4 SP_PLLVDD
C537 *1U/6.3V_4
C536 *4.7U/6.3V_6
R89 *10K/F_4
R88 *0_4 XTAL_SSIND11
[2] CLK_27M_SS XTAL_SSIN
XTAL_OUTBUFF E9 BXTALOUT SPREAD SPECTRUM == >Del 6/16
[2] CLK_27M_NONSS R450 *0_4 XTALIN D10 E10 XTALOUT
XTAL_IN XTAL_OUT
R84
Y5 *27MHZ *10K/F_4
2 1
A
*18P/50V_4 C563 C561 *18P/50V_4 A

STUFF PDs on XTALSSIN and


XTALOUTBUFF WHEN EXT_SS
Install it when not connected to Spread spectrum device

PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
N10M-GE (DISPLAY) 3/5
Date: W ednesday, December 02, 2009 Sheet 16 of 44
5 4 3 2 1
5 4 3 2 1

17
CHIP PCI_DEVID: STRAP2
N11P-GE1 0x0A29 1001 PU 10K SEE Datasheet for details on N10P Straps!
N11M-GE1 0x0A75 1010 PD 30K
N10M
U27K
11/13 MISC
Logical Strap Bit Mapping PCI_DEVID[4]/SUBVENDOR +3V_GFX
B10 +3V_GFX
STRAP0 C7
ROM_CS* PU-VDD PD
STRAP1 STRAP0 ROM_SI
B9 STRAP1 ROM_SI A10
STRAP2 A9 C10 ROM_SO R422 R421
STRAP2 ROM_SO
C9 ROM_SCLK 5K 1000 0000 R468 R467 R460
ROM_SCLK *4.99K/F_4
D
10K 1001 0001 R459
D

A3 HDCP_SCL *15K/F_4 *45.3K/F_4 *35.7K/F_4


R97 *40.2K/F_4STRAP_REF_3V3 F11 I2CH_SCL
A4 HDCP_SDA 15K 1010 0010 *5K/F_4 *4.99K/F_4 STRAP0
STRAP_REF_3V3 I2CH_SDA ROM_SI STRAP1
R87 *40.2K/F_4STRAP_REF_MIOB
F10 20K 1011 0011 ROM_SO STRAP2
STRAP_REF_MIOB ROM_SCLK
25K 1100 0100 R427 R426
N5 R463 R462
BUFRST* T5 30K 1101 0101 R456
Only for N10M F9 SPDIF
F6
35K 1110 0110 (Ra) *15K/F_4 *10K/F_4
R455
*15K/F_4 *2K/F_4 *35.7K/F_4
*30K/F_4

GND0 45K 1111 0111


AD25 TESTMODER143 *10K/F_4 4.99K/F_4: CS24992FB26 [RES CHIP 4.99K 1/16W +1%(0402)]Default: Hynix VRAM
TESTMODE 1211 DEVICE ID CHANGE
10K/F_4: CS31002FB26 [RES CHIP 10K 1/16W +1% (0402)]
R389 *10K/F_4 N2 15K/F_4: CS31502FB24 [RES CHIP 15K 1/16W +1% (0402)]
CEC (I2CD_SCL))
GND1 AC6 30.1K/F_4: CS33012FB18 [RES CHIP 30.1K 1/16W +-1%(0402)]
35.7K/F_4: CS33572FB13 [RES CHIP 35.7K 1/16W +-1%(0402)]
45.3K/F_4: CS34532FB18 [RES CHIP 45.3K 1/16W +-1% (0402)]
PBGA533-NVIDIA-GEFORCE6250
Logical Logical Logical Logical
Strapping Bit3 Strapping Bit2 Strapping Bit1 Strapping Bit0
ROM_SO NB10X XCLK_417 FB_0_BAR_SIZE SMB_ALT_ADDR VGA_DEVICE 0001
ROM_SCLK PCI_DEVIDE[4] SUB_VENDOR SLOT_CLK_CFG PEX_PLL_EN_TERM 0010
C
N10M PBGA533-NVIDIA-GEFORCE6250
ROM_SI RAMCFG[3] RAMCFG[2] RAMCFG[1] RAMCFG[0] XXXX C
U27L
9/13 I2C_GPIO_THERM_JTAG STRAP2 PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0] 1000
R1 R391 *0_4
I2CA_SCL DDCCLK [7,20]
I2CA_SDA T3 L_DDCDAT R393 *0_4
DDCDATA [7,20] STRAP1 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0] 0001

I2CB_SCL R2 I2CB_SCL_G R390 *2.2K_4 +3V_GFX STRAP0 USER[3] USER[2] USER[1] USER[0] 1111
GFX_THMD- D8 R3 I2CB_SDA_G R392 *2.2K_4
T26 THERMDN I2CB_SDA
VRAM Configuration Table
GFX_THMD+ D9 A2 I2CC_SCL_G R410 *33_4 EDIDCLK
T27 THERMDP I2CC_SCL EDIDCLK [7,19]
B1 I2CC_SDA_G R404 *33_4 EDIDDATA EDIDDATA [7,19] RAMCFG
JTAG_TCK
JTAG_TMS
AF3
AF4
JTAG_TCK
I2CC_SDA
[3:0]
0000
DESCRIPTION Vendor
Reserved
Vendor P/N ROM_SI
(Ra)
JTAG_TDI JTAG_TMS
AG4 AKD58GGT^01 0001 DDR3 64Mx16x8, 128bit, 1GB,800MHz Qimonda IDGH1G-04A1F1C-16X PD 10K
T18
JTAG_TDO AE4
JTAG_TDI
JTAG_TDO
For Discrete Only AKD5LZGTW00 0010 DDR3 64Mx16x8, 128bit, 1GB,800MHz Hynix H5TQ1G63BFR-12C PD 15K
JTAG_TRST# AG3 AKD5LGGT502 0011 DDR3 64Mx16x8, 128bit, 1GB,800MHz Samsung K4W1G1646E-EC12 PD 20K
JTAG_TRST*
0101 Reserved
0110
GPIO0 N1 DGPU_PIN_N1 T3 XXXX DDR3 64Mx16x8, 128bit, 1GB,667MHz Hynix H5TQ1G63AFR-14C
GPIO1 G1 HDMI_DET [30] XXXX DDR3 64Mx16x8, 128bit, 1GB,667MHz Samsung K4W1G1646D-EC12
GPIO2 C1 DPST_PW M_DGPU R499 *0_4
DPST_PW M [7,19]
GPIO3 M2 DISP_ON_DGPU R583 *0_4
DISP_ON [7,19]
DGPU_I2CS_SCL T1 M3 LVDS_BLON_DGPU R584 *0_4
I2CS_SCL GPIO4 LVDS_BLON [7,19]
DGPU_I2CS_SDA T2 K3
I2CS_SDA GPIO5 V_PW RCNTL [35]
K2

T6
W6
RFU0 (NC)
GPIO6
GPIO7
GPIO8
J2 DGPU_PIN_J2
C2 DGPU_GPIO8 R591
M1 ALERT
*0_4 VGA_OVT#
T2
VGA_GPIO6 [35]

VGA_OVT# [27]
JTAG_TMS R376
+3V_GFX

*10K/F_4
GPIO ASSIGNMENTS
RFU1 (I2CE_SDA) GPIO9 T28
B Y6 RFU2 (I2CE_SCL) GPIO10 D2 B
JTAG_TDI R374 *10K/F_4
AA6
N3
RFU3 (NC) GPIO11 D1
J3
GPIO I/O ACTIVE USAGE
RFU4 (I2CD_SDA) GPIO12 VGA_OVT# R385 *10K/F_4
GPIO13 J1
GPIO14 K1
F3 ALERT R388 *10K/F_4
0 N/A N/A
GPIO15
GPIO16 G3
G2 JTAG_TCK R372 *10K/F_4
1 IN N/A Hot plug detect for IFP link C
GPIO17
GPIO18 F1
F2 JTAG_TRST# R397 *10K/F_4
2 OUT HIGH PANEL BACKLIGHT PWM
GPIO19
DPST_PW M_DGPU R384 *2K/F_4
3 OUT HIGH PANEL POWER ENABLE
4 OUT HIGH PANEL BACKLIGHT ENABLE
5 OUT N/A NVVDD VID0
R593 *0_4
6 OUT N/A NVVDD VID1
DGPU_I2CS_SCL 1 3
7 OUT N/A NVVDD VID2 11/13
MBCLK2 [8,27]
*2N7002E HDCP ROM 8 I/O LOW OVERT
R801 Q15
9 I/O LOW ALERT
2

*4.7K_4 +3V_GFX

U26
10 OUT N/A FBVREF SELECT
C560 *.1U/10V_4
+3V_GFX 1 A0 VCC 8 11 OUT N/A SLI SYNC0
R802
2 A1 WP 7 R428 *10K/F_4
12 IN N/A PWR_LEVEL11/13
A A
HDCP_SCL R424 *2.2K_4
*4.7K_4 3 A2 SCL 6 +3V_GFX 13 OUT N/A MEM_VID or power supply control
2

*2N7002E
Q30 HDCP_SDA R418 *2.2K_4
DGPU_I2CS_SDA 1 3
4 GND SDA 5 14 OUT N/A PS CONTROL
MBDATA2 [8,27]
*AT88SC0808C-SU
PROJECT : SW9
R594 *0_4 Quanta Computer Inc.
DHCP ROM
Low: Crypto ROM Size Document Number Rev
Mount Q15 , Q30 , R801 , R802 HDCP_SCL Custom
N10M-GE (GPIO&STRAPS) 4/5 1A
For Switchable only Hi: I2C ROM Date: W ednesday, December 02, 2009 Sheet 17 of 44
5 4 3 2 1
1 2 3 4 5 6 7 8

U11
[15] VMA_DQ[63..0]
[15] VMA_DM[7..0]
[15] VMA_W DQS[7..0]
[15] VMA_RDQS[7..0]
3/27 Swap
CHANNEL A: 256MB/512MB DDR3
U30 3/27 Swap U12 3/27 Swap U31
18 3/27 Swap
VREFC_VMA1 M8 E3 VMA_DQ20 VREFC_VMA1 M8 E3 VMA_DQ8 VREFC_VMA3 M8 E3 VMA_DQ45 VREFC_VMA3 M8 E3 VMA_DQ58
VREFD_VMA1 VREFCA DQL0 VMA_DQ18 VREFD_VMA1 VREFCA DQL0 VMA_DQ12 VREFD_VMA3 VREFCA DQL0 VMA_DQ41 VREFD_VMA3 VREFCA DQL0 VMA_DQ60
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 VMA_DQ23 F2 VMA_DQ9 F2 VMA_DQ43 F2 VMA_DQ56
DQL2 VMA_DQ19 FBA_CMD19 DQL2 VMA_DQ15 FBA_CMD19 DQL2 VMA_DQ40 FBA_CMD19 DQL2 VMA_DQ57
[15] FBA_CMD19 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
P7 H3 VMA_DQ21 FBA_CMD25 P7 H3 VMA_DQ11 FBA_CMD25 P7 H3 VMA_DQ47 FBA_CMD25 P7 H3 VMA_DQ59
[15] FBA_CMD25 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
A P3 H8 VMA_DQ17 FBA_CMD22 P3 H8 VMA_DQ13 [15] FBA_CMD4 FBA_CMD4 P3 H8 VMA_DQ44 FBA_CMD4 P3 H8 VMA_DQ63 A
[15] FBA_CMD22 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
N2 G2 VMA_DQ22 FBA_CMD24 N2 G2 VMA_DQ10 [15] FBA_CMD6 FBA_CMD6 N2 G2 VMA_DQ46 FBA_CMD6 N2 G2 VMA_DQ61
[15] FBA_CMD24 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6
P8 H7 VMA_DQ16 FBA_CMD0 P8 H7 VMA_DQ14 [15] FBA_CMD5 FBA_CMD5 P8 H7 VMA_DQ42 FBA_CMD5 P8 H7 VMA_DQ62
[15] FBA_CMD0 A4 DQL7 A4 DQL7 A4 DQL7 A4 DQL7
P2 FBA_CMD2 P2 [15] FBA_CMD13 FBA_CMD13 P2 FBA_CMD13 P2
[15] FBA_CMD2 A5 A5 A5 A5
R8 FBA_CMD21 R8 FBA_CMD21 R8 FBA_CMD21 R8
[15] FBA_CMD21 A6 A6 A6 A6
R2 D7 VMA_DQ6 FBA_CMD16 R2 D7 VMA_DQ28 FBA_CMD16 R2 D7 VMA_DQ37 FBA_CMD16 R2 D7 VMA_DQ51
[15] FBA_CMD16 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
T8 C3 VMA_DQ7 FBA_CMD23 T8 C3 VMA_DQ29 FBA_CMD23 T8 C3 VMA_DQ39 FBA_CMD23 T8 C3 VMA_DQ53
[15] FBA_CMD23 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
R3 C8 VMA_DQ2 FBA_CMD20 R3 C8 VMA_DQ26 FBA_CMD20 R3 C8 VMA_DQ32 FBA_CMD20 R3 C8 VMA_DQ49
[15] FBA_CMD20 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
L7 C2 VMA_DQ4 FBA_CMD17 L7 C2 VMA_DQ25 FBA_CMD17 L7 C2 VMA_DQ36 FBA_CMD17 L7 C2 VMA_DQ55
[15] FBA_CMD17 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
R7 A7 VMA_DQ1 FBA_CMD9 R7 A7 VMA_DQ27 FBA_CMD9 R7 A7 VMA_DQ33 FBA_CMD9 R7 A7 VMA_DQ48
[15] FBA_CMD9 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
N7 A2 VMA_DQ3 FBA_CMD14 N7 A2 VMA_DQ31 FBA_CMD14 N7 A2 VMA_DQ35 FBA_CMD14 N7 A2 VMA_DQ54
[15] FBA_CMD14 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
T3 B8 VMA_DQ0 FBA_CMD26 T3 B8 VMA_DQ24 FBA_CMD26 T3 B8 VMA_DQ34 FBA_CMD26 T3 B8 VMA_DQ50
[15] FBA_CMD26 A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
T7 A3 VMA_DQ5 T7 A3 VMA_DQ30 T7 A3 VMA_DQ38 T7 A3 VMA_DQ52
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 A15 M7 A15 M7 A15 M7 A15
+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX
M2 B2 FBA_CMD12 M2 B2 FBA_CMD12 M2 B2 FBA_CMD12 M2 B2
[15] FBA_CMD12 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
N8 D9 FBA_CMD3 N8 D9 FBA_CMD3 N8 D9 FBA_CMD3 N8 D9
[15] FBA_CMD3 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
M3 G7 FBA_CMD27 M3 G7 FBA_CMD27 M3 G7 FBA_CMD27 M3 G7
[15] FBA_CMD27 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
J7 N9 VMA_CLK0 J7 N9 [15] VMA_CLK1 J7 N9 VMA_CLK1 J7 N9
[15] VMA_CLK0 CK VDD#N9 CK VDD#N9 CK VDD#N9 CK VDD#N9
K7 R1 VMA_CLK0# K7 R1 [15] VMA_CLK1# K7 R1 VMA_CLK1# K7 R1
[15] VMA_CLK0# CK VDD#R1 CK VDD#R1 CK VDD#R1 CK VDD#R1
K9 R9 FBA_CMD18 K9 R9 [15] FBA_CMD7 FBA_CMD7 K9 R9 FBA_CMD7 K9 R9
[15] FBA_CMD18 CKE VDD#R9 +1.5V_GFX CKE VDD#R9 +1.5V_GFX CKE VDD#R9 +1.5V_GFX CKE VDD#R9 +1.5V_GFX

K1 A1 FBA_CMD30 K1 A1 [15] FBA_CMD28 FBA_CMD28 K1 A1 FBA_CMD28 K1 A1


[15] FBA_CMD30 ODT VDDQ#A1 ODT VDDQ#A1 ODT VDDQ#A1 ODT VDDQ#A1
L2 A8 FBA_CMD29 L2 A8 [15] FBA_CMD8 FBA_CMD8 L2 A8 FBA_CMD8 L2 A8
[15] FBA_CMD29 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8
B J3 C1 FBA_CMD1 J3 C1 FBA_CMD1 J3 C1 FBA_CMD1 J3 C1 B
[15] FBA_CMD1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
K3 C9 FBA_CMD10 K3 C9 FBA_CMD10 K3 C9 FBA_CMD10 K3 C9
[15] FBA_CMD10 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
L3 D2 FBA_CMD11 L3 D2 FBA_CMD11 L3 D2 FBA_CMD11 L3 D2
[15] FBA_CMD11 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
11/12 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMA_W DQS2 F3 H2 VMA_W DQS1 F3 H2 VMA_W DQS5 F3 H2 VMA_W DQS7 F3 H2
VMA_RDQS2 DQSL VDDQ#H2 VMA_RDQS1 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2 VMA_RDQS7 DQSL VDDQ#H2
G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9
3/27 Swap 11/17 Swap 11/17 Swap
VMA_DM2 E7 A9 VMA_DM1 E7 A9 VMA_DM5 E7 A9 VMA_DM7 E7 A9
VMA_DM0 DML VSS#A9 VMA_DM3 DML VSS#A9 VMA_DM4 DML VSS#A9 VMA_DM6 DML VSS#A9
D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1
11/12 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMA_W DQS0 C7 J2 VMA_W DQS3 C7 J2 VMA_W DQS4 C7 J2 VMA_W DQS6 C7 J2
VMA_RDQS0 DQSU VSS#J2 VMA_RDQS3 DQSU VSS#J2 VMA_RDQS4 DQSU VSS#J2 VMA_RDQS6 DQSU VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 VSS#M1 M1
VSS#M9 M9 VSS#M9 M9 VSS#M9 M9 VSS#M9 M9
VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
[15] FBA_CMD15 T2 P9 FBA_CMD15 T2 P9 FBA_CMD15 T2 P9 FBA_CMD15 T2 P9
RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
VMA_ZQ1 L8 T9 VMA_ZQ2 L8 T9 VMA_ZQ3 L8 T9 VMA_ZQ4 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
Should be 240 Should be 240 Should be 240 Should be 240
Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1
VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9
R166 D1 R543 D1 R231 D1 R507 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
*243/F_4 VSSQ#D8 D8 *243/F_4 VSSQ#D8 D8 *243/F_4 VSSQ#D8 D8 *243/F_4 VSSQ#D8 D8
VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8
C L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 C
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9

96-BALL 96-BALL 96-BALL 96-BALL


SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
*VRAM _DDR3 *VRAM _DDR3 *VRAM _DDR3 *VRAM _DDR3

11/11 +1.5V_GFX 11/11 +1.5V_GFX +1.5V_GFX +1.5V_GFX


2/19 2/19 11/11 11/11

VMA_CLK0 R545 R220 R224 R549


*1.33K/F_4 *1.33K/F_4 VMA_CLK1 *1.33K/F_4 *1.33K/F_4
R216
R217
*243/F_4 VREFC_VMA1 VREFD_VMA1 *243/F_4 VREFC_VMA3 VREFD_VMA3
VMA_CLK0#
VMA_CLK1#
R544 C602 R221 R225 C317 R548 C607
*1.33K/F_4 *1.33K/F_4 C309 *1.33K/F_4 *1.33K/F_4
*.1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4

D D
+1.5V_GFX +1.5V_GFX
[15,29,39] +1.5V_GFX
+1.5V_GFX C603 *.1U/10V_4 C599 *.1U/10V_4
C313 *.1U/10V_4 C605 *.1U/10V_4
+1.5V_GFX C318
C298
*10U/6.3V_6S
*.1U/10V_4
C609
C596
*.1U/10V_4
*.1U/10V_4
C597
C606
*.1U/10V_4
*.1U/10V_4
+1.5V_GFX
PROJECT : SW9
C604
C585
*1U/6.3V_4
*1U/6.3V_4
C610
C315
*.1U/10V_4
*.1U/10V_4
C598
C611
*.1U/10V_4
*.1U/10V_4
C612
C600
*.1U/10V_4
*.1U/10V_4
C311
C295
*.1U/10V_4
*.1U/10V_4
Quanta Computer Inc.
C584 *1U/6.3V_4 C316 *.1U/10V_4 C608 *.1U/10V_4 C308 *.1U/10V_4 C310 *.1U/10V_4
C601 *1U/6.3V_4 C314 *.1U/10V_4 C595 *.1U/10V_4 C613 *.1U/10V_4 C312 *.1U/10V_4 Size Document Number Rev
Custom 1A
N10M-GE VRAM-1(DDR3 BGA96
1211 for Nvidia request add transition cap
Date: W ednesday, December 02, 2009 Sheet 18 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

*47P/50V_4 C970

1. If LCD connector near GPU, then place these series Resistors near GPU
2. If LCD connector near N/B, then place these series Resistors near N/B
OPTION SIGNAL FROM NB FOR UMA VGA
+3VLCD_CON
2

2 1
1

*47P/50V_4 C971
LVDS_CONNECTOR

CN2

1
19

41
[7] LA_CLK RP8 1 2 4P2R-S-0 TXLCLKOUT+
TXLCLKOUT- C18 1000P/50V_4 2
[7] LA_CLK# 3 4 3
[7] LA_DATAP0 RP6 1 2 4P2R-S-0 TXLOUT0+ +3V
TXLOUT0- 4
[7] LA_DATAN0 3 4 +3.6V_CAM 5
[7] LA_DATAP1 RP5 1 2 4P2R-S-0 TXLOUT1+ [7,17] EDIDCLK
TXLOUT1- 6
A [7] LA_DATAN1 3 4 [7,17] EDIDDATA 7 A
[7] LA_DATAP2 RP7 1 2 4P2R-S-0 TXLOUT2+ TXLOUT0-
TXLOUT2- TXLOUT0+ 8
[7] LA_DATAN2 3 4 9

1
C969 C968
RP1 4P2R-S-0 TXUCLKOUT- TXLOUT1- 10
[7] LB_CLK# 1 2 11
[7] LB_CLK 3 4 TXUCLKOUT+ *68P/50V_4 *68P/50V_4 TXLOUT1+

2
RP4 4P2R-S-0 TXUOUT0+ 12
[7] LB_DATAP0 1 2 13
[7] LB_DATAN0 3 4 TXUOUT0- TXLOUT2-
RP2 4P2R-S-0 TXUOUT1+ TXLOUT2+ 14
[7] LB_DATAP1 1 2 15
[7] LB_DATAN1 3 4 TXUOUT1-
RP3 4P2R-S-0 TXUOUT2+ TXLCLKOUT- 16
[7] LB_DATAP2 1 2 17
[7] LB_DATAN2 3 4 TXUOUT2- TXLCLKOUT+
18
TXUOUT0- 19
OPTION SIGNAL FROM Nvidia to VGA 20
TXUOUT0+
*4P2R-S-0 4 RP16 TXLCLKOUT- 21
[16] EXT_TXLCLKOUT- 3 22
[16] EXT_TXLCLKOUT+ 2 1 TXLCLKOUT+ TXUOUT1-
*4P2R-S-0 2 RP14 TXLOUT0+ TXUOUT1+ 23
[16] EXT_TXLOUT0+ 1 24
[16] EXT_TXLOUT0- 4 3 TXLOUT0-
*4P2R-S-0 4 RP13 TXLOUT1- TXUOUT2- 25
[16] EXT_TXLOUT1-
2
3
1 TXLOUT1+
0820 add camera function TXUOUT2+ 26
[16] EXT_TXLOUT1+ 27
[16] EXT_TXLOUT2- *4P2R-S-0 4 3 RP15 TXLOUT2-
TXLOUT2+ TXUCLKOUT- 28
[16] EXT_TXLOUT2+ 2 1 29
L3 *W CM2012-90 TXUCLKOUT+
[16] EXT_TXUCLKOUT- *4P2R-S-0 2 1 RP9 TXUCLKOUT- CAMERA 30
31
[16] EXT_TXUCLKOUT+ 4 3 TXUCLKOUT+ 1 2 USBP5+
[9] USBP5+ 32
[16] EXT_TXUOUT0- *4P2R-S-0 4 3 RP12 TXUOUT0- 4 3 USBP5-
[9] USBP5- 33
[16] EXT_TXUOUT0+ 2 1 TXUOUT0+ [22] DIGITAL_D1 SBK160808T-301Y-N L2
*4P2R-S-0 2 TXUOUT1+ R2 LCDBL_PW M 34
[16] EXT_TXUOUT1+ 1 RP10 [7,17] DPST_PW M 0_4
35
4 3 TXUOUT1- R1 *0_4 BLON_CON
B [16] EXT_TXUOUT1- [27] PW M_VADJ 36 B
[16] EXT_TXUOUT2- *4P2R-S-0 4 3 RP11 TXUOUT2- [22] DIGITAL_CLK L4
TXUOUT2+ SBK160808T-301Y-N 37
[16] EXT_TXUOUT2+ 2 1 38
C9 *4.7U/6.3V_6
MIC +VIN_BLIGHT 39

42
C10 *.1U/10V_4
40

+5VSUS +15VALW +3V


14.5v +3V
AO3404 ID
2

current C23 .1U/10V_4 R7 2.2K_4 EDIDCLK


1

R16 5.8A R6 2.2K_4 EDIDDATA


R17
330K_6 DISP_ON R18 100K/F_4
3

100K/F_4 Q4 +3VLCD +3VLCD_CON LVDS_BLON R13 100K/F_4


1

AO3404
2

LCDONG 2 L5
PBY201209T-4A/08
1

C20 *.01U/25V_4
3

R15 C19 .1U/10V_4


C28 *10U/6.3V_8
1

22_8
2
0820 add camera function +VIN_BLIGHT
C C
2
1

Q6 C30 LCDDISCHG
2N7002E .22U/25V_6
2

+VIN L1 FBM2125 HM330-T +VIN_BLIGHT


1

Q7 R218 *0_6 +3V


3

DTC144EUA +5V
LCDON# 2 Q5 R5 0_6 +5V C2 C5 *10U/25V_12
2 2N7002E U1 .1U/50V_6 C3 .1U/50V_6
[7,17] DISP_ON
3 4 +3.6V_CAM C1 .01U/16V_4
VIN VOUT
1

C11
1 SHDN R1 R3
*1U/6.3V_4 *215K/F/04
C12 Close to Pin3
2 GND SET 5
4.7U/6.3V_6 +3.6V_CAM C6 .01U/16V_4
*IC(5P) G913C (SOT23-5)EP

R4 EMI C7 *4.7U/6.3V_6
R8 100K/F_4 R2 *100K/F/04
C22 22P/50V_4
SI-2 modified for fix DIGITAL_D1 C4 *100P/50V_4
PN_BLON BLON_CON
D2 RB500V-40 camera power fail DIGITAL_CLK C8 *100P/50V_4
Close to EC
R10 47K_4
D
+3VPCU
Vout=1.25(1+R1/R2) D
[7,17] LVDS_BLON R12 1K/F_4 2 1 LID_EC# [21,27]
D1 RB501V-40
2 1 HW PG [3,27,31,32,33,35,36]
D3 *RB501V-40
3

[10] LCD_BK 2 [11,20,22,23,25,26,28,30,37] +5V


PROJECT : SW9
Q2 [2,3,7,8,9,10,11,12,13,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V Quanta Computer Inc.
[7,21,23,26,27,28,31,32,33,35,37,38,39] +3VPCU
DTC144EUA [21,25,26,37] +5VSUS
1

[32,37] +15VALW Size Document Number Rev


Custom 1A
[2,31,32,33,34,35,36,37,38,39] +VIN LCD CONN
Date: Thursday, December 03, 2009 Sheet 19 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

FUSE1A6V_POLY

+5V
40 mils
2

C479
F1
1
40 MIL

.1U/10V_4

SSM14 spec is 40V 1A


+5VCRT +5VCRT
CRT PORT
11/12
20

16
+3V

6 D8 BAV99W
L9 BLM18BA470SN1D CRT_R1 1 11
[7,16] CRT_R 1
A 7 CRT_R A
L7 BLM18BA470SN1D CRT_G1 DDCDAT3 C50 *470P/50V_4 3
[7,16] CRT_G 2 12
8 2
L6 BLM18BA470SN1D CRT_B1 3 13 CRTHSYNC C518 *47P/50V_4
[7,16] CRT_B
+5VCRT 9
4 14 CRTVSYNC C56 *47P/50V_4 D7 BAV99W
R57 R43 R37 C86 C74 C67 10
C70 C79 C89 DDCCLK3 C506 *470P/50V_4 1 CRT_G
5 15 3
150/F_4 6.8P/50V_4 6.8P/50V_4 CRT CONN
150/F_4 6.8P/50V_4 6.8P/50V_4 CN19 2

17
150/F_4 6.8P/50V_4 6.8P/50V_4
D6 BAV99W
EMI 1 CRT_B
3

2
+5V
U2 D18 *BAV99W
M74VHC1GT125DF2G
1 DDCCLK2
PR_VSYNC R32 *0_4/S CRTVSYNC 3
[7,16] VSYNC_COM 2 4
short0402
2
+5V
C58
D19 *BAV99W

5 5

1 1
1 PR_VSYNC
3
B .1U/10V_4 B

PR_HSYNC R366 *0_4/S CRTHSYNC 2


[7,16] HSYNC_COM 2 4
short0402
U3 M74VHC1GT125DF2G D20 *BAV99W
1 PR_HSYNC
Q18 2N7002E 3

DDCCLK DDCCLK2 R362 *0_4/S DDCCLK3 2


[7,17] DDCCLK 1 3
short0402
R361 4.7K_4 R360 4.7K_4 D5 *BAV99W

2
+5VCRT 1
+3V 2 1+5VCRT2 3
DDCDAT2
D4 RB501V-40

2
R29 4.7K_4 R30 4.7K_4
2

[7,17] DDCDATA DDCDATA 1 3 DDCDAT2 R31 *0_4/S DDCDAT3


short0402
Q8 2N7002E

C C

D D

PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
[2,3,7,8,9,10,11,12,13,19,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V CRT/HDMI Conn
[11,19,22,23,25,26,28,30,37] +5V
Date: W ednesday, December 02, 2009 Sheet 20 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

21
LED8
R14
USB CONNECTOR +3V 1 2
C382 .1U/10V_4 +3V
*150/F_4
C27 *LED_Blue
*.1U/10V_4
EMI +5VSUS 80 mils (Iout=2A)
+5VSUS U5
2 8 USB0PW R1 1. NBSWON1#
VIN1 OUT3
3 VIN2 OUT2 7
4 EN OUT1 6 2. GND
A 1 5 C208 C232 + C368 C206 + C369 SW 5 A
C345 C343 GND OC NBSW ON1# 3 1 3. GND
*.22U/10V_4 *.22U/10V_4 C216 G545A2PU8 *470P/50V/04 .1U/10V_4 100U/6.3V_3528 .1U/10V_4 100U/6.3V_3528 4 2
1U/6.3V_4 C385 6 5 G2 4. LID_EC#
2 1NBSW ON1#
*SHORT_ PAD1 5. +3V
1000P/50V_4 TMG-533-S-V-TR
6. +3VPCU
POWER BUTTON

40 mils
L11