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Part A 2 Marks
UNIT I
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Si.no Transistor VCE (sat) VBE (sat) VBE (active) VBE (cut-in) VBE (cut-off)
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20. What is the advantage of using emitter resistance in the context of biasing?
Better stability factor S we have to keep ratio RB/RE as small as possible. Emitter resistance
RE is one parameter we can use to decrease ratio RB/RE by increasing RE we can make
RB/RE small.But as we increase RE, drop IERE will also increase and since VCC is
constant, drop across RC will reduce. This shifts the operating point Q which is not desirable
and hence there is limit for increasing RE.
21. Why thermal runaway is not there in FETs?
FET is temperature dependent. In FET, as temperature increases drain resistance also
increases, reducing the drain current. So thermal runaway does not occur in FET.
22. Why is it necessary to stabilize the operating point of transistor?
Stabilization techniques refer to the use of resistive biasing circuits which allow IB to vary so
as to keep IC relatively constant with variations in IC0 , and VBE. To maintain the
operating point stable. So that the transistor will always work in active region.
23. Why BJT needs temperature compensation against VBE Changes?
ICBO increases with increase in temperature, IB reduces due to reduction in VBE,
maintaining IC fairly constant.
PART B
1. In an N-channel JFET, biased by potential divider method, the operating point has to be at
IDSS = 12mA. If VDD = 12V, R1 = 20K and R2 = 10K , RD =1.2K and VP= -4V. Find
the values of ID, VGS, VG, VDS and VS. (16)
2. i)Calculate the operating point for the following circuit. (6)
Vcc=15V
1 k ohm
200 ohm
=50
100 ohm
ii)Derive the expression of stability factor for collector feedback amplifier. (10)
3. i)Explain the circuit that uses a diode to compensate the changes in VBE and in ICO. (12)
ii)Explain the operation of thermistor compensation. (4)
4. Explain the various techniques of stabilization of Q-point in a transistor. (16)
Base bias circuit
Collector to base bias circuit
Voltage divider bias
5. With the help of neat diagram, explain the methods used in biasing the FET and
MOSFET (16)
6. (i) Draw the circuit of a voltage divider bias circuit. Explain its operation and discuss
how it stabilizes against VBE changes. (8)
(ii) Derive the stability factor of the voltage divider bias circuit.Compare the stability factor
of fixed bias and voltage divider bias circuits with hFE 100, Re = I Kohm,
R1 = 33Kohm and R2 = 12 Kohms. (8)
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UNIT II
PART A
1. Define small signal equivalent circuit.
The analysis of a non-linear device is complex.signal that takes up a relatively
small percentage of an amplifiers operational range. With small input singles the
transistor can be replaced with small signal linear model. This Model is also called
small signal equivalent model.
2. Draw a CE amplifier & its hybrid equivalent circuit
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PART B
1. Draw the small signal hybrid model of CE amplifier and derive the expression for its AI, AV,
RI, RO. (16)
2. For the CC transistor amplifier circuit, find the expressions for input impedance and voltage
gain. Assume suitable model for the transistor. (16)
3. Explain the operation of a Darlington emitter follower and also derive an expression for its
performance measures. (16)
4. i)Explain the operation of emitter coupled differential amplifier. (12)
ii) Explain the transfer characteristics of the differential amplifier. (4)
5. Draw the circuit of a emitter coupled BJT differential amplifier and explain the
operation of the circuit. Explain how the differential amplifier with a constant current stage
improves the CMRR. (16)
6. Explain the operation of cascade amplifier and derive gain, input and output impedance. (16)
UNIT III
PART A
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a bipolar transistor is much less than the resistance looking into the source of the
MOSFET.
5. Define drain resistance and transconductance.
DRAIN RESISTANCE: It is the reciprocal of the slope of the drain characteristics and is
defined as ratio between Vds and Id.
TRANCONDUCTANCE:It is the slope of the transfer characteristics curves and is defined
as the ratio between Id and Vgs.
6. What are the parameters of JFET?
AC drain resistance
Transconductance
Amplification factor
7. Why the input impedance in FET is very high in comparison with BJT?
JFET have very high input impedance because of the reverse biased gate source PN junction.
8. Mention the operating modes of MOSFET.
Enhancement mode
Depletion mode
9. Write down the relationship between various FET parameters.
Amplification factor=drain resistance*transconductance
10. What is meant by gate source threshold voltage of a FET?
The voltage at which the channel is completely cut off and the drain current becomes zero is
called as gate source threshold voltage.
11. What are the operating regions of a JFET?
Ohmic region
Pinch off region
Breakdown region
12. List the advantages of FET.
Input impedance is very high.
Current carriers are not crossing the junctions , so noise is low
Small size
13. Define the amplification factor in the JFET.
Amplification factor is the negative of rate of change of drain voltage with gate voltage with
keeping Id as constant.
14. What are the main drawbacks of FET?
It has small gain bandwidth product in comparison with that which can be obtained with a
conventional transistor.
PART B
1. Derive gain, input and output impedance of common source JFET amplifier with neat
circuit diagram and equivalent circuit. (16)
2. Derive gain, input and output impedance of MOSFET source follower with neat circuit
diagram and equivalent circuit. (16)
3. Draw the small signal hybrid model of common drain MOSFET amplifier and derive the
expression for Ai,Av,Ri,Rv. (16)
4. With the neat sketch explain the principle of operation of cascode amplifier and also derive
an expression for its performance measures (16)
5. i)Write short notes on voltage swing limitations. (8)
ii) Briefly explain about the small signal analysis of JFET. (8)
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UNIT-IV
PART A
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PART B
1. Explain the low frequency response and the high frequency response of an amplifier. (16)
2. i)Draw the high frequency hybrid model for a transistor in the CE configuration and
explain the significance of each component. (12)
ii) Define alpha cutoff frequency. (4)
3. Explain in detail with neat diagram frequency response of BJT amplifier. Discuss the
significance of cut off frequencies and band width of the amplifier. (16)
4. Draw the high frequency equivalent circuit of MOSFET amplifier and derive all the
parameters related to its frequency response. (16)
5. Explain the high frequency operation of common source amplifier with its
equivalent circuit. (16)
6. Explain the operation of high frequency common source MOSFET amplifier with
neat diagram. Derive the expression for (a) voltage gain (b) input admittance
(c) input impedance (d) output admittance (16)
UNIT V
PART A
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The bias currents of the various stages track each other when there is any change due
to power supply voltage
6. What do you mean by current source and current sink.
If a transistor pulls current from a load then it is called as current sink. If a transistor pushes
its current into a load then its is called as current source.
7. List the various types of active loads.
N channel depletion mode device
N channel enhancement mode device
P channel enhancement mode device
8. State the limitation of the NMOS amplifier with enhancement load.
The voltage gain is related to the size of the transistor with a square root function.
9. State the advantages of CMOS common source amplifier.
CMOS CS amplifier provide large small signal voltage gain.
CMOS amplifier does not suffer from body effect.
10. State the advantages of Wilson current mirror circuit.
The increase in output resistance and hence to increase the stability of output current.
PART B
1. Draw a MOS current steering circuit with two sink and two source terminals. Write the
expression for the terminal currents in terms of reference current. (16)
2. Derive gain, input and output impedance of common source amplifier with NMOS
diode connected active load. (16)
3. Derive the expression of the differential-mode voltage gain, common mode voltage gain and
CMRR for a MOSFET differential amplifier. (16)
4. Explain the design of a PMOS and NMOS current sources to provide a specified bias current
and output resistance. (16)
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