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1 2 3 4 5 6 7 8

PCB STACK UP
LAYER 1 : TOP
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TE2 Block Diagram
LAYER 2 : GND
LAYER 3 : IN1
LAYER 4 : IN2
A LAYER 5 : VCC A
USB-0
INT_LVDS LCD/CCD Con. P15
LAYER 6 : BOT

DDRIII-SODIMM1
DDRIII-SODIMM2 Arrandale (UMA+VGA) INT_CRT
CRT Con.
P12,13 daughter board

DDR SYSTEM MEMORY


P15
Dual Channel DDR III PCI-E

Graphics Interfaces
800/1066/1333 MHZ
INT_HDMI
HDMI Con.
HDMI Level Shift
rPGA 989 P14
P14

SATA - HDD Re-Driver P3,4, 5, 6,


P18 P18
FDI
DMI

DMI(x4)
SATA - ODD
P18 SATA 0
FDI
DMI
B
SATA 1 B
SATA
PCI-Express
SATA 5 PCI-E
USB-13 ESATA Con.
P17
PCIE-3
CK505
3G P2
USB-10
USB Con. daughter board P24
USB-8 PCIE-4
Ibex Peak-M POWER SYSTEM
ISL88731A P25
USB-4 USB 2.0 (Port0~13)
SIM CARD. PCIE-5 RT8210B P26
USB
P16 WLAN UP6163 P27
PCH USB-5
UP6111A P28
USB-2 P24
Bluetooth Con. P7,8, 9, 10, 11 RT015A P29
P23 ISL62882C P30
PCIE-6
RT8152C P32
USB-3 RTC Giga/10/100 Lan
Cardreader P28

P21 BATTERY +VCC_CORE


C USB Con. USB-9 C
P9
P17

Cardreader Con. +1.5V


Azalia +1.5VSUS
3 IN 1 P29 IHDA
NVRAM
LPC

+VTT
LPC +1.05V

+1.8V
Audio Codec EC +1.5V_S5
P19 P22
+3VPCU
Port-B

Port-A

+3V_S5
+3V
FAN K/B Con. HALL Sensor SPI Flash Touch Pad /B Power /B +5VPCU
MDC Con. MIC JACK HP SPK Con. Con. Con. +5V_S5
P19 P19 P19 P19 P4 P23 P15 P22 P23 P23 +5V
D D
+SMDDR_VTERM
+SMDDR_VREF

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
Block Diagram
Date: Wednesday, March 10, 2010 Sheet 1 of 35
1 2 3 4 5 6 7 8
5 4 3 2 1

CLOCK Gen
+3V
[CLK]
http://laptopblue.vn/
Pin1/17/24
Sligo595 =>1.5V (AL000595000)
Sligo590 =>3.3V (AL8SP590000)
+1.05V
+VDDIO_CLK 80mA(20mils)
L18 PBY160808T-601Y-N_1A 250mA(20mils) +3V_CK505_VDD L6 PBY160808T-601Y-N_1A

D C494 C491 C327 C318 D


C485 C297 C489
10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X U10 *10U/6.3V_8X 10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X
R237
+1.5V *590@0_6 5 VDD_27
29 VDD_REF VDD_SRC_I/O 15
VDD_CPU_I/O 18

L5 595@PBY160808T-601Y-N_1A 150mA(20mils) +1.5V_CK505_VDD 1 VDD_DOT_1.5 DOT_96 3 DREFCLK_R RP5


2 1 *short_4P2R
CLK_BUF_DREFCLKP [8]
17 4 DREFCLK#_R 4 3
VDD_SRC_1.5 DOT_96# CLK_BUF_DREFCLKN [8]
24 VDD_CPU_1.5
6 CLK_VGA_27M_R R246 *33_4
C486 C309 C322 C308 XTAL_OUT 27M CLK_VGA_27M#_R R249 *33_4
27 XTAL_OUT 27M_SS 7
595@10U/6.3V_8X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X XTAL_IN 28 C319 *15P/50V_4C
XTAL_IN DREFSSCLK_R RP6 *short_4P2R
SRC_1/SATA 10 2 1 CLK_BUF_DREFSSCLKP [8]
11 DREFSSCLK#_R 4 3
SRC_1#/SATA# CLK_BUF_DREFSSCLKN [8]
CPU_SEL 30 13 PCIE_3GPLL_R RP7 2 1 *short_4P2R
REF_0/CPU_SEL SRC_2 CLK_BUF_PCIE_3GPLLP [8]
14 PCIE_3GPLL#_R 4 3
SRC_2# CLK_BUF_PCIE_3GPLLN [8]
CGDAT_SMB 31
CGCLK_SMB SDA ICS_CPU_STOP# R255 10K_4
32 SCL *CPU_STOP# 16 +3V
C CLK_PCH_14M R216 33_4 2 20 CLK_BUF_BCLK1_P_R TP59 C
[8] CLK_PCH_14M VSS_DOT CPU_1
8 19 CLK_BUF_BCLK1_N_R TP58
VSS_27 CPU_1# CLK_BUF_BCLK0_P_R RP4 *short_4P2R
9 VSS_SATA CPU_0 23 4 3 CLK_BUF_BCLKP [8]
C291 12 22 CLK_BUF_BCLK0_N_R 2 1
VSS_SRC CPU_0# CLK_BUF_BCLKN [8]
21 VSS_CPU
*15P/50V_4C 26 25 VR_PWRGD_CLKEN
VSS_REF CKPWRGD/PD#
33 GND
SLG8SP595VTR

CLK POWERGOOD
CLK CRYSTAL CLK CPU_SEL CLK I2C Change to +3VPCU
(follow CRB)
B B

+3V
+3V

+3VPCU R225 10K_4 VR_PWRGD_CLKEN


R221

3
*10K_4
R229 R227
2 Q15 100K/F_4
[30] VR_PWRGD_CK505#

2
Y2 CPU_SEL 10K_4
XTAL_IN XTAL_OUT 2N7002_200MA
1 2
3 1 CGDAT_SMB
[8,16,20] SDATA CGDAT_SMB [12,13]
14.318MHZ_30 R224

1
C295 C296
10K_4 2N7002_200MA
33P/50V_4N 33P/50V_4N Q51 R228

+3V 10K_4

2
A A

0 1 3 1 CGCLK_SMB
[8,16,20] SCLK CGCLK_SMB [12,13]
Quanta Computer Inc.
CPU_SEL
CPU =133MHz CPU=100MHz 2N7002_200MA
Q50
PROJECT : TE2
(default) Size Document Number Rev
2A
CLOCK GENERATOR
Date: Friday, March 19, 2010 Sheet 2 of 35

5 4 3 2 1
1 2 3 4 5 6 7 8

A24
U16A
PEG_ICOMPI
PEG_ICOMPO
B26 PEG_COMP
A26
B27
R341 http://laptopblue.vn/
49.9/F_4

[9] DMI_TXN0 DMI_RX#[0] PEG_RCOMPO


[9] DMI_TXN1 C23 DMI_RX#[1] PEG_RBIAS A25 PEG_RBIAS R342 750/F_4
[9] DMI_TXN2 B22 DMI_RX#[2]
[9] DMI_TXN3 A21 DMI_RX#[3] PEG_RX#[0] K35
J34 U16B
PEG_RX#[1] R207 20/F_4 H_COMP3 AT23
[9] DMI_TXP0 B24 DMI_RX[0] PEG_RX#[2] J33 COMP3 BCLK A16 CLK_CPU_BCLKP [10]
[9] DMI_TXP1 D23 G35 R206 20/F_4 H_COMP2 AT24 B16 CLK_CPU_BCLKN [10]
DMI_RX[1] PEG_RX#[3] COMP2 BCLK#
[9] DMI_TXP2 B23
A22
DMI_RX[2] PEG_RX#[4] G32
F34
R104
R205
49.9/F_4
49.9/F_4
H_COMP1 G16
H_COMP0 AT26 COMP1 MISC AR30
[9] DMI_TXP3 DMI_RX[3] PEG_RX#[5] COMP0 BCLK_ITP TP86
PEG_RX#[6] F31 AH24 SKTOCC# BCLK_ITP# AT30 TP87

A
[9] DMI_RXN0
[9] DMI_RXN1
D24
G24
F23
DMI_TX#[0]
DMI_TX#[1] DMI PEG_RX#[7]
PEG_RX#[8]
D35
E33
C33
TP34

H_CATERR# AK14 CLOCKSPEG_CLK#


PEG_CLK E16
D16
CLK_PCIE_3GPLLP [8] A
[9] DMI_RXN2 DMI_TX#[2] PEG_RX#[9] CATERR# CLK_PCIE_3GPLLN [8]
[9] DMI_RXN3 H23 DMI_TX#[3] PEG_RX#[10] D32 [10] H_PECI AT15 PECI
PEG_RX#[11] B32 H_PROCHOT#_D AN26
PROCHOT# THERMAL DPLL_REF_SSCLK A18 CLK_DREFSSCLKP_R R340 3 4 *short_4P2R CLK_DREFSSCLKP [8] DPLL_REF_SSCLK
D25 C31 CPU_PM_THRMTRIP# AK15 A17 CLK_DREFSSCLKN_R 1 2
[9] DMI_RXP0
F24
DMI_TX[0] PEG_RX#[12]
B28
THERMTRIP# DPLL_REF_SSCLK# CLK_DREFSSCLKN [8] Only for UMA
[9] DMI_RXP1 DMI_TX[1] PEG_RX#[13]
[9] DMI_RXP2 E23 DMI_TX[2] PEG_RX#[14] B30
[9] DMI_RXP3 G23 A31 H_CPURST#_R AP26 F6 DDR3_DRAMRST#_C
DMI_TX[3] PEG_RX#[15] RESET_OBS# SM_DRAMRST#
AL15
PEG_RX[0] J35
[9] PM_SYNC
AN14
PM_SYNC
VCCPWRGOOD_1 DDR3 SM_RCOMP[0] AL1 SM_RCOMP_0 R447 100/F_4
2.7GT/s data rate H34 [10] H_PWRGOOD AN27 AM1 SM_RCOMP_1 R446 24.9/F_4
[9] FDI_TXN[7:0]
FDI_TXN0 E22
PEG_RX[1]
PEG_RX[2] H33
F35
PM_DRAM_PWRGD AK13
VCCPWRGOOD_0
SM_DRAMPWROK MISC SM_RCOMP[1]
SM_RCOMP[2] AN1 SM_RCOMP_2 R445
R210
130/F_4
10K_4 +VTT
FDI_TXN1 FDI_TX#[0] PEG_RX[3]
D21 FDI_TX#[1] PEG_RX[4] G33 TP41 AM26 TAPPWRGOOD PM_EXT_TS#[0] AN15 PM_EXT_TS#0 R212 *short_4 PM_EXTTS#0 [12]
FDI_TXN2 D19 E34 AP15 PM_EXT_TS#1 R213 *short_4 PM_EXTTS#1 [13]
FDI_TXN3 FDI_TX#[2] PEG_RX[5] H_VTTPWRGD AM15 PM_EXT_TS#[1] R211 10K_4
D18 FDI_TX#[3] PEG_RX[6] F32 VTTPWRGOOD +VTT
FDI_TXN4 G21 D34 [9,16,20,21,22] PLTRST# R139 1.5K/F_4 CPU_PLTRST# AL14
FDI_TXN5 FDI_TX#[4] PEG_RX[7] RSTIN#
FDI_TXN6
E19
F21
FDI_TX#[5]
Intel(R) FDI PEG_RX[8] F33
B33
PRDY# AT28
AP27 XDP_PREQ#
TP88

PCI EXPRESS -- GRAPHICS


FDI_TX#[6] PEG_RX[9] PREQ#
FDI_TXN7 G18 FDI_TX#[7] PEG_RX[10] D31
A32 R133 750/F_4
PWR MANAGEMENT TCK AN28 XDP_TCLK
PEG_RX[11] XDP_TMS
[9] FDI_TXP[7:0] PEG_RX[12] C30 TMS AP28
FDI_TXP0 D22 A28
FDI_TX[0] PEG_RX[13]

JTAG & BPM


FDI_TXP1 C21 B29 AT27 XDP_TRST#
FDI_TXP2 FDI_TX[1] PEG_RX[14] TRST#
D20 FDI_TX[2] PEG_RX[15] A30 TP31 AJ22 BPM#[0]
FDI_TXP3 C18 TP33 AK22 AT29 XDP_TDI_R
FDI_TXP4 FDI_TX[3] BPM#[1] TDI XDP_TDO_R
G22 FDI_TX[4] PEG_TX#[0] L33 TP37 AK24 BPM#[2] TDO AR27
FDI_TXP5 E20 M35 TP35 AJ24 AR29 XDP_TDI_M
FDI_TXP6 FDI_TX[5] PEG_TX#[1] BPM#[3] TDI_M XDP_TDO_M
F20 FDI_TX[6] PEG_TX#[2] M33 TP38 AJ25 BPM#[4] TDO_M AP29
FDI_TXP7 G19 M30 TP30 AH22
FDI_TX[7] PEG_TX#[3] BPM#[5]
PEG_TX#[4] L31 TP32 AK23 BPM#[6]
[9] FDI_FSYNC0 F17 FDI_FSYNC[0] PEG_TX#[5] K32 TP28 AH23 BPM#[7] DBR# AN25 SYS_RESET# [9]
[9] FDI_FSYNC1 E17 FDI_FSYNC[1] PEG_TX#[6] M29
J31 IC,AUB_CFD_rPGA,R1P0
PEG_TX#[7]
[9] FDI_INT C17 FDI_INT PEG_TX#[8] K29
PEG_TX#[9] H30
[9] FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29
[9] FDI_LSYNC1 D17 FDI_LSYNC[1] PEG_TX#[11] F29
PEG_TX#[12] E28
PEG_TX#[13] D29
D27
B
PEG_TX#[14] JTAG MAPPING B

PEG_TX#[15] C26
+VTT Processor hot +VTT

PEG_TX[0] L34
PEG_TX[1] M34
M32 H_CATERR# R140 49.9/F_4 R150
PEG_TX[2] H_CPURST#_R R454 *68_4
PEG_TX[3] L30
M31 XDP_TDI_R Ra R180 0_4 68_4
PEG_TX[4] XDP_TMS R181 *51_4 XDP_TDO_M
PEG_TX[5] K31 Rb R176 *0_4
M28 XDP_TDI_R R186 *51_4
PEG_TX[6] XDP_PREQ# R188 *51_4
PEG_TX[7] H31 Rc
K28 R170 R149 0_4 H_PROCHOT#_D
PEG_TX[8] XDP_TCLK R163 *51_4 0_4 [30] H_PROCHOT#
PEG_TX[9] G30
PEG_TX[10] G29
PEG_TX[11] F28 If R149 no stuff must change R150 to 50 ohm
E27 XDP_TDI_M Rd R175 *0_4
PEG_TX[12] XDP_TDO_R
PEG_TX[13] D28 Re R171 0_4
PEG_TX[14] C27
C25 +3V
PEG_TX[15] XDP_TRST#
IC,AUB_CFD_rPGA,R1P0 [22] HWPG R217 *short_4

5
2 R220 R189 Thermal Trip
R222 4HWPG_1 H_VTTPWRGD 51_4
*short_4 1 2K/F_4
+VTT
TC7SH08FU(F) R219

3
U9 1K/F_4

3
R223 *0_4 R226 *0_4
[9,22] MPWROK

2 Q49
+1.5VSUS [9,30] DELAY_VR_PWRGOOD
for S3 power reduction 2N7002_200MA

1
R43 Scan Chain STUFF -> Ra, Rc, Re
C C
[10] DDR3_DRAMRST#_PCH 1K_4
(Default) NO STUFF -> Rb, Rd +VTT R470 R471
DDR3_DRAMRST# [12,13]
CPU Only STUFF -> Ra, Rb 1K_4 100K_4

3
R45 C108 NO STUFF -> Rc, Rd, Re
Q8 R461 Q48

2
*100K_4 0.1U/10V_4X
2 R48 GMCH Only STUFF -> Rd, Re *56.2/F_4 MMBT3904-7-F_200MA
*0_4 CPU_PM_THRMTRIP# 1 3 SYS_SHDN#
NO STUFF -> Ra, Rb, Rc SYS_SHDN# [26]
BSS138_NL_0.22MA

1
R218 0_4 PM_THRMTRIP#
PM_THRMTRIP# [10]
DDR3_DRAMRST#_C

+1.5V_CPUVDDQ +3V_S5

+3V_S5 CPU FAN CTRL


+3V_S5
+3V
R21
10K/F_4 R13
R25 +1.5V_CPUVDDQ_PG [27] +3V
10K/F_4 10K/F_4 R334
3mA(40mils)
3

U2
2 10K_4
+5V CN9
4 R10 1.5K/F_4 R12 *short_4
2 1
PM_DRAM_PWRGD [9]
U1 40mils [22] FANSIG1 FANSIG1
3

2
C45 2.2U/6.3V_6X 2 3 TH_FAN_POWER1
TC7SH08FU(F) VIN VO 1
5
3

Q3 R11 TEMP_ALERT# CPUFAN#_ON_R_1 GND 2


[10,22] TEMP_ALERT# 1 3 1 /FON GND 6 3
R26 1K_4 2 2N7002_200MA Q1 2N7002_200MA 7
1

750/F_4 GND C44 C13 C392


[22] VFAN1 4 VSET GND 8
Q2 +1.5VSUS
D FDV301N_NL_200MA G995P1U 10U/6.3V_8X 0.01U/25V_4X *0.01U/25V_4X 85205-0300L D
1

FANPWR = 1.6*VSET

PM_DRAM_PWRGD: R18
*1.1K/F_4
Never drive hight before DDR3 voltage ramp to stable
PM_DRAM_PWRGD

R14
*3K/F_4
Quanta Computer Inc.
PROJECT :TE2
Size Document Number Rev
2A
PROCESSER 1/4(HOST&PEX)
Date: Tuesday, March 09, 2010 Sheet 3 of 35
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

http://laptopblue.vn/
AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

A A
[13] M_B_DQ[63:0]
[12] M_A_DQ[63:0] U16C U16D
M_A_DQ0 A10 AA6 M_A_CLKP0 [12] M_B_DQ0 B5 W8 M_B_CLKP0 [13]
M_A_DQ1 C10 SA_DQ[0] SA_CK[0] M_B_DQ1 SB_DQ[0] SB_CK[0]
SA_DQ[1] SA_CK#[0] AA7 M_A_CLKN0 [12] A5 SB_DQ[1] SB_CK#[0] W9 M_B_CLKN0 [13]
M_A_DQ2 C7 P7 M_A_CKE0 [12] M_B_DQ2 C3 M3 M_B_CKE0 [13]
M_A_DQ3 SA_DQ[2] SA_CKE[0] M_B_DQ3 SB_DQ[2] SB_CKE[0]
A7 SA_DQ[3] B3 SB_DQ[3]
M_A_DQ4 B10 Y6 M_A_CLKP1 [12] M_B_DQ4 E4 V7 M_B_CLKP1 [13]
M_A_DQ5 D10 SA_DQ[4] SA_CK[1] M_B_DQ5 SB_DQ[4] SB_CK[1]
SA_DQ[5] SA_CK#[1] Y5 M_A_CLKN1 [12] A6 SB_DQ[5] SB_CK#[1] V6 M_B_CLKN1 [13]
M_A_DQ6 E10 P6 M_A_CKE1 [12] M_B_DQ6 A4 M2 M_B_CKE1 [13]
M_A_DQ7 SA_DQ[6] SA_CKE[1] M_B_DQ7 SB_DQ[6] SB_CKE[1]
A8 SA_DQ[7] C4 SB_DQ[7]
M_A_DQ8 D8 AE2 M_A_CS#0 [12] M_B_DQ8 D1 AB8 M_B_CS#0 [13]
M_A_DQ9 SA_DQ[8] SA_CS#[0] M_B_DQ9 SB_DQ[8] SB_CS#[0]
F10 SA_DQ[9] SA_CS#[1] AE8 M_A_CS#1 [12] D2 SB_DQ[9] SB_CS#[1] AD6 M_B_CS#1 [13]
M_A_DQ10 E6 M_B_DQ10 F2
M_A_DQ11 SA_DQ[10] M_B_DQ11 SB_DQ[10]
F7 SA_DQ[11] SA_ODT[0] AD8 M_A_ODT0 [12] F1 SB_DQ[11] SB_ODT[0] AC7 M_B_ODT0 [13]
M_A_DQ12 E9 AF9 M_A_ODT1 [12] M_B_DQ12 C2 AD1 M_B_ODT1 [13]
M_A_DQ13 B7 SA_DQ[12] SA_ODT[1] M_B_DQ13 SB_DQ[12] SB_ODT[1]
SA_DQ[13] M_A_DM[7:0] [12] F5 SB_DQ[13] M_B_DM[7:0] [13]
M_A_DQ14 E7 B9 M_A_DM0 M_B_DQ14 F3 D4 M_B_DM0
M_A_DQ15 C6 SA_DQ[14] SA_DM[0] SB_DQ[14] SB_DM[0]
SA_DQ[15] SA_DM[1] D7 M_A_DM1 DM signals are not present on Clarkfield M_B_DQ15 G4 SB_DQ[15] SB_DM[1] E1 M_B_DM1 DM signals are not present on Clarkfield
M_A_DQ16 H10 H7 M_A_DM2 processor. All DM signal can be left as M_B_DQ16 H6 H3 M_B_DM2 processor. All DM signal can be left as
M_A_DQ17 G8 SA_DQ[16] SA_DM[2] SB_DQ[16] SB_DM[2]
SA_DQ[17] SA_DM[3] M7 M_A_DM3 NC on Clarkfield and connect directly to M_B_DQ17 G2 SB_DQ[17] SB_DM[3] K1 M_B_DM3 NC on Clarkfield and connect directly to
M_A_DQ18 K7 AG6 M_A_DM4 M_B_DQ18 J6 AH1 M_B_DM4
M_A_DQ19 SA_DQ[18] SA_DM[4] GND on So-DIMM side for Clarkfield SB_DQ[18] SB_DM[4] GND on So-DIMM side for Clarkfield
J8 SA_DQ[19] SA_DM[5] AM7 M_A_DM5 M_B_DQ19 J3 SB_DQ[19] SB_DM[5] AL2 M_B_DM5
M_A_DQ20 G7 AN10 M_A_DM6 design only M_B_DQ20 G1 AR4 M_B_DM6 design only
SA_DQ[20] SA_DM[6] SB_DQ[20] SB_DM[6]

DDR SYSTEM MEMORY A


M_A_DQ21 G10 AN13 M_A_DM7 M_B_DQ21 G5 AT8 M_B_DM7

DDR SYSTEM MEMORY B


M_A_DQ22 SA_DQ[21] SA_DM[7] M_B_DQ22 SB_DQ[21] SB_DM[7]
J7 SA_DQ[22] M_A_DQSN[7:0] [12] J2 SB_DQ[22] M_B_DQSN[7:0] [13]
M_A_DQ23 J10 C9 M_A_DQSN0 M_B_DQ23 J1 D5 M_B_DQSN0
M_A_DQ24 SA_DQ[23] SA_DQS#[0] M_A_DQSN1 M_B_DQ24 SB_DQ[23] SB_DQS#[0] M_B_DQSN1
L7 SA_DQ[24] SA_DQS#[1] F8 J5 SB_DQ[24] SB_DQS#[1] F4
M_A_DQ25 M6 J9 M_A_DQSN2 M_B_DQ25 K2 J4 M_B_DQSN2
M_A_DQ26 M8 SA_DQ[25] SA_DQS#[2] M_A_DQSN3 M_B_DQ26 SB_DQ[25] SB_DQS#[2] M_B_DQSN3
SA_DQ[26] SA_DQS#[3] N9 L3 SB_DQ[26] SB_DQS#[3] L4
B M_A_DQ27 L9 AH7 M_A_DQSN4 M_B_DQ27 M1 AH2 M_B_DQSN4 B
M_A_DQ28 SA_DQ[27] SA_DQS#[4] SB_DQ[27] SB_DQS#[4]
L6 SA_DQ[28] SA_DQS#[5] AK9 M_A_DQSN5 M_B_DQ28 K5 SB_DQ[28] SB_DQS#[5] AL4 M_B_DQSN5
M_A_DQ29 K8 AP11 M_A_DQSN6 M_B_DQ29 K4 AR5 M_B_DQSN6
M_A_DQ30 N8 SA_DQ[29] SA_DQS#[6] SB_DQ[29] SB_DQS#[6]
SA_DQ[30] SA_DQS#[7] AT13 M_A_DQSN7 M_B_DQ30 M4 SB_DQ[30] SB_DQS#[7] AR8 M_B_DQSN7
M_A_DQ31 P9 M_A_DQSP[7:0] [12] M_B_DQ31 N5 M_B_DQSP[7:0] [13]
M_A_DQ32 AH5 SA_DQ[31] SB_DQ[31]
SA_DQ[32] SA_DQS[0] C8 M_A_DQSP0 M_B_DQ32 AF3 SB_DQ[32] SB_DQS[0] C5 M_B_DQSP0
M_A_DQ33 AF5 F9 M_A_DQSP1 M_B_DQ33 AG1 E3 M_B_DQSP1
M_A_DQ34 AK6 SA_DQ[33] SA_DQS[1] SB_DQ[33] SB_DQS[1]
SA_DQ[34] SA_DQS[2] H9 M_A_DQSP2 M_B_DQ34 AJ3 SB_DQ[34] SB_DQS[2] H4 M_B_DQSP2
M_A_DQ35 AK7 M9 M_A_DQSP3 M_B_DQ35 AK1 M5 M_B_DQSP3
M_A_DQ36 AF6 SA_DQ[35] SA_DQS[3] SB_DQ[35] SB_DQS[3]
SA_DQ[36] SA_DQS[4] AH8 M_A_DQSP4 M_B_DQ36 AG4 SB_DQ[36] SB_DQS[4] AG2 M_B_DQSP4
M_A_DQ37 AG5 AK10 M_A_DQSP5 M_B_DQ37 AG3 AL5 M_B_DQSP5
M_A_DQ38 AJ7 SA_DQ[37] SA_DQS[5] SB_DQ[37] SB_DQS[5]
SA_DQ[38] SA_DQS[6] AN11 M_A_DQSP6 M_B_DQ38 AJ4 SB_DQ[38] SB_DQS[6] AP5 M_B_DQSP6
M_A_DQ39 AJ6 AR13 M_A_DQSP7 M_B_DQ39 AH4 AR7 M_B_DQSP7
M_A_DQ40 AJ10 SA_DQ[39] SA_DQS[7] M_B_DQ40 SB_DQ[39] SB_DQS[7]
SA_DQ[40] M_A_A[15:0] [12] AK3 SB_DQ[40] M_B_A[15:0] [13]
M_A_DQ41 AJ9 Y3 M_A_A0 M_B_DQ41 AK4 U5 M_B_A0
M_A_DQ42 AL10 SA_DQ[41] SA_MA[0] M_A_A1 M_B_DQ42 SB_DQ[41] SB_MA[0] M_B_A1
SA_DQ[42] SA_MA[1] W1 AM6 SB_DQ[42] SB_MA[1] V2
M_A_DQ43 AK12 AA8 M_A_A2 M_B_DQ43 AN2 T5 M_B_A2
M_A_DQ44 AK8 SA_DQ[43] SA_MA[2] M_A_A3 M_B_DQ44 SB_DQ[43] SB_MA[2] M_B_A3
SA_DQ[44] SA_MA[3] AA3 AK5 SB_DQ[44] SB_MA[3] V3
M_A_DQ45 AL7 V1 M_A_A4 M_B_DQ45 AK2 R1 M_B_A4
M_A_DQ46 AK11 SA_DQ[45] SA_MA[4] M_A_A5 M_B_DQ46 SB_DQ[45] SB_MA[4] M_B_A5
SA_DQ[46] SA_MA[5] AA9 AM4 SB_DQ[46] SB_MA[5] T8
M_A_DQ47 AL8 V8 M_A_A6 M_B_DQ47 AM3 R2 M_B_A6
M_A_DQ48 AN8 SA_DQ[47] SA_MA[6] M_A_A7 M_B_DQ48 SB_DQ[47] SB_MA[6] M_B_A7
SA_DQ[48] SA_MA[7] T1 AP3 SB_DQ[48] SB_MA[7] R6
M_A_DQ49 AM10 Y9 M_A_A8 M_B_DQ49 AN5 R4 M_B_A8
M_A_DQ50 AR11 SA_DQ[49] SA_MA[8] M_A_A9 M_B_DQ50 SB_DQ[49] SB_MA[8] M_B_A9
SA_DQ[50] SA_MA[9] U6 AT4 SB_DQ[50] SB_MA[9] R5
M_A_DQ51 AL11 AD4 M_A_A10 M_B_DQ51 AN6 AB5 M_B_A10
M_A_DQ52 AM9 SA_DQ[51] SA_MA[10] M_A_A11 M_B_DQ52 SB_DQ[51] SB_MA[10] M_B_A11
SA_DQ[52] SA_MA[11] T2 AN4 SB_DQ[52] SB_MA[11] P3
M_A_DQ53 AN9 U3 M_A_A12 M_B_DQ53 AN3 R3 M_B_A12
M_A_DQ54 AT11 SA_DQ[53] SA_MA[12] M_A_A13 M_B_DQ54 SB_DQ[53] SB_MA[12] M_B_A13
SA_DQ[54] SA_MA[13] AG8 AT5 SB_DQ[54] SB_MA[13] AF7
M_A_DQ55 AP12 T3 M_A_A14 M_B_DQ55 AT6 P5 M_B_A14
M_A_DQ56 AM12 SA_DQ[55] SA_MA[14] M_A_A15 M_B_DQ56 SB_DQ[55] SB_MA[14] M_B_A15
C SA_DQ[56] SA_MA[15] V9 AN7 SB_DQ[56] SB_MA[15] N1 C
M_A_DQ57 AN12 M_B_DQ57 AP6
M_A_DQ58 AM13 SA_DQ[57] M_B_DQ58 SB_DQ[57]
SA_DQ[58] AP8 SB_DQ[58]
M_A_DQ59 AT14 M_B_DQ59 AT9
M_A_DQ60 AT12 SA_DQ[59] M_B_DQ60 SB_DQ[59]
SA_DQ[60] AT7 SB_DQ[60]
M_A_DQ61 AL13 M_B_DQ61 AP9
M_A_DQ62 AR14 SA_DQ[61] M_B_DQ62 SB_DQ[61]
SA_DQ[62] AR10 SB_DQ[62]
M_A_DQ63 AP14 M_B_DQ63 AT10
SA_DQ[63] SB_DQ[63]

[12] M_A_BS#0 AC3 SA_BS[0] [13] M_B_BS#0 AB1 SB_BS[0]


[12] M_A_BS#1 AB2 SA_BS[1] [13] M_B_BS#1 W5 SB_BS[1]
[12] M_A_BS#2 U7 SA_BS[2] [13] M_B_BS#2 R7 SB_BS[2]

[12] M_A_CAS# AE1 SA_CAS# [13] M_B_CAS# AC5 SB_CAS#


[12] M_A_RAS# AB3 SA_RAS# [13] M_B_RAS# Y7 SB_RAS#
[12] M_A_WE# AE9 SA_WE# [13] M_B_WE# AC6 SB_WE#
IC,AUB_CFD_rPGA,R1P0 IC,AUB_CFD_rPGA,R1P0

D D

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
PROCESSER 2/4(DDR)
Date: Friday, February 26, 2010 Sheet 4 of 35
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+VCC_CORE AG35
U16F
VCC1 VTT0_1 AH14
http://laptopblue.vn/
18A
+VTT
+15V +1.5VSUS

AG34 VCC2 VTT0_2 AH12


AG33 AH11 C448 10U/6.3V_8X
VCC3 VTT0_3 C439 10U/6.3V_8X R52
AG32 VCC4 VTT0_4 AH10

5
6
7
8
AG31 J14 C419 10U/6.3V_8X *100K_4
VCC5 VTT0_5 C188 10U/6.3V_8X
AG30 VCC6 VTT0_6 J13
AG29 H14 C166 10U/6.3V_8X
VCC7 VTT0_7 C422 10U/6.3V_8X MAIND R173 R215
AG28 VCC8 VTT0_8 H12 [26,27,31] MAIND 4
AG27 G14 C178 10U/6.3V_8X +VAXG U16G *0_8 *0_8
A VCC9 VTT0_9 A
AG26 VCC10 VTT0_10 G13
C409 *330U/2V_7343P_E6b VID for UMA C111 Q43

+
AF35 VCC11 VTT0_11 G12 AT21 VAXG1 AO4466_9.4A

SENSE
LINES
AF34 VCC12 VTT0_12 G11 AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE [32] 0.01U/25V_4X
AF33 VCC13 VTT0_13 F14 AT18 VAXG3 VSSAXG_SENSE AT22 VSS_AXG_SENSE [32]
AF32 F13 AT16

3
2
1
C230 10U/6.3V_8X VCC14 VTT0_14 C475 C474 VAXG4
AF31 VCC15 VTT0_15 F12 AR21 VAXG5
C428 10U/6.3V_8X AF30 F11 + + AR19
C227 10U/6.3V_8X VCC16 VTT0_16 *330U/2V_7343P_E6b *330U/2V_7343P_E6b VAXG6
AF29 E14 AR18

GRAPHICS VIDs
C431 10U/6.3V_8X VCC17 VTT0_17 VAXG7
AF28 VCC18 VTT0_18 E12 AR16 VAXG8 GFX_VID[0] AM22 GFXVR_VID_0 [32]
C430 10U/6.3V_8X AF27 D14 AP21 AP22 GFXVR_VID_1 [32]
VCC19 VTT0_19 VAXG9 GFX_VID[1] +1.5V_CPUVDDQ
C229 10U/6.3V_8X AF26 D13 AP19 AN22 GFXVR_VID_2 [32]
C447 10U/6.3V_8X VCC20 VTT0_20 VAXG10 GFX_VID[2]
AD35 D12 AP18 AP23
C228 10U/6.3V_8X AD34
VCC21 VTT0_21
D11 AP16
VAXG11 GFX_VID[3]
AM23
GFXVR_VID_3 [32]
6A/maximum

1.1V RAIL POWER


VCC22 VTT0_22 VAXG12 GFX_VID[4] GFXVR_VID_4 [32]
C445 10U/6.3V_8X AD33 C14 AN21 AP24 GFXVR_VID_5 [32]
C446 10U/6.3V_8X VCC23 VTT0_23 VAXG13 GFX_VID[5]
AD32 VCC24 VTT0_24 C13 AN19 VAXG14 GFX_VID[6] AN24 GFXVR_VID_6 [32]

GRAPHICS
C441 10U/6.3V_8X AD31 C12 AN18
C172 10U/6.3V_8X VCC25 VTT0_25 VAXG15
AD30 VCC26 VTT0_26 C11 AN16 VAXG16
C444 10U/6.3V_8X AD29 B14 AM21 AR25 GFXVR_EN GFXVR_EN [32]
C435 10U/6.3V_8X VCC27 VTT0_27 VAXG17 GFX_VR_EN
AD28 VCC28 VTT0_28 B12 AM19 VAXG18 GFX_DPRSLPVR AT25 GFXVR_DPRSLPVR [32]
C429 10U/6.3V_8X AD27 A14 AM18 AM24
VCC29 VTT0_29 VAXG19 GFX_IMON GFXVR_IMON [32]
C225 0.1U/10V_4X AD26 A13 +VAXG AM16
C452 0.1U/10V_4X VCC30 VTT0_30 C285 10U/6.3V_8X VAXG20
AC35 VCC31 VTT0_31 A12 AL21 VAXG21
AC34 A11 C471 10U/6.3V_8X AL19
VCC32 VTT0_32 VAXG22
C197 *0.047U/10V_4X AC33 VCC33 VTT Rail Values are C287 10U/6.3V_8X AL18 VAXG23
C214 *0.047U/10V_4X AC32 C470 10U/6.3V_8X AL16 for S3 power reduction
C456 *0.047U/10V_4X AC31
VCC34 Auburndal VTT=1.05V C453 10U/6.3V_8X AK21
VAXG24
AJ1
VCC35 VAXG25 VDDQ1 +1.5V_CPUVDDQ
C288 10U/6.3V_8X C144 1U/6.3V_4X

- 1.5V RAILS
AC30 VCC36 VTT0_33 AF10 +VTT AK19 VAXG26 VDDQ2 AF1
AC29 AE10 C286 10U/6.3V_8X AK18 AE7 C165 1U/6.3V_4X +1.5V_CPUVDDQ
VCC37 VTT0_34 C114 10U/6.3V_8X C454 10U/6.3V_8X VAXG27 VDDQ3 C167 1U/6.3V_4X
AC28 VCC38 VTT0_35 AC10 AK16 VAXG28 VDDQ4 AE4
CPU CORE SUPPLY

C110 10U/6.3V_8X C160 1U/6.3V_4X

POWER
B AC27 VCC39 VTT0_36 AB10 AJ21 VAXG29 VDDQ5 AC1 B
AC26 Y10 AJ19 AB7 C143 1U/6.3V_4X
VCC40 VTT0_37 VAXG30 VDDQ6 C148 10U/6.3V_8X R337
AA35 VCC41 VTT0_38 W10 AJ18 VAXG31 VDDQ7 AB4
AA34 U10 AJ16 Y1 C135 10U/6.3V_8X 220_8
VCC42 VTT0_39 VAXG32 VDDQ8 C204 *330U/2V_7343P_E6b

+
AA33 VCC43 VTT0_40 T10 AH21 VAXG33 VDDQ9 W7
AA32 J12 AH19 W4
C232 10U/6.3V_8X VCC44 VTT0_41 (15mils) VAXG34 VDDQ10
POWER

AA31 VCC45 VTT0_42 J11 AH18 VAXG35 VDDQ11 U1


AA30 VCC46 VTT0_43 J16 +VTT_43 R103 *short_6 AH16 VAXG36 VDDQ12 T7

3
C423 10U/6.3V_8X AA29 J15 +VTT_44 R108 *short_6 T4
VCC47 VTT0_44 VDDQ13
AA28 VCC48 VDDQ14 P1
C169 10U/6.3V_8X AA27 N7

DDR3
VCC49 PSI# VDDQ15
AA26 VCC50 PSI# AN33 PSI# [30] VDDQ16 N4 [12,27,31] MAINON_ON_G 2
C450 10U/6.3V_8X Y35 L1
VCC51 VDDQ17

FDI
Y34 +VTT J24 H1 Q42
C195 10U/6.3V_8X VCC52 VID0 C155 10U/6.3V_8X VTT1_45 VDDQ18 DMN601K-7_300MA
Y33 VCC53 VID[0] AK35 H_VID0 [30] J23 VTT1_46
Y32 AK33 VID1 C416 10U/6.3V_8X H25
H_VID1 [30]

1
C181 10U/6.3V_8X VCC54 VID[1] VID2 VTT1_47
Y31 VCC55 VID[2] AK34 H_VID2 [30]
Y30 AL35 VID3
VCC56 VID[3] H_VID3 [30]
C203 *10U/6.3V_8X Y29 AL33 VID4 P10
CPU VIDS

VCC57 VID[4] H_VID4 [30] VTT0_59 +VTT


Y28 AM33 VID5 +VTT K26 N10 C425 10U/6.3V_8X
VCC58 VID[5] H_VID5 [30] VTT1_48 VTT0_60

PEG & DMI


C219 *10U/6.3V_8X Y27 AM35 VID6 C411 10U/6.3V_8X J27 L10 C434 10U/6.3V_8X
VCC59 VID[6] H_VID6 [30] VTT1_49 VTT0_61
Y26 AM34 ICH_DPRSTP# ICH_DPRSTP# [30] C410 10U/6.3V_8X J26 K10 C417 10U/6.3V_8X
VCC60 PROC_DPRSLPVR C216 10U/6.3V_8X VTT1_50 VTT0_62 C418 10U/6.3V_8X
V35 J25 J22

1.1V
VCC61 C200 10U/6.3V_8X VTT1_51 VTT1_63
V34 VCC62 H27 VTT1_52 VTT1_64 J20
V33 VCC63 G28 VTT1_53 VTT1_65 J18
V32 VCC64 VTT_SELECT G15 TP2 G27 VTT1_54 VTT1_66 H21
V31 VCC65 G26 VTT1_55 VTT1_67 H20
V30 VCC66 H_VTTVID1=Low, 1.1V F26 VTT1_56 VTT1_68 H19
V29 E26
V28
VCC67 H_VTTVID1=High, 1.05V E25
VTT1_57
C VCC68 VTT1_58 C
V27 L26 +1.8V

1.8V
VCC69 VCCPLL1 C154 10U/6.3V_8X
V26 VCC70 VCCPLL2 L27
U35 M26 C157 4.7U/6.3V_6X
VCC71 VCCPLL3 C156 2.2U/6.3V_6X
U34 VCC72
U33 AN35 ISENSE C158 1U/6.3V_4X
SENSE LINES

VCC73 ISENSE ISENSE [30]


U32 IC,AUB_CFD_rPGA,R1P0 C420 1U/6.3V_4X
VCC74
U31 VCC75 VTT_SENSE B15 VTT_SENSE TP65
U30 VCC76 VSS_SENSE_VTT A15 TP_VSS_SENSE_VTT TP64
U29 VCC77
U28 VID0 R418 1K_4 +VTT
VCC78 R411 100/F_4 R419 *1K_4
U27 VCC79 +VCC_CORE
U26 AJ34 VCCSENSE [30] VID1 R415 1K_4
VCC80 VCC_SENSE R416 *1K_4
R35 VCC81 VSS_SENSE AJ35 VSSSENSE [30]
R34 R413 100/F_4 VID2 R420 1K_4
VCC82 R421 *1K_4
R33 VCC83
R32 VID3 R422 *1K_4
VCC84 R423 1K_4
R31 VCC85
R30 VID4 R424 *1K_4
VCC86 R425 1K_4
R29 VCC87
R28 VID5 R432 1K_4
VCC88 R433 *1K_4
R27 VCC89
R26 VID6 R426 *1K_4
VCC90 R427 1K_4
P35 VCC91
P34 ICH_DPRSTP# R428 1K_4
VCC92 R429 *1K_4
P33 VCC93
P32 PSI# R430 *1K_4
VCC94 R431 1K_4
P31 VCC95
P30 VCC96
P29 VCC97
D P28 VCC98 HFM_VID : Max 1.4V D
P27
P26
VCC99 +VCC_CORE LFM_VID : Min 0.65V
VCC100
IC,AUB_CFD_rPGA,R1P0

+
C191
+
C190 Quanta Computer Inc.
*330U/2V_7343P_E6b *330U/2V_7343P_E6b
PROJECT : TE2
Size Document Number Rev
1A
PROCESSER 3/4(POWER)
Date: Tuesday, March 09, 2010 Sheet 5 of 35
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

http://laptopblue.vn/
AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)
U16I
U16H K27 U16E
VSS161
K9 VSS162
AT20 VSS1 VSS81 AE34 K6 VSS163 [12] DDR_VREF_DQ0 J17 SA_DIMM_VREF RSVD_NCTF_41 AT2
AT17 VSS2 VSS82 AE33 K3 VSS164 [13] DDR_VREF_DQ1 H17 SB_DIMM_VREF RSVD_NCTF_42 AT3
AR31 VSS3 VSS83 AE32 J32 VSS165 RSVD_NCTF_43 AR1
AR28 AE31 J30 CFG0 AM30 AL28
A VSS4 VSS84 VSS166 CFG[0] RSVD45 A
AR26 VSS5 VSS85 AE30 J21 VSS167 AM28 CFG[1] RSVD46 AL29
AR24 VSS6 VSS86 AE29 J19 VSS168 AP31 CFG[2] RSVD47 AP30
AR23 AE28 H35 CFG3 AL32 AP32
VSS7 VSS87 VSS169 CFG4 CFG[3] RSVD48
AR20 VSS8 VSS88 AE27 H32 VSS170 AL30 CFG[4] RSVD49 AL27
AR17 VSS9 VSS89 AE26 H28 VSS171 AM31 CFG[5] RSVD50 AT31
AR15 VSS10 VSS90 AE6 H26 VSS172 AN29 CFG[6]
AR12 AD10 H24 CFG7 AM32 AT32
VSS11 VSS91 VSS173 CFG[7] RSVD51
AR9 VSS12 VSS92 AC8 H22 VSS174 AK32 CFG[8] RSVD52 AP33
AR6 VSS13 VSS93 AC4 H18 VSS175 AK31 CFG[9] RSVD53 AR33
AR3 VSS14 VSS94 AC2 H15 VSS176 AK28 CFG[10] RSVD_NCTF_54 AT33
AP20 VSS15 VSS95 AB35 H13 VSS177 AJ28 CFG[11] RSVD_NCTF_55 AT34
AP17 VSS16 VSS96 AB34 H11 VSS178 AN30 CFG[12] RSVD_NCTF_56 AP35
AP13 VSS17 VSS97 AB33 H8 VSS179 AN32 CFG[13] RSVD_NCTF_57 AR35
AP10 VSS18 VSS98 AB32 H5 VSS180 AJ32 CFG[14] RSVD58 AR32
AP7 VSS19 VSS99 AB31 H2 VSS181 AJ29 CFG[15] RSVD_TP_59 E15
AP4 VSS20 VSS100 AB30 G34 VSS182 AJ30 CFG[16] RSVD_TP_60 F15
AP2 VSS21 VSS101 AB29 G31 VSS183 AK30 CFG[17]
AN34 AB28 G20 TP4 H16 A2
VSS22 VSS102 VSS184 RSVD_TP_86 KEY
AN31 VSS23 VSS103 AB27 G9 VSS185 RSVD62 D15
AN23 VSS24 VSS104 AB26 G6 VSS186 AP25 RSVD1 RSVD63 C15
AN20 VSS25 VSS105 AB6 G3 VSS187 AL25 RSVD2 RSVD64 AJ15 RSVD64_R R138 *0_4
AN17 AA10 F30 AL24 AH15 RSVD65_R R137 *0_4

RESERVED
VSS26 VSS106 VSS188 RSVD3 RSVD65
AM29 VSS27 VSS107 Y8 F27 VSS189 AL22 RSVD4 RSVD_TP_66 AA5
AM27 VSS28 VSS108 Y4 F25 VSS190 AJ33 RSVD5 RSVD_TP_67 AA4
AM25 VSS29 VSS109 Y2 F22 VSS191 AG9 RSVD6 RSVD_TP_68 R8
AM20 VSS30 VSS110 W35 F19 VSS192 M27 RSVD7 RSVD_TP_69 AD3
AM17 VSS31 VSS111 W34 F16 VSS193 L28 RSVD8 RSVD_TP_70 AD2
AM14 VSS32 VSS112 W33 E35 VSS194
AM11 VSS33 VSS113 W32 E32 VSS195 G25 RSVD11 RSVD_TP_71 AA2
B AM8 VSS34 VSS114 W31 E29 VSS196 G17 RSVD12 RSVD_TP_72 AA1 B
AM5 VSS35 VSS115 W30 E24 VSS197 E31 RSVD13 RSVD_TP_73 R9
AM2
AL34
AL31
VSS36
VSS37
VSS38 VSS
VSS116
VSS117
VSS118
W29
W28
W27
E21
E18
E13
VSS198
VSS199
VSS200
VSS E30
B19
A19
RSVD14
RSVD15
RSVD16
RSVD_TP_74
RSVD_TP_75
RSVD_TP_76
AG7
AE3
V4
AL23 W26 E11 R343 *0_4 TP_RSVD17_R A20 V5
VSS39 VSS119 VSS201 R344 *0_4 TP_RSVD18_R RSVD17 RSVD_TP_77
AL20 VSS40 VSS120 W6 E8 VSS202 B20 RSVD18 RSVD_TP_78 N2
AL17 VSS41 VSS121 V10 E5 VSS203 U9 RSVD19 RSVD_TP_79 AD5
AL12 VSS42 VSS122 U8 E2 VSS204 T9 RSVD20 RSVD_TP_80 AD7
AL9 VSS43 VSS123 U4 D33 VSS205
AL6 VSS44 VSS124 U2 D30 VSS206 AC9 RSVD21 RSVD_TP_81 W3
AL3 VSS45 VSS125 T35 D26 VSS207 AB9 RSVD22 RSVD_TP_82 W2
AK29 VSS46 VSS126 T34 D9 VSS208 C1 RSVD_NCTF_23 RSVD_TP_83 N3
AK27 VSS47 VSS127 T33 D6 VSS209 A3 RSVD_NCTF_24 RSVD_TP_84 AE5
AK25 VSS48 VSS128 T32 D3 VSS210 J29 RSVD26 RSVD_TP_85 AD9
AK20 VSS49 VSS129 T31 C34 VSS211 J28 RSVD27
AK17 VSS50 VSS130 T30 C32 VSS212 A34 RSVD_NCTF_28
AJ31 VSS51 VSS131 T29 C29 VSS213 A33 RSVD_NCTF_29
AJ23 T28 C28 C35 AP34 TP85
VSS52 VSS132 VSS214 RSVD_NCTF_30 VSS
AJ20 VSS53 VSS133 T27 C24 VSS215
AJ17 VSS54 VSS134 T26 C22 VSS216 B35 RSVD_NCTF_31
AJ14 VSS55 VSS135 T6 C20 VSS217 AJ13 RSVD32
AJ11 VSS56 VSS136 R10 C19 VSS218 AJ12 RSVD33
AJ8 VSS57 VSS137 P8 C16 VSS219 AH25 RSVD34
AJ5 VSS58 VSS138 P4 B31 VSS220 AK26 RSVD35
AJ2 VSS59 VSS139 P2 B25 VSS221 AL26 RSVD36
AH35 VSS60 VSS140 N35 B21 VSS222 AR2 RSVD_NCTF_37
AH34 VSS61 VSS141 N34 B18 VSS223 AJ26 RSVD38
AH33 VSS62 VSS142 N33 B17 VSS224 AJ27 RSVD39
C
AH32 VSS63 VSS143 N32 B13 VSS225 AP1 RSVD_NCTF_40 C
AH31 VSS64 VSS144 N31 B11 VSS226
AH30 N30 B8 IC,AUB_CFD_rPGA,R1P0
VSS65 VSS145 VSS227
AH29 VSS66 VSS146 N29 B6 VSS228
AH28 VSS67 VSS147 N28 B4 VSS229
AH27 VSS68 VSS148 N27 A29 VSS230
AH26 VSS69 VSS149 N26 A27 VSS231
AH20 VSS70 VSS150 N6 A23 VSS232
AH17 VSS71 VSS151 M10 A9 VSS233
AH13 VSS72 VSS152 L35
AH9 VSS73 VSS153 L32 AT35 VSS_NCTF1
AH6 VSS74 VSS154 L29 AT1 VSS_NCTF2
AH3 L8 R435 *short_4 AR34
NCTF

VSS75 VSS155 VSS_NCTF3


AG10 VSS76 VSS156 L5 R363 *short_4 B34 VSS_NCTF4 For Discrete only
AF8 L2 R75 *short_4 B2
VSS77 VSS157 VSS_NCTF5
AF4 VSS78 VSS158 K34 B1 VSS_NCTF6
AF2 VSS79 VSS159 K33 A35 VSS_NCTF7
AE35 VSS80 VSS160 K30
CFG0 R167 *3.01K/F_4
IC,AUB_CFD_rPGA,R1P0 IC,AUB_CFD_rPGA,R1P0 CFG3 R164 3.01K/F_4
CFG4 R152 *3.01K/F_4
CFG7 R168 *3.01K/F_4

1 0
CFG[ 1:0 ] - PCI_Epress Configuration Select
CFG4 Enabled; An external Display port * 11= 1 x 16 PEG
(Display Port Disabled; No Physical Display Port device is connected to the Embedded * 10= 2 x 8 PEG
D D
Presence) attached to Embedded Diplay Port Display port
The Clarkfield processor's PCI Express interface may
not meet PCI Express 2.0 jitter specifications. Intel CFG0
recommends placing a 3.01K +/- 5% pull down resistor to (PCI-Epress Single PEG Bifurcation enabled
VSS on CFG[7] pin for both rPGA and BGA components. Configuration Select)
This pull down resistor should be removed when this Quanta Computer Inc.
issue is fixed. CFG3
(PCI-Epress Static Normal Operation Lane Numbers Reversed PROJECT : TE2
Lane Reversal) 15 -> 0 , 14 -> 1 Size Document Number Rev
2A
PROCESSER 4/4 (GND)
Date: Tuesday, March 09, 2010 Sheet 6 of 35
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

http://laptopblue.vn/
INTVRMEN - Integrated SUS 1.1V VRM Enable
High - Enable Internal VRs

C426 12P/50V_4C
IBEX PEAK-M (LVDS,DDI)
2
IBEX PEAK-M (HDA,JTAG,SATA)
1
U17D
Y3 R389
+3V
U17A LAD0 [16,22] [15] LVDS_BRIGHT T48 L_BKLTEN Ibex-M SDVO_TVCLKINN BJ46
32.768KHZ_10 10M_4
LAD1 [16,22] [15] LVDS_DIGON T47 L_VDD_EN 4 OF 10 SDVO_TVCLKINP BG46
LAD2 [16,22]
3
4

RTC_X1 B13 RTCX1 Ibex-M FWH0 / LAD0 D33 LAD3 [16,22] [15] LVDS_PWM Y48 L_BKLTCTL SDVO_STALLN BJ48
A C424 12P/50V_4C RTC_X2 D13 RTCX2 1 OF 10 FWH1 / LAD1 B33 R111
SDVO_STALLP BG48
A

LPC FWH2 / LAD2


FWH3 / LAD3
C32
A32
LFRAME# [16,22] 10K_4 [15] LCD_EDIDCLK
[15] LCD_EDIDDATA
AB48
Y45
L_DDC_CLK
L_DDC_DATA SDVO_INTN BF45
RTC_RST# C14 RTCRST# FWH4 / LFRAME# C34
A34 R187 10K_4 L_CTRL_CLK AB46
SDVO SDVO_INTP BH45
LDRQ0# +3V L_CTRL_CLK
SRTC_RST# D17 SRTCRST# RTC (+3V) LDRQ1# / GPIO23
SERIRQ
F34
AB9
LDRQ#1 [16]
SERIRQ [16,22]
R192 10K_4 L_CTRL_DATA V48 L_CTRL_DATA SDVO_CTRLCLK
SDVO_CTRLDATA
T51
T53
+RTC_CELL R395 1M_4 SM_INTRUDER# A16 LVDS_IBG AP39
INTRUDER# TP29 LVDS_VBG LVD_IBG
SATA0RXN AK7 SATA_RXN0 [18] AP41 LVD_VBG DDPB_AUXN BG44
+RTC_CELL R390 330K_6 PCH_INVRMEN A14 AK6 SATA_RXP0 [18] BJ44
INTVRMEN SATA0RXP DDPB_AUXP

DISPLAY PORT B
SATA0TXN AK11
AK9
SATA_TXN0 [18] HDD LVDS_VREFH
LVDS_VREFL
AT43
AT42
LVD_VREFH DDPB_HPD AU38
SATA0TXP SATA_TXP0 [18] LVD_VREFL
DDPB_0N BD42
ACZ_BITCLK A30 AH6 LVDS--A BC42

Digital Display Interface


HDA_BCLK SATA1RXN SATA_RXN1 [18] DDPB_0P
ACZ_SYNC D29
P1
HDA_SYNC SATA1RXP AH5
AH9 SATA_TXN1_C C140 0.01U/25V_4X
SATA_RXP1 [18] ODD [15] LCD_TXLCLKOUT- AV53
AV51
LVDSA_CLK# DDPB_1N BJ42
BG42
[10,19] PCBEEP SPKR SATA1TXN SATA_TXN1 [18] [15] LCD_TXLCLKOUT+ LVDSA_CLK DDPB_1P
ACZ_RST# C30 AH8 SATA_TXP1_C C139 0.01U/25V_4X SATA_TXP1 [18] BB40
HDA_RST# SATA1TXP DDPB_2N
[19] ACZ_SDIN0_AUDIO G30 HDA_SDIN0 [15] LCD_TXLOUT0- BB47 LVDSA_DATA#0 DDPB_2P BA40

TP17
F30
E32
HDA_SDIN1
HDA_SDIN2
IHDA SATA2RXN
SATA2RXP
AF11
AF9
[15] LCD_TXLOUT1-
[15] LCD_TXLOUT2-
BA52
AY48
LVDSA_DATA#1
LVDSA_DATA#2
DDPB_3N
DDPB_3P
AW38
BA38
TP20 F32 AF7 AV47
TP25 ACZ_SDOUT HDA_SDIN3 SATA2TXN TP48 LVDSA_DATA#3 TP45
B29 HDA_SDO SATA2TXP AF6 DDPC_CTRLCLK Y49
H32 BB48 AB49 TP51
[10,22] PCH_GPIO33
J30
HDA_DOCK_EN# / GPIO33 (+3V) AH3
[15] LCD_TXLOUT0+
BA50
LVDSA_DATA0 DDPC_CTRLDATA
HDA_DOCK_RST# / GPIO13 (+3V_S5) SATA3RXN [15] LCD_TXLOUT1+ LVDSA_DATA1

DISPLAY PORT C
TP16
SATA SATA3RXP
SATA3TXN
AH1
AF3
[15] LCD_TXLOUT2+ AY49
AV48
LVDSA_DATA2
LVDSA_DATA3
DDPC_AUXN
DDPC_AUXP
BE44
BD44
AF1 TP47 AV40
SATA3TXP DDPC_HPD
PCH_JTAG_TCK M3 JTAG_TCK
AD9 AP48
LVDS--B BE40
PCH_JTAG_TMS SATA4RXN LVDSB_CLK# DDPC_0N
K3 JTAG_TMS SATA4RXP AD8 AP47 LVDSB_CLK DDPC_0P BD40
SATA4TXN AD6 DDPC_1N BF41
PCH_JTAG_TDI K1 JTAG_TDI JTAG SATA4TXP AD5 AY53
AT49
LVDSB_DATA#0
LVDSB_DATA#1
DDPC_1P
DDPC_2N
BH41
BD38
PCH_JTAG_TDO J2 AD3 SATA_RXN5 [17] AU52 BC38
JTAG_TDO SATA5RXN LVDSB_DATA#2 DDPC_2P
SATA5RXP AD1 SATA_RXP5 [17] AT53 LVDSB_DATA#3 DDPC_3N BB36
PCH_JTAG_RST# J4 TRST# SATA5TXN AB3
AB1
SATA_TXN5 [17] ESATA AY51
DDPC_3P BA36
SATA5TXP SATA_TXP5 [17] LVDSB_DATA0
B AT48 LVDSB_DATA1 DDPD_CTRLCLK U50 INT_HDMI_SCL [14] B
AU50 LVDSB_DATA2 DDPD_CTRLDATA U52 INT_HDMI_SDA [14]
SPI_CLK_R BA2 AF16 AT51
SPI_CLK SATAICOMPO LVDSB_DATA3

DISPLAY PORT D
BC46 DDPD_AUXN R199 10K_4 +3V
SPI_CS0#_R SATA_COMP R116 37.4/F_4 CRT_BLU DDPD_AUXN DDPD_AUXP R200 10K_4
AV3 SPI_CS0# SATAICOMPI AF15 +1.05V [15] CRT_BLU AA52 CRT_BLUE DDPD_AUXP BD46
CRT_GRE AB53 AT38
[15] CRT_GRE CRT_GREEN DDPD_HPD Port-D_HPD [14]
TP69
SPI_CS1# AY3 SPI_CS1# SPI SATALED# T3 SATA_LED#
SATA_LED# [24] [15] CRT_RED
CRT_RED AD53 CRT_RED
CRT DDPD_0N BJ40 C_TMDSD_DATA2#
V51 BG40 C_TMDSD_DATA2
[15] CRT_DDCCLK CRT_DDC_CLK DDPD_0P
SPI_SI_R AY1 V53 BJ38 C_TMDSD_DATA1#
[10] SPI_SI_R SPI_MOSI [15] CRT_DDCDAT CRT_DDC_DATA DDPD_1N
Y9 R114 10K_4 BG38 C_TMDSD_DATA1
SPI_SO AV1
(+3V) SATA0GP / GPIO21
V1 R349 10K_4
+3V
R449 0_4 CRT_HSYNC_R Y53
DDPD_1P
BF37 C_TMDSD_DATA0#
SPI_MISO (+3V_S5) SATA1GP / GPIO19 +3V [15] CRT_HSYNC
R450 0_4 CRT_VSYNC_R Y51
CRT_HSYNC DDPD_2N
BH37 C_TMDSD_DATA0
[15] CRT_VSYNC CRT_VSYNC DDPD_2P
IbexPeak-M_Rev1_0 BE36 C_TMDSD_CLK#
R183 1K/D_4 DAC_IREF AD48 DDPD_3N C_TMDSD_CLK
DAC_IREF DDPD_3P BD36
AB51 CRT_IRTN
IbexPeak-M_Rev1_0

[RTC] Port Strap How to enable Port? How to disable Port? [UMA]
R160 *short_4 LVDS_VREFH
RTC BATTERY LVDS L_DDC_DATA PU to 3.3V with 2.2k+/- 5% NC R147 2.37K/F_4
LVDS_VREFL
LVDS_IBG
R440 150/F_4 CRT_BLU
R441 150/F_4 CRT_GRE
+3VPCU +RTC_CELL
(20mils) Port B SDVO_CTRLDATA PU to 3.3V with 2.2k+/- 5% NC R442 150/F_4 CRT_RED

D28 CH501H-40PT_100MA (30mils) EMI C_TMDSD_DATA2 C248 HM@4.7P/50V_4C C_TMDSD_DATA2#


C
(20mils) C

R_3VRTC D27 CH501H-40PT_100MA Port C DDPC_CTRLDATA PU to 3.3V with 2.2k+/- 5% NC C_TMDSD_DATA1 C245 HM@4.7P/50V_4C C_TMDSD_DATA1#

C473 C_TMDSD_DATA0 C268 HM@4.7P/50V_4C C_TMDSD_DATA0#

1U/10V_6X Port D DDPD_CTRLDATA PU to 3.3V with 2.2k+/- 5% NC C_TMDSD_CLK C262 HM@4.7P/50V_4C C_TMDSD_CLK#
R465
HDMI
1K_4
eDP CFG[4] PD to GND directly NC
C_TMDSD_DATA2 C254 HM@0.1U/10V_4X
RTC_N02 (20mils)
1 3 R460 1.91K/F_4 R459 1.91K/F_4 (20mils) +5VPCU C_TMDSD_DATA2# C255 HM@0.1U/10V_4X
TMDSD_DATA2 [14]
TMDSD_DATA2# [14]
Q47
C_TMDSD_DATA1 C250 HM@0.1U/10V_4X
TMDSD_DATA1 [14]
2

MMBT3904-7-F_200MA R456 C_TMDSD_DATA1# C251 HM@0.1U/10V_4X


TMDSD_DATA1# [14]
CN8 6.8K/F_4
2 C_TMDSD_DATA0 C272 HM@0.1U/10V_4X
1
2
1
(20mils) C_TMDSD_DATA0# C273 HM@0.1U/10V_4X
TMDSD_DATA0 [14]
TMDSD_DATA0# [14]
RTC_N03 R448 15K/F_4
AAA-BAT-046-K03
C_TMDSD_CLK C265 HM@0.1U/10V_4X
TMDSD_CLK [14]
C_TMDSD_CLK# C257 HM@0.1U/10V_4X
TMDSD_CLK# [14]

For AUDIO
[19] ACZ_RST#_AUDIO R409 33_4 ACZ_RST# RESET JUMP An RC delay circuit with a time delay in the range
PCH
[19] ACZ_SDOUT_AUDIO R406
C449
33_4 ACZ_SDOUT
*10P/50V_4C +RTC_CELL
of 18 ms to 25 ms should be provided
4M byte SPI ROM 2MB 4MB 8MB
[19] ACZ_SYNC_AUDIO R407 33_4 ACZ_SYNC PM55
C451 *10P/50V_4C R391 20K_6 RTC_RST#

D
[19] BIT_CLK_AUDIO R410 33_4 ACZ_BITCLK C432 G1 U15 HM55 D
C455 22P/50V_4N SPI_SO R365 0_4 SPI_SO_R 2 8 +3V
1U/6.3V_4X *SHORT_ PAD SO VDD
SPI_SI_R R351 0_4 SPI_SI 5 SI HOLD 7SPI_HOLD# R366 3.3K/F_4 HM57/PM57
+1.05V SPI_CLK_R R361 0_4 SPI_CLK 6 3 SPI_WP# R360 3.3K/F_4
SCK WP QM57/QS57
R377 *51_4 PCH_JTAG_TMS +RTC_CELL SPI_CS0#_R R368 0_4 SPI_CS0# 1 4 C412
CE VSS
R374 *51_4 PCH_JTAG_RST# W25Q32BVSSIG 0.1U/10V_4X
R394 20K_6 SRTC_RST#
R376 *51_4 PCH_JTAG_TDI
C438 G2
Quanta Computer Inc.
R375 *51_4 PCH_JTAG_TDO
1U/6.3V_4X *SHORT_ PAD PROJECT : TE2
R354 51_4 PCH_JTAG_TCK Size Document Number Rev
2A
PCH 1/5 (SATA,HDA,LPC)
Date: Wednesday, March 10, 2010 Sheet 7 of 35
1 2 3 4 5 6 7 8
5 4 3 2 1

IBEX PEAK-M (GND) http://laptopblue.vn/


U17I
AY7 H49
B11
B15
VSS[159]
VSS[160]
VSS[259]
VSS[260] H5
J24
IBEX PEAK-M (PCI-E,SMBUS,CLK)
VSS[161] VSS[261] U17B
B19 VSS[162] VSS[262] K11
B23 VSS[163] VSS[263] K43
B31 VSS[164] VSS[264] K47
TP79 Ibex-M SMBus
B35
B39
VSS[165] VSS[265] K7
L14 TP78
BG30
BJ30
PERN1 2 OF 10 B9 SMBALERT#
D
B43
VSS[166] VSS[266]
L18 TP77 BF29
PERP1 (+3V_S5) SMBALERT# / GPIO11
H14 SCLK D
VSS[167] VSS[267] PETN1 SMBCLK SCLK [2,16,20]
B47 L2 TP76 BH29 C8 SDATA
VSS[168] VSS[268] PETP1 SMBDATA SDATA [2,16,20]
SMBL0ALERT#
B7 VSS[169] VSS[269] L22
TP26
(+3V_S5) SML0ALERT# / GPIO60 J14
SMB_CLK_ME0
BG12 VSS[170] VSS[270] L32 AW30 PERN2 SML0CLK C6
BB12 L36 TP23 BA30 G8 SMB_DATA_ME0
VSS[171] VSS[271] TP18 PERP2 SML0DATA SML1ALERT#
BB16 VSS[172] VSS[272] L40 BC30 PETN2 (+3V_S5) SML1ALERT# / GPIO74 M14
BB20 L52 TP19 BD30 E10 MBCLK2
BB24
VSS[173] VSS[273]
M12
PETP2 (+3V_S5) SML1CLK / GPIO58
G12 MBDATA2
BB30
VSS[174] VSS[274]
M16 [16] PCIE_RXN3 PCIE_RXN3 AU30 (+3V_S5) SML1DATA / GPIO75
VSS[175] VSS[275] PCIE_RXP3 PERN3
BB34 VSS[176] VSS[276] M20 [16] PCIE_RXP3 AT30 PERP3
BB38 N38 3G [16] PCIE_TXN3 C240 0.1U/10V_4X PCIE_TXN3_C AU32
VSS[177] VSS[277] C235 0.1U/10V_4X PCIE_TXP3_C AV32 PETN3
BB42 VSS[178] VSS[278] M34 [16] PCIE_TXP3 PETP3
BB49 M38 T13 CL_CLK1
VSS[179] VSS[279] +3V CL_CLK1 CL_CLK1 [16]
BB5
BC10
VSS[180] VSS[280] M42
M46
TP27
TP24
BA32
BB32
PERN4 Controller T11 CL_DATA1
VSS[181] VSS[281] PERP4 CL_DATA1 CL_DATA1 [16]
BC14
BC18
VSS[182] VSS[282] M49
M5
TP21
TP22
BD32
BE32
PETN4 Link T9 CL_RST#1
VSS[183] VSS[283] PETP4 CL_RST1# CL_RST#1 [16]
BC2 M8 PCIE_CLK_REQ1# R356 10K_4
VSS[184] VSS[284] PCIE_CLK_REQ2# R379 10K_4 PCIE_RXN5
BC22 VSS[185] VSS[285] N24 [16] PCIE_RXN5 BF33 PERN5
BC32 P11 [16] PCIE_RXP5 PCIE_RXP5 BH33
VSS[186] VSS[286] C234 0.1U/10V_4X PCIE_TXN5_C BG32 PERP5
BC36 VSS[187] VSS[287] AD15 WLAN [16] PCIE_TXN5 PETN5
BC40 P22 [16] PCIE_TXP5 C239 0.1U/10V_4X PCIE_TXP5_C BJ32
BC44
VSS[188]
VSS[189]
VSS[288]
VSS[289] P30
PCIE_RXN6
PETP5
PCI-E* PEG
BC52 VSS[190] VSS[290] P32 [20] PCIE_RXN6 BA34 PERN6
BH9 P34 [20] PCIE_RXP6 PCIE_RXP6 AW34 H1 PEG_CLKREQ#
BD48
VSS[191] VSS[291]
P42 LAN C236 0.1U/10V_4XPCIE_TXN6_C BC34
PERP6 (+3V_S5)PEG_A_CLKRQ# / GPIO47 AD43 TP36
VSS[192] VSS[292] [20] PCIE_TXN6 PETN6 CLKOUT_PEG_A_N
BD49 P45 [20] PCIE_TXP6 C226 0.1U/10V_4XPCIE_TXP6_C BD34 AD45 TP39
VSS[193] VSS[293] PETP6 CLKOUT_PEG_A_P
BD5 VSS[194] VSS[294] P47 CLKOUT_DMI_N AN4 CLK_PCIE_3GPLLN [3]
BE12 VSS[195] VSS[295] R2 AT34 PERN7 CLKOUT_DMI_P AN2 CLK_PCIE_3GPLLP [3]
C BE16 VSS[196] VSS[296] R52 AU34 PERP7
C
BE20 VSS[197] VSS[297] T12 AU36 PETN7
BE24 T41 +3V_S5 AV36 AT1
VSS[198] VSS[298] PETP7 CLKOUT_DP_N / CLKOUT_BCLK1_N CLK_DREFSSCLKN [3]
BE30 VSS[199] VSS[299] T46 CLKOUT_DP_P / CLKOUT_BCLK1_P AT3 CLK_DREFSSCLKP [3]
BE34 T49 PCIE_CLK_REQ0# R70 10K_4 TP81 BG34
VSS[200] VSS[300] PCIE_CLK_REQ3# R384 *10K_4 TP82 PERN8
BE38 VSS[201] VSS[301] T5 BJ34 PERP8
BE42 T8 PCIE_CLK_REQ4# R92 10K_4 TP83 BG36 AW24 CLK_BUF_PCIE_3GPLLN [2]
VSS[202] VSS[302] PCIE_CLK_REQB# R71 10K_4 TP84 PETN8 CLKIN_DMI_N
BE46 VSS[203] VSS[303] U30 BJ36 PETP8 CLKIN_DMI_P BA24 CLK_BUF_PCIE_3GPLLP [2]
BE48 U31 PCIE_CLK_RQ5# R96 10K_4 AK48
VSS[204] VSS[304] SMBALERT# R385 10K_4 CLKOUT_PCIE0N
BE50 VSS[205] VSS[305] U32 AK47 CLKOUT_PCIE0P
BE6 U34 SMBL0ALERT# R110 10K_4 AP3 CLK_BUF_BCLKN [2]
VSS[206] VSS[306] SMB_CLK_ME0 R383 2.2K_4 PCIE_CLK_REQ0# CLKIN_BCLK_N
BE8 VSS[207] VSS[307] P38 P9 PCIECLKRQ0# / GPIO73 (+3V_S5) CLKIN_BCLK_P AP1 CLK_BUF_BCLKP [2]
BF3 V11 SMB_DATA_ME0 R94 2.2K_4 TP40 AM43

From CLK BUFFER


VSS[208] VSS[308] SML1ALERT# R65 10K_4 TP49 CLKOUT_PCIE1N
BF49 VSS[209] VSS[309] P16 AM45 CLKOUT_PCIE1P
BF51 V19 MBCLK2 R106 4.7K_4 F18 CLK_BUF_DREFCLKN [2]
VSS[210] VSS[310] MBDATA2 R107 4.7K_4 PCIE_CLK_REQ1# CLKIN_DOT_96N
BG18 V20 U4 E18
BG24
VSS[211] VSS[311]
V22 SCLK R74 2.2K_4 PCIECLKRQ1# / GPIO18 (+3V) CLKIN_DOT_96P CLK_BUF_DREFCLKP [2]
VSS[212] VSS[312] SDATA R73 2.2K_4 TP56
BG4 VSS[213] VSS[313] V30 AM47 CLKOUT_PCIE2N
BG50 V31 TP50 AM48 AH13 CLK_BUF_DREFSSCLKN [2]
VSS[214] VSS[314] PEG_CLKREQ# R372 10K_4 CLKOUT_PCIE2P CLKIN_SATA_N / CKSSCD_N
BH11 VSS[215] VSS[315] V32 CLKIN_SATA_P / CKSSCD_P AH12 CLK_BUF_DREFSSCLKP [2]
BH15 V34 PCIE_CLK_REQ2# N4
VSS[216] VSS[316] PCIECLKRQ2# / GPIO20 (+3V)
BH19 VSS[217] VSS[317] V35
BH23 V38 AH42 P41 R166 0_4 CLK_PCH_14M [2]
VSS[218] VSS[318] [20] CLK_PCIE_LAN# CLKOUT_PCIE3N REFCLK14IN
BH31 VSS[219] VSS[319] V43 LAN [20] CLK_PCIE_LAN AH41 CLKOUT_PCIE3P
BH35 V45 C253 *22P/50V_4N
VSS[220] VSS[320] PCIE_CLK_REQ3# CLK_PCI_FB
BH39 VSS[221] VSS[321] V46 [20] PCIE_CLK_REQ3# A8 PCIECLKRQ3# / GPIO25 (+3V_S5) CLKIN_PCILOOPBACK J42 CLK_PCI_FB [9]
BH43 VSS[222] VSS[322] V47
BH47 V49 Q12 2N7002_200MA AM51
VSS[223] VSS[323] [16] CLK_PCIE_3G# CLKOUT_PCIE4N
BH7 V5 MBCLK2 1 3 3G AM53 AH51 XTAL25_IN
VSS[224] VSS[324] 2ND_MBCLK [22] [16] CLK_PCIE_3G CLKOUT_PCIE4P XTAL25_IN
B
C12 VSS[225] VSS[325] V7 XTAL25_OUT AH53 XTAL25_OUT B
C50 V8 PCIE_CLK_REQ4# M9
VSS[226] VSS[326] [16] PCIE_CLK_REQ4# PCIECLKRQ4# / GPIO26 (+3V_S5)
D51 W2 AF38 XCLK_RCOMP +1.05V
2

VSS[227] VSS[327] XCLK_RCOMP R165 90.9/F_4


E12 VSS[228] VSS[328] W52
E16 VSS[229] VSS[329] Y11 [16] CLK_PCIE_MINI# AJ50 CLKOUT_PCIE5N
E20 Y12 WLAN [16] CLK_PCIE_MINI AJ52 T45 CLK_FLEX0 R196 10K_4
E24
VSS[230] VSS[330]
Y15
CLKOUT_PCIE5P (+3V) CLKOUTFLEX0 / GPIO64 P43 CLK_FLEX1 T2
+3V
VSS[231] VSS[331] +3V_S5 (+3V_S5) (+3V) CLKOUTFLEX1 / GPIO65
E30 Y19 PCIE_CLK_RQ5# H6 T42 CLK_FLEX2 T1
E34
VSS[232] VSS[332]
Y23
[16] PCIE_CLK_RQ5# PCIECLKRQ5# / GPIO44 (+3V) CLKOUTFLEX2 / GPIO66 N50 CLK_CARD_5159
E38
VSS[233] VSS[333]
Y28
(+3V) CLKOUTFLEX3 / GPIO67 CLK_CARD_5159 [21]
VSS[234] VSS[334] TP54
E42 VSS[235] VSS[335] Y30 AK53 CLKOUT_PEG_B_N
2

E46
E48
VSS[236] VSS[336] Y31
Y32
TP55 AK51 CLKOUT_PEG_B_P Clock Flex C464 22P/50V_4N
VSS[237] VSS[337] MBDATA2 PCIE_CLK_REQB#
E6 VSS[238] VSS[338] Y38 1 3 2ND_MBDATA [22] P13 PEG_B_CLKRQ# / GPIO56(+3V_S5)
E8 VSS[239] VSS[339] Y43
F49 Y46 Q11 2N7002_200MA
VSS[240] VSS[340] IbexPeak-M_Rev1_0
F5 VSS[241] VSS[341] P49
G10 VSS[242] VSS[342] Y5
G14 VSS[243] VSS[343] Y6
G18
G2
VSS[244]
VSS[245]
VSS[344]
VSS[345]
Y8
P24 Placement close
G22 VSS[246] VSS[346] T43
G32 AD51 XTAL25_IN C463 27P/50V_4N
VSS[247] VSS[347]
G36 VSS[248] VSS[348] AT8

2
G40 VSS[249] VSS[349] AD47
G44 Y47 Y4
VSS[250] VSS[350] R438
G52 VSS[251] VSS[351] AT12
AF39 AM6 1M/F_4 25MHZ_30

1
VSS[252] VSS[352]
H16 VSS[253] VSS[353] AT13
H20 AM5 XTAL25_OUT C466 27P/50V_4N
VSS[254] VSS[354]
A H30 VSS[255] VSS[355] AK45 A
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
IbexPeak-M_Rev1_0

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
PCH 2/5 (PCIE, SMBUS, CK)
Date: Wednesday, March 10, 2010 Sheet 8 of 35
5 4 3 2 1
1 2 3 4 5 6 7 8

IBEX PEAK-M (PCI,USB,NVRAM)


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H40
U17E
Ibex-M AY9
IBEX PEAK-M (DMI,FDI,GPIO)
AD0 NV_CE#0
N34 AD1 5 OF 10 NV_CE#1 BD1
C44 AP15 U17C
AD2 NV_CE#2
A38 AD3 NV_CE#3 BD8 FDI_RXN0 BA18 FDI_TXN0 [3]
C36 AD4 [3] DMI_RXN0 BC24 DMI0RXN Ibex-M FDI_RXN1 BH17 FDI_TXN1 [3]
A
J34 AD5 NV_DQS0 AV9 [3] DMI_RXN1 BJ22 DMI1RXN 3 OF 10 FDI_RXN2 BD16 FDI_TXN2 [3] A
A40
D45
E36
AD6
AD7 NVRAM NV_DQS1 BG8

AP7
[3]
[3]
DMI_RXN2
DMI_RXN3
AW20
BJ20
DMI2RXN
DMI3RXN
FDI_RXN3
FDI_RXN4
BJ16
BA16
BE14
FDI_TXN3
FDI_TXN4
[3]
[3]
AD8 NV_DQ0 / NV_IO0 FDI_RXN5 FDI_TXN5 [3]
H48 AD9 NV_DQ1 / NV_IO1 AP6 [3] DMI_RXP0 BD24 DMI0RXP FDI_RXN6 BA14 FDI_TXN6 [3]
E40 AD10 NV_DQ2 / NV_IO2 AT6 [3] DMI_RXP1 BG22 DMI1RXP FDI_RXN7 BC12 FDI_TXN7 [3]
C40 AD11 NV_DQ3 / NV_IO3 AT9 [3] DMI_RXP2 BA20 DMI2RXP
M48 AD12 NV_DQ4 / NV_IO4 BB1 [3] DMI_RXP3 BG20 DMI3RXP FDI_RXP0 BB18 FDI_TXP0 [3]
M45 AD13 NV_DQ5 / NV_IO5 AV6 FDI_RXP1 BF17 FDI_TXP1 [3]
F53 AD14 NV_DQ6 / NV_IO6 BB3 [3] DMI_TXN0 BE22 DMI0TXN FDI_RXP2 BC16 FDI_TXP2 [3]
M40
M43
AD15
AD16
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
BA4
BE4
[3]
[3]
DMI_TXN1
DMI_TXN2
BF21
BD20
DMI1TXN
DMI2TXN
DMI FDI FDI_RXP3
FDI_RXP4
BG16
AW16
FDI_TXP3
FDI_TXP4
[3]
[3]
J36 AD17 NV_DQ9 / NV_IO9 BB6 [3] DMI_TXN3 BE18 DMI3TXN FDI_RXP5 BD14 FDI_TXP5 [3]
K48 AD18 NV_DQ10 / NV_IO10 BD6 FDI_RXP6 BB14 FDI_TXP6 [3]
F40 AD19 NV_DQ11 / NV_IO11 BB7 [3] DMI_TXP0 BD22 DMI0TXP FDI_RXP7 BD12 FDI_TXP7 [3]
C42 AD20 NV_DQ12 / NV_IO12 BC8 [3] DMI_TXP1 BH21 DMI1TXP
K46 AD21 NV_DQ13 / NV_IO13 BJ8 [3] DMI_TXP2 BC20 DMI2TXP
M51 AD22 NV_DQ14 / NV_IO14 BJ6 [3] DMI_TXP3 BD18 DMI3TXP FDI_INT BJ14 FDI_INT [3]
J52 AD23 NV_DQ15 / NV_IO15 BG6 FDI_FSYNC0 BF13 FDI_FSYNC0 [3]
K51 AD24 FDI_FSYNC1 BH13 FDI_FSYNC1 [3]
L34 BD3 NV_ALE BH25 BJ12 FDI_LSYNC0 [3]
AD25 NV_ALE NV_ALE [10] DMI_ZCOMP FDI_LSYNC0
F42 AY6 +1.05V R402 49.9/F_4 DMI_COMP BF25 BG14 FDI_LSYNC1 [3]
AD26 NV_CLE DMI_IRCOMP FDI_LSYNC1
J40 AD27
G46 AD28
F44 AD29 NV_RCOMP AU2 NV_RCOMP R367 *32.4/F_4 System Power Management
PCI
M47 [3] SYS_RESET# SYS_RESET# T6 P12 SUSB# [22]
AD30 SYS_PWROK R77 *short_4 SYS_RESET# SLP_S3#
H36 AD31 NV_RB# AV7 M6 SYS_PWROK SLP_S4# H7 SUSC# [22]
R398 *short_4 B17
R85 *short_4 PWROK SLP_M#
J50 C/BE0# NV_WR#0_RE# AY8 K5 MEPWROK SLP_M# K8 TP8
G42 C/BE1# NV_WR#1_RE# AY5 TP23 N2
B H47 RSV_ICH_LAN_RST# A10 TP66 B
C/BE2# LAN_RST# SUS_PWR_ACK_R
G34 AV11 D9 M1
C/BE3# NV_WE#_CK0
BF5
[3] PM_DRAM_PWRGD
RSMRST# C16
DRAMPWROK (+3V_S5) SUS_PWR_DN_ACK / GPIO30 P7 AC_PRESENT
PCI_PIRQA# G38
NV_WE#_CK1 [22] RSMRST# RSMRST# (+3V_S5) ACPRESENT / GPIO31
Y1 CLKRUN#
PCI_PIRQB# H51
PIRQA# DNBSWON# P5
(+3V) CLKRUN# / GPIO32 P8 RSV_SUS_SATA# TP9
CLKRUN# [22]
PCI_PIRQC# PIRQB# [22] DNBSWON# PWRBTN# (+3V_S5) SUS_STAT# / GPIO61
PCI_PIRQD#
B37
A44
PIRQC# USBP0N H18
J18
USBP0- [15] CCD (+3V_S5)
(+3V_S5)
SUSCLK / GPIO62 F3
E4 SLP_S5# TP67
PIRQD# USBP0P USBP0+ [15] SLP_S5# / GPIO63
A18 PM_RI# F14 A6 PM_BATLOW# TP7
REQ0# F51
USBP1N
C18
TP71
PCIE_WAKE# J12
RI# (+3V_S5) BATLOW# / GPIO72
REQ0# USBP1P TP70 [16,20] PCIE_WAKE# WAKE#
REQ1# A46 N20 [3] PM_SYNC BJ10 F6
REQ1# / GPIO50 (+5V) USBP2- [23] (+3V_S5)
REQ2# B45 REQ2# / GPIO52 (+5V)
USBP2N
USBP2P P20 USBP2+ [23] Bluetooth PMSYNCH SLP_LAN# / GPIO29 TP6
REQ3# M53 J20
REQ3# / GPIO54 (+5V) USBP3- [21]
USBP3N
USBP3P L20 USBP3+ [21] CardReader IbexPeak-M_Rev1_0
[10] GNT0# F48 F20 RSMRST# R393 10K_4
USBP4- [16]
[10] GNT1# K45
GNT0#
GNT1# / GPIO51 (+3V)
USBP4N
USBP4P G20 USBP4+ [16] SIM RSV_ICH_LAN_RST# R386 10K_4
TP80 F36 A20
GNT2# / GPIO53 (+3V) USBP5N USBP5- [16]
[10] GNT3# H53 GNT3# / GPIO55 (+3V) USBP5P C20 USBP5+ [16] WLAN +3V_S5
USBP6N M22 TP11
PIRQE# B41 N22 TP10
PIRQF# PIRQE# / GPIO2 (+5V) USBP6P
K53 PIRQF# / GPIO3 (+5V) USBP7N B21 TP74
PIRQG# A36 D21 +3V
INTH# PIRQG# / GPIO4 (+5V) USBP7P TP75
U6 C137
A48 PIRQH# / GPIO5 (+5V) USBP8N H22
J22
USBP8- [15]
USBP8+ [15]
USB TC7SH08FU(F) 0.1U/10V_4X REQ2# R174 8.2K_4
USBP8P

5
R93 8.2K_4 PIRQE# R161 8.2K_4
+3V K6 PCIRST# USBP9N E22
F22
USBP9- [17] USB PLT_RST-R# 2 PIRQF# R453 8.2K_4
USBP9P USBP9+ [17]
USB
PCI_SERR# E44 A22 4 CLKRUN# R350 8.2K_4
SERR# USBP10N USBP10- [16] PLTRST# [3,16,20,21,22]
PCI_PERR# PIRQG# R414 8.2K_4
E50 PERR# USBP10P C22
G24
USBP10+ [16]
TP13
3G 1
SYS_RESET# R67 1K_4
USBP11N R97 R82
H24 TP15

3
PCI_IRDY# USBP11P
C
A42 IRDY# USBP12N L24 TP14 100K/F_4 C
H44 M24 *100K_4
PAR USBP12P TP12 +3V_S5
PCI_DEVSEL# F46 A24
DEVSEL# USBP13N USBP13- [17]
PCI_FRAME# C46 FRAME# USBP13P C24 USBP13+ [17] ESATA R89 *0_4 PM_RI# R112 10K_4
PCI_PLOCK# D49 PM_BATLOW# R382 10K_4
PLOCK#
USBRBIAS# B25 USB_BIAS R400 22.6/F_4 PCIE_WAKE# R80 10K_4
PCI_STOP# D41 SUS_PWR_ACK_R R378 10K_4
PCI_TRDY# STOP# AC_PRESENT R86 10K_4
C48 TRDY# USBRBIAS D25
DNBSWON# R115 *10K_4
TP5 M7 PME# USB_OC0#
N16
PLT_RST-R# D5
(+3V_S5)OC0# / GPIO59 J16 USB_OC1#
PLTRST# (+3V_S5)OC1# / GPIO40 F16 USB_OC2#
R439 22_4 CLK_33M_LPC_R N52
(+3V_S5)OC2# / GPIO41 L16 USB_OC3#
[16] PCLK_DEBUG
TP89 P53
CLKOUT_PCI0 (+3V_S5)OC3# / GPIO42 E14 USBOC#8 +3V_S5
TP43 P46
CLKOUT_PCI1 (+3V_S5)OC4# / GPIO43 G16 USB_OC5#
USBOC#8 [15,22] +3V_S5
R437 22_4 CLK_PCI_FB_R P51
CLKOUT_PCI2 (+3V_S5)OC5# / GPIO9 F12 USBOC#13_9 C184 0.1U/10V_4X
[8] CLK_PCI_FB
R178 22_4 CLK_PCI_EC CLKOUT_PCI3 (+3V_S5)OC6# / GPIO10 SCI#
USBOC#13_9 [17,22]
[22] PCLK_591 P48 CLKOUT_PCI4 (+3V_S5)OC7# / GPIO14 T15 SCI# [22]

2
Q44 2N7002_200MA

IbexPeak-M_Rev1_0 3 1 SUS_PWR_ACK_R
[22] SUS_PWR_ACK

5
[3,30] DELAY_VR_PWRGOOD 1
4 SYS_PWROK
C472 C465 C267 2
[3,22] MPWROK
U7

3
22P/50V_4N 22P/50V_4N 22P/50V_4N R347 *0_4 TC7SH08FU(F) R124

R121 100K_4 10K_4


D D
+3V_S5 +3V +3V
RP3 RP9 RP10
5 6 SCI# 5 6 PCI_SERR# 5 6 PCI_PLOCK#
USBOC#13_9 4 7 USB_OC0# PCI_IRDY# 4 7 PCI_PIRQD# REQ3# 4 7 PCI_PERR#
USB_OC5# 3 8 USB_OC1# PCI_STOP# 3 8 PCI_FRAME# PCI_DEVSEL# 3 8 REQ0#
USB_OC2# 2 9 USBOC#8 PCI_PIRQA# 2 9 REQ1# INTH# 2 9 PCI_PIRQB#
USB_OC3# 1 10 +3V_S5 PCI_PIRQC# 1 10 +3V PCI_TRDY# 1 10 +3V Quanta Computer Inc.
8.2KX8 8.2KX8 8.2KX8
PROJECT : TE2
Size Document Number Rev
2A
PCH 3/5 (PCI,ONFI,USB,DMI)
Date: Wednesday, March 10, 2010 Sheet 9 of 35
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)


U17F
Ibex-M
http://laptopblue.vn/
IBEX PEAK-M (GND)
U17H

BOARD_ID1 Y3 BMBUSY# / GPIO0 (+3V) 6 OF 10 CLKOUT_PCIE6N AH45 TP44 AB16 VSS[0] VSS[80] AK30

PCH Strap Pin Configuration Table


AH46 TP46 AA19 AK31
BOARD_ID6 CLKOUT_PCIE6P VSS[1] VSS[81]
C38 AA20 AK32
TACH1 / GPIO1 (+3V) AA22
VSS[2] VSS[82]
AK34
GPIO6 VSS[3] VSS[83]
D37 TACH2 / GPIO6 (+3V) TP52
AM19 VSS[4] VSS[84] AK35
CLKOUT_PCIE7N AF48 AA24 VSS[5] VSS[85] AK38
BOARD_ID4 J32 TACH3 / GPIO7 (+3V) GPIO CLKOUT_PCIE7P AF47 TP42 AA26
AA28
VSS[6]
VSS[7]
VSS[86]
VSS[87]
AK43
AK46
GPIO8 F10 GPIO8 (+3V_S5) MISC AA30
AA31
VSS[8]
VSS[9]
VSS[88]
VSS[89]
AK49
AK5
SPKR
A GPIO12 K9 U2 GATEA20 GATEA20 [22] AA32 AK8 A
LAN_PHY_PWR_CTRL / GPIO12 (+3V_S5) A20GATE
AB11
VSS[10] VSS[90]
AL2
GPIO15 VSS[11] VSS[91] *1K/F_4 R364
T7 GPIO15 (+3V_S5) AB15 VSS[12] VSS[92] AL52 [7,19] PCBEEP +3V
AB23 VSS[13] VSS[93] AM11
GPIO16 AA2 AM3 AB30 BB44
SATA4GP / GPIO16 (+3V) CLKOUT_BCLK0_N/CLKOUT_PCIE8N CLK_CPU_BCLKN [3] VSS[14] VSS[94]
AB31 VSS[15] VSS[95] AD24 0 = Default Mode (Internal weak Pull-down)
GPIO17 F38 AM1 AB32 AM20
TACH0 / GPIO17(+3V) CLKOUT_BCLK0_P/CLKOUT_PCIE8P CLK_CPU_BCLKP [3] VSS[16] VSS[96] 1 = No Reboot Mode with TCO Disabled
AB39 VSS[17] VSS[97] AM22
GPIO22 Y7 BG10 PCH_PECI_R AB43 AM24
SCLOCK / GPIO22 (+3V) PECI H_PECI [3] VSS[18] VSS[98]
AB47 VSS[19] VSS[99] AM26
GPIO27 AB12 T1 RCIN# RCIN# [22] AB5 AM28 GNT3#/
GPIO27 (+3V_S5) RCIN# VSS[20] VSS[100]
GPIO28 V13 GPIO28 (+3V_S5)
CPU PROCPWRGD BE10 H_PWRGOOD [3]
AB8
AC2
VSS[21]
VSS[22]
VSS[101]
VSS[102]
BA42
AM30 GPIO55
AC52 VSS[23] VSS[103] AM31
ESATA_DN# AB7 BD10 PCH_THRMTRIP#_R R91 56.2/F_4 AD11 AM32
[17] ESATA_DN# SATA2GP / GPIO36 (+3V) THRMTRIP# PM_THRMTRIP# [3]
AD12
VSS[24] VSS[104]
AM34 R452 *10K/F_4
VSS[25] VSS[105] [9] GNT3#
GPIO37 AB13 BA22 AD16 AM35
SATA3GP / GPIO37 (+3V) TP1
AW22 R90 56.2/F_4 AD23
VSS[26] VSS[106]
AM38
TP2 +VTT VSS[27] VSS[107]
GPIO39 P3 BB22 AD30 AM39
SDATAOUT0 / GPIO39 (+3V) TP3
AY45 AD31
VSS[28] VSS[108]
AM42
TP4 VSS[29] VSS[109]
TP5 AY46 AD32 VSS[30] VSS[110] AU20 0 = Default Mode (Internal weak Pull-down)
GPIO46 F1 AV43 AD34 AM46
[3] DDR3_DRAMRST#_PCH PCIECLKRQ7# / GPIO46 (+3V_S5) TP6
AV45 AU22
VSS[31] VSS[111]
AV22
1 = No Reboot Mode with TCO Disabled
BOARD_ID5 TP7 VSS[32] VSS[112]
AB6 SDATAOUT1 / GPIO48 (+3V) TP8 AF13 AD42 VSS[33] VSS[113] AM49
TP9 M18 AD46 VSS[34] VSS[114] AM7
TEMP_ALERT# AA4 N18 AD49 AA50
[3,22] TEMP_ALERT# SATA5GP / GPIO49 (+3V) TP10 VSS[35] VSS[115]
RSVD TP11 AJ24
AK41
AD7
AE2
VSS[36] VSS[116] BB10
AN32
HDA_DOCK_EN
TP12
AK42 AE4
VSS[37] VSS[117]
AN50
#/GPIO33
TP13 VSS[38] VSS[118]
TP14 M32 AF12 VSS[39] VSS[119] AN52
GPIO24 H10 N32 Y13 AP12 JP1 *SHORT PAD
GPIO45 H3
GPIO24 (+3V_S5) TP15
M30 AH49
VSS[40] VSS[120]
AP42 R136 10K_4 2 1
PCIECLKRQ6# / GPIO45 (+3V_S5) TP16 VSS[41] VSS[121] [7,22] PCH_GPIO33
GPIO57 F8 N30 AU4 AP46
BOARD_ID2 M11
GPIO57 (+3V_S5) TP17
H12 AF35
VSS[42] VSS[122]
AP49
BOARD_ID3 V6
STP_PCI# / GPIO34 (+3V) TP18
AA23 AP13
VSS[43] VSS[123]
AP5
B
GPIO38 SATACLKREQ# / GPIO35(+3V) TP19 VSS[44] VSS[124] B
V3 SLOAD / GPIO38 (+3V) NC_1 AB45 AN34 VSS[45] VSS[125] AP8 0 = Top Block Swap Mode
AB38 AF45 AR2
NC_2
AB42 AF46
VSS[46] VSS[126]
AR52
1 = Default Mode (Internal pull-up)
NC_3 VSS[47] VSS[127]
NC_4 AB41 AF49 VSS[48] VSS[128] AT11
NC_5 T39 AF5 VSS[49] VSS[129] BA12
P6 TP3 AF8 AH48 GNT0#,
INIT3_3V# VSS[50] VSS[130] GNT0# R184 *1K/F_4
TP24 C10 AG2 VSS[51] VSS[131] AT32 [9] GNT0#
AG52 VSS[52] VSS[132] AT36 GNT1# [9] GNT1# GNT1# R185 *1K/F_4
A4 VSS_NCTF_1 VSS_NCTF_16 BH2 AH11 VSS[53] VSS[133] AT41
A49 VSS_NCTF_2 VSS_NCTF_17 BH52 AH15 VSS[54] VSS[134] AT47
A5 VSS_NCTF_3 VSS_NCTF_18 BH53 AH16 VSS[55] VSS[135] AT7
A50
A52
VSS_NCTF_4 NCTF VSS_NCTF_19 BJ1
BJ2
AH24
AH32
VSS[56] VSS[136] AV12
AV16 Boot BIOS Strap
VSS_NCTF_5 VSS_NCTF_20 VSS[57] VSS[137]
A53 VSS_NCTF_6 VSS_NCTF_21 BJ4 AV18 VSS[58] VSS[138] AV20
B2 BJ49 AH43 AV24 PCI_GNT0# GNT#1 Boot BIOS Location
VSS_NCTF_7 VSS_NCTF_22 VSS[59] VSS[139]
B4 VSS_NCTF_8 VSS_NCTF_23 BJ5 AH47 VSS[60] VSS[140] AV30
B52 BJ50 AH7 AV34 0 0 LPC
VSS_NCTF_9 VSS_NCTF_24 VSS[61] VSS[141]
B53 VSS_NCTF_10 VSS_NCTF_25 BJ52 AJ19 VSS[62] VSS[142] AV38
BE1 BJ53 AJ2 AV42 0 1 Reserved (NAND)
VSS_NCTF_11 VSS_NCTF_26 VSS[63] VSS[143]
BE53 VSS_NCTF_12 VSS_NCTF_27 D1 AJ20 VSS[64] VSS[144] AV46
BF1 D2 AJ22 AV49 1 0 PCI
VSS_NCTF_13 VSS_NCTF_28 VSS[65] VSS[145]
BF53 VSS_NCTF_14 VSS_NCTF_29 D53 AJ23 VSS[66] VSS[146] AV5
BH1 E1 AJ26 AV8 1 1 SPI
VSS_NCTF_15 VSS_NCTF_30 VSS[67] VSS[147]
VSS_NCTF_31 E53 AJ28 VSS[68] VSS[148] AW14
+3V AJ32 AW18
IbexPeak-M_Rev1_0 VSS[69] VSS[149]
AJ34 VSS[70] VSS[150] AW2

RCIN# R355 10K_4


AT5 VSS[71] VSS[151] BF9 SPI_MOSI
AJ4 VSS[72] VSS[152] AW32
AK12 VSS[73] VSS[153] AW36
GATEA20 R381 10K_4 AM41 AW40
VSS[74] VSS[154] R348 *1K_4
AN19 VSS[75] VSS[155] AW52 [7] SPI_SI_R +3V
TEMP_ALERT# R359 10K_4 AK26 AY11
VSS[76] VSS[156]
AK22 VSS[77] VSS[157] AY43
AK23 VSS[78] VSS[158] AY47
C
+3V_S5 GPIO6 R417 10K_4
AK28 VSS[79] NV_ALE C

IbexPeak-M_Rev1_0 R98 *10K_4 +1.8V


[9] NV_ALE
GPIO46 R371 10K_4
GPIO16 R370 10K_4 1 = Enabled
GPIO45 R362 *10K_4
GPIO17 R142 10K_4 0 = Disabled (Default)
GPIO24 R100 *10K_4
GPIO22 R87 10K_4 GPIO8
GPIO57 R109 10K_4 GPIO8 R81 10K_4 +3V_S5
GPIO27 R76 *10K_4

GPIO28 R66 10K_4 This signal has a weak internal pull up.
ESATA_DN# R83 10K_4
GPIO12 R95 10K_4 NOTE: This signal should not be pulled low
GPIO37 R72 10K_4

GPIO38 R357 10K_4


GPIO15
GPIO15 R58 1K_4 +3V_S5
GPIO39 R380 10K_4

0 = Intel ME Crypto Transport Layer Security (TLS) cipher


suite with no confidentiality
1 = Intel ME Crypto Transport Layer Security (TLS) cipher
suite with confidentiality
BOARD ID SETTING GPIO27
Board ID ID1 ID2 ID3 ID4 ID5 ID6 +3V +3V +3V +3V
GPIO27 R79 *10K_4

UMA SKU H
D VGA SKU L 0 = Disables the VccVRM. Need to use D
on-board filter circuits for analog rails.
W/ MDC H +3V R179 10K_4 BOARD_ID4 CPUSB# [16] R101 R59 R78 R358
W/O MDC L *10K_4 1 = Enables the internal VccVRM to have a clean supply for analog rails.
HM@10K_4 MDC@10K_4 10K_4 No need to use on-board filter circuit.
W/ HDMI H This signal has a weak internal pull-up.
W/O HDMI L BOARD_ID5 BOARD_ID3 BOARD_ID2 BOARD_ID1
+3V R145 10K_4 BOARD_ID6 BT_Detect# [23]
W/O 3G H
W/ 3G L
R105 R60 R84 R369 Quanta Computer Inc.
15" H
14" L 10K_4 *HM@10K_4 *MDC@10K_4 *EV@10K_4
PROJECT : TE2
W/O BT H Size Document Number Rev
W/ BT L PCH 4/5 (GPIO & Strap) 2A

Date: Wednesday, March 10, 2010 Sheet 10 of 35


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

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+VCCA_DAC_1_2=69mA(15mils)
+VCCA_DAC_1_2 R455 HCB1608KF-181T15_1.5A +3V
+1.05V R458 *0_6 +3V_LDO

C537 10U/6.3V_8X

C467 10U/6.3V_8X
*short_8 VCCCORE = 1.432A(80mils)
R148 U17G POWER U17J POWER
+1.05V_VCCCORE_ICH AB24 VCCCORE[1] VCCADAC[1] AE50 C461 0.1U/10V_4X Ibex-M
A
C220 1U/6.3V_4X AB26 VCCCORE[2] Ibex-M TP53 VCCACLK AP51 VCCACLK[1] 10 OF 10VCCIO[5] V24 +1.05V_VCCUSBCORE R143 *short_6 +1.05V A
AB28 VCCCORE[3] 7 OF 10 VCCADAC[2] AE52 C462 0.01U/25V_4X
VCCIO[6] V26
C217 4.7U/6.3V_6X AD26 AP53 Y24 C210 1U/6.3V_4X
VCCCORE[4] VCCACLK[2] VCCIO[7]
AD28 VCCCORE[5] CRT VSSA_DAC[1] AF53 DCPSUSBYP Y20 DCPSUSBYP VCCIO[8] Y26
AF26
AF28
VCCCORE[6]
AF51 VCCALVDS= 59mA(15mils) C198 0.1U/10V_4X
USB V28 +3V_S5_VCCPUSB R404 *short_6
VCCCORE[7] VSSA_DAC[2] VCCSUS3_3[1] +3V_S5
AF30 U28
AF31
VCCCORE[8]
VCCCORE[9]
VCCLAN = 0.32A(30mils) VCCSUS3_3[2]
VCCSUS3_3[3] U26 C209 0.1U/10V_4X
AH26 AH38 VCCALVDSR159 *short_6 +3V +1.05V R387 *short_6 +1.05V_VCCAUX AF23 U24
+1.05V VCCCORE[10] VCCALVDS VCCLAN[1] VCCSUS3_3[4] C206 0.1U/10V_4X
AH28 VCCCORE[11] VSSA_LVDS AH39 VCCSUS3_3[5] P28
AH30
AH31
VCCCORE[12] LVDS AP43 VCCTX_LVDS R197 0.1uh_8_250MA
AF24 VCCLAN[2] VCCSUS3_3[6] P26
N28 C212 *0.047U/10V_4X
VCCCORE[13] VCCTX_LVDS[1] +1.8V VCCSUS3_3[7]
AJ30 AP45 C271 10U/6.3V_8X N26
VCCCORE[14] VCCTX_LVDS[2] C249 0.1U/10V_4X VCCSUS3_3[8]
*short_6 AJ31 VCCCORE[15] VCCTX_LVDS[3] AT46 AD38 VCCME[1] VCCSUS3_3[9] M28
+1.05V AT45 C247 0.01U/25V_4X M26
40mA(15mils)
R405
VCC CORE
VCCTX_LVDS[4]
+1.05V R466 *short_8 +1.05V_VCCEPW AD39 VCCME[2]
VCCSUS3_3[10]
VCCSUS3_3[11] L28
VCCSUS3_3[12] L26
+1.05V_PCH_VCCDPLL_EXP AK24 AB34 +3V_VCC_GIO R462 *short_6 AD41 J28
R131 R408 VCCIO[24] VCC3_3[2] +3V VCCME = 1.849A(100mils) VCCME[3] VCCSUS3_3[13]
VCCSUS3_3[14] J26
TP73 +V1.1LAN_VCCAPLL_EXP BJ24 AB35 C241 0.1U/10V_4X AF43 H28
VCCAPLLEXP VCC3_3[3] VCCME[4] VCCSUS3_3[15]
*short_1206 *short_1206 AN20
HVCMOS AD35 C478 10U/6.3V_8X AF41
VCCSUS3_3[16] H26
G28
AN22
VCCIO[25]
VCCIO[26]
VCC3_3[4] VCC3_3 = 0.357A(30mils) VCCME[5] VCCSUS3_3[17]
VCCSUS3_3[18] G26
+V1.1S_VCC_EXP AN23 VCCDMI= C246 10U/6.3V_8X AF42 F28
VCCIO[27] VCCME[6] VCCSUS3_3[19]

Clock and Miscellaneous


C458 C224 4.7U/6.3V_6X AN24 F26
+ AN26
VCCIO[28]
VCCIO[29]
VCCVRM= 196mA(15mils)61mA(15mils) C238 1U/6.3V_4X V39 VCCME[7]
VCCSUS3_3[20]
VCCSUS3_3[21] E28
C442 1U/6.3V_4X AN28 AT24 +1.8S_VCCADMI_VRM R403 *short_6 +1.8V E26
*330U/2V_7343P_E6b VCCIO[30] VCCVRM[2] C243 1U/6.3V_4X VCCSUS3_3[22]
BJ26 VCCIO[31] V41 VCCME[8] VCCSUS3_3[23] C28
C207 1U/6.3V_4X BJ28 AT16 VCCDMI R88 *short_6 +VTT C26
VCCIO[32] VCCDMI[1] VCCSUS3_3[24]
B C223 1U/6.3V_4X
AT26
AT28
VCCIO[33] DMI AU16 C176 1U/6.3V_4X
C237 1U/6.3V_4X V42 VCCME[9] VCCSUS3_3[25] B27
A28 B
VCCIO[34] VCCDMI[2] VCCSUS3_3[26]
AU26 VCCIO[35] Y39 VCCME[10] VCCSUS3_3[27] A26
C208 1U/6.3V_4X AU28 VCCIO[36]
AV26 Y41 U23
C218 0.1U/10V_4X AV28
VCCIO[37]
PCI E* AM16
VCCME[11] VCCSUS3_3[28] V5REF_SUS< 1mA
AW26
VCCIO[38]
VCCIO[39]
VCCPNAND[1]
VCCPNAND[2] AK16 VCCPNAND= 156mA(15mils) Y42 VCCME[12] VCCIO[56] V23 +1.05V_VCCUSBCORE
C215 0.1U/10V_4X AW28 AK20
VCCIO[40] VCCPNAND[3] +V_NVRAM_VCCQR397 *short_8 +VCCRTCEXT V5REF_SUS R125 100/F_4 +5V_S5
BA26 VCCIO[41] VCCPNAND[4] AK19 +1.8V V9 DCPRTC V5REF_SUS F24
C202 0.1U/10V_4X BA28 AK15 C164 0.1U/10V_4X
VCCIO[42] VCCPNAND[5] C193 0.1U/10V_4X D5 CH501H-40PT_100MA
BB26 VCCIO[43] VCCPNAND[6] AK13 +3V_S5
BB28 VCCIO[44] VCCPNAND[7] AM12 +1.8V AU24 VCCVRM[3]
BC26 AM13 C211 1U/6.3V_4X
VCCIO = 3.062A(150mils) BC28
VCCIO[45]
VCCIO[46]
VCCPNAND[8]
VCCPNAND[9] AM15 68mA(15mils)
BD26 L17 10uh_8_100MA+V1.1LAN_VCCA_A_DPL BB51
BD28
VCCIO[47]
VCCIO[48]
+1.05V
C468 1U/6.3V_4X BB53
VCCADPLLA[1]
VCCADPLLA[2]
V5REF< 1mA
NAND / SPI

+
BE26 C469 *220U/2.5V_3528P_E35b K49 V5REF R162 100/F_4
BE28
VCCIO[49]
VCCIO[50]
VCCME3_3= 85mA(15mils) R434 *short_8 V5REF +5V
BG26 AM8 BD51 D6 CH501H-40PT_100MA +3V
VCCIO[51] VCCME3_3[1] VCCADPLLB[1]
BG28 VCCIO[52] VCCME3_3[2] AM9 +3.3V_VCCME_SPIR102 *short_6 +3V +V1.1LAN_VCCA_B_DPL BD53 VCCADPLLB[2] PCI/GPIO/LPC
BH27 AP11 C459 1U/6.3V_4X C261 1U/6.3V_4X
C278 *0.1U/10V_4X VCCIO[53] VCCME3_3[3] C151 0.1U/10V_4X R457 *short_6 +1.05V_SSCVCC
AN30 VCCIO[54] VCCME3_3[4] AP9 +1.05V AH23 VCCIO[21]
AN31 AJ35 J38 +3V_VCCPPCI R151 *short_6 +3V
VCCIO[55] C205 1U/6.3V_4X VCCIO[22] VCC3_3[8]
AH35 VCCIO[23] VCC3_3[9] L38
+3V R201 *short_6 +3V_VCCA3GBG AN35 C233 1U/6.3V_4X AF34 M36
VCC3_3[1] VCCIO[2] VCC3_3[10] C231 0.1U/10V_4X
AH34 N36
VCCIO = 3.062A(150mils) C222 1U/6.3V_4X AF32
VCCIO[3]
VCCIO[4]
VCC3_3[11]
VCC3_3[12] P36 C242 0.1U/10V_4X
+1.8V R399 *short_6+VCCAFDI_VRM AT22 U35
VCCVRM[1] VCC3_3[13]
TP72 +V1.1LAN_VCCAPLL_FDI BJ18
FDI C175 0.1U/10V_4X +VCCSST V12
VCC3_3[14] AD13
VCCFDIPLL DCPSST
C C
+1.05V R128 *short_6 +1.05V_VCCDPLL_FDI AM23 VCCIO[1]
+V1.1LAN_INT_VCCSUS Y22 DCPSUS
C199 0.1U/10V_4X
37mA(15mils) IbexPeak-M_Rev1_0 +3V_LDO
PCI/GPIO/LPC AK3
VCCSUS3_3 = 0.163A(20mils) P18 VCCSUS3_3[29]
VCCSATAPLL[1]
VCCSATAPLL[2] AK1 +V1.1LAN_VCCAPLL TP68
+3V_S5 R127 *short_6 +3V_S5_VCCPSUS U19 VCCSUS3_3[30]
U20 VCCSUS3_3[31]
Reserve for clear CRT Power VCC3_3 = 0.357A(30mils) C183 0.1U/10V_4X U22 VCCSUS3_3[32] VCCVRM[4] AT20 R120 *short_6 +1.8V
U19 C476 V15 AH22 +VCC_SATA R353 *short_8 +1.05V
R463 R352 *short_6 +3V_VCCPCORE VCC3_3[5] VCCIO[9]
[22,27,28,29,31] MAINON 1 SHDN VO 5 +3V V16 VCC3_3[6] VCCIO[10] AH19
*10U/6.3V_8X *52.3K/F_4 Y16 AD20 C187 1U/6.3V_4X
+5V C186 0.1U/10V_4X VCC3_3[7] VCCIO[11]
2 GND VCCIO[12] AF22
AD19
3 VIN SET 4 V_CPU >1mA(15mils)+VTT R392 *short_6 +VTT_VCCPCPU AT18 V_CPU_IO[1]
VCCIO[13]
VCCIO[14] AF20 VCCIO = 3.062A(150mils)
C436 4.7U/6.3V_6X AU18 V_CPU_IO[2] SATA VCCIO[15] AF19
C480 *G913C R464 C189
C437
0.1U/10V_4X
0.1U/10V_4X
CPU VCCIO[16] AH20
VCCIO[17] AB19
*0.1U/10V_4X *0_4 AB20
VCCRTC= 2mA(15mils)
+RTC_CELL A12 VCCRTC
VCCIO[18]
VCCIO[19] AB22
C415 0.1U/10V_4X RTC VCCIO[20] AD22
VCCME = 1.849A(100mils)
C421 0.1U/10V_4X

+3V_S5 R130 *short_6 +V3.3A_1.5A_HDA_IO L30 AA34 +1.05V_VCCEPW


VCCSUSHDA VCCME[13]
VCCME[14] Y34
+1.5V_S5 R132 *0_6 HDA VCCME[15] Y35
VCCME[16] AA35
VCCSUSHDA= 6mA(15mils) C221 1U/6.3V_4X
IbexPeak-M_Rev1_0
D D

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
PCH 5/5 (POWER)
Date: Tuesday, March 09, 2010 Sheet 11 of 35
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

http://laptopblue.vn/

JDIM1A M_A_DQ[63:0] [4]


[4] M_A_A[15:0]
M_A_A0 98 5 M_A_DQ0
A
M_A_A1 A0 DQ0 M_A_DQ1 +1.5VSUS A
97 A1 DQ1 7
M_A_A2 96 15 M_A_DQ2
M_A_A3 A2 DQ2 M_A_DQ3
95 A3 DQ3 17
M_A_A4 92 4 M_A_DQ4
M_A_A5 A4 DQ4 M_A_DQ5 JDIM1B
91 A5 DQ5 6
M_A_A6 90 16 M_A_DQ6 75 44
M_A_A7 A6 DQ6 M_A_DQ7 VDD1 VSS16
86 A7 DQ7 18 76 VDD2 VSS17 48
M_A_A8 89 21 M_A_DQ8 81 49
M_A_A9 A8 DQ8 M_A_DQ9 VDD3 VSS18
85 A9 DQ9 23 82 VDD4 VSS19 54
M_A_A10 107 33 M_A_DQ10 87 55
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD5 VSS20
84 A11 DQ11 35 88 VDD6 VSS21 60
M_A_A12 83 22 M_A_DQ12 93 61
M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD7 VSS22
SO-DIMMA SPD Address is 0XA0 119 A13 DQ13 24 94 VDD8 VSS23 65
SO-DIMMA TS Address is 0X30 M_A_A14 80 34 M_A_DQ15 99 66
M_A_A15 A14 DQ14 M_A_DQ14 VDD9 VSS24
78 A15 DQ15 36 100 VDD10 VSS25 71
39 M_A_DQ16 105 72
DQ16 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


[4] M_A_BS#0 109 41 M_A_DQ17 106 127
BA0 DQ17 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


[4] M_A_BS#1 108 51 M_A_DQ18 111 128
BA1 DQ18 M_A_DQ23 VDD13 VSS28
[4] M_A_BS#2 79 BA2 DQ19 53 112 VDD14 VSS29 133
[4] M_A_CS#0 114 40 M_A_DQ21 117 134
S0# DQ20 M_A_DQ20 VDD15 VSS30
[4] M_A_CS#1 121 S1# DQ21 42 118 VDD16 VSS31 138
101 50 M_A_DQ22 123 139 +SMDDR_VTERM
[4] M_A_CLKP0 CK0 DQ22 VDD17 VSS32
[4] M_A_CLKN0 103 52 M_A_DQ19 124 144
CK0# DQ23 M_A_DQ28 VDD18 VSS33
[4] M_A_CLKP1 102 CK1 DQ24 57 VSS34 145
[4] M_A_CLKN1 104 59 M_A_DQ25 +3V 199 150
CK1# DQ25 M_A_DQ26 VDDSPD VSS35 R209
[4] M_A_CKE0 73 CKE0 DQ26 67 VSS36 151
[4] M_A_CKE1 74 69 M_A_DQ27 77 155 22_4
CKE1 DQ27 M_A_DQ29 NC1 VSS37
[4] M_A_CAS# 115 CAS# DQ28 56 122 NC2 VSS38 156
[4] M_A_RAS# 110 58 M_A_DQ24 125 161
RAS# DQ29 M_A_DQ30 NCTEST VSS39
B [4] M_A_WE# 113 WE# DQ30 68 VSS40 162 B

3
R177 10K/F_4 DIMM0_SA0 197 70 M_A_DQ31 [3] PM_EXTTS#0 PM_EXTTS#0 198 167
R182 10K/F_4 DIMM0_SA1 SA0 DQ31 M_A_DQ36 EVENT# VSS41 Q14
201 SA1 DQ32 129 [3,13] DDR3_DRAMRST# 30 RESET# VSS42 168
[2,13] CGCLK_SMB 202 131 M_A_DQ37 +1.5VSUS R44 *1K/F_4 172 2N7002_200MA
SCL DQ33 M_A_DQ35 VSS43
[2,13] CGDAT_SMB 200 SDA DQ34 141 VSS44 173 [5,27,31] MAINON_ON_G 2
143 M_A_DQ34 R30 *0_4 SMDDR_VREF_DQ0 1 178
DQ35 M_A_DQ32 [6] DDR_VREF_DQ0 SMDDR_VREF_DIMM VREF_DQ VSS45
[4] M_A_ODT0 116 ODT0 DQ36 130 126 VREF_CA VSS46 179
[4] M_A_ODT1 120 132 M_A_DQ33 184
ODT1 DQ37 M_A_DQ39 VSS47
[4] M_A_DM[7:0] 140 185

1
M_A_DM0 DQ38 M_A_DQ38 R28 VSS48
11 DM0 DQ39 142 2 VSS1 VSS49 189
M_A_DM1 28 147 M_A_DQ45 3 190
M_A_DM2 DM1 DQ40 M_A_DQ44 100K/F_4 VSS2 VSS50
46 DM2 DQ41 149 8 VSS3 VSS51 195
M_A_DM3 M_A_DQ47

(204P)
(204P)

63 DM3 DQ42 157 9 VSS4 VSS52 196


M_A_DM4 136 159 M_A_DQ46 13 for S3 power reduction
M_A_DM5 DM4 DQ43 M_A_DQ40 VSS5
153 DM5 DQ44 146 14 VSS6
M_A_DM6 170 148 M_A_DQ41 19
M_A_DM7 DM6 DQ45 M_A_DQ42 VSS7
187 DM7 DQ46 158 20 VSS8
[4] M_A_DQSP[7:0] 160 M_A_DQ43 25
M_A_DQSP0 DQ47 M_A_DQ48 VSS9
12 DQS0 DQ48 163 26 VSS10 VTT1 203 +SMDDR_VTERM
M_A_DQSP1 29 165 M_A_DQ53 31 204
M_A_DQSP2 DQS1 DQ49 M_A_DQ55 VSS11 VTT2
47 DQS2 DQ50 175 32 VSS12
M_A_DQSP3 64 177 M_A_DQ54 37
M_A_DQSP4 DQS3 DQ51 M_A_DQ52 VSS13
137 DQS4 DQ52 164 38 VSS14
M_A_DQSP5 154 166 M_A_DQ49 43

GND

GND
M_A_DQSP6 DQS5 DQ53 M_A_DQ51 VSS15
171 DQS6 DQ54 174
[4] M_A_DQSN[7:0] M_A_DQSP7 188 176 M_A_DQ50
M_A_DQSN0 DQS7 DQ55 M_A_DQ61 DDRSK-20401-TP4B
10 181

205

206
M_A_DQSN1 DQS#0 DQ56 M_A_DQ60
27 DQS#1 DQ57 183
M_A_DQSN2 45 191 M_A_DQ58
M_A_DQSN3 DQS#2 DQ58 M_A_DQ59
C
62 DQS#3 DQ59 193 C
M_A_DQSN4 135 180 M_A_DQ57
M_A_DQSN5 DQS#4 DQ60 M_A_DQ56
152 DQS#5 DQ61 182
M_A_DQSN6 169 192 M_A_DQ62
M_A_DQSN7 DQS#6 DQ62 M_A_DQ63
186 DQS#7 DQ63 194

DDRSK-20401-TP4B

Place these Caps near So-Dimm0.


Some Projects replace 10UF 0805 by 4.7UF 0603
It can cost down 30%
SMDDR_VREF_DQ0 +SMDDR_VTERM SMDDR_VREF_DIMM [13]
+1.5VSUS
C194 470P/50V_4X R122 *short_4 +SMDDR_VREF
C72 0.1U/10V_4X
C125 4.7U/6.3V_6X C281 1U/6.3V_4X R118 *10K/F_4 R117 *10K/F_4 +1.5VSUS
C80 2.2U/6.3V_6X
C131 4.7U/6.3V_6X C283 1U/6.3V_4X

C152 4.7U/6.3V_6X C280 1U/6.3V_4X

C122 4.7U/6.3V_6X SMDDR_VREF_DIMM C282 1U/6.3V_4X +1.5VSUS

C146 4.7U/6.3V_6X C174 0.1U/10V_4X C289 4.7U/6.3V_6X

C149 4.7U/6.3V_6X C182 2.2U/6.3V_6X +1.5VSUS


R37
D C145 0.1U/10V_4X C179 *0.047U/10V_4X 1K/F_4 D

C141 0.1U/10V_4X SMDDR_VREF_DQ0

C136 0.1U/10V_4X +3V + C112

C126 0.1U/10V_4X C258 2.2U/6.3V_6X R36 C85 C88 *330U/2.5V_7343P_E9a

C162 0.1U/10V_4X C259 *0.1U/10V_4X


1K/F_4 0.1U/10V_4X *0.047U/10V_4X Quanta Computer Inc.
C132 *0.047U/10V_4X C260 *0.047U/10V_4X PROJECT : TE2
Size Document Number Rev
C130 *0.047U/10V_4X 2A
DDR3 DIMM-0
Date: Wednesday, March 10, 2010 Sheet 12 of 35
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

http://laptopblue.vn/

JDIM2A M_B_DQ[63:0] [4]


[4] M_B_A[15:0] +1.5VSUS
M_B_A0 98 5 M_B_DQ4
M_B_A1 A0 DQ0 M_B_DQ5
A
97 A1 DQ1 7 A
M_B_A2 96 15 M_B_DQ7
M_B_A3 A2 DQ2 M_B_DQ6
95 A3 DQ3 17 JDIM2B
M_B_A4 92 4 M_B_DQ0
M_B_A5 A4 DQ4 M_B_DQ1
91 A5 DQ5 6 75 VDD1 VSS16 44
M_B_A6 90 16 M_B_DQ3 76 48
M_B_A7 A6 DQ6 M_B_DQ2 VDD2 VSS17
86 A7 DQ7 18 81 VDD3 VSS18 49
M_B_A8 89 21 M_B_DQ12 82 54
M_B_A9 A8 DQ8 M_B_DQ13 VDD4 VSS19
85 A9 DQ9 23 87 VDD5 VSS20 55
M_B_A10 107 33 M_B_DQ11 88 60
M_B_A11 A10/AP DQ10 M_B_DQ15 VDD6 VSS21
84 A11 DQ11 35 93 VDD7 VSS22 61
M_B_A12 83 22 M_B_DQ9 94 65
M_B_A13 A12/BC# DQ12 M_B_DQ8 VDD8 VSS23
119 A13 DQ13 24 99 VDD9 VSS24 66
M_B_A14 80 34 M_B_DQ14 100 71
M_B_A15 A14 DQ14 M_B_DQ10 VDD10 VSS25
78 A15 DQ15 36 105 VDD11 VSS26 72
39 M_B_DQ20 106 127
DQ16 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


PC2100 DDR3 SDRAM SO-DIMM
[4] M_B_BS#0 109 41 M_B_DQ21 111 128
BA0 DQ17 M_B_DQ23 VDD13 VSS28
[4] M_B_BS#1 108 BA1 DQ18 51 112 VDD14 VSS29 133
[4] M_B_BS#2 79 53 M_B_DQ22 117 134
BA2 DQ19 M_B_DQ17 VDD15 VSS30
[4] M_B_CS#0 114 S0# DQ20 40 118 VDD16 VSS31 138
[4] M_B_CS#1 121 42 M_B_DQ16 123 139
S1# DQ21 M_B_DQ19 VDD17 VSS32
[4] M_B_CLKP0 101 CK0 DQ22 50 124 VDD18 VSS33 144
[4] M_B_CLKN0 103 52 M_B_DQ18 145
CK0# DQ23 M_B_DQ29 VSS34
[4] M_B_CLKP1 102 CK1 DQ24 57 +3V 199 VDDSPD VSS35 150
[4] M_B_CLKN1 104 59 M_B_DQ28 151
CK1# DQ25 M_B_DQ26 VSS36
[4] M_B_CKE0 73 CKE0 DQ26 67 77 NC1 VSS37 155
[4] M_B_CKE1 74 69 M_B_DQ27 122 156
CKE1 DQ27 M_B_DQ24 NC2 VSS38
[4] M_B_CAS# 115 CAS# DQ28 56 125 NCTEST VSS39 161
[4] M_B_RAS# 110 58 M_B_DQ25 162
RAS# DQ29 M_B_DQ30 VSS40
[4] M_B_WE# 113 WE# DQ30 68 [3] PM_EXTTS#1 198 EVENT# VSS41 167
B R190 10K/F_4 DIMM1_SA0 197 70 M_B_DQ31 [3,12] DDR3_DRAMRST# 30 168 B
R194 10K/F_4 DIMM1_SA1 201 SA0 DQ31 M_B_DQ36 RESET# VSS42
+3V SA1 DQ32 129 VSS43 172
[2,12] CGCLK_SMB 202 131 M_B_DQ32 173
SCL DQ33 M_B_DQ34 R29 *0_4 SMDDR_VREF_DQ1 VSS44
[2,12] CGDAT_SMB 200 SDA DQ34 141 [6] DDR_VREF_DQ1 1 VREF_DQ VSS45 178
143 M_B_DQ35 [12] SMDDR_VREF_DIMM 126 179
DQ35 M_B_DQ33 VREF_CA VSS46
[4] M_B_ODT0 116 ODT0 DQ36 130 VSS47 184
[4] M_B_ODT1 120 132 M_B_DQ37 185
ODT1 DQ37 M_B_DQ38 R27 VSS48
[4] M_B_DM[7:0] DQ38 140 2 VSS1 VSS49 189
M_B_DM0 11 142 M_B_DQ39 3 190
M_B_DM1 DM0 DQ39 M_B_DQ40 100K/F_4 VSS2 VSS50
SO-DIMMB SPD Address is 0XA4 28 DM1 DQ40 147 8 VSS3 VSS51 195
M_B_DM2 M_B_DQ41

(204P)
SO-DIMMB TS Address is 0X34 46 DM2 DQ41 149 9 VSS4 VSS52 196
M_B_DM3 M_B_DQ42
(204P)

63 DM3 DQ42 157 13 VSS5


M_B_DM4 136 159 M_B_DQ43 14
M_B_DM5 DM4 DQ43 M_B_DQ45 VSS6
153 DM5 DQ44 146 19 VSS7
M_B_DM6 170 148 M_B_DQ44 20
M_B_DM7 DM6 DQ45 M_B_DQ46 VSS8
187 DM7 DQ46 158 25 VSS9
[4] M_B_DQSP[7:0] 160 M_B_DQ47 26 203 +SMDDR_VTERM
M_B_DQSP0 DQ47 M_B_DQ48 VSS10 VTT1
12 DQS0 DQ48 163 31 VSS11 VTT2 204
M_B_DQSP1 29 165 M_B_DQ49 32
M_B_DQSP2 DQS1 DQ49 M_B_DQ55 VSS12
47 DQS2 DQ50 175 37 VSS13
M_B_DQSP3 64 177 M_B_DQ51 38
M_B_DQSP4 DQS3 DQ51 M_B_DQ52 VSS14
137 164 43

GND

GND
M_B_DQSP5 DQS4 DQ52 M_B_DQ53 VSS15
154 DQS5 DQ53 166
M_B_DQSP6 171 174 M_B_DQ54
M_B_DQSP7 DQS6 DQ54 M_B_DQ50 DDRSK-20401-TP8D
[4] M_B_DQSN[7:0] 188 176

205

206
M_B_DQSN0 DQS7 DQ55 M_B_DQ61
10 DQS#0 DQ56 181
M_B_DQSN1 27 183 M_B_DQ60
M_B_DQSN2 DQS#1 DQ57 M_B_DQ58
45 DQS#2 DQ58 191
M_B_DQSN3 62 193 M_B_DQ62
M_B_DQSN4 DQS#3 DQ59 M_B_DQ56
C
135 DQS#4 DQ60 180 C
M_B_DQSN5 152 182 M_B_DQ57
M_B_DQSN6 DQS#5 DQ61 M_B_DQ63
169 DQS#6 DQ62 192
M_B_DQSN7 186 194 M_B_DQ59
DQS#7 DQ63

DDRSK-20401-TP8D

Place these Caps near So-Dimm1.


Some Projects replace 10UF 0805 by 4.7UF 0603
It can cost down 30%
+1.5VSUS SMDDR_VREF_DIMM +SMDDR_VTERM

C173 4.7U/6.3V_6X C185 0.1U/10V_4X C275 1U/6.3V_4X

C123 4.7U/6.3V_6X C192 2.2U/6.3V_6X C276 1U/6.3V_4X


+1.5VSUS
C171 4.7U/6.3V_6X C180 *0.047U/10V_4X C279 1U/6.3V_4X

C159 4.7U/6.3V_6X C277 1U/6.3V_4X

C170 4.7U/6.3V_6X SMDDR_VREF_DQ1 C284 4.7U/6.3V_6X R33 +1.5VSUS


1K/F_4
C133 4.7U/6.3V_6X C69 0.1U/10V_4X
SMDDR_VREF_DQ1
C138 0.1U/10V_4X C89 2.2U/6.3V_6X

D C142 0.1U/10V_4X + C113 D


R32 C73 C81
C124 0.1U/10V_4X +3V 1K/F_4 0.1U/10V_4X *0.047U/10V_4X *330U/2.5V_7343P_E9a

C134 0.1U/10V_4X C264 2.2U/6.3V_6X

C161 0.1U/10V_4X C274 *0.1U/10V_4X

C147 *0.047U/10V_4X C270 *0.047U/10V_4X


Quanta Computer Inc.
C153 *0.047U/10V_4X PROJECT : TE2
Size Document Number Rev
2A
DDR3 DIMM-1
Date: Wednesday, March 10, 2010 Sheet 13 of 35
1 2 3 4 5 6 7 8
5 4 3 2 1

HDMI Conn
HDMI Level Shift UMA only
http://laptopblue.vn/
+3V
[HDM]
U8

R443 [7] TMDSD_DATA1 TMDSD_DATA1 39 22 HDMITX1P


TMDSD_DATA1# IN_D+ OUT_D1+ HDMITX1N
[7] TMDSD_DATA1# 38 IN_D1- OUT_D1- 23
+3V IHM@10K_4
[7] TMDSD_DATA2 TMDSD_DATA2 42 19 HDMITX2P
D TMDSD_DATA2# IN_D2+ OUT_D2+ HDMITX2N D
[7] TMDSD_DATA2# 41 IN_D2- OUT_D2- 20
OE#
[7] TMDSD_DATA0 TMDSD_DATA0 45 16 HDMITX0P
IN_D3+ OUT_D3+

3
R169 R172 R134 R135 [7] TMDSD_DATA0# TMDSD_DATA0# 44 17 HDMITX0N
IN_D3- OUT_D3-
IHM@1.5K/F_4 *IHM@1.5K/F_4 IHM@2.2K_4 IHM@2.2K_4 R195 [7] TMDSD_CLK TMDSD_CLK 48 13 HDMICLK+
HDMI_LF_HPOUT Q46 TMDSD_CLK# IN_D4+ OUT_D4+ HDMICLK-
2 [7] TMDSD_CLK# 47 IN_D4- OUT_D4- 14
*IHM@10K_4
IHM@2N7002_200MA INT_HDMI_SCL HDMI_DDCCLK
[7] INT_HDMI_SCL 9 SCL SCL_SINK 28
INT_HDMI_SDA 8 29 HDM_DDCDATA
[7] INT_HDMI_SDA SDA SDA_SINK
TMDSD_CLK

1
TMDSD_CLK# HDMI_LF_HPOUT 7 30 HDMI_CON_HP
INT_HDMI_SCL HPD HPD_SINK
INT_HDMI_SDA 2 +3V
VCC[1]
VCC[2] 11
OE# 25 15
OE# VCC[3]
VCC[4] 21 0.1A(20mils)
DDC_EN 32 26
DDC_EN VCC[5]
VCC[6] 33
OC_3 10 40
NC(OC_3) VCC[7]
VCC[8] 46
+3V +3V
SR0 3
SR1 SR0
4 SR1 GND[1] 1
R158 *IHM@4.7K_4 SR0 R208 IHM@4.7K_4 DDC_EN 5
OC_2 GND[2]
6 NC(OC_2) GND[3] 12
R157 IHM@0_4 R202 *IHM@0_4 18
GND[4]
27 GND GND[5] 24
R155 *IHM@4.7K_4 SR1 31
R436 IHM@10K_4 OE# GND[6]
GND[7] 36
R156 IHM@0_4 EQ_0 34 37
*IHM@0_4 R501 EQ_1 NC(EQ_0) GND[8]
35 NC(EQ_1) GND[9] 43
C R191 *IHM@4.7K_4 C
GND[10] 49
+3V
IHM@PI3VDP411LSRZBE

2
Q45 IHM@2N7002_200MA
+3V
Slew Rate Control Function Reserve Port-D_HPD 1 3 IHM@0_4 R412 HDMI_LF_HPOUT
[7] Port-D_HPD
SR1 SR0 Rise/Fall Time R141 *IHM@0_4 OC_2
1 1 140ps R154
R153 *IHM@0_4 OC_3 R401 C457 C460 C266 C252
1 0 130ps
R203 *IHM@0_4 EQ_0 IHM@100K_4 IHM@100K_4 IHM@0.1U/10V_4X IHM@0.01U/25V_4X IHM@0.1U/10V_4X IHM@0.01U/25V_4X
0 1 120ps
R204 *IHM@0_4 EQ_1
0 0 110ps

HDMITX2P 1 2 HDMITX2P
For EMI close to connector CN13
Close to HDMI CONN HDMITX2N 4 3 HDMITX2N

B RP14 *DLP11SN900HL2L(90,0.15A) B
SHELL1 20
HDMITX2P 1 HDMITX1P 1 2 HDMITX1P
HDMITX2N R123 *HM@100_4 HDMITX2P D2+ HDMITX1N HDMITX1N
2 D2 Shield 4 3
HDMITX2N 3
HDMITX1N R126 *HM@100_4 HDMITX1P HDMITX1P D2- RP13 *DLP11SN900HL2L(90,0.15A)
4 D1+
5 D1 Shield
HDMITX0N R119 *HM@100_4 HDMITX0P HDMITX1N 6 HDMICLK+ 4 3 HDMICLK+_R
HDMITX0P D1- HDMICLK- HDMICLK-_R
7 D0+ 1 2
HDMICLK- R113 *HM@100_4 HDMICLK+ 8
HDMITX0N D0 Shield RP12 HM@DLP11SN900HL2L(90,0.15A)
9 D0- GND 23
HDMI_DDCCLK +5V HDMICLK+_R 10 HDMITX0P 1 2 HDMITX0P
CK+ HDMITX0N HDMITX0N
11 CK Shield GND 22 4 3
HDM_DDCDATA HDMICLK-_R 12 CK- RP11 *DLP11SN900HL2L(90,0.15A)
13 CE Remote
14 NC
C433 C427 R388 HM@2.2K_4 HDMI_DDCCLK 15
*HM@56P/50V_4 *HM@56P/50V_4 R396 HM@2.2K_4 HDM_DDCDATA DDC CLK
16 DDC DATA
17 GND
DDC5V 18
HDMI_CON_HP +5V
19 HP DET
SHELL2 21

HM@C12826-11905-L

+5V

ESD1
HDMI_DDCCLK 1 10 HDMI_DDCCLK
A 30mils HDM_DDCDATA 2
1
2
10
9 9 HDM_DDCDATA A
F2 3
D23 GND_3/8
2 1 HM@RSX101M-30_1A 2 1 HM@FUSE1A6V_POLY-1A-6V DDC5V 4 4 7 7 DDC5V
HDMI_CON_HP 5 6 HDMI_CON_HP
C440 5 6
*HM@RClamp0524P
*HM@10U/6.3V_8X C163

HM@0.1U/10V_4X Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
HDMI CONN
Date: Wednesday, March 10, 2010 Sheet 14 of 35
5 4 3 2 1
5 4 3 2 1

http://laptopblue.vn/
CCD [CCD] LCD POWER SWITCH [LDS] HALL SENSOR&BACK LIGHT SWITCH [HSR]

+3VPCU R311 100K_4


+3V

USBP0+_LCD R6 *short_6 R312


USBP0+ [9]
USBP0-_LCD R5 *short_6 1 2 LID591#
USBP0- [9] +15V 1K_4
D MR1 D
F1 2 1 *SMD1206P100TF +3V C384
PT3661-BB

3
R328 0.1U/10V_4X

3
D22 2 1 *SSM14LPT_1A
330K_6 1.5A(65mils) DISPON [22]
R332 *short_8 Q40
0.2A(20mils) +3VPCU LCDONG 2 LCDVCC
ME2306_4A
DISPON D17 RSX101M-30_1A
LID591# [22]
+3V 1 3 CCD_POWER
R327 C387 LCDVCC1 L13 0_6

1
3
C389 10U/6.3V_8X
+

Q41 100K_4 0.01U/25V_4X D16 RSX101M-30_1A


LVDS_BRIGHT [7]
2

C17 *1000P/50V_4X R331 C10 C12 C393


*AO3413_3A +3V 2 Q39 +3V
C18 *0.1U/10V_4X 22_8 0.1U/10V_4X 0.01U/25V_4X 10U/6.3V_8X
2N7002_200MA

3
LCDDISCHG
Q36 R313 R304

3
R330 2
[7] LVDS_DIGON

3
*4.7K_4 100K_4
*10K_4
LCDON# 2 Q38

1
PDTC143TT_100MA 2
3
2N7002_200MA

3
C104 R329 Q26
2

1
CCD_POWERON [22] 2200P/50V_4X 100K_4 2 *2N7002_200MA
EC_FPBACK# [22]

1
2
Q37 Q27
1

*DDTC144EUA-7-F_30MA Q25

1
C DDTC144EUA-7-F_30MA C
*2N7002_200MA

1
LCD Panel Module [LDS]
CRT [CRT] BLM18BA470SN1D_300MA
CN3 L16 RED_L
[7] CRT_RED
LCDVCC 1 BLM18BA470SN1D_300MA
0.3A (20mils) LCDVCC
2
1
2 [7] CRT_GRE
L15 GREEN_L +5V +3V +5VPCU +5VPCU
+3V 3 BLM18BA470SN1D_300MA
LCD_EDIDCLK 3 L14 BULE_L
[7] LCD_EDIDCLK 4 4 [7] CRT_BLU
LCD_EDIDDATA 5 C60 C405 C5 C4
0.3A (20mils) [7] LCD_EDIDDATA
LCD_TXLOUT0-
6
5
6 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X
[7] LCD_TXLOUT0- 7 7
LCD_TXLOUT0+ 8 C402 C400 C398 C399 C401 C403
[7] LCD_TXLOUT0+ 8
9 9
LCD_TXLOUT1- 10 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N
[7] LCD_TXLOUT1- 10
VIN R8 0_6 LCD_BK_POWER LCD_TXLOUT1+ 11
[7] LCD_TXLOUT1+ 11
12 12
LCD_TXLOUT2- 13
[7] LCD_TXLOUT2- 13
+ C395 C14 C31 C121 LCD_TXLOUT2+ 14
B [7] LCD_TXLOUT2+ 14 B
15 15
10U/25V_1206X 1000P/50V_4X 0.1U/25V_6X 0.1U/25V_6X LCD_TXLCLKOUT- 16
[7] LCD_TXLCLKOUT- 16
LCD_TXLCLKOUT+ 17
[7] LCD_TXLCLKOUT+ 17
18 18
USB for CRT BOARD [USB]
LVDS_VADJ 19
DISPON 19 CN4
20 20
21 21 +5V 1
LCD_BK_POWER 22 22 [7] CRT_DDCCLK 2
23 23 [7] CRT_DDCDAT 3
24 24 34 34 +3V 4
USBP0+_LCD 25 25 [7] CRT_VSYNC 5
USBP0-_LCD 26 33
26 33 [7] CRT_HSYNC 6
CCD_POWER 27 +5VPCU
27 7
[19] DMIC_CLK
L23 BLM18PG471SN1D(470,1000MA) 28 28 32 32 +5.5V 80 mils RED_L
8
+3V R4 2.2K_4 LCD_EDIDCLK [19] DMIC_IN L24 BLM18PG471SN1D(470,1000MA) 29
30
29
31
I(max):0.1136A 80 mils C529 C531 GREEN_L 9
30 31 Power:0.625W 10
R3 2.2K_4 LCD_EDIDDATA 50373-03001-001 *0.1U/10V_4X 1U/10V_6X BULE_L 11
C16 C15 U18 12
13
22P/50V_4N 22P/50V_4N 2
G545A2P8U
8
80 mils USBPWR3
[22] CRT_SENSE# 14
IN1 OUT3 15
3 IN2 OUT2 7 16
FOR EMI [22] USB_EN1# 4 EN#
OUT1 6
[9] USBP8+
17
18
1 C530
GND [9] USBP8- 19
9 5 R346 *10K_4 +3V_S5 10U/6.3V_8X
LCD_EDIDCLK LCD_EDIDDATA +3V LCDVCC GND-C OC# 20

R7 0_4 87213-2000-20p-l
[7] LVDS_PWM
C9 C8 C390 C11
R2 *0_4 LVDS_VADJ
A *22P/50V_4N *22P/50V_4N *0.1U/25V_4X *0.1U/25V_4X [22] CONTRAST A

C7 0.1U/10V_4X
[9,22] USBOC#8

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
LCD/LED Panel/CCD
Date: Tuesday, March 09, 2010 Sheet 15 of 35
5 4 3 2 1
5 4 3 2 1

MINI Card Slot#1

http://laptopblue.vn/
+1.5V WIMAX_P
(WiFi) [WLN] +3V_S5 +1.5V
2.75A(120mils)
0.5A(30mils)
R292 *0_4 SERIRQ_debug
[7,22] SERIRQ
R295 *0_4 LDRQ#1__debug C333 C349 C340 C314
[7] LDRQ#1
PLTRST# R290 100K_4 PLTRST#_debug
+3V WIMAX_P R284 *0_4 PCLK__debug 0.1U/10V_4X 0.01U/25V_4X 0.1U/10V_4X 10U/6.3V_8X
[9] PCLK_DEBUG
CN16
51 NC +3.3V 52
L7 PBY201209T-330Y-N_4A R293 *0_4 CL_RST#1_WLAN 49 50
[8] CL_RST#1 C-Link_RST GND
R288 *0_4 PLTRST#_PCIE 47 48
D [8] CL_DATA1 C-Link_DAT +1.5V D
R286 *0_4 CL_CLK1_WLAN 45 46
[8] CL_CLK1 C-Link_CLK LED_WPAN#
43 GND LED_WLAN# 44
41 NC NC 42
+3V_S5 39 40
NC NC
37 GND USB_D+ 38 USBP5+ [9]
+3V_S5 1 3 35 GND USB_D- 36 USBP5- [9]
[8] PCIE_TXP5 33 PETp0 GND 34
Q22 *AO3413_3A R271 31 32 WL_SMDATA WIMAX_P
[8] PCIE_TXN5 PETn0 SMB_DATA
*4.7K_4 29 30 WL_SMCLK
2

GND SMB_CLK
27 GND +1.5V 28
25 26
[8] PCIE_RXP5
[8] PCIE_RXN5 23
PERp0
PERn0
GND
+3.3Vaux 24 +3V_S5
0.33A(30mils)

2
4
21 22 PLTRST#
Q17 GND PERST# RF_EN RP8
19 NC W_DISABLE# 20 RF_EN [22]
3

R146 0_4 17 18
NC GND
2 15 16 LFRAME#_PCIE R257 *0_4 *4.7KX2
WMAX_P [22] WIMAX_P GND NC

2
13 14 LAD3_PCIE R254 *0_4 LFRAME# [7,22]
[8] CLK_PCIE_MINI

1
3
REFCLK+ NC

2
11 12 LAD2_PCIE R252 *0_4 LAD3 [7,22]
Q63 *2N7002_200MA [8] CLK_PCIE_MINI# REFCLK- NC
9 10 LAD1_PCIE R248 *0_4 LAD2 [7,22] 3 1 WL_SMDATA
[2,8,20] SDATA
1

GND NC LAD0_PCIE R244 *0_4 LAD1 [7,22]


[8] PCIE_CLK_RQ5# 3 1 7 CLKREQ# NC 8
*DDTC144EUA-7-F_30MA 5 6 LAD0 [7,22] Q21 *2N7002_200MA
BT_CHCLK +1.5V
T16 3 BT_DATA GND 4
WLAN_WAKE# 1 2 R273 0_4
R9 *0_4 WAKE# +3.3V
80003-5121
Intel module use S5 power for WIMAX_P
+3.3V
Other module keep +3V for +3.3V [22] BT_EN# 3 1
C C
Q62 2N7002_200MA

2
2
WIMAX_P R338 *10K_4
WIMAX_P
R637 *10K_4 3 1 WL_SMCLK
[2,8,20] SCLK
Q19 *2N7002_200MA
C344 C507 C343 C510
[9,20] PCIE_WAKE# 3 1
0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 10U/6.3V_8X R279 0_4
Q16 *2N7002_200MA

2
R238 *10K_4
+3V_S5

MINI Card Slot#2 +3V_3G


+1.5V_3G
SIM CARD
3G [M3G]

+3V_3G +1.5V_3G
2.75A(120mils)
CN17
C508 C324 C325 C313 C315 C505 C331 51 52
NC +3.3V
49 C-Link_RST GND 50
3G@0.01U/25V_4X 3G@0.1U/10V_4X 3G@0.1U/10V_4X 3G@10U/6.3V_8X *3G@0.01U/25V_4X *3G@0.1U/10V_4X *3G@10U/6.3V_8X 47 48 JSIM1
C-Link_DAT +1.5V
45 C-Link_CLK LED_WPAN# 46
B
43 GND LED_WLAN# 44 1 B
41 42 UIM_CLK
+3.3V LED_WWAN# 2
39 +3.3V CPUSB# 40 CPUSB# [10] 3
37 38 USBP10+ [9] UIM_DATA
CPEE# USB_D+ 4
35 GND USB_D- 36 USBP10- [9] 5
33 34 UIM_RST
[8] PCIE_TXP3 PETp0 GND 6
31 32 UIM_VPP
[8] PCIE_TXN3 PETn0 SMB_DATA 7
29 30 UIM_PWR C294 3G@0.1U/10V_4X
GND SMB_CLK 8
27 GND +1.5V 28 9
[8] PCIE_RXP3 25 PERp0 GND 26 10 USBP4+ [9]
[8] PCIE_RXN3 23 RERn0 +3.3Vaux 24 1411 USBP4- [9]
21 22 PLTRST#
GND RESET# PLTRST# [3,9,20,21,22] 1312
19 20 3G_EN
MMC_DAT W_DISABLE# 3G_EN [22]
17 MMC_CMD GND 18
3G@88511-120N
+3V_S5 +3V_3G +3V_S5 +1.5V +1.5V_3G 15 16 UIM_VPP
GND UIM_VPP UIM_RST
[8] CLK_PCIE_3G 13 REFCLK+ UIM_RST 14
11 12 UIM_CLK
0.5A(30mils) [8] CLK_PCIE_3G#
9
REFCLK-
GND
UIM_CLK
UIM_DATA 10 UIM_DATA
7 8 UIM_PWR
[8] PCIE_CLK_REQ4# CLKREQ# UIM_PWR
1 3 5 6 C503
R287 R281 *3G@0_8 BT_CHCLK +1.5V
3 BT_DATA GND 4
Q18 3G@AO3413_3A 3G@4.7K_4 PCIE_WAKE# 3 1 3G_WAKE# 1 2 *3G@100P/50V_4N

54
53
WAKE# +3.3V
2

Q23 *3G@2N7002_200MA