Compal La-5892p r1.0 Schematics

A B C D E
1 1
Compal Confidential
2 2
NEW70 / 80 / 90 / 50 <LA-5892P> M/B Schematics Document

Intel Arrandale Processor with DDRIII + Ibex Peak-M
2010-01-21 3
REV:1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/5/12 Deciphered Date 2010/04/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NEW70 M/B LA-5892P Schematic
Date: Thursday, January 21, 2010 Sheet 1 of 49
A B C D E
A B C D E
Compal Confidential ZZZ

DAZ0C900200
PCB NEW70 LA-5892P
Model Name NEW70 / 80 / 90 / 50

ZZZ1
File Name : LA-5892P 46@ RO0000003HM
HDMI+HDCP LOGO
1 1
Fan Control Intel Memory BUS(DDRIII)

page 26
Dual Channel 204pin DDRIII-SO-DIMM X2
Arrandale (UMA) BANK 0, 1, 2, 3 page 10,11
1.5V DDRIII 800/1066/1333
Processor 6.4G/8.5G/10.6G
100M/133M/166M(CFD)
rPGA988A
page 4,5,6,7,8,9
USB conn x3 Bluetooth CMOS Mini card Card
FDI x8 DMI x4 USB port 0 (sub board) Reader
(UMA) USB Port 1 Left side
Conn Camera USB port 12
USB port 11 USB port 8 USB port 13 USB port 9
100MHz 100MHz USB port 2 (sub board)
page 39 page 29 page 22 page 39 page 39
2.7GT/s 1GB/s x4
2 USBx14 3.3V 48MHz 2
LVDS Conn. LVDS(UMA)
page 22
CRT(UMA)
Intel 3.3V 24MHz
CRT Conn. HD Audio
page 23 Ibex Peak-M
HDMI Conn. Level Shift HDMI(UMA) SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S) 100MHz
page 24 page 24 PCI-Express x 8 (ABD PCIE1 2.5GT/S CKD PCIE1/2 2.5/5GT/S) 100MHz PCH HDA Codec
page 13,14,15,16,17
18,19,20,21 ALC888
port 2,4 port 1 SPI page 33
MINI Card x2 LAN(GbE) port 0 port 1

WLAN, 3G BCM57780 SATA HDD SATA ODD
SPI ROM x2 Audio AMP
page 26 page 27 Conn. Conn.
page 13 APA2051
page 25 page 25
page 34
3
RJ45 LPC BUS 3
page 28
33MHz
Int. Speaker
RTC CKT. LS-5891P ENE KB926 page 34
page 30
Power ON/Off CKT. LS-5892P

Touch Pad Int.KBD Clock Generator
page 31 page 31
DC/DC Interface CKT. LS-5893P IDT: 9LRS3199AKLFT
SILEGO: SLG8SP587
133/120/100/96/14.318MHZ to PCH
BIOS ROM
48MHZ to CardReader
Power Circuit DC/DC CKT. LS-5894P page 31 page 12
4
LS-5895P 4

Block Diagrams
B 1.0
A B C D E
A B C D E
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
B+ AC or battery power rail for power circuit. N/A N/A N/A
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+CPU_CORE Core voltage for CPU ON ON OFF
+0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS 1.05V switched power rail for PCH ON OFF OFF
+1.05VS_VTT 1.05V switched power rail (1.05 for AUB CPU) ON OFF OFF
+1.5V 1.5V power rail for DDRIII ON ON OFF Project ID / Board ID Table for EC-AD channel
+1.5VS 1.5V switched power rail ON OFF OFF Vcc 3.3V +/- 5% Not Used
+1.8VS 1.8V switched power rail ON OFF OFF Ra/Rc 100K +/- 5%
+3VALW 3.3V always on power rail ON ON ON* Rb / Rd V AD_BID min VAD_BID typ V AD_BID max Board ID Project ID
0 0 0 V 0 V 0 V 0.1 NEW70
+3V_LAN 3.3V power rail for LAN ON ON ON* 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V 0.2 NEW80
+3VS 3.3V switched power rail ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V 0.3 NEW90
+5VALW 5V always on power rail ON ON ON* 3 33K +/- 5% 0.712 V 0.819 V 0.875 V 1.0
+5VS 5V switched power rail ON OFF OFF 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+5V 5V power rail for PCH ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+VSB VSB always on power rail ON ON ON* 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+RTCVCC RTC power ON ON ON 7 NC 2.500 V 3.300 V 3.300 V
2 2
BTO Option Table BOM Config

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BTO Item BOM Structure
HDMI HDMI@
External PCI Devices 3G 3G@
Device IDSEL# REQ#/GNT# Interrupts 9050@ NEW90 / NEW50
7080@ NEW70 / NEW80
EC SM Bus1 address EC SM Bus2 address

Device Address Device Address
Smart Battery 0001 011X b
Ibex SM Bus address USB Port Table

3
Device Address 4 External 3 External 3
Clock Generator 1101 0010b
USB 2.0 USB 1.1 Port USB Port USB Port
(9LRS3199AKLFT, SLG8SP587)
DDR DIMM0
0 Ext1 USB Ext1 USB
1001 000Xb UHCI0
DDR DIMM2 1001 010Xb
1 Ext3 HS USB Ext3 HS USB
2 Ext2 USB Ext2 USB
UHCI1
3
EHCI1
4
UHCI2
5
6
UHCI3
7
8 Camera Camera
UHCI4
9 Card Reader Card Reader
10 SIM CARD SIM CARD
EHCI2 UHCI5
11 Blue Tooth Blue Tooth
4 12 1st Min-Card 1st Min-Card 4
UHCI6
13 2st Min-Card 2st Min-Card

Notes List
B 1.0
A B C D E
5 4 3 2 1
JCPU1E
JCPU1A AJ13
PEG_IRCOMP RSVD32
PEG_ICOMPI B26 1 2 RSVD33 AJ12
A26 R1 49.9_0402_1%
DMI_PTX_HRX_N0 PEG_ICOMPO
A24 DMI_RX#[0] PEG_RCOMPO B27 AP25 RSVD1
DMI_PTX_HRX_N1 C23 A25 EXP_RBIAS 1 2 AL25 AH25
DMI_PTX_HRX_N2 DMI_RX#[1] PEG_RBIAS R3 750_0402_1% RSVD2 RSVD34
B22 DMI_RX#[2] AL24 RSVD3 RSVD35 AK26
DMI_PTX_HRX_N3 A21 K35 AL22
DMI_RX#[3] PEG_RX#[0] RSVD4
PEG_RX#[1] J34 AJ33 RSVD5 RSVD36 AL26
DMI_PTX_HRX_P0 B24 J33 AG9 AR2
DMI_PTX_HRX_P1 DMI_RX[0] PEG_RX#[2] RSVD6 RSVD_NCTF_37
D23 DMI_RX[1] PEG_RX#[3] G35 M27 RSVD7
DMI
DMI_PTX_HRX_P2 B23 G32 L28 AJ26
DMI_PTX_HRX_P3 DMI_RX[2] PEG_RX#[4] RSVD8 RSVD38
D A22 DMI_RX[3] PEG_RX#[5] F34 J17 SA_DIMM_VREF (CFD Only) RSVD39 AJ27 D
PEG_RX#[6] F31 H17 SB_DIMM_VREF (CFD Only)
DMI_HTX_PRX_N0 D24 D35 G25
DMI_HTX_PRX_N1 DMI_TX#[0] PEG_RX#[7] RSVD11
G24 DMI_TX#[1] PEG_RX#[8] E33 G17 RSVD12
DMI_HTX_PRX_N2 F23 C33 E31 AP1
DMI_HTX_PRX_N3 DMI_TX#[2] PEG_RX#[9] RSVD13 RSVD_NCTF_40
H23 DMI_TX#[3] PEG_RX#[10] D32 E30 RSVD14 RSVD_NCTF_41 AT2
PEG_RX#[11] B32
DMI_HTX_PRX_P0 D25 C31 AT3
DMI_HTX_PRX_P1 DMI_TX[0] PEG_RX#[12] RSVD_NCTF_42
F24 DMI_TX[1] PEG_RX#[13] B28 RSVD_NCTF_43 AR1
DMI_HTX_PRX_P2 E23 B30
DMI_HTX_PRX_P3 DMI_TX[2] PEG_RX#[14]
G23 DMI_TX[3] PEG_RX#[15] A31
J35 R5 AL28
PEG_RX[0] 3.01K_0402_1% RSVD45
PEG_RX[1] H34 1 @ 2 CFG0 AM30 CFG[0] RSVD46 AL29
PEG_RX[2] H33 AM28 CFG[1] RSVD47 AP30
H_FDI_TXN0 E22 F35 R6 AP31 AP32
H_FDI_TXN1 FDI_TX#[0] PEG_RX[3] 3.01K_0402_1% CFG[2] RSVD48
D21 FDI_TX#[1] PEG_RX[4] G33 1 @ 2 CFG3 AL32 CFG[3] RSVD49 AL27
H_FDI_TXN2 D19 E34 R7 1 @ 2 CFG4 AL30 AT31
H_FDI_TXN3 FDI_TX#[2] PEG_RX[5] 3.01K_0402_1% CFG[4] RSVD50
D18 FDI_TX#[3] PEG_RX[6] F32 AM31 CFG[5] RSVD51 AT32
H_FDI_TXN4 G21 D34 AN29 AP33
H_FDI_TXN5 FDI_TX#[4] PEG_RX[7] R8 CFG[6] RSVD52
1 @ CFG7
H_FDI_TXN6
E19
F21
FDI_TX#[5]
FDI_TX#[6]
PCI EXPRESS -- GRAPHICS PEG_RX[8]
PEG_RX[9]
F33
B33 3.01K_0402_1%
2 AM32
AK32
CFG[7]
CFG[8]
RSVD53
RSVD_NCTF_54
AR33
AT33
Intel(R) FDI
H_FDI_TXN7 G18 D31 AK31 AT34
RESERVED
FDI_TX#[7] PEG_RX[10] CFG[9] RSVD_NCTF_55
PEG_RX[11] A32 AK28 CFG[10] RSVD_NCTF_56 AP35
PEG_RX[12] C30 WW41 Recommend not pull down AJ28 CFG[11] RSVD_NCTF_57 AR35
H_FDI_TXP0 D22 A28 AN30 AR32
H_FDI_TXP1 FDI_TX[0] PEG_RX[13] PCIE2.0 Jitter is over on ES1 CFG[12] RSVD58
C21 FDI_TX[1] PEG_RX[14] B29 AN32 CFG[13]
H_FDI_TXP2 D20 A30 AJ32
H_FDI_TXP3 FDI_TX[2] PEG_RX[15] CFG[14]
C18 FDI_TX[3] AJ29 CFG[15] RSVD_TP_59 E15
C H_FDI_TXP4 G22 L33 AJ30 F15 C
H_FDI_TXP5 FDI_TX[4] PEG_TX#[0] CFG[16] RSVD_TP_60
E20 FDI_TX[5] PEG_TX#[1] M35 AK30 CFG[17] KEY A2
H_FDI_TXP6 F20 M33 H16 D15 R9
H_FDI_TXP7 FDI_TX[6] PEG_TX#[2] RSVD_TP_86 RSVD62 0_0402_5%
G19 FDI_TX[7] PEG_TX#[3] M30 RSVD63 C15
L31 AJ15 RSVD64_R 2 @ 1
PEG_TX#[4] RSVD64 RSVD65_R 2 @
<15> H_FDI_FSYNC0 F17 FDI_FSYNC[0] PEG_TX#[5] K32 RSVD65 AH15 1
E17 M29 R10
<15> H_FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6]
J31 B19 0_0402_5%
PEG_TX#[7] R11 RSVD15
<15> H_FDI_INT C17 FDI_INT PEG_TX#[8] K29 A19 RSVD16
H30 0_0402_5%
PEG_TX#[9] @ H_RSVD17_R
<15> H_FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29 1 2 A20 RSVD17
D17 F29 1 @ 2 H_RSVD18_R B20
<15> H_FDI_LSYNC1 FDI_LSYNC[1] PEG_TX#[11] RSVD18
PEG_TX#[12] E28 RSVD_TP_66 AA5
D29 R12 U9 AA4
PEG_TX#[13] 0_0402_5% RSVD19 RSVD_TP_67
PEG_TX#[14] D27 T9 RSVD20 RSVD_TP_68 R8
PEG_TX#[15] C26 RSVD_TP_69 AD3
AC9 RSVD21 RSVD_TP_70 AD2
PEG_TX[0] L34 AB9 RSVD22 RSVD_TP_71 AA2
PEG_TX[1] M34 RSVD_TP_72 AA1
PEG_TX[2] M32 DMI_PTX_HRX_N[0..3] <15> RSVD_TP_73 R9
PEG_TX[3] L30 DMI_PTX_HRX_P[0..3] <15> RSVD_TP_74 AG7
PEG_TX[4] M31 C1 RSVD_NCTF_23 RSVD_TP_75 AE3
PEG_TX[5] K31 DMI_HTX_PRX_N[0..3] <15> A3 RSVD_NCTF_24
PEG_TX[6] M28 DMI_HTX_PRX_P[0..3] <15>
PEG_TX[7] H31 RSVD_TP_76 V4
PEG_TX[8] K28 H_FDI_TXN[0..7] <15> RSVD_TP_77 V5
PEG_TX[9] G30 H_FDI_TXP[0..7] <15> RSVD_TP_78 N2
PEG_TX[10] G29 J29 RSVD26 RSVD_TP_79 AD5
PEG_TX[11] F28 J28 RSVD27 RSVD_TP_80 AD7
B B
PEG_TX[12] E27 RSVD_TP_81 W3
PEG_TX[13] D28 A34 RSVD_NCTF_28 RSVD_TP_82 W2
PEG_TX[14] C27 A33 RSVD_NCTF_29 RSVD_TP_83 N3
PEG_TX[15] C25 RSVD_TP_84 AE5
C35 RSVD_NCTF_30 RSVD_TP_85 AD9
B35 RSVD_NCTF_31
IC,AUB_CFD_rPGA,R1P0 AP34
CONN@ VSS
IC,AUB_CFD_rPGA,R1P0
CONN@
eDP Signals Mapping CFG0 - PCI-Express Configuration Select CFG4 - Display Port Presence
eDP Singal PEG Singals Lane Reversal *1:Single PEG *1:Disabled; No Physical Display Port
eDP_TX0 PEG_HTX_C_GRX_P15 PEG_HTX_C_GRX_P0 0:Bifurcation enabled attached to Embedded Display Port
0:Enabled; An external Display Port
eDP_TX#0 PEG_HTX_C_GRX_N15 PEG_HTX_C_GRX_N0 device is connected to the Embedded
eDP_TX1 PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_P1 CFG3 - PCI-Express Static Lane Reversal
Display Port
eDP_TX#1 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_N1 *:Default

A eDP_TX2 PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_P2 *1 :Normal Operation A
0 :Lane Numbers Reversed
eDP_TX#2 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_N2 15 -> 0, 14 -> 1, ...
eDP_TX3 PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_P3
eDP_TX#3 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_N3 Security Classification Compal Secret Data Compal Electronics, Inc.
eDP_AUX PEG_GTX_C_HRX_P13 PEG_GTX_C_HRX_P2 Issued Date 2009/08/01 Deciphered Date 2010/08/01 Title
eDP_AUX# PEG_GTX_C_HRX_N13 PEG_GTX_C_HRX_N2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR (1/6) DMI,FDI,PEG
B 1.0
eDP_HPD# PEG_GTX_C_HRX_P12 PEG_GTX_C_HRX_P3 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5 4 3 2 1
5 4 3 2 1
JCPU1B
R18 2 1 20_0402_1% H_COMP3 AT23 COMP3
BCLK A16 CLK_CPU_BCLK <18>
MISC
R19 2 1 20_0402_1% H_COMP2 AT24 B16
COMP2 BCLK# CLK_CPU_BCLK# <18>
R20 1 49.9_0402_1% H_COMP1 CLK_CPU_XDP
CLOCKS
2 G16 COMP1 BCLK_ITP AR30
AT30 CLK_CPU_XDP#
R21 BCLK_ITP#
2 1 49.9_0402_1% H_COMP0 AT26 COMP0
PEG_CLK E16 CLK_CPU_DMI <14>
PEG_CLK# D16 CLK_CPU_DMI# <14>
@ SKTOCC#_R AH24
T24 PAD SKTOCC#
DPLL_REF_SSCLK A18 CLK_CPU_DP <14>
D
DPLL_REF_SSCLK# A17 CLK_CPU_DP# <14> D
H_CATERR# AK14 CATERR# +1.05VS_VTT
THERMAL
2009/08/14 #425302
SM_DRAMRST# F6 SM_DRAMRST# <10> CP_S3PowerReduction
R26 1 2 H_PECI_R AT15 XDP_PRDY# R27 1 @ 2 51_0402_5%
<18> H_PECI PECI WhitePaper_Rev0.9
0_0402_5% AL1 SM_RCOMP_0 1 2 XDP_TMS R29 1 @ 2 51_0402_5%
SM_RCOMP[0] SM_RCOMP_1 R28 100K_0402_5% +1.05VS_VTT XDP_TDI_R R30 @ 51_0402_5%
SM_RCOMP[1] AM1 1 2
AN1 SM_RCOMP_2 XDP_PREQ# R31 1 @ 2 51_0402_5%
H_PROCHOT# SM_RCOMP[2] R32
<45> H_PROCHOT# AN26 PROCHOT# 1 2 10K_0402_5% XDP_TCLK R33 1 @ 2 51_0402_5%
AN15 PM_EXTTS#0 R34 1 2 10K_0402_5%
PM_EXT_TS#[0]
DDR3
MISC
AP15 PM_EXTTS#1_R R35 1 2 0_0402_5%
PM_EXT_TS#[1] PM_EXTTS#0_1 <10,11>
R36 1 2 H_THERMTRIP#_R AK15
<18> H_THERMTRIP# THERMTRIP#
0_0402_5%
XDP_TRST# R37 1 2 51_0402_5%
AT28 XDP_PRDY#
PRDY# XDP_PREQ# SM_RCOMP_0 R38
PREQ# AP27 1 2 100_0402_1%
SM_RCOMP_1 R39 1 2 24.9_0402_1%
AN28 XDP_TCLK SM_RCOMP_2 R40 1<BOM Structure>
2 130_0402_1%
H_CPURST# TCK XDP_TMS
AP26 RESET_OBS# TMS AP28
PWR MANAGEMENT
AT27 XDP_TRST#
TRST# XDP_TDI_R R41 2 0_0402_5% XDP_TDI
JTAG & BPM

1
R42 1 2 H_PM_SYNC_R AL15 AT29 XDP_TDI_R XDP_TDO_M R43 1 @ 2 0_0402_5% XDP_TDO
<15> H_PM_SYNC PM_SYNC TDI
0_0402_5% AR27 XDP_TDO_R
TDO
1
AR29 XDP_TDI_M
R44 1 H_CPUPW RGD_1 TDI_M XDP_TDO_M R45
2 AN14 VCCPWRGOOD_1 TDO_M AP29
0_0402_5% 0_0402_5%
AN25 XDP_DBR#_R R46 1 2 0_0402_5% XDP_DBRESET# XDP_DBRESET# <15,21>
C R47 1 H_CPUPW RGD_0 DBR# C
<18> H_CPUPW RGD 2 AN27
2
0_0402_5% VCCPWRGOOD_0 XDP_TDI_M 1 @ 2
AJ22 XDP_OBS0 XDP_TDO_R R48 1 2 0_0402_5%
R50 1 PM_DRAM_PW RGD_R BPM#[0] XDP_OBS1 R49 0_0402_5%
<15> PM_DRAM_PW RGD 2 AK13 SM_DRAMPWROK BPM#[1] AK22
0_0402_5% AK24 XDP_OBS2
BPM#[2] XDP_OBS3
BPM#[3] AJ24
H_VTTPW RGD 1 @ 2 H_VTTPW RGD_R AM15 AJ25 XDP_OBS4
R52 0_0402_5% VTTPWRGOOD BPM#[4] XDP_OBS5
BPM#[5] AH22
XDP_OBS6
JTAG MAPPING
BPM#[6] AK23
H_PW RGD_XDP R55 1 2 H_PW RGD_XDP_R AM26 AH23 XDP_OBS7
0_0402_5% TAPPWRGOOD BPM#[7]
Scan Chain STUFF -> R653, R657, R662
(Default) NO STUFF -> R655, R660
R56 1 2 PLT_RST#_R AL14 2009/2/4
<17,21,27,30> PLT_RST# RSTIN#
1.5K_0402_1% Delete dampling resistor for
power noise and Layout space CPU Only STUFF -> R653, R655
1
2009/2/4 NO STUFF -> R657, R660, R662

#414044 DG R57 IC,AUB_CFD_rPGA,R1P0 issue
750_0402_1% CONN@
Update Rev1.11
GMCH Only STUFF -> R660, R662
NO STUFF -> R653, R655, R657
2
+1.05VS_VTT
R58 2 1 49.9_0402_1% H_CATERR#

R59 2 1 68_0402_5% H_PROCHOT#
R60 2 @ 1 68_0402_5% H_CPURST#
JP5
XDP Connector
1 GND0 GND1 2
B XDP_PREQ# B
2009/8/14 3 OBSFN_A0 OBSFN_C0 4
+3VALW XDP_PRDY# 5 6
change back to 2K OBSFN_A1 OBSFN_C1
7 GND2 GND3 8
XDP_OBS0 9 10
OBSDATA_A0 OBSDATA_C0
5
U1 R61 XDP_OBS1 11 12
H_VTTPW RGD 2 2K_0402_1% OBSDATA_A1 OBSDATA_C1
13 14
P
<43> H_VTTPW RGD B GND4 GND5

4 1 2 H_VTTPW RGD_R XDP_OBS2 15 16
Y XDP_OBS3 OBSDATA_A2 OBSDATA_C2
1 A 17 OBSDATA_A3 OBSDATA_C3 18
G
19 GND6 GND7 20
NC7SZ08P5X_NL_SC70-5 R62 21 22
3
OBSFN_B0 OBSFN_D0
23 OBSFN_B1 OBSFN_D1 24
U1 / U2 1K_0402_1% 25 26 R63
XDP_OBS4 GND8 GND9 1K_0402_5%
27 28
change to SA00000OH00
2
XDP_OBS5 OBSDATA_B0 OBSDATA_D0

29 OBSDATA_B1 OBSDATA_D1 30 1 2 H_CPURST#
31 32 H_RESET#_R 1 2 PLT_RST#
XDP_OBS6 GND10 GND11 R64 @ 0_0402_5%
#425302 +3VALW
33 OBSDATA_B2 OBSDATA_D2 34
R65 XDP_OBS7 35 36
CP_S3PowerReduction Need to check Voltage Level 1K_0402_5% 37
OBSDATA_B3 OBSDATA_D3
38
H_CPUPW RGD 1 GND12 GND13
WhitePaper_Rev0.7 2 H_PW RGOOD_R 39 PWRGOOD/HOOK0 ITPCLK/HOOK4 40 CLK_CPU_XDP
5
U2 1 2 PBTN_OUT#_XDP 41 42 CLK_CPU_XDP#
+1.5V_1 <15,21,30> PBTN_OUT# HOOK1 ITPCLK#/HOOK5
2 H_VTTPW RGD R66 0_0402_5% 43 44
P
B +1.05VS_VTT VCC_OBS_AB VCC_OBS_CD +1.05VS_VTT

4 H_PW RGD_XDP 45 46 H_RESET#_R
Y C65 HOOK2 RESET#/HOOK6 XDP_DBRESET#
A 1 1 47 HOOK3 DBR#/HOOK7 48 1 2 +3VS
G
0.1U_0402_16V4Z 49 50 R67 1K_0402_5%

GND14 GND15
1
NC7SZ08P5X_NL_SC70-5 @ 51 52 XDP_TDO 1 2 +1.05VS_VTT

<21> SMB_DATA_S3
3
R68 R69 SDA TD0 XDP_TRST# R70 51_0402_5%

<21> SMB_CLK_S3 53 SCL TRST# 54
@ 2 XDP_TDI
55 TCK1 TDI 56
1.1K_0402_1% 1.5K_0402_1% XDP_TCLK 57 58 XDP_TMS
TCK0 TMS
59 60
2
A GND16 GND17 A
PM_DRAM_PW RGD_R CONN@ SAMTE_BSH-030-01-L-D-A

1
1
R72
R71
@ 750_0402_1% Security Classification Compal Secret Data Compal Electronics, Inc.
3.01K_0402_1% 2009/04/23 2009/08/01 2010/08/01 Title
Issued Date Deciphered Date
2
PROCESSOR (2/6) CLK,JTAG

2
Intel CRB 1.55 Update

Change R292 to 1.1K_1%, R302 to 3.01K_1% Size Document Number Rev
B 1.0
5 4 3 2 1
5 4 3 2 1
JCPU1D
<11> DDR_B_D[0..63]
<11> DDR_B_DM[0..7]
JCPU1C
<10> DDR_A_D[0..63] <11> DDR_B_DQS#[0..7]
<10> DDR_A_DM[0..7] <11> DDR_B_DQS[0..7]
<10> DDR_A_DQS#[0..7] <11> DDR_B_MA[0..15]
<10> DDR_A_DQS[0..7]
<10> DDR_A_MA[0..15] SB_CK[0] W8 DDR_B_CLK0 <11>
SB_CK#[0] W9 DDR_B_CLK0# <11>
AA6 DDR_B_D0 B5 M3
SA_CK[0] DDR_A_CLK0 <10> SB_DQ[0] SB_CKE[0] DDR_B_CKE0 <11>
AA7 DDR_B_D1 A5
SA_CK#[0] DDR_A_CLK0# <10> SB_DQ[1]
P7 DDR_B_D2 C3
SA_CKE[0] DDR_A_CKE0 <10> SB_DQ[2]
DDR_A_D0 A10 DDR_B_D3 B3 V7
SA_DQ[0] SB_DQ[3] SB_CK[1] DDR_B_CLK1 <11>
DDR_A_D1 C10 DDR_B_D4 E4 V6
SA_DQ[1] SB_DQ[4] SB_CK#[1] DDR_B_CLK1# <11>
D DDR_A_D2 C7 DDR_B_D5 A6 M2 D
SA_DQ[2] SB_DQ[5] SB_CKE[1] DDR_B_CKE1 <11>
DDR_A_D3 A7 Y6 DDR_B_D6 A4
SA_DQ[3] SA_CK[1] DDR_A_CLK1 <10> SB_DQ[6]
DDR_A_D4 B10 Y5 DDR_B_D7 C4
SA_DQ[4] SA_CK#[1] DDR_A_CLK1# <10> SB_DQ[7]
DDR_A_D5 D10 P6 DDR_B_D8 D1
SA_DQ[5] SA_CKE[1] DDR_A_CKE1 <10> SB_DQ[8]
DDR_A_D6 E10 DDR_B_D9 D2
DDR_A_D7 SA_DQ[6] DDR_B_D10 SB_DQ[9]
A8 SA_DQ[7] F2 SB_DQ[10] SB_CS#[0] AB8 DDR_B_CS0# <11>
DDR_A_D8 D8 DDR_B_D11 F1 AD6
SA_DQ[8] SB_DQ[11] SB_CS#[1] DDR_B_CS1# <11>
DDR_A_D9 F10 AE2 DDR_B_D12 C2
SA_DQ[9] SA_CS#[0] DDR_A_CS0# <10> SB_DQ[12]
DDR_A_D10 E6 AE8 DDR_B_D13 F5
SA_DQ[10] SA_CS#[1] DDR_A_CS1# <10> SB_DQ[13]
DDR_A_D11 F7 DDR_B_D14 F3
E9 SA_DQ[12] G4 SB_DQ[15] SB_ODT[0] AC7 DDR_B_ODT0 <11>
DDR_A_D13 B7 DDR_B_D16 H6 AD1
SA_DQ[13] SB_DQ[16] SB_ODT[1] DDR_B_ODT1 <11>
DDR_A_D14 E7 AD8 DDR_B_D17 G2
SA_DQ[14] SA_ODT[0] DDR_A_ODT0 <10> SB_DQ[17]
DDR_A_D15 C6 AF9 DDR_B_D18 J6
SA_DQ[15] SA_ODT[1] DDR_A_ODT1 <10> SB_DQ[18]
DDR_A_D16 H10 DDR_B_D19 J3
G8 SA_DQ[17] G1 SB_DQ[20]
DDR_A_D18 K7 DDR_B_D21 G5 D4 DDR_B_DM0
DDR_A_D19 SA_DQ[18] DDR_B_D22 SB_DQ[21] SB_DM[0] DDR_B_DM1
J8 SA_DQ[19] J2 SB_DQ[22] SB_DM[1] E1
DDR_A_D20 G7 DDR_B_D23 J1 H3 DDR_B_DM2
DDR_A_D21 SA_DQ[20] DDR_B_D24 SB_DQ[23] SB_DM[2] DDR_B_DM3
G10 SA_DQ[21] J5 SB_DQ[24] SB_DM[3] K1
DDR_A_D22 J7 B9 DDR_A_DM0 DDR_B_D25 K2 AH1 DDR_B_DM4
DDR_A_D23 SA_DQ[22] SA_DM[0] DDR_A_DM1 DDR_B_D26 SB_DQ[25] SB_DM[4] DDR_B_DM5
J10 SA_DQ[23] SA_DM[1] D7 L3 SB_DQ[26] SB_DM[5] AL2
DDR_A_D24 L7 H7 DDR_A_DM2 DDR_B_D27 M1 AR4 DDR_B_DM6
DDR_A_D25 SA_DQ[24] SA_DM[2] DDR_A_DM3 DDR_B_D28 SB_DQ[27] SB_DM[6] DDR_B_DM7
M6 SA_DQ[25] SA_DM[3] M7 K5 SB_DQ[28] SB_DM[7] AT8
DDR_A_D26 M8 AG6 DDR_A_DM4 DDR_B_D29 K4
DDR_A_D27 SA_DQ[26] SA_DM[4] DDR_A_DM5 DDR_B_D30 SB_DQ[29]
L9 SA_DQ[27] SA_DM[5] AM7 M4 SB_DQ[30]
DDR_A_D28 L6 AN10 DDR_A_DM6 DDR_B_D31 N5
DDR_A_D29 SA_DQ[28] SA_DM[6] DDR_A_DM7 DDR_B_D32 SB_DQ[31]
K8 SA_DQ[29] SA_DM[7] AN13 AF3 SB_DQ[32]
DDR_A_D30 N8 DDR_B_D33 AG1
C DDR_A_D31 SA_DQ[30] DDR_B_D34 SB_DQ[33] DDR_B_DQS#0 C
P9 SA_DQ[31] AJ3 SB_DQ[34] SB_DQS#[0] D5
DDR_A_D32 AH5 DDR_B_D35 AK1 F4 DDR_B_DQS#1
DDR_A_D33 SA_DQ[32] DDR_B_D36 SB_DQ[35] SB_DQS#[1] DDR_B_DQS#2
AF5 SA_DQ[33] AG4 SB_DQ[36] SB_DQS#[2] J4
DDR_A_D34 AK6 C9 DDR_A_DQS#0 DDR_B_D37 AG3 L4 DDR_B_DQS#3
SA_DQ[34] SA_DQS#[0] SB_DQ[37] SB_DQS#[3]
DDR SYSTEM MEMORY A
DDR_A_D35 AK7 F8 DDR_A_DQS#1 DDR_B_D38 AJ4 AH2 DDR_B_DQS#4

SA_DQ[35] SA_DQS#[1] SB_DQ[38] SB_DQS#[4]
DDR SYSTEM MEMORY - B

DDR_A_D36 AF6 J9 DDR_A_DQS#2 DDR_B_D39 AH4 AL4 DDR_B_DQS#5
DDR_A_D37 SA_DQ[36] SA_DQS#[2] DDR_A_DQS#3 DDR_B_D40 SB_DQ[39] SB_DQS#[5] DDR_B_DQS#6
AG5 SA_DQ[37] SA_DQS#[3] N9 AK3 SB_DQ[40] SB_DQS#[6] AR5
DDR_A_D38 AJ7 AH7 DDR_A_DQS#4 DDR_B_D41 AK4 AR8 DDR_B_DQS#7
DDR_A_D39 SA_DQ[38] SA_DQS#[4] DDR_A_DQS#5 DDR_B_D42 SB_DQ[41] SB_DQS#[7]
AJ6 SA_DQ[39] SA_DQS#[5] AK9 AM6 SB_DQ[42]
DDR_A_D40 AJ10 AP11 DDR_A_DQS#6 DDR_B_D43 AN2
DDR_A_D41 SA_DQ[40] SA_DQS#[6] DDR_A_DQS#7 DDR_B_D44 SB_DQ[43]
AJ9 SA_DQ[41] SA_DQS#[7] AT13 AK5 SB_DQ[44]
DDR_A_D42 AL10 DDR_B_D45 AK2
AK12 SA_DQ[43] AM4 SB_DQ[46]
DDR_A_D44 AK8 DDR_B_D47 AM3
DDR_A_D45 SA_DQ[44] DDR_B_D48 SB_DQ[47] DDR_B_DQS0
AL7 SA_DQ[45] AP3 SB_DQ[48] SB_DQS[0] C5
DDR_A_D46 AK11 C8 DDR_A_DQS0 DDR_B_D49 AN5 E3 DDR_B_DQS1
DDR_A_D47 SA_DQ[46] SA_DQS[0] DDR_A_DQS1 DDR_B_D50 SB_DQ[49] SB_DQS[1] DDR_B_DQS2
AL8 SA_DQ[47] SA_DQS[1] F9 AT4 SB_DQ[50] SB_DQS[2] H4
DDR_A_D48 AN8 H9 DDR_A_DQS2 DDR_B_D51 AN6 M5 DDR_B_DQS3
AM10 SA_DQ[49] SA_DQS[3] M9 AN4 SB_DQ[52] SB_DQS[4] AG2
DDR_A_D50 AR11 AH8 DDR_A_DQS4 DDR_B_D53 AN3 AL5 DDR_B_DQS5
AL11 SA_DQ[51] SA_DQS[5] AK10 AT5 SB_DQ[54] SB_DQS[6] AP5
DDR_A_D52 AM9 AN11 DDR_A_DQS6 DDR_B_D55 AT6 AR7 DDR_B_DQS7
DDR_A_D53 SA_DQ[52] SA_DQS[6] DDR_A_DQS7 DDR_B_D56 SB_DQ[55] SB_DQS[7]
AN9 SA_DQ[53] SA_DQS[7] AR13 AN7 SB_DQ[56]
DDR_A_D54 AT11 DDR_B_D57 AP6
AP12 SA_DQ[55] AP8 SB_DQ[58]
DDR_A_D56 AM12 DDR_B_D59 AT9
AN12 SA_DQ[57] AT7 SB_DQ[60]
DDR_A_D58 AM13 Y3 DDR_A_MA0 DDR_B_D61 AP9
DDR_A_D59 SA_DQ[58] SA_MA[0] DDR_A_MA1 DDR_B_D62 SB_DQ[61]
AT14 SA_DQ[59] SA_MA[1] W1 AR10 SB_DQ[62]
B DDR_A_D60 DDR_A_MA2 DDR_B_D63 DDR_B_MA0 B
AT12 SA_DQ[60] SA_MA[2] AA8 AT10 SB_DQ[63] SB_MA[0] U5
DDR_A_D61 AL13 AA3 DDR_A_MA3 V2 DDR_B_MA1
DDR_A_D62 SA_DQ[61] SA_MA[3] DDR_A_MA4 SB_MA[1] DDR_B_MA2
AR14 SA_DQ[62] SA_MA[4] V1 SB_MA[2] T5
DDR_A_D63 AP14 AA9 DDR_A_MA5 V3 DDR_B_MA3
SA_DQ[63] SA_MA[5] DDR_A_MA6 SB_MA[3] DDR_B_MA4
SA_MA[6] V8 SB_MA[4] R1
T1 DDR_A_MA7 DDR_B_BS0 AB1 T8 DDR_B_MA5
SA_MA[7] <11> DDR_B_BS0 SB_BS[0] SB_MA[5]
Y9 DDR_A_MA8 DDR_B_BS1 W5 R2 DDR_B_MA6
SA_MA[8] <11> DDR_B_BS1 SB_BS[1] SB_MA[6]
DDR_A_BS0 AC3 U6 DDR_A_MA9 DDR_B_BS2 R7 R6 DDR_B_MA7
<10> DDR_A_BS0 SA_BS[0] SA_MA[9] <11> DDR_B_BS2 SB_BS[2] SB_MA[7]
DDR_A_BS1 AB2 AD4 DDR_A_MA10 R4 DDR_B_MA8
<10> DDR_A_BS1 SA_BS[1] SA_MA[10] SB_MA[8]
DDR_A_BS2 U7 T2 DDR_A_MA11 R5 DDR_B_MA9
<10> DDR_A_BS2 SA_BS[2] SA_MA[11] SB_MA[9]
U3 DDR_A_MA12 DDR_B_CAS# AC5 AB5 DDR_B_MA10
SA_MA[12] <11> DDR_B_CAS# SB_CAS# SB_MA[10]
AG8 DDR_A_MA13 DDR_B_RAS# Y7 P3 DDR_B_MA11
SA_MA[13] <11> DDR_B_RAS# SB_RAS# SB_MA[11]
T3 DDR_A_MA14 <11> DDR_B_W E# DDR_B_W E# AC6 R3 DDR_B_MA12
DDR_A_CAS# SA_MA[14] DDR_A_MA15 SB_WE# SB_MA[12] DDR_B_MA13
<10> DDR_A_CAS# AE1 SA_CAS# SA_MA[15] V9 SB_MA[13] AF7
DDR_A_RAS# AB3 P5 DDR_B_MA14
<10> DDR_A_RAS# SA_RAS# SB_MA[14]
<10> DDR_A_W E# DDR_A_W E# AE9 N1 DDR_B_MA15
SA_WE# SB_MA[15]
CONN@
A
CONN@ A

PROCESSOR (3/6) DDRIII
B 1.0
5 4 3 2 1
5 4 3 2 1
JCPU1F
WW15 MOW
+CPU_CORE
Peak 21A +1.05VS_VTT
48A Continuous 18A
10U_0805_6.3V6M
AG35 AH14 10U_0805_6.3V6M 10U_0805_6.3V6M
VCC1 VTT0_1
AG34 VCC2 VTT0_2 AH12
AG33 AH11 +CPU_CORE
VCC3 VTT0_3
AG32 AH10 1 1 1 1 1 1 1
D VCC4 VTT0_4 C66 C67 C68 C69 C70 C71 C72 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M D
AG31 VCC5 VTT0_5 J14
AG30 J13
VCC6 VTT0_6
AG29 VCC7 VTT0_7 H14 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 C73 C74 C75 C76 C77 C78 C79 C80 C81
AG28 VCC8 VTT0_8 H12
AG27 G14
VCC9 VTT0_9 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
AG26 G13
VCC10 VTT0_10 10U_0805_6.3V6M 2 2 2 2 2 2 2 2 2
AF35 G12
VCC11 VTT0_11
AF34 G11
VCC12 VTT0_12 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
AF33 F14
VCC13 VTT0_13
AF32
VCC14 VTT0_14
F13 (Place these capacitors between inductor and socket on Bottom)
AF31 F12
VCC15 VTT0_15 +1.05VS_VTT
AF30 VCC16 VTT0_16 F11
AF29 E14 +CPU_CORE
VCC17 VTT0_17
AF28 VCC18 VTT0_18 E12
AF27 D14 1 1 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VCC19 VTT0_19
AF26 VCC20 VTT0_20 D13
+ + C83
1.1V RAIL POWER

AD35 D12 C82 1 1 1 1 1 1
VCC21 VTT0_21 C84 C85 C86 C87 C88 C89
AD34 VCC22 VTT0_22 D11
AD33 C14 330U_D2E_2.5VM_R6M
VCC23 VTT0_23 2 2
AD32 VCC24 VTT0_24 C13
2 2 2 2 2 2
AD31 VCC25 VTT0_25 C12
AD30 C11 330U_D2E_2.5VM_R6M
VCC26 VTT0_26 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
AD29 VCC27 VTT0_27 B14
AD28 VCC28 VTT0_28 B12 (Place these capacitors under CPU socket, top layer)
AD27 VCC29 VTT0_29 A14
AD26 VCC30 VTT0_30 A13 CSC (Current Sense Configuration)
AC35 VCC31 VTT0_31 A12 8/25 +1.05VS_VTT
AC34 VCC32 VTT0_32 A11
AC33 VCC33
AC32 +1.05VS_VTT
VCC34 CPU_VID0 R73
AC31 VCC35 1 2 1K_0402_1%
AC30 AF10 22U_0805_6.3V6M R74 1 @ 2 1K_0402_1%
C VCC36 VTT0_33 C
AC29 VCC37 VTT0_34 AE10
AC28 AC10 CPU_VID1 R75 1 2 1K_0402_1% +CPU_CORE
VCC38 VTT0_35 1 1
CPU CORE SUPPLY
AC27 AB10 C91 C92 R76 1 @ 2 1K_0402_1%

VCC39 VTT0_36 22U_0805_6.3V6M 22U_0805_6.3V6M
AC26 VCC40 VTT0_37 Y10
AA35 W10 CPU_VID2 R77 1 2 1K_0402_1%
VCC41 VTT0_38 2 2 R78
AA34 VCC42 VTT0_39 U10 1 @ 2 1K_0402_1% 1 1 1 1 1
AA33 T10 22U_0805_6.3V6M C98 C94 C95 C96 C97
VCC43 VTT0_40 CPU_VID3 R79
AA32 J12 1 @ 2 1K_0402_1%
VCC44 VTT0_41 R80
AA31
VCC45 VTT0_42
J11 1 2 1K_0402_1%
AA30 J16 2 2 2 2 2
VCC46 VTT0_43 CPU_VID4 R81
AA29
VCC47 VTT0_44
J15 1 @ 2 1K_0402_1%
AA28 R82 1 2 1K_0402_1% 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
VCC48
AA27
VCC49 (Place these capacitors on CPU cavity, Bottom Layer)
AA26 CPU_VID5 R83 1 2 1K_0402_1%
VCC50 R84
Y35
VCC51 1 @ 2 1K_0402_1%
Y34
VCC52 CPU_VID6 R85
Y33 1 @ 2 1K_0402_1%
VCC53 R86 +CPU_CORE
Y32
VCC54 1 2 1K_0402_1%
Y31
VCC55 H_DPRSLPVR R87
Y30
VCC56 1 2 1K_0402_1% 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
Y29 R88 1 @ 2 1K_0402_1%
VCC57
Y28 1 1 1 1 1 1
VCC58 H_PSI# R89
Y27 1 @ 2 1K_0402_1% C99 C100 C101 C102 C103 C104
VCC59 R90
Y26 1 2 1K_0402_1%
VCC60
V35 AN33 H_PSI# <45>
VCC61 PSI# 2 2 2 2 2 2
V34
POWER
VCC62
V33
VCC63 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
V32 AK35 CPU_VID0 <45>
VCC64 VID[0]
V31
VCC65 VID[1]
AK33 CPU_VID1 <45> (Place these capacitors on CPU cavity, Bottom Layer)
V30 AK34 CPU_VID2 <45>
VCC66 VID[2]
V29 AL35 CPU_VID3 <45>
VCC67 VID[3]
CPU VIDS
V28 AL33 CPU_VID4 <45>

B VCC68 VID[4] B
V27 AM33 CPU_VID5 <45>
VCC69 VID[5]
V26 AM35 CPU_VID6 <45>
VCC70 VID[6]
U35 AM34 H_DPRSLPVR <45>
VCC71 PROC_DPRSLPVR
U34
VCC72
U33
VCC73
U32
VCC74 H_VTTVID1 @ 20090915 Modify
U31 G15 PAD T14
VCC75 VTT_SELECT
U30
VCC76
U29
VCC77
U28
VCC78 H_VTTVID1 = low, 1.1V VTT Rail
U27
VCC79
U26
VCC80 H_VTTVID1 = high, 1.05V
R35
VCC81 Auburndale +1.1VS_VTT=1.05V
R34
VCC82 Clarksfield +1.1VS_VTT=1.1V +CPU_CORE
R33
VCC83
R32
VCC84 ISENSE
AN35 IMVP_IMON <45> 4 x 470uF(4.5mohm@100kHz; 4.0mohm@SRF)
R31
VCC85
R30 1 2 +CPU_CORE 1 1 1 1 1
VCC86 R91 100_0402_1%
R29
VCC87 VCCSENSE_R R92 VCCSENSE + + + + +
2 0_0402_5% C105 C106 C272 C273 C275
SENSE LINES
R28 AJ34 1 VCCSENSE <45>

VCC88 VCC_SENSE VSSSENSE_R R93 VSSSENSE
R27 AJ35 1 2 0_0402_5% VSSSENSE <45> @
VCC89 VSS_SENSE 330U_D2E_2.5VM_R6M
R26
VCC90 2 2 2 2 2
P35 1 2
VCC91 R94 100_0402_1% 330U_D2E_2.5VM_R6M 330U_D2E_2.5VM_R6M
P34 B15 VTT_SENSE <43>
VCC92 VTT_SENSE VSS_SENSE_VTT 330U_D2E_2.5VM_R6M 330U_D2E_2.5VM_R6M
P33 A15
VCC93 VSS_SENSE_VTT R95
P32 1 2 0_0402_5% TOP side (under inductor)
VCC94
P31
VCC95
P30
VCC96
P29
VCC97 +CPU-CORE C,uF ESR, mohm Stuffing Option
P28
P27
VCC98 Decoupling
VCC99
A
P26 VCC100 SPCAP,Polymer 4X470uF 4m ohm/4 2X470uF A
16X22uF 3m ohm/12
MLCC 0805 X5R
16X10uF 3m ohm/16
IC,AUB_CFD_rPGA,R1P0 Security Classification Compal Secret Data Compal Electronics, Inc.

CONN@ Issued Date 2009/08/01 2010/08/01 Title
Deciphered Date
PROCESSOR (4/6) PWR,Bypass
Custom 1.0
5 4 3 2 1
5 4 3 2 1
+VGFX_CORE
JCPU1G
10U_0805_6.3V6M
22U_0805_6.3V6M AT21 VAXG1
AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE <44>
SENSE
LINES
1 1 1 1 1 AT18 VAXG3 VSSAXG_SENSE AT22 VSS_AXG_SENSE <44>
C110 C111 C112 C113 AT16
C107 + VAXG4
D AR21 VAXG5 D
AR19 VAXG6
2 2 2 2
AR18 VAXG7
330U_D2E_2.5VM_R6M 2
AR16 VAXG8 GFX_VID[0] AM22 GFXVR_VID_0 <44>
AP21 VAXG9 GFX_VID[1] AP22 GFXVR_VID_1 <44>
GRAPHICS VIDs
22U_0805_6.3V6M AP19 AN22
VAXG10 GFX_VID[2] GFXVR_VID_2 <44>
10U_0805_6.3V6M AP18 AP23 GFXVR_EN 1 2
AP16 15A AM23 R167 470_0402_5%
AN21 VAXG13 GFX_VID[5] AP24 GFXVR_VID_5 <44>
GRAPHICS
AN19 AN24 PD 470ohm 20091105
AN18 VAXG15
AN16 VAXG16
AM21 AR25 GFXVR_EN
VAXG17 GFX_VR_EN GFXVR_EN <44>
AM19 AT25 GFXVR_DPRSLPVR_R R97 1 2 0_0402_5%
VAXG18 GFX_DPRSLPVR GFXVR_DPRSLPVR <44> +1.5V_1 +1.5V
AM18 VAXG19 GFX_IMON AM24 GFXVR_IMON <44>
AM16 VAXG20
AL21 VAXG21
AL19
AL18
VAXG22 Reserved for +1.5V to +1.5V_1
VAXG23 J1
AL16 VAXG24
AK21 AJ1 1U_0402_6.3V4Z 1U_0402_6.3V4Z 22U_0805_6.3V6M 2 1
VAXG25 VDDQ1 2 1
AK19 VAXG26 VDDQ2 AF1
AK18 AE7 1 1 1 1 1 1 1 1 @ JUMP_43X118
- 1.5V RAILS
VAXG27 VDDQ3 C114 C115 C116 C117 C118 C119 C120
AK16 VAXG28 VDDQ4 AE4
AJ21 AC1 + C121
VAXG29 VDDQ5 330U_D2E_2.5VM_R6M J3
AJ19 VAXG30 VDDQ6 AB7
2 2 2 2 2 2 2
AJ18 VAXG31 VDDQ7 AB4 2 2 1 1 +1.5VS
2
AJ16 VAXG32 3A VDDQ8 Y1
@ JUMP_43X118
AH21 VAXG33 VDDQ9 W7
POWER
C AH19 W4 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z C
VAXG34 VDDQ10 22U_0805_6.3V6M
AH18 VAXG35 VDDQ11 U1
AH16 VAXG36 VDDQ12 T7
T4
Reserved for +1.5VS to +1.5V_1
VDDQ13
VDDQ14 P1
+1.05VS_VTT N7
VDDQ15
VDDQ16 N4
DDR3
VDDQ17 L1
J24 VTT1_45 VDDQ18 H1 11/03 add four 0.1u 0402
FDI
J23 VTT1_46 Intel suggest
1 1 H25 VTT1_47
C122 C123 +1.05VS_VTT
+1.5V_1 +1.5V
22U_0805_6.3V6M 22U_0805_6.3V6M P10
2 2 VTT0_59
VTT0_60 N10
VTT0_61 L10 1 1 2
K10 C124 C670 0.1U_0402_16V4Z
VTT0_62
1 2
+1.05VS_VTT 10U_0805_6.3V6M C671 0.1U_0402_16V4Z
2
1 2
+1.05VS_VTT C672 0.1U_0402_16V4Z
1.1V
VTT1_63 J22 1 2
K26 J20 C673 0.1U_0402_16V4Z
VTT1_48 VTT1_64
J27 VTT1_49 VTT1_65 J18 1
PEG & DMI

1 1 J26 H21 C127
C125 C126 VTT1_50 VTT1_66
J25 VTT1_51 VTT1_67 H20
H27 H19 22U_0805_6.3V6M
22U_0805_6.3V6M 22U_0805_6.3V6M VTT1_52 VTT1_68 2
G28 VTT1_53
2 2
G27 VTT1_54
B B
G26 VTT1_55
F26 +1.8VS
VTT1_56 R99
E26 VTT1_57 VCCPLL1 L26
1.8V
E25 0.6A L27 0_0805_5%
VTT1_58 VCCPLL2 +1.8VS_VCCSFR 2.2U_0603_6.3V4Z
VCCPLL3 M26 1 2
1 1 1 1 1
C128 C129 C130 C131 C132
1U_0402_6.3V4Z
2 2 2 2 2 22U_0805_6.3V6M
IC,AUB_CFD_rPGA,R1P0 1U_0402_6.3V4Z 4.7U_0805_10V4Z

CONN@
A A

PROCESSOR (5/6) PWR
Custom 1.0
5 4 3 2 1
5 4 3 2 1
JCPU1H JCPU1I
AT20 VSS1 VSS81 AE34

AT17 VSS2 VSS82 AE33
AR31 VSS3 VSS83 AE32 K27 VSS161
D AR23 VSS7 VSS87 AE28 J32 VSS165 D
AR20 VSS8 VSS88 AE27 J30 VSS166
AR12 VSS11 VSS91 AD10 H35 VSS169
AR9 VSS12 VSS92 AC8 H32 VSS170
AP20 VSS15 VSS95 AB35 H24 VSS173
AN34 VSS22 VSS102 AB28 H5 VSS180
AN31 VSS23 VSS103 AB27 H2 VSS181
AN23 VSS24 VSS104 AB26 G34 VSS182
AN20 VSS25 VSS105 AB6 G31 VSS183
AN17 VSS26 VSS106 AA10 G20 VSS184
AM29 VSS27 VSS107 Y8 G9 VSS185
AM20 VSS30 VSS110 W35 F30 VSS188
C AM2 W29 E35 C
VSS36 VSS116 VSS194
AL34 W28 E32
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
E29
E24
VSS195
VSS196
VSS197
VSS
AL20 VSS40 VSS120 W6 E21 VSS198
AL17 VSS41 VSS121 V10 E18 VSS199
AL12 VSS42 VSS122 U8 E13 VSS200
AL3 VSS45 VSS125 T35 E5 VSS203
AK29 T34 E2 AT35 H_NCTF1 @ PAD T2
VSS46 VSS126 VSS204 VSS_NCTF1 H_NCTF2 @
AK27 VSS47 VSS127 T33 D33 VSS205 VSS_NCTF2 AT1 PAD T3
AK25 VSS48 VSS128 T32 D30 VSS206 VSS_NCTF3 AR34
AK20 VSS49 VSS129 T31 D26 VSS207 VSS_NCTF4 B34
AK17 T30 D9 B2
NCTF
VSS50 VSS130 VSS208 VSS_NCTF5 H_NCTF6 @
AJ31 VSS51 VSS131 T29 D6 VSS209 VSS_NCTF6 B1 PAD T4
AJ23 T28 D3 A35 H_NCTF7 @ PAD T5
VSS52 VSS132 VSS210 VSS_NCTF7
AJ20 VSS53 VSS133 T27 C34 VSS211
AJ11 VSS56 VSS136 R10 C28 VSS214
AJ8 VSS57 VSS137 P8 C24 VSS215
AH35 VSS60 VSS140 N35 C19 VSS218
AH34 VSS61 VSS141 N34 C16 VSS219
AH33 VSS62 VSS142 N33 B31 VSS220
B B
AH17 VSS71 VSS151 M10 B4 VSS229
AH13 VSS72 VSS152 L35 A29 VSS230
AG10 VSS76 VSS156 L5
AF8 VSS77 VSS157 L2
AF4 VSS78 VSS158 K34
AF2 VSS79 VSS159 K33
AE35 VSS80 VSS160 K30
IC,AUB_CFD_rPGA,R1P0 IC,AUB_CFD_rPGA,R1P0
CONN@ CONN@
A A

PROCESSOR (6/6) VSS
Custom 1.0
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V
DIMMA VREFDQ M1 Circuit JDIMM1
<6> DDR_A_DQS#[0..7] +DIMM_VREFDQA 1 2
+1.5V VREF_DQ VSS1 DDR_A_D4
<6> DDR_A_D[0..63] 3 VSS2 DQ4 4
DDR_A_D0 5 6 DDR_A_D5
DDR_A_D1 DQ0 DQ5
<6> DDR_A_DM[0..7] 7 DQ1 VSS3 8
1
9 10 DDR_A_DQS#0
R101 +DIMM_VREFDQA DDR_A_DM0 VSS4 DQS#0 DDR_A_DQS0
<6> DDR_A_DQS[0..7] 11 DM0 DQS0 12
13 VSS5 VSS6 14
1K_0402_1% <6> DDR_A_MA[0..15] DDR_A_D2 15 16 DDR_A_D6
DDR_A_D3 DQ2 DQ6 DDR_A_D7
17 18
2
DQ3 DQ7
M1 Circuit 19 VSS7 VSS8 20
DQ8 DQ12
1
+DIMM_VREFDQA DDR_A_D9 23 24 DDR_A_D13

R104 DQ9 DQ13
25 26
D DDR_A_DQS#1 VSS9 VSS10 DDR_A_DM1 D
27 DQS#1 DM1 28
1K_0402_1% DDR_A_DQS1 29 30 DIMM_DRAMRST#
DQS1 RESET#
1 1 31 32
2
C134 C133 DDR_A_D10 VSS11 VSS12 DDR_A_D14

33 DQ10 DQ14 34
0.1U_0402_16V4Z 2.2U_0805_16V4Z DQ11 DQ15
37 38
2 2 DDR_A_D16 VSS13 VSS14 DDR_A_D20
39 40
41 42
DQ17 DQ21
43 44
DDR_A_DQS#2 VSS15 VSS16 DDR_A_DM2
45 46
DDR_A_DQS2 DQS#2 DM2
DIMMA & DIMMB VREFCA circuit 47
DQS2 VSS17
48
49 50 DDR_A_D22
+1.5V DDR_A_D18 VSS18 DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS19 DDR_A_D28
55 VSS20 DQ28 56
1
R106 +DIMM_VREFCA DDR_A_D25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DDR_A_DQS#3
1K_0402_1% DDR_A_DM3 VSS22 DQS#3 DDR_A_DQS3
63 DM3 DQS3 64
65 66
2
+1.5V DDR_A_D26 VSS23 VSS24 DDR_A_D30

#425302 67 DQ26 DQ30 68
CP_S3PowerReduction DQ27 DQ31
1
71 72
WhitePaper_Rev1.0 VSS25 VSS26
1
R107 R102
0_0402_5% R103
1K_0402_1% 1 @ 2
1K_0402_1% DDR_A_CKE0 73 74 DDR_A_CKE1
<6> DDR_A_CKE0 DDR_A_CKE1 <6>
2
CKE0 CKE1
75 76
2
VDD1 VDD2 DDR_A_MA15
77 NC1 A15 78
D
3 1 DIMM_DRAMRST# DDR_A_BS2 79 80 DDR_A_MA14
<5> SM_DRAMRST# DIMM_DRAMRST# <11> <6> DDR_A_BS2 BA2 A14
Q2 81 82
BSS138LT1G_SOT23-3 DDR_A_MA12 VDD3 VDD4 DDR_A_MA11
83 A12/BC# A11 84
C DDR_A_MA9 DDR_A_MA7 C
85 86
G
C617
2
A9 A7
87 VDD5 VDD6 88
RST_GATE 1 2 DDR_A_MA8 89 90 DDR_A_MA6
<18> RST_GATE DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
93 VDD7 VDD8 94
0.047U_0402_16V7K DDR_A_MA3 DDR_A_MA2
95 A3 A2 96
DDR_A_MA1 97 98 DDR_A_MA0
A1 A0
99 100
DDR_A_CLK0 VDD9 VDD10 DDR_A_CLK1
101 102 DDR_A_CLK1 <6>
<6> DDR_A_CLK0 DDR_A_CLK0# CK0 CK1 DDR_A_CLK1#
103 104 DDR_A_CLK1# <6>
<6> DDR_A_CLK0# CK0# CK1#
105 106
DDR_A_MA10 VDD11 VDD12 DDR_A_BS1
107 108 DDR_A_BS1 <6>
DDR_A_BS0 A10/AP BA1 DDR_A_RAS#
<6> DDR_A_BS0 109 110 DDR_A_RAS# <6>
BA0 RAS#
111 112
DDR_A_WE# VDD13 VDD14 DDR_A_CS0#
113 114 DDR_A_CS0# <6>
<6> DDR_A_WE# DDR_A_CAS# WE# S0# DDR_A_ODT0
<6> DDR_A_CAS# 115 116 DDR_A_ODT0 <6>
CAS# ODT0
117 118
DDR_A_MA13 VDD15 VDD16 DDR_A_ODT1 +DIMM_VREFCA
119 120 DDR_A_ODT1 <6>
DDR_A_CS1# A13 ODT1
121 122
<6> DDR_A_CS1# S1# NC2
123 124
VDD17 VDD18 DDR_VREF_CA_DIMMA R108 1
125 126 2 0_0402_5%
NCTEST VREF_CA
127 128
DDR_A_D32 VSS27 VSS28 DDR_A_D36
129 130
131 132
DQ33 DQ37
Layout Note: DDR_A_DQS#4
133
VSS29 VSS30
134
DDR_A_DM4
135 136
Place near JDIMM1 DDR_A_DQS4 DQS#4 DM4
137 138 1 1
DQS4 VSS31 DDR_A_D38 C135 C136
139 140
DDR_A_D34 VSS32 DQ38 DDR_A_D39
141 142
DDR_A_D35 DQ34 DQ39 2.2U_0603_6.3V4Z 0.1U_0402_16V4Z
Layout Note: Place these 4 Caps near Command 143
DQ35 VSS33
144
DDR_A_D44 2 2
145 146
and Control signals of DIMMA DDR_A_D40 VSS34 DQ44 DDR_A_D45
147 148
B DDR_A_D41 DQ40 DQ45 B
149 150
+1.5V DQ41 VSS35 DDR_A_DQS#5
151 152
DDR_A_DM5 VSS36 DQS#5 DDR_A_DQS5
153 154
10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z DM5 DQS5
155 156
157 158
159 160
DQ43 DQ47
1
1 1 1 1 1 1 1 1 1 1 161 162
C137 C138 C139 C140 C141 C142 C143 C144 C145 C146 + @ C147 DDR_A_D48 VSS39 VSS40 DDR_A_D52
163 164
330U_2.5V_M_R15 DDR_A_D49 DQ48 DQ52 DDR_A_D53
165 166
DQ49 DQ53
167 168
2
2 2 2 2 2 2 2 2 2 2 DDR_A_DQS#6 VSS41 VSS42 DDR_A_DM6

169 170
DDR_A_DQS6 DQS#6 DM6
171 172
DQS6 VSS43 DDR_A_D54
173 174
175 176
10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z DDR_A_D51 DQ50 DQ55
177 178
DQ51 VSS45 DDR_A_D60
179 180
181 182
DDR_A_D57 DQ56 DQ61
183 184
DQ57 VSS47 DDR_A_DQS#7
185 186
DDR_A_DM7 VSS48 DQS#7 DDR_A_DQS7
187 188
DM7 DQS7
189 190
Layout Note: DDR_A_D59
191
DQ58 DQ62
192
DDR_A_D63
193 194
Place near JDIMM1.203 & JDIMM1.204 DQ59 DQ63
195 196
R109 1 VSS51 VSS52 PM_EXTTS#0_1
2 10K_0402_5% 197 198 PM_EXTTS#0_1 <5,11>
SA0 EVENT# D_CK_SDATA
+3VS 199 200 D_CK_SDATA <11,12>
VDDSPD SDA D_CK_SCLK
201 202 D_CK_SCLK <11,12>
SA1 SCL
1 1 203 204 +0.75VS
VTT1 VTT2
1
+0.75VS C148 C149

2.2U_0603_6.3V4Z R110 205 206
1U_0402_6.3V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z G1 G2
2 2 10K_0402_5% FOX_AS0A626-U8RN-7F
A
DDR3 SO-DIMM A A
2
1 1 1 1 1
C154
Change to Reverse Type
C150
2
C151
2
C152
2
C153
2 2
10U_0805_6.3V6M 8mm High
1U_0402_6.3V4Z 1U_0402_6.3V4Z
DDRIII-SODIMM SLOT1
Custom NEW70 M/B LA-5892P Schematic 1.0
5 4 3 2 1
5 4 3 2 1
+1.5V
+1.5V
2008/9/8 #400755 JDIMM2
+DIMM_VREFDQB 1 2
<6> DDR_B_DQS#[0..7] Calpella Clarksfield VREF_DQ VSS1 DDR_B_D4
3 4
DDR3 SO-DIMM DDR_B_D0 5
VSS2 DQ4
6 DDR_B_D5
<6> DDR_B_D[0..63] DQ0 DQ5
VREFDQ Platform DDR_B_D1 7 8
DQ1 VSS3 DDR_B_DQS#0
<6> DDR_B_DM[0..7] Design Guide Change Details 9 VSS4 DQS#0 10
DDR_B_DM0 11 12 DDR_B_DQS0
DM0 DQS0
<6> DDR_B_DQS[0..7] 13 VSS5 VSS6 14
DDR_B_D2 15 16 DDR_B_D6
DDR_B_D3 DQ2 DQ6 DDR_B_D7
<6> DDR_B_MA[0..15] 17 DQ3 DQ7 18
19 20
DDR_B_D8 VSS7 VSS8 DDR_B_D12
21 22
D DDR_B_D9 DQ8 DQ12 DDR_B_D13 D
23 DQ9 DQ13 24
M1 Circuit 25
VSS9 VSS10
26
DDR_B_DQS#1 27 28 DDR_B_DM1
DDR_B_DQS1 DQS#1 DM1 DIMM_DRAMRST#
+DIMM_VREFDQB 29 DQS1 RESET# 30 DIMM_DRAMRST# <10>
DIMMB VREFDQ M1 Circuit 31
VSS11 VSS12
32
+1.5V DDR_B_D11 DQ10 DQ14 DDR_B_D15
35 36
DQ11 DQ15
1 1 37 38
C155 C156 DDR_B_D16 VSS13 VSS14 DDR_B_D20
39 40
DQ16 DQ20
1
R113 +DIMM_VREFDQB 2.2U_0805_16V4Z DQ17 DQ21
43 44
2 2 DDR_B_DQS#2 VSS15 VSS16 DDR_B_DM2
45 DQS#2 DM2 46
1K_0402_1% DDR_B_DQS2 47 48
DQS2 VSS17 DDR_B_D22
49 50
2
0.1U_0402_16V4Z DDR_B_D18 VSS18 DQ22 DDR_B_D23

51 DQ18 DQ23 52
DDR_B_D19 53 54
DQ19 VSS19
1
55 56 DDR_B_D28
R114 DDR_B_D24 VSS20 DQ28 DDR_B_D29
57 DQ24 DQ29 58
DDR_B_D25 59 60
1K_0402_1% DQ25 VSS21 DDR_B_DQS#3
61 VSS22 DQS#3 62
DDR_B_DM3 63 64 DDR_B_DQS3
2
DM3 DQS3
65 VSS23 VSS24 66
69 DQ27 DQ31 70
71 VSS25 VSS26 72
DDR_B_CKE0 73 74 DDR_B_CKE1
<6> DDR_B_CKE0 CKE0 CKE1 DDR_B_CKE1 <6>
75 VDD1 VDD2 76
77 78 DDR_B_MA15
DDR_B_BS2 NC1 A15 DDR_B_MA14
<6> DDR_B_BS2 79 BA2 A14 80
C C
81 VDD3 VDD4 82
DDR_B_MA12 83 84 DDR_B_MA11
DDR_B_MA9 A12/BC# A11 DDR_B_MA7
85 A9 A7 86
87 VDD5 VDD6 88
DDR_B_MA5 A8 A6 DDR_B_MA4
91 A5 A4 92
93 VDD7 VDD8 94
DDR_B_MA1 A3 A2 DDR_B_MA0
97 98
A1 A0
99 100
DDR_B_CLK0 VDD9 VDD10 DDR_B_CLK1
101 102 DDR_B_CLK1 <6>
<6> DDR_B_CLK0 DDR_B_CLK0# CK0 CK1 DDR_B_CLK1#
103 104 DDR_B_CLK1# <6>
<6> DDR_B_CLK0# CK0# CK1#
105 106
DDR_B_MA10 VDD11 VDD12 DDR_B_BS1
107 108 DDR_B_BS1 <6>
DDR_B_BS0 A10/AP BA1 DDR_B_RAS#
<6> DDR_B_BS0 109 110 DDR_B_RAS# <6>
BA0 RAS#
111 112
DDR_B_WE# VDD13 VDD14 DDR_B_CS0#
113 114 DDR_B_CS0# <6>
<6> DDR_B_WE# DDR_B_CAS# WE# S0# DDR_B_ODT0
<6> DDR_B_CAS# 115 116 DDR_B_ODT0 <6>
CAS# ODT0
Layout Note: DDR_B_MA13
117
VDD15 VDD16
118
DDR_B_ODT1
119 120 DDR_B_ODT1 <6>
Place near JDIMM2 DDR_B_CS1# A13 ODT1 +DIMM_VREFCA
121 122
<6> DDR_B_CS1# S1# NC2
123 124
VDD17 VDD18 DDR_VREF_CA_DIMMB R115 1
Layout Note: Place these 4 Caps near Command 125 126 2 0_0402_5%
NCTEST VREF_CA
127 128
and Control signals of DIMMB DDR_B_D32 129
VSS27 VSS28
130 DDR_B_D36
131 132
+1.5V DQ33 DQ37
133 134
DDR_B_DQS#4 VSS29 VSS30 DDR_B_DM4
135 136
10U_0805_6.3V6M 10U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z DDR_B_DQS4 DQS#4 DM4
137 138 1 1
DQS4 VSS31 DDR_B_D38 C157 C158
139 140
DDR_B_D34 VSS32 DQ38 DDR_B_D39
141 142
DQ34 DQ39
1
1 1 1 1 1 1 1 1 1 1 DDR_B_D35 143 144 2.2U_0603_6.3V4Z 0.1U_0402_16V4Z

DQ35 VSS33 2 2
C161
B C159 C160 C162 C163 C164 C165 C166 C167 C168 + C169 145 146 DDR_B_D44 B
330U_2.5V_M_R15 DDR_B_D40 VSS34 DQ44 DDR_B_D45
147 148
DDR_B_D41 DQ40 DQ45
149 150
2
10U_0805_6.3V6M 2 2 2 2 2 2 2 2 2 2 DQ41 VSS35 DDR_B_DQS#5

151 152
DDR_B_DM5 VSS36 DQS#5 DDR_B_DQS5
153 154
DM5 DQS5
155 156
157 158
10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z DDR_B_D43 DQ42 DQ46 DDR_B_D47
159 160
DQ43 DQ47
161 162
163 164
165 166
DQ49 DQ53
167 168
DDR_B_DQS#6 VSS41 VSS42 DDR_B_DM6
169 170
DDR_B_DQS6 DQS#6 DM6
Layout Note: 171
DQS6 VSS43
172
DDR_B_D54
173 174
Place near JDIMM2.203 & JDIMM2.204 DDR_B_D50 175
VSS44 DQ54
176 DDR_B_D55
DDR_B_D51 DQ50 DQ55
177 178
DQ51 VSS45 DDR_B_D60
179 180
DDR_B_D56 VSS46 DQ60 DDR_B_D61
181 182
DDR_B_D57 DQ56 DQ61
183 184
+0.75VS DQ57 VSS47 DDR_B_DQS#7
185 186
DDR_B_DM7 VSS48 DQS#7 DDR_B_DQS7
187 188
1U_0402_6.3V4Z DM7 DQS7
189 190
191 192
193 194
DQ59 DQ63
195 196
VSS51 VSS52 PM_EXTTS#0_1
1 1 1 1 1 C174 R116 1 2 10K_0402_5% 197
SA0 EVENT#
198 PM_EXTTS#0_1 <5,10>
C170 C171 C172 C173 199 200 D_CK_SDATA
+3VS VDDSPD SDA D_CK_SCLK D_CK_SDATA <10,12>
1 2 201
SA1 SCL
202 D_CK_SCLK <10,12>
10U_0805_6.3V6M R117 10K_0402_5% 203 204 +0.75VS
2 2 2 2 2 VTT1 VTT2
1 1
1U_0402_6.3V4Z C175 C176 205 206
A
2.2U_0603_6.3V4Z 0.1U_0402_16V4Z
G1
FOX_AS0A626-U4RN-7F
G2
DDR3 SO-DIMM B A
1U_0402_6.3V4Z 1U_0402_6.3V4Z 2 2 CONN@ Reverse Type

4mm High
DDRIII-SODIMM SLOT2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NEW70 M/B LA-5892P Schematic 1.0
5 4 3 2 1
A B C D E F G H
+CLK_3VS
+CLK_1.05VS
+1.05VS_VTT L1 2 1 0.1U_0402_16V4Z 47P_0402_50V8J +3VS L2 2 1 0.1U_0402_16V4Z 47P_0402_50V8J

FBMA-L11-201209-221LMA30T_0805 FBMA-L11-201209-221LMA30T_0805
1 1 1 1 1 1 1 1 1 1 1 1
C178 C179 C180 @ @ C181 C182 C183 C184 @ @
C177 C35 C36 C30 C31
10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z
2 2 2 2 2 2 2 2 2 2 2 2
1 1
0.1U_0402_16V4Z 47P_0402_50V8J 10U_0805_10V4Z 0.1U_0402_16V4Z 47P_0402_50V8J
20090915 Add for 3G team 20090915 Add for 3G team

L3 2 1
FBMA-L11-201209-221LMA30T_0805
@ +CLK_1.5VS
+1.5VS L4 2 1 0.1U_0402_16V4Z 47P_0402_50V8J 47P_0402_50V8J

FBMA-L11-201209-221LMA30T_0805
1 1 1 1 1 1 1 1
C186 C187 C188 C189 @ @ @
C185 C32 C33 C34
10U_0805_10V4Z 10U_0805_10V4Z
2 2 2 2 2 2 2 2
0.1U_0402_16V4Z 0.1U_0402_16V4Z 47P_0402_50V8J
20090915 Add for 3G team
2 +CLK_3VS 2
+CLK_3VS
+CLK_1.5VS Clock Generator

U3
1 32 D_CK_SCLK
VDD_USB_48 SCL D_CK_SCLK <10,11>
2 31 D_CK_SDATA
VSS_48M SDA D_CK_SDATA <10,11>
CLK_BUF_DREF_96M 3 30 REF_0/CPU_SEL R118 1 2 33_0402_5%
<14> CLK_BUF_DREF_96M DOT_96 REF_0/CPU_SEL CLK_BUF_ICH_14M <14>
CLK_BUF_DREF_96M# 4 29
<14> CLK_BUF_DREF_96M# DOT_96# VDD_REF
5 28 CLK_XTAL_IN
VDD_27 XTAL_IN CLK_XTAL_OUT
6 27MHZ XTAL_OUT 27
7 27MHZ_SS VSS_REF 26
8 25 CK505_PW RGD
USB_48 CKPWRGD/PD#
9 VSS_27M VDD_CPU 24
CLK_BUF_PCIE_SATA 10 23 CLK_BUF_CPU_BCLK
<14> CLK_BUF_PCIE_SATA SATA CPU_0 CLK_BUF_CPU_BCLK <14>
CLK_BUF_PCIE_SATA# 11 22 CLK_BUF_CPU_BCLK#
<14> CLK_BUF_PCIE_SATA# SATA# CPU_0# CLK_BUF_CPU_BCLK# <14>
12 VSS_SRC VSS_CPU 21
CLK_BUF_CPU_DMI 13 20
<14> CLK_BUF_CPU_DMI SRC_1 CPU_1
CLK_BUF_CPU_DMI# 14 19
<14> CLK_BUF_CPU_DMI# SRC_1# CPU_1#
+CLK_1.05VS 15 VDD_SRC_IO VDD_CPU_IO 18 +CLK_1.05VS
H_STP_CPU# 16 17 +CLK_1.5VS
CPU_STOP# VDD_SRC
33 TGND
IDT SA00003HR00
SLG8SP587VTR_QFN32_5X5
3 IDT: 9LRS3199AKLFT, SA000030P00 3
SILEGO: SLG8SP587V(WF), SA00002XY10

+3VS
Low Power:
IDT: 9LVS3199AKLFT, SA00003HR00
2
+3VS
Silego Have Internal Pull-Up Realtek: RTM890N-631-GRT, SA00003HQ00 R120
10K_0402_5%
R122
R121 1 2 10K_0402_5% H_STP_CPU# +3VS 0_0402_5%
1
R123 CK505_PW RGD 1 @ 2 VGATE <15,45>
4.7K_0402_5%
D
2
1
G
1 2 +3VS
2 CLK_ENABLE# <45>
<14,21,26> PCH_SMBDATA 1 3 D_CK_SDATA G
S Q5
D
3
IDT Have Internal Pull-Down Q4 2N7002_SOT23
2N7002_SOT23
R124 1 2 10K_0402_5% REF_0/CPU_SEL +3VS

R125
4.7K_0402_5% C190
2
CLK_XTAL_IN
G
1 2 +3VS 2 1
Y1 Change to SJ100009R00
1
D_CK_SCLK 27P_0402_50V8J 20091117
PIN 30 CPU_0 CPU_1 <14,21,26> PCH_SMBCLK 1 3
Y1
D
Q6 14.31818MHZ 20PF 7A14300003 C191

0 (Default) 133MHz 133MHz 2N7002_SOT23 27P_0402_50V8J
2
4 4
Change to 5x3.2 CLK_XTAL_OUT 2 1
1 100MHz 100MHz

Clock Generator (CK505)
Custom 1.0
A B C D E F G H
5 4 3 2 1
+RTCVCC 1 2 PCH_RTCRST#
R126 C192
20K_0402_1% RC Delay 18~25mS 18P_0402_50V8J +RTCBATT
2 1 PCH_RTCX1
X1 Change to mini type
close to RAM door
2
X1 20091102
1
1 2 3 4 R129
R127 @ NC OSC R128 1K_0402_5%
10K_0603_5% 2 1
C193 NC OSC 10M_0402_5% U4A
1 1
1U_0603_10V6K 32.768KHZ_12.5PF_Q13MC14610002
REV1.0
2
1 2 C195 B13 D33 LPC_AD0
RTCX1 FWH0 / LAD0 LPC_AD0 <30>
D 2 1 PCH_RTCX2 D13 B33 LPC_AD1 D
RTCX2 FWH1 / LAD1 LPC_AD1 <30>
C32 LPC_AD2 D1
FWH2 / LAD2 LPC_AD2 <30>
18P_0402_50V8J A32 LPC_AD3 BAS40-04_SOT23-3
FWH3 / LAD3 LPC_AD3 <30>
+RTCVCC 1 2 PCH_SRTCRST# PCH_RTCRST# C14 +RTCVCC
R132 RTCRST# LPC_FRAME#
C34 LPC_FRAME# <30>
2
20K_0402_1% +RTCVCC PCH_SRTCRST# FWH4 / LFRAME#
RC Delay 18~25mS D17 SRTCRST# +CHGRTC
A34 1
RTC
LPC
R133 1 LDRQ0#
close to RAM door 2 1M_0402_5% SM_INTRUDER# A16 INTRUDER# LDRQ1# / GPIO23 F34 C196
1 2 modify to 330K
R130 @ R134 1 2 330K_0402_1% PCH_INTVRMEN A14 AB9 SERIRQ 0.1U_0402_16V4Z
INTVRMEN SERIRQ SERIRQ <30> 2
10K_0603_5% INTVRMEN - Integrated SUS
C194
1U_0603_10V6K
1.1V VRM Enable High - Enable Internal VRs
1 2 <33> HDA_BITCLK_AUDIO 1 2 HDA_BITCLK_PCH A30
R135 33_0402_5% HDA_BCLK SATA_DTX_C_PRX_N0
SATA0RXN AK7 SATA_DTX_C_PRX_N0 <25>
<33> HDA_SYNC_AUDIO 1 2 HDA_SYNC_PCH D29 AK6 SATA_DTX_C_PRX_P0 SATA_DTX_C_PRX_P0 <25> SATA for HDD1
R131 33_0402_5% HDA_SYNC SATA0RXP SATA_PTX_DRX_N0
HDA for AUDIO PCH_SPKR SATA0TXN AK11
SATA_PTX_DRX_P0 SATA_PTX_DRX_N0 <25>
<33> PCH_SPKR P1 SPKR SATA0TXP AK9 SATA_PTX_DRX_P0 <25>
1 2 HDA_RST_PCH# C30
<33> HDA_RST_AUDIO# HDA_RST#
R136 33_0402_5% AH6 SATA_DTX_C_PRX_N1 SATA_DTX_C_PRX_N1 <25>
SATA1RXN SATA_DTX_C_PRX_P1
+3VS SATA1RXP AH5 SATA_DTX_C_PRX_P1 <25> SATA for ODD
R137 <33> HDA_SDIN0 G30 AH9 SATA_PTX_DRX_N1
1K_0402_5% HDA_SDIN0 SATA1TXN SATA_PTX_DRX_P1 SATA_PTX_DRX_N1 <25>
SATA1TXP AH8 SATA_PTX_DRX_P1 <25>
1 @ 2 PCH_SPKR F30 HDA_SDIN1
Have internal PD SATA2RXN AF11
E32 AF9 2/10 SATA2, SATA3 not support on HM55
IHDA
SERIRQ HDA_SDIN2 SATA2RXP
1 2 SATA2TXN AF7
R138 F32 AF6
C 10K_0402_5% HDA_SDIN3 SATA2TXP C
SATA3RXN AH3
<33> HDA_SDOUT_AUDIO 1 2 HDA_SDOUT_PCH B29 AH1
R139 33_0402_5% HDA_SDO SATA3RXP
SATA3TXN AF3
SATA3TXP AF1
PCH_GPIO33# H32
SATA
HDA_DOCK_EN# / GPIO33
SATA4RXN AD9
If GPIO33 pull down, ME will not working. GPIO33 can not pull down J30 HDA_DOCK_RST# / GPIO13 SATA4RXP AD8
For factory update ME, pull down resistor pull (manufacturing environments) SATA4TXN AD6
SATA4TXP AD5
under door.
PCH_GPIO33# <21> PCH_JTAG_TCK PCH_JTAG_TCK M3 AD3
JTAG_TCK SATA5RXN
SATA5RXP AD1
D <21> PCH_JTAG_TMS K3 JTAG_TMS SATA5TXN AB3
1
SATA5TXP AB1
<30> ME_OVERRIDE 2 <21> PCH_JTAG_TDI K1 JTAG_TDI
G Q7 +1.05VS
JTAG
1
S <21> PCH_JTAG_TDO J2 AF16

3
R140 2N7002_SOT23 JTAG_TDO SATAICOMPO

100K_0402_5% <21> PCH_JTAG_RST# J4 AF15 SATA_COMP R141 1 2 37.4_0402_1%
TRST# SATAICOMPI
2
PCH_SPI_CLK_1 R142 1 2 0_0402_5% PCH_SPI_CLK BA2 +3VS

SPI_CLK
PCH_SPI_CS0# R143 1 2 15_0402_5% PCH_SPI_CS0#_R AV3 R144 1 2 10K_0402_5%
SPI_CS0#
GPIO33 has a weak internal pull-up PAD @ PCH_SPI_CS1# AY3 T3 SATA_LED#
T6 SPI_CS1# SATALED# SATA_LED# <32> +3VS
B NOTE: Asserting the GPIO33 low on the B
rising edge of PWROK will also halt Intel PCH_SPI_MOSI_1 R145 1 2 15_0402_5% PCH_SPI_MOSI AY1 Y9 1 2
Management Engine after chipset bringup SPI_MOSI SATA0GP / GPIO21 R146 @ 10K_0402_5%
SPI
and disable runtime Intel Management PCH_SPI_MISO_1 R147 1 2 33_0402_5% PCH_SPI_MISO AV1 V1 1 2
SPI_MISO SATA1GP / GPIO19 R148 @ 10K_0402_5%
Engine features. This is a debug mode and
1
must not be asserted after manfacturing/ IBEXPEAK-M_FCBGA107
PCH_GPIO21 <21>
debug. <BOM Structure> R149 R150
PCH_GPIO19 <21>
10K_0402_5% 10K_0402_5%
+3VS
GPIO21 Project
2
PCH_SPI_MOSI R157 1 @ 2 1K_0402_5%
0 NEW70/90
enable iTPM: SPI_MOSI High 1 NEW71/91
+1.05VS
PCH_JTAG_TCK R158 1 2 4.7K_0402_5%
+3VALW CRB 1.0 Change to 4.7K
+3VS
PCH_JTAG_TMS R151 1 @ 2 51_0402_5% U18 @ @
R478 1 2 200_0402_1% PCH_SPI_CS0# 1 8 PCH_SPI_CLK_1 1 2 1 2
R479 1 CS# VCC
2 100_0402_5% +3VS R155 1 2 3.3K_0402_5% SPI_W P1# 3 WP# SCLK 6 PCH_SPI_CLK_1 R340 10_0402_5% C557 10P_0402_50V8J
R156 1 2 3.3K_0402_5% SPI_HOLD1# 7 5 PCH_SPI_MOSI_1 For 3G team
PCH_JTAG_TDO R152 1 @ HOLD# SI Close to U5 20090915
2 51_0402_5% 4 GND SO 2 PCH_SPI_MISO_1
R480 1 2 200_0402_1%
A
R481 1 2 100_0402_5% 20090923 Update MX25L1605DM2I-12G SOP 8P A
SA000021A00
PCH_JTAG_TDI R153 1 @ 2 51_0402_5% 2008 Intel MOW36/MOW50 SPI ROM Footprint 200mil
R482 1 2 200_0402_1%
R483 1 2 100_0402_5% TDO:
PCH_JTAG_RST# R154 1 @
Reserved on ES1 Sample
2 51_0402_5%
R484 1 2 20K_0402_5% Mount R516, R517 on ES2 Sample Security Classification Compal Secret Data Compal Electronics, Inc.
R485 1 2 10K_0402_5% 2009/08/01 2010/08/01 Title
MP mount R689, R690, PCH (1/9) SATA,HDA,SPI, LPC
R691, R692 and remove THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
others AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
5 4 3 2 1
5 4 3 2 1
U4B 1. Connect Directly

REV1.0 EXPRESS CARD, MINI1, MINI2
PCIE_DTX_C_PRX_N1 BG30 B9 EC_LID_OUT# 2. Level Shift1, Pull-Up to +3VS
<27> PCIE_DTX_C_PRX_N1 PERN1 SMBALERT# / GPIO11 EC_LID_OUT# <30>
PCIE_DTX_C_PRX_P1 BJ30
<27> PCIE_DTX_C_PRX_P1 PERP1 CLOCK GEN, DIMM1, DIMM2
For PCIE LAN <27> PCIE_PTX_C_DRX_N1 C197 2 1 0.1U_0402_16V7K PCIE_PTX_DRX_N1 BF29 H14 PCH_SMBCLK PCH_SMBCLK <12,21,26>
C198 0.1U_0402_16V7K PCIE_PTX_DRX_P1 PETN1 SMBCLK
<27> PCIE_PTX_C_DRX_P1 2 1 BH29 PETP1 PCH_SMBDATA
3. Level Shift2, Pull-Up to +3VS
SMBDATA C8 PCH_SMBDATA <12,21,26>
<26> PCIE_DTX_C_PRX_N2
PCIE_DTX_C_PRX_N2 AW30 LAN
PCIE_DTX_C_PRX_P2 BA30 PERN2
<26> PCIE_DTX_C_PRX_P2
C199 2 0.1U_0402_16V7K PCIE_PTX_DRX_N2 BC30 PERP2 PCH_GPIO60
4. Level Shift3, Pull-Up to +3VS
For Wireless LAN <26> PCIE_PTX_C_DRX_N2
C200 2
1
0.1U_0402_16V7K PCIE_PTX_DRX_P2 BD30 PETN2 SML0ALERT# / GPIO60 J14
CPU & PCH XDP
<26> PCIE_PTX_C_DRX_P2 1 PETP2
D
SML0CLK C6 D
AU30
SMBus
PERN3
AT30 PERP3 SML0DATA G8
AU32 PETN3
AV32 PETP3
M14 PCH_GPIO74
SML1ALERT# / GPIO74
BA32 PERN4
BB32 E10 PCH_SML1CLK
PERP4 SML1CLK / GPIO58
BD32 PETN4
BE32 G12 PCH_SML1DAT
PETP4 SML1DATA / GPIO75
PCI-E*
BF33 PERN5
BH33 T13 +3VALW
PERP5 CL_CLK1
Controller
BG32 PETN5
BJ32 PETP5 CL_DATA1 T11
2
Link
BA34 T9 R159
PERN6 CL_RST1# 10K_0402_5%
AW34 PERP6
BC34 PETN6
BD34
1
PETP6 PEG_CLKREQ#
PEG_A_CLKRQ# / GPIO47 H1
AT34 PERN7
2/10 PCIE7, PCIE8 not support on HM55 AU34 20090915 Add
PERP7
AU36 PETN7 CLKOUT_PEG_A_N AD43
AV36 PETP7 CLKOUT_PEG_A_P AD45
BG34 PERN8 CLKOUT_DMI_N AN4 CLK_CPU_DMI# <5>
PEG
BJ34 PERP8 CLKOUT_DMI_P AN2 CLK_CPU_DMI <5>
BG36 PETN8
C BJ36 C
PETP8
CLKOUT_DP_N / CLKOUT_BCLK1_N AT1 CLK_CPU_DP# <5>
CLKOUT_DP_P / CLKOUT_BCLK1_P AT3 CLK_CPU_DP <5>
<27> CLK_PCIE_LAN# AK48 CLKOUT_PCIE0N
For PCIE LAN <27> CLK_PCIE_LAN AK47 CLKOUT_PCIE0P
From CLK BUFFER

CLKIN_DMI_N AW24 CLK_BUF_CPU_DMI# <12>
R164 1 2 0_0402_5% PCH_GPIO73 P9 BA24
<27> LAN_CLKREQ# PCIECLKRQ0# / GPIO73 CLKIN_DMI_P CLK_BUF_CPU_DMI <12>
<26> CLK_PCIE_MINI1# AM43 CLKOUT_PCIE1N CLKIN_BCLK_N AP3 CLK_BUF_CPU_BCLK# <12>

For Wireless LAN <26> CLK_PCIE_MINI1 AM45 CLKOUT_PCIE1P CLKIN_BCLK_P AP1 CLK_BUF_CPU_BCLK <12>
R165 1 2 0_0402_5% PCH_GPIO18 U4
<26> MINI1_CLKREQ# PCIECLKRQ1# / GPIO18
<21> PCH_GPIO18 CLKIN_DOT_96N F18 CLK_BUF_DREF_96M# <12> 6/9 MOW23 Request add 25MHz crystal
E18 CLK_BUF_DREF_96M <12>
AM47
CLKIN_DOT_96P supporting Integrated Graphics
CLKOUT_PCIE2N
AM48 CLKOUT_PCIE2P
CLKIN_SATA_N / CKSSCD_N AH13 CLK_BUF_PCIE_SATA# <12>
PCH_GPIO20 N4 AH12
<21> PCH_GPIO20 PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P CLK_BUF_PCIE_SATA <12>
1 2 1 2
AH42 P41 R338 10_0402_5% C555 10P_0402_50V8J
CLKOUT_PCIE3N REFCLK14IN
AH41 CLKOUT_PCIE3P CLK_BUF_ICH_14M <12>
PCH_GPIO25 A8 J42
PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK CLK_PCI_FB <17>
C203
27P_0402_50V8J
AM51 AH51 XTAL25_IN 1 2
CLKOUT_PCIE4N XTAL25_IN XTAL25_OUT
AM53 CLKOUT_PCIE4P XTAL25_OUT AH53
1
B B
PCH_GPIO26 M9 AF38 XCLK_RCOMP R169 1 2 90.9_0402_1% +1.05VS R170 Y2
PCIECLKRQ4# / GPIO26 XCLK_RCOMP 1M_0402_5% 25MHZ_20PF_7A25000012
2
+3VS Change to 5x3.2
AJ50 T45 Project Port ID
2
CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64
AJ52 CLKOUT_PCIE5P 1 2
PCH_GPIO44 H6 P43 PROJECT_ID1 R171 1 2 10K_0402_5% C204

Clock Flex
PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65 27P_0402_50V8J

1 2
@ R172 10K_0402_5%
AK53 T42 PROJECT_ID0 @ R174 1 2 10K_0402_5%
CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66
AK51 CLKOUT_PEG_B_P 1 2
R175 10K_0402_5%
PCH_GPIO56 P13 N50 +3VS
+3VS PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67
2
IBEXPEAK-M_FCBGA107
PROJECT ID PCH_SML1CLK 6 1 EC_SMB_CK2 EC_SMB_CK2 <30>
MINI1_CLKREQ# R177 1 2 10K_0402_5% ID2 ID1 ID0
PCH_GPIO20 R178 1 2 10K_0402_5%
+3VALW
Board ID GPIO21 GPIO65 GPIO66 PROJECT 2N7002DW -T/R7_SOT363-6
Q9A
0 0 0 NEW70 +3VS
LOW HIGH Pull high +3VS at KB926 side
EC_LID_OUT# R179 1 2 10K_0402_5% 0 0 1 NEW80
PCH_SMBCLK R180 1 2 2.2K_0402_5%
5
PCH_SMBDATA R181 1 2 2.2K_0402_5% ID1 A & B C test 0 1 0 NEW90
GPIO65
A
+3VALW
PCH_GPIO60 R182 1 2 10K_0402_5% test 0 1 1 PCH_SML1DAT 3 4 EC_SMB_DA2 EC_SMB_DA2 <30> A
PCH_SML1CLK R183 1 2 2.2K_0402_5% 2N7002DW -T/R7_SOT363-6

2009/09/23:Change to +3VALW PCH_SML1DAT R184 1 2 2.2K_0402_5%
1 0 0 Q9B
PCH_GPIO26 R166 1 2 10K_0402_5%
PCH_GPIO74 R185 1 2 10K_0402_5%
PCH_GPIO25 R186 1 2 10K_0402_5%

2009/08/13: Change back to +3VALW Issued Date 2009/08/01 Deciphered Date 2010/08/01 Title
PCH_GPIO44 R187 1 2 10K_0402_5%
PCH_GPIO56 R188 1 2 10K_0402_5% THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (2/9) PCIE, SMBUS, CLK
PCH_GPIO73 R189 1 2 10K_0402_5% Size Document Number Rev
Custom 1.0
5 4 3 2 1
5 4 3 2 1
DMI_HTX_PRX_N[0..3]
<4> DMI_HTX_PRX_N[0..3]
DMI_HTX_PRX_P[0..3]
<4> DMI_HTX_PRX_P[0..3]
DMI_PTX_HRX_N[0..3]
<4> DMI_PTX_HRX_N[0..3]
DMI_PTX_HRX_P[0..3]
<4> DMI_PTX_HRX_P[0..3]
H_FDI_TXN[0..7]
<4> H_FDI_TXN[0..7]
D U4C D
H_FDI_TXP[0..7] H_FDI_TXN0
<4> H_FDI_TXP[0..7]
DMI_HTX_PRX_N0 BC24
REV1.0 FDI_RXN0 BA18
BH17 H_FDI_TXN1
DMI_HTX_PRX_N1 BJ22 DMI0RXN FDI_RXN1 H_FDI_TXN2
DMI1RXN FDI_RXN2 BD16
DMI_HTX_PRX_N2 AW20 BJ16 H_FDI_TXN3
DMI_HTX_PRX_N3 BJ20 DMI2RXN FDI_RXN3 H_FDI_TXN4
DMI3RXN FDI_RXN4 BA16
+3VS BE14 H_FDI_TXN5
DMI_HTX_PRX_P0 FDI_RXN5 H_FDI_TXN6
BD24 DMI0RXP FDI_RXN6 BA14
DMI_HTX_PRX_P1 BG22 BC12 H_FDI_TXN7
DMI_HTX_PRX_P2 DMI1RXP FDI_RXN7
BA20 DMI2RXP
1 2 PM_CLKRUN# DMI_HTX_PRX_P3 BG20 BB18 H_FDI_TXP0
R190 8.2K_0402_5% DMI3RXP FDI_RXP0 H_FDI_TXP1
FDI_RXP1 BF17
DMI_PTX_HRX_N0 BE22 BC16 H_FDI_TXP2
DMI_PTX_HRX_N1 DMI0TXN FDI_RXP2 H_FDI_TXP3
BF21 DMI1TXN FDI_RXP3 BG16
DMI_PTX_HRX_N2 BD20 AW16 H_FDI_TXP4
DMI_PTX_HRX_N3 DMI2TXN FDI_RXP4 H_FDI_TXP5
BE18 DMI3TXN FDI_RXP5 BD14
BB14 H_FDI_TXP6
DMI_PTX_HRX_P0 FDI_RXP6 H_FDI_TXP7
BD22 DMI0TXP FDI_RXP7 BD12
DMI_PTX_HRX_P1 BH21
+3VALW DMI_PTX_HRX_P2 DMI1TXP
BC20 DMI2TXP
DMI_PTX_HRX_P3 BD18 BJ14 H_FDI_INT <4>
+1.05VS DMI3TXP FDI_INT
DMI
FDI
1 2 SUS_PW R_ACK BF13 H_FDI_FSYNC0 <4>
R191 10K_0402_5% R192 FDI_FSYNC0
BH25 DMI_ZCOMP
1 2 PCH_GPIO72 49.9_0402_1% BH13 H_FDI_FSYNC1 <4>
R193 8.2K_0402_5% DMI_COMP FDI_FSYNC1
1 2 BF25 DMI_IRCOMP
1 2 EC_SW I# BJ12 H_FDI_LSYNC0 <4>
R194 10K_0402_5% FDI_LSYNC0
1 2 PCH_PCIE_W AKE# R195 Change to 10K for WW37 BG14
20090916 FDI_LSYNC1 H_FDI_LSYNC1 <4>
C R195 10K_0402_5% C
1 @ 2 PM_SLP_LAN#
R196 10K_0402_5%
XDP_DBRESET# T6 J12 PCH_PCIE_W AKE#

<5,21> XDP_DBRESET# SYS_RESET# WAKE# PCH_PCIE_W AKE# <26,27>
SYS_PW ROK R197 2 1 0_0402_5% SYS_PW ROK_R M6 Y1 PM_CLKRUN#

SYS_PWROK CLKRUN# / GPIO32 PM_CLKRUN# <30>
VGATE R198 2 @ 1 0_0402_5%
System Power Management

SYS_PW ROK B17 PWROK
K5 P8 PCH_GPIO61 @ PAD
MEPWROK SUS_STAT# / GPIO61 T7
LAN_RST# A10 LAN_RST# SUSCLK / GPIO62 F3 PCH_SUSCLK <30> 32.768KHZ ouput for remove EC crystal
20091103
<5> PM_DRAM_PW RGD D9 DRAMPWROK SLP_S5# / GPIO63 E4 PM_SLP_S5# <30>
PCH_RSMRST# C16 H7 PM_SLP_S4# <30>

RSMRST# SLP_S4#
SUS_PW R_ACK M1 P12 PM_SLP_S3# <30>

B <30> SUS_PW R_ACK SUS_PWR_DN_ACK / GPIO30 SLP_S3# B
10/2 Intel suggestion change to 10K
PBTN_OUT# P5 K8 PM_SLP_M# @ PAD @
<5,21,30> PBTN_OUT# PWRBTN# SLP_M# T9
+3VALW 1 2 R200 2 1 0_0402_5%
R199 10K_0402_5% Q11
1 2 PCH_ACIN P7 N2 PM_SLP_DSW # @ PAD MMBT3906_SOT23-3
<30> EC_ACIN ACPRESENT / GPIO31 TP23 T10
D2 PCH_RSMRST# 1 3
C
EC_RSMRST# <30>
CH751H-40PT_SOD323-2
E
PCH_GPIO72 A6 BJ10
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC <5>
B
2
R201 1 2 +3VALW
EC_SW I# F14 F6 PM_SLP_LAN# 10K_0402_5% R202 4.7K_0402_5%
<30> EC_SW I# RI# SLP_LAN# / GPIO29
D3A
2
IBEXPEAK-M_FCBGA107 1
<BOM Structure> 6
R203 2 @ 1 0_0402_5% 2
+3VS BAV99DW -7_SOT363
D3B
5
U6 4
2 EC_PW ROK 3
P
B EC_PW ROK <30>

SYS_PW ROK 4 5
<21> SYS_PW ROK Y
1
1 VGATE
A VGATE <12,45>
G
BAV99DW -7_SOT363 R204

U6 change to SA00000OH00 NC7SZ08P5X_NL_SC70-5 2.2K_0402_5%
3
2
A A
SYS_PW ROK 1 2
R205 10K_0402_5%
EC_PW ROK 1
R206
2
10K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
LAN_RST# 1
R207
2
10K_0402_5%
PCH (3/9) DMI, FDI, PM
No used Integrated LAN, Size Document Number Rev
Custom 1.0
connecting LAN_RST# to GND DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5 4 3 2 1
5 4 3 2 1
U4D
ENBKL ENBKL T48 BJ46

<30> ENBKL L_BKLTEN SDVO_TVCLKINN
<22> PCH_ENVDD T47 L_VDD_EN SDVO_TVCLKINP BG46
1
D <22> DPST_PW M Y48 L_BKLTCTL SDVO_STALLN BJ48 D
R209 BG48
PCH_LCD_CLK SDVO_STALLP
100K_0402_5% <22> PCH_LCD_CLK AB48 L_DDC_CLK
<22> PCH_LCD_DATA PCH_LCD_DATA Y45 BF45
L_DDC_DATA SDVO_INTN
BH45
2
LCTLA_CLK SDVO_INTP
AB46 L_CTRL_CLK
LCTLB_DATA V48 SDVO_CTRLDATA strap Pull High at Level Shift Page
L_CTRL_DATA
R210 1 2 LVDS_IBG AP39 T51
LVD_IBG SDVO_CTRLCLK SDVO_SCLK <24>
2.37K_0402_1% AP41 T53
LVD_VBG SDVO_CTRLDATA SDVO_SDATA <24>
R211 1 2 LVD_VREF AT43
0_0402_5% LVD_VREFH R212 1
AT42 LVD_VREFL DDPB_AUXN BG44 2 100K_0402_5%
DDPB_AUXP BJ44
AU38 PCH_DPB_HPD
DDPB_HPD PCH_DPB_HPD <24>
LVDS
PCH_TXCLK- AV53
<22> PCH_TXCLK- LVDSA_CLK#
PCH_TXCLK+ AV51 BD42 PCH_DPB_N0 C205 2 1HDMI@ 0.1U_0402_16V7K PCH_TMDS_D2# <24>
<22> PCH_TXCLK+ LVDSA_CLK DDPB_0N
BC42 PCH_DPB_P0 C206 2 1HDMI@ 0.1U_0402_16V7K PCH_TMDS_D2 <24> HDMI D2
PCH_TXOUT0- DDPB_0P PCH_DPB_N1 C207
<22> PCH_TXOUT0- BB47 LVDSA_DATA#0 DDPB_1N BJ42 2 1HDMI@ 0.1U_0402_16V7K PCH_TMDS_D1# <24>
PCH_TXOUT1- BA52 BG42 PCH_DPB_P1 C208 2 1HDMI@ 0.1U_0402_16V7K PCH_TMDS_D1 <24> HDMI D1
Digital Display Interface

<22> PCH_TXOUT1- LVDSA_DATA#1 DDPB_1P
PCH_TXOUT2- AY48 BB40 PCH_DPB_N2 C209 2 1HDMI@ 0.1U_0402_16V7K PCH_TMDS_D0# <24>
<22> PCH_TXOUT2- LVDSA_DATA#2 DDPB_2N
AV47 BA40 PCH_DPB_P2 C210 2 1HDMI@ 0.1U_0402_16V7K PCH_TMDS_D0 <24> HDMI D0
+3VS LVDSA_DATA#3 DDPB_2P PCH_DPB_N3 C211
DDPB_3N AW38 2 1HDMI@ 0.1U_0402_16V7K PCH_TMDS_CK# <24>
PCH_TXOUT0+ BB48 BA38 PCH_DPB_P3 C212 2 1HDMI@ 0.1U_0402_16V7K PCH_TMDS_CK <24> HDMI CLK
<22> PCH_TXOUT0+ LVDSA_DATA0 DDPB_3P
PCH_TXOUT1+ BA50
<22> PCH_TXOUT1+ LVDSA_DATA1
R215 1 2 10K_0402_5% LCTLA_CLK PCH_TXOUT2+ AY49
<22> PCH_TXOUT2+ LVDSA_DATA2
AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49
R216 1 2 10K_0402_5% LCTLB_DATA AB49
DDPC_CTRLDATA
C R217 1 2 2.2K_0402_5% PCH_CRT_CLK AP48 C
LVDSB_CLK#
AP47 LVDSB_CLK DDPC_AUXN BE44
R218 1 2 2.2K_0402_5% PCH_CRT_DATA BD44
DDPC_AUXP
AY53 LVDSB_DATA#0 DDPC_HPD AV40
AT49 LVDSB_DATA#1
AU52 LVDSB_DATA#2 DDPC_0N BE40
AT53 LVDSB_DATA#3 DDPC_0P BD40
DDPC_1N BF41
AY51 LVDSB_DATA0 DDPC_1P BH41
AT48 LVDSB_DATA1 DDPC_2N BD38
AU50 LVDSB_DATA2 DDPC_2P BC38
AT51 LVDSB_DATA3 DDPC_3N BB36
DDPC_3P BA36
1 2 PCH_CRT_B PCH_CRT_B AA52 U50

<23> PCH_CRT_B CRT_BLUE DDPD_CTRLCLK
R219 150_0402_1% PCH_CRT_G AB53 U52
<23> PCH_CRT_G CRT_GREEN DDPD_CTRLDATA
1 2 PCH_CRT_G PCH_CRT_R AD53
<23> PCH_CRT_R CRT_RED
R220 150_0402_1%
1 2 PCH_CRT_R BC46
R221 150_0402_1% PCH_CRT_CLK DDPD_AUXN
<23> PCH_CRT_CLK V51 CRT_DDC_CLK DDPD_AUXP BD46
PCH_CRT_DATA V53 AT38
<23> PCH_CRT_DATA CRT_DDC_DATA DDPD_HPD
DDPD_0N BJ40
<23> PCH_CRT_HSYNC Y53 CRT_HSYNC DDPD_0P BG40
<23> PCH_CRT_VSYNC Y51 CRT_VSYNC DDPD_1N BJ38
DDPD_1P BG38
CRT
DDPD_2N BF37
CRT_IREF AD48 BH37
B DAC_IREF DDPD_2P B
AB51 CRT_IRTN DDPD_3N BE36
REV1.0 DDPD_3P BD36
IBEXPEAK-M_FCBGA107
<BOM Structure>
1
R222
1K_0402_1%
2/3 Change to 1K_0402_0.5% from Intel

2
Suggestion. (EDS 1.0 is incorrect)
A A

PCH (4/9) LVDS, CRT, DPI
Custom 1.0
5 4 3 2 1
5 4 3 2 1
U4E
+3VS +3VS
H40
N34
AD0 REV1.0 NV_CE#0 AY9
BD1
AD1 NV_CE#1
C44 AD2 NV_CE#2 AP15
5
R229 1 2 8.2K_0402_5% PCI_PIRQA# A38 BD8 U7
R223 8.2K_0402_5% PCI_PIRQG# AD3 NV_CE#3 PLT_RST#
1 2 C36 2 B
P
R224 8.2K_0402_5% PCI_PIRQC# AD4
1 2 J34 AD5 NV_DQS0 AV9 Y 4 PLT_RST_BUF# <26>
R225 1 2 8.2K_0402_5% PCI_SERR# A40 BG8 1
AD6 NV_DQS1 A
1
D45 AD7
E36 AP7 NC7SZ08P5X_NL_SC70-5 R226
3
AD8 NV_DQ0 / NV_IO0 100K_0402_5%
H48 AD9 NV_DQ1 / NV_IO1 AP6
E40 AD10 NV_DQ2 / NV_IO2 AT6 <BOM Structure>
D C40 AT9 D
2
R230 8.2K_0402_5% PCI_PLOCK# AD11 NV_DQ3 / NV_IO3
1 2 M48 AD12 NV_DQ4 / NV_IO4 BB1 U7 change to SA00000OH00
R227 1 2 8.2K_0402_5% PCI_PERR# M45 AV6
R231 8.2K_0402_5% PCI_PIRQE# AD13 NV_DQ5 / NV_IO5
1 2 F53 AD14 NV_DQ6 / NV_IO6 BB3
R232 1 2 8.2K_0402_5% PCI_STOP# M40 BA4
AD15 NV_DQ7 / NV_IO7
NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4
J36 AD17 NV_DQ9 / NV_IO9 BB6
K48 AD18 NV_DQ10 / NV_IO10 BD6
F40 AD19 NV_DQ11 / NV_IO11 BB7
C42 AD20 NV_DQ12 / NV_IO12 BC8
R228 1 2 8.2K_0402_5% PCI_REQ0# K46 BJ8
R235 8.2K_0402_5% PCI_PIRQB# AD21 NV_DQ13 / NV_IO13
1 2 M51 AD22 NV_DQ14 / NV_IO14 BJ6
R236 1 2 8.2K_0402_5% PCI_PIRQF# J52 BG6
R237 8.2K_0402_5% PCI_REQ3# AD23 NV_DQ15 / NV_IO15
1 2 K51 AD24
L34 BD3 NV_ALE
AD25 NV_ALE NV_CLE
F42 AD26 NV_CLE AY6
J40 AD27
G46 AD28
R238 1 2 8.2K_0402_5% PCI_IRDY# F44 AU2 NV_RCOMP R239 1 @ 2 32.4_0402_1% +1.8VS
R240 8.2K_0402_5% PCI_PIRQD# AD29 NV_RCOMP
1 2 M47 AD30
PCI
R241 1 2 8.2K_0402_5% DGPU_SELECT# H36 AV7
R242 8.2K_0402_5% PCI_DEVSEL# AD31 NV_RB# NV_ALE R247 1 @
1 2 2 1K_0402_5%
J50 C/BE0# NV_WR#0_RE# AY8
G42 C/BE1# NV_WR#1_RE# AY5
H47 NV_CLE R248 1 @ 2 1K_0402_5%
C/BE2#
G34 C/BE3# NV_WE#_CK0 AV11
R243 1 2 8.2K_0402_5% PCI_FRAME# BF5
NV_WE#_CK1
R244 1 2 8.2K_0402_5% PCI_REQ1# PCI_PIRQA# G38 PIRQA#
Intel Anti-Theft Techonlogy
R245 1 2 8.2K_0402_5% PCI_PIRQH# PCI_PIRQB# H51 PIRQB#
C R246 1 2 8.2K_0402_5% PCI_TRDY# PCI_PIRQC# B37 PIRQC# USBP0N H18 USB20_N0
USB20_N0 <29> High=Endabled C
PCI_PIRQD# A44 PIRQD# USBP0P J18 USB20_P0
USB20_P0 <29> USB/B (Right Side) NV_ALE
USB20_N1 Low=Disable(floating)
PCI_REQ0# F51 REQ0#
USBP1N
USBP1P
A18
C18 USB20_P1
USB20_N1
USB20_P1
<29>
<29> USB Port (Left Side) *
A16 swap overide Strap/Top-Block PCI_REQ1# A46 N20 USB20_N2
REQ1# / GPIO50 USBP2N USB20_N2 <29>
Swap Override jumper DGPU_SELECT# B45 REQ2# / GPIO52 USBP2P P20 USB20_P2
USB20_P2 <29> USB/B (Right Side) DMI Termination Voltage
PCI_REQ3# M53 J20
REQ3# / GPIO54 USBP3N
Low=A16 swap USBP3P L20 EHCI 1 Set to Vcc when HIGH
override/Top-Block PCI_GNT0# F48 GNT0# USBP4N F20 NV_CLE
PCI_GNT3# Swap Override enabled PCI_GNT1# K45 GNT1# / GPIO51 USBP4P G20 Set to Vss when LOW
High=Default * @ DGPU_PW MSEL# F36 A20
T11 PAD GNT2# / GPIO53 USBP5N
PCI_GNT3# H53 C20
GNT3# / GPIO55 USBP5P
USBP6N M22
PCI_PIRQE# B41 N22 2/10 USB6, USB7 not NV_ALE

PCI_PIRQF# PIRQE# / GPIO2 USBP6P Enable Intel Anti-Theft
K53 PIRQF# / GPIO3 USBP7N B21 support on HM55
PCI_PIRQG# A36 D21 Technology 8.2K PU to +3VS
PCI_PIRQH# PIRQG# / GPIO4 USBP7P USB20_N8
A48 H22

PIRQH# / GPIO5 USBP8N USB20_N8 <22>
USBP8P J22 USB20_P8
USB20_P8 <22> CMOS Camera (LVDS) Disable Intel Anti-Theft
USB
@ TP_PCI_RST# K6 E22 USB20_N9 Technology floating(internal PD)
T12 PAD PCIRST# USBP9N USB20_N9 <29>
F22 USB20_P9 Card Reader
USBP9P USB20_P9 <29>
PCI_SERR# E44 A22 USB20_N10
USB20_N10 <26>
NV_CLE
PCI_PERR# SERR# USBP10N USB20_P10
E50 PERR# USBP10P C22 USB20_P10 <26> Mini Card(WWAN_SIM Card)
USBP11N G24 USB20_N11
USB20_N11 <29> EHCI 2 DMI termination voltage.
H24 USB20_P11 Bluetooth weak internal PU, don't PD
USBP11P USB20_P11 <29>
PCI_IRDY# A42 L24 USB20_N12
IRDY# USBP12N USB20_N12 <26>
H44 M24 USB20_P12 Mini Card(WLAN)
PAR USBP12P USB20_P12 <26>
PCI_DEVSEL# F46 A24 USB20_N13
DEVSEL# USBP13N USB20_N13 <26>
PCI_FRAME# C46 C24 USB20_P13 Mini Card(WWAN)
FRAME# USBP13P USB20_P13 <26>
B PCI_PLOCK# B
D49 PLOCK#
B25 USB_BIAS 1 2
PCI_STOP# USBRBIAS# R249
D41 STOP#
PCI_TRDY# C48 D25 22.6_0402_1% USB_OC#0_R
TRDY# USBRBIAS USB_OC#0_R <21>
M7 USB_OC#2_R
PME# USB_OC#2_R <21>
N16 USB_OC#0_R R250 1 2 0_0402_5% (For USB Port0, 2)
OC0# / GPIO59 USB_OC#0 <29>
PLT_RST# D5 J16 USB_OC#1_R
<5,21,27,30> PLT_RST# PLTRST# OC1# / GPIO40 USB_OC#1_R <21>
USB_OC#2_R R251 1 2 0_0402_5%
OC2# / GPIO41 F16 USB_OC#2 <29> (For USB Port1)
N52 L16 USB_OC#3_R
CLKOUT_PCI0 OC3# / GPIO42 USB_OC#3_R <21>
P53 E14 USB_OC#4_R
P46 G16 USB_OC#5_R
<30> CLK_PCI_LPC R252 1 2 22_0402_5% CLK_PCI_LPC_R P51 F12 USB_OC#6_R RP1
R253 1 2 22_0402_5% CLK_PCI_FB_R P48 T15 USB_OC#7_R USB_OC#3_R 1 8 +3VALW
<14> CLK_PCI_FB CLKOUT_PCI4 OC7# / GPIO14 USB_OC#7_R <21>
USB_OC#5_R 2 7
USB_OC#6_R 3 6
2008/1/6 2009MOW01 change to 22 ohm IBEXPEAK-M_FCBGA107 USB_OC#7_R 4 5
<BOM Structure> OC[0..3] use for EHCI 1
10K_1206_8P4R_5%
OC[4..7] use for EHCI 2
Boot BIOS Strap

PCI_GNT0# R254 1 @ 2 1K_0402_5%
PCI_GNT#0 PCI_GNT#1 Boot BIOS Location Have internal PU USB_OC#1_R R255 1 2 10K_0402_5%
0 0 LPC PCI_GNT1# R256 1 @ 2 1K_0402_5% USB_OC#4_R R257 1 2 10K_0402_5%

Have internal PU
0 1 Reserved (NAND)
A
PCI_GNT3# R258 1 @ 2 1K_0402_5% A
1 0 PCI Have internal PU
* 1 1 SPI
A16 swap override Strap/Top-Block

Swap Override jumper Issued Date 2009/08/01 Deciphered Date 2010/08/01 Title
PCI_GNT#3 Low = A16 swap THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (5/9) PCI, USB, VRAM
High = Default Size Document Number Rev
Custom 1.0
5 4 3 2 1
5 4 3 2 1
+3VS
R259 1 2 10K_0402_5% DGPU_EDIDSEL#

R260 1 2 10K_0402_5% DGPU_HPD_INT#
U4F
R261 1 2 10K_0402_5% VGA_PRSNT_R#
R262 1 2 10K_0402_5% VGA_PRSNT_L# CRT_DET Y3 AH45
<21> CRT_DET BMBUSY# / GPIO0 CLKOUT_PCIE6N
CLKOUT_PCIE6P AH46
R263 1 @ 2 10K_0402_5% DGPU_HOLD_RST# DGPU_EDIDSEL# C38 TACH1 / GPIO1
R264 1 2 10K_0402_5% PCH_GPIO22 DGPU_HPD_INT# D37 TACH2 / GPIO6
D
CLKOUT_PCIE7N AF48 D
MISC
R265 1 2 10K_0402_5% PCH_GPIO39 EC_SCI# J32 AF47 +3VS
<30> EC_SCI# TACH3 / GPIO7 CLKOUT_PCIE7P
EC_SMI# F10
<30> EC_SMI# GPIO8
R266 1 2 10K_0402_5% DGPU_PW R_EN EC_GA20 R267 1 2 10K_0402_5%
PCH_GPIO12 K9
(GPIO8 Should not be Pull-Low) U2 EC_GA20
LAN_PHY_PWR_CTRL / GPIO12 A20GATE EC_GA20 <30> EC_KBRST# R269 1 2 10K_0402_5%
PCH_GPIO15 T7
R270 1 GPIO15
2 10K_0402_5% PCH_GPIO48
R271 1 2 10K_0402_5% PCH_TEMP_ALERT# <21> DGPU_HOLD_RST# DGPU_HOLD_RST# AA2 AM3
SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLK# <5>
R300 1 2 10K_0402_5% DGPU_PW ROK_1 DGPU_PW ROK_1 F38 AM1
20090915 Add TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLK <5>
R273 1 2 10K_0402_5% PCH_GPIO34 PCH_GPIO22 Y7 BG10
SCLOCK / GPIO22 PECI H_PECI <5>
GPIO
R274 1 2 10K_0402_5% EC_SCI#
GPIO24 change PU +3VS to +3VALW PCH_GPIO24 H10 T1 EC_KBRST#
20090916 GPIO24 RCIN# EC_KBRST# <30>
+3VALW PCH_GPIO27 AB12 BE10
GPIO27 PROCPWRGD H_CPUPW RGD <5>
CPU
R275 1 2 10K_0402_5% PCH_GPIO12 PCH_GPIO28 V13 BD10 THRMTRIP_PCH# 2 1 H_THERMTRIP#
<21> PCH_GPIO28 GPIO28 THRMTRIP# H_THERMTRIP# <5>
R277 1 2 10K_0402_5% EC_SMI# R276 56_0402_5%
PCH_GPIO34 M11 2 1 +1.05VS
R279 1 STP_PCI# / GPIO34
2 1K_0402_5% PCH_GPIO15 WW46 Platform/Design Updates R278 56_0402_5%
10/7 Not Use PCH_GPIO15 PU 1K to +3V PCH_GPIO35 V6 SATACLKREQ# / GPIO35 2008/11/17 54.9 1% ->56 5%
R268 1 @ 2 10K_0402_5% PCH_GPIO24 <21> DGPU_PW R_EN DGPU_PW R_EN AB7 BA22
SATA2GP / GPIO36 TP1
R280 1 2 10K_0402_5% PCH_GPIO28 VGA_PRSNT_L# AB13 AW22
<21> VGA_PRSNT_L# SATA3GP / GPIO37 TP2
R281 1 2 10K_0402_5% PCH_GPIO57
C R282 1 2 10K_0402_5% PCH_GPIO45 VGA_PRSNT_R# V3 BB22 C
R283 10K_0402_5% RST_GATE SLOAD / GPIO38 TP3
1 2
PCH_GPIO39 P3 AY45
SDATAOUT0 / GPIO39 TP4
PCH_GPIO45 H3 AY46
PCIECLKRQ6# / GPIO45 TP5 MAINPW ON <37,38,40>
R286 1 2 10K_0402_5% DGPU_HOLD_RST# <10> RST_GATE RST_GATE F1 AV43
PCIECLKRQ7# / GPIO46 TP6 R288
1
PCH_GPIO48 AB6 AV45 @ 330_0402_5% C
R287 1 @ SDATAOUT1 / GPIO48 TP7
2 10K_0402_5% DGPU_PW ROK_1 +1.05VS 1 2 2 @
PCH_TEMP_ALERT# AA4 AF13 B Q12
<21,30> PCH_TEMP_ALERT# SATA5GP / GPIO49 TP8
R289 1 2 10K_0402_5% PCH_GPIO35 E 2SC2411KT146_SOT23-3
3
PCH_GPIO57 F8 M18
R290 1 @ GPIO57 TP9
2 10K_0402_5% PCH_GPIO27
GPIO27 (Have internal Pull-High) N18 H_THERMTRIP#
TP10
High: VCCVRM VR Enable A4 AJ24
VSS_NCTF_1 TP11
Low: VCCVRM VR Disable A49
NCTF
VSS_NCTF_2
RSVD
A5 VSS_NCTF_3 TP12 AK41
A50 VSS_NCTF_4
A52 VSS_NCTF_5 TP13 AK42
A53 VSS_NCTF_6
+3VS
B2 VSS_NCTF_7 TP14 M32
B4 VSS_NCTF_8
B52 VSS_NCTF_9 TP15 N32
2
B53 VSS_NCTF_10
R291 BE1 M30
VSS_NCTF_11 TP16
10K_0402_5% BE53 VSS_NCTF_12
B High: CRT Plugged BF1 VSS_NCTF_13 TP17 N30
B
BF53
1
CRT_DET VSS_NCTF_14
BH1 VSS_NCTF_15 TP18 H12
D BH2 VSS_NCTF_16
1
BH52 VSS_NCTF_17 TP19 AA23

<23> CRT_DET# 2 BH53 VSS_NCTF_18
Q13G @ BJ1 AB45
2N7002_SOT23 VSS_NCTF_19 NC_1
S BJ2
3
VSS_NCTF_20
BJ4 VSS_NCTF_21 NC_2 AB38
BJ49 VSS_NCTF_22
BJ5 VSS_NCTF_23 NC_3 AB42
BJ50 VSS_NCTF_24
GPIO27 BJ52 VSS_NCTF_25 NC_4 AB41
On-Die PLL Voltage Regulator BJ53 VSS_NCTF_26
This signal has a weak internal pull up D1 T39

VSS_NCTF_27 NC_5
D2 INIT3_3V
On-Die
VSS_NCTF_28
H voltage regulator enable (Have internal PD,
* L On-Die PLL Voltage Regulator disable
D53
E1
VSS_NCTF_29
VSS_NCTF_30 INIT3_3V# P6 Do not pull high) This signal has weak internal
E53 VSS_NCTF_31 PU, can't pull low
TP24_SST @
REV1.0 TP24 C10 PAD T13
GPIO8 IBEXPEAK-M_FCBGA107
This signal has a weak internal pull up <BOM Structure>
can't Pull low

GPIO15
L Intel ME Crypto Transport
Layer Security(TLS) chiper suite *
A A

with no confidentiality
H Intel ME Crypto Transport
Layer Security(TLS) chiper suite
with confidentiality
it have weak internal PU 20K Issued Date 2009/08/01 Deciphered Date 2010/08/01 Title
PCH (6/9) GPIO, CPU, MISC
Custom 1.0
5 4 3 2 1
5 4 3 2 1
+1.05VS For CRT Issue +3VS
U4G POWER Near AE50 20091105

10U_0805_10V4Z 1U_0402_6.3V4Z AB24 AE50 +VCCADAC 0.01U_0402_16V7K 1 2
VCCCORE[1] VCCADAC[1] L5
1 1 AB26 VCCCORE[2] 1 1 1 1 60mA
D AB28 69mA AE52 C215 C216 C217 C221 MBK1608221YZF_2P D
C213 C214 VCCCORE[3] VCCADAC[2] L5 Change to 220ohm bead
AD26 VCCCORE[4]1524mA 220 ohm bead,350mA 20091116
CRT
AD28 AF53 0.1U_0402_16V4Z 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 VCCCORE[5] VSSA_DAC[1] 2 2 2 2
AF26 VCCCORE[6]
CRB 0.9 is 180 ohm @ 100MHz
VCC CORE
AF28 VCCCORE[7] VSSA_DAC[2] AF51
Near AB24 Near AB24 AF30 VCCCORE[8] +3VS DG0.8 is 600 ohm FB (Page 290)
AF31 VCCCORE[9]
Top Side AH26 VCCCORE[10] +VCCA_LVDS R293
AH28 VCCCORE[11] 1 2 0_0805_5%
AH30 VCCCORE[12] 300mA Change to 0_0805_5%
Intel suggest follow CRB 8/21 AH31 VCCCORE[13] VCCALVDS AH38
AJ30 20090923
VCCCORE[14]
AJ31 VCCCORE[15] VSSA_LVDS AH39
All Ibex Peak-M Power rails with netnames +1.1VS and
+1.1V rails are actually +1.05VS and +1.05V rails +1.05VS 59mA +1.8VS
VCCTX_LVDS[1] AP43
VCCTX_LVDS[2] AP45
AT46 Near AP43 L6
LVDS
VCCTX_LVDS[3] +VCCTX_LVDS C220
AK24 VCCIO[24] VCCTX_LVDS[4] AT45 2 1
C218 1 1 1 0.1UH_MLF1608DR10KT_10%_1608
42mA 0.01U_0402_16V7K 22U_0805_6.3V6M 0.1uH inductor, 200mA
@ +VCCAPLL_EXP BJ24 C219
T20 PAD VCCAPLLEXP
AB34 0.01U_0402_16V7K
VCC3_3[2] 2 2 2
DG 1.6 (Page 329)
Have Internal VRM AN20 VCCIO[25] VCC3_3[3] AB35
AN22
HVCMOS
VCCIO[26]
AN23 VCCIO[27] VCC3_3[4] AD35 +3VS
AN24 VCCIO[28]
AN26 VCCIO[29] 1
C AN28 C222 C
VCCIO[30]
BJ26 VCCIO[31]
BJ28 0.1U_0402_16V4Z Near AB34
VCCIO[32] 2
AT26 VCCIO[33]
AT28 R296 1 @ 2 0_0805_5% +1.05VS
VCCIO[34]
AU26 VCCIO[35]
+1.05VS AU28 +VCCVRM R297 1 @ 2 0_0805_5%
VCCIO[36] +1.5VS
AV26 VCCIO[37] 35mA R298 1
Near AN20 AV28 VCCIO[38] VCCVRM[2] AT24 2 0_0805_5% +1.8VS
10U_0805_10V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z AW26 3208mA
VCCIO[39]
1 1 1 1 1 AW28 VCCIO[40] 61mA +1.05VS
DMI
BA26 VCCIO[41] VCCDMI[1] AT16
C223 C224 C225 C226 C227 BA28 VCCIO[42] +VCC_DMI R299 1
BB26 VCCIO[43] VCCDMI[2] AU16 2 0_0402_5%
2 2 2 2 2
BB28 VCCIO[44] 1
Change to 0_0402
Top Side BC26 VCCIO[45] 20090914
PCI E*
1U_0402_6.3V4Z 1U_0402_6.3V4Z BC28 C228
VCCIO[46] 1U_0402_6.3V4Z
BD26 VCCIO[47] 2
BD28 VCCIO[48] 156mA
BE26 VCCIO[49] VCCPNAND[1] AM16 Near AT16
BE28 VCCIO[50] VCCPNAND[2] AK16
BG26 VCCIO[51] VCCPNAND[3] AK20
BG28 VCCIO[52] VCCPNAND[4] AK19
Near AN35 BH27 VCCIO[53] VCCPNAND[5] AK15
+1.8VS
VCCPNAND[6] AK13
Follow Intel suggestion 8/21 +3VS AN30 AM12
VCCIO[54] VCCPNAND[7]
NAND / SPI
AN31 VCCIO[55] VCCPNAND[8] AM13
VCCPNAND[9] AM15
0.1U_0402_16V4Z 1
B C229 2 C230 B
1 AN35 VCC3_3[1]
0.1U_0402_16V4Z
2
+VCCVRM AT22 VCCVRM[1]
@ +VCCAPLL_FDI
85mA Near AK13
T21 PAD BJ18 VCCFDIPLL 6mA VCCME3_3[1] AM8
+3VS
VCCME3_3[2] AM9
FDI
DG 1.6 (Page 329) +1.05VS AM23 VCCIO[1] VCCME3_3[3] AP11

Have Internal VRM VCCME3_3[4] AP9
1
C232
REV1.0
IBEXPEAK-M_FCBGA107 0.1U_0402_16V4Z
2
<BOM Structure>
Near AM8
A A

PCH (7/9) PWR
Custom 1.0
5 4 3 2 1
5 4 3 2 1
U4J POWER
@ +1.1VS_VCCACLK AP51
52mA REV1.0 V24
T22 PAD VCCACLK[1] VCCIO[5] +1.05VS
VCCIO[6] V26 1 09/09/21 WW37 remove
DG 1.6 (Page 329) AP53 Y24 +1.05VS +VCCADPLLA
VCCACLK[2] VCCIO[7] C240
+VCCADPLLA,+VCCADPLLB external 1U
Have Internal VRM VCCIO[8] Y26
344mA 1U_0402_6.3V4Z
+1.05VS 2
AF23 VCCLAN[1] VCCSUS3_3[1] V28
+3VALW L10
Near BB51
R303 1 @ +VCCLAN VCCSUS3_3[2] U28 Near V24 1 2
10UH_LB2012T100MR_20%
2 AF24 VCCLAN[2] VCCSUS3_3[3] U26
0_0603_5% 1 U24 10uH inductor, 120mA 1
VCCSUS3_3[4]
1
P28 1 1 @ R304
VCCSUS3_3[5]
1
D R302 C241 +PCH_VCCD6W Y20 P26 C242 C243 C244 + C245 0_0402_5% D
0_0402_5% 1U_0402_6.3V4Z DCPSUSBYP VCCSUS3_3[6] 1U_0402_6.3V4Z @
1 VCCSUS3_3[7] N28
@ 2 C246 0.1U_0402_16V4Z 0.1U_0402_16V4Z 220U_6.3V_M_R17 2
1998mA N26
2
VCCSUS3_3[8] 2 2
Near AF23 AD38 M28
2
0.1U_0402_16V4Z VCCME[1] VCCSUS3_3[9]
M26 Near A26 Near U23
2
2 VCCSUS3_3[10] +VCCADPLLB
AD39 L28
USB
VCCME[2] VCCSUS3_3[11]
Near Y20 VCCSUS3_3[12] L26
AD41 VCCME[3] VCCSUS3_3[13] J28
J26 L11 1 2
+1.05VS VCCSUS3_3[14] 10UH_LB2012T100MR_20%
Follow Intel suggestion AF43 VCCME[4] VCCSUS3_3[15] H28
VCCSUS3_3[16] H26 10uH inductor, 120mA 1
1
22U_0805_6.3V6M AF41 163mA G28 @
VCCME[5] VCCSUS3_3[17] C247 + C248
1 1 1 1 1 VCCSUS3_3[18] G26
@ AF42 F28 1U_0402_6.3V4Z
C235 C236 C237 C238 C239 VCCME[6] VCCSUS3_3[19] 220U_6.3V_M_R17 2
F26
2
22U_0805_6.3V6M VCCSUS3_3[20] +3VALW
2 2 2 2 2
1U_0402_6.3V4Z
V39 VCCME[7] VCCSUS3_3[21] E28 Near BD51
E26
Clock and Miscellaneous

VCCSUS3_3[22] D4
V41 VCCME[8] VCCSUS3_3[23] C28
2
22U_0805_6.3V6M Near AD38 1U_0402_6.3V4Z Near V39 C26 CH751H-40PT_SOD323-2
VCCSUS3_3[24]
V42 VCCME[9] VCCSUS3_3[25] B27
VCCSUS3_3[26] A28
Y39 VCCME[10] VCCSUS3_3[27] A26
+1.05VS
All Ibex Peak-M Power rails with netnames +1.1VS and
1
Y41 U23 2/12 Follow EDS1.11 +3VS
+1.1V rails are actually +1.05VS and +1.05V rails VCCME[11] VCCSUS3_3[28] +5VALW
Change to 100 ohm
Y42 VCCME[12] VCCIO[56] V23
2
R305 D5
Near V9 C249 >1mA F24 +VCC5REFSUS 1 2 100_0402_5% CH751H-40PT_SOD323-2
0.1U_0402_16V4Z V5REF_SUS
C 1 2 +VCCRTCEXT V9 2 1 C250 2/12 Follow EDS1.11 C
DCPRTC 1U_0402_6.3V6K R306
Change to 100 ohm
1
>1mA Near F24 100_0402_5%
K49 +VCC5REF 1 2 +5VS
V5REF
+VCCVRM AU24 VCCVRM[3] Change to 1U for power
PCI/GPIO/LPC
357mA 2 1 C251
sequence issue on ICH9 1U_0402_6.3V6K
72mA VCC3_3[8] J38
+VCCADPLLA BB51 VCCADPLLA[1] Near K49
BB53 VCCADPLLA[2] VCC3_3[9] L38
+3VS
73mA VCC3_3[10] M36
+VCCADPLLB BD51 VCCADPLLB[1]
+1.05VS BD53 N36
VCCADPLLB[2] VCC3_3[11]
1
AH23 P36 C252
VCCIO[21] VCC3_3[12]
AJ35 VCCIO[22]
1 1 Near AF32 AH35 U35 0.1U_0402_16V4Z
C255 VCCIO[23] VCC3_3[13] 2 +3VS
C253 1 2 +PCH_VCCIO AF34 Near J38
1U_0402_6.3V4Z 1U_0402_6.3V4Z R337 0_0603_5% VCCIO[2]
2 2 VCC3_3[14] AD13 Near AD13
2 1 AH34 VCCIO[3]
Near AH35 C254 1 2 C256
Near AH23 1U_0402_6.3V4Z AF32 32mA 0.1U_0402_16V4Z
VCCIO[4]
VCCSATAPLL[1] AK3
1 2 +VCCSST V12 AK1 +VCCSATAPLL @ PAD T23
C257 DCPSST VCCSATAPLL[2]
0.1U_0402_16V4Z
Near V12
DG 1.6 (Page 329)
+1.05VS Have Internal VRM
1 2 +VCCSUS Y22
B C260 DCPSUS B
+3VALW 0.1U_0402_16V4Z
Near Y22 VCCIO[9] AH22
P18 VCCSUS3_3[29] VCCVRM[4] AT20 +VCCVRM

1
C261 U19
SATA
VCCSUS3_3[30] +1.05VS
PCI/GPIO/LPC
VCCIO[10] AH19
0.1U_0402_16V4Z U20
2 VCCSUS3_3[31]
VCCIO[11] AD20
Near P18 U22 VCCSUS3_3[32]
VCCIO[12] AF22 1
+3VS
AD19 C262
VCCIO[13] 1U_0402_6.3V4Z
V15 VCC3_3[5] VCCIO[14] AF20
2
1 VCCIO[15] AF19
C263 V16 AH20 Near AB19
VCC3_3[6] VCCIO[16]
0.1U_0402_16V4Z Y16 AB19
2 VCC3_3[7] VCCIO[17]
VCCIO[18] AB20
+1.05VS +1.05VS
Near V15 VCCIO[19] AB22
> 1mA VCCIO[20] AD22
AT18 V_CPU_IO[1]
1 1 1 AA34 PCH_VCCME13 R309 1 2 0_0603_5%
CPU
C265 C266 C267 VCCME[13] PCH_VCCME14 R310 0_0603_5%

VCCME[14] Y34 1 2
AU18 Y35 PCH_VCCME15 R311 1 2 0_0603_5%
4.7U_0805_10V4Z 0.1U_0402_16V4Z V_CPU_IO[2] VCCME[15] PCH_VCCME16 R312 0_0603_5%
VCCME[16] AA35 1 2
2 2 2
0.1U_0402_16V4Z Near AT18 2mA 6mA
RTC
A A12 VCCRTC VCCSUSHDA L30 +3VALW A

HDA
C268 1 2 1U_0402_6.3V4Z
IBEXPEAK-M_FCBGA107
+RTCVCC <BOM Structure> Near L30
1 1 1
C270 C271
C269 Security Classification Compal Secret Data Compal Electronics, Inc.
0.1U_0402_16V4Z 2009/08/01 2010/08/01 Title
2 2 2 Issued Date Deciphered Date
1U_0402_6.3V4Z
Near A12 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (8/9) PWR
0.1U_0402_16V4Z Size Document Number Rev
Custom 1.0
5 4 3 2 1
5 4 3 2 1
U4I U4H
AY7
B11
VSS[159] VSS[259] H49
H5
AB16 VSS[0] PCH XDP Port
VSS[160] VSS[260]
B15 VSS[161] VSS[261] J24 AA19 VSS[1] VSS[80] AK30
B19 VSS[162] VSS[262] K11 AA20 VSS[2] VSS[81] AK31
B31 K47 AM19 AK34 R313 1 @ 2 33_0402_5% XDP_FN0
VSS[164] VSS[264] VSS[4] VSS[83] <17> USB_OC#0_R
B39 L14 AA26 AK38 R314 1 @ 2 33_0402_5% XDP_FN2
B43 VSS[167] VSS[267] L18 AA28 VSS[7] VSS[86] AK43
B47 L2 AA30 AK46 R315 1 @ 2 33_0402_5% XDP_FN4
B7 VSS[169] VSS[269] L22 AA31 VSS[9] VSS[88] AK49
D BG12 VSS[170] VSS[270] L32 AA32 VSS[10] VSS[89] AK5 D
BB12 VSS[171] VSS[271] L36 AB11 VSS[11] VSS[90] AK8
BB16 L40 AB15 AL2 R316 1 @ 2 33_0402_5% XDP_FN8
VSS[172] VSS[272] VSS[12] VSS[91] <14> PCH_GPIO20
BB20 L52 AB23 AL52 R317 1 @ 2 33_0402_5% XDP_FN9
BB24 M12 AB30 AM11 R318 1 @ 2 33_0402_5% XDP_FN10
BB30 M16 AB31 BB44 R319 1 @ 2 33_0402_5% XDP_FN11
BB34 M20 AB32 AD24 R320 1 @ 2 33_0402_5% XDP_FN12
VSS[176] VSS[276] VSS[16] VSS[95] <18> DGPU_PW R_EN
BB38 N38 AB39 AM20 R321 1 @ 2 33_0402_5% XDP_FN13
VSS[177] VSS[277] VSS[17] VSS[96] <18> VGA_PRSNT_L#
BB42 M34 AB43 AM22 R322 1 @ 2 33_0402_5% XDP_FN14
VSS[178] VSS[278] VSS[18] VSS[97] <18> DGPU_HOLD_RST#
BB49 M38 AB47 AM24 R323 1 @ 2 33_0402_5% XDP_FN15
VSS[179] VSS[279] VSS[19] VSS[98] <18,30> PCH_TEMP_ALERT#
BB5 VSS[180] VSS[280] M42 AB5 VSS[20] VSS[99] AM26
BC10 M46 AB8 AM28 R324 1 @ 2 33_0402_5% XDP_FN17
VSS[181] VSS[281] VSS[21] VSS[100] <18> CRT_DET
BC14 VSS[182] VSS[282] M49 AC2 VSS[22] VSS[101] BA42
BC18 VSS[183] VSS[283] M5 AC52 VSS[23] VSS[102] AM30
BC2 M8 AD11 AM31 R325 1 2 0_0402_5% PCH_JTAG_TCK_R
VSS[184] VSS[284] VSS[24] VSS[103] <13> PCH_JTAG_TCK
BC22 N24 AD12 AM32 R326 1 2 0_0402_5% PCH_JTAG_TMS_R
VSS[185] VSS[285] VSS[25] VSS[104] <13> PCH_JTAG_TMS
BC32 P11 AD16 AM34 R327 1 2 0_0402_5% PCH_JTAG_TDI_R
VSS[186] VSS[286] VSS[26] VSS[105] <13> PCH_JTAG_TDI
BC36 AD15 AD23 AM35 <13> PCH_JTAG_TDO R328 1 2 PCH_JTAG_TDO_R
VSS[187] VSS[287] VSS[27] VSS[106] 0_0402_5%
BC40 VSS[188] VSS[288] P22 AD30 VSS[28] VSS[107] AM38
BC44 P30 AD31 AM39 R329 1 @ 2 0_0402_5% PCH_JTAG_RST#_R
VSS[189] VSS[289] VSS[29] VSS[108] <13> PCH_JTAG_RST#
BC52 VSS[190] VSS[290] P32 AD32 VSS[30] VSS[109] AM42
BH9 VSS[191] VSS[291] P34 AD34 VSS[31] VSS[110] AU20
BD48 VSS[192] VSS[292] P42 AU22 VSS[32] VSS[111] AM46
BD49 VSS[193] VSS[293] P45 AD42 VSS[33] VSS[112] AV22
BD5 P47 AD46 AM49 JP2
VSS[194] VSS[294] VSS[34] VSS[113] (XDP_FN16)
BE12 VSS[195] VSS[295] R2 AD49 VSS[35] VSS[114] AM7 1 GND0 GND1 2
BE16 VSS[196] VSS[296] R52 AD7 VSS[36] VSS[115] AA50 3 OBSFN_A0 OBSFN_C0 4 PCH_GPIO28 <18>
BE20 T12 AE2 BB10 5 6 XDP_FN17
VSS[197] VSS[297] VSS[37] VSS[116] OBSFN_A1 OBSFN_C1
BE24 VSS[198] VSS[298] T41 AE4 VSS[38] VSS[117] AN32 7 GND2 GND3 8
C BE30 T46 AF12 AN50 XDP_FN0 9 10 XDP_FN8 C
VSS[199] VSS[299] VSS[39] VSS[118] (XDP_FN1)<17> USB_OC#1_R OBSDATA_A0 OBSDATA_C0 XDP_FN9
BE34 VSS[200] VSS[300] T49 Y13 VSS[40] VSS[119] AN52 11 OBSDATA_A1 OBSDATA_C1 12
BE38 VSS[201] VSS[301] T5 AH49 VSS[41] VSS[120] AP12 13 GND4 GND5 14
BE42 T8 AU4 AP42 XDP_FN2 15 16 XDP_FN10
VSS[202] VSS[302] VSS[42] VSS[121] (XDP_FN3)<17> USB_OC#3_R OBSDATA_A2 OBSDATA_C2 XDP_FN11
BE46 VSS[203] VSS[303] U30 AF35 VSS[43] VSS[122] AP46 17 OBSDATA_A3 OBSDATA_C3 18
BE48 VSS[204] VSS[304] U31 AP13 VSS[44] VSS[123] AP49 19 GND6 GND7 20
BE50 VSS[205] VSS[305] U32 AN34 VSS[45] VSS[124] AP5 21 OBSFN_B0 OBSFN_D0 22
BE6 VSS[206] VSS[306] U34 AF45 VSS[46] VSS[125] AP8 23 OBSFN_B1 OBSFN_D1 24
BE8 VSS[207] VSS[307] P38 AF46 VSS[47] VSS[126] AR2 25 GND8 GND9 26
BF3 V11 AF49 AR52 XDP_FN4 27 28 XDP_FN12
VSS[208] VSS[308] VSS[48] VSS[127] (XDP_FN5)<17> USB_OC#5_R OBSDATA_B0 OBSDATA_D0 XDP_FN13
BF49 VSS[209] VSS[309] P16 AF5 VSS[49] VSS[128] AT11 29 OBSDATA_B1 OBSDATA_D1 30
BF51 VSS[210] VSS[310] V19 AF8 VSS[50] VSS[129] BA12 31 GND10 GND11 32
BG18 V20 AG2 AH48 (XDP_FN6)<17> USB_OC#6_R 33 34 XDP_FN14
VSS[211] VSS[311] VSS[51] VSS[130] (XDP_FN7)<17> USB_OC#7_R OBSDATA_B2 OBSDATA_D2 XDP_FN15
BG24 VSS[212] VSS[312] V22 AG52 VSS[52] VSS[131] AT32 35 OBSDATA_B3 OBSDATA_D3 36
BG4 VSS[213] VSS[313] V30 AH11 VSS[53] VSS[132] AT36 37 GND12 GND13 38
BG50 V31 AH15 AT41 39 40 +3VS
VSS[214] VSS[314] VSS[54] VSS[133] <15> SYS_PW ROK PWRGOOD/HOOK0 ITPCLK/HOOK4
BH11 VSS[215] VSS[315] V32 AH16 VSS[55] VSS[134] AT47 <5,15,30> PBTN_OUT# 1 2 41 HOOK1 ITPCLK#/HOOK5 42
BH15 V34 AH24 AT7 +3VS R330 0_0402_5% 43 44
VSS[216] VSS[316] VSS[56] VSS[135] VCC_OBS_AB VCC_OBS_CD
BH19 VSS[217] VSS[317] V35 AH32 VSS[57] VSS[136] AV12 45 HOOK2 RESET#/HOOK6 46 2 1 PLT_RST# <5,17,27,30>
BH23 V38 AV18 AV16 47 48 R331 XDP_DBRESET# <5,15>
VSS[218] VSS[318] VSS[58] VSS[137] HOOK3 DBR#/HOOK7 1K_0402_5%
BH31 VSS[219] VSS[319] V43 AH43 VSS[59] VSS[138] AV20 49 GND14 GND15 50
BH35 V45 AH47 AV24 51 52 PCH_JTAG_TDO_R
VSS[220] VSS[320] VSS[60] VSS[139] <5> SMB_DATA_S3 SDA TD0
BH39 V46 AH7 AV30 53 54 PCH_JTAG_RST#_R
VSS[221] VSS[321] VSS[61] VSS[140] <5> SMB_CLK_S3 SCL TRST#
BH43 V47 AJ19 AV34 55 56 PCH_JTAG_TDI_R
VSS[222] VSS[322] VSS[62] VSS[141] PCH_JTAG_TCK_R TCK1 TDI PCH_JTAG_TMS_R
BH47 VSS[223] VSS[323] V49 AJ2 VSS[63] VSS[142] AV38 57 TCK0 TMS 58
BH7 VSS[224] VSS[324] V5 AJ20 VSS[64] VSS[143] AV42 59 GND16 GND17 60
C12 VSS[225] VSS[325] V7 AJ22 VSS[65] VSS[144] AV46
C50 V8 AJ23 AV49 CONN@ SAMTE_BSH-030-01-L-D-A
VSS[226] VSS[326] VSS[66] VSS[145]
D51 VSS[227] VSS[327] W2 AJ26 VSS[67] VSS[146] AV5
B B
E12 VSS[228] VSS[328] W52 AJ28 VSS[68] VSS[147] AV8
E16 VSS[229] VSS[329] Y11 AJ32 VSS[69] VSS[148] AW14
E20 VSS[230] VSS[330] Y12 AJ34 VSS[70] VSS[149] AW18
E24 VSS[231] VSS[331] Y15 AT5 VSS[71] VSS[150] AW2
E30 VSS[232] VSS[332] Y19 AJ4 VSS[72] VSS[151] BF9
E34 VSS[233] VSS[333] Y23 AK12 VSS[73] VSS[152] AW32
E38 Y28 AM41 AW36 +3VS
VSS[234] VSS[334] VSS[74] VSS[153] R332
E42 VSS[235] VSS[335] Y30 AN19 VSS[75] VSS[154] AW40
E46 Y31 AK26 AW52 4.7K_0402_5%
VSS[236] VSS[336] VSS[76] VSS[155]
2
E48 VSS[237] VSS[337] Y32 AK22 VSS[77] VSS[156] AY11 1 2 +3VS
E6 VSS[238] VSS[338] Y38 AK23 VSS[78] VSS[157] AY43
SMB_DATA_S3
E8
F49
VSS[239] VSS[339] Y43
Y46
AK28 VSS[79] REV1.0 VSS[158] AY47 <12,14,26> PCH_SMBDATA 6 1
VSS[240] VSS[340] <BOM Structure>
IBEXPEAK-M_FCBGA107 Q15A
F5 VSS[241] VSS[341] P49
G10 Y5 2N7002DW -T/R7_SOT363-6
VSS[242] VSS[342]
G14 VSS[243] VSS[343] Y6
G18 Y8 +3VS
VSS[244] VSS[344] R333
G2 VSS[245] VSS[345] P24
G22 T43 4.7K_0402_5%
VSS[246] VSS[346]
5
G32 VSS[247] VSS[347] AD51 1 2 +3VS
G36 VSS[248] VSS[348] AT8
G40 AD47 <12,14,26> PCH_SMBCLK 3 4 SMB_CLK_S3
VSS[249] VSS[349]
G44 VSS[250] VSS[350] Y47
G52 AT12 Q15B
VSS[251] VSS[351] 2N7002DW -T/R7_SOT363-6
AF39 VSS[252] VSS[352] AM6
H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
H30 VSS[255] VSS[355] AK45
A H34 VSS[256] VSS[356] AK39 A
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
REV1.0
IBEXPEAK-M_FCBGA107 Security Classification Compal Secret Data Compal Electronics, Inc.
<BOM Structure> Issued Date 2009/08/01 Deciphered Date 2010/08/01 Title
PCH (9/9) VSS & PCH XDP Port
Custom 1.0
5 4 3 2 1
5 4 3 2 1
+LCDVDD
LCD POWER CIRCUIT
+3VALW +3VS
W=60mils
1
R724
1
1 Add R96 for SA00000U500 part
300_0603_5% R725 C618 20091216
100K_0402_5% +3VS
6 2
4.7U_0805_10V4Z
2 U8 1 2
1
Q65A R726 NC7SZ14P5X_NL_SC70-5 R96 100K_0402_5%
3
S
1K_0402_5% Q17 change to SB934130020
NC
D
G D
2N7002DW-T/R7_SOT363-6 2 2 1 2 Q17 2 4 INVTPWM
<16> DPST_PWM A Y
AO3413_SOT23-3
G
D
1
1
1
3
1
C619 +LCDVDD
3
W=60mils R727
0.047U_0402_16V7K
5 Q65B 2 1 @ 2 10K_0402_5%
<16> PCH_ENVDD
1 1 R728 0_0402_5%
2
2N7002DW-T/R7_SOT363-6 C620 C621
4
1
4.7U_0805_10V4Z 0.1U_0402_16V4Z U8 change to SA00000U500

R729 2 2
20091216
100K_0402_5%
2
LED PANEL Conn.

JLVDS1
1 1 +INVPWR_B+
41 G1 2 2
C C
42 G2 3 3
43 4 1 @ 2
G3 4 R307 0_0603_5%
44 G4 5 5 +LCDVDD W=60mils
45 G5 6 6
46 7 +3VS R731 0_0402_5%
G6 7 INVTPWM @
8 8 2 1 INVT_PWM <30>
9 DISPOFF#
+INVPWR_B+ 9 PCH_LCD_CLK
10 PCH_LCD_CLK <16>
10 PCH_LCD_DATA
11 PCH_LCD_DATA <16>
L12 2 BKOFF# R730 1 DISPOFF# 11
1 B+ <30> BKOFF# 2 0_0402_5% 12 DAC_BRIG <30>
FBMA-L11-201209-221LMA30T_0805 R732 1 12 PCH_TXOUT0-
W=40mils 2 10K_0402_5% 13
13 PCH_TXOUT0- <16>
14 PCH_TXOUT0+
14 PCH_TXOUT0+ <16>
L13 2 1 15
FBMA-L11-201209-221LMA30T_0805 15 PCH_TXOUT1-
16 PCH_TXOUT1- <16>
16 PCH_TXOUT1+
1 1 17 PCH_TXOUT1+ <16>
C622 C623 17
18
470P_0402_50V7K 68P_0402_50V8J 18 PCH_TXOUT2-
19 PCH_TXOUT2- <16>
19 PCH_TXOUT2+
20 PCH_TXOUT2+ <16>
2 2 20
21
21 PCH_TXCLK-
22 PCH_TXCLK- <16>
22 PCH_TXCLK+
23 PCH_TXCLK+ <16>
23
24
+3VS 24
25
25
26
26 @ LOCAL_DIM
27 1 2
INVTPWM 27 R15 0_0402_5% LOCAL_DIM <30>
1 2 1 28
C624 220P_0402_50V7K C626 28
29
DISPOFF# 29 @ COLOR_ENG_EN
1 2 30 1 2
C625 220P_0402_50V7K 30 R16 0_0402_5% COLOR_ENG_EN <30>
31
2 0.1U_0402_16V4Z 31
32
32
33
33
34
B 34 B
35
+3VS 35
36
36
11/21 intel JIM suggest Pull high at LVDS Conn 37
37 +3VS
38 USB20_CMOS_N8 R733 2 1 0_0402_5%
38 USB20_N8 <17>
39 USB20_CMOS_P8 R734 2 1 0_0402_5%
PCH_LCD_CLK 39 USB20_P8 <17>
R735 1 2 2.2K_0402_5% 40
40
R736 1 2 2.2K_0402_5% PCH_LCD_DATA STARC_107K40-000001-G2
CONN@
@ D10
6 3 USB20_CMOS_N8
CH3 CH2
+3VS 5 2
Vp Vn
USB20_CMOS_P8 4 1
CH4 CH1
CM1293-04SO_SOT23-6
A A

LVDS Connector
Custom 1.0
5 4 3 2 1
A B C D E
CRT Connector D7 D8 D9
W=40mils
+5VS +R_CRT_VCC +CRT_VCC
D7 / D8 / D9
DAN217_SC59 DAN217_SC59 DAN217_SC59
change to SC6BAV99390 D6 F2
1
2 1 1 2
RB491D_SC59-3 1.1A_6VDC_FUSE
D6 change to SCS00002000 1
3
C501
+3VS 0.1U_0402_16V4Z
1 2 1
PCH_CRT_R 1 2 CRT_R_1 1 2 CRT_R_2 JCRT1

<16> PCH_CRT_R
L24 FBMA-L11-160808-800LMT_0603 L25 FBMA-L11-160808-800LMT_0603 6
11
PCH_CRT_G 1 2 CRT_G_1 1 2 CRT_G_2 1
<16> PCH_CRT_G
12
PCH_CRT_B 1 2 CRT_B_1 1 2 CRT_B_2 2
<16> PCH_CRT_B
13
1
1 1 1 1 1 1 1 1 1 3
R473 R475 R474 C505 C506 C507 C508 C509 C510 9
C511 C512 C513 14 G 16
150_0402_1% 150_0402_1% 10P_0402_50V8J 10P_0402_50V8J 10P_0402_50V8J 4 17
2 2 2 2 2 2 2 2 2 G
10
2
10P_0402_50V8J 10P_0402_50V8J 22P_0402_50V8J 15
22P_0402_50V8J 1 5
150_0402_1% 10P_0402_50V8J 22P_0402_50V8J Change to 12pf for Discrete C514
C-H_13-12201513CP
100P_0402_50V8J CONN@
Change to 15pf for Discrete 2
1 2 CRT_HSYNC_2
+CRT_VCC L33 MBC1608121YZF_0603 DSUB_12
C515 1 2 0.1U_0402_16V4Z R476 2 1 10K_0402_5% 1 2 CRT_VSYNC_2 1

L34 MBC1608121YZF_0603 1 1 CRT_DET# <18>
1
U22 C516 C517 DSUB_15
2 10P_0402_50V8J 10P_0402_50V8J C518 2 2
OE#
P
2
PCH_CRT_HSYNC2 CRT_HSYNC_1 2 2 68P_0402_50V8J 1 @
<16> PCH_CRT_HSYNC A Y 4
R477
G
C519 100K_0402_5%
74AHCT1G125GW_SOT353-5 68P_0402_50V8J
3
2
1
+CRT_VCC
C520 1 2 0.1U_0402_16V4Z
+CRT_VCC
1
U23
OE#
P
PCH_CRT_VSYNC 2 4 CRT_VSYNC_1
<16> PCH_CRT_VSYNC A Y
G
74AHCT1G125GW_SOT353-5
3 +CRT_VCC 3
+3VS
1
R742 R743
2.2K_0402_5% 2.2K_0402_5%
2
2
PCH_CRT_DATA 1 6 DSUB_12
<16> PCH_CRT_DATA
pull-up 2.2k on PCH side Q19A
5
2N7002DW-T/R7_SOT363-6
pull-up 2k on GPU SIDE PCH_CRT_CLK DSUB_15
<16> PCH_CRT_CLK 4 3
Q19B
2N7002DW-T/R7_SOT363-6
4 4

CRT Connector
B 1.0
A B C D E
5 4 3 2 1
+3VS
+3VS
+HDMI_5V_OUT NAL00 HDMI connector
1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z JHDMI1
R745 HDMI_HPD 19 HP_DET
1 1 1 1 1 1 1 10K_0402_5% +HDMI_5V_OUT 18 +5V
C645 C646 C644 C647 C648 C649 C650 W=40mils HDMI@ 17
HDMI@ HDMI@ HDMI@ HDMI@ HDMI@ HDMI@ HDMI@ HDMI@ F1 HDMI_SDATA DDC/CEC_GND
16
2
OE# HDMI_SCLK SDA
+5VS 1 2 15 SCL
2
0.1U_0402_16V4Z 2 2 2 2 2 2
1 D 14 Reserved
1
1.1A_6VDC_FUSE HDMI@ 13
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C651 Q20 HDMI_HPD HDMI_R_CK- CEC
2 12 CK- GND 20
0.1U_0402_16V4Z 2N7002_SOT23 G 11 21
CK_shield GND
1
2 HDMI@ S HDMI_R_CK+
D 1 10 22 D
3
C652 R746 HDMI_R_D0- CK+ GND
CG0 CG1 CG2 Swing Pre-amp Slew-rate 9 D0- GND 23
HDMI@ HDMI@ 8
U11 0.1U_0402_16V4Z 100K_0402_5% HDMI_R_D0+ D0_shield
0 0 0 450 0 0 2
7 D0+
HDMI_R_D1- 6
0 0 1 420 0 -3db
2
D1-
5 D1_shield
0 1 0 450 0 -3db (default) +3VS +3VS 25 OE# HDMI_R_D1+ 4
OE# HDMI@ HDMI_R_D2- D1+
0 1 1 460 0 -4db 3 D2-
2 D12 CH751H-40PT_SOD323-2 2
1 0 0 340 0 0 VCC3V HDMI_SCLK R749 1 HDMI@ 2 2.2K_0402_5% 1 HDMI_R_D2+ D2_shield
11 VCC3V SCL_SINK 28 2 +HDMI_5V_OUT 1 D2+
1 0 1 400 2db 0 15 VCC3V
21 29 HDMI_SDATA R747 1 HDMI@ 2 2.2K_0402_5% 1 2 HDMI Conn. SUYIN_100042MR019S153ZL
VCC3V SDA_SINK
2
1 1 0 400 2db 0 Change to DC232000900
HDMI@ R748
@ R750
26
2.2K_0402_5%
2.2K_0402_5%
VCC3V CONN@
33 D17 CH751H-40PT_SOD323-2 20090917
1 1 1 420 0 0 40
VCC3V
30 HDMI_HPD
VCC3V HPD_SINK HDMI@
46 VCC3V
32 R751 1 HDMI@ 2 2.2K_0402_5%+3VS HDMI_CLK- R752 1 HDMI@ 2 0_0402_5% HDMI_R_CK-
1
DDC_EN
R753 1 HDMI@ 2 2.2K_0402_5% +3VS 1 2
R755 1 HDMI@ 2 2.2K_0402_5% HDMI_CG0 3 R754 @ 1 2
CG_0 EQ_0 34 1 2 2.2K_0402_5% L14
R756 1 @ 2 2.2K_0402_5% HDMI_CG1 4 35 EQ_S1 R757 1 HDMI@ 2 2.2K_0402_5% W CM-2012-900T_0805
CG_1 EQ_1 R758 @
1 2 2.2K_0402_5% @ 4 4 3 3
1 2 OC_S2 6 HDMI_CLK+ R760 1 2 0_0402_5% HDMI_R_CK+

R759 HDMI@ 3.4K_0402_1% REXT HDMI@
LS_HDMI_DET 7 EQ0 EQ1 Equalization
R761 1 HDMI@ 2 2.2K_0402_5% HPD#
+3VS
SDVO_SDATA 8 HDMI_TX0- R762 1 HDMI@ 2 0_0402_5% HDMI_R_D0-
<16> SDVO_SDATA
R763 1 HDMI@ 2 2.2K_0402_5% SDA 0 0 12dB
C SDVO_SCLK 9 0 1 9dB 1 2 C
<16> SDVO_SCLK SCL 1 2
1 0 6dB L15
1 1 3dB (default) W CM-2012-900T_0805
+3VS R764 1 @ 2 HDMI_CG2 10 @ 4 3
2.2K_0402_5% CG_2 4 3
2
HDMI_TX0+ R765 1 2 0_0402_5% HDMI_R_D0+

HDMI@ HDMI_TX2+ 13 48 HDMI@
OUT_D4+ IN_D4+ PCH_TMDS_D2 <16>
R766 HDMI_TX2- 14 47
OUT_D4- IN_D4- PCH_TMDS_D2# <16>
0_0402_5% HDMI_TX1- R767 1 HDMI@ 2 0_0402_5% HDMI_R_D1-
HDMI_TX1+ 16 45 PCH_TMDS_D1 <16>
1
HDMI_TX1- OUT_D3+ IN_D3+

17 OUT_D3- IN_D3- 44 PCH_TMDS_D1# <16> 1 1 2 2
L16
HDMI_CLK+ 19 42 W CM-2012-900T_0805
OUT_D2+ IN_D2+ PCH_TMDS_CK <16>
HDMI_CLK- 20 41 @ 4 3
OUT_D2- IN_D2- PCH_TMDS_CK# <16> 4 3
+3VS HDMI_TX0+ 22 39 HDMI_TX1+ R768 1 2 0_0402_5% HDMI_R_D1+
OUT_D1+ IN_D1+ PCH_TMDS_D0 <16>
HDMI_TX0- 23 38 HDMI@
OUT_D1- IN_D1- PCH_TMDS_D0# <16>
1
R769 HDMI_TX2- R770 1 HDMI@ 2 0_0402_5% HDMI_R_D2-

20K_0402_5%
@ 1 1 2
GND 1 2
@
5 PCH_TMDS_CK 1 2 L17
2
GND
1 HDMI@ 2 12 GND GND 49 R777 2.2K_0402_5% W CM-2012-900T_0805
R771 PCH_DPB_HPD <16> 18 PCH_TMDS_CK# 1 HDMI@ 2 @ 4 3
0_0402_5% GND R778 2.2K_0402_5% 4 3
D 24 GND
1
27 HDMI_TX2+ R772 1 2 0_0402_5% HDMI_R_D2+

LS_HDMI_DET Q21 GND HDMI@
2 31 GND
1
G 36
@ GND For HDMI SW Issue
S
2N7002_SOT23
37
3
B R773 GND B
43 GND
20K_0402_5%
@ CH7318C-BF PN: SA00001U920
2
ASM1442T_QFN48_7X7
HDMI@ default is ASM1442 p/n: SA00003GT00
A A

HDMI Level Shife & Conn
Custom 1.0
5 4 3 2 1
A B C D E F G H
+3VS +5VS_HDD 0.1U_0402_16V4Z 10U_0805_10V4Z
1 1 1 1 1
C653 C654 C655 C656 C657
H1
H_3P0
H2
H_3P0
H3
H_3P0
H4
H_3P0
H6
H_3P0
H7
H_3P0
H8
H_3P0
H9
H_3P0
H10
H_3P0
H11
H_3P0
H12
H_3P0
H13
H_3P0
H14
H_3P0 0.1U_0402_16V4Z
SATA HDD1 Conn.
2 2 2 2 2
CL 4.0 mm
@ @ @ @ @ @ @ @ @ @ @ @ GNDA @ 1000P_0402_50V7K 1U_0402_6.3V4Z JHDD1
1
for AUDIO 1
C658 1 SATA_PTX_C_DRX_P0 GND
<13> SATA_PTX_DRX_P0 2 0.01U_0402_16V7K 2
C659 1 SATA_PTX_C_DRX_N0 A+
<13> SATA_PTX_DRX_N0 2 0.01U_0402_16V7K 3 A-
4
H21 H22 H23 H24 C661 1 SATA_DTX_PRX_N0 GND
2 0.01U_0402_16V7K 5
B-
1 H_4P2 H_4P2 H_4P2 H_4P2 <13> SATA_DTX_C_PRX_N0 C660 1 SATA_DTX_PRX_P0 1
2 0.01U_0402_16V7K 6
<13> SATA_DTX_C_PRX_P0 B+
7
GND
@ @ @ @
1
1
+3VS 8
V33
9
V33
10
V33
11
GND
12
GND
13
H18 H41 H42 R774 +5VS_HDD GND
+5VS 1 2 0_0805_5% 14
V5
H_3P4 H_3P0X3P5N H_3P0N 15 V5
16 V5
17 GND
@ JMINI1 @ @ 18
1
1
Reserved
Stand-off 19 GND
20 V12
21 V12 GND 24
22 V12 GND 23
FD8 FD7 FD5 FD6

SANTA_192301-1
CONN@
@ @ @ @
1
1
20090915 Update to SANTA
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
2 2
Placea caps. near ODD CONN.
+5VS_ODD 0.1U_0402_16V4Z 10U_0805_10V4Z
1 1 1 1
C662 C663 C664 C665
2 2 2 2
1000P_0402_50V7K 1U_0402_6.3V4Z SATA ODD Conn.

JODD1
1
C666 1 SATA_PTX_C_DRX_P1 GND
<13> SATA_PTX_DRX_P1 2 0.01U_0402_16V7K 2
C667 1 SATA_PTX_C_DRX_N1 A+
<13> SATA_PTX_DRX_N1 2 0.01U_0402_16V7K 3
A-
4
C668 1 SATA_DTX_PRX_N1 GND
<13> SATA_DTX_C_PRX_N1 2 0.01U_0402_16V7K 5
C669 1 SATA_DTX_PRX_P1 B-
<13> SATA_DTX_C_PRX_P1 2 0.01U_0402_16V7K 6
B+
7
GND
R775 1 @ 2 1K_0402_1% 8
DP
+5VS 1 2 +5VS_ODD 9
R776 0_0805_5% +5V
10 17
+5V GND
11 16
MD GND
12 15
GND GND
13 14
3 GND GND 3
OCTEK_SLS-13SB1G_RV
CONN@
4 4

HDD & ODD & Screw Hole
B 1.0
A B C D E F G H
A B C D E
For Wireless LAN

+3VS +1.5VS +3VS To 3G / GPS Module Connect
47P_0402_50V8J 0.1U_0402_16V4Z 47P_0402_50V8J
1 1 1 1 1 1 1 1
C1148 C1149 @ C1150 C1151 C1152 @ C1157 +3VS 2 3G@1 +3VS_WWAN
C37 C38 0.1U_0402_16V4Z R946 0_1206_5%
4.7U_0805_10V4Z 4.7U_0805_10V4Z
2 2 2 2 2 2 2 2 +3VS_WWAN +3VS_WWAN
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 20090915 Add for 3G team 20090915 Add for 3G team 47P_0402_50V8J 1
1
1 1 1
JMINI1 @ C1153 C1154 + C1159
PCH_PCIE_WAKE# R947 1 @ 2 0_0402_5% 1 2 +3VS C39 3G@ 3G@ @
<15,27> PCH_PCIE_WAKE# 1 2
3 4 4.7U_0805_10V4Z 0.1U_0402_16V4Z 220U_6.3V_M_R17
2
3 4 2 2 2
5 6 +1.5VS
5 6
<14> MINI1_CLKREQ# 7 8
7 8
9 10
9 10 20090915 Add for 3G team
<14> CLK_PCIE_MINI1# 11 12
11 12
<14> CLK_PCIE_MINI1 13 14
13 14
15 16
15 16
+3VS_WWAN
17 17 18 18
19 20 WL_OFF# JP4
19 20 WL_OFF# <30>
21 22 PLT_RST_BUF# PLT_RST_BUF# <17> 1
21 22 R949 1 1
<14> PCIE_DTX_C_PRX_N2 23 23 24 24 2 0_0603_5% +3VS 2 2
25 26 R950 1 2 0_0603_5% 3 WWAN_OFF#
<14> PCIE_DTX_C_PRX_P2 25 26 +3VALW 3 WWAN_OFF# <30>
27 28 @ 4 WWAN_LED# <30>
27 28 PCH_SMBCLK 4
29 29 30 30 PCH_SMBCLK <12,14,21> 5 5
1
31 32 PCH_SMBDATA PCH_SMBDATA <12,14,21> 6
<14> PCIE_PTX_C_DRX_N2 31 32 6 USB20_N13 <17>
33 34 7 R951
<14> PCIE_PTX_C_DRX_P2 33 34 7 USB20_P13 <17>
35 36 8 3G@
35 36 USB20_N12 <17> 8
37 38 9 100K_0402_5%
37 38 USB20_P12 <17> 9 USB20_N10 <17>
+3VS 39 40 10 USB20_P10 <17>
2
39 40 10
41 41 42 42 1 R14 2 0_0402_5% GND 11
43 43 44 44 Mini1_LED# <30> GND 12
45 46 Add USB Port 10 for SIM Card +3VS_WWAN
45 46
1
0_0402_5% 47 48 (9~16mA) ACES_87036-1001-CP 20091102
R952 1 E51TXD_P80DATA_R 47 48
<30> E51TXD_P80DATA 2 49 49 50 50 CONN@
E51RXD_P80CLK 51 52 R953
<30> E51RXD_P80CLK 51 52 100K_0402_5%
2 G1 2
G2
G3
G3
2
ACES_88910-5204
53
54
55
56
CONN@ Change to PU +3VS

+3VS 20091230
5.2 mm
Mini Card Power Rating
Power Primary Power (mA) Auxiliary Power (mA)
Peak Normal Normal
+3VS 1000 750
+3V 330 250 250 (wake enable)
+1.5VS 500 375 5 (Not wake enable)
3
FAN1 Conn 3
+5VS
@ C1160 10U_0805_10V4Z
1 2
U60
1 8
EN GND
2 7
+VCC_FAN1 VIN GND
3 6
VOUT GND
<30> EN_DFAN1 4 5
VSET GND
APL5607KI-TRG_SO8
C1166
10U_0805_10V4Z
1 2
+3VS C1167
1000P_0402_50V7K
1 2
1
R956
10K_0402_5%
40mil
JFAN1
2
+VCC_FAN1
1
<30> FAN_SPEED1 2
3
4
1 4
C1168 ACES_85205-03001
1000P_0402_50V7K CONN@
2

MINI CARD (WLAN & 3G)/FAN
B 1.0
A B C D E
5 4 3 2 1
+3V_LAN
60mil
+3VALW R901 1 2
0_1206_5%
1 1
C1112 C1113
4.7U_0603_6.3V6K
D U58 2 2 D
0.1U_0402_16V4Z
42 25 +LAN_BIASVDDH
+3V_LAN VDDC BIASVDDH
+1.2V_LAN 0.1U_0402_16V4Z 6 14 +LAN_XTALVDDH

VDDC XTALVDDH
1 1 1 1 15
C1114 C1115 C1116 C1117 VDDC
41
VDDC +LAN_AVDDH
30
4.7U_0603_6.3V6K AVDDH
2 2 2 2 36 SPROM_CLK SPROM_DOUT
0.1U_0402_16V4Z 0.1U_0402_16V4Z AVDDH (EECLK) (EEDATA)
+LAN_AVDDL 27 AVDDL LAN_MIDI3- On chip 1 0
33 AVDDL TRD3_N 37 LAN_MIDI3- <28>
39 AVDDL
1 1 1 38 LAN_MIDI3+
TRD3_P LAN_MIDI3+ <28> AT24C02 1 1
C674 C675 C676
35 LAN_MIDI2-
TRD2_N LAN_MIDI2- <28>
1000P_0402_50V7K2 2 2
1000P_0402_50V7K +3V_LAN
34 LAN_MIDI2+
+LAN_GPHYPLLVDDL TRD2_P LAN_MIDI2+ <28>
1000P_0402_50V7K 24 C1118 1 2 0.1U_0402_16V4Z
GPHY_PLLVDDL
31 LAN_MIDI1- @
TRD1_N LAN_MIDI1- <28>
2
For EMI
20091211 32 LAN_MIDI1+ R902 R903
TRD1_P LAN_MIDI1+ <28>
1K_0402_1% 1K_0402_1%
+LAN_PCIEPLLVDD 18
PCIE_PLLVDDL @
29 LAN_MIDI0- U59 @
LAN_MIDI0- <28>
1
TRD0_N
21 PCIE_PLLVDDL 8 VCC A0 1
28 LAN_MIDI0+ 7 2
TRD0_P LAN_MIDI0+ <28> SPROM_CLK WP A1
6 SCL NC 3
C SPROM_DOUT C
5 SDA GND 4
AT24C02_SO8
2
LINKLED# 48 2 1 LAN_LINK# <28>
R904 R905 R906
0.1U_0402_16V7K 47 0_0402_5% 1K_0402_1% 1K_0402_1%
PCIE_DTX_PRX_P1 SPD100LED#
<14> PCIE_DTX_C_PRX_P1 1 2 C1119 17 PCIE_TXD_P @
<14> PCIE_DTX_C_PRX_N1 1 2 C1120 PCIE_DTX_PRX_N1 16 46
1
PCIE_TXD_N SPD1000LED#
22
0.1U_0402_16V7K PCIE_RXD_P
23 45 2 1
LAN_PME# PCIE_RXD_N TRAFFICLED# R907 LAN_ACTIVITY# <28>
<14> PCIE_PTX_C_DRX_P1 4
LAN_RESET# 2 WAKE# 0_0402_5%
<14> PCIE_PTX_C_DRX_N1 REST#
20
R908 1 @ PCIE_REFCLK_P
<15,26> PCH_PCIE_WAKE# 2 0_0402_5% 19
R909 1 PCIE_REFCLK_N
<30> EC_PME# 2 0_0402_5%
+3V_LAN R910 1 2 4.7K_0402_5%
20mil
R911 1 2 0_0402_5% L99
<5,17,21,30> PLT_RST#
5 +LAN_XTALVDDH 1 1 2
MODE +3V_LAN
C1121 BLM18AG601SN1D_2P
<14> CLK_PCIE_LAN
0.1U_0402_16V4Z
<14> CLK_PCIE_LAN#
2
20mil
L100
43 SPROM_DOUT +LAN_BIASVDDH 1 1 2
EEDATA C1122 BLM18AG601SN1D_2P
44 SPROM_CLK
R912 1 EECLK
+3VS 2 1K_0402_5% 40 0.1U_0402_16V4Z
VMAIN_PRSINT 2
20mil
R913 1 2 10K_0402_5% 1 L101
LOW_PWR +LAN_AVDDH
L102 1 1 1 2
C1123 C1124 BLM18AG601SN1D_2P
B +1.2V_LAN_OUT B
11 1 2 +1.2V_LAN
SR_LX 4.7UH_PG031B-4R7MS_1.1A_20% 0.1U_0402_16V4Z 0.1U_0402_16V4Z
LAN_XTALO_R 13 8 2 2
XTALO SR_VFB 1 1
C1125
LAN_XTALI 12 C1126 20mil
XTALI 0.1U_0402_16V4Z 10U_0805_10V4Z L103
2 2 +LAN_PCIEPLLVDD 1 2 +1.2V_LAN
1 1 BLM18AG601SN1D_2P
R914
C1127 C1128
1 2 LAN_RDAC 26
RDAC 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
10 +3V_LAN
SR_VDDP 2 2
1.24K_0402_1% 1 1
9 C1129 C1130
SR_VDD
2 2 20mil
3 L104
<14> LAN_CLKREQ# CLKREQ# 4.7U_0603_6.3V6K 0.1U_0402_16V4Z +LAN_GPHYPLLVDDL 1 2 +1.2V_LAN
7 1 1 BLM18AG601SN1D_2P
NC C1131 C1132
PAD
0.1U_0402_16V4Z 4.7U_0603_6.3V6K
2 2
BCM57780A0KMLG_QFN48_7X7
49
20mil
L105
+LAN_AVDDL 1 2 +1.2V_LAN
1 1 BLM18AG601SN1D_2P
C1133 C1134
LAN_XTALI 0.1U_0402_16V4Z 4.7U_0603_6.3V6K

2 2
LAN_XTALO_R
A A
1
R915
200_0402_1%
2
Y6
1 2 LAN_XTALO Security Classification Compal Secret Data Compal Electronics, Inc.
1 1 Issued Date 2008/08/10 Deciphered Date 2009/08/10 Title
25MHZ_20PF_7A25000012
C1135 C1136
Broadcom BCM57780
27P_0402_50V8J 27P_0402_50V8J Size Document Number Rev
2 2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
5 4 3 2 1
5 4 3 2 1
LAN Connector
D D
Change to SP050006B00
20091117
T1
1 TCT1 MCT1 24
<27> LAN_MIDI0+ LAN_MIDI0+ 2 23 RJ45_MIDI0+
LAN_MIDI0- TD1+ MX1+ RJ45_MIDI0-
<27> LAN_MIDI0- 3 TD1- MX1- 22 +3V_LAN 2 1
R916 1K_0402_5% 1
4 TCT2 MCT2 21
<27> LAN_MIDI1+ LAN_MIDI1+ 5 20 RJ45_MIDI1+ 220P_0402_50V7K
LAN_MIDI1- TD2+ MX2+ RJ45_MIDI1- C1137
<27> LAN_MIDI1- 6 TD2- MX2- 19
2 C1138 68P_0402_50V8J
JRJ45
7 18 @
LAN_MIDI2+ TCT3 MCT3 RJ45_MIDI2+
<27> LAN_MIDI2+ 8 TD3+ MX3+ 17 2 1 9 Green LED+
<27> LAN_MIDI2- LAN_MIDI2- 9 16 RJ45_MIDI2-
TD3- MX3- LAN_LINK#
<27> LAN_LINK# 10 Green LED-
10 TCT4 MCT4 15
<27> LAN_MIDI3+ LAN_MIDI3+ 11 14 RJ45_MIDI3+ RJ45_MIDI0+ 1 14
LAN_MIDI3- TD4+ MX4+ RJ45_MIDI3- PR1+ SHLD1
<27> LAN_MIDI3- 12 TD4- MX4- 13 SHLD2 13
RJ45_MIDI0- 2 PR1-
RJ45_MIDI1+ 3 PR2+
1
350UH_IH-037-2
RJ45_MIDI2+ 4
C R917 R918 PR3+ C
1 1 1
C1139 C1140 C1141 1 75_0402_1% 75_0402_1% RJ45_MIDI2- 5
C1142 PR3-
1
0.1U_0402_16V4Z RJ45_MIDI1- 6
2 2 2 0.1U_0402_16V4Z PR2-
2 R919 R920 RJ45_MIDI3+ 7 PR4+
0.1U_0402_16V4Z 0.1U_0402_16V4Z 75_0402_1% 75_0402_1%
RJ45_MIDI3- 8
2
PR4-
RJ45_GND 2 1 11
+3V_LAN Yellow LED+
Place close to TCT pin R921 1K_0402_5% 1
40mil LAN_ACTIVITY# 12
220P_0402_50V7K <27> LAN_ACTIVITY# Yellow LED-
C1143 68P_0402_50V8J
2 SANTA_130451-K
2 1
@ CONN@
C1144
RJ45_GND 1 2 LANGND 40mil

1 1
C1145
1000P_1206_2KV7K C1146 C1147
4.7U_0603_6.3V6K
2 2
0.1U_0402_16V4Z
B B
A A

LAN Magnetic & RJ45
Custom 1.0
5 4 3 2 1
A B C D E
+3VALW
+5VALW
1
+USB_VCCA
80mil
U13
1 8 R823
GND OUT 100K_0402_5%
2 IN OUT 7
3 6
2
IN OUT
1 4 5 1 2 USB_OC#2 <17>
1 C740 EN# FLG R824 1
TPS2061DRG4_SO8 10K_0402_5% 1
4.7U_0805_10V4Z C741
2 Change to SA00002XX00
20090922 0.1U_0402_16V4Z
2
SYSON#
<35> SYSON#
D13
USB20_N1_1 +USB_VCCA
6 3 W=100mils
Card Reader Conn. CH3 CH2
+USB_VCCA
1
+USB_VCCA 5 Vp Vn 2 1
JCR1 +3VS C64 + C743
10 C744
GND 4.7U_0805_10V4Z 220U_6.3V_M_R17
9
2
GND USB20_P1_1 2
8 8 1 2 4 CH4 CH1 1
7 470P_0402_50V7K
7
6 6
5
5IN1_LED# <32>
CM1293-04SO_SOT23-6 USB Conn.
5 R827 1 2 0_0402_5%
4 4
3 USB20_N9 (Port 1)
3 USB20_P9 USB20_N9 <17>
2 JUSB1
2 USB20_P9 <17>
1 USB20_N1 1 2 1
1 <17> USB20_N1 1 2 USB20_N1_1 VBUS
2 D-
ACES_85201-08051 USB20_P1_1 3
2 CONN@ USB20_P1 D+ 2
<17> USB20_P1 4 4 3 3 4 GND
5 GND
@ L7 WCM2012F2S-900T04_0805 6 GND
1 2 7 GND
R828 0_0402_5% 8 GND
L7 change to SM070001600 SUYIN_020133GB004M51PZR
20091230 CONN@
+3VALW
+5VALW
1
+USB_VCCB
80mil
U15
1 8 R829
GND OUT 100K_0402_5%
2 7
IN OUT
3 6
2
IN OUT
1 4 5 1 2 USB_OC#0 <17>
C745 EN# FLG R830
TPS2061DRG4_SO8 10K_0402_5% 1
4.7U_0805_10V4Z C746
2 Change to SA00002XX00
20090922 0.1U_0402_16V4Z
2
Bluetooth Conn. SYSON#
3
Q23 change to SB934130020 3
+3VALW +3VS
C747
1 1
C748
USB/B Conn.
0.1U_0402_16V4Z 1U_0603_10V4Z (Port 0,2) +USB_VCCB
3
2 2
S
G JUSB2
<30> BT_ON# 1 2 2
R831 10K_0402_5% Q23 1
AO3413_SOT23-3 1
D 2
1
2
1 3
C749 3
W=40mils 4
4
+BT_VCC 5
0.1U_0402_16V4Z 5 USB20_N0
6 USB20_N0 <17>
2 6 USB20_P0
1 1 7 USB20_P0 <17>
7
1
C750 C751 8
R832 8 USB20_N2
9
4.7U_0805_10V4Z 300_0603_5% 9 USB20_P2 USB20_N2 <17>
10
2 2 10 USB20_P2 <17>
13 11
0.1U_0402_16V4Z GND 11
14 12
2
GND 12
1
D ACES_85201-1205N
2 Q24 CONN@
G 2N7002_SOT23
S
3
4 4
+BT_VCC
JBT1
8 8 GND 10
7 7
<17> USB20_P11 6 6
<17> USB20_N11 5
4
5
4
3 3 Issued Date 2009/5/12 Deciphered Date 2009/12/31 Title
2
1
2
9 NEW CARD & eSATA Connector
1 GND THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ACES_87213-0800G B 1.0
CONN@
A B C D E
5 4 3 2 1
For EC Tools
+3VALW L8
FBMA-L11-160808-800LMT_0603 KSI[0..7] +3VALW
KSI[0..7] <31>
1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z +3VALW _EC 1 2 +EC_VCCA JP3
R833 1 1 1 1 2 2 KSO[0..17] 1
KSO[0..17] <31> 1
0_0805_5% C752 C757 C753 C754 C755 C756 1 2 E51RXD_P80CLK
2 E51TXD_P80DATA
3 3
1000P_0402_50V7K C758 4
2 2 2 2 1 1 4
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K 2 0.1U_0402_16V4Z ACES_85205-0400
ECAGND
@
D D
+3VALW
111
125
22
33
96
67
U16
2
R834
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
@
Rc 100K_0402_5%
EC_GA20 1 21
1
<18> EC_GA20 EC_KBRST# GA20/GPIO00 INVT_PWM/PWM1/GPIO0F BEEP# AD_ProjectID
<18> EC_KBRST# 2 KBRST#/GPIO01 BEEP#/PWM2/GPIO10 23 BEEP# <33>
SERIRQ 3 26 ME_OVERRIDE
<13> SERIRQ SERIRQ# FANPWM1/GPIO12 ME_OVERRIDE <13>
2
LPC_FRAME# 4 27 ACOFF 1
<13> LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF <39,40>
C760 R836 LPC_AD3 5 2 1 ECAGND R835 C761
<13> LPC_AD3 LAD3
10P_0402_50V8J 10_0402_5%
<13> LPC_AD2
LPC_AD2 7 LAD2 PWM Output C759 0.01U_0402_16V7K Rd 0_0402_5% @
2 1 2 1 LPC_AD1 8 63 BATT_TEMP
<13> LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP <37> 2
LPC_AD0 BATT_OVP
<13> LPC_AD0 10 LAD0 LPC & MISC 64 BATT_OVP <39>
1
BATT_OVP/AD1/GPIO39 ADP_I 0.1U_0402_16V4Z
ADP_I/AD2/GPIO3A 65 ADP_I <39>
12 AD Input 66 AD_BID0
<17> CLK_PCI_LPC PCICLK AD3/GPIO3B
13 75 AD_ProjectID
<5,17,21,27> PLT_RST# PCIRST#/GPIO05 AD4/GPIO42
+3VALW R837 2 1 47K_0402_5% EC_RST# 37 76
EC_SCI# ECRST# SELIO2#/AD5/GPIO43 +3VALW
<18> EC_SCI# 20 SCI#/GPIO0E
C762 2 1 0.1U_0402_16V4Z 38 Analog Board ID definition,
<15> PM_CLKRUN# CLKRUN#/GPIO1D
DAC_BRIG/DA0/GPIO3C 68 DAC_BRIG <22> Please see page 3.
2
70 EN_DFAN1
EN_DFAN1/DA1/GPIO3D EN_DFAN1 <26>
DA Output 71 IREF R838
+3VALW IREF/DA2/GPIO3E IREF <39>
KSI0 55 KSI0/GPIO30 DA3/GPIO3F 72 CALIBRATE#
CALIBRATE# <39> Ra 100K_0402_5%
KSI1 56 KSI1/GPIO31
1 2 EC_SMB_CK1 KSI2 57
1
R839 2.2K_0402_5% KSI3 KSI2/GPIO32 EC_MUTE# AD_BID0
58 KSI3/GPIO33 PSCLK1/GPIO4A 83 EC_MUTE# <34>
C 1 2 EC_SMB_DA1 KSI4 59 KSI4/GPIO34 PSDAT1/GPIO4B 84 GFX_CORE_PW RGD
GFX_CORE_PW RGD <44>
C
2
R840 2.2K_0402_5% KSI5 60 85 WW AN_LED# 1
KSI5/GPIO35 PSCLK2/GPIO4C WW AN_LED# <26>
KSI6 61 PS2 Interface 86 R841 C763
KSI6/GPIO36 PSDAT2/GPIO4D
1 2 LID_SW # KSI7 62 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E 87 TP_CLK
TP_CLK <31> Rb 8.2K_0402_5%
R842 100K_0402_5% KSO0 39 88 TP_DATA
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA <31> 2
KSO1 40
1
KSO1/GPIO21
1 2 KSO1 KSO2 41 KSO2/GPIO22
0.1U_0402_16V4Z
R843 47K_0402_5% KSO3 42 97 3S/4S#
KSO3/GPIO23 SDICS#/GPXOA00 3S/4S# <39>
1 2 KSO2 KSO4 43 KSO4/GPIO24 SDICLK/GPXOA01 98 65W /90W #
65W /90W # <39>
+5VS
R844 47K_0402_5% KSO5 44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
10/1 ENE Recommand KSO6 45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 LID_SW #
LID_SW # <32>
KSO7 46 SPI Device Interface TP_CLK 2 1
KSO7/GPIO27
1 2 EC_PME# KSO8 47 KSO8/GPIO28
4.7K_0402_5% R845
R846 @ 10K_0402_5% KSO9 48 119 EC_SI_SPI_SO TP_DATA 2 1
KSO9/GPIO29 SPIDI/RD# EC_SI_SPI_SO <31>
KSO10 49 120 EC_SO_SPI_SI 4.7K_0402_5% R847
KSO10/GPIO2A SPIDO/WR# EC_SO_SPI_SI <31>
KSO11 50 SPI Flash ROM 126 EC_SPICLK
KSO11/GPIO2B SPICLK/GPIO58 EC_SPICLK <31> +3VALW
KSO12 51 128 EC_SPICS#/FSEL#
+3VS KSO12/GPIO2C SPICS# EC_SPICS#/FSEL# <31>
KSO13 52 KSO13/GPIO2D
KSO14 53 KSO14/GPIO2E
10/1 EC Recommand
EC suggested 2.2K for SMBus KSO15 54 KSO15/GPIO2F CIR_RX/GPIO40 73 WW AN_OFF#
WW AN_OFF# <26>
3S/4S# 2 1
KSO16 81 74 PCH_TEMP_ALERT# R848 100K_0402_5%
KSO16/GPIO48 CIR_RLC_TX/GPIO41 PCH_TEMP_ALERT# <18,21>
1 2 EC_SMB_CK2 KSO17 82 KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 89 FSTCHG
FSTCHG <39>
R850 2.2K_0402_5% 90 65W /90W # 2 1
BATT_CHGI_LED#/GPIO52 BATT_Blue_LED# <32>
1 2 EC_SMB_DA2 CAPS_LED#/GPIO53 91 3G_LED#
3G_LED# <32>
R849 100K_0402_5%
R851 2.2K_0402_5% EC_SMB_CK1 77 GPIO 92
<37> EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 BATT_Amber_LED# <32>
EC_SMB_DA1 78 93 PW R_LED
<37> EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 PW R_LED <32>
1 2 GFX_CORE_PW RGD <14> EC_SMB_CK2
EC_SMB_CK2 79 SCL2/GPIO46 SM Bus SYSON/GPIO56 95 SYSON
SYSON <35,42>
R605 @ 10K_0402_5% 20090915 Add EC_SMB_DA2 80 121 VR_ON BATT_TEMP 2 1
<14> EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON <45>
127 ACIN C767 100P_0402_50V8J
B AC_IN/GPIO59 ACIN <32,35,36> B
1 @ 2 PCH_TEMP_ALERT# BATT_OVP 2 1
R852 2.2K_0402_5% C768 100P_0402_50V8J
PM_SLP_S3# 6 100 EC_RSMRST# ACIN 2 1
<15> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# <15>
1 2 LOCAL_DIM <15> PM_SLP_S5#
PM_SLP_S5# 14 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 101 EC_LID_OUT#
EC_LID_OUT# <14>
C769 100P_0402_50V8J
R53 100K_0402_5% EC_SMI# 15 102 EC_ON
For LVDS Function <18> EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON <32>
1 2 COLOR_ENG_EN <15> EC_ACIN
EC_ACIN 16 LID_SW#/GPIO0A EC_SWI#/GPXO06 103 EC_SW I#
EC_SW I# <15>
R54 100K_0402_5% 20091209 Add Mini1_LED# 17 104 EC_PW ROK
<26> Mini1_LED# SUSP#/GPIO0B ICH_PWROK/GPXO06 EC_PW ROK <15>
1 2 E51TXD_P80DATA LOCAL_DIM 18 GPO 105 BKOFF#
<22> LOCAL_DIM PBTN_OUT#/GPIO0C BKOFF#/GPXO08 BKOFF# <22>
R51 100K_0402_5% COLOR_ENG_EN 19 GPIO 106 WL_OFF#
<22> COLOR_ENG_EN EC_PME#/GPIO0D WL_OFF#/GPXO09 WL_OFF# <26>
INVT_PW M 25 107
P80DATA PD 100K for EC common design <22> INVT_PW M EC_THERM#/GPIO11 GPXO10
FAN_SPEED1 28 108
20091105 <26> FAN_SPEED1 BT_ON# FAN_SPEED1/FANFB1/GPIO14 GPXO11
<29> BT_ON# 29 FANFB2/GPIO15
E51TXD_P80DATA 30
<26> E51TXD_P80DATA EC_TX/GPIO16
E51RXD_P80CLK 31 110
<26> E51RXD_P80CLK EC_RX/GPIO17 PM_SLP_S4#/GPXID1 PM_SLP_S4# <15>
ON/OFF 32 112 ENBKL
<32> ON/OFF ON_OFF/GPIO18 ENBKL/GPXID2 ENBKL <16>
PW R_SUSP_LED 34 114 EAPD
<32> PW R_SUSP_LED PWR_LED#/GPIO19 GPXID3 EAPD <33>
W LAN_LED# 36 GPI 115 SUS_PW R_ACK
<32> W LAN_LED# NUMLED#/GPIO1A GPXID4 SUS_PW R_ACK <15>
116 SUSP#
GPXID5 SUSP# <35,39,41,43>
117 PBTN_OUT#
GPXID6 PBTN_OUT# <5,15,21>
1 2 EC_CRY2 118 EC_PME#
<15> PCH_SUSCLK GPXID7 EC_PME# <27>
@ R13 0_0402_5% EC_CRY1 122
EC_CRY2 XCLK1
123 XCLK0 V18R 124
1
AGND
EC_CRY1 EC_CRY2 C766

GND
GND
GND
GND
GND
1 1 4.7U_0805_10V4Z
C764 C765 KB926QFD3_LQFP128_14X14 2
11
24
35
94
113
69
1
15P_0402_50V8J 15P_0402_50V8J
20mil L9
OSC
OSC
A 2 2 A
ECAGND 2 1
FBMA-L11-160808-800LMT_0603
NC
NC

2
1.Use crystal X2,remove R13. 2009/4/15 2010/04/15 Title

2.Use PCH_SUSCLK,remove X1. Issued Date Deciphered Date
X2
32.768KHZ_12.5PF_Q13MC14610002 20091103
EC ENE KB926
B 1.0
5 4 3 2 1
KSI[0..7]
To TP/B Conn. TP_CLK LEFT_BTN#
KSI[0..7] <30>
JTP1
KSO[0..17] 1 TP_DATA RIGHT_BTN#
KSO[0..17] <30> +5VS 1
TP_CLK 2
<30> TP_CLK 2
3
JKB1 TP_DATA 3
<30> TP_DATA 3
LEFT_BTN# 4 D14 D16
KSO0 RIGHT_BTN# 4
(Left) KSO1
26
KSO0 G2
28 5
5 PJDLC05C_SOT23-3 PJDLC05C_SOT23-3
25 27 6
KSO2 KSO1 G1 6
24 1 1 7
KSO3 KSO2 GND
23 8
KSO4 KSO3 C771 C772 GND
22
KSO5 KSO4 ACES_85201-0605N
21 100P_0402_50V8J 100P_0402_50V8J
KSO6 KSO5 2 2 CONN@
20
1
KSO7 KSO6
19
KSO8 KSO7
18
KSO9 KSO8
17
KSO10 KSO9
16
KSO11 KSO10
15
KSO12 KSO11 +5VS SW1 SW2
14
KSO13 KSO12 SMT1-05-A_4P SMT1-05-A_4P
13
KSO14 KSO13 LEFT_BTN# 3 RIGHT_BTN# 3
12 1 1
KSO15 KSO14 C773
11
KSO16 KSO15
10 4 2 4 2
KSO17 KSO16 0.1U_0402_16V4Z
9
KSI0 KSO17
8
5
6
5
6
KSI1 KSI0
7
KSI2 KSI1
6
KSI3 KSI2
5
KSI4 KSI3
4
KSI5 KSI4
3
KSI6 KSI5
2
KSI7 KSI6
1
KSI7
(Right)
ACES_88747-2601
CONN@
KSO16 C774 1 2 100P_0402_50V8J

KSO15 C775 1 2 100P_0402_50V8J
KSO17 C776 1 2 100P_0402_50V8J
KSO14 C777 1 2 100P_0402_50V8J +3VALW 1 2 C770 1 2 0.1U_0402_16V4Z
R853 0_0603_5%
KSO13 C778 1 2 100P_0402_50V8J KSO7 C779 1 2 100P_0402_50V8J
+SPI_VCC
KSO12 C780 1 2 100P_0402_50V8J KSO6 C781 1 2 100P_0402_50V8J
U30 @
KSO5 C782 1 2 100P_0402_50V8J EC_SPICS#/FSEL# 1 8
<30> EC_SPICS#/FSEL# CE# VDD
KSI0 C783 1 2 100P_0402_50V8J R854 1 2 4.7K_0402_5% SPI_WP# 3 6 EC_SPICLK_R R855 1 2 0_0402_5%
WP# SCK EC_SPICLK <30>
KSO4 C784 1 2 100P_0402_50V8J +3VALW R856 1 2 4.7K_0402_5% SPI_HOLD# 7 5 R857 1 2 0_0402_5%
HOLD# SI EC_SO_SPI_SI <30>
KSO11 C785 1 2 100P_0402_50V8J 4 2 R858 1 2 0_0402_5%
VSS SO EC_SI_SPI_SO <30>
KSO10 C786 1 2 100P_0402_50V8J KSO3 C787 1 2 100P_0402_50V8J MX25L8005M2C-15G_SOP8
KSI1 C788 1 2 100P_0402_50V8J KSI4 C789 1 2 100P_0402_50V8J
KSO2 C790 1 2 100P_0402_50V8J

KSI2 C791 1 2 100P_0402_50V8J
KSO1 C792 1 2 100P_0402_50V8J U31
KSO9 C793 1 2 100P_0402_50V8J EC_SPICS#/FSEL# 1 8 +SPI_VCC @ @
SPI_WP# CS# VCC EC_SPICLK_R EC_SPICLK_R
3 6 1 2 1 2
KSI3 C794 1 100P_0402_50V8J KSO0 C795 1 100P_0402_50V8J SPI_HOLD# WP# SCLK EC_SO_SPI_SI R339 10_0402_5% C556 10P_0402_50V8J
2 2 7 5
HOLD# SI EC_SI_SPI_SO For EMI
4 2
KSO8 C796 1 100P_0402_50V8J KSI5 C797 1 100P_0402_50V8J GND SO Close to U31
2 2
MX25L512AMC-12G_SO8
KSI6 C798 1 2 100P_0402_50V8J use 128KB EC ROM SA00002C100
KSI7 C799 1 2 100P_0402_50V8J
ENE suggestion SPI Frequency over 66MHz

SST: 50MHz
MXIC: 70MHz
ST: 40MHz
To BTN/B Conn.
KSO0 KSO3
KSI1 WL_BTN# Program_BTN#

KSI2 T/P lock_BTN#
KSI3 Back up_BTN# Volum up_BTN#
Volum down_BTN#
KSI4 BT_BTN#
KSI5 Power save_BTN#

BIOS, I/O Port & K/B Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
A B C D E
Power Button
+3VALW
2
1 1
R859
100K_0402_5% LED/B LEFT LED/B RIGHT +3VS
1
D15 JLED1 JLED2
2 ON/OFF <30> 1 +3VALW 1 +3VALW
1 1
2
ON/OFFBTN# 1 2 LID_SW# 2 LID_SW#
2 LID_SW# <30> 2 +3VS
3 51ON# 3 ACIN# 3 @ R864
51ON# <36> 3 3
4 3G_LED# 3G_LED# <30> 4 3G_LED#
DAN202UT106_SC70-3 4 WLAN_LED# 4 WLAN_LED# 10K_0402_5% Q14A
5 WLAN_LED# <30> 5
5 5
2
6 MEDIA_LED# 6 MEDIA_LED# 2N7002DW-T/R7_SOT363-6
1
6 6
D15 7 7 +3VS 7 7 +3VS
8 PWR_LED# 8 PWR_LED# 1 6
change to SC600000B00 8
9 ON/OFFBTN# 8
9 ON/OFFBTN# <29> 5IN1_LED#
9 9 SATA_LED# MEDIA_LED#
10 10 10 10 <13> SATA_LED# 4 3
GND 11 GND 11
GND 12 GND 12
1
D Q14B
5
EC_ON 2 Q25 ACES_85201-1005N Pin define modify ACES_85201-1005N +3VS 2N7002DW-T/R7_SOT363-6
<30> EC_ON 20090917
G CONN@ CONN@
2
S 2N7002_SOT23
3
R860
10K_0402_5% For NEW60 ACIN LED control

20091110
1
LED1
ACIN#
1 7080@ 2 2 1 PWR_LED#
+3VS
1
R619 2.2K_0402_5% B D
2 @
2 <30,35,36> ACIN 2
HT-191NB5_BLUE G Q16
S 2N7002_SOT23
3
LED2
1 7080@ 2 2 1 PWR_SUSP_LED#
+3VALW
R620 3.9K_0402_5% A
HT-191UD5_AMBER
PWR_LED#
6
Q36A
LED3 2N7002DW-T/R7_SOT363-6
<30> PWR_LED 2
1 7080@ 2 2 1 BATT_Blue_LED#
+3VALW BATT_Blue_LED# <30>
1
R621 2.2K_0402_5% B
1
R865
HT-191NB5_BLUE
10K_0402_5%
LED4
2
1 7080@ 2 2 1 BATT_Amber_LED# PWR_SUSP_LED#
BATT_Amber_LED# <30>
R622 3.9K_0402_5% A
3
HT-191UD5_AMBER Q36B
2N7002DW-T/R7_SOT363-6
NEW70 / 80 <30> PWR_SUSP_LED 5
R619/R621 to 2.2Kohm
R620/R622 to 3.9kohm
4
1
20091116 R866
3 10K_0402_5% 3
2
4 4

<Title>
B 1.0
A B C D E
5 4 3 2 1
+3VS +5VAMP 1 2
1 2 R637 0_0805_5%
R334 0_0805_5%
1 2
1
+5VAMP R639 0_0805_5%
U14 R641 R638
+5VS L19 1 2 0.1U_0402_16V4Z 60mil 1 IN
40mil 10K_0402_5% 20K_0402_5%
FBMA-L11-201209-221LMA30T_0805
OUT 5 +VDDA 4.75V 1 2
1 1 2 R640 0_0805_5%
2
L20 1 @ C300 C301 GND
2
FBMA-L11-201209-221LMA30T_0805 3 4 1 2
0.1U_0402_16V4Z SHDN BYP C291 C678
D 2 2 G9191-475T1U_SOT23-5 0.01U_0402_25V7K MONO_IN D
1 2
@ @ 1U_0402_6.3V4Z GND GNDA
1
C
C679 1 R643
(output = 300 mA) <30> BEEP# 2 1 2 2
B Q42
1
R644
2
2.4K_0402_1%
1U_0402_6.3V4Z 560_0402_5% E 1 2
3
2SC2411KT146_SOT23-3 R645 0_0805_5%
C680 1 R646
2 1 2
<13> PCH_SPKR
1
1U_0402_6.3V4Z 560_0402_5% 1 2
D22 R647 0_0805_5%
CH751H-40PT_SOD323-2
1 2
2
Q42 change to SB324110080 R648 0_0805_5%
GND GNDA
HD Audio Codec
+AVDD_HDA
Place near Codec
40mil
L18 1 2 0.1U_0402_16V4Z
10mil 0.1U_0402_16V4Z +3VS_DVDD L21 1 2
+VDDA +3VS L21 Change to SM010012010
FBMA-L11-160808-800LMT_0603 1 1 1 MBC1608121YZF_0603
C258 C278 20091116
1 1 1
C276 C234 C233 C280
C 10U_0805_10V4Z 10U_0805_10V4Z C
2 2 2
0.1U_0402_16V4Z 2 2 2
25
38
9
U36
Place near Codec 0.1U_0402_16V4Z
DVDD_IO
AVDD1
AVDD2
DVDD
14 35 AMP_LEFT
LINE2_L LOUT1_L AMP_LEFT <34>
272@amp
15 36 AMP_RIGHT
LINE2_R LOUT_R AMP_RIGHT <34>
1K_0402_1% 1 2 MIC2_C_L 16 39
INT_MIC_RR335 2 INT_MIC C259 4.7U_0603_6.3V6K MIC2_L LOUT2_L
External MIC 1
1 2 MIC2_C_R 17 41
C279 4.7U_0603_6.3V6K MIC2_R LOUT2_R
23 45
LINE1_L SPDIFO2
C259/C279/C692/C693 24 46
Change to SE107475K80 0603 type LINE1_R DMIC_CLK1/2
20091216 18 43
LINE1_VREFO NC
20 44 1 2 1 2 C231
LINE2_VREFO DMIC_CLK3/4 R336 0_0402_5% 22P_0402_50V8J
Internal MIC REF For EMI
272@ MIC2_VREFO 19
MIC2_VREFO
6 HDA_BITCLK_AUDIO <13>
MIC1_L MIC1_C_L BITCLK
<34> MIC1_L 1 2 21
MIC1_L
C692 4.7U_0603_6.3V6K
MIC1_R 1 2 MIC1_C_R 22 8 HDA_SDIN0_AUDIO 1 2
<34> MIC1_R MIC1_R SDATA_IN HDA_SDIN0 <13>
C693 4.7U_0603_6.3V6K R301 33_0402_5%
MONO_IN 12 37
PCBEEP_IN MONO_OUT
B B
29
CBP 2.2U_0402_6.3VM
<13> HDA_RST_AUDIO# 11
RESET# C277 1
31 2
CPVEE
<13> HDA_SYNC_AUDIO 10
SYNC 10mil External MIC REF 1
28 MIC1_VREFO 272@
MIC1_VREFO C274
<13> HDA_SDOUT_AUDIO 5
SDATA_OUT HP_RIGHT
32 HP_RIGHT <34>
HPOUT_R 2 2.2U_0402_6.3VM MIC2_VREFO
2
GPIO0/DMIC_DATA1/2
3 30
R672 2 SENSE_A GPIO1/DMIC_DATA3/4 CBN
<34> MIC_PLUG# 1 20K_0402_1% 13
SENSE A 10mil
R668 2 1 5.11K_0402_1% SENSE_B 34 27 CODEC_VREF C700 1 2 0.1U_0402_16V4Z
<34> HP_PLUG# SENSE B VREF
1
C701 1 2 10U_0805_10V4Z For EMI
<30> EAPD
1
R671
2
0_0402_5%
47
EAPD JDREF
40 R651 1 2 20K_0402_1%
Place next pin27
Int. MIC R673
2.2K_0402_5%
48 33 HP_LEFT 15mil 15mil
SPDIFO1 HPOUT_L HP_LEFT <34>
JP1
2
4 26 1 INT_MIC_L 1 2 INT_MIC_R
DVSS1 AVSS1 1 L53 FBMA-L11-160808-700LMT_2P
7 42 2
DVSS2 AVSS2 2
1
ALC272X-GR_LQFP48_7X7 C702
<BOM Structure> 3
G1 220P_0402_50V7K
4
G2 2
DGND AGND ACES_88266-02001
CONN@
2
@
D23
PJDLC05C_SOT23-3
A A
1
Change to SCA00001100
20090921

HD Audio Codec ALC271X/272X
Custom 1.0
5 4 3 2 1
A B C D E
GAIN0 GAIN1 AV(inv) Ri +5VAMP

0 0 6dB 90k
0 1 10dB 70k 0.1U_0402_16V4Z
1 1
1 0 15.6dB 45k C705 C706 10 dB
1 1 21.6dB 25k 10U_0805_10V4Z
2 2 +5VAMP
1
16
15
6
U37 R678 @ R679
100K_0402_5% 100K_0402_5%
PVDD1
PVDD2
VDD
1 1
2
C708 1 2 0.47U_0603_10V7K 7 2 GAIN0
RIN+ GAIN0
3 GAIN1
GAIN1
1
1 2 1 2 AMP_C_RIGHT 17
<33> AMP_RIGHT C707 0.47U_0603_10V7K R680 0_0603_5% RIN- SPKR+ @ R681 R682
18
ROUT+ 100K_0402_5% 100K_0402_5%
14 SPKR-
2
C709 1 ROUT-
2 0.47U_0603_10V7K 9 LIN+
4 SPKL+
LOUT+
1 2 1 2 AMP_C_LEFT 5
<33> AMP_LEFT C710 0.47U_0603_10V7K R683 0_0603_5% LIN- SPKL-
LOUT- 8
NC 12
EC_MUTE# BYPASS 10 Keep 10 mil width

<30> EC_MUTE# 19 SHUTDOWN
2
GND5
GND1
GND2
GND3
GND4
C711
0.47U_0603_10V7K
1
21
20
13
11
1
2 2
TPA6017A2PWPR_TSSOP20
(Use NAL00 PCB Footprint)

2 2
C712 C713
Headphone Out
330P_0402_50V7K 330P_0402_50V7K
1 1 JHP1
1
<33> HP_LEFT R686 1 2 56.2_0603_1% HPOUT_L_1 1 2 HPOUT_L_2 2
L55 FBMA-L11-160808-700LMT_2P
<33> HP_RIGHT R685 1 2 56.2_0603_1% HPOUT_R_1 1 2 HPOUT_R_2 3
L56 FBMA-L11-160808-700LMT_2P
4
HP_PLUG# 5
<33> HP_PLUG#
3
Int. Speaker Conn. 6
3
MIC1_VREFO MIC_PLUG#
Left Side SINGA_2SJ-0960-C01
JSPK1 HP_PLUG# CONN@
SPKL+ R688 1 2 0_0603_5% SPK_L+ 1
SPKL- R689 1 SPK_L- 1
2 0_0603_5% 2
2 Headphone Out
2
20mil D27 D28
3 CH751H-40PT_SOD323-2 CH751H-40PT_SOD323-2
G1
3
4
G2
1
ACES_88266-02001 D24
CONN@ PJDLC05C_SOT23-3
@
1
D26
1
PJDLC05C_SOT23-3
R692 R693 MIC JACK
4.7K_0402_5%
1
4.7K_0402_5% JMIC1
2
1
Right Side R694 1 2 MIC1_L_1 L57 1 2 MIC1_L_R 2
<33> MIC1_L
1K_0603_1% FBMA-L11-160808-700LMT_2P
JSPK2 R695 1 2 MIC1_R_1 L58 1 2 MIC1_R_R 3
SPKR+ R690 1 SPK_R+ <33> MIC1_R
2 0_0603_5% 1 1K_0603_1% FBMA-L11-160808-700LMT_2P
1
3
SPKR- R691 1 2 0_0603_5% SPK_R- 2 1 1 4
2
C714 C715 MIC_PLUG# 5
<33> MIC_PLUG#
3 220P_0402_50V7K 220P_0402_50V7K
G1
3
4 2 2
G2 D30
ACES_88266-02001 PJDLC05C_SOT23-3 6
4 4
CONN@
@ SINGA_2SJ-A960-C01
1
D25 CONN@
PJDLC05C_SOT23-3
1
D25 / D26 Change to SCA00001100 for ESD Security Classification Compal Secret Data Compal Electronics, Inc.
20090921 2008/08/10 2009/08/10 Title
Amplifier & Audio Jack
Custom 1.0
A B C D E
A B C D E
+5VALW
+5VALW TO +5VS
2
+5VALW +5VS R932
100K_0402_5%
4
U25
5 PJ13
1
6 3 2 1 +1.05VS
+1.05VS_VTT 2 1
2
10U_0805_10V4Z
10U_0805_10V4Z
1U_0603_10V4Z
7 2 1 1 SYSON#
<29> SYSON#
470_0603_5%
1 1 8 1 C845 C842 R933 @ JUMP_43X118
6
10U_0805_10V4Z
PJ12
2 2
C843 C844 SI4800BDY-T1-E3_SO8 2 2 1 1 Q57A
1
1 2 2 @ JUMP_43X118 SYSON 1
<30,42> SYSON 2
2N7002DW-T/R7_SOT363-6
1
R934
Q56B 100K_0402_5%
+VSB 2 1 5VS_GATE 2N7002DW-T/R7_SOT363-6 5 SUSP
R935
2
200K_0402_5% 1
4
6
C846
Q56A 0.1U_0603_25V7K
SUSP 2 2
2N7002DW-T/R7_SOT363-6
1
+3VALW TO +3VS
+3VALW +3VS +3VS +3VS
4
U26 +5VALW
5 1 2 1 2
6 3 C40 560P_0402_50V7K C45 560P_0402_50V7K
2
7 2 1 1 1 2 1 2
470_0603_5%
10U_0805_10V4Z
1 1 8 1 C849 C850 1U_0603_10V4Z R936 C41 560P_0402_50V7K C46 560P_0402_50V7K R937

10U_0805_10V4Z
10U_0805_10V4Z
C847 C848 1 2 1 2 100K_0402_5%

C42 560P_0402_50V7K C47 560P_0402_50V7K
SI4800BDY-T1-E3_SO8 2 2 1 2 1 2
1 1
1
2 2 2 C43 560P_0402_50V7K C48 560P_0402_50V7K SUSP 2
D <41> SUSP
1 2
2 SUSP C44 560P_0402_50V7K
3
G
S Q59
3
5VS_GATE 2N7002_SOT23 Q57B

<30,39,41,43> SUSP# 5
For EMI For LAM Common mode noise 2N7002DW-T/R7_SOT363-6
200911092130 200911102330
4
1
R938
10K_0402_5%
+1.5V to +1.5VS
2
+1.5V +1.5VS
SI4856ADY_SO8
5
D G 4
6
D S 3
7
D S 2 1 1
2
8 C851 C854
C852
1
C853
1 D S 1 R939
U24 10U_0805_10V4Z 470_0603_5%
10U_0805_10V4Z 2 2
1U_0603_10V4Z
2 2
10U_0805_10V4Z
3 1
Q31B
2 1 1.5VS_GATE 2N7002DW-T/R7_SOT363-6 5 SUSP
+VSB
R940
3 47K_0402_5% 3
1
4
C855
6
0.1U_0603_25V7K
Q31A 2
SUSP 2 2N7002DW-T/R7_SOT363-6
2
1
R941
2.2M_0402_1%
U24 / U25 / U26 Change to SB548000320
@
20090922
1
1
D
2N7002_SOT23
<30,32,36> ACIN 2
G Q60
S @
3
+1.05VS_VTT +0.75VS +1.8VS +1.5V

2
R942 R943 R944 R945

470_0603_5% 22_0402_5% 470_0603_5% 470_0603_5%
@
4 4
1
1
1
D D D D
2 SUSP 2 SUSP 2 SUSP 2 SYSON#
G G G G
S Q61 S Q62 S Q63 S Q64
3
2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23

@ Security Classification Compal Secret Data Compal Electronics, Inc.
DC Interface
B 1.0
A B C D E
A B C D
VIN
VIN
1 1
PL24 PR295
PJP1 SMB3025500YA_2P 1M_0402_1%
1
DC_IN_S1 1 2DC_IN_S2 1 2
1 PR296
2 VIN
3
10K_0402_5% VS
4
1
2
GND
1
PC208 PR297
GND PC206 PC207 100P_0402_50V8J PC209 84.5K_0402_1%
ACES_50305-00441-001 1000P_0402_50V7K 100P_0402_50V8J 1000P_0402_50V7K <39,40> PACIN PR298
8
PR299 22K_0402_5%
2
10K_0402_5% 3 1 2
P
+
1 2 1 O
<30,32,35> ACIN
20K_0402_1%
- 2
1
PR301
PU18A
1
PC210
LM393DG_SO8 PC211
0.1U_0603_25V7K
4
PR302 PD1 1000P_0402_50V7K
2
10K_0402_1% GLZ4.3B_LL34-2
2
2
2
PR303
10K_0402_1%
1 2
RTCVREF
2
Vin Dectector 2
Min. Typ Max.

H-->L 16.976V 17.525V 17.728V
L-->H 17.430V 17.901V 18.384V
PJ6 PJ2
+3VALWP 2 2 1 1 +3VALW 2 2 1 1 +VGFX_CORE
+VGFX_COREP
VIN JUMP_43X118 JUMP_43X118
PJ4
2 2 1 1
2
JUMP_43X118
PD2 PJ8
LL4148_LL34-2 2 1
+5VALWP 2 1 +5VALW
PD3 JUMP_43X118 PJ5
1
LL4148_LL34-2 +1.5VP 2 1 +1.5V

3
2 1 3
BATT+ 2 1
1
JUMP_43X118
PR304 PR305 PJ7
PJ11
PQ42 68_1206_5% 68_1206_5% 2 2
TP0610K-T1-E3_SOT23-3 1 1
+VSBP 2 2 1 1 +VSB
PR306 JUMP_43X118
2
200_0603_5% JUMP_43X39
CHGRTCP 1 2 N1 3 1
VS PJ9
2 2 1 1 +1.05VS_VTT
+1.05VS_VTTP
1
PR307 PC213 JUMP_43X118

100K_0402_1% PC212 0.1U_0603_25V7K PJ10
0.22U_0603_25V7K PJ14 2 2 1 1
2
PR308 2 1
+1.8VSP +1.8VS
2
22K_0402_1% 2 1 JUMP_43X118
1 2 JUMP_43X118
<32> 51ON#
PJ17
RTCVREF +0.75VSP 2 2 1 1 +0.75VS
1
PR309 JUMP_43X79
PU14 200_0603_5%
PR310 PR311 G920AT24U_SOT89-3
560_0603_5% 560_0603_5% 3.3V
2
1 2 1 2 3 2 N2
OUT IN
+CHGRTC
1
4 GND PC215 4
PC214
10U_0805_10V4Z 1
1U_0805_25V4Z - PBJ1 + +RTCBATT
2
2 1
+RTCBATT
ML1220T13RE
<BOM Structure>
DCIN & DETECTOR
Custom 1.0
NALG0
A B C D
A B C D
GND 10
GND 9
8 8
7
PH1 under CPU botten side :
7 EC_SMDA
6 6 CPU thermal protection at 92 degree C
2
5 EC_SMCA
5 TH PR542
4 4
3 PI 100_0402_1%
Recovery at 56 degree C
1
3 1
2 2
1 <40,41>
1
1
2
PJP2
SUYIN_200275GR008G13GZR
VMB PR543
100_0402_1% VL
CONN@ EC_SMB_DA1
PL44
SMB3025500YA_2P
<40,41>
1
BATT_S1 1 2 BATT+ VL
1
EC_SMB_CK1
1
2
PC379 PC380 PR544 PC381 PR545 PR546
1000P_0402_50V7K 0.01U_0402_25V7K 1K_0402_5% 0.1U_0603_25V7K 10K_0402_1% 21K_0402_1% @ PR547
2
2
PR548 100K_0402_1%
6.49K_0402_1%
2
2 1 PU30
+3VALW P
1
1 VCC TMSNS1 8
2
2 7 PR549
GND RHYST1
1
9.53K_0402_1%
2
PR550 3 6
1K_0402_1% OT1 TMSNS2 @ PR551
1
1
4 5 47K_0402_1%
OT2 RHYST2
2
G718TM1U_SOT23-8 PH1
1
100K_0402_1%_NCP15W F104F03RC
BATT_TEMP
2
2
MAINPW ON 2
1
@ PH2
100K_0402_1%_NCP15W F104F03RC
2
PQ44
TP0610K-T1-E3_SOT23-3
B+ 3 1 +VSBP
0.22U_0603_25V7K
0.1U_0603_25V7K
1
1
PC221
PC222
PR325
100K_0402_1%
2
3 3
PR327
2
VL 22K_0402_1%
1 2
2
PR329
100K_0402_1%
PR330
1
0_0402_5% PQ45 D
1 2 2
SPOK G 2N7002W -T/R7_SOT323-3
S
3
1
@ PC224
1U_0402_6.3V6K
2
4 4

BATTERY CONN / OTP
Custom 1.0
NALG0
A B C D
5 4 3 2 1
ISL6237_B+
ISL6237_B+
B+
PR331
PL26
0_0805_5%
1 2 1 2
HCB4532KF-800T90_1812
2200P_0402_50V7K
2200P_0402_50V7K
D D
5
6
7
8
1
PC226
PC228
PC225
8
7
6
5
10U_1206_25V6M PC227
1U_0603_10V6K
VL
10U_1206_25V6M
2
2
2
PC230
PQ46 PC229
4.7U_0603_6.3V6K
AO4466_SO8 0.1U_0603_25V7K 4
3/5V_VCC
1
1
3/5V_VIN
4
PC231
PQ47 +5VALWP
2
AO4466_SO8
3
2
1
PL27
1
2
3
PL28 4.7UH_SIL104R-4R7PF_5.7A_30%
7
4.7UH_SIL104R-4R7PF_5.7A_30% PU16 PC232 2 1
1 2 1U_0603_10V6K
VIN
V5FILT
LDO
+3VALWP 33 19 1 2
TP V5DRV
5
6
7
8
1
PQ49
8
7
6
5
UG3 26 15 HG5 AO4712_SO8
PR332 DRVH2 DRVH1 PR336
0_0402_5%
4.7_1206_5% PQ48 BST3A-1 1 2 BST3A 24 17 BST5A1 2BST5A-1 4.7_1206_5% 1

VBST2 VBST1
2
1 AO4712_SO8 2.2_0603_5% PR333 2.2_0603_5% PR334
2
2
2
+
PR335
PC233 PC237
61.9K_0402_1%
4
13V_SNB
2
220U_6.3VM_R15 + 4 PC234 220U_6.3VM_R15
2
0.1U_0603_25V7K
1
2
@ PR337
SW 3 25 16 SW 5
1
2 PC235 LL2 LL1 PC236
3
2
1
680P_0603_50V7K 0.1U_0603_25V7K PC238
1
2
3
2
2 LG3 23 18 LG5 680P_0603_50V7K
1
DRVL2 DRVL1
@ 10K_0402_1%
2
PGND 22
2
C C
PR338
FB3 30 VOUT2
PR339
0_0402_5%
VOUT1 10
VL 32
1
REFIN2
1
11 FB5
2VREF_ISL6237 FB1
1 2 1 VREF2
PC239
0.22U_0603_25V7K 9
VSW @ PR340
8 LDOREFIN 0_0402_5%
29 5V_SKIP 2 1
SKIPSEL VL
1 2
20 28 PR341
PD7 PR342 NC PGOOD2 0_0402_5%
VS RLZ5.1B LL34 100K_0402_1%
1 2 EN_LDO-1 1 2 EN_LDO 4 13 SPOK <37> For +5VALWP
EN_LDO PGOOD1 PR344
Power Budget=8.8A, Ipeak=7A, I max=4.9A
2
402K_0402_1%
200K_0402_5%
Fsw=300KHz by RT8206 setting.

PR343
PC240 3/5V_EN1 14 12 ILM1 2 1

0.22U_0603_25V7K EN1 TRIP1
VL VS
I=2.61A, 1/2I=1.306A
TONSE
VREF3
5uA*PR344=10*Iocpmin*18m*1.3
1
27 31 ILIM2 2 1
GND
1
EN2 TRIP2 =>PR344=397K~402K

PR345
2
2
RT8206BGQW QFN 32P 267K_0402_1%
5uA*402K=10*ILIMTmin*18m*1.3
21
1
B PR552 @ PR346 B
806K_0603_1% PD8 0_0402_5% ILIMTmin=8.589A
13/5V_NC
1SS355_SOD323-2 PR347 5uA*402K=10*ILIMTmax*15m*1.1
13/5V_TON
0_0402_5%
1
ILMIT=12.181A
@
PR349 1U_0603_10V6K
2
Iocp=9.89A~13.48A
PC241
PR348 47K_0402_5%
2VREF_ISL6237
0_0402_5%
<18,37,40> MAINPWON 2 1 1 2
2
For +3VALWP
PR350 Power Budget=4.72A, Ipeak=4.72A, Imax=4A
0.047U_0402_16V7K
@ 0.047U_0402_16V7K
0_0402_5%
Iocpmin=4.72*1.2=5.664~5.7A
1
080414:PQ23 ,Del @
2
Fsw=375KHz, I=1.547A, 1/2I=0.773A

PC242
PC243
3
5uA*PR345=10*Iocpmin*Rdsonmax*1.3
2
5uA*PR345=10*5.7A*18m*1.3
PR345=266.76K~267K
2VREF_ISL6237
2
PQ50
TP0610K-T1-E3_SOT23-3 5uA*267K=10*ILIMTmin*18m*1.3
ILIMTmin=5.705A
5uA*267K=10*ILIMTmax*15m*1.1
1
ILIMTmax=8.09A
Iocp=6.47A~8.86A
A A

3VALW/5VALW
Custom 1.0
MB Schematic
5 4 3 2 1
A B C D
Iada=0~4.74A(90W/19V=4.736A)
ADP_I = 19.9*Iadapter*Rsense
CP = 85%*Iada ; CP = 4.07A B+
Iada=0~3.42A(90W/19V=3.421A) CP = 85%*Iada ; CP = 2.91A
P2 P3 B+ CHG_B+
PQ51 AO4407A_SO8 PQ52 AO4407A_SO8 PR351 0.02_2512_1% PL45 PQ53 AO4407A_SO8
HCB4532KF-800T90_1812
VIN 8 1 1 8 1 4 1 2 1 8
7 2 2 7 2 7
6 3 3 6 2 3 CSIN 3 6
5 5 5
10U_1206_25V6M
10U_1206_25V6M
2200P_0402_25V7K
0.1U_0603_25V7K
1 1
CSIP PR352
5600P_0402_25V7K
4
4
1
1
PC244
PC245
47K_0402_1%
VIN
PC246
PC247
PQ54 TP0610K-T1-E3_SOT23-3 1 2
PC248
2
1
3 1 DCIN
1
P3
2
PR353 PD9
1
47K_0402_1% PR356 ACOFF
100K_0402_1%
0.1U_0603_25V7K
1 2
1
PR354 PQ55 10K_0402_1%
1
PC249
PR355
200K_0402_1% PDTC115EU_SOT323 1SS355_SOD323-2
2
PR357
1 1
PD10 200K_0402_1%
2
PR358 2 FSTCHG 1 2
FSTCHG <30> VIN
2
3
2 1 2 1
47K PQ56 PD11 1SS355_SOD323-2 3 SUSP#
PDTA144EU_SOT323-3 1 2 6251VDD 100K_0402_1% SUSP# <30,35,41,43> PQ57 PD12
2 BAS40CW _SOT323-3 PDTC115EU_SOT323 2 1 2
2.2U_0603_6.3V6K
47K
PC250
PR359
3
1
10K_0402_5% wrong Value 1SS355_SOD323-2
2 1 PU17 PC252
<30> FSTCHG
1
0.1U_0603_25V7K
0.1U_0603_25V7K
2
1
PQ58 1 2 1 24 DCIN 2 1 PQ61D
1
VDD DCIN
1
1
PC253
PDTC115EU_SOT323 PR360 47K_0402_5% PC251 2 PACIN
100K_0402_1%
6251VDD 1 2 0.1U_0402_16V7K 2N7002W
G -T/R7_SOT323-3
PR362
2 PR361 2 23 S
3
ACSET ACPRN
1
150K_0402_1% PR363
PQ60 20_0402_5%
2
2
1
PQ59 D PDTC115EU_SOT323 6251_EN CSON

3 EN CSON 22 1 2
2
2 PC254
3
5
6
7
8
G 2N7002W -T/R7_SOT323-3 2 0.047U_0402_16V7K
<30> 3S/4S#
S 4 21 1 2 CSOP PQ62
3
1
CELLS CSOP PR364 AO4466_SO8
2
PC255 6800P_0402_25V7K 20_0402_5% 2
3 1 2 5 ICOMP CSIN 20 2 1
1
2
PQ63 D PR365 4
PC257 20_0402_5%
2
G 2N7002W -T/R7_SOT323-3 1 2 1 PR366 2 10K_0402_1% 6 19 0.1U_0603_25V7K
1 2 TCR=50ppm / C
<40,41>
1
PR368 VCOMP CSIP PR367 PL29
S
3
PC256 1 2 100_0402_1% 2_0402_5% 10UH_PCMB104T-100MS_6A_20% BATT+
3
2
1
ACON 0.01U_0402_25V7K PC258 1 2 7 18 LX_CHG 1 2 CHG 1 4 PR369
<40> ACON ICM PHASE
@ 100P_0402_50V8J 0.02_1206_1%
4.7_1206_5%
5
6
7
8
1
<30> ADP_I 2 3
PR370
PR371 PC259 6251VREF 8 17 DH_CHG
22K_0402_5% PR372 VREF UGATE PR373 PC260
1 2
PACIN 80.6K_0402_1% 0_0603_5% 0.1U_0603_25V7K
10U_1206_25V6M
10U_1206_25V6M
<36,40> PACIN 1 2
2 1 0.1U_0402_16V7K 9 16 BST_CHG 1 2 BST_CHGA 2 1 PQ64 @
2
<30> IREF CHLIM BOOT
1
PD13 4
0.01U_0402_25V7K
AO4466_SO8
1
1
PC263
PC264
PQ65 PR375
1
PC261
PDTC115EU_SOT323 PR374 6251VREF 1 6251aclim 6251VDDP
680P_0402_50V7K
2 10 ACLIM VDDP 15
PC262
C262
100K_0402_1% RB751V-40_SOD323-2
2
2
1
PR377
2.55K_0402_1%
12.1K_0402_1% 20K_0402_1% 1 26251VDD
3
2
1
2
ACOFF 2 PR378 11 14 DL_CHG @
@P
<30,40> ACOFF
2
1 VADJ LGATE
2
PR376
4.7_0603_5%
12 13 PC265
2
1
GND PGND 4.7U_0603_6.3V6K
3
2
1
PQ66 D ISL6251AHAZ-T_QSOP24
2
<30> 65W/90W# G 2N7002W -T/R7_SOT323-3
S
3
3
CP mode 3
VMB
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05) <40,41>
where Vaclm=1.502V, Iinput=4.07A PR379
15.4K_0402_1%
1
1 2
<30> CALIBRATE#
2
VS PR380
PR381 LI-3S :13.5V----BATT-OVP=1.5012V 340K_0402_1%
CC=0.6~4.48A Ki 31.6K_0402_1%
2
Vchlim=Iref*(PR374/(PR372+PR374)) BATT-OVP=0.1112*VMB
0.01U_0402_25V7K
IREF=0.7224*Icharge =Iref*(100K/(80.6K+100K))
1
=Iref*0.5537 Per cell=3.5V

Ki=0.7224
PC266
Ichanrge=(165mV/PR369)*(Vchlim/3.3V)
1
=(165m/20m)*(1/3.3V)*Iref*0.5537
IREF=0.43V~3.24V =1.3842*Iref PR382
2
Iref=0.7224*Ichanrge =>Ki=0.7224 499K_0402_1%
Kv
2
8
Rinternal ic=514K Rec=3K R1=PR379=15.4K R2=PR381=31.6K PR383 PU13B
R=514K//31.6K//(15.4K+3k)=11.372K 10K_0402_1% LM358DT_SO8 5
P
r=514K//514K//31.6K=28.14K +
1 2 7 0
Vcell=0.175*Vadj+3.99v <30> BATT_OVP 6
-
G
4.2V=0.175*Vadj+3.99V =>Vadj=1.2V
1
Vadj=Vref*(R/(R+514K))+CALIBRATE*(r/(r=514K))
0.01U_0402_25V7K
4
1
1.1483=CALIBRATE*0.6046 =>CALIBRATE=1.899 PR384
PC267
1.899=(4.2-(Vcell+A*0.175))*Kv=(4.2-(4.2+A*0.175))*Kv 105K_0402_1%
Charging Voltage A=Vref*(R/(R+514K))=0.052
BATT Type CV mode
2
Kv=9.451
(0x15)
2
4 4
Normal 3S LI-ON Cells

12600mV 12.60V

-
CHARGER
Custom 1.0
NALG0
A B C D
5 4 3 2 1
D D
PR385 B+
VL 2.2M_0402_5% PR386
2 1 1K_1206_5%
1 2
TP0610K-T1-E3_SOT23-3
PR388 PQ67
PD14
1
VIN 1K_1206_5%
PR387 2 1 1 2 3 1
B+
VS 499K_0402_1%
1
PR390
PR389 LL4148_LL34-2 1K_1206_5%
2
100K_0402_1% 1 2
100K_0402_5%
100K_0402_5%
1
1
PR392
PU18B PR391
2
PR393
<18,37,38> MAINPWON PD15 LM393DG_SO8 1K_1206_5%
2
2 5 1 2
P
C + C
1 7 O
<39> ACON 3 6
0.01U_0402_25V7K
2
-
G
1
32.4
PC270
BAS40CW _SOT323-3 PR394
1000P_0402_50V7K
4
1
PC269 191K_0402_1%
PC268 PR395
2
0.1U_0603_25V7K
2
PRG++ 2
1
499K_0402_1%
PR396
1
100K_0402_5%
PQ68
PDTC115EU_SOT323
1 2
PR397 1 PR398
34K_0402_1% PQ69D 47K_0402_5% <30,39> ACOFF 2
2 1 2 2 1 PQ70
RTCVREF 2N7002W
G -T/R7_SOT323-3 PACIN <36,39> PDTC115EU_SOT323
1
S
3
PQ71 2
3
1
PDTC115EU_SOT323
@ PR399
66.5K_0402_1% 2 +5VALW
3
2
ACIN
Precharge detector
Min. typ. Max.
B B
H-->L 14.589V 14.84V 15.243V
L-->H 15.562V 15.97V 16.388V
BATT ONLY
Precharge detector
Min. typ. Max.
H-->L 6.138V 6.214V 6.359V
L-->H 7.196V 7.349V 7.505V
A A

PRECHARGE
Custom 1.0
NALG0
5 4 3 2 1
5 4 3 2 1
D D
C C
PL30
2.2UH_PCMC063T-2R2MN_8A_20% +1.8VSP
LX_1.8V 1 2
2
VFB=0.8V PR405
2
316K_0402_1%
1
PR553
PU20 1.8V_EN 4.7_1206_5% PC278 PC279
1
PR407 MP2121DQ-LF-Z_QFN10_3X3 22U_0805_6.3V6M 22U_0805_6.3V6M
2
402K_0402_1%
1
1 2 1 FB EN/SYNC 10
1
PC281 2 9
0.01U_0402_16V7K GND GND PC382
1 2 3 8 680P_0402_50V7K
2
SW SW
+5VALW 4 IN IN 7
1
B 1 2 5 6 B
BS POK
1
PR554 @ PD16
PC282
10U_0805_10V4Z
PC283
10U_0805_10V4Z
0_0402_5%
TP 11
B340A_SMA2
+1.5VP
2
1
PJ20
1
JUMP_43X79
2
PU21
2
1 VIN VCNTL 6 +3VALW
2 GND NC 5
1
1
PR401 PC284 3 7 PC285
22K_0402_5% 4.7U_0603_6.3V6K PR408 REFEN NC 1U_0402_6.3V6K
2
<30,35,39,43> SUSP# 1 2 1.8V_EN 1K_0402_1% 4 VOUT NC 8
@ PD17 9
2
RB751V-40_SOD323-2 GND
2 1 APL5336KAI-TRL SO8
1
PC274 PR409
0.1U_0402_16V7K
+0.75VSP
1
0.47U_0603_16V7K 20K_0402_5% PQ72 D
2
<35> SUSP
PC286
1 2 2 PR410
1
G 2N7002W -T/R7_SOT323-3
2
1
S PC288
3
A PC287 1K_0402_1% 10U_0805_6.3V6M A
2
0.1U_0402_16V7K 2

+1.8VSP/+0.75VSP
Custom 1.0
NALG0
5 4 3 2 1
A B C D
PL31
FBMA-L18-453215-900LMA90T_1812
B+
51117_1.5V_B+ 2 1
EN_PSV
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1. GND=>Disable SMPS
2. FLOAT=>PWM_only mode
1
3. HIGH=>Auto_skip mode
PC289
PC290
PC383
560P_0402_50V7K
5
6
7
8
Because +1.5VSP has 17.74A power budget, it includes
2
PQ73
1
DDR3, VGA chip, VRAM, so must use molding choke. AO4466_SO8 1
PR411 4
280K_0402_1%
1 2
PR412
0_0402_5%
3
2
1
1 2 1.5V_EN BST_1.5V
1
<30,35> SYSON
1
@ PR413 PR414 PL32
15
14
PC292
+1.5VP
1
47K_0402_5% @ PC291 PU22 2.2_0603_5% 1UH_FDUE1040D-1R0M-P3_21.3A_20%
0.1U_0402_16V7K 1 2BST_1.5V-1 1 2 1 2
EN/DEM
NC
BOOT
2
2
2 13 UG_1.5V 0.1U_0603_25V7K
TON UGATE
1
3 12 LX_1.5V
VOUT PHASE
5
6
7
8
PR415 1
4 11 +5VALW PQ74 4.7_1206_5%
VDD CS AO4456_SO8 + PC293
2
5 10 330U_6.3V_M
PR416 FB VDDP
1
100_0603_1% LG_1.5V 2
6 9 4
open-drain PGOOD LGATE
PGND
1 2 PC294
GND
+5VALW
680P_0603_50V7K
2
1
11K_0402_1%
1
@ PC297 RT8209BGQW _W QFN14_3P5X3P5 PC295
3
2
1
1
4.7U_0805_10V6K
PR417
47P_0402_50V8J
2
PC296 1 2
4.7U_0603_6.3V6K
2
2
2
Rds=4.5m(Typ) 2
PR418 5.6m(Max)
5.9K_0402_1% VFB=0.75V
1 2
1
PR419 VFB=0.75V
5.76K_0402_1%
Vo=VFB*(1+PR418/PR419)=1.52V
2
Freq=282KHz(min) , 300KHz(typ)
Cesr=15m ohm
Ipeak=15.82A
Iocpmin=18.98A
I=((19-1.5)*(1.5/19))/(L*Freq)=4.899A
1/2I=2.449A
Iocp=18.09A~29.13A
3 3
4 4

1.5VP
Custom 1.0
NALG0
A B C D
5 4 3 2 1
PL37
FBMA-L18-453215-900LMA90T_1812
2 1 6268_B+
B+
PR458 +3VS
0_0402_5%
560P_0402_50V7K
560P_0402_50V7K
10U_1206_25V6M
10U_1206_25V6M
1 2
LX_1.05VS_VTT
1
H_VTTPWRGD <5>
2K_0402_1%
PC384
PC385
PC326
PC327
DH_1.05VS_VTT
PR459
PGOOD=1V PR461
2
BST_1.05VS_VTT
1 2 1 2
@ PR462 2.2_0603_5%
2
D 1K_0402_1% PC328 D
1 2 +5VS 0.1U_0603_25V7K
5
PR463
0_0603_5% PQ82
SI7686DP-T1-E3_SO8
PR464
16
15
8
1
4.7_0603_5%
2
1 2 6268_VCORE_1.05VS_VTT 4
UG
PHASE
BOOT
GND
PGOOD
Layout Note: DCR=2.7m(Typ)
3 14 1 2
VIN PVCC Close IC 3.0m(Max)
3
2
1
PC329
2.2U_0603_6.3V6K
6268_VCORE_1.05VS_VTT
4 VCC 13 DL_1.05VS_VTT PL38
LG 1UH_FDUE1040D-1R0M-P3_21.3A_20%
PU999 1 2 +1.05VS_VTTP
1
APW7138NITRL_SSOP16
1
TPCA8028-H_SOP-ADVANCE8-5
PC330 12
2.2U_0603_6.3V6K PGND
2
PR466 PR467 PR465
57.6K_0402_1% 4.99K_0402_1% PQ83 4.7_1206_5%
1 2 5 11 1 2 TPCA8028-H_SOP-ADVANCE8-5 @
<30,35,39,41> SUSP#
1 2
EN ISEN
PQ95
4 4 1
FSET
1
PC332 + PC333
NC
VO
FB
@ PR468 PC331 680P_0603_50V7K 330U_2.5V_10M
2
10K_0402_5% 0.1U_0402_16V7K
10
3
2
1
3
2
1
C 2 C
2
90.9K_0402_1%
Rdson=2.3m/3.2m
57.6K_0402_1%
Material Note:
1
22P_0402_50V8J
Layout Note: 330uF/9 m, number
1
PR469
Close IC PC334 are 3, Power 1, HW 2
PR470
6800P_0402_25V7K
@ PC999
0.01U_0402_25V7K
2
2
Fsw=1/(PR470*K)=231KHz,
2
1
K=75*10^-12
PC336
PR471
0_0402_5%
+1.05VSP_VTT 1 2 +1.05VS_VTTP
2
Ipeak=25A
PR472 PR473
Imax=17.5A 4.99K_0402_1% 10_0402_1%
Rsen(PR467)=2.2K 1 2 1 2 VTT_SENSE <7>
Iocp=30.96A~42.37A VFB=0.6V
Vo=Vr*((PR472+PR476)/PR476)
=0.6*((5.11K+6.49K)/6.49K)
B
1.07V B
1
PR476
6.49K_0402_1%
2
HW request 2009-1118
A A

+1.1VS_VTTP
Custom 1.0
NALG0
5 4 3 2 1
5 4 3 2 1
Intel Auburndale CPU(Integrate Graphics) Ipeak=22A Imax=15A

OCP calculation : Assume DCR=1.1m ohm
G1=Rn/(Rn+Rsum)=0.617
where Rn=PR277 // (PR274+PH3)=5.875k ohm
Rsum=PR269=3.65k ohm
LL=2*Rdroop*G1*DCR/Ri= 6.96m V/A
D D
where Rdroop=PR271=8.66k ohm, Ri=PR283=1.69k ohm
Iocp=OCP Threshold*Rdroop/LL=24.89A
PL23
FBMA-L18-453215-900LMA90T_1812
B+
2 1 GFX_B+
2
10U_1206_25V6M
10U_1206_25V6M
2200P_0402_50V7K
PR263
1
PC386 @ PC188 0_0603_5% VSS_AXG_SENSE

PC187
PC125
PC126
0.22U_0603_25V7K
1
1
560P_0402_50V7K 0.1U_0402_25V6 PR264
PC190
+5VALW 2 1
2
1 1
2
1_0603_5%
2
2
PC189
1U_0402_6.3V6K PR265 PC191
22.6K_0402_1% 0.22U_0402_6.3V6K
1
1
PR292
GFXVR_IMON <8>
2 1 ISUM+
5
10_0402_1% PC192
1000P_0402_50V7K ISUM-
1 2 BST_GFX 1 2 1 2
<8> VSS_AXG_SENSE
1
C PR266 PC193 PQ39 C

PC194 2.2_0603_5% 0.22U_0603_25V7K 4 SI7686DP-T1-E3_SO8
<8> VCC_AXG_SENSE 330P_0402_50V7K
29
10
11
12
13
14
1 2
2
9
+VGFX_COREP PR293 PC195
DCR=1.1 mOHM
AGND
RTN
VIN
ISUM+
VDD
IMON
BOOT
ISUM
2 1 330P_0402_50V7K
3
2
1
10_0402_1%
PL10
7 15 DH_GFX 0.45UH_PCMB104T-R45MN_25A_20% +VGFX_COREP
VSEN UGATE
6 PU12 16 LX_GFX 4 1
FB ISL62881HRZ-T_QFN28_4X4 PHASE
5
6
7
8
5
6
7
8
5 17 3 2
COMP VSSP
1
4 18 DL_GFX PQ40 PR268 1
VW LGATE
1
PR294 AO4456_SO8 4.7_1206_5%
PR272 2 1 3 19 PR269 PR270 + PC130
PR271 825K_0402_1% PC197 RBIAS VCCP PQ41 3.65K_0805_1% 330U_X_2VM_R6M
47K_0402_1% 4 4 0_0402_5%
2
8.66K_0402_1% 1000P_0402_50V7K 2 20 PR273 AO4456_SO8
PGOOD VID0 2
2 1 1 2 1 2 2 1 1 2 +5VALW
2
147K for CPU 1 21 0_0603_5% PR274 PH3
DPRSLPVR
CLK_EN# VID1
2
PC196 1 2 1 2
47K for GPU
3
2
1
3
2
1
1
100P_0402_50V8J +VGFX_COREP PC199
VR_ON
680P_0603_50V7K 2.61K_0402_1% 10K +-5% TSM0A103J4302RE 0402
VID6
VID5
VID4
VID3
VID2
1
PC201 PC198
2
22P_0402_50V8J 2.2U_0603_6.3V6K
2 1 2 1 1 2 2 1
28
27
26
25
24
23
22
1 2
PR276 PR277
Rds=4.5mOHM(typ)
1
PC200 PR275 8.06K_0402_1% 11K_0402_1% Material Note:

150P_0402_50V8J 17.8K_0402_1% Rds=5.6mOHM(max) Layout Note: 330uF/6 m, number are 3, PW
@ PR279
10K_0402_1% Place near Choke 1 2 1, HW 1, 1 of HW is backup
2
PC202
0.1U_0402_16V7K
B <30> GFX_CORE_PWRGD B
1 2
2
0_0402_5% 2 1 PR280 PC203
0_0402_5% PR281 GFXVR_VID_0 <8> 0.1U_0402_16V7K @ PR284
2 1
0_0402_5% PR282 GFXVR_VID_1 <8> PR283
2 1 100_0402_1%
0_0402_5% PR285 GFXVR_VID_2 <8> PR288 1.69K_0402_1%
2 1
0_0402_5% PR286 GFXVR_VID_3 <8> 82.5_0402_1%
2 1
1
0_0402_5% PR287 GFXVR_VID_4 <8>
2 1 1 2 1 2
0_0402_5% PR289 GFXVR_VID_5 <8>
2 1
GFXVR_VID_6 <8>
2
0_0402_5% 2 1 PR290 PC204
0_0402_5% PR291 GFXVR_EN <8> 0.01U_0402_16V7K @ PC205
2 1
GFXVR_DPRSLPVR <8>
180P 50V J NPO 0402
1
@ PR555 ISUM+
0_0402_5%
2 1 +1.05VS_VTT ISUM-
2009-1214 common circiut modify.
A A

GFX_COREP
C 1.0
NALG0
5 4 3 2 1
8 7 6 5 4 3 2 1
HFM_VID HFM_Icc LL Icc_TDC Icc_Dyn
<7>
H_DPRSLPVR
<7>
<7>
<7>
<7>
<7>
<7>
<7>
PH0 PH1 # of PH Auburndale 45W 1.075 50 1.9m 37 35
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
H H
<7>
H_PSI#
0 1 2 Auburndale 35W 0.975 38 1.9m 29 27
1 1 3 Clarksfield SV 0.95 51 1.9m 38 39
+5VS Clarksfield XE 0.95 65 TBD 48 TBD
1
+CPU_B+ PL39
PR481 FBMA-L18-453215-900LMA90T_1812
10_0603_5%
<30>
VR_ON
2 1 B+ B+
2
G G
10U_1206_25V6M
10U_1206_25V6M
560P_0402_50V7K
2200P_0402_50V7K
1
220U_25V_M
1
499_0402_1%
1
PC339
PC342
PC341
PC387
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
1
1
PC344 +
PC343
2
2
2
+3VS 1U_0603_16V6K
2
5
+3VS PR491 PQ87 2
1
0_0603_5% TPCA8030-H_SOP-ADV8-5
2
2
PR556
PR482
PR483
PR484
PR485
PR486
PR487
PR488
PR489
PR490
2 1
PR492 2.2_0603_5%
2
3K_0402_5% 3212_DRVH1 2 13212_DRVH1_1 4

3K_0402_5%
0_0402_5%
1 PU27
PR493
PGND
1
PR495 0_0402_5% PL40

AGND
48
47
46
45
44
43
42
41
40
39
38
37
0.36UH +-20% ETQP4LR36WFC 24A
1
3
2
1
1 2 CLK_EN# 3212_SW1 1 4
VID0
VID1
VID2
VID3
VID4
VID5
VID6
PH0
PH1
PSI
VCC
DPRSLP
<12> CLK_ENABLE# +CPU_CORE
PR497 0_0402_5%
2
+1.05VS_VTT PR498 PC346

PR494
2 3
5
<12,15> VGATE 1 2 2.2_0603_5% 0.1U_0603_25V7K DCR=1.1m OHM
1
F F
1 36 2 1 2 1
EN BST1
1
1
PR499
4.7_1206_5% PR500
@ PR496 2 35 3212_DRVH1 10_0402_5%
0_0402_5% PWRGD DRVH1 3212_DRVL1 3212_DRVL1
4 4
1 2
2
2
IMVP_IMON 3 34 3212_SW1 PC347
<7> IMVP_IMON IMON SW1
2
PR502 680P_0603_50V7K
1
100_0402_1%
3
2
1
3
2
1
3212_CS_PH1
PR501 PC348 CLK_EN# 4 33 1 2 3212_CS_PH1
5.49K_0402_1% CLKEN SWFB1
0.068U_0402_16V7K
2
CSREF
PQ88
1
1 2 3212_FBRTN 5 32 +5VS TPCA8028-H_SOP-ADVANCE8-5 @ PQ89

FBRTN PVCC TPCA8028-H_SOP-ADVANCE8-5
PC349 PC351 150P_0402_50V8J 12P_0402_50V8J
1
1000P_0402_50V7K 1 2 3212_FB PC352 6 31 3212_DRVL1 +CPU_B+
FB DRVL1 PC350
ADP3212MNR2G_QFN48_7X7
1
PC353 4.7U_0603_6.3V6K
10U_1206_25V6M
2
150P_0402_50V8J PR504 7 30
10U_1206_25V6M
E PR503 COMP PGND E
1.65K_0402_1% 39.2K_0402_1%
2
1
1 2 1 2 1 2
3212_DRVL2
PC354
PC355
2 1 8 29
PR505 5.11K_0402_1% TRDET DRVL2 PR506
2
5
100_0402_1%
+5VS 9 28 1 2 3212_CS_PH2
VARFR SWFB2 PQ90
PR557 TPCA8030-H_SOP-ADV8-5
3212_VRTT 10 27 3212_SW2 2.2_0603_5%
VRTT SW2
2 13212_DRVH2_1 4
2
+3VS
PR507 PR508 TTSense 11 26 3212_DRVH2 3212_DRVH2 PL41
0_0402_5% 0_0402_5% TTSNS DRVH2 PC358 0.36UH +-20% ETQP4LR36WFC 24A
0.1U_0603_25V7K 3212_SW2 4 1
3
2
1
2
12 25 2 1 2 1
1
PR510 GND BST2

3 2
CSCOMP
5
@ 499_0402_1% PR509
CSSUM
SWFB3
CSREF
PWM3
1
RAMP
LLINE
PR511 0_0402_5% 49 2.2_0603_5%

IREF
RPM
OD3
ILIM
AGND PR512
RT
D D
1
2
1 2 4.7_1206_5%
<5> H_PROCHOT#
PR513
13
14
15
16
17
18
19
20
21
22
23
24
3212_DRVL2 4 3212_DRVL2 4 10_0402_5%
1 2
2N7002W-T/R7_SOT323-3
D
PQ94
PC359
162K_0402_1%
1
1
2 3212_VRTT 680P_0603_50V7K
3212_CSCOMP
3212_CSCOMP
3212_CS_PH2
PR514
PR516
3
2
1
3
2
1
2
S 80.6K_0402_1%
3
Avoid high dV/dt
CSREF
+5VS 2.05K @ PQ93 PQ92
2
TPCA8028-H_SOP-ADVANCE8-5 TPCA8028-H_SOP-ADVANCE8-5
1
1
PR515 PR517 PR519

2
PR518 69.8K_0402_1% 649K_0402_1% 2.05K_0402_1% Place PH1 close to

7.32K_0402_1% Connect to input caps PHASE 1 inductor on
2
B+ B+ B+
the same layer
2
C TTSense +CPU_B+ 2 PR520 1 EMI request to mount the caps.(2009-1109) C

1200P_0402_50V7K
1
1
1K_0402_1%
73.2K_0402_1%
560P_0402_50V7K
@
PC360 PC394 PC392 PC390
1
PH6 560P_0402_50V7K 560P_0402_50V7K 560P_0402_50V7K

PR522
0.01U_0402_50V7K
2
2
PR521 PC361
PC362
PC363
0_0402_5% 1000P_0402_50V7K 100K_0402_1%_NCP15WF104F03RC

2
PR523
2
165K_0402_1%
2
CSREF 1 2
2
2
PC364 PR524 137K_0603_1% B+ B+ B+ B+

PH7 1U_0603_16V6K 2 1 3212_CS_PH1
1
100K_0402_1%_NCP15WF104F03RC
1
2 1 3212_CS_PH2
1
@
PC393 @ PC391 PC389 PC388
B PR525 137K_0603_1% 560P_0402_50V7K 560P_0402_50V7K 2200P_0402_50V7K 1000P_0402_50V7K B
2
@
PR526 100_0402_1%
2 1 +CPU_CORE
EMI request to reserve cap.(2009-1109)
VCCSENSE
VCCSENSE <7>
VSSSENSE
VSSSENSE <7>
2 1
PR527 100_0402_1%
A @ A
CPU_CORE
C 1.0
NAV70 M/B LA-5892P Schematic
8 7 6 5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 3

for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
Arrandale CPU of UMA SKU only Arrandale CPU of UMA SKU only 1 pop PQ87,PQ90, un-pop PQ86.
D use 1 LS MOS use 1 LS MOS 0.1 45 2 Delete PQ89, PQ93 SB00000GL00(S TR TPCA8028-H 1N D
2009-1019 to DVT
1 SOP ADVANCE 4 PC A false )
BOM unique. In order to BOM unique for 1SS355, re-link PD8. 0.1 38 Change PD8 from SC1SS355003 to SC100001K00 2009-1019 to DVT
2
Chnage PR500 from SD028100A00(S RES 1/16W 10 +-5% 0402)
CIS link error. CIS link error. 0.1 45 to SD028100A80(S RES 1/16W 10 +-5% 0402 ) 2009-1019 to DVT
3
Chnage PC265 from SE107475M80(S CER CAP 4.7U 6.3V M X5R
BOM unique. BOM unique. 0.1 39 0603 to SE107475K80(S CER CAP 4.7U 6.3V K X5R 0603) 2009-1019 to DVT
4
5
6
Change PC225/PC227 from SE153106K80(S CER CAP 10U 25V K
BOM unique. BOM unique. 38 X6S 1206) to SE142106M80 (S CER CAP 10U 25V M X5R 1206) 2009-1019 to DVT
0.1
7
Change PC339/PC341 from SE153106K80(S CER CAP 10U 25V K
X6S 1206) to SE142106M80 (S CER CAP 10U 25V M X5R 1206)
C 8 BOM unique. BOM unique. 2009-1019 to DVT C
0.1 45 Change PC354/PC355 from SE153106K80(S CER CAP 10U 25V K

X6S 1206) to SE142106M80 (S CER CAP 10U 25V M X5R 1206)
Change PQ83 from SB00000I900(S TR AON6704L 1N DFN)

BOM unique. BOM unique. 0.1 43 2009-1019 to DVT
9 to SB00000GL00(S TR TPCA8028-H 1N SOP)
VTT Power rail commond design. Delete PQ95 SB00000GL00(S TR TPCA8028-H 1N SOP)-X63826BOL11
VTT Power rail commond design. 0.1 43 2009-1019 to DVT
10 Delete PQ95 SB00000I900(S TR AON6704L 1N DFN)-OTHERS
Add PL45 SM010018210(S SUPPRE_ TAI-TECH
Charger, EMI request. EMI request to add a bead to replace Jump to PASS 0.2 39 2009-1105 to DVT
11 EMI test.
HCB4532KF-800T90 1812)
Add PC221 SE000005Z80 S CER CAP .22U 25V K X7R 0603

+VSBP, EMI request. EMI request to add PC221/PC222 to PASS EMI test 0.2 37 2009-1105 to DVT
12 Add PC222 SE042104K80 S CER CAP .1U 25V K X7R 0603
Add PR401 SD028220280 S RES 1/16W 22K 0402 5%
+1.8VSP, BOM error. +1.8VSP EN delete wrong. Must add PR401 and PC274 for 0.2 41 2009-1105 to DVT
13 SUSP# enable. Add PC274 SE026474K80 S CER CAP 0.47U 16V K X7R 0603
Add PR415 SD001470B80 S RES 1/4W 4.7 +-5% 1206
+1.5VP, EMI request. EMI request add snubber for +1.5VP to PASS EMIU test. 0.2 42 2009-1105 to DVT
14 Add PC294 SE025681K80 S CER CAP 680P 50V K X7R 0603
B EMI request add a small cap to reduce high Freq noise. Add PC383 SE074561K80 S CER CAP 560P 50V K X7R 0402 B
+1.5VP, EMI request. 0.2 42 2009-1105 to DVT
15 EMI request change boost R to 2.2 ohm. Change PR414 from SD013000080 to SD013220B80
Add PC384 SE074561K80 S CER CAP 560P 50V K X7R 0402
+1.05VS_VTTP EMI request. EMI request add two small cap to reduce high Freq noise. 0.2 43 2009-1105 to DVT
16 Add PC385 SE074561K80 S CER CAP 560P 50V K X7R 0402
Add PR465 SD001470B80 S RES 1/4W 4.7 +-5% 1206
+1.05VS_VTTP EMI request. EMI request add snubber for +1.05VS_VTTP to PASS EMIU test. 0.2 43 2009-1105 to DVT
17 Add PC332 SE024681J80 S CER CAP 680P 50V J NPO 0603
+1.05VS_VTTP EMI request. EMI request change boost R to 2.2 ohm. 0.2 43 Change PR461 from SD013000080 to SD013220B80 2009-1105 to DVT
18
+1.05VS_VTTP, HW request. HW request to increase +1.05VS_VTTP voltage. 0.2 43 Change PR472 from SD034499180 to SD034649180. 2009-1105 to DVT
19
+GFX_COREP, EMI request. EMI request add a small cap to reduce high Freq noise. 0.2 44 Add PC386 SE074561K80 S CER CAP 560P 50V K X7R 0402 2009-1105 to DVT
20
Add PR268 SD001470B80 S RES 1/4W 4.7 +-5% 1206
+GFX_COREP, EMI request. EMI request add snubber for +1.05VS_VTTP to PASS EMIU test. 0.2 44 2009-1105 to DVT
21 Add PC199 SE024681J80 S CER CAP 680P 50V J NPO 0603
A +GFX_COREP, EMI request. EMI request change boost R to 2.2 ohm. 0.2 44 Change PR266 from SD013000080 to SD013220B80 2009-1105 to DVT A
22

PIR (PWR)
Custom 1.0
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 2 of 3 for PWR

Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
D +CPU_COREP, EMI request. EMI request add a small cap to reduce high Freq noise. 0.2 45 Add PC387 SE074561K80 S CER CAP 560P 50V K X7R 0402 2009-1105 to DVT D
24
+CPU_COREP, EMI request. EMI request change boost R to 2.2 ohm. 0.2 45 Change PR498/PR509 from SD013000080 to SD013220B80 2009-1105 to DVT
25
Add PR499/PR512 SD001470B80 S RES 1/4W 4.7 +-5% 1206
+CPU_COREP, EMI request. EMI request add snubber for +CPU_COREP to PASS EMIU test. 0.2 45 2009-1105 to DVT
Add PC347/PC359 SE024681J80 S CER CAP 680P 50V J NPO 0603
26
+CPU_COREP, Transient LA5892 transient and loadline must change some value
Loadline issue. to meet intel spec. 0.2 45 Change PL40/PL41 from SH000005680 to SH0000012036BM00. 2009-1105 to DVT
27
+CPU_COREP, Transient LA5892 transient and loadline must change some value
Loadline issue. to meet intel spec. 0.2 45 Change PR524/PR525 from SD013120380 to SD013137380. 2009-1105 to DVT
28
+CPU_COREP, Transient LA5892 transient and loadline must change some value Change PC362 from SE074391K80 S CER CAP 390P 50V K X7R 0402
Loadline issue. to meet intel spec. 0.2 45 to SE074561K80 S CER CAP 560P 50V K X7R 0402 2009-1105 to DVT
29
+CPU_COREP, Transient LA5892 transient and loadline must change some value Change PR501 from SD034536180 S RES 5.36K 0402 1%
Loadline issue. to meet intel spec. 0.2 45 to SD034549180 S RES 1/16W 5.49K 0402 1% 2009-1105 to DVT
30
+CPU_COREP, EMI request. +CPU_COREP, EMI request. 0.3 45 Add PC388 SE074102K80 S CER CAP 1000P 50V K X7R 0402 2009-1113 to DVT
C 31 C

+CPU_COREP, EMI request. +CPU_COREP, EMI request. 0.3 45 2009-1113 to DVT
32
+CPU_COREP, cost issue. Becuase SF000000G80 will cost uo, change to SF22004M210.' 0.3 45 Change PC343 from SF000000G80 to SF22004M210. 2009-1113 to DVT
33
Because Intel update IMON RC time constant, update PC348 Change PC348 from SE076103K80 S CER CAP .01U 16V K X7R 0402
+CPU_COREP, IMON issue. to 0.068u to meet spec. 0.3 45 to SE000003J80 S CER CAP 0.068U 16V K X7R 0402 2009-1113 to DVT
34
Because Nippon cost up thier OS-CON cap, so we change Change PC233/PC237 from SF22001M300 S ELE CAP
+3V/+5V cost issue. Nippon cap to Sanyo cap by sourcer request. 0.4 38 220U 6.3V M F60(6.3X5.7) PXC to SF22001M200 S ELE CAP 220U 6.3V 2009-1118 to DVT
35 M B C6 SVPC ESR15
36 +1.05VS_VTTP issue. HW request to increase +1.05VS_VTTP voltage. 0.4 43 Change PR472 from SD034649180 to SD034511180. 2009-1118 to DVT
+1.05VS_VTTP issue. HW request to increase +1.05VS_VTTP voltage. 0.4 43 Chnage PR476 from SD034665180 to SD034649180. 2009-1118 to DVT
37
change PR409 from SD028000080 S RES 0 0402 5% to
+0.75VSP power sequence issue. HW request to adjust power sequence. 0.4 47 2009-1118 to DVT
38 SD028200280 S RES 1/16W 20K 0402 5%.
B Change PL38 from SH000008V80 S COIL 1UH +-20% PCMB103E-1R0MS 20A B
+1.05VS_VTTP issue. +1.05VS_VTTP choke unique to +1.5VP. 0.4 43 2009-1118 to DVT
39 to SH000009U00 S COIL 1UH +-20% FDUE1040D-1R0M=P3 21.3A
In order to phase in 2nd source, change ISL6268 to Change PU26 from SA00001HT80 S IC ISL6268CAZ-T SSOP 16P
+1.05VS_VTTP 2nd source issue. 0.5 43 2009-1208 to PVT
40 APW7138. to PU999 SA00002O600 S IC APW7138NITRL SSOP 16P
Delete PC335 SE075103K80 S CER CAP .01U 25V K X7R 0402

+1.05VS_VTTP 2nd source issue. APW7138 needn't pop PC335. 0.5 43 and change location to PC999. 2009-1208 to PVT
41
HDD LED will flash when plug in adapter, because
HDD LED flash issue. +3VS rise a little. HW request add PC224 to solve it. 0.5 37 Add PC224 SE000000K80 S CER CAP 1U 6.3V X5R 0402 2009-1208 to PVT
42
If add PC224, must change PR330 from 0 to 1K to avoid
HDD LED flash issue. SPOK pin fail. that is add a current limit R on SPOK pin. 0.5 37 Chnage PR330 from SD028000080 to SD028100180. 2009-1208 to PVT
43
Change PL30 from SH000006I80 S COIL 2.2UH +-20% PCMC063T
BOM error. +1.8VSP choke use wrong material. 0.5 41 -2R2MN 8A to SH000009Q00 S COIL 2.2UH 20% MSCDRI-74A-2R2M-E 6.5A 2009-1208 to PVT
44 Unique MP2121 to other project. Add PR554 SD028000080 0 0402 5%
+1.05VS_VTTP issue. HW request to adjust +1.05VS_VTTP Vout. 0.5 43 2009-1208 to PVT
Change PR472 from SD034511180 to SD034499180.
45
Delete PR291 SD028000080.
A +VGFX_COREP issue ISL62881 common circiut update. 0.5 44 Add PR555 SD028000080. 2009-1208 to PVT A
46

PIR (PWR)
Custom 1.0
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 3 of 3

Item Fixed Issue Reason for change Rev. PG# Modify List
for PWR Date Phase
D Sequense issue. Modify sequense by HW request. 0.6 37 Chnage PR330 from SD028100180 S RES 1/16W 1K +-5% 0402 to 2010-0112 to Pre-MP D
24 SD028000080 S RES 1/16W 0 +-5% 0402.
Sequense issue. Modify sequense by HW request. 0.6 37 Delete PC224 SE000000K80 S CER CAP 1U 6.3V K X5R 0402 2010-0112 to Pre-MP
25
EMI issue. Because EMI has power BB on 250MHz, add HS gate R to solve. 0.6 45 Add PR556/PR557 SD013220B80 S RES 1/10W 2.2 +-5% 0603 2010-0112 to Pre-MP
26
Change PL30 from SH000006I80 S COIL 2.2UH +-20% PCMC063T-2R2MN 8A
BOM loss update in DVT. BOM loss update in DVT, change 1.8V choke. 0.6 41 to SH000009Q00 S COIL 2.2UH 20% MSCDRI-74A-2R2M-E 6.5A 2010-0112 to Pre-MP
27
Add PR291 SD028000080 0 0402 5%
Common circiut update. GFX_COREP common circiut update. 0.6 44 Delete PR555 SD028000080 0 0402 5% 2010-0112 to Pre-MP
28
Because Cyntec has qulity issue and can't use in MFG, in Chnage PL29 from SH000005Z80 S COIL 10UH +-20% PCMB104T-100MS 6A
Changer choke issue. order to prevent shortage issue, change to Maglayer. 0.6 39 to SH000009R00 S COIL 10UH +-20% MMD-10DZ-100M-X1 6A 2010-0112 to Pre-MP
29
30
C 31 C
32
33
34
35
36
37
38
B B
39
40
41
42
43
44
45
A A
46

PIR (PWR)
Custom 1.0
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List)

Item Phase PAGE DATE Modifycatio list Purpose
1 09 / 30 Q9 / Q15 / Q65 / Q14 / Q36 / Q19 / Q31 / Q56 / Q57
Change to SB00000AR10
Q4/Q5/Q6/Q7/Q13/Q24/Q25/Q59/Q61/Q62/Q63/Q20
Change to SB570020120
2 DVT 11 / 03 Modify WWAN Mini catd PIN define.
D X1 / X2 Change to SJ132P7KW10. D
Add PCH_SUSCLK net for remove EC crystal.
Remove C147.
Add F2 for RF team.
11 / 05 Add C670 / C671 / C672 / C673 For INTEL
Change C217 to 22U and add C221 22U for CRT issue.
Add P80DATA PD 100Kohm(R51) for EC common design.
11 / 09 Add C40 / C41 / C42 / C43 / C44 for EMI.
11 / 10 Add ACIN#(Q16) for ACIN LED(NEW60)
Add C45 / C46 / C47 / C48 for LAN Common mode noise
Remove net BT_LED#.
11 / 11 Add R14 for MINI1 LED Function.
11 / 16 Add D13/D14/D16/D23/D24/D25/D26/D30 for ESD
Add R836/C760 R338/C555 for RF.
L21 Change to SM010012010
L5 Change to SM01000AX00
Change R619/R621 to 680ohm
Change R620/R622 to 3.9kohm
11 / 16 Y1 Change to SJ100009R00
11 / 17 R841 Change to 8.2k ohm
Update Power SCH
Change T1 to SP050006B00
11 / 18 Change PCH P/N to SA00003N7B0
Change R167 to 470 ohm.
11 / 19 Update Power SCH
3 PVT 12 / 07 C259 / C279 / C692 / C693 Change to SE107475K80 0603 type
12 / 09 Reserved R15 (net LOCAL_DIM) / R16 (net COLOR_ENG_EN) for LVDS function.
C Reserved R307 for +LCDVDD. C
EC Pin36 for WLAN_LED# (output), Pin 17 for MINI1_LED# (input)
EC Pin91 for 3G_LED#(output) & Pin85 for WWAN_LED# (input)
Add R96 PD 100K for LVDS Panel issue.
Add C674 / C675 / C676 For EMI.
Del SW3 Power on SW
12 / 16 U8 change to SA00000U500
12 / 17 R619 / R621 change to 2.2K SD028220180 for LED
Q13 / R477 Change to unpop
R171 Change to pop,R172 change to unpop for Board ID.
Add R777 / R778 For HDMI Issue.Only pop R778.
R751 Change to 2.2K.
4 PRE MP ADD PU R951 / R953
UNPOP D23 for MIC noise issue.
UNPOP R827 / R828, ADD L7 SM070001600 for USB.
01 / 11 Change Q9,Q65,Q15,Q14,Q36,Q19,Q31,Q56,Q57 to SB00000DH00
Change LED1 / LED3 to SC591NB5A30
Del L7, Add R827 / R828.
Del D26 / D25
B B
For NEW50 / NEW90 LED
A 1 9050@ 2 A
R619 680_0402_5%
1 9050@ 2
R620 680_0402_5%
1 9050@ 2
R621 680_0402_5%
1 9050@ 2
R622 680_0402_5% PIR (HW)
Custom 1.0
5 4 3 2 1
www.s-manuals.com

Compal La-5892p r1.0 Schematics

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Compal La-5892p r1.0 Schematics

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A B C D E

NEW70 / 80 / 90 / 50 <LA-5892P> M/B Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

Compal Confidential ZZZ

Model Name NEW70 / 80 / 90 / 50

Fan Control Intel Memory BUS(DDRIII)

MINI Card x2 LAN(GbE) port 0 port 1

Power ON/Off CKT. LS-5892P

Security Classification Compal Secret Data Compal Electronics, Inc.

BTO Option Table BOM Config

EC SM Bus1 address EC SM Bus2 address

Ibex SM Bus address USB Port Table

Security Classification Compal Secret Data Compal Electronics, Inc.

H_FDI_TXN7 G18 D31 AK31 AT34

eDP_TX#1 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_N1 *:Default

JTAG & BPM

2009/2/4 NO STUFF -> R657, R660, R662

R58 2 1 49.9_0402_1% H_CATERR#

<43> H_VTTPW RGD B GND4 GND5

XDP_OBS5 OBSDATA_B0 OBSDATA_D0

B +1.05VS_VTT VCC_OBS_AB VCC_OBS_CD +1.05VS_VTT

0.1U_0402_16V4Z 49 50 R67 1K_0402_5%

NC7SZ08P5X_NL_SC70-5 @ 51 52 XDP_TDO 1 2 +1.05VS_VTT

R68 R69 SDA TD0 XDP_TRST# R70 51_0402_5%

PM_DRAM_PW RGD_R CONN@ SAMTE_BSH-030-01-L-D-A

PROCESSOR (2/6) CLK,JTAG

Intel CRB 1.55 Update

DDR_A_D35 AK7 F8 DDR_A_DQS#1 DDR_B_D38 AJ4 AH2 DDR_B_DQS#4

DDR SYSTEM MEMORY - B

Security Classification Compal Secret Data Compal Electronics, Inc.

1.1V RAIL POWER

AC27 AB10 C91 C92 R76 1 @ 2 1K_0402_1%

V28 AL33 CPU_VID4 <45>

R28 AJ34 1 VCCSENSE <45>

IC,AUB_CFD_rPGA,R1P0 Security Classification Compal Secret Data Compal Electronics, Inc.

PEG & DMI

IC,AUB_CFD_rPGA,R1P0 1U_0402_6.3V4Z 4.7U_0805_10V4Z

Security Classification Compal Secret Data Compal Electronics, Inc.

AT20 VSS1 VSS81 AE34

Security Classification Compal Secret Data Compal Electronics, Inc.

+DIMM_VREFDQA DDR_A_D9 23 24 DDR_A_D13

C134 C133 DDR_A_D10 VSS11 VSS12 DDR_A_D14

+1.5V DDR_A_D26 VSS23 VSS24 DDR_A_D30

2 2 2 2 2 2 2 2 2 2 DDR_A_DQS#6 VSS41 VSS42 DDR_A_DM6

+0.75VS C148 C149

0.1U_0402_16V4Z DDR_B_D18 VSS18 DQ22 DDR_B_D23

1 1 1 1 1 1 1 1 1 1 DDR_B_D35 143 144 2.2U_0603_6.3V4Z 0.1U_0402_16V4Z

10U_0805_6.3V6M 2 2 2 2 2 2 2 2 2 2 DQ41 VSS35 DDR_B_DQS#5

1U_0402_6.3V4Z 1U_0402_6.3V4Z 2 2 CONN@ Reverse Type

+1.05VS_VTT L1 2 1 0.1U_0402_16V4Z 47P_0402_50V8J +3VS L2 2 1 0.1U_0402_16V4Z 47P_0402_50V8J

0.1U_0402_16V4Z 47P_0402_50V8J 10U_0805_10V4Z 0.1U_0402_16V4Z 47P_0402_50V8J

20090915 Add for 3G team 20090915 Add for 3G team

+1.5VS L4 2 1 0.1U_0402_16V4Z 47P_0402_50V8J 47P_0402_50V8J

0.1U_0402_16V4Z 0.1U_0402_16V4Z 47P_0402_50V8J

20090915 Add for 3G team

+CLK_1.5VS Clock Generator

3 IDT: 9LRS3199AKLFT, SA000030P00 3

SILEGO: SLG8SP587V(WF), SA00002XY10

R124 1 2 10K_0402_5% REF_0/CPU_SEL +3VS

Q6 14.31818MHZ 20PF 7A14300003 C191

Security Classification Compal Secret Data Compal Electronics, Inc.

S <21> PCH_JTAG_TDO J2 AF16

R140 2N7002_SOT23 JTAG_TDO SATAICOMPO

PCH_SPI_CLK_1 R142 1 2 0_0402_5% PCH_SPI_CLK BA2 +3VS