UL

A3800
LSI/CSI LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747
LS7083
LS7084
(631) 271-0400 FAX (631) 271-0405

QUADRATURE CLOCK CONVERTER January 2009

PIN ASSIGNMENT - TOP VIEW

FEATURES:
x1 and x4 mode selection
Up to 16MHz output clock frequency

LSI
Programmable output clock pulse width RBIAS 1 8 UPCK
On-chip filtering of inputs for optical or
magnetic encoder applications. V DD (+V ) 7 DNCK
2
TTL and CMOS compatible I/Os

LS7083
+4.5V to +10V operation (VDD - VSS)
LS7083, LS7084 (DIP); V SS (-V) 3 6 x4/x1
LS7083-S, LS7084-S (SOIC) - See Figure 1

Applications: A 4 5 B
Interface incremental encoders to Up / Down Counters
(See Figure 6A and Figure 6B)
Interface rotary encoders to Digital Potentiometers
(See Figure 7)
CLK

LSI
RBIAS 1 8
DESCRIPTION
The LS7083 and LS7084 are CMOS quadrature clock convert-
ers. Quadrature clocks derived from optical or magnetic encod- V DD (+V) 2 7 UP/DN

LS7084
ers, when applied to the A and B inputs of the LS7083 or
LS7084, are converted to strings of Up Clocks and Down Clocks
(LS7083) or to a Clock and an Up/Down direction control V SS (-V) 3 6 x4/x1
(LS7084). These outputs can be interfaced directly with standard
Up/Down counters for direction and position sensing of the en-
A 4 5 B
INPUT/OUTPUT DESCRIPTION:

RBIAS (Pin 1) FIGURE 1

Input for external component connection. A resistor connected
between this input and VSS adjusts the output clock pulse width
(Tow). For proper operation, the output clock pulse width must be
less than or equal to the A, B pulse separation (TOW TPS).
VDD (Pin 2)
Supply Voltage positive terminal.
VSS (Pin 3)
Supply Voltage negative terminal.
A (Pin 4)
Quadrature Clock Input A. This input has a filter circuit to validate
input logic level and eliminate encoder dither.
B (Pin 5)
Quadrature Clock Input B. This input has a filter circuit identical
to input A.
x4/x1 (Pin 6)
This input selects between x1 and x4 modes of operation. A high-
level selects x4 mode and a low-level selects the x1 mode. In x4
mode, an output pulse is generated for every transition at either
A or B input. In x1 mode, an output pulse is generated in one
combined A/B input cycle. (See Figure 2.)
LS7083 - DNCK (Pin 7)
In LS7083, this is the DOWN Clock Output. This output consists of
low-going pulses generated when A input lags the B input.
LS7084 - UP/DN (Pin 7)
In LS7084, this is the count direction indication output. When A in-
put leads the B input, the UP/DN output goes high indicating that
the count direction is UP. When A input lags the B input, UP/DN
output goes low, indicating that the count direction is DOWN.
LS7083 - UPCK (Pin 8)
In LS7083, this is the UP Clock output. This output consists of low-
going pulses generated when A input leads the B input.
LS7084N - CLK (Pin 8)
In LS7084, this is the combined UP Clock and DOWN Clock output.
The count direction at any instant is indicated by the UP/DN output
(Pin 7).
NOTE: For the LS7084, the timing of CLK and UP/DN requires that
the counter interfacing with LS7084 counts on the rising edge of the
CLK pulses.

7083/84-011309-1
 ABSOLUTE MAXIMUM RATINGS:

PARAMETER SYMBOL VALUE UNITS

DC Supply Voltage VDD - VSS 11.0 V
Voltage at any input VIN VSS - 0.3 to VDD + 0.3 V
Operating temperature TA 0 to +70 C
Storage temperature TSTG -55 to +150 C

DC ELECTRICAL CHARACTERISTICS:
(All voltages referenced to VSS, TA = 0oC to 70oC.)

PARAMETER SYMBOL MIN MAX UNITS CONDITION

Supply voltage VDD 4.5 10.0 V -
Supply current IDD - 6.0 A VDD = 10V, All
input frequencies = 0Hz
RBIAS = 2M

x4/x1 Logic Low VIL - 0.3VDD V -

A, B Logic Low VIL - 0.6 V VDD = 4.5V
- 1.0 V VDD = 9V
- 1.1 V VDD = 10V

x4/x1Logic High VIH 0.7VDD - V -

A, B Logic High VIH 3.1 - V VDD = 4.5V
5.0 - V VDD = 9V
5.6 - V VDD = 10V

ALL OUTPUTS:
Sink Current IOL 1.75 - mA VDD = 4.5V
VOL = 0.4V 5.0 - mA VDD = 9V
5.7 - mA VDD = 10V

Source Current IOH 1.0 - mA VDD = 4.5V

VOH = VDD - 0.5V 2.5 - mA VDD = 9V
3.0 - mA VDD = 10V

TRANSIENT CHARACTERISTICS:
(TA = 0 C to 70 C)

PARAMETER SYMBOL MIN MAX UNITS CONDITION

A, B inputs:
Validation Delay TVD - 85 ns VDD = 10V
- 100 ns VDD = 9V
- 160 ns VDD = 4.5V
A, B inputs:
Pulse Width TPW TVD + TOW Infinite ns -

A to B or B to A
Phase Delay TPS TOW Infinite ns -

1
A, B frequency fA, B - 2TPW Hz -

Input to Output Delay TDS - 120 ns VDD = 10V

- 150 ns VDD = 9V
- 235 ns VDD = 4.5V
Includes input
validation delay

Output Clock Pulse Width TOW 50 - ns See Fig. 4 & 5

7083/84-121508-2
 TPW
A

B TPS

TDS
UPCK
(x1/7083)

TOW
DNCK
(x1/7083)

UPCK
(x4/7083)
DNCK
(x4/7083)

CLK
(x1/7084)

CLK
(x4/7084)

TDS
UP/DN
(7084)

FIGURE 2. LS7083 / LS7084 INPUT / OUTPUT TIMING DIAGRAM

CURRENT
RBIAS 1
MIRROR

DUAL
A 4 FILTER
ONE-SHOT x4 CLOCK
CLOCK
AND 8 UPCK or CLK
DIRECTION
x1 CLOCK MUX
DECODE
DUAL
5 FILTER
B ONE-SHOT
7 DNCK or UP/DN
UP/DN

x4/x1 6

V DD 2 +V

V SS 3 -V
FIGURE 3. LS7083/LS7084 BLOCK DIAGRAM

The information included herein is believed to be

accurate and reliable. However, LSI Computer Systems,
Inc. assumes no responsibilities for inaccuracies, nor for
any infringements of patent rights of others which may
result from its use.

7083/84-121608-3
 1500 30
V DD = 5V
V DD = 5V
1250 25
V DD = 9V

OUTPUT CLOCK PULSE WIDTH, Tow, s

1000 20
V DD = 9V
V DD = 10V
OUTPUT CLOCK PULSE WIDTH, Tow, ns

750 15
V DD = 10V

500 10

250 5

100 200 300 400 500 2 4 6 8 10 12

Figure 4. Tow vs RBIAS, k Figure 5. Tow vs RBIAS, M

MODE SELECT
+V +V +V
+V
R
16
16
6 2 6 2
VDD V DD
x4/x1 V DD x4/x1 VDD
8 15
8 5 CLK CK
A CLOCK 4 UPCK CK-UP A CLOCK 4
A ENCODER A 4516
ENCODER 40193 LS7084
B CLOCK 5 LS7083 7 10
B CLOCK 5 B UP/DN UP/DN
B 7 4
DNCK CK-DN
1
1 RBIAS V SS
RBIAS
3 V SS
V SS V SS RB
RB 8
3 8

FIGURE 6B*. TYPICAL APPLICATION FOR LS7084 WITH X4/X1 MODE SELETION
FIGURE 6A. TYPICAL APPLICATION FOR LS7083 IN x4 MODE *See NOTE at bottom right of Page 1

+5V

A1 DIGITAL
POTENTIOMETER
1M 8
10k 10k 1 RBIAS 1 CLK V DD 8
CLK
2 7 2 7
B VDD U/D U/D CS
ENCODER
ROTARY

3 6 3 A1 B1 6
V SS X4/X1 B1
A
10k
4 A B 5 4 GND W1 5
GND W1
10k
LS7084 AD5220

0.01uF 0.01uF

Part Number:
RE11CT-V1Y12-EF2CS
FIGURE 7. Rotary Encoder Control of Digital Potentiometer

7083/84-011209-4