F2880_F04

SpectralWave C-Node
STM-4/ STM-1 Compact Multiplexer

RELEASE 3.20

GENERAL INFORMATION

NEC Corporation
7-1, Shiba 5-chome, Minato-ku, Tokyo 108-8001, Japan TEL +81-3-3454-1111

TELEX NECTOK J22686 FAX +81-3-3798-1510/9 E-mail:mcj@onw.nec.co.jp

F2880_F04
GENERAL INFORMATION

SpectralWave is a registered trademark of NEC Corporation.

Copyright 2002- 2004 by NEC Corporation.

All rights reserved.
The information of this manual was approved by product manager of CND.
This manual is subject to change without notice.
1st Issue Aug 2004

Printed in China
 F2880_F04
GENERAL INFORMATION

CONTENTS

1. OVERVIEW 1-1

2. REFERENCE STANDARDS 2-1

3. EQUIPMENT CHARACTERISTIC 3-1

4. NETWORK DESIGN USING C-NODE 4-1

4.1 Mounting Configuration of Interface Subboard and Modules ...... 4-1
4.1.1 Mainboard Configuration ..................................................................... 4-1
4.1.2 For STM-1o/1e System ......................................................................... 4-1
4.1.3 For STM-4 System................................................................................. 4-2

4.2 Example of Network Configuration ................................................. 4-3

4.2.1 Point to Point......................................................................................... 4-3
4.2.2 Linear ..................................................................................................... 4-3
4.2.3 SNCP Ring ............................................................................................. 4-4
4.2.4 SNCP Multi-Ring ................................................................................... 4-6
4.2.5 MSP Point to Point................................................................................ 4-7
4.2.6 MSP Ring+ SNCP Point ........................................................................ 4-8

5. SPECIFICATION 5-1
5.1 System Design Specifications......................................................... 5-1
5.1.1 System Parameters............................................................................... 5-1
5.1.2 Matrix type ............................................................................................. 5-1
5.1.3 Max NE connection number................................................................. 5-1
5.1.4 Cross connect ....................................................................................... 5-1
5.1.5 Interface ................................................................................................. 5-2
5.1.6 Protection .............................................................................................. 5-2
5.1.7 Synchronization .................................................................................... 5-3
5.1.8 Performance Monitoring ...................................................................... 5-5
5.1.9 Fault management ................................................................................ 5-6
5.1.10 Alarm report .......................................................................................... 5-7
5.1.11 Loopback ............................................................................................... 5-7
5.1.12 HKA ........................................................................................................ 5-8

Contents
i
F2880_F04
GENERAL INFORMATION

5.1.13 HKC ........................................................................................................ 5-8

5.1.14 User interface ........................................................................................ 5-8
5.1.15 Remote access by CID ......................................................................... 5-8
5.1.16 F/W download........................................................................................ 5-8
5.1.17 Data download/ data upload ................................................................ 5-8
5.1.18 Security.................................................................................................. 5-9
5.1.19 LOG ........................................................................................................ 5-9
5.1.20 Inventory................................................................................................ 5-9

5.2 Optical Signal Interface.................................................................. 5-10

5.2.1 STM-1: 155M Optical Interface........................................................... 5-10
5.2.2 STM-4: 622M Optical Interface............................................................5-11
5.2.3 Eye Diagram of Optical Transmission .............................................. 5-12

5.3 Electrical Signal Interface .............................................................. 5-13

5.3.1 Basic Parameters of Electric Interface ............................................. 5-13
5.3.2 1.5M Interface ...................................................................................... 5-13
5.3.3 2M interface ......................................................................................... 5-15
5.3.4 34M Interface ....................................................................................... 5-16
5.3.5 45M Interface ....................................................................................... 5-17
5.3.6 STM-1 Electrical Interface .................................................................. 5-19
5.3.7 100Base-T2 Electrical Interface ......................................................... 5-22

5.4 The Jitter Index of Interface........................................................... 5-23

5.4.1 Input Jitter and Wander Tolerance .................................................... 5-23
5.4.2 Jitter Generation ................................................................................. 5-25
5.4.3 Jitter Generation by Mapping ............................................................ 5-26
5.4.4 Combined Jitter and Wander ............................................................. 5-26

5.5 External Interface ........................................................................... 5-28

5.5.1 Orderwire ............................................................................................. 5-28
5.5.2 User Channel....................................................................................... 5-28
5.5.3 Office Alarm......................................................................................... 5-28
5.5.4 Housekeeping Alarm/Control ............................................................ 5-29

5.6 Environmental Conditions ............................................................. 5-30

5.6.1 Temperature ........................................................................................ 5-30
5.6.2 Humidity............................................................................................... 5-30
5.6.3 Vibration .............................................................................................. 5-30

5.7 Power Distribution.......................................................................... 5-31

5.7.1 Power Interface ................................................................................... 5-31

Contents
ii
 F2880_F04
GENERAL INFORMATION

5.7.2 Power Consumption ........................................................................... 5-31

5.8 User Interface.................................................................................. 5-32

5.8.1 CID Interface........................................................................................ 5-32
5.8.2 NMS ...................................................................................................... 5-32

5.9 Physical Specification.................................................................... 5-33

5.9.1 C-Node Subrack Dimensions............................................................. 5-33

Contents
iii
E
This page is intentionally left blank.
 F2880_F04
GENERAL INFORMATION

1. OVERVIEW

NECs SpectralWave Compact Node Multiplexer (C-Node) offers various types of

traffic interfaces such as PDH, SDH and Fast Ethernet with flexible network
configurations of linear, ring, multiple rings, etc. The C-Node is also well suited for
implementation in customer premises. C-Node has been developed as a part of
NECs SpectralWave family products. C-Node also has the following features:
Conforms to the correlative proposal of ITU-T and related SDH technical
criteria of the country.
Full time slot cross connect functions, having powerful, convenient Add and
Drop traffic functions and modes.
Compliant system design: The equipment can configure either TM (Terminal
Multiplexer) or ADM (Add Drop Multiplexer) mode flexibly.
Offers system configuration for either STM-1 or STM-4, with the methods of
easy upgrading and reconfiguring networks.
Provides multi-type tributary interfaces with excellent cost performance.
Offers perfect network management system; flexible network configuration.
Realizes a number of traffic protection modes.
Provides multi-function orderwire telephone system.
Offers electromagnetic compatibility performances (EMC and EMI) with
appropriate measures.
Well maintained; high-reliable operation.
Pizza box type appearance.

Overview
1-1
E
This page is intentionally left blank.
 F2880_F04
GENERAL INFORMATION

2. REFERENCE STANDARDS

ITUT G.703 Physical/electrical characteristics of hierarchical digital interface.

ITUT G.707 Network node interface for the Synchronous Digital

Hierarchy(SDH).

ITUT G.781 Synchronization layer functions.

ITUT G.783 Characteristics of the SDH equipment functional blocks.

ITUT G.784 SDH management.

ITUT G.803 Architectures of transport networks based on the SDH.

ITUT G.811 Timing requirements at the outputs of primary reference clocks.

ITUT G.813 Timing characteristics of SDH equipment slave clocks.

ITUT G.823 The control of jitter and wander within digital networks which are
based on the 2048 kbit/s hierarchy.

ITUT G.825 The control of jitter and wander within digital networks which are
based on the SDH.

ITUT G.826 Error performance parameters and objectives for international,

constant bit rate digital paths at or above the primary rate.

ITUT G.841 Types and characteristics of SDH network protection architectures.

ITUT G.957 Optical interfaces for equipments and systems relating to the SDH.

ITUT G.958 Digital line systems based on the SDH for use on optical fiber
cables.

ITUT G.7041/Y.1303 Generic framing procedure.

ITUT G.7042/Y.1305 Link capacity adjustment scheme (LCAS) for virtual

concatenated signals.

IEEE 802.1D-1998 Part 3: Media Access Control (MAC) Bridges.

IEEE 802.1Q-1998 Virtual Bridged Local Area Networks.

IEEE 802.3-1998 Carrier sense multiple access with collision detection

(CSMA/CD) access method and physical layer specifications.

IEEE 802.1ad-1998 Compatible link aggregation

Reference Standards
2-1
F2880_F04
GENERAL INFORMATION

IEEE 802.1p-1998 Quality of Service

ITU-T X.86 Link Access Procedure - SDH(LAPS)

RFC1213

RFC1058

CISPR22 (11/97)

CISPR24 (09/97)

ETSI prETS 300-386-2-2 (09/96)

prEN50082-1 (1994)

ETS 300 019-1-3

EN60825-2

Reference Standards
2-2
E
 F2880_F04
GENERAL INFORMATION

3. EQUIPMENT CHARACTERISTIC

2U-height compact-size designation.

Provides1008 1008 VC12 level, or 48 48 VC3 level, or 16 16 VC4 level

non-blocking cross connection, supporting unidirectional, bi-directional and
broadcasting.

Provides sub-network connection protection and 1+1 multiplex section protection,

supporting traffic communication between them.

Applicable for a number of network configurations: point to point, linear, ring, star,
tree, multi-ring, ring crossing, etc.

Provides E11, E12, E31, E32, 10/100Base-T2 and 10/100Base-T traffic interfaces.

Provides three levels of VC4, VC3 and VC12 cross connect for 100Base-T/
100Base-T2 subboard, supporting both LAPS and GFP EOS encapsulation and
LCAS standard.

Provides virtual concatenation function for 100Base-T/100Base-T2, and the

maximum virtual concatenation quantity for VC3 level is 3 and for VC12 is 63.

Provides four extended slots reserving traffics to be extended.

Capacity for interfaces:

E11 interface: up to 128 channels
E12 interface: up to 128 channels
E31 interface: up to 12 channels
E32 interface: up to 12 channels
10/100BASE-T2 Ethernet interface: up to 16 channels
STM-4 optical interface: up to 4 channels
STM-1 optical interface: up to 10 channels

Either way for the use of traffic: independent or protecting each other among optical
interfaces.

Configurations of complicated SNCP network, such as 600M-150M Multi-Ring,

150M-150M Multi-Ring, etc.

Allows configuring STM-1 system to/from STM-4 system only by replacing

interface modules; simply upgrading.

Equipment Characteristic
3-1
F2880_F04
GENERAL INFORMATION

Provides orderwire interface (2-wire interface), with the functions of group calling
and selected calling.

One 64 kbit/s V.11 or V.24 user data interface per optical interface.

Provides timing synchronous interface:

2048 kbit/s or 2048 kHz external clock
2048 kbit/s tributary
STM-1 and STM-4 timing source inputs
2048 kbit/s or 2048 kHz external timing source output
SSM function

Provides DCC channel of D1 to D3; Using TCP/IP communication protocol.

Provides F (10Base-T) and f (RS232) network management interfaces for

configuration, alarm, performance, maintenance and security functions of ITU-T
definition.

Provides ports for eight Housekeeping Alarms, four Housekeeping Controls, and a
set of Alarm Output interface.

Provides local/remote firmware download: in-service upgrading is available for easy

maintenance.

Allows upgrading hardware configuration data without replacing equipment.

Provides the network management for remote connection via serial interface or LAN,
which allows monitoring remote NE.

Supports the following application of fiber transmission:

Super Long-Distance (80km)
Long-Distance (40km)
Short Distance (15km)

Provides fans to disperse heat forcibly, or allows natural heat dispersion without
using fans as well; provides the fans controlling temperature and inspecting their
own status to guarantee the equipment running stably.

Flexible structure designing: allows the front access or the rear access by the method
of mounting shelves.

Equipment Characteristic
3-2
E
 F2880_F04
GENERAL INFORMATION

4. NETWORK DESIGN USING C-NODE

4.1 Mounting Configuration of Interface Subboard

and Modules
This section provides mounting configuration of interface subboard and modules.

Slot positions for each interface board are shown below.

Mainboard

Slot1 Slot3

Slot2 Slot4

4.1.1 Mainboard Configuration

There are two kinds of Mainboard shown below.
STM-1o/1e System: Aggregate interface is STM-1o/1e, and no additional cross
connect module.
STM-4 System: Aggregate interface is STM-4, and an additional cross connect
module.

4.1.2 For STM-1o/1e System

Following table shows mounting configuration in STM-1o/1e system.

Mainboard mux Subrack mux

Subboard Slot1 Slot2 Slot3 Slot4
add/drop CH install CH

E11 (1.5M) Y Y Y Y 126 128

E12 (2M) Y Y Y Y 126 128

E31 (34M) Y Y Y Y 6 12

E32 (45M) Y Y Y Y 6 12

STM-1o x1 Y Y Y Y 2 4*

Network Design using C-Node

4-1
F2880_F04
GENERAL INFORMATION

Mainboard mux Subrack mux

Subboard Slot1 Slot2 Slot3 Slot4
add/drop CH install CH

STM-1e x1 Y Y Y Y 2 4*

STM-1o x2 Y Y N/A N/A 2 4*

STM-1e x2 Y Y N/A N/A 2 4*

100Base-T2/ Y Y Y Y 16 16
100Base-T

Y: Can be equipped, N/A: Not Applicable

*: STM-1o/1e*2, STM-1o*1, STM-1e*1 mix configure can support 6CH in subrack.

4.1.3 For STM-4 System

Following table shows mounting configuration in STM-4 system.

Mainboard mux Subrack mux

Subboard Slot1 Slot2 Slot3 Slot4
add/drop CH install CH

E11 (1.5M) Y Y Y Y 128 128

E12 (2M) Y Y Y Y 128 128

E31 (34M) Y Y Y Y 12 12

E32 (45M) Y Y Y Y 12 12

STM-1o x1 Y Y Y Y 4 4

STM-1e x1 Y Y Y Y 4 4

STM-1o x2 Y Y Y Y 8 8

STM-1e x2 Y Y Y Y 8 8

100Base-T2/ Y Y Y Y 16 16
100Base-T

Y: Can be equipped, N/A: Not Applicable

Network Design using C-Node

4-2
 F2880_F04
GENERAL INFORMATION

4.2 Example of Network Configuration

4.2.1 Point to Point

STM-1o

STM-1o x 2
C-Node C-Node
E12 x 8 BLANK
100Base-T x 4/
100Base-T2 x2 BLANK

E12 x 8

100Base-T x 4/100Base-T2 x 2

4.2.2 Linear

STM-1o STM-1o

C-Node C-Node C-Node

E12 x 8

100Base-T x 4/100Base-T2 x2

STM-1o x 2

STM-1o x 2 E12 x 8

100Base-T x 4/
100Base-T2 x2 BLANK

Network Design using C-Node

4-3
F2880_F04
GENERAL INFORMATION

4.2.3 SNCP Ring

C-Node

STM-1o
C-Node C-Node
Ring

C-Node

E12 x 8
STM-1o x 2
100Base-T x 4/100Base-T2 x2
E12 x 8 BLANK
100Base-T
100Base-T xx 4/
4/
100Base-T2 BLANK
100Base-T2xx22

Subboard 504*504 N-connect module 1008*1008 N-connect module

Slot1 Slot2 Slot3 Slot4 Slot1 Slot2 Slot3 Slot4

E12 (2M) SNC/N SNC/N SNC/I SNC/I SNC/N SNC/N SNC/N SNC/N

STM1O SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I

STM1E SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I

100BT_2 SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I

100BT SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I

E11 (1.5M) SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I

E31 (34M) SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I

E32 (45M) SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I SNC/I

Network Design using C-Node

4-4
 F2880_F04
GENERAL INFORMATION

NOTE:
1. C-Node supports both SNC/N and SNC/I in SNCP ring configuration, according to
the above table.
2. SNC/I: HOP(AU-LOP/AIS), LOP(TU-LOP/AIS)
SNC/N: HOP (AU-LOP/AIS, HP-UNEQ/TIM/EXC/DEG)
LOP (TU-LOP/AIS, LP-UNEQ/TIM/EXC/DEG/LOM)

Network Design using C-Node

4-5
F2880_F04
GENERAL INFORMATION

4.2.4 SNCP Multi-Ring

C-Node

STM-4
C-Node C-Node
Ring

STM-4 x 2

C-Node E12 x 8
STM-1o x 2 E12 x 8
100Base-T x 4
100Base-T2x2 100Base-T x 4/
100Base-T2x2 BLANK

STM-1o
C-Node C-Node
Ring

C-Node

Network Design using C-Node

4-6
 F2880_F04
GENERAL INFORMATION

4.2.5 MSP Point to Point

STM-1o

STM-1o x 2
C-Node C-Node

E12 x 8 BLANK
100Base-T x 4/
100Base-T2x2 BLANK

E12 x 8

100Base-T x 4/100Base-T2x2

Network Design using C-Node

4-7
F2880_F04
GENERAL INFORMATION

4.2.6 MSP Ring+ SNCP Point

C-Node

Ring

C-Node STM-4 C-Node

STM-4 x 2

C-Node E12 x 8
STM-1o x 2 E12 x 8
100Base-T x 4
100Base-T2x2 100Base-T x 4/
100Base-T2x2 BLANK
STM-1o

C-Node

Network Design using C-Node

4-8
E
 F2880_F04
GENERAL INFORMATION

5. SPECIFICATION

5.1 System Design Specifications

5.1.1 System Parameters

Transmission Level: STM-4, STM-1

Bit Error Rate: <1 10-10

Type of Tributary Interfaces: 1.544 Mbit/s ( CEPT TU-12 mapping )

2.048 Mbit/s, 34.368 Mbit/s
44.736 Mbit/s ( CEPT TU-3 mapping )
10/100Base-T Fast Ethernet

Cross connect Level: VC-4, VC-3, VC-12

5.1.2 Matrix type

One way

Two way

Broadcast

Hairpin (loop back)

NOTE: Other timeslot mapping for through mapping should be provided.

5.1.3 Max NE connection number

63 equipments.

5.1.4 Cross connect

Cross-connect level Size

VC-4 16*16 (8*8 in mini 155M version)
VC-3 48*48 (24*24 in mini 155M version )
VC-12 1008*1008 (504*504 in mini 155M version)

Specification
5-1
F2880_F04
GENERAL INFORMATION

5.1.5 Interface
STM-4 (S-4.1/L-4.1/L-4.2) (2chs/SLOT)

STM-1o (S-1.1/L-1.1/L-1.2) (2chs/SLOT)

STM-1e (2chs/SLOT)

45M (3chs/SLOT)

34M (3chs/SLOT)

2M (75ohm/120ohm) (32chs/SLOT)

2M (75ohm/120ohm) (8chs/SLOT)

1.5M (8chs/SLOT)

1.5M (32chs/SLOT)

100Base-T (4chs/SLOT)/ 100Base-T2 (4chs/SLOT)

5.1.6 Protection
MSP (linear protection)
1) Optical interface
2) 1+1 Uni-directional Non-Revertive
3) switch time< 50msec
4) switch criterion: LKOP/ LKOW/ FSW/ FSP/ SF/ SD /MSW/ MSP
SF: LOS, LOF, MS-AIS, RS-TIM, B2BER
SD: B2DEG

SNC-P (path protection)

1) Protection unit: HO Path: AU4
LO Path: TU3/TU12
2) 1+1 Unidirectional Non-Revertive/1+1 Uni-directional Revertive
3) Interlock
4) switch time< 50msec
5) switch criterion: LKOP/ FSP/ SF/ SD/ MSP

Specification
5-2
 F2880_F04
GENERAL INFORMATION

For SNC/N
SF: LOP, AIS, UNEQ, TIM, B3/BIP2 BER, LOM
SD: B3/BIP2 DEG
For SNC/I
SF: AIS, LOP
6) Non revertive/revertive selectable
Timing source protection
1) Revertive
2) Switch time: timing source selected time 200msec + timing source switch time
300msec
3) Switch criterion: Lockout/FS/ SF/MS

SF (STM-N): LOS, LOF, MS-AIS, and RS-TIM

SF (2Mbps G.703.6) LOS, LOF, AIS

SF (2MHz G703.10) LOS

(Priority/ Quality/ SSM selectable)

5.1.7 Synchronization
Timing source: Internal, Holdover, STM-N Line
2M PDH Line
External CLK IN (2Mbps or 2MHz selectable)
External CLK OUT (2Mbps or 2MHz selectable)
SSM
Table below shows the basic parameter of all kinds of timing sources.

Specification
5-3
F2880_F04
GENERAL INFORMATION

2MHz EXCLK
Line Rate 2.048MHz
Frame Format NA
Line Code NA
Impedance 75 ohm unbalanced/ 120 ohm balanced

2Mbps EXCLK
Line Rate 2.048Mbps
Frame Format PCM30CRC
Line Code HDB3
Impedance 75 ohm unbalanced/ 120 ohm balanced

2M PDH
Line Rate 2.048Mbps
Frame Format NA
Line Code HDB3
Impedance 75 ohm unbalanced

STM-1o
Line Rate 155.520Mbps
Frame Format -
Line Code -
Impedance -

STM-1e
Line Rate 155.520Mbps
Frame Format -
Line Code CMI
Impedance 75 ohm unbalanced

STM-4
Line Rate 622.080Mbps
Frame Format -
Line Code -
Impedance -

Specification
5-4
 F2880_F04
GENERAL INFORMATION

5.1.8 Performance Monitoring

PM Items
SDH PM

RST BBE, ES, SES, OFS, UAS

MST BBE, ES, SES, UAS, FE-BBE, FE-ES, FE-SES, FE-UAS

MSA/HPA PJE-P, PJE-N

MSP MS-PSC

HPT BBE, ES, SES, UAS, FE-BBE, FE-ES, FE-SES, FE-UAS

LPT BBE, ES, SES, UAS, FE-BBE, FE-ES, FE-SES, FE-UAS

Ethernet PM
LAN ETH-DropPkts, ETH-RxAlignmentErrorFrames, ETH-RxBroadcastPkts,
ETH-RxFCSErrorFrames, ETH-RxMulticastPkts, ETH-RxOctets,
ETH-RxPkt1024toMax, ETH-RxPkt128to255, ETH-RxPkt256to511,
ETH-RxPkt512to1023, ETH-RxPkt64, ETH-RxPkt65to127, ETH-TxCollision,
ETH-TxDelayTransmissions, ETH-TxExtCollisionFrames,
ETH-TxLateCollision, ETH-TxMultiCollisionFrames, ETH-TxNUcastPkts,
ETH-TxOctets, ETH-TxSingleCollisionFrames, ETH-TxUcastPkts

WAN ETH-DropPkts, ETH-RxAlignmentErrorFrames, ETH-RxBroadcastPkts,

ETH-RxFCSErrorFrames, ETH-RxMulticastPkts, ETH-RxOctets,
ETH-RxPkt1024toMax, ETH-RxPkt128to255, ETH-RxPkt256to511,
ETH-RxPkt512to1023, ETH-RxPkt64, ETH-RxPkt65to127,
ETH-TxNUcastPkts, ETH-TxOctets, ETH-TxUcastPkts

Encapsulation PM
GFP GFP_RxEXIErrorPkts, GFP_RxFCSErrorPkts, GFP_RxOctets, GFP_RxPkts,
GFP_TxOctets, GFP_TxPkts

LAPS LAPS_RxFCSErrorPkts, LAPS_RxOctet, LAPS_RxPkts, LAPS_TxOctets,

LAPS_TxPkts

PM register
1) 15min register: can register 2-24 hour PM data, default is 8hour.
2) 1day register: can register 1-30 day PM data, default is 1day.
NOTE: Sometimes CID will not show performance value, but show over flow
which means that the performance value exceeds its maximum counter
value.

TCA function

Specification
5-5
F2880_F04
GENERAL INFORMATION

5.1.9 Fault management

FM Items

SDH FM

SPI LOS, LOS (Electrical Interface)

RST LOF, RS-TIM

MST MS-AIS, MS-RDI, MS-EXC, MS-DEG

MSA AU-AIS, AU-LOP

HPC PPS-FAIL

HPT HP-TIM, HP-UNEQ, HP-RDI, HP-DEG, HP-EXC

HPA TU-AIS, TU-LOP, LOM, HP-PLMF

LPC PPS-FAIL

LPT LP-TIM, LP-UNEQ, LP-RDI, LP-EXC, LP-DEG

LPA LP-PLMF, AIS

HPOM HP-TIM, HP-UNEQ, HP-EXC, HP-DEG, VC-AIS

LPOM LP-TIM, LP-UNEQ, LP-EXC, LP-DEG, VC-AIS

34M LOS

2M LOS

45M LOS

1.5M LOS

SETS LTI, CLKFAIL, REF_FAIL, CLKDRIFT

EXT CLK IN LOS, AIS(2Mbps), LOF(2Mbps)

PKG PKG_REMOVED, PKG_TYPE, PKG_FAIL

FAN FAN_FAIL

NETWORK LINK-FAIL

ENVIRONMENT HKAn

EQUIPMENT BUS_ERROR,MEM_FAIL

Specification
5-6
 F2880_F04
GENERAL INFORMATION

Ethernet Alarm
DropPkts_EXC, LINK_DOWN, RxAlignmentErrorFrames_EXC,
LAN
RxFCSErrorFrames_EXC, TxCollision_EXC,
TxDelayTransmission_EXC, TxExtCollision_EXC,
TxLateCollision_EXC
CSF_LCS, CSF_LCSync, CSF_R_LCS, CSF_R_LCSync,
WAN
DropPkts_EXC, LINK_DOWN, RxAlignmentErrorFrames_EXC,
RxFCSErrorFrames_EXC, WAN_PORT_SD, WAN_PORT_SF

Encapsulation Alarm
GFP SSF_LGS

LAPS LAPS_FAIL

Virtual Concatenation Alarm

LP-Xv-LOA, LP-Xv-LOM, LP-Xv-SQM, LP-Xv-PLM
Virtual
Concatenation
Layer

Alarm severity

Critical/Major/Minor/Warning

Delay/ stretch report

5.1.10 Alarm report

LED (ALARM)

Office alarmPM, DM, AB, AL

ACO

5.1.11 Loopback
Terminal loopback
Applicable to STM-N, 34M, 2M, 45M, 1.5M

Facility loopback
Applicable to STM-N, 34M, 2M, 45M, 1.5M

Specification
5-7
F2880_F04
GENERAL INFORMATION

5.1.12 HKA
Built in 8 port (4 in Mainboard, 4 in FAN)

Alarm logic (Loop/ Open) selectable

Alarm standard
Loop: <50 ohm
Open: >20k ohm

MAX current: 100mA

5.1.13 HKC
Built in 4 ports

Control logic (Loop<2ohm/ Open>500kohm) selectable

Max current/voltage: 0.5A/200V

5.1.14 User interface

f interface: RS-232C

F interface: LAN (10 Base-T)

F interface is used by NMS and CID mutually

5.1.15 Remote access by CID

Response time should be less than 30 sec from any CID.

Implement through DCC function of C-Node.

Loopback function for SDH interface is forbidden, but loopback for PDH
interface is allowed.

5.1.16 F/W download

Performance: 30min per NE (from CID)

5.1.17 Data download/ data upload

Performance: 10min per NE (from NMS and CID)

Specification
5-8
 F2880_F04
GENERAL INFORMATION

5.1.18 Security
User Authorization Management

5.1.19 LOG
Event Log: max 500 item for each event log

Command Log: max 500 item

5.1.20 Inventory
PKG name (Both from OS and PKG)

PKG Code (Both from OS and PKG)

Serial Number (Only from PKG)

Manufactured date (Only from PKG)

PKG (h/w & f/w) Version (Both from OS and PKG)

Repair record (Only from PKG)

Specification
5-9
F2880_F04
GENERAL INFORMATION

5.2 Optical Signal Interface

The transmission performance between S (Sending side) and R (Receiving side)
meets the requirement of section 5 in ITU-T G.957.

5.2.1 STM-1: 155M Optical Interface

ITEM SPECIFICATIONS

Nominal Bit Rate G. 707, G.958; 155520 kbit/s

Application Code S-1.1 L-1.1 L-1.2

Operating Wavelength Range 1261 ~ 1360 nm 1280 ~ 1335 nm 1480 ~ 1580 nm

Transmitter at Reference Point S

Source Type MLM SLM SLM

Spectral Characteristics

Maximum RMS width 7.7 nm

Maximum 20 dB width 1 nm 1 nm

Minimum side mode suppression ratio 30 dB 30 dB

Mean Launched Power

Maximum 8 dBm 0 0

Minimum 15 dBm 5 dBm 5 dBm

Maximum Extinction Ratio 8.2 dB 10 dB 10 dB

Main Optical Path Between S and R

Attenuation Range 0 ~ 12 dB 10 ~ 28 dB 10 ~ 28 dB

Maximum Dispersion 96 ps/nm N/A N/A

Minimum Optical Return Loss of Cable N/A N/A 20 dB

Plant at S (including any connectors)

Maximum Discrete Reflectance between N/A N/A 25 dB

S Point and R Point

Receiver at Reference Point R

Minimum Sensitivity (at BER = 10E10) 28 dBm 34 dBm 34 dBm

Minimum Overload (at BER = 10E10) 8 dBm 10 dBm 10 dBm

Maximum Optical Path Penalty 1 dB 1 dB 1 dB

Maximum Reflectance of Receiver N/A N/A 25 dB

(measured at R)

Specification
5-10
 F2880_F04
GENERAL INFORMATION

5.2.2 STM-4: 622M Optical Interface

ITEM SPECIFICATIONS

Nominal Bit Rate G. 707, G.958; 622080 kbit/s

Application Code S-4.1 L-4.1 L-4.2

Operating Wavelength Range 1293 ~ 1334 1274 ~ 1356 1280 ~ 1335 1480 ~ 1580
nm nm nm nm

Transmitter at Reference Point S

Source Type MLM MLM SLM SLM

Spectral Characteristics

Maximum RMS width 4 nm 5 nm

Maximum 20 dB width 1 nm <1 mm

Maximum side mode suppression ratio 30 dB 30 dB

Mean Launched Power

Maximum 8 dBm 8 dBm 2 dBm 2 dBm

Minimum 15 dBm 15 dBm 3 dBm 3 dBm

Maximum Extinction Ratio 8.2 dB 8.2 dB 10 dB 10 dB

Main Optical Path Between S and R

Attenuation Range 0 ~ 12 dB 0 ~ 12 dB 10 ~ 24 dB 10 ~ 24 dB

Maximum Dispersion 46 ps/nm 74 ps/nm N/A 1640 ps/nm

Minimum Optical Return Loss of Cable N/A N/A 20 dB 24 dB

Plant at S (including any connectors)

Maximum Discrete Reflectance between N/A N/A 25 dB 27 dB

S Point and R Point

Receiver at Reference Point R

Minimum Sensitivity (at BER = 10E10) 28 dBm 28 dBm 28 dBm 28 dBm

Minimum Overload (at BER = 10E10) 8 dBm 8 dBm 8 dBm 8 dBm

Maximum Optical Path Penalty 1 dB 1 dB 1 dB 1 dB

Maximum Reflectance of Receiver N/A N/A 14 dB 27 dB

(measured at R)

Specification
5-11
F2880_F04
GENERAL INFORMATION

5.2.3 Eye Diagram of Optical Transmission

The following diagram shows the regulations of G.957, using a filter specified in
appendix A of G.957 to measure.

1+y1

Scope
y2

STM-1 interface
0.5 x1/x4 0.15/0.85
x2/x3 0.35/0.65
y1/y2 0.20/0.80

y1
STM-4 interface
x1/x4 0.25/0.75
0
x2/x3 0.40/0.60
y1/y2 0.20/0.80
-y1
0 x1 x2 x3 x4
Time

Specification
5-12
 F2880_F04
GENERAL INFORMATION

5.3 Electrical Signal Interface

5.3.1 Basic Parameters of Electric Interface

Name 1.5M (E11) 2M (E12) 34M (E31) 45M (E32) STM-1

Bits rate (kb/s) 1554 kbit/s 2048 kbit/s 34368 kbit/s 44736 kbit/s 155520 kbit/s

Bits rate tolerance 32ppm 50ppm 20ppm 20ppm 20ppm

Code B8ZS HDB3 HDB3 B3ZS CMI

Interface template G.703 (10/98): G.703 G.703 G.703 (10/98): G.703

and return loss Section 5 Section 6 Section 7 Section 9 Section 9

5.3.2 1.5M Interface

ITEM 1.5M

Basic Specification Conforms to G.703 (10/98) Section 5

(Same as GR-499-CORE)
Bit Rate Transmit side: 1.544 Mbit/s 32 ppm
Receive side: 1.544 Mbit/s 130 ppm
G.703 (10/98) Section 5.1
Code B8ZS
Conforms to G.703 (10/98) Section 5.1: Table 4

Frame Constructor N/A

Output Pulse Mask Conforms to G.703 (10/98) Section 5: Table 4, Fig. 10
Impedance 1005%
Conforms to G.703 (10/98) Section 5.1: Table 4
Connect Cord Same as AWG22 ABAM cable
Conforms to GR-253-CORE Issue2 (12/95)
Transmit Distance 655 feet (199.6 m)
Conforms to GR-253-CORE Issue2 (12/95)
Pulse Amplitude 2.4 V thru 3.6 V
Conforms to G.703 (10/98) Section 5.1: Table 4
Power Level For all 1 signal, the power in a 3 kHz 1 kHz band centered at 772 kHz
shall be between 12.6 dBm and 17.9 dBm.

The power in a 3 kHz 1 kHz band centered at 1544 kHz shall be at least 29
dB below that at 772 kHz
Conforms to G.703 (10/98) Section 5.1: Table 4

Specification
5-13
F2880_F04
GENERAL INFORMATION

(Continued)
ITEM 1.5M

Pulse Imbalance Pulse amplitude: within 200 mV

Conforms to G.703 (10/98) Section 5.1: Table 4
Jitter tolerance GR-499-CORE (12/95) Fig7-1 conformity Conforms to G.824 (03/93) Section
3.1.1: Fig. 3, Table 2
Parameter modify: f1 >= 10Hz to conform the both specification.
Output jitter Conforms to G.783 (04/97) Section10.2.3
1: BP (20 Hz thru 40 kHz): 0.25 Uip-p (in further study)
Mapping jitter 2: BPF (8kHz thru 40 kHz): 0.1 Uip-p
Conforms to G.783 (04/97): Table 10-1
Conforms to G.783PR (10/00) as well
Combined jitter 1: BPD (10 Hz thru 40 kHz): 1.5 Uip-p
2: BPF (8kHz thru 40 kHz): 0.075 Uip-p (in further study, using 2M spec.)
Conforms to G.783 (04/97): Table 10-2
Conforms to G.783PR (10/00) as well
Jitter transfer Conforms to G.743 (11/88): Fig. 2
Conforms to GR-499-CORE (12/95): Fig.7-4
Conforms to G.743 (same as GR-499)
Jitter tolerance GR-499-CORE (12/95) Fig7-1 conformity
G.824 (03/93) Section3.1.1/Fig.3/Table2 conformity
Parameter modify: f1>=10Hz to conform the both above specification
Wander generation Conforms to G.783 (04/97) Section 10.2.3
Conforms to G.783 PR (10/00) Section 15.2.3.3.1/15.2.3.3.2

Specification
5-14
 F2880_F04
GENERAL INFORMATION

5.3.3 2M interface
5.3.3.1 Waveform of Output Port

Name 75 interface 120 interface

Line pairs in every transmission direction Co-axis Symmetric
Impedance of testing load 75 120
Peak voltage of a mark 2.37 V 3V
Peak voltage of a space 0 0.237 V 0 0.3 V
Standard pulse width 244 ns 244 ns
At the center of Ratio of the amplitudes of positive and negative pulses 0.95 thru 1.05 0.95 thru 1.05
the pulse inter
Ratio of the width of positive and negative pulse 0.95 thru 1.05 0.95 thru 1.05
Mask of the pulse G.703 Figure 15 G.703 Figure 15

Mask of the pulse at the 2048 kbit/s interface

5.3.3.2 Return Loss of Input Port

The attenuation of this pair should be assumed to follow a f law and the loss of a
frequency of 1024 kHz should be in the range 0 thru 6 dB.

Specification
5-15
F2880_F04
GENERAL INFORMATION

Frequency (kHz) Return Loss (dB)

51 thru 102 12
102 thru 2048 18
2048 thru 3072 14

5.3.4 34M Interface

5.3.4.1 Waveform of Output Port

Name Waveform

Pulse shape (rectangular when standard) All marks of valid signal should conform to
figure 17/G.703 template in spite of the symbols
Line pairs in every transmission direction A co-axis line pairs
Impedance of testing load 75, resistance
Nominal peak voltage value (having pulse) 1.0V
Peak voltage value (no pulse) 00.1V
Standard pulse width 14.55ns
Ratio of the amplitudes of positive and negative 0.95 to 1.05
pulses at the center of the pulse interval
Ratio of width of positive and negative pulses at 0.95 to 1.05
the nominal half amplitude
Mask of pulse G.703 figure 17

5.3.4.2 Return Loss of Input Port

The attenuation of this cable should be assumed to follow approximately a f law

and the loss at a frequency of 17184 kHz should be in the range 0 to 12dB.

Frequency (kHz) Return Loss (dB)

860 thru 1720 12
1720 thru 34368 18
34368 thru 51550 14

Specification
5-16
 F2880_F04
GENERAL INFORMATION

5.3.5 45M Interface

ITEM SPECIFICATION

Basic SPEC Conforms to G.703 (10/98) Section9 (same as GR-499-CORE)

Bit rate 44.736 Mbit/s 20 ppm
Conforms to G.703 (10/98) Section 8.1
Code B3ZS
Conforms to G.703 (10/98) Section 8.1: Table 6
Frame constructor Conforms to G.703 (10/98) Section 8.1: Table 6
required to meet G.752 (6M mapping) only
Conforms to GR-499-CORE (1995) Section10.5 (no frame)
Output pulse mask G.703(10/98) Section 8/
Table6/Fig.14 conformity
Impedance 75 5%
Conforms to G.703 (10/98) Section 8.1: Table 6

Connect cord 75 imbalance Coaxial cable

(GR-253-CORE Issue2 (12/95) conformity)
Transmit distance 450 feet (137.2m)
[Conforms to GR-253-CORE Issue2 (12/95)]
Pulse amplitude 0.36 V thru 0.85 V
Conforms to G.703 (10/98) Section 8.1: Table 6

Power level LPF (200 MHz): 4.7 dBm thru +3.6 dBm
(225~450 feet, including cable )
or
It requires that the power in a 3 kHz 1 kHz band centered at 22368 kHz be between
1.8 dBm and +5.7 dBm. It further requires that the power in a 3 kHz 1 kHz band
centered at 44736 kHz be at least 20 dB below that at 22368 kHz.
Conforms to G.703 (10/98) Section 8.1: Table 6
Pulse imbalance NA

Jitter tolerance Conforms to G.752 (1988): Fig 4

Conforms to G.824 (03/93): Fig. 3, Table 2 (f110Hz) as well
Output jitter Conforms to G.783 (04/97) Section 10.2.3
Mapping jitter BPF (30 kHz thru 400 kHz): 0.075 UIp-p
Conforms to G.783 (04/97): Table 10-1
(BPF: 10 Hz thru 400 kHz is in further study)
Conforms to G.783PR (10/00)

Specification
5-17
F2880_F04
GENERAL INFORMATION

(Continued)
ITEM SPECIFICATION

Combined jitter 1: BPF (10 Hz thru 400 kHz): 0.40 UIp-p

2: BPF (10 Hz thru 400 kHz): 0.75 UIp-p
3: BPF (30 kHz thru 400 kHz): 0.075 UIp-p
Refer to 34M specification; G.783 (04/97) Table 0-2 conformity requires further study
1, 2 are different because of different pointer sequence
1: Fig. 10-2a), b), c) action
2: Fig. 10-2d) action
Conforms to G.783 (10/00)
Jitter transfer Conforms to G.755 (11/88): Fig. 1
Jitter tolerance Conforms to GR-499-CORE (12/95): Fig 7-1
Conforms to G.824 (03/93) Section 3.1.1: Fig. 3, Table 2
Parameter modify: f1 10Hz to conform both the above specification
Wander generation Conforms to G.783 (04/97) Section 10.2.3
Conforms to G.783 PR (10/00) Section 15.2.3.3.1/15.2.3.3.2

Specification
5-18
 F2880_F04
GENERAL INFORMATION

5.3.6 STM-1 Electrical Interface

5.3.6.1 Waveform of Output Port

The waveform of output port can be tested to G.703 reference.

T = 6.43 ns
V
0 . 60 (Note 1) (Note 1)
0 . 55
0 . 50 N om in al
0 . 45 1 ns 1.608 ns 1.608 ns p u ls e
0 . 40
0 .1 n s 0 .1 n s 1 ns 1 ns

( N o te 4 ) 0.1 n s
0.35 ns 0.35 ns 0 .1 n s

N o m in al 0 . 05
z e ro
le v e l
0 .0 5
( N o te 2 )

1 ns 1 ns
0 .4 0 1 ns
0 .4 5 1 .6 0 8 ns 1.608 ns
0 .5 0
0 .5 5
(Note 1) (N o te 1)
0 .6 0

T1 8 18 9 3 0 -9 2
N e g a ti ve transitions
Positive transition at mid-unit i nt e rva l

Mask of a pulse corresponding to a binary 0

NOTE:

1. The maximum "steady state" amplitude should not exceed the 0.55 V limit. Overshoots
and other transients are permitted to fall into the dotted area, bounded by the
amplitude levels 0.55 V and 0.6 V, provided that they do not exceed the steady state
level by more than 0.05 V.

2. For all measurements using these masks, the signal should be AC coupled, using a
capacitor of not less than 0.01 mF, to the input of the oscilloscope used for
measurements. The nominal zero level for both masks should be aligned with the
oscilloscope trace with no input signal. With the signal then applied, the vertical
position of the trace can be adjusted with the objective of meeting the limits of the
masks. Any such adjustment should be the same for both masks and should not exceed
0.05 V. This may be checked by removing the input signal again and verifying that the
trace lies within 0.05 V of the nominal zero level of the masks.

Specification
5-19
F2880_F04
GENERAL INFORMATION

3. Each pulse in a coded pulse sequence should meet the limits of the relevant mask,
irrespective of the state of the preceding or succeeding pulses, with both pulse masks
fixed in the same relation to a common timing reference, i.e. with their nominal start
and finish edges coincident.

The masks allow for HF jitter caused by intersymbol interference in the output stage,
but not for jitter present in the timing signal associated with the source of the interface
signal.

When using an oscilloscope technique to determine pulse compliance with the mask, it
is important that successive traces of the pulses overlay in order to suppress the effects
of low frequency jitter. This can be accomplished by several techniques [e.g. a]
triggering the oscilloscope on the measured waveform or b) providing both the
oscilloscope and the pulse output circuits with the same clock signal.

4. For the purpose of these masks, the rise time and decay time should be measured
between 0.4 V and 0.4 V, and should not exceed 2 ns.

Mask of a pulse corresponding to a binary 1

NOTE:

1. The maximum "steady state" amplitude should not exceed the 0.55 V limit. Overshoots

Specification
5-20
 F2880_F04
GENERAL INFORMATION

and other transients are permitted to fall into the dotted area, bounded by the
amplitude levels 0.55 V and 0.6 V, provided that they do not exceed the steady state
level by more than 0.05 V.

2. For all measurements using these masks, the signal should be AC coupled, using a
capacitor of not less than 0.01 F, to the input of the oscilloscope used for
measurements. The nominal zero level for both masks should be aligned with the
oscilloscope trace with no input signal. With the signal then applied, the vertical
position of the trace can be adjusted with the objective of meeting the limits of the
masks. Any such adjustment should be the same for both masks and should not exceed
0.05 V. This may be checked by removing the input signal again and verifying that the
trace lies within 0.05 V of the nominal zero level of the masks.

3. Each pulse in a coded sequence should meet the limits of the relevant mask,
irrespective of the state of the preceding or succeeding pulses, with both pulse masks
fixed in the same relation to a common timing reference, i.e. with their nominal start
and finish edges coincident. The masks allow for HF jitter caused by intersymbol
interference in the output stage, but not for jitter present in the timing signal associated
with the source of the interface signal. When using an oscilloscope technique to
determine pulse compliance with the mask, it is important that successive traces of the
pulses overlay in order to suppress the effects of low frequency jitter. This can be
accomplished by several techniques [e.g. a] triggering the oscilloscope on the
measured waveform or b] providing both the oscilloscope and the pulse output circuits
with the same clock signal].

4. For the purpose of these masks, the rise time and decay time should be measured
between 0.4 V and 0.4 V, and should not exceed 2 ns.

5. The inverse pulse will have the same characteristics, noting that the timing tolerance at
the level of the negative and positive transitions are 0.1 ns and 0.5 ns respectively.

5.3.6.2 Return Loss

The attenuation of the coaxial pair should be assumed to follow an approximate f

law and to have a maximum insertion loss of 12.7 dB (for STM-1) at a frequency of
78MHz. The return loss of output port is equivalent to that of input port.

Specification
5-21
F2880_F04
GENERAL INFORMATION

5.3.7 100Base-T2 Electrical Interface

Parameter Criterion

Output Signal Level 2.2V-2.8V

Output Signal Waveform ISO8802-3 Table 14-1

TP_IDL Start Output Signal Waveform ISO8802-3 Figure14-10

Link Test Pulse Waveform ISO8802-3 Figure14-12

Output Timing Jitter ISO8802-3 Table 14-1

Allowable Cable Length 100m

Specification
5-22
 F2880_F04
GENERAL INFORMATION

5.4 The Jitter Index of Interface

5.4.1 Input Jitter and Wander Tolerance

5.4.1.1 PDH Interface

The input jitter and wander tolerance of PDH interface are shown below:

Interface 1544 kbit/s 2048 kbit/s 34368 kbit/s 44736 kbit/s

Uip-p A0 18 36.9 618.6 18
A1 5.0 1.5 1.5 5.0
A2 0.1 0.2 0.15 0.1
A3 18
5
F (Hz) F0 -5
1.2 10 Hz 1.2 10 Hz 1.2 105 Hz
f10 4.88 103 Hz
f9 0.01 Hz
f8 1.667 Hz
f1 10 Hz 20 Hz 100 Hz 10 Hz
f2 120 Hz 2.4 kHz 1 kHz 600 Hz
f3 6 Hz 18 kHz 10 kHz 30 Hz
f4 40 Hz 100 kHz 800 kHz 400 Hz
Pseudo Random 20 1
20
2 115
2 1
23
220 1
Signal

Characteristic of classic regulator

A0
A3
slope-20dB/10

A1

A2

0 f0 f10 f9 f8 f 1 f2 f3 f4
Jittering frequency (log)

Specification
5-23
F2880_F04
GENERAL INFORMATION

5.4.1.2 SDH Interface

The input jitter and wander tolerance of SDH interface are shown below:

Interface STM-1 STM-4

UIp-p A0 (18 s) 2800 11200

A1 (2 s) 311 1244

A2 (0.25 s) 39 156
A3 1.5 1.5
A4 0.15 0.15
F (Hz) f0 1.2 105 Hz 1.2 105 Hz
f12 1.78 104 Hz 1.78 104 Hz
f11 1.6 103 Hz 1.6 103 Hz
f10 1.56 102 Hz 1.56 102 Hz
f9 0.125 Hz 0.125 Hz
f8 19.3 Hz 9.65 Hz
f1 500 Hz 1000 Hz
f2 6.5 kHz 25 kHz
f3 65 kHz 250 kHz
f4 1.3 MHz 5 MHz

A0
Slope -20dB/10
A1
Peak-p jitter and wander

A2
(log)

A3

A4

0 f0 f12 f11 f10 f9 f8 f1 f2 f3 f4

Frequency (log)

Specification
5-24
 F2880_F04
GENERAL INFORMATION

5.4.2 Jitter Generation

5.4.2.1 PDH Interface

Frequency of band-pass filter for examination, and the maximum jitter for allowable
values in PDH network are shown below.

As to SDH equipment, the PDH interface jitter must exceed these values. On the
edge of SDH and PDH system, jitter accepts these values:

Interface Rate 1544 kbit/s 2048 kbit/s 34368 kbit/s 44736 kbit/s
Uip-p f1 thru f4 5.0 Hz 1.5 Hz 1.5 Hz 5.0 Hz
f3, f4 0.1 Hz 0.2 Hz 0.15 Hz 0.1 Hz

Frequency f1 10 Hz 20 Hz 100 Hz 10 Hz
of
Band-pass f3 6kHz 18 kHz 10 kHz 30 kHz
f4 40kHz 100 kHz 800 kHz 400 kHz

5.4.2.2 SDH Interface

When inputting no jittersthe jitter measured at output port on SDH relay with
high-pass filter is not greater than 0.01 Uirms. While no jittering in synchronous
input port, the jitters produced at terminal equipment interface should conform to
values in the table below, for measuring time surpass 60 seconds.

Interface Testing filter (Hz) Jittering peak-peak value UIp-p

STM-1 500 Hz thru 1.3 MHz 0.50
65 kHz thru 1.3 MHz 0.10
STM-4 1000 Hz thru 5 MHz 0.50
250 kHz thru 5 MHz 0.10

Specification
5-25
F2880_F04
GENERAL INFORMATION

5.4.3 Jitter Generation by Mapping

When PDH is mapped into SDH, a mapping jitter is generated. The testing values are
smaller than values listed in table below:

G.703 1544 G.703 2048 G.703 34368 G.703 44736

kbit/s kbit/s kbit/s kbit/s
Tolerance 32 ppm 50 ppm 20 ppm 20 ppm

Filter -20 dB/dec f1 10Hz 20 Hz 100 Hz 10Hz

Characteristic f3 8kHz 18 kHz 10 kHz 30kHz
f4 40Khz 100 kHz 800 kHz 400kHz
Maximum Peak-Peak Value f1 thru f4 0.25 0.4 0.4 Further study
for Mapping Jitter
f3 thru f4 0.1 0.075 0.075 0.075

5.4.4 Combined Jitter and Wander

Generally, SDH system provides mapping jitter and pointer adjusting jitter whose
combination is called a combined jitter. As to combined jitter, four types of the
testing series temporarily designated by ITU-T, can basically represent number of
conditions for combined jitter.

5.4.4.1 Testing Series

Single pointer with opposite polarity:

T1

Regular single pointer adding a double pointer: T20.75s T3=2ms

T3

T2
b
NOTE: T2 and T3 are defined f only for 2M. Definition for 34M/45M is further
study.

Specification
5-26
 F2880_F04
GENERAL INFORMATION

Regular single pointer that leaks a pointer: T2>0.75s

T2 T2 T2 T2 T2 2*T2

Double pointer with opposite polarity: T3=2ms

interval>=10s T3
T3

5.4.4.2 Criterion of Combined Jitter

G.703 1544 G.703 2048 G.703 34368 G.703 44736

kbit/s kbit/s kbit/s kbit/s
Tolerance 32 ppm 50 ppm 20 ppm 20 ppm
High-Through f1 10 Hz 20 Hz 100 Hz 10 Hz
Filter
f3 8 kHz 18 kHz 10 kHz 30 kHz
20 dB/dec
f4 40 kHz 100 kHz 800 kHz 400 kHz
Maximum f1 thru f4 1.5 0.4* * *
0.4/0.75 0.4/0.75
Peak-Peak Value
for mapping jitter f3 thru f4 Further study 0.075 0.075 0.075

*: The extreme value 0.4 UI corresponds to pointer testing series shown in a, b

and c; the extreme value 0.75 UI corresponds to pointer testing series shown in
d, while the extreme value 0.075 UI corresponds to pointer testing series shown
in a, b, c and d.

Specification
5-27
F2880_F04
GENERAL INFORMATION

5.5 External Interface

5.5.1 Orderwire
E1 OH (overhead): Handset
600 balanced
Rx: 2 dBm
Tx: 0 dBm

Connector: RJ-11

5.5.2 User Channel

Accessible OH: F1 or E2; one per SDH interface

Logical Interface: 64 kbit/s V.11

Contra-directional
Co-directional

Connector: RJ-45

5.5.3 Office Alarm

Accessible Output: One per equipment

Output: PM
DM
AB
AL

Type: Relay contact; Open/Loop

Maximum Current: AB/AL: 1A

PM,DM: 500 mA

Connector: RJ-45

Specification
5-28
 F2880_F04
GENERAL INFORMATION

5.5.4 Housekeeping Alarm/Control

Accessible port: Eight for Housekeeping Alarm
Four for Housekeeping Control

NOTE: Four HKA ports are supported in Mainboard, other four HKA ports are
supported in FAN2.

Type: HKA [photo-coupler]/HKC [relay contact]

Open/Loop

Connector: RJ-45

Maximum Current/Voltage: (HKC) 0.5 A/200 V

Specification
5-29
F2880_F04
GENERAL INFORMATION

5.6 Environmental Conditions

5.6.1 Temperature
Intra-Station Range: 0 ~ +45C

Intra-Station Short Time: -5 ~ +50C

(within 72 consecutive hours; within 15 days a year)

Storage: -5 ~ +50C

Transportation: -5 ~ +50C

5.6.2 Humidity
Intra-Station Range: 5 ~ 95 %

Storage: 5 ~ 95 %

Transportation: 5 ~ 95 %

5.6.3 Vibration
Intra-Station Use: 1.5 mm/s2 2-9 Hz
5 m/s2 9-200 Hz
40 m/s2 peak

Storage: 1.5 mm/s2 2-9 Hz

2
5 m/s 9-200 Hz
40 m/s2 peak

Transportation: 3.5 mm/s2 2-9 Hz

10 m/s2 9-200 Hz
15 m/s2 200-500 Hz
300 m/s2 peak

Specification
5-30
 F2880_F04
GENERAL INFORMATION

5.7 Power Distribution

5.7.1 Power Interface

Input Voltage: 38.4 V DC ~ 60 V DC

Power Input: 130W

Protection: Fuse (4A DC)

Ground: FG/BG

Maximum Power Supply: Less than 130 W per system

5.7.2 Power Consumption

Equipment Power Consumption: less than 130W (full-mounted with modules)

PWR Board Capacity: 3.5A (DC)

Mainboard with all modules: 35(W)

E11_8: 3(W)

E11_32 5(W)

E12_8 2(W)

E12_32 4(W)

E31 8(W)

E32 8(W)

100Base_T2 18(W)

100Base_T 20(W)

STM1O_S 3(W)

STM1O_D 5(W)

Specification
5-31
F2880_F04
GENERAL INFORMATION

5.8 User Interface

5.8.1 CID Interface

Physical Layer: RS-232C, 10Base-T

Connector: f port: RJ45 to D-sub 9-pin (RS-232C)

F port: UTP Straight cable (via Hub)

Connection: UTP Straight cable(via Hub)

5.8.2 NMS
Physical Layer: 10Base-T

Connector: RJ-45(by F port)

Connection: UTP Straight cable(via Hub)

Protocol: TCP/IP

Specification
5-32
 F2880_F04
GENERAL INFORMATION

5.9 Physical Specification

5.9.1 C-Node Subrack Dimensions

Height: 88 mm

Width: 482.6 mm

Depth: 306 mm

Weight: 7.3 Kg (Typical configuration, with a E12 subboard)

7.8 Kg (Maximum configuration, with 4 E12 subboards)

NOTE: Above rough dimension includes any projection of subrack.

Specification
5-33
E
This page is intentionally left blank.