Reg. No.

MANIPAL INSTITUTE OF TECHNOLOGY

Manipal University
FIRST SEMESTER B.TECH. (E & C) DEGREE END SEMESTER EXAMINATION
DECEMBER 2013
SUBJECT: BASIC ELECTRONICS (ECE - 101)

TIME: 3 HOURS MAX. MARKS: 50

Instructions to candidates
Answer ANY FIVE full questions.
Missing data may be suitably assumed.

1A. Write the circuit diagram of a centre tap rectifier and

i) Draw the voltage waveform across load without filter
ii) Obtain an expression average value of the output voltage of case (i)
iii) Draw the voltage waveform across load with filter
iv) Give the expression for ripple factor

1B. For the clamper circuit shown in Fig. Q1(B) draw the voltage waveform across R and
explain its working.

1C. From the device symbols given in Fig. Q1(C), identify the devices they represent.
(5+3+2)

2A. In the voltage divider biasing circuit shown in Fig. Q2(A), IC = 1mA, VCE = 6V, VCC
=12V, R1 = 20k, R2 = 2k, = 100, VBE = 0.7V. Determine the values of IB, Vth,
Rth, RC and RE.

2B. Derive the expression for the output voltage of the Opamp circuit shown in Fig.
Q2(B). If all R are identical, using your expression for output voltage, complete
the following table.

V1(V) V2(V) V3(V) V0(V)

1 -1 -2
-4 1 2

2C. With necessary derivation, show that the circuit in Fig. Q2(C) is an Integrator.
(5+3+2)

3A. In the circuit of Fig. Q3(A), switches are controlled by digital signals A and B. If
these signals are 5V, the corresponding switches are closed, else they are open. The
circuit is supposed to be a logic gate. Identify the type of the gate by completing the
following table. What happens if the switches are placed in parallel instead of
series?

ECE 101 Page 1 of 4

 A B Vout
0 0
0 5V
5V 0
5V 5V

3B. Identify the type of Oscillator in Fig. 3Q(B). If R=10k and frequency of oscillation
is 10kHz, determine the value of C.

3C. Subtract 0011 from 0101 i) Directly ii) using 1s complement method.
(5+3+2)

4A. With necessary diagram explain the working of a 8-bit Serial-in Parallel-out (SIPO)
shift register. To this shift register, starting from MSB, a binary number 10111011
is fed with data entering from left. The initial content of shift register is assumed to
be 10101010. What will be the shift register output at the end of 2 clock pulses and at
the end of 8 clock pulses?

4B. Simplify the following K-map. Is your simplified expression is unique? Is there any
other possible expression? Is there any essential prime implicant?

CD 00 01 11 10
AB
00 1 1
01 1 1
11 1 1
10 1 1

4C. Explain the working of 3-bit Parallel Comparator/Flash A/D converter. (5+3+2)

5A. With necessary waveforms show that the circuit in Fig. Q5(A) is a astable
multivibrator. If R1=R2=10k and C=0.1F, what is the duty cycle and time period
of the output square wave.

5B. Explain the working of SR flip-flop using NAND gates.

5C. With the help of neat diagrams, explain the working of a 3-bit ripple up counter
using JK flip-flops. (5+3+2)

6A. If Vm(t) = 5cos (21000t) and Vc(t) = 10cos (210000t), calculate the modulation
index and bandwidth of amplitude modulated signal. What is the modulation index

ECE 101 Page 2 of 2

 required to double the total power required to transmit AM signal. Derive the
expression for transmitted power.

6B. Draw the block diagram of AM super-heterodyne receiver and explain its each
block showing the waveforms at each stage.

6C. Figure Q6(C) reperesents modulated signals. Identify the type of modulation used in
two cases. (5+3+2)

Fig. Q1(B) Fig. Q1(C)

Fig. Q2(A) Fig. Q2(B) Fig. Q2(C)

Fig. Q3(A) Fig. Q3(B) Fig. Q5(A)

ECE 101 Page 3 of 2

 Fig. Q6(C)

ECE 101 Page 4 of 2