Experiment No.

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Date: / /

DESIGN OF MULTIPLEXER AND DEMULTIPLEXER

AIM:
(i )To design and implement a 2:1, 4:1 mux and to implement 1:8 mux using IC 74153.
( ii)To design and implement a 1:2, 1:4 demux and to implement 1:8 demux using IC 74155.

APPARATUS REQUIRED:
Sl.No. Apparatus. Specification / Range Qty.
1 Power supply 0-5 V 1 No.
2 Bread Board - 1 No.
3 Resistor 330 1 No.
4 LED - 4 Nos.
5 Triple 3-input AND gate IC 7411 2 Nos.
6 Hexa inverter gate IC 7404 1 No.
7 Quad-2-input AND IC 7408 1 No.
8 Quad-2-input OR IC 7432 1 No.
9 Dual 4-Line to 1-Line Multiplexer IC 74153 1 No.

10 Dual 1-Line to 4-Line Demultiplexer IC 74155 1 No.

11 Connecting wires - as required

THEORY:
Multiplixers:
A multiplexer(or mux) is a combinational circuits that selects several analog or digital input
signals and forwards the selected input into a single output line. A multiplexer of 2n inputs has
n selected lines, which are used to select any of the input lines. Hence it is also called a data
selector. The Multiplexers are mainly used to increase the amount of data that can be sent over
the network within a certain amount of time and bandwidth.Multiplexers can also be used to
implement Boolean functions of multiple variables.

Fig. 1(a): Conceptual diagram showing the operation of Mux.

Fig.1 (b): Schematic diagram of the 4:1 mux.

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 Demultiplexer:
A demultiplexer (or demux) is a device that takes a single input line and routes
it to one of several digital output lines. A demultiplexer of 2n outputs has n select lines, which
are used to select the output line to which input is to be connected. Hence it is also called a
data distributor.

Fig. 2(a): Conceptual diagram showing the operation of demux.

Fig.2 (b): Schematic diagram of the 1:4 demux.

One use for multiplexers is economizing connections over a single channel, by connecting the
single output of multiplexer to the single input of demultiplexer. In this case, the cost of
implementing separate channels for each data source is higher than the cost and inconvenience
of providing the multiplexing/demultiplexing functions.

Chaining Multiplexers
Larger Multiplexers can be constructed by using smaller multiplexers by chaining them
together. For example, an 8-to-1 multiplexer can be made with two 4-to-1 and one 2-to-1
multiplexers. The two 4-to-1 multiplexer outputs are fed into the 2-to-1 with the selector pins
on the 4-to-1's put in parallel giving a total number of selector inputs to 3, which is equivalent
to an 8-to-1.
Demultiplexers are sometimes convenient for designing general purpose logic, because if the
demultiplexer's input is always true, the demultiplexer acts as a decoder. This means that any
function of the selection bits can be constructed by logically OR-ing the correct set of outputs.

Implementation of MUX and DEMUX using ICs.

Dual 4-Line to 1-Line Multiplexer (IC 74153) and Dual 1-Line to 4-Line Demultiplexer
(IC 74155) are commercially used ICs for doing Mux and Demux operations. These ICs could
also be used for encoding and decoding applications also.

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IC 74153: The 74153 MUX has two separate 2-input/4-row MUXs on it. We will turn on only
the MUX needed using the STROBEs (G1, G2). Remember, each strobe turns its MUX on
when it is low ( Hence Active low operation). Here the select lines are A, B and the data inputs
are C0, C1, C2, C3. The outputs of the mux is denoted as Y1, Y2.

Fig.3(a)

Fig.3(b)

Fig. 3(a),Fig 3(b) shows the connection diagram, logic diagram respectively of the IC 74153.

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IC 74155: It is has two demux within the IC which could be enabled by the
application of active low enabled strobe signal. Here A, B act as select lines and
Y0,Y1,Y2,Y3 denotes the outputs.

Connection diagram
Fig. 4(a)

Fig 4(b)

Fig. 4(a),Fig 4(b) shows the connection diagram, logic diagram respectively of the IC 74155.

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DESIGN OF MUX:
2:1 Mux Symbol:

2:1 OUTPUT
2 INPUTS (Y)
(I0& I1 MUX

SELECT
LINE(S)

Y s I o s I1
TRUTH TABLE:

S I0 I1 Y
0 0 X 0
0 1 X 1
1 X 0 0
1 X 1 1

CIRCUIT DIAGRAM:

4:1 Mux Symbol:

D0
D1 4 : 1
MUX Y
D2
D3

S1 S0
TRUTH TABLE:

INPUTS SELECT LINES OUTPUT

A0 A1 A2 A3 S1 S0 Y
1 0 0 0 0 0 A0S1S0
0 1 0 0 0 1 A1S1S0
0 0 1 0 1 0 A2S1S0
0 0 0 1 1 1 A3S1S0

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CIRCUIT DIAGRAM:

PROCEDURE:
1. Check the ICsprovided, using IC tester.
2. Mount the IC's on a bread board carefully.
3. Connect VCC and ground pins of IC to the corresponding terminals in the power
supply.
4. Wire up the circuit as per circuit diagram obtained from the Boolean expression.
5. Verify the truth table by providing various input combinations and checking the
corresponding outputs.

PIN Diagram for IC 74153 (Dual MUX) and IC7411 (3 input AND gate):

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4:1 MUX Using IC 74153:

__ __ __ __
Go = 0 G1 = 1 Go = 1 G1 = 0

S0 S1 1Y S0 S1 2Y
0 0 A0 0 0 A1
0 1 B0 0 1 B1
1 0 C0 1 0 C1
1 1 D0 1 1 D1

8:1 MUX using IC74153:

S2 S1 S0 O/P
0 0 0 A0
0 0 1 B0
0 1 0 C0
0 1 1 D0
1 0 0 A1
1 0 1 B1
1 1 0 C1
1 1 1 D1

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FULL Adder Using IC74153:

A B C Sum Carry
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

DEMULTIPLEXER: 1:2 DEMUX TRUTH TABLE

SYMBOL: D S Y0 Y1
0 0 0 0
0 1 0 0
1 0 1 0
1 1 0 1

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1: 2 DEMUX Circuit Diagram:
1:4 DEMUX SYMBOL:

Y0
1 : 4 Y1
D DEMUX
Y2
Y3

A B

1:4 DEMUX TRUTH TABLE:

1:4 DEMUX Circuit Diagram:

S0 S1 D Y0 Y1 Y2 Y3
0 0 0 0 0 0 0
0 0 1 1 0 0 0
0 1 0 0 0 0 0
0 1 1 0 1 0 0
1 0 0 0 0 0 0
1 0 1 0 0 1 0
1 1 0 0 0 0 0
1 1 1 0 0 0 1

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PIN Diagram of IC74155:

1:4 DEMUX Circuit Diagram using IC 74155:

Input Output
Da __ S0 S1 Y0 Y1 Y2 Y3
Ga
X 1 X X 1 1 1 1
1 X X X 1 1 1 1
0 0 0 0 0 1 1 1
0 0 0 1 1 0 1 1
0 0 1 0 1 1 0 1
0 0 1 1 1 1 1 0

Input Output

__ S0 S1 Y4 Y5 Y6 Y7
Db
Gb
X 1 X X 1 1 1 1
1 X X X 1 1 1 1
1 0 0 0 0 1 1 1
1 0 0 1 1 0 1 1
1 0 1 0 1 1 0 1
1 0 1 1 1 1 1 0

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1:8 DEMUX Circuit Diagram using IC 74155:

__ S2 S1 S0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
G0
X X X X 1 1 1 1 1 1 1 1
0 0 0 0 0 1 1 1 1 1 1 1
0 0 0 1 1 0 1 1 1 1 1 1
0 0 1 0 1 1 0 1 1 1 1 1
0 0 1 1 1 1 1 0 1 1 1 1
0 1 0 0 1 1 1 1 0 1 1 1
0 1 0 1 1 1 1 1 1 0 1 1
0 1 1 0 1 1 1 1 1 1 0 1
0 1 1 1 1 1 1 1 1 1 1 0

RESULT:
The multiplexers and demultiplexers are designed and implemented.
The truth tables were verified for all the input combinations.

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