PERIODICAL TEST I

Subject Name : Microprocessor and Microcontroller Subject Code :EC6504

Branch : B.E- ECE Semester :V
Date : 22-08-2017, FN Time : 1.30 Hrs
Class : III ECE Total Marks : 50
Answer all the questions
Part-A 5 2 = 10 Marks
1. Schematically show, how synchronization is made between 8086 and its coprocessor (CO2)
2. What is pipelined architecture (CO1)
3. Draw the timing diagram for bus request and bus grant signals (CO2)
4. Explain BHE and LOCK signals of 8086 (CO2)
5. What is meant by software interrupt in 8086 (CO1)

Part B 4 x 7= 28 Marks
1. With neat diagram explain the maximum mode configuration of 8086 (CO2)
2. Define loosely coupled system and explain the schemes used for establishing priority (CO2)
3. Write an ALP to find the sum of numbers in an array of 10 elements. (CO1)
4. Explain in detail about the system bus timing of minimum mode 8086 (CO2)

Part C 1 x 12 =12 Marks

1. Draw the architecture of 8086 and explain the EU of 8086 (CO1)

Performance Analysis:
QUESTION-1 QUESTION-2 QUESTION-3 QUESTION-4 QUESTION-5
UN AN AP UN AN AP UN AN AP UN AN AP UN AN AP
PART-A

PART C
QUESTION-1 QUESTION-2 QUESTION-3 QUESTION-4
PART-B QUESTION - 1
UN AN AP UN AN AP UN AN AP UN AN AP UN AN AP

Parameter Maximum Marks Marks Scored Percentage

Understanding
Analyzing
Applying
Total 50

Signature of the course co-ordinator Signature of the Subject in-Charge