Escolar Documentos
Profissional Documentos
Cultura Documentos
P441/P442/P444
Numerical Distance Protection
Version D2.0
Technical Manual
P44x/EN T/F65
Technical Guide P44x/EN T/F65
GENERAL CONTENT
BLANK PAGE
Safety Section Pxxxx/EN SS/G11
SAFETY SECTION
Pxxxx/EN SS/G11 Safety Section
Safety Section Pxxxx/EN SS/G11
(SS) - 1
CONTENTS
1. INTRODUCTION 3
3.2 Labels 4
6.4 Environment 7
Pxxxx/EN SS/G11 Safety Section
(SS) - 2
Safety Section Pxxxx/EN SS/G11
(SS) - 3
1. INTRODUCTION
This Safety Section and the relevant equipment documentation provide full information on
safe handling, commissioning and testing of this equipment. This Safety Section also
includes reference to typical equipment label markings.
The technical data in this Safety Section is typical only, see the technical data section of the
relevant equipment documentation for data specific to a particular equipment.
Before carrying out any work on the equipment the user should be familiar with
the contents of this Safety Section and the ratings on the equipment’s rating
label.
Reference should be made to the external connection diagram before the equipment is
installed, commissioned or serviced.
Language specific, self-adhesive User Interface labels are provided in a bag for some
equipment.
• Are familiar with the installation, commissioning, and operation of the equipment and of
the system to which it is being connected;
• Are able to safely perform switching operations in accordance with accepted safety
engineering practices and are authorized to energize and de-energize equipment and to
isolate, ground, and label it;
• Are trained in the care and use of safety apparatus in accordance with safety
engineering practices;
(SS) - 4
3.1 Symbols
3.2 Labels
See Safety Guide (SFTY/4L M) for typical equipment labeling information.
(SS) - 5
To ensure that wires are correctly terminated the correct crimp terminal and tool
for the wire size should be used.
The equipment must be connected in accordance with the appropriate connection
diagram.
Protection Class I Equipment
- Before energizing the equipment it must be earthed using the protective
conductor terminal, if provided, or the appropriate termination of the
supply plug in the case of plug connected equipment.
- The protective conductor (earth) connection must not be removed since
the protection against electric shock provided by the equipment would be
lost.
- When the protective (earth) conductor terminal (PCT) is also used to
terminate cable screens, etc., it is essential that the integrity of the
protective (earth) conductor is checked after the addition or removal of
such functional earth connections. For M4 stud PCTs the integrity of the
protective (earth) connections should be ensured by use of a locknut or
similar.
The recommended minimum protective conductor (earth) wire size is 2.5 mm²
(3.3 mm² for North America) unless otherwise stated in the technical data section
of the equipment documentation, or otherwise required by local or country wiring
regulations.
The protective conductor (earth) connection must be low-inductance and as short
as possible.
All connections to the equipment must have a defined potential. Connections that
are pre-wired, but not used, should preferably be grounded when binary inputs
and output relays are isolated. When binary inputs and output relays are
connected to common potential, the pre-wired but unused connections should be
connected to the common potential of the grouped connections.
Before energizing the equipment, the following should be checked:
- Voltage rating/polarity (rating label/equipment documentation);
- CT circuit rating (rating label) and integrity of connections;
- Protective fuse rating;
- Integrity of the protective conductor (earth) connection (where
applicable);
- Voltage and current rating of external wiring, applicable to the application.
Accidental touching of exposed terminals
If working in an area of restricted space, such as a cubicle, where there is a risk of
electric shock due to accidental touching of terminals which do not comply with
IP20 rating, then a suitable protective barrier should be provided.
Equipment use
If the equipment is used in a manner not specified by the manufacturer, the
protection provided by the equipment may be impaired.
Removal of the equipment front panel/cover
Removal of the equipment front panel/cover may expose hazardous live parts,
which must not be touched until the electrical power is removed.
UL and CSA/CUL Listed or Recognized equipment
To maintain UL and CSA/CUL Listing/Recognized status for North America the
equipment should be installed using UL or CSA Listed or Recognized parts for the
following items: connection cables, protective fuses/fuseholders or circuit
breakers, insulation crimp terminals and replacement internal battery, as specified
in the equipment documentation.
Pxxxx/EN SS/G11 Safety Section
(SS) - 6
For external protective fuses a UL or CSA Listed fuse shall be used. The Listed
type shall be a Class J time delay fuse, with a maximum current rating of 15 A and
a minimum d.c. rating of 250 Vd.c., for example type AJT15.
Where UL or CSA Listing of the equipment is not required, a high rupture capacity
(HRC) fuse type with a maximum current rating of 16 Amps and a minimum d.c.
rating of 250 Vd.c. may be used, for example Red Spot type NIT or TIA.
Equipment operating conditions
The equipment should be operated within the specified electrical and
environmental limits.
Current transformer circuits
Do not open the secondary circuit of a live CT since the high voltage produced
may be lethal to personnel and could damage insulation. Generally, for safety,
the secondary of the line CT must be shorted before opening any connections to
it.
For most equipment with ring-terminal connections, the threaded terminal block
for current transformer termination has automatic CT shorting on removal of the
module. Therefore external shorting of the CTs may not be required, the
equipment documentation should be checked to see if this applies.
For equipment with pin-terminal connections, the threaded terminal block for
current transformer termination does NOT have automatic CT shorting on removal
of the module.
External resistors, including voltage dependent resistors (VDRs)
Where external resistors, including voltage dependent resistors (VDRs), are fitted
to the equipment, these may present a risk of electric shock or burns, if touched.
Battery replacement
Where internal batteries are fitted they should be replaced with the recommended
type and be installed with the correct polarity to avoid possible damage to the
equipment, buildings and persons.
Insulation and dielectric strength testing
Insulation testing may leave capacitors charged up to a hazardous voltage. At the
end of each part of the test, the voltage should be gradually reduced to zero, to
discharge capacitors, before the test leads are disconnected.
Insertion of modules and pcb cards
Modules and PCB cards must not be inserted into or withdrawn from the
equipment whilst it is energized, since this may result in damage.
Insertion and withdrawal of extender cards
Extender cards are available for some equipment. If an extender card is used,
this should not be inserted or withdrawn from the equipment whilst it is energized.
This is to avoid possible shock or damage hazards. Hazardous live voltages may
be accessible on the extender card.
External test blocks and test plugs
Great care should be taken when using external test blocks and test plugs such
as the MMLG, MMLB and MiCOM P990 types, hazardous voltages may be
accessible when using these. *CT shorting links must be in place before the
insertion or removal of MMLB test plugs, to avoid potentially lethal voltages.
*Note: When a MiCOM P992 Test Plug is inserted into the MiCOM P991 Test
Block, the secondaries of the line CTs are automatically shorted, making
them safe.
Fiber optic communication
Where fiber optic communication devices are fitted, these should not be viewed
directly. Optical power meters should be used to determine the operation or
signal level of the device.
Safety Section Pxxxx/EN SS/G11
(SS) - 7
Cleaning
The equipment may be cleaned using a lint free cloth dampened with clean water,
when no connections are energized. Contact fingers of test plugs are normally
protected by petroleum jelly, which should not be removed.
CAUTION - CTs must NOT be fused since open circuiting them may
produce lethal hazardous voltages.
6.4 Environment
The equipment is intended for indoor installation and use only. If it is required for use in an
outdoor environment then it must be mounted in a specific cabinet of housing which will
enable it to meet the requirements of IEC 60529 with the classification of degree of
protection IP54 (dust and splashing water protected).
Pollution Degree - Pollution Degree 2 Compliance is demonstrated by reference to
Altitude - Operation up to 2000m safety standards.
IEC 60255-27:2005
EN 60255-27: 2005
Pxxxx/EN SS/G11 Safety Section
(SS) - 8
BLANK PAGE
Introduction P44x/EN IT/F65
INTRODUCTION
Introduction P44x/EN IT/F65
CONTENT
1. INTRODUCTION TO MiCOM 3
BLANK PAGE
Introduction P44x/EN IT/F65
1. INTRODUCTION TO MiCOM
MiCOM is a comprehensive solution capable of meeting all electricity supply requirements. It
comprises a range of components, systems and services from AREVA T&D Protection and
Control.
Central to the MiCOM concept is flexibility.
MiCOM provides the ability to define an application solution and, through extensive
communication capabilities, to integrate it with your power supply control system.
The components within MiCOM are:
Zn 1/5 A 50/60 Hz
SER N o Vx V
DIAG N o Vn V
LCD
TRIP
Fixed ALARM
function
OUT OF SERVICE
LEDs
HEALTHY
User programable
= CLEAR function LEDs
= READ
= ENTER
Keypad
SK 1 SK 2
Bottom
cover
Battery compartment Front comms port Download/monitor port
P0103ENa
In 1/5 A 50/60 Hz
SER No Vx V
DIAG No Vn V
LCD
TRIP
Fixed ALARM
Hotkeys
function
LEDs OUT OF SERVICE
HEALTHY
User programable
= CLEAR function LEDs
= READ
= ENTER
Keypad
Bottom
cover
Battery compartment Front comms port Download/monitor port P0103ENb
I 50/60 Hz E202519
Vx V
C
UL US LISTED
SER No.
V
IBD2
DIAG No. Vn V IND. CONT. EQ. User Programmable
Fixed Function Function LED’s (tri-color)
LED’s
TRIP
1 6
ALARM
OUT OF 2 7
SERVICE
Hotkeys
HEALTHY
3 8
User Programmable C = CLEAR
Function LED’s = READ
(tri-color) = ENTER
4 9
Navigation
Keypad
5 10
P0103ENc
• a keypad comprising 4 arrow keys ( , , and ), an enter key (), a clear key
(), and a read key (c) and two additive hotkeys (since hardware G-J, software
C2.X).
• 12 LEDs; 4 fixed function LEDs on the left hand side of the front panel and 8
programmable function LEDs on the right hand side.
• 10 additional function keys plus 10 additional LEDs (since hardware K, software D1.x)
Hotkey functionality (figures 2 and 3):
• The relay front panel, features control pushbutton switches with programmable LEDs
that facilitate local control. Factory default settings associate specific relay functions
with these 10 direct-action pushbuttons and LEDs e.g. Enable/Disable the auto-
recloser function. Using programmable scheme logic, the user can readily change the
default direct-action pushbutton functions and LED indications to fit specific control
and operational needs.
Under the top hinged cover:
• the relay serial number, and the relay’s current and voltage rating information*.
Under the bottom hinged cover:
• battery compartment to hold the 1/2 AA size battery which is used for memory
back-up for the real time clock, event, fault and disturbance records.
• a 9-pin female D-type front port for communication with a PC locally to the relay (up to
15m distance) via an EIA(RS)232 serial data connection.
• a 25-pin female D-type port providing internal signal monitoring and high speed local
downloading of software and language text via a parallel data connection.
The fixed function LEDs on the left hand side of the front panel are used to indicate the
following conditions:
Trip (Red) indicates that the relay has issued a trip signal. It is reset when the associated
fault record is cleared from the front display. (Alternatively the trip LED can be configured to
be self-resetting)*.
Alarm (Yellow) flashes to indicate that the relay has registered an alarm. This may be
triggered by a fault, event or maintenance record. The LED will flash until the alarms have
been accepted (read), after which the LED will change to constant illumination, and will
extinguish when the alarms have been cleared.
Out of service (Yellow) indicates that the relay’s protection is unavailable.
Healthy (Green) indicates that the relay is in correct working order, and should be on at all
times. It will be extinguished if the relay’s self-test facilities indicate that there is an error with
the relay’s hardware or software. The state of the healthy LED is reflected by the watchdog
contact at the back of the relay.
Since version C2.0, to improve the visibility of the settings via the front panel, the LCD
contrast can be adjusted using the “LCD Contrast” setting with the last cell in the
CONFIGURATION column.
P44x/EN IT/F65 Introduction
A B C D E F
Power supply
connection
(Terminal
block F)
Rear comms
port (RS485)
A C D E F G H J
B
IRIG -B
TX
RX
Optional fibre optic Current and voltage Digital input connections Rear comms port
connection input terminals (Terminal blocks D & E) (RS485) (TB J)
(Terminal block A) (Terminal block C) P3024ENa
A B C D E F G H J K L M N
1
1 2 3 19
2
3
3
3
3
4 5 6 20
4
4
4
5
5
IRIG-B
6
7 8 9 21
7
8
8
9
9
10 11 12 22
10
10
10
10
10
10
10
10
11
11
11
11
11
11
11
11
12
12
12
12
12
12
12
12
13
13
13
13
13 14 15 23
13
13
13
13
TX
RX
14
14
14
14
14
14
14
14
15
15
15
15
15
15
15
15
16 17 18 24
16
16
16
16
16
16
16
16
17
17
17
17
17
17
17
17
18
18
18
18
18
18
18
18
Optional fibre 1A/5A Programmable
optic connection Current and voltage digital input Rear comms port
IEC60870-5-103 input terminals connections (RS485)
(VDEW) (Terminal block C) (Terminal blocks D, E & F) P3025ENa
• the front panel user interface via the LCD and keypad.
• the rear port which supports one protocol of either Courier, Modbus,
IEC 60870-5-103 or DNP3.0. The protocol for the rear port must be specified when the
relay is ordered.
• the optional Ethernet port wich supports IEC61850 (since version C3.X),
• The optional second rear port wich supports Courier protocol (since version C3.X).
The measurement information and relay settings which can be accessed from the three
interfaces are summarised in Table 1.
of all settings
• • • •
Digital I/O signal status
• • • • • •
Display/extraction of
measurements
• • • • • •
Display/extraction of
fault records
• • • • • •
Extraction of
disturbance records
• • • • •
(Floc in %) (1)
Programmable scheme
logic settings
•
Reset of fault & alarm
records
• • • • •
Clear event & fault (2)
records
• • • • •
Time synchronisation
• • • • •
Control commands
• • • • •
TABLE 1
(1)
since version C2.X.
(2)
with generic commands
(3)
Since version C3.X.
Introduction P44x/EN IT/F65
Column
data
settings
• reset LEDs
• communications settings
• measurement settings
• commissioning settings
∗
may vary according to relay type/model
Introduction P44x/EN IT/F65
TABLE 2
Each of the two passwords are 4 characters of upper case text. The factory default for both
passwords is AAAA. Each password is user-changeable once it has been correctly entered.
Entry of the password is achieved either by a prompt when a setting change is attempted, or
by moving to the ‘Password’ cell in the ‘System data’ column of the menu. The level of
access is independently enabled for each interface, that is to say if level 2 access is enabled
for the rear communication port, the front panel access will remain at level 0 unless the
relevant password is entered at the front panel. The access level enabled by the password
entry will time-out independently for each interface after a period of inactivity and revert to
the default level. If the passwords are lost an emergency password can be supplied - contact
AREVA with the relay’s serial number. The current level of access enabled for an interface
can be determined by examining the 'Access level' cell in the 'System data' column, the
access level for the front panel User Interface (UI), can also be found as one of the default
display options.
The relay is supplied with a default access level of 2, such that no password is required to
change any of the relay settings. It is also possible to set the default menu access level to
either level 0 or level1, preventing write access to the relay settings without the correct
password. The default menu access level is set in the ‘Password control’ cell which is found
in the ‘System data’ column of the menu (note that this setting can only be changed when
level 2 access is enabled).
3.5 Relay configuration
The relay is a multi-function device which supports numerous different protection, control
and communication features. In order to simplify the setting of the relay, there is a
configuration settings column which can be used to enable or disable many of the functions
of the relay. The settings associated with any function that is disabled are made invisible, i.e.
they are not shown in the menu. To disable a function change the relevant cell in the
‘Configuration’ column from ‘Enabled’ to ‘Disabled’.
The configuration column controls which of the four protection settings groups is selected as
active through the ‘Active settings’ cell. A protection setting group can also be disabled in the
configuration column, provided it is not the present active group. Similarly, a disabled setting
group cannot be set as the active group.
The column also allows all of the setting values in one group of protection settings to be
copied to another group.
To do this firstly set the ‘Copy from’ cell to the protection setting group to be copied, then set
the ‘Copy to’ cell to the protection group where the copy is to be placed. The copied settings
are initially placed in the temporary scratchpad, and will only be used by the relay following
confirmation.
P44x/EN IT/F65 Introduction
To restore the default values to the settings in any protection settings group, set the ‘Restore
defaults’ cell to the relevant group number. Alternatively it is possible to set the ‘Restore
defaults’ cell to ‘All settings’ to restore the default values to all of the relay’s settings, not just
the protection groups’ settings. The default settings will initially be placed in the scratchpad
and will only be used by the relay after they have been confirmed. Note that restoring
defaults to all settings includes the rear communication port settings, which may result in
communication via the rear port being disrupted if the new (default) settings do not match
those of the master station.
3.6 Front panel user interface (keypad and LCD)
When the keypad is exposed it provides full access to the menu options of the relay, with the
information displayed on the LCD.
The (, , , and keys which are used for menu navigation and setting value
changes include an auto-repeat function that comes into operation if any of these keys are
held continually pressed. This can be used to speed up both setting value changes and
menu navigation; the longer the key is held depressed, the faster the rate of change or
movement becomes.
P0105ENa
Alarms/Faults
Present
Entry to the menu structure of the relay is made from the default display and is not affected if
the display is showing the ‘Alarms/Faults present’ message.
3.6.2 Menu navigation and setting browsing
The menu can be browsed using the four arrow keys, following the structure shown in
figure 6. Thus, starting at the default display the key will display the first column heading.
To select the required column heading use the and keys. The setting data contained in
the column can then be viewed by using the and keys. It is possible to return to the
column header either by holding the [up arrow symbol] key down or by a single press of the
clear key . It is only possible to move across columns at the column heading level. To
return to the default display press the key or the clear key from any of the column
headings. It is not possible to go straight to the default display from within one of the column
cells using the auto-repeat facility of the key, as the auto-repeat will stop at the column
heading. To move to the default display, the key must be released and pressed again.
Default Display
MiCOM
P140
HOTKEY CB CTRL
<USR ASSX STG GRP> <MENU USR ASS1> <STG GRP USR ASS2> <USR ASS1 USR ASSX> <USR ASS2 MENU>
HOT KEY MENU SETTING GROUP 1 CONTROL INPUT 1 CONTROL INPUT 2 CONTROL INPUT 2
P1246ENa
Enter password
**** Level 1
NOTE: The password required to edit the setting is the prompt as shown
above
A flashing cursor will indicate which character field of the password may be changed. Press
the and keys to vary each character between A and Z. To move between the
character fields of the password, use the and keys. The password is confirmed by
pressing the enter key . The display will revert to ‘Enter Password’ if an incorrect
password is entered. At this point a message will be displayed indicating whether a correct
password has been entered and if so what level of access has been unlocked. If this level is
sufficient to edit the selected setting then the display will return to the setting page to allow
the edit to continue. If the correct level of password has not been entered then the password
prompt page will be returned to. To escape from this prompt press the clear key .
Alternatively, the password can be entered using the ‘Password’ cell of the ‘System data’
column.
Introduction P44x/EN IT/F65
For the front panel user interface the password protected access will revert to the default
access level after a keypad inactivity time-out of 15 minutes. It is possible to manually reset
the password protection to the default level by moving to the ‘Password’ menu cell in the
‘System data’ column and pressing the clear key instead of entering a password.
Press clear to
reset alarms
To clear all alarm messages press ; to return to the alarms/faults present display and
leave the alarms uncleared, press c. Depending on the password configuration settings, it
may be necessary to enter a password before the alarm messages can be cleared (see
section on password entry). When the alarms have been cleared the yellow alarm LED will
extinguish, as will the red trip LED if it was illuminated following a trip.
Alternatively it is possible to accelerate the procedure, once the alarm viewer has been
entered using the c key, the key can be pressed, this will move the display straight to
the fault record. Pressing again will move straight to the alarm reset prompt where
pressing once more will clear all alarms.
For protection group settings and disturbance recorder settings, the changes must be
confirmed before they are used by the relay. To do this, when all required changes have
been entered, return to the column heading level and press the key. Prior to returning to the
default display the following prompt will be given:
Update settings?
Enter or clear
Pressing will result in the new settings being adopted, pressing will cause the relay to
discard the newly entered values. It should be noted that, the setting values will also be
discarded if the menu time out occurs before the setting changes have been confirmed.
Control and support settings will be updated immediately after they are entered, without
‘Update settings?’ prompt.
P44x/EN IT/F65 Introduction
MiCOM relay
Laptop
SK 2
25 pin
download/monitor port
9 pin
Battery front comms port Serial communication port
(COM 1 or COM 2)
Serial data connector
(up to 15m) P0107ENa
None of the other pins are connected in the relay. The relay should be connected to the
serial port of a PC, usually called COM1 or COM2. PCs are normally Data Terminal
Equipment (DTE) devices which have a serial port pin connection as below (if in doubt check
your PC manual):
25 Way 9 Way
Pin no. 3 2 Rx Receive data
Pin no. 2 3 Tx Transmit data
Pin no. 7 5 0V Zero volts common
For successful data communication, the Tx pin on the relay must be connected to the Rx pin
on the PC, and the Rx pin on the relay must be connected to the Tx pin on the PC, as shown
in figure 9. Therefore, providing that the PC is a DTE with pin connections as given above, a
‘straight through’ serial connector is required, i.e. one that connects pin 2 to pin 2, pin 3 to
pin 3, and pin 5 to pin 5. Note that a common cause of difficulty with serial data
communication is connecting Tx to Tx and Rx to Rx. This could happen if a ‘cross-over’
serial connector is used, i.e. one that connects pin 2 to pin 3, and pin 3 to pin 2, or if the PC
has the same pin configuration as the relay.
PC
MiCOM relay
Protocol Courier
Baud rate 19,200 bits/s
Courier address 1
Message format 11 bit - 1 start bit, 8 data bits, 1 parity bit (even parity), 1 stop bit
The inactivity timer for the front port is set at 15 minutes. This controls how long the relay will
maintain its level of password access on the front port. If no messages are received on the
front port for 15 minutes then any password access level that has been enabled will be
revoked.
P44x/EN IT/F65 Introduction
RS232 K-Bus
PC
KITZ protocol
PC serial port converter
Modem
PC
Modem
Move down the ‘Communications’ column from the column heading to the first cell down
which indicates the communication protocol:
Protocol
Courier
The next cell down the column controls the address of the relay:
Remote address
1
Since up to 32 relays can be connected to one K-bus spur, as indicated in figure 10, it is
necessary for each relay to have a unique address so that messages from the master control
station are accepted by one relay only. Courier uses an integer number between 0 and 254
for the relay address which is set with this cell. It is important that no two relays have the
same Courier address. The Courier address is then used by the master station to
communicate with the relay.
The next cell down controls the inactivity timer:
Inactivity timer
10.00 mins
The inactivity timer controls how long the relay will wait without receiving any messages on
the rear port before it reverts to its default state, including revoking any password access
that was enabled. For the rear port this can be set between 1 and 30 minutes.
Note that protection and disturbance recorder settings that are modified using an on-line
editor such as PAS&T must be confirmed with a write to the ‘Save changes’ cell of the
‘Configuration’ column. Off-line editors such as MiCOM S1 do not require this action for the
setting changes to take effect.
3.8.2 Modbus communication
Modbus is a master/slave communication protocol which can be used for network control. In
a similar fashion to Courier, the system works by the master device initiating all actions and
the slave devices, (the relays), responding to the master by supplying the requested data or
by taking the requested action.
Modbus communication is achieved via a twisted pair connection to the rear port and can be
used over a distance of 1000m with up to 32 slave devices.
To use the rear port with Modbus communication, the relay’s communication settings must
be configured. To do this use the keypad and LCD user interface.
In the relay menu firstly check that the ‘Comms settings’ cell in the ‘Configuration’ column is
set to ‘Visible’, then move to the ‘Communications’ column.
Four settings apply to the rear port using Modbus which are described below. Move down
the ‘Communications’ column from the column heading to the first cell down which indicates
the communication protocol:
Protocol
Modbus
The next cell down controls the Modbus address of the relay:
Modbus address
23
Up to 32 relays can be connected to one Modbus spur, and therefore it is necessary for each
relay to have a unique address so that messages from the master control station are
accepted by one relay only. Modbus uses an integer number between 1 and 247 for the
relay address. It is important that no two relays have the same Modbus address. The
Modbus address is then used by the master station to communicate with the relay.
Introduction P44x/EN IT/F65
Inactivity timer
10.00 mins
The inactivity timer controls how long the relay will wait without receiving any messages on
the rear port before it reverts to its default state, including revoking any password access
that was enabled. For the rear port this can be set between 1 and 30 minutes.
The next cell down the column controls the baud rate to be used:
Baud rate
9600 bits/s
Modbus communication is asynchronous. Three baud rates are supported by the relay,
‘9600 bits/s’, ‘19200 bits/s’ and ‘38400 bits/s’. It is important that whatever baud rate is
selected on the relay is the same as that set on the Modbus master station.
The next cell down controls the parity format used in the data frames:
Parity
None
The parity can be set to be one of ‘None’, ‘Odd’ or ‘Even’. It is important that whatever parity
format is selected on the relay is the same as that set on the Modbus master station.
3.8.3 IEC 60870-5 CS 103 communication
The IEC specification IEC 60870-5-103: Telecontrol Equipment and Systems, Part 5:
Transmission Protocols Section 103 defines the use of standards IEC 60870-5-1 to
IEC 60870-5-5 to perform communication with protection equipment. The standard
configuration for the IEC 60870-5-103 protocol is to use a twisted pair connection over
distances up to 1000m. As an option for IEC 60870-5-103, the rear port can be specified to
use a fibre optic connection for direct connection to a master station. The relay operates as a
slave in the system, responding to commands from a master station. The method of
communication uses standardised messages which are based on the VDEW communication
protocol.
To use the rear port with IEC 60870-5-103 communication, the relay’s communication
settings must be configured. To do this use the keypad and LCD user interface. In the relay
menu firstly check that the ‘Comms settings’ cell in the ‘Configuration’ column is set to
‘Visible’, then move to the ‘Communications’ column. Four settings apply to the rear port
using IEC 60870-5-103 which are described below. Move down the ‘Communications’
column from the column heading to the first cell which indicates the communication protocol:
Protocol
IEC 60870-5-103
The next cell down controls the IEC 60870-5-103 address of the relay:
Remote address
162
The next cell down the column controls the baud rate to be used:
Baud rate
9600 bits/s
IEC 60870-5-103 communication is asynchronous. Two baud rates are supported by the
relay, ‘9600 bits/s’ and ‘19200 bits/s’. It is important that whatever baud rate is selected on
the relay is the same as that set on the IEC 60870-5-103 master station.
The next cell down controls the period between IEC 60870-5-103 measurements:
Measure’t period
30.00 s
The IEC 60870-5-103 protocol allows the relay to supply measurements at regular intervals.
The interval between measurements is controlled by this cell, and can be set between 1 and
60 seconds.
The next cell down the column controls the physical media used for the communication:
Physical link
EIA(RS)485
The default setting is to select the electrical EIA(RS)485 connection. If the optional fibre optic
connectors are fitted to the relay, then this setting can be changed to ‘Fibre optic’.
The next cell down can be used to define the primary function type for this interface, where
this is not explicitly defined for the application by the IEC 60870-5-103 protocol*.
Function type
226
Protocol
DNP 3.0
The next cell controls the DNP 3.0 address of the relay:
Upto 32 relays can be connected to one DNP 3.0 spur, and therefore it is necessary for each
relay to have a unique address so that messages from the master control station are
accepted by only one relay. DNP 3.0 uses a decimal number between 1 and 65519 for the
relay address. It is important that no two relays have the same DNP 3.0 address.
The DNP 3.0 address is then used by the master station to communicate with the relay.
Introduction P44x/EN IT/F65
The next cell down the column controls the baud rate to be used:
Baud rate
9600 bits/s
DNP 3.0 communication is asynchronous. Six baud rates are supported by the relay
‘1200bits/s’, ‘2400bits/s’, ‘4800bits/s’, ’9600bits/s’, ‘19200bits/s’ and ‘38400bits/s’. It is
important that whatever baud rate is selected on the relay is the same as that set on the
DNP 3.0 master station.
The next cell down the column controls the parity format used in the data frames:
Parity
None
The parity can be set to be one of ‘None’, ‘Odd’ or ‘Even’. It is important that whatever parity
format is selected on the relay is the same as that set on the DNP 3.0 master station.
The next cell down the column sets the time synchronisation request from the master by the
relay:
Time Synch
Enabled
The time synch can be set to either enabled or disabled. If enabled it allows the DNP 3.0
master to synchronise the time.
3.8.5 IEC61850 Ethernet Interface (since version C3.X)
3.8.5.1 Introduction
IEC 61850 is the international standard for Ethernet-based communication in substations. It
enables integration of all protection, control, measurement and monitoring functions within a
substation, and additionally provides the means for interlocking and inter-tripping. It
combines the convenience of Ethernet with the security which is essential in substations
today.
The MiCOM protection relays can integrate with the PACiS substation control systems, to
complete AREVA T&D Automation's offer of a full IEC 61850 solution for the substation. The
majority of MiCOM Px3x and Px4x relay types can be supplied with Ethernet, in addition to
traditional serial protocols. Relays which have already been delivered with UCA2 on Ethernet
can be easily upgraded to IEC 61850.
3.8.5.2 What is IEC 61850?
IEC 61850 is an international standard, comprising 14 parts, which defines a communication
architecture for substations.
The standard defines and offers much more than just a protocol. It provides:
• standardized models for IEDs and other equipment within the substation
• high-speed data rates (currently 100 Mbits/s, rather than 10’s of kbits/s or less used by
most serial protocols)
AREVA T&D has been involved in the Working Groups which formed the standard, building
on experience gained with UCA2, the predecessor of IEC 61850.
3.8.5.2.1 Interoperability
A major benefit of IEC 61850 is interoperability. IEC 61850 standardizes the data model of
substation IEDs. This responds to the utilities’ desire of having easier integration for different
vendors’ products, i.e. interoperability. It means that data is accessed in the same manner in
different IEDs from either the same or different IED vendors, even though, for example, the
protection algorithms of different vendors’ relay types remain different.
When a device is described as IEC 61850-compliant, this does not mean that it is
interchangeable, but does mean that it is interoperable. You cannot simply replace one
product with another, however the terminology is pre-defined and anyone with prior
knowledge of IEC 61850 should be able very quickly integrate a new device without the need
for mapping of all of the new data. IEC 61850 will inevitably bring improved substation
communications and interoperability, at a lower cost to the end user.
3.8.5.2.2 The data model
To ease understanding, the data model of any IEC 61850 IED can be viewed as a hierarchy
of information. The categories and naming of this information is standardized in the IEC
61850 specification.
P1445ENb
Wrapper/Logical Node Instance Identifies the major functional areas within the IEC 61850
data model. Either 3 or 6 characters are used as a prefix to
define the functional group (wrapper) while the actual
functionality is identified by a 4 character Logical Node
name suffixed by an instance number. For example,
XCBR1 (circuit breaker), MMXU1 (measurements),
FrqPTOF2 (overfrequency protection, stage 2).
Data Object This next layer is used to identify the type of data you will
be presented with. For example, Pos (position) of Logical
Node type XCBR.
Data Attribute This is the actual data (measurement value, status,
description, etc.). For example, stVal (status value)
indicating actual position of circuit breaker for Data Object
type Pos of Logical Node type XCBR.
3.8.5.3 IEC 61850 in MiCOM relays
IEC 61850 is implemented in MiCOM relays by use of a separate Ethernet card. This card
manages the majority of the IEC 61850 implementation and data transfer to avoid any
impact on the performance of the protection.
In order to communicate with an IEC 61850 IED on Ethernet, it is necessary only to know its
IP address. This can then be configured into either:
• An IEC 61850 “client” (or master), for example a PACiS computer (MiCOM C264) or
HMI, or
• An “MMS browser”, with which the full data model can be retrieved from the IED,
without any prior knowledge.
3.8.5.3.1 Capability
The IEC 61850 interface provides the following capabilities:
1. Read access to measurements
2. All measurands are presented using the measurement Logical Nodes, in the
‘Measurements’ Logical Device. Reported measurement values are refreshed by the
relay once per second, in line with the relay user interface.
3. Generation of unbuffered reports on change of status/measurement
4. Unbuffered reports, when enabled, report any change of state in statuses and/or
measurements (according to deadband settings).
5. Support for time synchronization over an Ethernet link
6. Time synchronization is supported using SNTP (Simple Network Time Protocol); this
protocol is used to synchronize the internal real time clock of the relays.
7. GOOSE peer-to-peer communication
8. GOOSE communications of statuses are included as part of the IEC 61850
implementation. Please see section 6.6 for more details.
9. Disturbance record extraction
10. Extraction of disturbance records, by file transfer, is supported by the MiCOM relays.
The record is extracted as an ASCII format COMTRADE file.
Setting changes (e.g. of protection settings) are not supported in the current IEC 61850
implementation. In order to keep this process as simple as possible, such setting changes
are done using MiCOM S1 Settings & Records program. This can be done as previously
using the front port serial connection of the relay, or now optionally over the Ethernet
connection if preferred.
P44x/EN IT/F65 Introduction
Name Type
BSTR2 Basic data type
BOOL Basic data type
INT8 Basic data type
INT16 Basic data type
INT32 Basic data type
UINT8 Basic data type
UINT16 Basic data type
UINT32 Basic data type
SPS (Single Point Status) Common data class
DPS (Double Point Status) Common data class
INS (Integer Status) Common data class
CENTRAL PROCESSOR
POWER SUPPLY
modem modem R.T.U.
EIA(RS)232 K-Bus KITZ102 EIA(RS)232
EIA(RS)232
port 0
2nd RP (Courier)
CE
PO NT
WE RAL
R PR
SU OC
ESS
modem modem PPL
Y OR R.T.U.
EIA232 EIA232 EIA232
EIA485
CK222
CK222
EIA485
Front port
EIA232
2nd RP (EIA485)
MiCOMS1
2 Master stations configuration: SCADA (Px40 1st RP) via CK222, EIA485 2nd
rear port via remote PC, Px40 & Px30 mixture plus front access P2085ENA
CENTRAL PROCESSOR
POWER SUPPLY
EIA232
modem modem R.T.U.
EIA232 EIA232
EIA485 CK222
EIA232
splitter 1st RP (Modbus / DNP/ IEC103)
EIA232
15 ax
m
m
Front port
EIA232
2nd RP (EIA232)
MiCOMS1
2 Master stations configuration: SCADA (Px40 1st RP) via CK222, EIA232 2nd rear P2086ENA
port via remote PC, max EIA232 bus distance 15m, PC local front/rear access
For relays with Courier, Modbus, IEC60870-5-103 or DNP3 protocol on the first rear
communications port there is the hardware option of a second rear communications port,
(P442 and P444 only) which will run the Courier language. This can be used over one of
three physical links: twisted pair K-Bus (non polarity sensitive), twisted pair EIA(RS)485
(connection polarity sensitive) or EIA(RS)232.
The settings for this port are located immediately below the ones for the first port as
described in previous sections of this chapter. Move down the settings unit the following sub
heading is displayed.
The next cell down indicates the language, which is fixed at Courier for RP2.
RP2 Protocol
Courier
The next cell down indicates the status of the hardware, e.g.
RP2 Address
255
Since up to 32 relays can be connected to one K-bus spur, as indicated in figure 10, it is
necessary for each relay to have a unique address so that messages from the master control
station are accepted by one relay only. Courier uses a integer number between 0 and 254
for the relay address which is set with this cell. It is important that no two relays have the
same Courier address. The Courier address is then use by the master station to
communicate with the relay.
The next cell down controls how long the relay will wait without receiving any massages on
the rear port before it reverts to its default state, including revoking any password access
that was enabled. For the rear port this can be set between 1 and 30 minutes.
In the case of EIA(RS)232 and EIA(RS)485 the next cell down controls the baud rate. For K-
Bus the baud rate is fixed at 64kbit/second between the relay and the KITZ interface at the
end of the relay spur.
Courier communications is asynchronous. Three baud rates are supported by the relay,
‘9600 bits/s’, ‘19200 bits/s’ and ‘38400 bits/s’.
3.10 InterMiCOM Teleprotection (since C2.X)
InterMiCOM is a protection signalling system that is an optional feature of MiCOM Px40
relays and provides a cost-effective alternative to discrete carrier equipment. InterMiCOM
sends eight signals between the two relays in the scheme, with each signal having a
selectable operation mode to provide an optimal combination of speed, security and
dependability in accordance with the application. Once the information is received, it may be
assigned in the Programmable Scheme Logic to any function as specified by the user’s
application.
3.10.1 Physical Connections
InterMiCOM on the Px40 relays is implemented using a 9-pin ‘D’ type female connector
(labelled SK5) located at the bottom of the 2nd Rear communication board. This connector
on the Px40 relay is wired in DTE (Data Terminating Equipment) mode, as indicated below:
Depending upon whether a direct or modem connection between the two relays in the
scheme is being used, the required pin connections are described below.
P44x/EN IT/F65 Introduction
This type of connection should also be used when connecting to multiplexers which have no
ability to control the DCD line.
3.10.3 Modem Connection
For long distance communication, modems may be used in which the case the following
connections should be made.
This type of connection should also be used when connecting to multiplexers which have the
ability to control the DCD line.
With this type of connection it should be noted that the maximum distance between the Px40
relay and the modem should be 15m, and that a baud rate suitable for the communications
path used should be selected. See P443/EN AP for setting guidelines.
3.10.4 Settings
The settings necessary for the implementation of InterMiCOM are contained within two
columns of the relay menu structure. The first column entitled “INTERMICOM COMMS”
contains all the information to configure the communication channel and also contains the
channel statistics and diagnostic facilities. The second column entitled “INTERMICOM
CONF” selects the format of each signal and its fallback operation mode. The following table
shows the relay menu for the communication channel including the available setting ranges
and factory defaults.
Introduction P44x/EN IT/F65
Setting Range
Menu Text Default Setting Step Size
Min Max
INTERMICOM COMMS
IM Output Status 00000000
IM Input Status 00000000
Source Address 1 1 10 1
Receive Address 2 1 10 1
Baud Rate 9600 600 / 1200 / 2400 / 4800 / 9600 / 19200
Remote Device Px40 Px30 / Px40
Ch Statistics Invisible Invisible / Visible
Reset Statistics No No / Yes
Ch Diagnostics Invisible Invisible / Visible
Loopback Mode Disabled Disabled / Internal / External
Test pattern 11111111 00000000 11111111 -
BLANK PAGE
Relay Description P44x/EN HW/F65
RELAY DESCRIPTION
Relay Description P44x/EN HW/F65
CONTENT
2. HARDWARE MODULES 9
2.1 Processor board 9
2.2 Co-processor board 9
2.3 Internal communication buses 9
2.4 Input module 10
2.4.1 Transformer board 10
2.4.2 Input board 10
2.4.3 Universal opto isolated logic inputs 10
2.5 Power supply module (including output relays) 12
2.5.1 Power supply board (including RS485 communication interface) 12
2.5.2 Output relay board 13
2.6 IRIG-B board (P442 and P444 only) 13
2.7 2nd rear communications board 14
2.8 Ethernet board 14
2.9 Mechanical layout 15
3. RELAY SOFTWARE 16
3.1 Real-time operating system 16
3.2 System services software 16
3.3 Platform software 17
3.3.1 Record logging 17
3.3.2 Settings database 17
P44x/EN HW/F65 Relay Description
4. DISTANCE ALGORITHMS 21
4.1 Distance and Resistance Measurement 21
4.1.1 Phase-to-earth loop impedance 23
4.1.2 Impedance measurement algorithms work with instantaneous values (current and voltage).24
4.1.3 Phase-to-phase loop impedance 24
4.2 "Delta" Algorithms 25
4.2.1 Fault Modelling 25
4.2.2 Detecting a Transition 27
4.2.3 Confirmation 30
4.2.4 Directional Decision 30
4.2.5 Phase Selection 31
4.2.6 Summary 31
4.3 "Conventional" Algorithms 32
4.3.1 Convergence Analysis 33
4.3.2 Start-Up 33
4.3.3 Phase Selection 34
4.3.4 Directional Decision 35
4.3.5 Directional Decision during SOTF/TOR (Switch On To Fault/Trip On Reclose) 35
4.4 Faulted Zone Decision 36
4.5 Tripping Logic 37
4.6 Fault Locator 38
4.6.1 Selecting the fault location data 39
4.6.2 Processing algorithms 39
4.7 Power swing detection 40
4.7.1 Power swing detection 40
4.7.2 Line in one pole open condition (during single-pole trip) 41
4.7.3 Conditions for isolating lines 41
4.7.4 Tripping logic 41
4.7.5 Fault Detection after Single-phase Tripping (single-pole-open condition) 42
4.8 Double Circuit Lines 42
4.9 DEF Protection Against High Resistance Ground Faults 44
4.9.1 High Resistance Ground Fault Detection 44
4.9.2 Directional determination 44
Relay Description P44x/EN HW/F65
BLANK PAGE
Relay Description P44x/EN HW/F65
• See also the hysteresis values of the optos in the §6.2 from chapter AP
1.1.6 IRIG-B board (P442 and P444 only)
This board, which is optional, can be used where an IRIG-B signal is available to provide an
accurate time reference for the relay. There is also an option on this board to specify a fibre
optic rear communication port, for use with IEC60870 communication only.
All modules are connected by a parallel data and address bus which allows the processor
board to send and receive information to and from the other modules as required. There is
also a separate serial data bus for conveying sample data from the input module to the
processor. figure 1 shows the modules of the relay and the flow of information between
them.
P44x/EN HW/F65 Relay Description
Battery Flash
backed-up E²PROM SRAM
EPROM
SRAM
CPU
Parallel test port
Timing data
Comms between
IRIG-B signal main & coprocessor CPU code & data
IRIG-B board boards
optional
Fibre optic
rear comms
port optional
FPGA SRAM
CPU
Serial data bus
(sample data)
Coprocessor board
inputs
P3026ENb
1.1.7 Second rear comms and InterMiCOM board (optional since version C2.X)
The optional second rear port is designed typically for dial-up modem access by protection
engineers/operators, when the main port is reserved for SCADA traffic. It is denoted “SK4”.
Communication is via one of three physical links: K-Bus, EIA(RS)485 or EIA(RS)232. The
port supports full local or remote protection and control access by MiCOM S1 software. The
second rear port is also available with an on board IRIG-B input.
The optional board also houses port “SK5”, the InterMiCOM teleprotection port. InterMiCOM
permits end-to-end signalling with a remote P440 relay, for example in a distance protection
channel aided scheme. Port SK5 has an EIA(RS)232 connection, allowing connection to a
MODEM, or compatible multiplexers.
1.1.8 Ethernet board (from version C2.0 up to C2.7)
This is a mandatory board for UCA2.0 enabled relays. It provides network connectivity
through either copper or fibre media at rates of 10Mb/s or 100Mb/s. This board, the IRIG-B
board and second rear comms board are mutually exclusive as they both utilise slot A within
the relay case.
1.2 Software overview
The software for the relay can be conceptually split into four elements: the real-time
operating system, the system services software, the platform software and the protection
and control software. These four elements are not distinguishable to the user, and are all
processed by the same processor board. The distinction between the four parts of the
software is made purely for the purpose of explanation here:
1.2.1 Real-time operating system
The real time operating system is used to provide a framework for the different parts of the
relay’s software to operate within. To this end the software is split into tasks. The real-time
operating system is responsible for scheduling the processing of these tasks such that they
are carried out in the time available and in the desired order of priority.
The operating system is also responsible for the exchange of information between tasks, in
the form of messages.
1.2.2 System services software
The system services software provides the low-level control of the relay hardware. For
example, the system services software controls the boot of the relay’s software from the non-
volatile flash EPROM memory at power-on, and provides driver software for the user
interface via the LCD and keypad, and via the serial communication ports. The system
services software provides an interface layer between the control of the relay’s hardware and
the rest of the relay software.
1.2.3 Platform software
The platform software deals with the management of the relay settings, the user interfaces
and logging of event, alarm, fault and maintenance records. All of the relay settings are
stored in a database within the relay which provides direct compatibility with Courier
communications. For all other interfaces (i.e. the front panel keypad and LCD interface,
Modbus and IEC60870-5-103) the platform software converts the information from the
database into the format required. The platform software notifies the protection & control
software of all setting changes and logs data as specified by the protection & control
software.
1.2.4 Protection & control software
The protection and control software performs the calculations for all of the protection
algorithms of the relay. This includes digital signal processing such as Fourier filtering and
ancillary tasks such as the measurements. The protection & control software interfaces with
the platform software for settings changes and logging of records, and with the system
services software for acquisition of sample data and access to output relays and digital opto-
isolated inputs.
P44x/EN HW/F65 Relay Description
2. HARDWARE MODULES
The relay is based on a modular hardware design where each module performs a separate
function within the relay operation. This section describes the functional operation of the
various hardware modules.
2.1 Processor board
The relay is based around a TMS320VC33-150MHz (peak speed) floating point, 32-bit digital
signal processor (DSP) operating at a clock frequency of 75MHz. This processor performs all
of the calculations for the relay, including the protection functions, control of the data
communication and user interfaces including the operation of the LCD, keypad and LEDs.
The processor board is located directly behind the relay’s front panel which allows the LCD
and LEDs to be mounted on the processor board along with the front panel communication
ports. These comprise the 9-pin D-connector for RS232 serial communications (e.g. using
MiCOM S1 and Courier communications) and the 25-pin D-connector relay test port for
parallel communication. All serial communication is handled using a two-channel 85C30
serial communications controller (SCC).
The memory provided on the main processor board is split into two categories, volatile and
non-volatile: the volatile memory is fast access (zero wait state) SRAM which is used for the
storage and execution of the processor software, and data storage as required during the
processor’s calculations. The non-volatile memory is sub-divided into 3 groups: 2MB of flash
memory for non-volatile storage of software code and text together with default settings,
256kB of battery backed-up SRAM for the storage of disturbance, event, fault and
maintenance record data and 32kB of E2PROM memory for the storage of configuration
data, including the present setting values.
2.2 Co-processor board
A second processor board is used in the relay for the processing of the distance protection
algorithms. The processor used on the second board is the same as that used on the main
processor board. The second processor board has provision for fast access (zero wait state)
SRAM for use with both program and data memory storage. This memory can be accessed
by the main processor board via the parallel bus, and this route is used at power-on to
download the software for the second processor from the flash memory on the main
processor board. Further communication between the two processor boards is achieved via
interrupts and the shared SRAM. The serial bus carrying the sample data is also connected
to the co-processor board, using the processor’s built-in serial port, as on the main processor
board.
From software version B1.0, coprocessor board works at 150MHz.
2.3 Internal communication buses
The relay has two internal buses for the communication of data between different modules.
The main bus is a parallel link which is part of a 64-way ribbon cable. The ribbon cable
carries the data and address bus signals in addition to control signals and all power supply
lines. Operation of the bus is driven by the main processor board which operates as a
master while all other modules within the relay are slaves.
The second bus is a serial link which is used exclusively for communicating the digital
sample values from the input module to the main processor board. The DSP processor has a
built-in serial port which is used to read the sample data from the serial bus. The serial bus is
also carried on the 64-way ribbon cable.
P44x/EN HW/F65 Relay Description
Up to 5
CT
CT
VT
VT
4
Transformer board
Input board
Up to 5
Anti-alias filters
single
single
single
single
Diffn
Diffn
Diffn
Diffn
to
to
to
to
4
Up to 5
pass
pass
filter
filter
pass
pass
filter
filter
Low
Low
Low
Low
4
16:1
Multiplexer
isolator
Optical
Noise
filter
Buffer
8 digital inputs
16-bit
ADC
Sample
control
Interface
Calibration
Serial
E²PROM
isolator
Optical
Noise
filter
processor board
Trigger from
data bus
Serial sample
Parallel bus
Buffer
Parallel bus
P3027ENa
The P440 series relays are fitted with universal opto isolated logic inputs that can be
programmed for the nominal battery voltage of the circuit of which they are a part i.e. thereby
allowing different voltages for different circuits e.g. signalling, tripping. From software version
C2.x they can also be programmed as Standard 60% - 80% or 50% - 70% to satisfy different
operating constraints.
Threshold levels are as follows:
This lower value eliminates fleeting pickups that may occur during a battery earth fault, when
stray capacitance may present up to 50% of battery voltage across an input.
Each input also has selectable filtering which can be utilised. This allows use of a pre-set
filter of ½ cycle which renders the input immune to induced noise on the wiring: although this
method is secure it can be slow, particularly for intertripping. This can be improved by
switching off the ½ cycle filter in which case one of the following methods to reduce ac noise
should be considered. The first method is to use double pole switching on the input, the
second is to use screened twisted cable on the input circuit.
2.5 Power supply module (including output relays)
The power supply module contains two PCBs, one for the power supply unit itself and the
other for the output relays. The power supply board also contains the input and output
hardware for the rear communication port which provides an RS485 communication
interface.
2.5.1 Power supply board (including RS485 communication interface)
One of three different configurations of the power supply board can be fitted to the relay.
This will be specified at the time of order and depends on the nature of the supply voltage
that will be connected to the relay. The three options are shown in table 1 below.
The output from all versions of the power supply module are used to provide isolated power
supply rails to all of the other modules within the relay. Three voltage levels are used within
the relay, 5.1V for all of the digital circuits, •16V for the analogue electronics, e.g. on the
input board, and 22V for driving the output relay coils. All power supply voltages including
the 0V earth line are distributed around the relay via the 64-way ribbon cable. One further
voltage level is provided by the power supply board which is the field voltage of 48V. This is
brought out to terminals on the back of the relay so that it can be used to drive the optically
isolated digital inputs.
The two other functions provided by the power supply board are the RS485 communications
interface and the watchdog contacts for the relay. The RS485 interface is used with the
relay’s rear communication port to provide communication using one of either Courier,
Modbus or IEC60870-5-103 protocols. The RS485 hardware supports half-duplex
communication and provides optical isolation of the serial data being transmitted and
received.
All internal communication of data from the power supply board is conducted via the output
relay board which is connected to the parallel bus.
The watchdog facility provides two output relay contacts, one normally open and one
normally closed which are driven by the processor board. These are provided to give an
indication that the relay is in a healthy state.
2.5.2 Output relay board
The output relay board holds seven relays, three with normally open contacts and four with
changeover contacts. The relays are driven from the 22V power supply line. The relays’ state
is written to or read from using the parallel data bus. Depending on the relay model seven
additional output contacts may be provided, through the use of up to three extra relay
boards.
Since version D1.X: ‘High break’ output relay boards consisting of four normally open output
contacts are available as an option.
2.6 IRIG-B board (P442 and P444 only)
The IRIG-B board is an order option which can be fitted to provide an accurate timing
reference for the relay. This can be used wherever an IRIG-B signal is available. The IRIG-B
signal is connected to the board via a BNC connector on the back of the relay. The timing
information is used to synchronise the relay’s internal real-time clock to an accuracy of 1ms.
The internal clock is then used for the time tagging of the event, fault maintenance and
disturbance records.
The IRIG-B board can also be specified with a fibre optic transmitter/receiver which can be
used for the rear communication port instead of the RS485 electrical connection (IEC60870
only).
P44x/EN HW/F65 Relay Description
Courier always
− 10BASE-T
− 10BASE-FL
− 100BASE-TX
− 100BASE-FX
For all copper based network connections an RJ45 style connector is supported. 10Mbit/s
fibre network connections use an ST style connector while 100Mbit/s connections use the
SC style fibre connection. An extra processor, a Motorola PPC, and memory block is fitted to
the ethernet card that is responsible for running all the network related functions such as
TCP/IP/OSI as supplied by VxWorks and the UCA2/MMS server as supplied by Sisco inc.
The extra memory block also holds the UCA2 data model supported by the relay.
Relay Description P44x/EN HW/F65
3. RELAY SOFTWARE
The relay software was introduced in the overview of the relay at the start of this chapter.
The software can be considered to be made up of four sections:
Supervisor task
Settings Remote
database communications
interface - Modbus
Sampling function -
copies samples into Control of output contacts and Front panel Local & Remote
2 cycle buffer programmable LEDs interface - LCD & communications
keypad interface - Courier
Relay hardware
P0128ENa
• to control the logging of records that are generated by the protection software,
including alarms and event, fault, and maintenance records.
• to store and maintain a database of all of the relay’s settings in non-volatile memory.
• to provide the internal interface between the settings database and each of the relay’s
user interfaces, i.e. the front panel interface and the front and rear communication
ports, using whichever communication protocol has been specified (Courier, Modbus,
IEC60870-5-103, DNP3).
3.3.1 Record logging
The logging function is provided to store all alarms, events, faults and maintenance records.
The records for all of these incidents are logged in battery backed-up SRAM in order to
provide a non-volatile log of what has happened. The relay maintains four logs: one each for
up to 96 alarms (with 64 application alarms: 32 alarms in alarm status 1 and another group
of 32 alarms in alarm status 2 and 32 alarms platform (see GC annex for mapping), 250
event records, 5 fault records and 5 maintenance records. The logs are maintained such that
the oldest record is overwritten with the newest record. The logging function can be initiated
from the protection software or the platform software is responsible for logging of a
maintenance record in the event of a relay failure. This includes errors that have been
detected by the platform software itself or error that are detected by either the system
services or the protection software function. See also the section on supervision and
diagnostics later in this chapter.
3.3.2 Settings database
The settings database contains all of the settings and data for the relay, including the
protection, disturbance recorder and control & support settings. The settings are maintained
in non-volatile E2PROM memory. The platform software’s management of the settings
database includes the responsibility of ensuring that only one user interface modifies the
settings of the database at any one time. This feature is employed to avoid conflict between
different parts of the software during a setting change. For changes to protection settings
and disturbance recorder settings, the platform software operates a ‘scratchpad’ in SRAM
memory. This allows a number of setting changes to be applied to the protection elements,
disturbance recorder and saved in the database in E2PROM. (See also chapter 1 on the
user interface). If a setting change affects the protection & control task, the database advises
it of the new values.
3.3.3 Database interface
The other function of the platform software is to implement the relay’s internal interface
between the database and each of the relay’s user interfaces. The database of settings and
measurements must be accessible from all of the relay’s user interfaces to allow read and
modify operations. The platform software presents the data in the appropriate format for
each user interface.
P44x/EN HW/F65 Relay Description
unprocessed form by the disturbance recorder for waveform recording and to calculate true
rms values of current, voltage and power for metering purposes.
3.4.3 Programmable scheme logic
The purpose of the programmable scheme logic (PSL) is to allow the relay user to configure
an individual protection scheme to suit their own particular application. This is achieved
through the use of programmable logic gates and delay timers.
The input to the PSL is any combination of the status of the digital input signals from the
opto-isolators on the input board, the outputs of the protection elements, e.g. protection
starts and trips, and the outputs of the fixed protection scheme logic. The fixed scheme logic
provides the relay’s standard protection schemes. The PSL itself consists of software logic
gates and timers. The logic gates can be programmed to perform a range of different logic
functions and can accept any number of inputs. The timers are used either to create a
programmable delay, and/or to condition the logic outputs, e.g. to create a pulse of fixed
duration on the output regardless of the length of the pulse on the input. The outputs of the
PSL are the LEDs on the front panel of the relay and the output contacts at the rear.
The execution of the PSL logic is event driven; the logic is processed whenever any of its
inputs change, for example as a result of a change in one of the digital input signals or a trip
output from a protection element. Also, only the part of the PSL logic that is affected by the
particular input change that has occurred is processed. This reduces the amount of
processing time that is used by the PSL. The protection and control software updates the
logic delay timers and checks for a change in the PSL input signals every time it runs.
This system provides flexibility for the user to create their own scheme logic design.
However, it also means that the PSL can be configured into a very complex system, and
because of this setting of the PSL is implemented through the PC support MiCOM S1.
3.4.4 Event and Fault Recording
A change in any digital input signal or protection element output signal causes an event
record to be created. When this happens, the protection and control task sends a message
to the supervisor task to indicate that an event is available to be processed and writes the
event data to a fast buffer in SRAM which is controlled by the supervisor task. When the
supervisor task receives either an event or fault record message, it instructs the platform
software to create the appropriate log in battery backed-up SRAM. The operation of the
record logging to battery backed-up SRAM is slower than the supervisor’s buffer. This
means that the protection software is not delayed waiting for the records to be logged by the
platform software. However, in the rare case when a large number of records to be logged
are created in a short period of time, it is possible that some will be lost if the supervisor’s
buffer is full before the platform software is able to create a new log in battery backed-up
SRAM. If this occurs then an event is logged to indicate this loss of information.
3.4.5 Disturbance recorder
The disturbance recorder operates as a separate task from the protection and control task. It
can record the waveforms for up to 8 analogue channels and the values of up to 32 digital
signals. The recording time is user selectable up to a maximum of 10 seconds. The
disturbance recorder is supplied with data by the protection and control task once per cycle.
The disturbance recorder collates the data that it receives into the required length
disturbance record. With Kbus or ModBus comms, the relay attempts to limit the demands
on memory space by saving the analogue data in compressed format whenever possible.
This is done by detecting changes in the analogue input signals and compressing the
recording of the waveform when it is in a steady-state condition. The compressed records
can be decompressed by MiCOM S1 which can also store the data in COMTRADE format,
thus allowing the use of other packages to view the recorded data. With IEC based protocols
no data compression is done.
Since C1.x, the disturbance files are no more compressed. This version manage the
disturbance task with 24 samples by cycle (since B1x & C1x). Maximum storage capacity is
equivalent to 28 events of 3 s which gives a maximum duration of 84 s.
P44x/EN HW/F65 Relay Description
4. DISTANCE ALGORITHMS
The operation is based on the combined use of two types of algorithms:
• "Deltas" algorithms using the superimposed current and voltage values that are
characteristic of a fault. These are used for phase selection and directional
determination. The fault distance calculation is performed by the "impedance
measurement algorithms ” using Gauss-Seidel.
• "Conventional" algorithms using the impedance values measured while the fault
occurs. These are also used for phase selection and directional determination.
The fault distance calculation is performed by the "impedance measurement
algorithms." Using Gauss-Seidel.
The "Deltas" algorithms have priority over the "Conventional" algorithms if they have been
started first. The latter are actuated only if "Deltas" algorithms have not been able to clear
the fault within two cycles of its detection.
Since version C1.x no priority is managed any more. The fastest algorithm will give the
immediate directional decision.
4.1 Distance and Resistance Measurement
MiCOM P44x distance protection is a full scheme distance relay. To measure the distance
and apparent resistance of a fault, the following equation is solved on the loop with a fault:
IL I
R
Z SL (n).ZL (1-n).ZL Z SR
Relay Relay
VL VR
RF I F = I + I'
Local Remote
Source Source
V L = (ZL x I x D)+ RF x IF
= ((r +jx) x I x D) +RF x IF where
V L = local terminal relay voltage
r = line resistance (ohm/mile)
x = line reactance (ohm/mile)
IF = current flowing in the fault (I + I')
I = current measured by the relay on the faulty phase
= current flowing into the fault from local terminal
I' = current flowing into the fault from remote terminal
D = fault location (permile or km from relay to the fault)
R = fault resistance
R F = apparent fault resistance at relay; R x (1 + I'/I)
The following describes how to solve the above equation (determination of D fault distance
and R fault resistance). The line model used will be the 3×3 matrix of the symmetrical line
impedance (resistive and inductive) of the three phases, and mutual values between phases.
and
X1 : positive sequence reactance
X0 : zero-sequence reactance
The line model is obtained from the positive and zero-sequence impedance. The use of four
different residual compensation factor settings is permitted on the relay, as follows:
kZ1: residual compensation factor used to calculate faults in zones 1 and 1X.
kZ2: residual compensation factor used to calculate faults in zone 2.
kZp: residual compensation factor used to calculate faults in zone p.
kZ3/4: residual compensation factor used to calculate faults in zones 3 and 4.
The solutions "Dfault " and "Rfault " are obtained by solving the system of equations (one
equation per step of the calculation) using the Gauss Seidel method.
n n
∑ (I
n0
fault )²
n n
∑ (Z .I )²
n0
1 l
Rfault and Dfault are computed for every sample (24 samples per cycle).
NOTE: See also in § 4.3.1 the Rn and Dn (Xn) conditions of convergence.
With IL equal to Iα + k0 x 3I0 for phase-to-earth loop or IL equal to Iαβ for phase-to-phase
loop.
Relay Description P44x/EN HW/F65
Z1
Zs iB Z1
Z Fault
Zs iA Z1
R / Phase
VCN VBN VAN kS ZS VA VB VC k0 Z1 RFault
Location
of Distance Relay
P3031ENa
with α = phase A, B or C
The (3I0) current is used for the first 40 milliseconds to model the fault current, thus
eliminating the load current before the circuit breakers are operated during the 40ms (one
pole tripping). After the 40ms, the phase current is used.
VAN = Z1.Dfault.(IA+k0 x 3I0)+Rfault.Ifault
VBN = Z1.Dfault.(IB+k0 X.3I0)+Rfault.Ifault
VCN = Z1.Dfault.(IC+k0 x 3I0)+Rfault.Ifault
x 5 k0 residual compensation factors
= 15 phase-to-earth loops are continuously monitored and computed for each samples.
P44x/EN HW/F65 Relay Description
R0–R1 + j.(X0–X1)
VαN = (R1+j.X1).Dfault.(Iα + .3I0) + Rfault.Ifault
3.(R1-jX1)
R0–R1 + j.(X0–X1)
VαN = (R1+j.X1).Dfault.Iα + .Dfault.3I0 + Rfault.Ifault
3
R0–R1 j.(X0–X1)
VαN = R1.Dfault.Iα + .Dfault.3I0 + j.X1. Dfault.Iα + .Dfault.3I0 + Rfault.Ifault
3 3
R0–R1 j.(X0–X1)
VαN = R1.Dfault.Iα + .Dfault.3I0 + j.X1. Dfault.Iα + .Dfault.(IA+IB+IC) + Rfault.Ifault
3 3
R0–R1 (X +2.X1) dI (X –X ) dI (X –X ) dI
VAN = R1.Dfault.IA + .Dfault.3I0 + 0 .Dfault. A + 0 1 .Dfault. B + 0 1 .Dfault. C + Rfault.Ifault
3 3 dt 3 dt 3 dt
R0–R1 dI dI dI
VAN = R1.Dfault.IA + .Dfault.3I0 + LAA.Dfault. A + LAB.Dfault. B + LAC.Dfault. C + Rfault.Ifault
3 dt dt dt
R0–R1 dI dI dI
VBN = R1.Dfault.IB + .Dfault.3I0 + LAB.Dfault. A + LBB.Dfault. B + LBC.Dfault. C + Rfault.Ifault
3 dt dt dt
R0–R1 dI dI dI
VCN = R1.Dfault.IC + .Dfault.3I0 + LAC.Dfault. A + LBC.Dfault. B + LCC.Dfault. C + Rfault.Ifault
3 dt dt dt
4.1.2 Impedance measurement algorithms work with instantaneous values (current and voltage).
Derivative current value (dI/dt) is obtained by using FIR filter.
4.1.3 Phase-to-phase loop impedance
Zs i Z1 X / Phase R Fault/ 2
C
Z1
Zs iB Z1
Z Fault
Zs iA Z1 RFault
R / Phase
VCN VBN VAN VC
Location
of Distance Relay P3032ENa
The model for the current Ifault circulating in the fault Iαβ.
VAB = 2Z1.Dfault.IAB + Rfault.Ifault
VBC = 2Z1.Dfault.IBC + Rfault.Ifault
VCA = 2Z1.Dfault.ICA + Rfault.Ifault
= 3 phase-to-phase loops are continuously monitored and computed for each sample.
dIαβ
Vαβ = 2R1.Dfault.Iαβ + 2X1.Dfault. + Rfault.Ifault
dt
dIA dI dI R
VAB = R1.Dfault.(IA – IB) + (LAA–LAB).Dfault. + (LAB–LBB).Dfault. B + (LAC–LBC).Dfault. C + fault.Ifault
dt dt dt 2
dIA dI dI R
VBC = R1.Dfault.(IB – IC) + (LAB–LAC).Dfault. + (LBB–LBC).Dfault. B + (LBC–LCC).Dfault. C + fault.Ifault
dt dt dt 2
dIA dI dI R
VCA = R1.Dfault.(IC – IA) + (LAC–LAA).Dfault. + (LBC–LAB).Dfault. B + (LCC–LAC).Dfault. C + fault.Ifault
dt dt dt 2
Impedance measurement algorithms work with instantaneous values (current and voltage).
Derivative current value (dI/dt) is obtained by using FIR filter.
4.2 "Delta" Algorithms
The patented high-speed algorithm has been proven with 10 years of service at all voltage
levels from MV to EHV networks. The P440 relay has ultimate reliability of phase selection
and directional decision far superior to standard distance techniques using superimposed
algorithms. These algorithms or delta algorithms are based on transient components and
they are used for the following functions which are computed in parallel:
Detection of the fault
By comparing the superimposed values to a threshold which is low enough to be crossed
when a fault occurs and high enough not to be crossed during normal switching outside of
the protected zones.
Establishing the fault direction
Only a fault can generate superimposed values; therefore, it is possible to determine
direction by measuring the transit direction of the superimposed energy.
Phase selection
As the superimposed values no longer include the load currents, it is possible to make high-
speed phase selection.
4.2.1 Fault Modelling
Consider a stable network status-the steady-state load flow prior to any start. When a fault
occurs, a new network is established. If there is no other modification, the differences
between the two networks (before and after the fault) are caused by the fault. The network
after the fault is equivalent to the sum of the values of the status before the fault and the
values characteristic of the fault. The fault acts as a source for the latter, and the sources
act as passive impedance in this case.
P44x/EN HW/F65 Relay Description
VR IR VR IR
R F R F
ZS ZL ZL ZR
Relay Relay
V F (prefault voltage)
ZS ZL ZL ZR
Relay Relay
RF
V R ' = Voltage at Relay Location
VR IR VR IR
R F R F
ZS ZL ZL ZR
Relay Relay
-V F
Fault Inception
P3033ENa
• The circuit breaker(s) should be closed just prior to fault inception (2 cycles of healthy
pre-fault data should be stored) – the line is energised from one or both ends,
• The source characteristics should not change noticeably (there is no power swing or
out-of-step detected).
• Power System Frequency is being measured and tracked (48 samples per cycle at 50
or 60Hz).
Relay Description P44x/EN HW/F65
No fault is detected :
• all nominal phase voltages are between 70% and 130% of the nominal value.
• the residual voltage (3V0) is less than 10% of the nominal value
• the residual current (3I0) is less than 10% of the nominal value + 3.3% of the
maximum load current flowing on the line
The measured loop impedance are outside the characteristic, when these requirements are
fulfilled, the superimposed values are used to determine the fault inception (start), faulty
phase selection and fault direction. The network is then said to be "healthy" before the fault
occurrence.
4.2.2 Detecting a Transition
In order to detect a transition, the MiCOM P441, P442 and P444 compares sampled current
and voltage values at the instant "t" with the values predicted from those stored in the
memory one period and two periods earlier.
2T
G
G = Current or Voltage
T
G(t)
G(t-2T) G(t-T)
Gp(t)
Time
t-2T t-T t
P3034ENa
V = line-to-ground voltage = U / √3
G(t) = G(t) - Gp(t) is the transition value of the reading G.
The high-speed algorithms will be started if ∆U OR ∆I is detected on one sample.
P44x/EN HW/F65 Relay Description
4.2.3 Confirmation
In order to eliminate the transitions generated by possible operations or by high frequencies,
the transition detected over a succession of three sampled values is confirmed by checking
for at least one loop for which the two following conditions are met:
VR
IR
F
ZS ZL ZL ZR
Relay
-V F
Forward Fault
VR
IR
R
ZS ZL ZL ZR
Relay
-V F
Reverse Fault
P3035ENa
Where no is the instant at which the fault is detected, ni is the instant of the calculation and S
is the calculated transition energy.
If the fault is in the forward direction, then S i <0 (i = A, B or C phase).
If the fault is in the reverse direction, then S i >0.
The directional criterion is valid if
S >5 x (10% x Vn x 20% x In x cos (85° )
This sum is calculated on five successive samples.
RCA angle of the delta algorithms is equal to 60° (-30°) if the protected line is not serie
compensated (else RCA is equal to 0°).
Relay Description P44x/EN HW/F65
ni ≥ n 0 + 4 ni ≥ n 0 + 4
SAN = ∑ (∆I ' A i )²
n0
SAB = ∑ (∆I '
n0
ABi )²
ni ≥ n 0 + 4 ni ≥ n 0 + 4
SBN = ∑ (∆I ' Bi )²
n0
SBC = ∑ (∆I '
n0
BC i )²
ni ≥ n 0 + 4 ni ≥ n 0 + 4
SCN = ∑ (∆I ' C i )²
n0
SCA = ∑ (∆I '
n0
CAi )²
The phase selection is valid if the sum (SAB+SBC+SCA) is higher than a threshold. This
sum is not valid if the positive sequence impedance on the source side is far higher than the
zero sequence impedance. In this case, the conventional algorithms are used to select the
faulted phase(s).
Sums on one-phase and two-phase loops are performed. The relative magnitudes of these
sums determine the faulted phase(s).
For examples, assume :
If SAB<SBC<SCA and If SAB<<SBC, the fault has had little effect on the loop A to B. If
SAN<SBN<SCN , the fault declared as single phase fault C.
If the fault is not detected as single-phase by the previous criterion, the fault conditions are
multi-phase.
If SAN<SBN<SCN and If SAB<<SBC, the fault is B to C.
Confirmation
Phase selection
Start Directional decision
P3036ENa
• A breaker closing occurs during a fault. By SOTF, only the Conventional Algorithms
can be used as there are not 2 cycles of healthy network stored.
• The fault is not recent and so the operating conditions of the generators have
changed, or corrective action has been taken, i.e., opening the circuit breakers. This
occurs generally after the first trip. High Speed algorithms are used only during the
first 2 cycles after the fault detection.
-D = X4
lim
P3037ENa
• Rfault (n-1)< Rlim, and Rfault (n)< Rlim, and Rfault (n-1) - Rfault (n)< 10% x Rlim
• Dfault (n-1)< Dlim and Dfault (n) < Dlim and Dfault (n-1) - Dfault (n) < 10% x Dlim
with Rlim being the resistance limit for the single and multi phase faults. This convergence is
dependent on the equations not being collinear thus allowing the terms in Dfault and Rfault
to be discriminated.
Theoretically, zone limits are Z3, Z4, +/- R3G-R4G or +/- R3Ph-R4Ph, if zones 3 and 4 are
enabled. The slope of the characteristic mimics the characteristic of the line.
To model the fault current:
• Phase-phase loops: the values (IA - IB), (IB - IC), or (IC - IA) are used.
• Phase-ground loops: (IA+ k0 x 3I0), (IB + k0 x 3I0), or (IC + k0 x 3I0) are used.
The results of these algorithms are mainly used as a backup; therefore, the circuit breaker
located at the other end is assumed to be open.
4.3.2 Start-Up
Start-up is initiated when at least one of the six measuring loops converges within the
characteristic (ZAN, ZBN, ZCN, ZAB, ZBC, ZCA).
P44x/EN HW/F65 Relay Description
• If I'C > S2, I'B > S1 and I'A < S1, the fault is two-phase, on phases B and C.
• If I'C > S2 and I'B < S1, the fault is single-phase, on phase C.
• If I'C < S2, the current phase selection cannot be used. Impedance phase selection
should then be used.
Impedance Phase Selection
Impedance phase selection is obtained by checking the convergence of the various
measuring loops within the start-up characteristic, as follows:
• RAN = ZAN x ZBC with ZBC = convergence within the characteristic of the loop
BC (Logical Information).
• RBN = ZBN x ZCA with ZCA = convergence within the characteristic of the loop
CA (Logical Information).
• RCN = ZCN x ZAB with ZAB = convergence within the characteristic of the loop
AB (Logical Information).
• RAB = ZAB x ZCN with ZCN = convergence within the characteristic of the loop
C (Logical Information).
• RBC = ZBC x ZAN with ZAN = convergence within the characteristic of the loop
A (Logical Information).
• RCA = ZCA x ZBN with ZBN= convergence within the characteristic of the loop
B (Logical Information).
Relay Description P44x/EN HW/F65
Single-phase fault
The reference voltage is stored in memory when the fault appears. When the fault is
eliminated by single-phase tripping, the high-speed single-phase auto-reclose (HSAR) is
started.
If a fault appears less than three cycles after the AR starts, the stored voltage value remains
valid as the reference and is used to calculate direction.
If no fault appears during the three cycles after the AR starts, the reference voltage value
becomes that of one of the healthy phases.
If a fault appears during the continuation of the AR cycle or reclosure occurs, the stored
voltage value remains valid for 10 seconds.
If a stored voltage does not exist (SOTF) when one or more loops are convergent within the
start-up characteristic, the directional is forced forward and the trip is instantaneous (if
“SOTF All Zones“ is set or according to the zone location if SOTF Zone 2, etc. is set). If the
settable switch on to fault current threshold I>3 is exceeded on reclosure, the relay
instantaneously trips three-phase (No timer I>3 is applied – see also the chapter AP in
§2.12).
Two-phase or three-phase fault
The reference voltage is stored in memory when the fault appears. When the fault is
cleared, the stored voltage value remains valid for 10 seconds. If reclosure occurs during
these 10 seconds, the direction is calculated using the stored voltage value.
If a stored voltage does not exist when one or more loops are convergent within the start-up
characteristic, the forward direction is forced and the trip is instantaneous when protection
starts (SOTF All Zones). If the switch on to fault current threshold I>3 is exceeded on
reclosure, the relay trips instantaneously three-phase (TOR All Zones).
The distance element trips immediately as soon as one or more loops converge within the
start-up characteristic during SOTF (SOTF All Zones).
Other modes can be selected to trip selectively by SOFT or TOR according to the fault
location (SOTF Zone 1, SOTF Zone 2, etc., TOR Zone 1, TOR Zone 2, etc. depending from
the software version - from version A3.1 available). There are 13 bits of settings in
TOR/SOTF logic (15 since version C5.X).
4.4 Faulted Zone Decision
The Decision of the faulted zone is determined by either the zone "Deltas" or "Conventional"
algorithms.
The zones are defined for a convergence between the Dfault and Rfault limits related to
each zone. So, the solution pair (Rfault, Dfault) is said to be convergent if:
• Rfault (n-1) < Rfault (i) and Rfault (n) < Rfault (i) and |Rfault (n-1) – Rfault (n)| < 10% x
Rfault (i)
• Dfault (n-1) < Dfault (i) and Dfault (n) < Dfault (i) and |Dfault (n-1) - Dfault (n)| < k% x
Dfault (i)
where .
k= 5% for zones 1 and 1X and
10% for other zones Z2, Z3, Zp, Zq and Z4.
i=1, 1X, 2, p, q, 3 and 4.
Relay Description P44x/EN HW/F65
Z1
2 1 0
3
4..
R
P3028ENa
Zone Time
Z1 T1
Z1X T1
Z2 T2
Zp Tp
Zq Tq
Z3 T3
Z4 T4
There are six time delays associated with the seven zones present. Zone 1 and extended
zone 1 have the same time delay.
NOTE: See general trip equation in §2.5 from AP chapter
NOTE: All the timers are initiated when the general start of the relay picks up
(Z3Z4 convergence)
P44x/EN HW/F65 Relay Description
BC : Ifault∆ (IB–IC)
CA : Ifault∆ (IC–IA)
R0–R1 dI dI dI dI
VBN = R1.Dfault.IB + .Dfault.3I0 + LAB.Dfault. A + LBB.Dfault. B + LBC.Dfault. C + Rfault.Ifault + Rm.Im + Lm. m
3 dt dt dt dt
R0–R1 dI dI dI dI
VCN = R1.Dfault.IC + .Dfault.3I0 + LAC.Dfault. A + LBC.Dfault. B + LCC.Dfault. C + Rfault.Ifault + Rm.Im + Lm. m
3 dt dt dt dt
With:
Rm: zero-sequence mutual resistance
Lm: zero-sequence mutual inductance
Im: zero-sequence mutual current
dIA dI dI R
VBC = R1.Dfault.(IB – IC) + (LAB – LAC).Dfault. + (LBB – LBC).Dfault. B + (LBC – LCC).Dfault. C + fault.Ifault
dt dt dt 2
dIA dI dI R
VAC = R1.Dfault.(IC – IA) + (LAC – LAA).Dfault. + (LBC – LAB).Dfault. B + (LCC – LAC).Dfault. C + fault.Ifault
dt dt dt 2
With:
∆IA - ∆IB
∆IB - ∆IC
∆IC - ∆IA
4.6.1 Selecting the fault location data
Selection of the analogue data that is used depends on
• Single lines.
Powerswing Z3
Boundary Stable R
Characteristic Unstable
Swing Swing
Z4
P3038ENa
• At least one phase-phase impedance is within the start-up zone after having crossed
the power swing band in more than 5 ms.
• The three impedance points have been in the power swing band for more than 5 ms.
• At least two poles of the breaker are closed (impedance measurement possible on two
phases).
NOTE: During Power swing the residual compensation factors k0 are not
applied in the detection of the characteristic.(the extended limit in R
gives: R1=R2=R3=RpFwd).
4.7.2 Line in one pole open condition (during single-pole trip)
In this case, the power swing occurs only on two phases. A power swing is detected if:
• At least one phase-phase impedance is within the start-up zone after having crossed
the power swing band in more than 5ms.
• The two impedance points have been in the power swing band for more than 5 ms.
NOTE: During an open-pole condition, the P44x monitors the power swing on
the healthy phase-phase loop. No external information is needed if
the voltage transformers are on the line side. If the voltage
transformers are on the bus side, the «pole discrepancy» signal
should be used. The «pole discrepancy» input represents a «one-
circuit-breaker-pole-open» condition.
4.7.3 Conditions for isolating lines
If there is a power swing, it may be necessary to disconnect the two out-of-step sources.
There are various tripping and blocking options available that are used to select if the line
has to be tripped for power swings or not.
The selective blocking of back up zones only allows the P44x to separate the network near
the electrical zero by tripping zone 1 only. Therefore, in the example given in figure 16, the
relay D trips out.
Electrical
Zero
A B C D E F
Z1 AN fault Z1 BN fault
The directions of the two adjacent ground loops are compared, as follows:
• If the two directions are forward, the fault is a two-phase fault on the protected line.
• If only one of the directions is forward, for instance Sa, the fault is single-phase
(A to Neutral) on the protected line.
• If the two directions are reverse, the fault is not on the protected line.
Protection against Current Reversal (Transient Blocking)
When a fault occurs on a line, which is parallel to the protected line, the pilot schemes on the
protected line may be subjected current reversals from sequential clearing on the parallel
line. A fault on the parallel line may start by appearing external to the protected line in the
reverse direction, and then, after a sequential operation of one of the parallel line breakers,
the fault appears forward. This situation can affect security of certain pilot schemes on the
protected line.
Reverse Forward
3 4
3 4
Weak 1 2 Strong
Source Forward Forward Source
1 2
All breakers closed
Relay 3 senses reverse current
3 4
Forward Reverse
3 4
Weak 1 2 Strong
Source Source
1 Forward 2
Breaker 1 opens
Relay 3 senses forward current
P3041ENa
• The main operating mode, directional comparison protection uses the signalling
channel and is a communication-aided scheme.
• ∆I ≥ 0.05 In
• ∆V ≥ 0.1 Vn (P-G)
A fault is confirmed if these thresholds are exceeded for more than 1 ½ cycles.
4.9.2 Directional determination
The fault direction is determined by measuring the angle between the residual voltage and
the residual current derivative. The fault is forward if the angle is between –14° and +166°. A
negative or zero sequence polarisation is selectable in order to determinate the earth fault
direction.
4.9.3 Phase selection
The phase is selected in the same way as for distance protection except that the current
threshold is reduced (∆I ≥ 0.05 x In and ∆V ≥ 0.1 x Vn).
NOTE: If the phase has not been selected within one cycle, a three-phase
selection is made automatically.
Relay Description P44x/EN HW/F65
Abbreviation Definition
Vr> Threshold of residual or zero sequence voltage (3V0)
IRev Threshold of residual current (settable in S1 – default:0,6IN)
Forward Forward directional with zero/negative sequence polarisation
Reverse Reverse directional with zero/negative sequence polarisation
DEF blocking Blocking of DEF element
Carrier Receive DEF Carrier received for the principal line protected (same channel as
distance protection)
Iev Threshold of residual current (0.6 x Ied)
Tripping mode Single or three-phase tripping (selectable)
Z< starting Convergence of at least 1 of the 6 loops within the tripping
characteristic (internal starting of the distance element)
t_cycle Additional time delay (150ms) of 1 pole AR cycle
t_delay Tripping time delay
t_trans Carrier Send delay
Forward Startup
Vr>threshold
Ied threshold
Forward decision & & Carrier Send DEF
Reverse decision &
Blocking DEF
Carrier Received DEF &
Reverse decision
Vr>threshold
& & Reversal Startup
Tripping mode
1 pole dead 0
1
T
Z< starting t-cycle
&
Independant & Three Phase Trip
channels DIST/DEF
Three
2 Pole or 3 Pole Selection 1
P3042ENa
Forward Startup
Vr>threshold
Ied threshold 0
Forward decision & & &
Reverse decision T
t-trans
Tripping Mode
& Reversal Startup
1 pole dead 0
1
T
Z< starting t-cycle
&
Independant & Three Phase Trip
channels DIST/DEF
Three
2 Pole or 3 Pole Selection 1
P3043ENa
CTS Block
&
IN>x start
& SBEF
Slow VTS
Block
& Directional
Check
Trip
Vx > Vs & IDMT/DT
Ix > Is
• the integrity of the battery backed-up SRAM that is used to store event, fault and
disturbance records.
• the voltage level of the field voltage supply which is used to drive the opto-isolated
inputs.
• the flash EPROM containing all program code and language text is verified by a
checksum.
• the code and constant data held in SRAM is checked against the corresponding data
in flash EPROM to check for data corruption.
• the SRAM containing all data other than the code and constant data is verified with a
checksum.
• the integrity of the digital signal I/O data from the opto-isolated inputs and the relay
contacts is checked by the data acquisition function every time it is executed. The
operation of the analogue data acquisition system is continuously checked by the
acquisition function every time it is executed, by means of sampling the reference
voltages.
• the operation of the IRIG-B board is checked, where it is fitted, by the software that
reads the time and date from the board.
In the unlikely event that one of the checks detects an error within the relay’s subsystems,
the platform software is notified and it will attempt to log a maintenance record in battery
backed-up SRAM. If the problem is with the battery status or the IRIG-B board, the relay will
continue in operation. However, for problems detected in any other area the relay will initiate
a shutdown and re-boot. This will result in a period of up to 5 seconds when the protection is
unavailable, but the complete restart of the relay including all initialisations should clear most
problems that could occur. As described above, an integral part of the start-up procedure is a
thorough diagnostic self-check. If this detects the same problem that caused the relay to
restart, i.e. the restart has not cleared the problem, then the relay will take itself permanently
out of service. This is indicated by the ‘Healthy’ LED on the front of the relay, which will
extinguish, and the watchdog contact which will operate.
Application Notes P44x/EN AP/F65
APPLICATION NOTES
Application Notes P44x/EN AP/F65
CONTENT
1. INTRODUCTION 9
1.1 Protection of overhead lines and cable circuits 9
1.2 MiCOM distance relay 9
1.2.1 Protection Features 10
1.2.2 Non-Protection Features 11
1.2.3 Additional Features for the P441 Relay Model 11
1.2.4 Additional Features for the P442 Relay Model 11
1.2.5 Additional Features for the P444 Relay Model 12
1.3 Remark 12
2.15 Negative sequence overcurrent protection (NPS) (“NEG sequence O/C” menu) 91
2.15.1 Setting Guidelines 92
2.15.2 Negative phase sequence current threshold, ‘I2> Current Set’ 94
2.15.3 Time Delay for the Negative Phase Sequence Overcurrent Element, ‘I2> Time Delay’ 94
2.15.4 Directionalising the Negative Phase Sequence Overcurrent Element 94
2.16 Broken conductor detection 95
2.16.1 Setting Guidelines 95
2.16.2 Example Setting 96
2.17 Directional and non-directional earth fault protection (“Earth fault O/C” menu) 97
2.17.1 Directional Earth Fault Protection (DEF) 101
2.17.2 Application of Zero Sequence Polarising 101
2.17.3 Application of Negative Sequence Polarising 102
2.18 Aided DEF protection schemes (“Aided D.E.F” menu) 102
2.18.1 Polarising the Directional Decision 104
2.18.2 Aided DEF Permissive Overreach Scheme 105
2.18.3 Aided DEF Blocking Scheme 106
2.19 Thermal overload (“Thermal overload” menu) – Since version C2.x 108
2.19.1 Single time constant characteristic 109
2.19.2 Dual time constant characteristic (Typically not applied for MiCOMho P443) 109
2.19.3 Setting guidelines 111
2.20 Residual overvoltage (neutral displacement) protection (“Residual overvoltage”
menu) 111
2.20.1 Setting guidelines 114
2.21 Maximum of Residual Power Protection – Zero Sequence Power Protection
(“Zero Seq Power” menu) (since version B1.x) 114
2.21.1 Function description 114
2.21.2 Settings & DDB cells assigned to zero sequence power (ZSP) function 117
2.22 Undervoltage protection (“Volt protection” menu) 118
2.22.1 Undervoltage protection 118
2.22.2 Setting Guidelines 119
2.23 Overvoltage protection 119
2.23.1 Setting Guidelines 120
2.24 Circuit breaker fail protection (CBF) (“CB Fail & I<” menu) 120
2.24.1 Breaker Failure Protection Configurations 121
2.24.2 Reset Mechanisms for Breaker Fail Timers 122
2.24.3 Typical settings 126
P44x/EN AP/F65 Application Notes
BLANK PAGE
Application Notes P44x/EN AP/F65
1. INTRODUCTION
1.1 Protection of overhead lines and cable circuits
Overhead lines are amongst the most fault susceptible items of plant in a modern power
system. It is therefore essential that the protection associated with them provides secure and
reliable operation. For distribution systems, continuity of supply is of para mount importance.
The majority of faults on overhead lines are transient or semi-permanent in nature, and multi-
shot autoreclose cycles are commonly used in conjunction with instantaneous tripping
elements to increase system availability. Thus, high speed, fault clearance is often a
fundamental requirement of any protection scheme on a distribution network. The protection
requirements for sub-transmission and higher voltage systems must also take into account
system stability. Where systems are not highly interconnected the use of single phase
tripping and high speed autoreclosure is commonly used. This in turn dictates the need for
high speed protection to reduce overall fault clearance times.
Underground cables are vulnerable to mechanical damage, such as disturbance by
construction work or ground subsidence. Also, faults can be caused by ingress of ground
moisture into the cable insulation, or its buried joints. Fast fault clearance is essential to limit
extensive damage, and avoid the risk of fire, etc.
Many power systems use earthing arrangements designed to limit the passage of earth fault
current. Methods such as resistance earthing make the detection of earth faults difficult.
Special protection elements are often used to meet such onerous protection requirements.
Physical distance must also be taken into account. Overhead lines can be hundreds of
kilometres in length. If high speed, discriminative protection is to be applied it will be
necessary to transfer information between the line ends. This not only puts the onus on the
security of signalling equipment but also on the protection in the event of loss of this signal.
Thus, backup protection is an important feature of any protection scheme. In the event of
equipment failure, maybe of signalling equipment or switchgear, it is necessary to provide
alternative forms of fault clearance. It is desirable to provide backup protection which can
operate with minimum time delay and yet discriminate with the main protection and
protection elsewhere on the system.
1.2 MiCOM distance relay
MiCOM relays are a range of products from AREVA T&D. Using advanced numerical
technology, MiCOM relays include devices designed for application to a wide range of power
system plant such as motors, generators, feeders, overhead lines and cables.
Each relay is designed around a common hardware and software platform in order to
achieve a high degree of commonality between products. One such product in the range is
the series of distance relays. The relay series has been designed to cater for the protection
of a wide range of overhead lines and underground cables from distribution to transmission
voltage levels.
The relay also includes a comprehensive range of non-protection features to aid with power
system diagnosis and fault analysis. All these features can be accessed remotely from one
of the relays remote serial communications options.
P44x/EN AP/F65 Application Notes
• 21G/21P: Phase and earth fault distance protection, each with up to 5 independent
zones of protection (6 zones from version C5.0, model 36J). Standard and customised
signalling schemes are available to give fast fault clearance for the whole of the
protected line or cable.
• 50/51: Instantaneous and time delayed overcurrent protection - Four elements are
available, with independent directional control for the 1st and 2nd element. The 3rd
element can be used for SOFT/TOR logic. The fourth element can be configured for
stub bus protection in 1½ circuit breaker arrangements.
• Four Setting Groups - Independent setting groups to cater for alternative power
system arrangements or customer specific applications.
• Remote Serial Communications - To allow remote access to the relays. The following
communications protocols are supported: Courier, MODBUS, IEC60870-5/103 and
DNP3 (UCA2 soon available).
• Circuit Breaker Control - Opening and closing of the circuit breaker can be achieved
either locally via the user interface / opto inputs, or remotely via serial
communications.
• Circuit Breaker Condition Monitoring - Provides records / alarm outputs regarding the
number of CB operations, sum of the interrupted current and the breaker operating
time.
• 8 Logic Inputs - For monitoring of the circuit breaker and other plant status.
• 14 Output relay contacts - For tripping, alarming, status indication and remote control.
1.2.4 Additional Features for the P442 Relay Model
• Real Time Clock Synchronisation - Time synchronisation is possible from the relay
IRIG-B input. (IRIG-B must be specified as an option at time of order).
• 16 Logic Inputs - For monitoring of the circuit breaker and other plant status.
• 21 Output relay contacts - For tripping, alarming, status indication and remote control.
P44x/EN AP/F65 Application Notes
• Real Time Clock Synchronisation - Time synchronisation is possible from the relay
IRIG-B input. (IRIG-B must be specified as an option at time of order).
• 24 Logic Inputs - For monitoring of the circuit breaker and other plant status.
• 32 Output relay contacts - For tripping, alarming, status indication and remote control.
1.3 Remark
The PSL screen copy extracted from S1, uses the different types of model P44x (07, 09…).
(See the DDB equivalent table with the different model number).
Example: check synch OK (model 07) = DDB204
check synch OK (model 09) = DDB236
• It is recommended to check in the DDB table, the reference number of each cell,
included in the chapter P44x/EN GC/E33 (“Relay menu Data base”)
X( /phase)
ZONE 3
ZONE P
ZONE 2
ZONE 1X
ZONE 1
ZONE 4
P0470ENa
X (Ω/phase)
ZONE 3
ZONE P
ZONE 2
ZONE 1X
ZONE 1
R (Ω/phase)
R1Ph/2 R2Ph/2 RpPh/2 R3Ph/2 =R4Ph/2
ZONE Q
ZONE 4
P0470ENb
• Zone 4 - Directional reverse zone. Note that zone 3 and zone 4 can be set with same
Rloop value to provide a general start of the relay.
Remark: If any zone i presents an Rloop i bigger than R3=R4, the limit of the
start is always given by R3. See also the "Commissioning Test"
chapter.
X( /phase)
ZONE 3
ZONE P (Programmable)
ZONE 2
ZONE 1X
ZONE 1
ZONE P Reverse
ZONE 4
P0471ENa
X (Ω/phase)
ZONE 3
ZONE P
ZONE 2
ZONE 1X
ZONE 1
R (Ω/phase)
R1G R2G RpG R3G R4G
1+KZ1 1+KZ1 1+KZ1 1+KZ1 1+KZ1
ZONE Q
ZONE 4
P0471ENb
• If Zp is a forward zone
− Z1 U Z2 < Zp < Z3
− tZ1 < tZ2 < tZp < tZ3
− R1G < R2G < RpG < R3G = R4G
− R1Ph < R1extPh < R2Ph < RpPh < R3Ph
P44x/EN AP/F65 Application Notes
• If Zp is a reverse zone
− Z1 < Z2 < Z3
− Zp > Z4
− tZ1 < tZ2 < tZ3
− tZp < tZ4
− R1G < R2G < R3G
− RpG < R3G = R4G
− R1Ph < R2Ph < R3Ph
− RpPh < R3Ph = R4Ph
− R3G < UN / (1.2 X √3 IN)
− R3Ph < UN / (1.2 X √3 IN)
Remarks: 1. If Z3 is disabled, the forward limit element becomes the
smaller zone Z2 (or Zp if selected forward)
2. If Z4 is disabled, the directional limit for the forward zone is:
30° (since version A4.0)
0° (versions older than A4.0)
− Distance timers are initiated as soon as the relay has picked up – CVMR pickup
distance (CVMR = Start & Convergence)
− The minimum tripping time even with carrier received is T1.
Since version C5.0 (model 36J) this applies only for standard distance scheme,
while in teleprotection schemes minimum tripping time is separately settable.
− Zone 4 is always reverse
(*) the use of an apostrophe in the above logic (Z'1) is explained in section 2.7.2.1 Figure 3
2.5.3 Outputs
2.6.1 Inputs
2.6.2 Outputs
Setting range
Menu text Default setting Step size
Min Max
GROUP 1
DISTANCE
ELEMENTS
LINE SETTING
Line Length 1000 km 0.3 km 1000 km 0.010 km
(625 miles) (0.2 mile) (625 miles) (0.005 mile)
Line Impedance 12/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
Line Angle 70° –90° +90° 0.1°
Zone Setting
Zone Status 110110 Bit 0: Z1X Enable, Bit 1: Z2 Enable,
Bit 2: Zone P Enable, Bit 3: Zone Q Enable
(since version D2.0), Bit 4: Z3 Enable, Bit 5:
Z4 Enable.
KZ1 Res Comp 1 0 7 0.001
KZ1 Angle 0° 0° 360° 0.1°
Z1 10/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
Z1X 15/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
R1G 10/In Ω 0 400/In Ω 0.01/In Ω
R1Ph 10/In Ω 0 400/In Ω 0.01/In Ω
tZ1 0 0 10s 0.002s
KZ2 Res Comp 1 0 7 0.001
KZ2 Angle 0° 0° 360° 0.1°
Z2 20/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
R2G 20/In Ω 0 400/In Ω 0.01/In Ω
R2Ph 20/In Ω 0 400/In Ω 0.01/In Ω
tZ2 0.2s 0 10s 0.01s
KZ3/4 Res Comp 1 0 7 0.01
KZ3/4 Angle 0° 0° 360° 0.1°
Z3 30/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
R3G - R4G 30/In Ω 0 400/In Ω 0.01/In Ω
R3Ph - R4Ph 30/In Ω 0 400/In Ω 0.01/In Ω
tZ3 0.6s 0 10s 0.01s
Z4 40/In Ω 0.001/In Ω 500/In Ω 0.01/In Ω
tZ4 1s 0 10s 0.01s
Zone P - Direct. Directional Fwd Directional Fwd or Directional Rev
KZp Res Comp 1 0 7 0.001
KZp Angle 0° 0° 360° 0.1°
P44x/EN AP/F65 Application Notes
Setting range
Menu text Default setting Step size
Min Max
Zp 25/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
RpG 25/In Ω 0 400/In Ω 0.01/In Ω
RpPh 25/In Ω 0 400/In Ω 0.01/In Ω
tZp 0.4s 0 10s 0.01s
Zone Q – Direct Directional Fwd Directional Fwd or Directional Rev
(since D2.0)
(since version D2.0)
− Addition of a settable time delay to prevent maloperation due to zone evolution from
zone n to zone n-1 by CB operation
− Addition of a tilt characteristic for zone 1 (independent setting for phase-to-ground and
phase-to-phase). Settable between ± 45°
− Addition of a tilt characteristic for zone 2 and zone P (common setting for phase-to-
ground and phase-to-phase/Z2 and Zp). Settable between ± 45°
Application Notes P44x/EN AP/F65
− DDB associated:
Since version C5.X, a new setting is added to set the duration of the voltage memory
availability after fault detection. When the voltage memory is declared unavailable (e.g. the V
Mem Validity set duration has expired, SOTF Mode, no healthy network to record memory
voltage), other polarizing quantities can be considered. These include zero, negative and
positive sequence (if voltage is sufficient). Otherwise directional decision is forced to forward.
Zone q is a further distance zone. It can be faster or slower than any other zone (except
zone 1), and it can be in either direction. The only constraint is that it must be inside the
overall Z3/Z4 start-up zone.
The residual current threshold (Earth I Detect.) used by the conventional algorithm to detect
earth faults is now settable.
Setting range
Menu text Default setting Step size
Min Max
V Mem Validity 10.00 s 0s 10.00 s 0.01 s
ZoneQ - Direct Directional FWD Directional FWD/ Directional REV
kZq Res Comp 1.000 0 7.000 0.001
kZq Angle 0 deg -180.0 180.0 0.1
Zq 27.00 Ohm 0.001 500.0 0.001
RqG 27.00 Ohm 0 400.0 0.010
RqPh 27.00 Ohm 0 400.0 0.010
tZq 500.0ms 0 10.00 0.010
Earth I Detect. 0.05 0 0.10 0.01
• Remark: New settings from C1.x dealing with the tilt and the evolving forward zone
detection to zone1 (to avoid a Z1 detection in case of impedance locus getting out
from the quad (due to remote CB operating) but crossing the Z1 before being out from
the quad (with enough points that a Z1 decision can be confirmed if that timer has
been set to 0ms).
• Serial Compensated Line: If enabled, the Directional Line used in the Delta Algorithms
is set at 90°
(Fwd = Quad1&4 / Rev = Quad 2&3)
REV FWD
REV FWD
P0472ENa
• If disabled, the Directional Line of the Delta algorithms is set at -30° like conventional
algorithms
FWD FWD
R
REV FWD
REV -30˚
P0473ENa
• Overlap Z Mode: If enable, for a fault in Zp (fwd), then Z1 & Z2 will be displayed in
LCD/Events/Drec – The internal logic is not modified
2.7.2 Zone Logic Applied
Normally the zone logic used by the distance algorithm is as below:
Z1'
Z2'
Z4'
P0462XXa
Z1x
& Z1x'
unblock PS ≥1
in Z1
Z1<ZL &
≥1
1
& Z1'
Z1
Reversal
Guard
&
PermZ2
≥1
Power
Swing
≥1 & Z2'
Unblock PS
≥1 unblock PS
in Z2
Z2
&
PermFwd
≥1 Forward'
&
Forward
unblock PS ≥1
in Z3
& Z3'
Z3 Z2'
unblock PS
in Z4 ≥1
Z4 & Z4'
Zp_Fwd
&
unblock PS
in Zp
≥1
Zp'
Zp &
Reverse
Reverse'
≥1
P0474ENa
2.7.2.2 Inputs
2.7.2.3 Outputs
For guidance on Line Length, Line Impedance, kZm Mutual Compensation and kZm mutual
compensation Angle settings, refer to section 4.1.
2.7.3 Zone Reaches
All impedance reaches for phase fault protection are calculated in polar form: Z ∠θ, where Z
is the reach in ohms, and θ is the line angle setting in degrees, common to all zones.
The line parameters can be adjusted in polar or rectangular mode to give the total positive
impedance of the protected line:
• The zone 1 elements of a distance relay should be set to cover as much of the
protected line as possible, allowing instantaneous tripping for as many faults as
possible. In most applications the zone 1 reach (Z1) should not be able to respond to
faults beyond the protected line. For an underreaching application the zone 1 reach
must therefore be set to account for any possible overreaching errors. These errors
come from the relay, the VTs and CTs and inaccurate line impedance data. It is
therefore recommended that the reach of the zone 1 distance elements is restricted to
80 - 85% of the protected line impedance (positive phase sequence line impedance),
with zone 2 elements set to cover the final 20% of the line. (Note: Two of the channel
aided distance schemes described later, schemes POP Z1 and BOP Z1 use
overreaching zone 1 elements, and the previous setting recommendation does not
apply).
• The zone 2 elements should be set to cover the 20% of the line not covered by zone
1. Allowing for underreaching errors, the zone 2 reach (Z2) should be set in excess of
120% of the protected line impedance for all fault conditions. Where aided tripping
schemes are used, fast operation of the zone 2 elements is required. It is therefore
beneficial to set zone 2 to reach as far as possible, such that faults on the protected
line are well within reach. A constraining requirement is that, where possible, zone 2
does not reach beyond the zone 1 reach of adjacent line protection. Where this is not
possible, it is necessary to time grade zone 2 elements of relays on adjacent lines.
For this reason the zone 2 reach should be set to cover ≤50% of the shortest adjacent
line impedance, if possible. When setting zone 2 earth fault elements on parallel
circuits, the effects of zero sequence mutual coupling will need to be accounted for.
The mutual coupling will result in the Zone 2 ground fault elements underreaching. To
ensure adequate coverage an extended reach setting may be required, this is covered
in Section 2.7.7.
• The zone 3 elements would usually be used to provide overall back-up protection for
adjacent circuits. The zone 3 reach (Z3) is therefore set to approximately 120% of the
combined impedance of the protected line plus the longest adjacent line. A higher
apparent impedance of the adjacent line may need to be allowed where fault current
can be fed from multiple sources or flow via parallel paths.
• Zones p and q are a reversible directional zones. The setting chosen for zone p (q), if
used at all, will depend upon its application. Typical applications include its use as an
additional time delayed zone or as a reverse back-up protection zone for busbars and
transformers. Use of zone p(q) as an additional forward zone of protection may be
required by some users to line up with any existing practice of using more than three
forward zones of distance protection. Zone p(q) may also be useful for dealing with
some mutual coupling effects when protecting a double circuit line, which will be
discussed in section 2.7.7.
• The zone 4 elements would typically provide back-up protection for the local busbar,
where the offset reach is set to 25% of the zone 1 reach of the relay for short lines
(<30km) or 10% of the zone 1 reach for long lines. Setting zone 4 in this way would
also satisfy the requirements for Switch on to Fault, and Trip on Reclose protection, as
described in later sections. Where zone 4 is used to provide reverse directional
decisions for Blocking or Permissive Overreach schemes, zone 4 must reach further
behind the relay than zone 2 for the remote relay. This can be achieved by setting:
Z4 ≥ ((Remote zone 2 reach) x 120%) minus the protected line impedance.
P44x/EN AP/F65 Application Notes
• The zone 1 time delay (tZ1) is generally set to zero, giving instantaneous operation.
However, a time delay might be employed in cases where a large transient DC
component is expected in the fault current, and older circuit breakers may be unable
to break the current until zero crossings appear.
• The zone 2 time delay (tZ2) is set to co-ordinate with zone 1 fault clearance time for
adjacent lines. The total fault clearance time will consist of the downstream zone 1
operating time plus the associated breaker operating time. Allowance must also be
made for the zone 2 elements to reset following clearance of an adjacent line fault and
also for a safety margin. A typical minimum zone 2 time delay is of the order of 200ms.
This time may have to be adjusted where the relay is required to grade with other
zone 2 protection or slower forms of back-up protection for adjacent circuits.
• The zone 3 and zone p(q) time delays (tZ3, tZp, tZq) are typically set with the same
considerations made for the zone 2 time delay, except that the delay needs to co-
ordinate with the downstream zone 2 fault clearance (or reverse busbar protection
fault clearance). A typical minimum operating time would be about 400ms. Again, this
may need to be modified to co-ordinate with slower forms of back-up protection for
adjacent circuits.
• The zone 4 time delay (tZ4) needs to co-ordinate with any protection for adjacent lines
in the relay’s reverse direction. If zone 4 is required merely for use in a Blocking
scheme, tZ4 may be set high.
Remark: In MiCOM S1, timers settable are: tZi but in the DDB corresponding
cells are: Ti
2.7.5 Residual Compensation for Earth Fault Elements
For earth faults, residual current (derived as the vector sum of phase current inputs
(Ia + Ib + Ic) is assumed to flow in the residual path of the earth loop circuit. Thus, the earth
loop reach of any zone must generally be extended by a multiplication factor of (1 + kZ0)
compared to the positive sequence reach for the corresponding phase fault element.
kZ0 is designated as the residual compensation factor, and is calculated as:
Where:
Z1 = Positive sequence impedance for the line or cable;
Z0 = Zero sequence impedance for the line or cable.
kZ0 CALCULATION DESCRIPTION
If we consider a phase to ground fault AN with analog values VA and IA.
Using symetrical components, VA is described as above:
(1) VA = V1 + V2 + V0 = Z1I1 + Z2I2 + Z0I0
Z2 = Z1 (for a line or a cable)
(2) VA = Z1 (I1 + I2) + Z0I0
we can write also: IA = I1 + I2 +I0
(3) (I1 + I2) = IA – I0
with (3) in (2) we obtain:
(4) VA = Z1 (IA – I0) + Z0I0
Application Notes P44x/EN AP/F65
That is the form used for the result of Z measured with injector providing U, I, ϕ
Separate compensation for each zone (KZ1, KZ2, KZ3/4, KZp and KZq) allows more
accurate earth fault reach control for elements which are set to overreach the protected line,
such that they cover other circuits which may have different zero sequence to positive
sequence impedance ratios (example: underground cable & overhead line in the protected
line).
2.7.6 Resistive Reach Calculation - Phase Fault Elements
In MiCOM S1 all resistances are set per loop
The P441, P442 and P444 relays have quadrilateral distance elements, thus the resistive
reach (RPh) is set independently of the impedance reach along the protected line/cable.
RPh defines the maximum amount of fault resistance additional to the line impedance for
which a distance zone will trip, regardless of the location of the fault within the zone. Thus,
the right hand and left hand resistive reach constraints of each zone are displaced by +RPh
and -RPh either side of the characteristic impedance of the line, respectively. RPh is
generally set on a per zone basis, using R1Ph, R2Ph, RpPh and RqPh. Note that zones 3
and 4 share the resistive reach R3Ph-R4Ph.
When the relay is set in primary impedance terms, RPh must be set to cover the maximum
expected phase-to-phase fault resistance. In general, RPh must be set greater than the
maximum fault arc resistance for a phase-phase fault, e.g. calculated as follows:
Ra = (28710 x L) / If1.4
RPh ≥ Ra
P44x/EN AP/F65 Application Notes
Where:
If = Minimum expected phase-phase fault current (A);
L = Maximum phase conductor spacing (m);
TABLE 1 - TYPICAL ARC RESISTANCES CALCULATED USING THE VAN WARRINGTON FORMULA
The maximum phase fault resistive reach must be limited to avoid load encroachment trips.
Thus, R3Ph and other phase fault resistive reach settings must be set to avoid the heaviest
allowable loading on the feeder. An example is shown in Figure 3 below, where the worst
case loading has been determined as point “Z”, calculated from:
Zone 3
∆R
R3PG-R4PG
Z
LOAD
Zone 4
P0475ENa
set ≤ 60% of the distance from the line characteristic impedance towards Z. A setting
between the calculated minimum and maximum should be applied.
R/Z ratio: For best zone reach accuracy, the resistive reach of each zone would not normally
be set greater than 10 times the corresponding zone reach. This avoids relay overreach or
underreach where the protected line is exporting or importing power at the instant of fault
inception. The resistive reach of any other zone cannot be set greater than R3Ph, and
where zone 4 is used to provide reverse directional decisions for Blocking or Permissive
Overreach schemes, the zone 2 elements used in the scheme must satisfy R2Ph ≤ (R3Ph-
R4Ph) x 80%.
2.7.7 Resistive Reach Calculation - Earth Fault Elements
The resistive reach setting of the relay earth fault elements (RG) should be set to cover the
desired level of earth fault resistance, but to avoid operation with minimum load impedance.
Fault resistance would comprise arc-resistance and tower footing resistance. In addition, for
best reach accuracy, the resistive reach of any zone of the relay would not normally be
greater than 10 times the corresponding earth loop reach.
EXPERT SECTION
As shown in Figure 4 (section 2.7.6), R3G – R4G is set such as to avoid point Z (minimum
load impedance) by a suitable margin.
A typical resistive reach coverage would be 40Ω on the primary system. The same load
impedance as in section 2.4.4 must be avoided. Thus R3G is set such as to avoid point Z by
a suitable margin. Zone 3 must never reach more than 80% of the distance from the line
characteristic impedance (shown dotted in Figure 3), towards Z.
For high resistance earth faults, the situation may arise where no distance elements could
operate. In this case it will be necessary to provide supplementary earth fault protection, for
example using the relay Channel Aided DEF protection.
2.7.8 Effects of Mutual Coupling on Distance Settings
Where overhead lines are connected in parallel or run in close proximity for the whole or part
of their length, mutual coupling exists between the two circuits. The positive and negative
sequence coupling is small and can be neglected. The zero sequence coupling is more
significant and will affect relay measurement during earth faults with parallel line operation.
P44x/EN AP/F65 Application Notes
Zero sequence mutual coupling will cause a distance relay to underreach or overreach,
depending on the direction of zero sequence current flow in the parallel line. However, it can
be shown that this underreach or overreach will not affect relay discrimination during parallel
line operation (ie. it is not be possible to overreach for faults beyond the protected line and
neither will it be possible to underreach to such a degree that no zone 1 overlap exists). A
channel-aided scheme will therefore still respond to faults within the protected line and
remain secure during external faults. Some applications exist, however, where the effects of
mutual coupling should be addressed.
2.7.9 Effect of Mutual Coupling on Zone 1 Setting
For the case shown in Figure 5, where one circuit of a parallel line is out of service and
earthed at both ends, an earth fault at the remote bus may result in incorrect operation of the
zone 1 earth fault elements. It may be desirable to reduce the zone 1 earth loop reach for
this application. This can be achieved using an alternative setting group within the relay, in
which the residual compensation factor kZ1 is set at a lower value than normal (typically ≤
80% of normal kZ1).
Z1 G/F (Optional)
Z1 G/F (Normal)
ZMO
P3048ENa
ZMO
(i) Group 1
2.8.2 Settings
Setting range
Menu text Default setting Step size
Min Max
Group 1
Distance schemes
Program Mode Standard Scheme Standard Scheme
Open Scheme
Standard Mode Basic + Z1X Basic + Z1X, POP Z1,
POP Z2, PUP Z2, PUP Fwd, BOP Z1,
BOP Z2.
Fault Type Both Enabled Phase to Ground,
Phase to Phase,
Both Enabled.
Trip Mode Force 3 Poles Force 3 Poles,
1 Pole Z1 & CR,
1 Pole Z1 Z2 & CR.
Sig. Send Zone None None, CsZ1, CsZ2, CsZ4.
Dist CR None None, PermZ1, PermZ2, PermFwd, BlkZ1,
BlkZ2.
Tp 0.02s 0 1s 0.002s
tReversal Guard 0.02s 0 0.15s 0.002s
Unblocking Logic None None, Loss of Guard, Loss of Carrier.
Application Notes P44x/EN AP/F65
Setting range
Menu text Default setting Step size
Min Max
TOR-SOTF Mode 00000000110000 Bit 0: TOR Z1
Bit 1: TOR Z2
Bit 2: TOR Z3
Bit 3: TOR All Zones
Bit 4: TOR Dist. Scheme
Bit 5: SOFT All Zones
Bit 6: SOFT Lev. Det.
Bit 7: SOFT Z1
Bit 8: SOFT Z2
Bit 9: SOFT Z3
Bit 0A: SOFT Z1 + Rev
Bit 0B: SOFT Z2 + Rev
Bit 0C: SOFT Dist. Scheme
Bit 0D: SOFT Disable
Bit 0E: SOTF I>3 enabled
SOTF Delay 110s 10.00s 3600s 1s
Z1 Ext. on Chan. Fail Disabled Disabled or Enabled
Weak Infeed
WI: Mode Status Disabled Disabled, Echo, WI Trip & Echo.
WI: Single Pole Disabled Disabled, Enabled
WI: V< Thres. 45V 10V 70V 5V
WI: Trip Time Delay 0.06s 0 1s 0.002s
PAP: Del Trip En Disabled Disabled, Enabled
PAP: P1 / P2 / P3 Disabled Disabled, Enabled
PAP: 1P / 2P / 3P Time 500 ms 100ms 1500s 100.0ms
Del
PAP: IN Thres 500 mA 100mA 1A 10mA
PAP: K (%Vn) 500 e-3 500e-3 1.000 50e-3
Loss of Load
LoL: Mode Status Disabled Disabled or Enabled
LoL: Chan. Fail Disabled Disabled or Enabled
LoL: I< 0.5 x In 0.05 x In 1 x In 0.05 x In
LoL: Window 0.04s 0.01s 0.1s 0.01s
P44x/EN AP/F65 Application Notes
• Zone1 (CSZ1)
• Zone2 (CSZ2)
Z1'
Z2'
Z4' Z2'(*)
P0476XXa
(There is a 10ms delay in drop of on the carried send to avoid a logic race between this
signal and the zone pick up.)
2.8.3.2 Inputs
2.8.3.3 Outputs
− 1PZ1 & CR: Trip 1Pole in T1 for fault in Z1 and also in case of Carrier Received
(aided Trip)
− 1PZ1, Z2 & CR: Trip 1Pole for T1 & T2 in T1 for fault in Z1 and CR (aided Trip) and
also in Z2 with CR
Several defined aided trip logic can be selected or an open logic can be designed by user
(see also section 4.5 from chapter P44x/EN HW).
P44x/EN AP/F65 Application Notes
Unblocking Basic
+
Aided
Schemes
+
Weak-Infeed
Trip
Distance
Protection
PSB
TOR
+ SOTF
RVG
LOL
• The unblocking function if enabled, carries out a function similar to Carrier receive
logic. (see explanations in section 0)
• Weak infeed allows for the case where there may be no zone pick up from local end.
• TOR & SOTF applies specific logic in case of manual closing or AR closing logic.
• Trip Distance Protection manages the trip order regarding the distance algorithm
outputs, the type of trip 1P or 3P, the distance timers, and the logic data such as
power swing blocking.
• Loss of Load manages a specific logic for tripping 3P in Z2 accelerated without carrier.
2.8.4 The Basic Scheme
The Basic distance scheme is suitable for applications where no signalling channel is
available. Zones 1, 2 and 3 are set as described in Sections 2.7.3 to 2.7.10. In general
zones 1 and 2 provide main protection for the line or cable as shown in Figure 9 below, with
zone 3 reaching further to provide back up protection for faults on adjacent circuits.
Application Notes P44x/EN AP/F65
Z2A
ZL
A Z1A B
Z1B
Z2B
P3050XXa
FIGURE 9 - MAIN PROTECTION IN THE BASIC SCHEME (NO REQUIREMENT FOR SIGNALLING
CHANNEL)
Key:
A, B = Relay locations;
ZL = Impedance of the protected line.
P44x/EN AP/F65 Application Notes
Protection A Protection B
Z1' Z1'
& &
T1
tZ1 T1
tZ1
Z2' Z2'
& &
T2
tZ2 T2
tZ2
Trip Trip
Z3' Z3'
T3
tZ3
& ≥1 ≥1 &
T3
tZ3
Zp' Zp'
& &
Tzp
tZp Tzp
tZp
Z4' Z4'
& &
T4
tZ4 T4
tZ4
P0543ENa
Z1 Extension (A)
ZL
A Z1A B
Z1B
Z1 Extension (B)
P3052ENa
Remark: To enable the Z1X logic, the DDB "Z1X extension" cell must be linked
in the PSL (opto/reclaim time…)
Z1'
&
T1
INP_Z1EXT &
None
& >1
Z1x'
T2
Z1X channel fail & & PDist_Trip
Z2'
UNB_Alarm ≥1
Z3'
&
T3
Zp'
&
Tzp
Z4'
&
T4
P0478ENa
2.8.5.2 Outputs
Z2
Z1
Z1 Z1
Z1
Z2
LOL-A
LOL-B
&
LOL-C
18ms
0 & Trip
40ms 0
&
Z2
1
P3053ENa
2.8.6.2 Outputs
Activ_LOL
TRIP _Any
Force_3P_Dist Yes
Force3P_DEF 3p &
Activ WI = WI/echo &
WI_1pTrip = No
UNB_CR_Alarm
&
&
PZ1, PZ2, PFwd ≥1
Z1<ZL
None
S
&
0 Q
R
T
LOL Wind
&
IA_LOL<
&
IB_LOL<
IC_LOL< &
≥1 T
Flt A & 0 S
LOL_Trip3P
Q
18 ms R
Flt B &
Flt C
Flt AB
&
Flt BC
Flt AC
&
Z2'
P0479ENa
• Current reversal guard logic to prevent maloperation of any overreaching zone used in
a channel aided scheme, when fault clearance is in progress on the parallel circuit of a
double circuit line.
Since the version C5.X, in PUP Z2, PUP FWD, POP Z1 and POP Z2 schemes the timer TZ1
has been replaced by the timer Tp.
2.9.1 Permissive Underreach Transfer Trip Schemes PUP Z2 and PUP Fwd
To provide fast fault clearance for all faults, both transient and permanent, along the length
of the protected circuit, it is necessary to use a signal aided tripping scheme. The simplest
of these is the permissive underreach protection scheme (PUP), of which two variants are
offered in the P441, P442 and P444 relays. The channel for a PUP scheme is keyed by
operation of the underreaching zone 1 elements of the relay. If the remote relay has detected
a forward fault upon receipt of this signal, the relay will operate with no additional delay.
Faults in the last 20% of the protected line are therefore cleared with no intentional time
delay.
Listed below are some of the main features/requirements for a permissive underreaching
scheme:
• The scheme has a high degree of security since the signalling channel is only keyed
for faults within the protected line.
• If the remote terminal of a line is open then faults in the remote 20% of the line will be
cleared via the zone 2 time delay of the local relay.
• If there is a weak or zero infeed from the remote line end, (ie. current below the relay
sensitivity), then faults in the remote 20% of the line will be cleared via the zone 2 time
delay of the local relay.
• If the signalling channel fails, Basic distance scheme tripping will be available.
Z2A
ZL
A Z1A B
Z1B
Z2B
P3054XXa
Protection A Protection B
Signal Signal
Send Z1' Send Z1'
Z1' Z1'
tZ1 & & tZ1
Z3' Z3'
& &
tZ3 tZ3
Zp' Zp'
& &
tZp tZp
Z4'
≥1 Trip Trip
≥1 Z4'
& &
tZ4 tZ4
tZ2 tZ2
& &
Z2' Z2'
&
&
P3055ENa
Protection A Protection B
Signal Signal
Send Z1' Send Z1'
Z1' Z1'
& &
tZ1 tZ1
Z3' Z3'
& &
tZ3 tZ3
Zp' Zp'
& &
tZp tZp
Trip Trip
Z4' Z4'
& &
tZ4 tZ4
tZ2 tZ2
& &
&
Z2' Z2'
& tp
tp &
P3055ENb
FIGURE 18B - THE PUP Z2 PERMISSIVE UNDERREACH SCHEME SINCE VERSION C5.X
(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)
Application Notes P44x/EN AP/F65
2.9.1.2 Permissive Underreach Protection Tripping via Forward Start (PUP Fwd)
This scheme is similar to that used in the AREVA EPAC and PXLN relays, allowing an
instantaneous Z2 or Z3 trip on receipt of the signal from the remote end protection. Figure
19 shows the simplified scheme logic.
Since the version C5.X, if the remote relay has picked up in a forward zone and the
underimpedance element has started, then it will trip after the Tp delay upon reception of the
permissive signal from the other end of the line.
Z1' Z1'
Z3' Z3'
& &
tZ3 tZ3
Zp' Zp'
tZp & &
tZp
Trip
Z4' ≥1
Trip
≥1
Z4'
&
tZ4 & tZ4
tZ2
tZ2
&
Z2' & Z2'
Fwd' Fwd'
P3056ENa
Z1' Z1'
& &
tZ1 tZ1
Z3' Z3'
& &
tZ3 tZ3
Zp' Zp'
& &
tZp
tZp
Trip Trip
Z4'
& Z4'
tZ4 &
tZ4
tZ2
& tZ2
&
Z2' Z2'
Fwd’ Fwd’
tp & & tp
<Z <Z
P3056ENb
FIGURE 19B - THE PUP FWD PERMISSIVE UNDERREACH SCHEME SINCE VERSION C5.X
(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)
Key:
Fwd = Forward fault detection;
<Z = Underimpedance start by Z2 or Z3.
2.9.2 Permissive Overreach Transfer Trip Schemes POP Z2 and POP Z1
The P441, P442 and P444 relays offer two variants of permissive overreach protection
schemes (POP), having the following common features/requirements:
• Current reversal guard logic is used to prevent healthy line protection maloperation for
the high speed current reversals experienced in double circuit lines, caused by
sequential opening of circuit breakers.
• If the signalling channel fails, Basic distance scheme tripping will be available.
Application Notes P44x/EN AP/F65
Z2A
ZL
A Z1A B
Z1B
Z2B
P3054XXa
Z1' Z1'
tZ1 tZ1
& &
Z3' Z3'
Zp' Zp'
tZ2 tZ2
& &
Z2' Z2'
& &
P3058ENa
Protection A Protection B
Signal Signal
Send Z2' Send Z2'
Z1' Z1'
tZ 1 tZ 1
& &
Z3' Z3'
tZ 3 & & tZ 3
Zp' Zp'
tZ p & & tZ p
Trip Trip
Z4'
1 1
Z4'
tZ 4 & & tZ 4
tZ 2 tZ 2
& &
Z2' Z2'
tp tp
& &
P3058ENb
FIGURE 21B - LOGIC DIAGRAM FOR THE POP Z2 SCHEME SINCE VERSION C5.X
(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)
Z2A
Z1A
A ZL B
Z1B
Z2B
P3059XXa
Z2' Z2'
Z3' Z3'
& &
tZ3 tZ3
Zp' Zp'
&
&
Z1' Z1'
& &
tZ1 tZ1
P3060ENa
Z2 ' Z2'
& & tZ 2
tZ 2
Z3 ' Z3'
& &
tZ 3 tZ 3
Zp ' Zp'
tZ p & &
tZ p
Trip Trip
Z4 ' 1 1 Z4'
&
tZ 4 & tZ 4
&
&
Z1 ' Z1'
& &
tp tp
P3060ENb
FIGURE 24B - LOGIC DIAGRAM FOR THE POP Z1 SCHEME SINCE VERSION C5.X
(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)
P44x/EN AP/F65 Application Notes
Def_Reverse
Reverse
0 &
Distance start
T
FFUS_Confirmed 150 ms
WI Logic confirmed
0
UNB_CR T
60 ms &
Pulse
Timer
200 ms
Activ_WI Echo or WI/echo
P0480ENa
WI logic
& WI_CS
UNB_CR
Echo send:
(NB: For UNB_CR explanation see Unblocking logic in next section 0)
VA<_WI
& WI_A
CB 52a_phA
& FLT_A
VB<_WI
& WI_B
CB 52a_phB
& FLT_B
VC<_WI
& WI_C
CB 52a_phC
WI_A
WI_B ≥1
≥1 WI_PhaseA
WI_C &
WI/echo
Activ_WI
Trip1P_WI Yes
≥1 WI_PhaseB
&
&
≥1 WI_PhaseC
&
P0482ENa
WI_Phase A
T
WI_Phase B ≥1 0
TtripWI
WI_Phase C
& WI_TripA
& WI_TripB
& WI_TripC
Autor_WI
P0531ENa
2.9.3.2 Outputs
2.9.3.3 PAP – Weak infeed for RTE application (since version C2.X)
(PAP= Protection Antenne Passive)
That specific request from RTE is an exclusive choice with the export Weak infeed logic:
If the PAP has been selected then the following settings are activated with MiCOM S1:
For internal logic description, check the RTE manual ref P440 user guide EF GS
• Inputs signals [binary inputs: CR (Carrier Receive) COS (Carrier Out of Service)]
• Settings used for the distance channel & DEF aided trip channel
• Carrier Out of Service (INP_COS - binary input for distance logic) and
(INP_COS_DEF - binary input for DEF logic)
2.9.4.1 None
150 ms
0
S
=1 Q UNB Alarm
R
Pulse Timer
Indicates by digital input
200 ms
the Loss of guard
INP COS
&
INP CR
≥1 UNB CR
10 ms
0
S
&
Q
R
Pulse Timer
150 ms
P3061ENa
150 ms
0 S
Q UNB Alarm
R
Pulse Timer
INP COS
&
UNB CR
INP CR ≥1
10 ms
0
S
&
Q
R
Pulse Timer
150 ms
P3062ENa
NOTE: For DEF the logic will used depende upon which settings are enabled:
2.9.4.5 Outputs
• If the signalling channel is taken out of service, the relay will operate in the
conventional Basic mode.
• A current reversal guard timer is included in the signal send logic to prevent unwanted
trips of the relay on the healthy circuit, during current reversal situations on a parallel
circuit.
• To allow time for a blocking signal to arrive, a short time delay on aided tripping, Tp,
must be used, as follows:
Recommended Tp setting = Max. signalling channel operating time + 14ms
2.9.5.1 Blocking Overreach Protection with Overreaching Zone 2 (BOP Z2)
This scheme is similar to that used in the other AREVA distance relays. Figure 31 shows the
zone reaches, and Figure 32 the simplified scheme logic. The signalling channel is keyed
from operation of the reverse zone 4 elements of the relay. If the remote relay has picked up
in zone 2, then it will operate after the Tp delay if no block is received.
Z4A Z2A
ZL
A Z1A B
Z1B Z4B
Z2B
P3063XXa
Protection A Protection B
Signal
Emission Signal
Emission
Send Z4'
Téléac Send Z4'
Téléac
Z1' Z1'
Z3' Z3'
& &
tZ3
T3 tZ3
T3
Zp' Zp'
& &
tZp
Tzp tZp
Trip Tzp
≥1 Trip ≥1
Z4' Z4'
& &
tZ4
T4 tZ4
T4
Tp Tp
& &
Z2' Z2'
tZ2
T2 & & tZ2
T2
P0533ENa
Z4A Z2A
Z1A
A ZL B
Z1B
Z4B
Z2B
P3065XXa
Z2' Z2'
tZ2 & & tZ2
Z3' Z3'
& &
tZ3 tZ3
Zp' Zp'
& &
tZp tZp
≥1 Trip Trip ≥1
Z4' Z4'
& &
tZ4 tZ4
&
&
Z1' Z1'
tZ1 tZ1
& &
Tp Tp
P3066ENa
t2(C) t2(D)
Fault Fault
A L1 B A L1 B
Strong Weak
source C L2 D source C L2 D
The options for SOTF and TOR are found in the “Distance Schemes” menu.
Setting range
Menu text Default setting Step size
Min Max
GROUP 1
DISTANCE SCHEMES
TOR-SOTF Mode TOR Bit 0: TOR Z1 Enabled,
Dist scheme Bit 1: TOR Z2 Enabled,
Bit 0 to 4
Bit 2: TOR Z3 Enabled,
Default: bit 4
Bit 3: TOR All Zones,
15 bits Bit 4: TOR Dist. Scheme .
SOTF all Zones Bit 5: SOTF All Zones
Bit 5 to E Bit 6: SOTF Lev. Detect.
Default: bit 5 From version A3.1:
Bit 7: SOTF Z1 Enabled
Bit 8: SOTF Z2 Enabled
Bit 9: SOTF Z3 Enabled
Bit A: SOTF Z1+Rev
Bit B: SOTF Z2+Rev
Bit C: SOTF Dist. Scheme
Bit D: SOTF Disabled
From version C5.x:
Bit E: SOTF I>3 Enabled
SOTF Delay 110sec 10sec 3600sec 1 sec
Application Notes P44x/EN AP/F65
Trip
Reclosing
200 ms 500 ms
TOR Enable
P0532ENa
• SOTF protection is enabled any time that the circuit breaker has been open 3 pole for
longer than 110s, that timer is configurable from version A3.0 /allows variation of the
duration when dead pole is detected before the internal logic detects line dead and
activates the SOTF logic and autoreclosure is not in progress. Thus, SOTF protection
is enabled for manual reclosures, not for autoreclosure.
P44x/EN AP/F65 Application Notes
AR_RECLAIM
Pulse
>1
T
INP_RECLAIM >1 TOR Enable
500 ms
1P or 3P AR
INP_RECLAIM >1
Assigned
T
& 0
200 ms S
Q
>1
>1 R
Any Pole Dead 0
T
500 ms
>1
R
T Q SOTF Enable
All Pole Dead
0 S
>1
TSOTF Enable &
SOTF (by default:110 s)
disabled
CBC_Closing Order
CB_Control &
activated
&
INP_CB_Man_Close
P0485ENb
Zone 4
Zone 3
Directional
line (not used)
P0535ENa
Type of Fault
Fault in Zp Fault in Zp
Fault in Z1 Fault in Z2 Fault in Z3 Fault in Z4
Fwd Rev
SOTF selected Logic
SOTF All Zone SOTF trip SOTF trip SOTF trip Same result SOTF trip SOTF trip
(Zp Fwd) T0 T0 T0 if Zp Rev T0 T0
T0
SOTF Z1 SOTF trip DIST trip DIST trip x DIST trip DIST trip
(Zp Fwd) T0 T2 TZp T3 T4
SOTF Z2 SOTF trip SOTF trip DIST trip x DIST trip DIST trip
(Zp Fwd) T0 T0 TZp T3 T4
SOTF Z3 SOTF trip SOTF trip SOTF trip x SOTF trip DIST trip
(Zp Fwd) T0 T0 T0 T0 T4
SOTF Z1+Rev (Zp Fwd) SOTF trip DIST trip DIST trip x DIST trip SOTF trip
T0 T2 TZp T3 T0
SOTF Z2+Rev (Zp Fwd) SOTF trip SOTF trip DIST trip x DIST trip SOTF trip
T0 T0 TZp T3 T0
SOTF Z1+Rev (Zp Rev) SOTF trip DIST trip x SOTF trip DIST trip DIST trip
T0 T2 T0 T3 T4
SOTF Z2+Rev (Zp Rev) SOTF trip SOTF trip x SOTF trip DIST trip DIST trip
T0 T0 T0 T3 T4
SOTF Dist. Sch. (Zp fwd) SOTF trip SOTF trip SOTF trip x SOTF trip SOTF trip
(With a 3Plogic) T1 T2 TZp T3 T4
SOTF Disable DIST trip DIST trip DIST trip x DIST trip DIST trip
(Distance scheme & 1P) T1* T2 TZp* T3 T4
No setting in SOTF DIST trip DIST trip DIST trip x DIST trip DIST trip
(All Bits at 0) & No I>3 T1* T2 TZp T3 T4
Level detectors SOTF trip SOTF trip SOTF trip x SOTF trip SOTF trip
T0 T0 T0 T0 T0
*No Ban Tri: Distance trip logic is applied without any 3P trip logic forced by SOTF.
TOR Trip logic results
Type of Fault
Fault in Zp Fault in Zp
Fault in Z1 Fault in Z2 Fault in Z3 Fault in Z4
Fwd Rev
TOR selected Logic
TOR All Zone TOR trip TOR trip TOR trip TOR trip TOR trip TOR trip
(Zp Fwd) T0 T0 T0 T0 T0 T0
TOR Z1 Enabled TOR trip Dist trip Dist trip Dist trip Dist trip Dist trip
(Zp Fwd) T0 T2 Tp Tp T3 T4
TOR Z2 Enabled TOR trip TOR trip Dist trip Dist trip Dist trip Dist trip
(Zp Fwd) T0 T0 Tp Tp T3 T4
TOR Z3 Enabled TOR trip TOR trip TOR trip Dist trip TOR trip Dist trip
(Zp Fwd) T0 T0 T0 Tp T0 T4
TOR Dist.Scheme Dist trip Dist trip Dist trip Dist trip Dist trip Dist trip
(logic POP/PUP) T1 T2 Tp Tp T3 T4
Application Notes P44x/EN AP/F65
2.12.3 Switch on to Fault and Trip on Reclose by I>3 Overcurrent Element (not filtered for inruch
current):
Inside the 500 ms time window initiated by SOTF/TOR logic, an instantaneous 3 phases trip
logic will be issued, if a faulty current is measured over the I>3 threshold value (adjusted in
MiCOM S1).
After the 500 ms TOR/SOTF time windows has ended, the I>3 overcurrent element remains
in service with a trip time delay equal to the setting I>3 Time Delay. This element would trip
for close-up high current faults, such as those where maintenance earth clamps are
inadvertently left in position on line energisation.
2.12.4 Switch on to Fault and Trip on Reclose by Level Detectors
TOR/SOTF level detectors (Bit6 in SOTF logic), allows an instantaneous 3 phases tripping
from any low set I< level detector, provided that its corresponding Live Line level detector
has not picked up within 20ms. When closing a circuit breaker to energize a healthy line,
current would normally be detected above setting, but no trip results as the system voltage
rapidly recovers to near nominal. Only when a line fault is present will the voltage fail to
recover, resulting in a trip.
• SOTF/TOR trip by level detectors per phase: If Vphase< 70% Vn AND if Iphase> 5% In
during 20 ms (to avoid any maloperation due to unstable contact during reclosing
order), an instantaneous trip order is issued.
P44x/EN AP/F65 Application Notes
The logic diagram for this, and other modes of TOR/SOTF protection is shown in Figure 38:
T
Va > & 0 & TOC A
Ia < 20 ms
T
Vb >
& 0 & TOC B
Ib <
20 ms
Vc > T
& 0 & TOC C
Ic <
20 ms
SOTF LD Enable LD Enable
≥1
SOTF Z1 + rev Enable & &
Zp
&
Z4
Zp Reverse &
SOTF Z3 Enable
&
Z1 + Z2 + Z3
SOTF Enable
TOR Z1 Enable
&
Z1
TOR Z2 Enable
Z1 + Z2 &
TOR Z3 Enable
& ≥1
Z1 + Z2 + Z3
&
TOR All Zones Enable &
All Zones
TOR Enable
P0486ENb
• When the overcurrent option is enabled, the I>3 current setting applied should be
above load current, and > 35% of peak magnetising inrush current for any connected
transformers as this element has no second harmonic blocking. Setting guidelines for
the I>3 element are shown in more detail in Table below.
2.12.5.2 Outputs
Man Close CB
Digital input (opto) 6 is assigned by default PSL to "Man Close CB"
The DDB Man Close CB if assigned to an opto input in PSL and when energized, will initiate
the internal SOTF logic enable (see Figure 36) without CB control.
If CB control is activated SOTF will be enable by internal detection (CB closing order
managed by CB control).
AR Reclaim
The DDB AR Reclaim if assigned to an opto input in PSL and when energized, will start the
internal logic TOR enable (see Figure 36).- (External AR logic applied).
CB aux A
CB aux B
CB aux C
The DDB CB Aux if assigned to an opto input in PSL and when energized, will be used for
Any pole dead & All pole dead internal detection.
2.12.6.2 Outputs
SOTF Enable
The DDB SOTF Enable if assigned in PSL, indicates that SOTF logic is enabled in the relay
– see logic description in Figure 38
TOR Enable
The DDB TOR Enable if assigned in PSL, indicates that TOR logic is activated in the relay -
see logic description in Figure 38
TOC Start A
The DDB TOC Start A if assigned in PSL, indicates a Tripping order on phase A issued by
the SOTF levels detectors - see Figure 38
TOC Start B
The DDB TOC Start B if assigned in PSL, indicates a Tripping order on phase B issued by
the SOTF levels detectors - see Figure 38
TOC Start C
The DDB TOC Start C if assigned in PSL, indicates a Tripping order on phase C issued by
the SOTF levels detectors - see Figure 38
SOTF/TOR Trip
The DDB SOTF/TOR Trip if assigned in PSL, indicates a 3poles trip by TOR or SOTF logic -
see Figure 38
2.13 Power swing blocking (PSB) (“Power swing” menu)
2.13.1 Description
Power swings are oscillations in power flow which can follow a power system disturbance.
They can be caused by sudden removal of faults, loss of synchronism across a power
system or changes in direction of power flow as a result of switching. Such disturbances can
cause generators on the system to accelerate or decelerate to adapt to new power flow
conditions, which in turn leads to power swinging. A power swing may cause the impedance
presented to a distance relay to move away from the normal load area and into one or more
of its tripping characteristics. In the case of a stable power swing it is important that the relay
should not trip. The relay should also not trip during loss of stability since there may be a
utility strategy for controlled system break up during such an event.
Since version C2.x, an out of step function has been integrated in the firmware.That logic
manage the start of the OOS by the monitoring of the sign of the biphase loops:
∆X
Zone C
X lim
Z3 ∆R
Zone A
Zone B +R
-R
Out Of Step +R Stable swing
-R lim R lim
R
Z4 -X lim
+R
P0885ENa
New settings (Delta I) have been created also in Power swing (stable swing) with Delta I as a
criteria for unblocking the Pswing logic in case of 3 phase fault (see 2.13.2 in the AP
chapter).
Phase selection has been improved with exaggerated Deltas current.
P44x/EN AP/F65 Application Notes
− New DDB:
Since version C5.X, when power swing blocking is detected, the resistive reaches of every
distance zone are no longer R3/R4. Instead they are kept the same as adjusted.
∆X
Zone 3
Power
swing
∆R ∆R bundary
Zone 4
∆X
P3068ENa
A fault on the system results in the measured impedance rapidly crossing the ∆R band, en
route to a tripping zone. Power swings follow a much slower impedance locus. A power
swing is detected where all three phase-phase measured impedances have remained within
the ∆R band for at least 5ms, and have taken longer than 5ms to reach the trip characteristic
(the trip characteristic boundary is defined by zones 3 and 4). PSB is indicated on reaching
zone 3 or zone 4. Typically, the ∆R and ∆X band settings are both set with: 0.032 x ∆f x
Rmin load.
• A biased residual current threshold is exceeded - this allows tripping for earth faults
occurring during a power swing. The bias is set as: Ir> (as a percentage of the
highest measured current on any phase), with the threshold always subject to a
minimum of 0.1 x In. Thus the residual current threshold is:
IN > 0.1 In + ( (IN> / 100) . (I maximum) ).
• A biased negative sequence current threshold is exceeded - this allows tripping for
phase-phase faults occurring during a power swing. The bias is set as: I2> (as a
percentage of the highest measured current on any phase), with the threshold always
subject to a minimum of 0.1 x In. Thus the negative sequence current threshold is:
I2 > 0.1 In + ( (I2> / 100) . (I maximum) ).
• A phase current threshold is exceeded - this allows tripping for three-phase faults
occurring during a power swing. The threshold is set as: Imax line> (in A).
That flat delta criterion (enabled by S1) will improve the detection of a 3 Phase fault during a
power swing (in case of faulty current lower than the Imax line threshold settable in S1) –
100ms are required for unblocking the logic.
With the exaggerated delta current (activated all the time in the internal logic) the phase
selection has been improved in case of unblocking logic applied with a fault detected during
a power swing. Regarding the presence of negative current or zero sequence current, the
exaggerated delta current detection are calculated on the phase-phase loop or phase-
ground loop.
Application Notes P44x/EN AP/F65
AnyPoleDead
Loop AN detected
≥1 &
S ≥2
in PS bundary ∆t
Q S
≥1 R Q PS loop AN
≥1
Tunb &
Loop BN detected ≥1
in PS bundary S
∆t
Q S
≥1 R Q PS loop BN
Tunb
≥1
Loop CN detected
in PS bundary S
Q
∆t
S ≥1 & S
≥1 R Q PS loop CN Q
Power Swing Detection
R
R
Tunb
Inrush AN
Inrush BN
Inrush CN
Fault clear ≥1
Healthy Network
PS disabled
Iphase>(Imax line>) S
Q
Unblocking Imax disabled R
∆ Tunblk
IN> threshold S
≥1 S
Q
R
Unblocking IN disabled Q
Power Swing unblocking
∆Tunblk ≥1 R
I2> threshold S
Q
R
Unblocking I2> disabled
P0488ENa
Z1x
& Z1x'
Unblock Z1
≥1
Z1'
Z1 &
Unblock Z3
≥1
Z3'
&
Z3
≥1
Zp_Fwd Zp'
& &
Unblock Zp
Zp
P0489ENa
Parameter Minimum Setting (to avoid Maximum Setting (to ensure Typical
maloperation for asymmetry unblocking for line faults) Setting
in power swing currents)
IN> > 30% < 100% 40%
I2> > 10% < 50% 30%
∆X
Zone C
X lim
Z3 ∆R
Zone A
Zone B +R
-R
Out Of Step +R Stable swing
-R lim R lim
R
Z4 -X lim
+R
P0885ENa
And a dedicated PSL must be created by the user if such logic has to be activated in the
relay.
DDB n°269: Power Swing is detected (3 single phase loop inside the quad & crossing the
∆R band in less than 5 ms in a 50 Hz network). Power swing is present either with out of
step cycle or stable swing cycle.
Outputs for Out of Step:
Out Of Step
DDB #350
Pow er Sw ing
DDB #269
Out Of Step Conf
DDB #352
DDB n°350: The first out of step cycle has been detected (Zlocus in/out with the opposite R
sign) & the « Out Of Step start » picks-up.
DDB n°352: The number of cycles set by S1 has been reached & Out Of Step is now
confirmed
Outputs for stable swing:
S. Sw ing
DDB #351
Pow er Sw ing
DDB #269
S. Sw ing Conf
DDB #353
DDB n°351: The first stable swing cycle has been detected (Zlocus in/out with the same R
sign) & the « Stable Swing start » picks-up.
DDB n°353: The number of cycles set by S1 has been reached & Stable Swing is now
confirmed.
Remark: Out-of-step tripping systems should be applied at proper network
locations to detect Out of step conditions and separate the network at
pre-selected locations only in order to create system islands with
balanced generation and load demand that will remain in
synchronism.
P44x/EN AP/F65 Application Notes
Setting range
Menu text Default setting Step size
Min Max
GROUP 1
BACK-UP I>
I>1 Function DT Disabled, DT, IEC S Inverse, IEC V
Inverse, IEC E Inverse, UK LT Inverse,
IEEE M Inverse, IEEE V Inverse, IEEE E
Inverse, US Inverse, US ST Inverse
I>1 Direction Directional Fwd Non-Directional, Directional Fwd,
Directional Rev
I>1 VTS Block Non-Directional Block, Non-Directional
I>1 Current Set 1.5 x In 0.08 x In 4.0 x In 0.01 x In
Since version C5.X 1.50 x In 0.08 x In 10.00 x In 0.01 x In
I>1 Time Delay 1s 0s 100 s 0.01 s
I>1 Time Delay VTS 0.2 s 0s 100 s 0.01 s
I>1 TMS 1 0.025 1.2 0.025
Since version C5.X 1 0.025 1.2 0.005
I>1 Time Dial 7 0.5 15 0.1
I>1 Reset Char DT DT or Inverse
I>1 tRESET 0 0 100 s 0.01 s
I>2 Function DT Disabled, DT, IEC S Inverse, IEC V
Inverse, IEC E Inverse, UK LT Inverse,
IEEE M Inverse, IEEE V Inverse, IEEE E
Inverse, US Inverse, US ST Inverse
Application Notes P44x/EN AP/F65
Setting range
Menu text Default setting Step size
Min Max
I>2 Direction Non Directional Non-Directional, Directional Fwd,
Directional Rev
I>2 VTS Block Non-Directional Block, Non-Directional
I>2 Current Set 2 x In 0.08 x In 4.0 x In 0.01 x In
Since version C5.X 2.00 x In 0.08 x In 10.00 x In 0.01 x In
I>2 Time Delay 2s 0s 100 s 0.01 s
I>2 Time Delay VTS 2s 0s 100 s 0.01 s
I>2 TMS 1 0.025 1.2 0.025
Since version C5.X 1 0.025 1.2 0.00 5
I>2 Time Dial 7 0.5 15 0.1
I>2 Reset Char DT DT or Inverse
I>2 tRESET 0 0s 100 s 0.01 s
I>3 Status Enabled Disabled or Enabled
I>3 Current Set 3 x In 0.08 x In 32 x In 0.01 x In
I>3 Time Delay 3s 0s 100 s 0.01 s
I>4 Status Disabled Disabled or Enabled
I>4 Current Set 4 x In 0.08 x In 32 x In 0.01 x In
I>4 Time Delay 4s 0s 100 s 0.01 s
Since version C5.X, I>4 may be used as a normal overcurrent stage if no stub bus condition
is activated through the binary input Stub Bus Enabled.
The inverse time delay characteristics listed above, comply with the following formula:
t=T×⎛ + L⎞
K
⎝(I/Is) α
–1 ⎠
Where:
t = operation time
K = constant
I = measured current
Is = current threshold setting
α = constant
L = ANSI/IEEE constant (zero for IEC curves)
T = Time multiplier Setting
P44x/EN AP/F65 Application Notes
Note that the IEEE and US curves are set differently to the IEC/UK curves, with regard to the
time setting. A time multiplier setting (TMS) is used to adjust the operating time of the IEC
curves, whereas a time dial setting is employed for the IEEE/US curves. Both the TMS and
Time Dial settings act as multipliers on the basic characteristics but the scaling of the time
dial is 10 times that of the TMS, as shown in the previous menu. The menu is arranged such
that if an IEC/UK curve is selected, the I> Time Dial cell is not visible and vice versa for the
TMS setting.
2.14.1 Application of Timer Hold Facility
The first two stages of overcurrent protection in the P441, P442 and P444 relays are
provided with a timer hold facility, which may either be set to zero or to a definite time value.
(Note that if an IEEE/US operate curve is selected, the reset characteristic may be set to
either definite or inverse time in cell I>1 Reset Char; otherwise this setting cell is not visible
in the menu). Setting of the timer to zero means that the overcurrent timer for that stage will
reset instantaneously once the current falls below 95% of the current setting. Setting of the
hold timer to a value other than zero, delays the resetting of the protection element timers for
this period. This may be useful in certain applications, for example when grading with
upstream electromechanical overcurrent relays which have inherent reset time delays.
Another possible situation where the timer hold facility may be used to reduce fault clearance
times is where intermittent faults may be experienced. An example of this may occur in a
plastic insulated cable. In this application it is possible that the fault energy melts and reseals
the cable insulation, thereby extinguishing the fault. This process repeats to give a
succession of fault current pulses, each of increasing duration with reducing intervals
between the pulses, until the fault becomes permanent. When the reset time of the
overcurrent relay is instantaneous the relay may not trip until the fault becomes permanent.
By using the timer hold facility the relay will integrate the fault current pulses, thereby
reducing fault clearance time.
Note that the timer hold facility should not be used where high speed autoreclose with short
dead times are set.
The timer hold facility can be found for the first and second overcurrent stages as settings
I>1 tRESET and I>2 tRESET. Note that these cells are not visible if an inverse time reset
characteristic has been selected, as the reset time is then determined by the programmed
time dial setting.
2.14.2 Directional Overcurrent Protection
If fault current can flow in both directions through a relay location, it is necessary to add
directional control to the overcurrent relays in order to obtain correct discrimination. Typical
systems which require such protection are parallel feeders and ring main systems. Where
I>1 or I>2 stages are directionalised, no characteristic angle needs to be set as the relay
uses the same directionalising technique as for the distance zones (fixed superimposed
power technique).
Application Notes P44x/EN AP/F65
Time
I>1
I>2
Z3,tZ3
Z4, tZ4
Zp,tZp
Z2,tZ2
Reverse Z1,tZ1 Forward
P3069ENa
I phase
I 1>
Trip
I 2>
No trip
t
tI1> tI2> P0483ENa
TABLE 9 - CURRENT AND TIME DELAY SETTINGS FOR THE I>3 ELEMENT
Key:
As the instantaneous highset trips three pole it is recommended that the I>3 Time
Delay is set ≥ tZ2 in single pole tripping schemes, to allow operation of the correct
single pole autoreclose cycle.
Application Notes P44x/EN AP/F65
V=0
I>0
Open isolator
Busbar 2
P0536ENa
Although this element would not need to discriminate with load current, it is still common
practice to apply a high current setting. This avoids maloperation for heavy through fault
currents, where mismatched CT saturation could present a spill current to the relay. The I>4
element would normally be set instantaneous, t>4 = 0s.
2.15 Negative sequence overcurrent protection (NPS) (“NEG sequence O/C” menu)
When applying traditional phase overcurrent protection, the overcurrent elements must be
set higher than maximum load current, thereby limiting the element’s sensitivity. Most
protection schemes also use an earth fault element operating from residual current, which
improves sensitivity for earth faults. However, certain faults may arise which can remain
undetected by such schemes.
Any unbalanced fault condition will produce negative sequence current of some magnitude.
Thus, a negative phase sequence overcurrent element can operate for both phase-to-phase
and phase to earth faults.
The following section describes how negative phase sequence overcurrent protection may
be applied in conjunction with standard overcurrent and earth fault protection in order to
alleviate some less common application difficulties.
• In certain applications, residual current may not be detected by an earth fault relay
due to the system configuration. For example, an earth fault relay applied on the delta
side of a delta-star transformer is unable to detect earth faults on the star side.
However, negative sequence current will be present on both sides of the transformer
for any fault condition, irrespective of the transformer configuration. Therefore, an
negative phase sequence overcurrent element may be employed to provide time-
delayed back-up protection for any uncleared asymmetrical faults downstream.
P44x/EN AP/F65 Application Notes
• Where rotating machines are protected by fuses, loss of a fuse produces a large
amount of negative sequence current. This is a dangerous condition for the machine
due to the heating effects of negative phase sequence current and hence an upstream
negative phase sequence overcurrent element may be applied to provide back-up
protection for dedicated motor protection relays.
• It may be required to simply alarm for the presence of negative phase sequence
currents on the system. Operators may then investigate the cause of the unbalance.
The negative phase sequence overcurrent element has a current pick up setting ‘I2> Current
Set’, and is time delayed in operation by the adjustable timer ‘I2> Time Delay’. The user
may choose to directionalise operation of the element, for either forward or reverse fault
protection for which a suitable relay characteristic angle may be set. Alternatively, the
element may be set as non-directional.
2.15.1 Setting Guidelines
The relay menu for the negative sequence overcurrent element (up to version C5.X) is
shown below:
Setting range
Menu text Default setting Step size
Min Max
GROUP 1
NEG SEQUENCE
O/C
I2> Status Enabled Disabled, Enabled
I2> Directional Non-Directional Non-Directional, Directional Fwd, Directional Rev
I2> VTS Non-Directionel Block, Non-Directional
I2> Current Set 0.2 x In 0.08 x In 4 x In 0.01 x In
I2> Time Delay 10 s 0s 100 s 0.01 s
I2> Char Angle –45° –95° +95° 1°
Since version C5.X, three additional negative sequence overcurrent stages have been
implemented. The second stage includes IDMT curves. The third and fourth stages may be
set to operate as definite time or instantaneous negative sequence overcurrent elements.
The corresponding relay menu for the negative sequence overcurrent element is shown
below:
Setting range
Menu text Default setting Step size
Min Max
GROUP 1
NEG SEQUENCE
O/C
I2>1 Function DT Disabled, DT, IEC S Inverse, IEC V Inverse, IEC
E Inverse, UK LT Inverse, IEEE M Inverse, IEEE
V Inverse, IEEE E Inverse, US Inverse, US ST
Inverse
I2>1 Directional Non-directional Non-directional, Directional FWD, Directional
REV
I2>1 VTS Block Block Block, Non-directional
I2>1 Current Set 0.20 x In 0.08 x In 4.00 x In 0.01 x In
I2>1 Time Delay 10.00 s 0s 100.0 s 0.01 s
I2>1 Time VTS 0.200 s 0s 100.0 s 0.01 s
Application Notes P44x/EN AP/F65
Setting range
Menu text Default setting Step size
Min Max
I2>1 TMS 1.000 0.025 1.200 0.005
I2>1 Time Dial 1.000 0.01 100.0 0.01
I2>1 Reset Char DT DT, Inverse
I2>1 tReset 0s 0s 100.0 s 0.01 s
I2>2 Function DT Disabled, DT, IEC S Inverse, IEC V Inverse, IEC
E Inverse, UK LT Inverse, IEEE M Inverse, IEEE
V Inverse, IEEE E Inverse, US Inverse, US ST
Inverse
I2>2 Directional Non Directional Non-Directional, Directional FWD, Directional
REV
I2>2 VTS Block Block Block, Non-directional
I2>2 Current Set 0.20 x In 0.08 x In 4.00 x In 0.01 x In
I2>2 Time Delay 10.00 s 0s 100.0 s 0.01 s
I2>2 Time VTS 0.200 s 0s 100.0 s 0.01 s
I2>2 TMS 1.000 0.025 1.200 0.005
I2>2 Time Dial 1.000 0.01 100.0 0.01
I2>2 Reset Char DT DT, Inverse
I2>2 tReset 0s 0s 100.0 s 0.01 s
I2>3 Status Disabled Disabled, Enabled
I2>3 Directional Non Directional Non-directional, Directional FWD, Directional
REV
I2>3 VTS Block Block Block, Non-directional
I2>3 Current Set 0.20 x In 0.08 x In 4.00 x In 0.01 x In
I2>3 Time Delay 10.00 s 0s 100.0 s 0.01 s
I2>3 Time VTS 0.200 s 0s 100.0 s 0.01 s
I2>4 Status Disabled Disabled, Enabled
I2>4 Directional Non Directional Non-directional, Directional FWD, Directional
REV
I2>4 VTS Block Block Block, Non-directional
I2>4 Current Set 0.20 x In 0.08 x In 4.00 x In 0.01 x In
I2>4 Time Delay 10.00 s 0s 100.0 s 0.01 s
I2>4 Time VTS 0.200 s 0s 100.0 s 0.01 s
I2> Char angle - 45° -95° 95° 1°
P44x/EN AP/F65 Application Notes
–E Z
I2F = Z Z + Z Zg 0+ Z Z
1 2 1 0 2 0
Where:
Eg = System Voltage
Z0 = Zero sequence impedance
Z1 = Positive sequence impedance
Z2 = Negative sequence impedance
Therefore:
I2F Z0
=
I1F Z0
+ Z2
P44x/EN AP/F65 Application Notes
It follows that, for an open circuit in a particular part of the system, I2/I1 can be determined
from the ratio of zero sequence to negative sequence impedance. It must be noted however,
that this ratio may vary depending upon the fault location. It is desirable therefore to apply as
sensitive a setting as possible. In practice, this minimum setting is governed by the levels of
standing negative phase sequence current present on the system. This can be determined
from a system study, or by making use of the relay measurement facilities at the
commissioning stage. If the latter method is adopted, it is important to take the
measurements during maximum system load conditions, to ensure that all single phase
loads are accounted for.
Note that a minimum value of 8% negative phase sequence current is required for
successful relay operation.
Since sensitive settings have been employed, it can be expected that the element will
operate for any unbalance condition occurring on the system (for example, during a single
pole autoreclose cycle). Hence, a long time delay is necessary to ensure co-ordination with
other protective devices. A 60 second time delay setting may be typical.
The following table shows the relay menu for the Broken Conductor protection, including the
available setting ranges and factory defaults:-
Setting range
Menu text Default setting Step size
Min Max
GROUP 1
BROKEN CONDUCTOR
Broken Conductor Enabled Enabled, Disabled
I2/I1 0.2 0.2 1 0.01
I2/I1 Time Delay 60 s 0s 100 s 1s
I2/I1 Trip Disabled* Enabled, Disabled
2.17 Directional and non-directional earth fault protection (“Earth fault O/C” menu)
The following elements of earth fault protection are available, as follows:
The following table shows the relay menu for the Earth Fault protection, including the
available setting ranges and factory defaults.
P44x/EN AP/F65 Application Notes
Since version C5.X, The second stage earth fault overcurrent element can be configured as
inverse time. The maximum setting range and the step size for IN> TMS for the two first
stages of IN> changed.
Setting range
Menu text Default setting Step size
Min Max
GROUP 1
EARTH FAULT O/C
IN>1 Function DT Disabled, DT, IEC S Inverse, IEC V Inverse,
IEC E Inverse, UK LT Inverse, IEEE M
Inverse, IEEE V Inverse, IEEE E Inverse, US
Inverse, US ST Inverse
IN>1 Directional Directional Fwd Non-Directional, Directional Fwd,
Directional Rev
IN>1 VTS Block Non directional Block, Non directional
IN>1 Current Set 0.2 x In 0.08 x In 4.0 x In 0.01 x In
Since version C5.X: 0.2 x In 0.08 x In 10.0 x In 0.01 x In
IN>1 Time Delay 1s 0s 200 s 0.01 s
IN>1 Time Delay VTS 0.2 s 0s 200 s 0.01 s
IN>1 TMS 1 0.025 1.2 0.025
Since version C5.X: 1 0.025 1.2 0.005
IN>1 Time Dial 7 0.5 15 0.1
IN>1 Reset Char DT DT, Inverse
IN>1 tRESET 0s 0s 100 s 0.01s
IN>2 Status Enabled Disabled, Enabled
(up to version C5.X)
Application Notes P44x/EN AP/F65
Setting range
Menu text Default setting Step size
Min Max
IN>1 Function DT Disabled, DT, IEC S Inverse, IEC V Inverse,
since version C5.X IEC E Inverse, UK LT Inverse, IEEE M
Inverse, IEEE V Inverse, IEEE E Inverse, US
Inverse, US ST Inverse
IN>2 Directional Non Directional Non-Directional, Directional Fwd,
Directional Rev
IN>2 VTS Block Non directional Block, Non directional
IN>2 Current Set 0.3 x In 0.08 x In 32 x In 0.01 x In
Since version C5.X
1 0.025 1.2 0.005
IN>2 Time Delay 2s 0s 200 s 0.01 s
IN>2 Time Delay VTS 2s 0s 200 s 0.01 s
IN>2TMS 1 0.025 1.2 0.005
since version C5.X
IN>3 Status Enabled Disabled, Enabled
IN>3 Directional Non Directional Non-Directional, Directional Fwd,
Directional Rev
IN>3 VTS Block Non directional Block, Non directional
IN>3 Current Set 0.3 x In 0.08 x In 32 x In 0.01 x In
Since version C2.X
Note that the elements are set in terms of residual current, which is three times the
magnitude of zero sequence current (Ires = 3I0). The IDMT time delay characteristics
available for the IN>1 element, and the grading principles used will be as per the phase fault
overcurrent elements.
To maintain protection during periods of VTS detected failure, the relay allows an IN> Time
Delay VTS to be applied to the IN>1 and IN>2 elements. On VTS pickup, both elements are
forced to have non-directional operation, and are subject to their revised definite time delay.
P44x/EN AP/F65 Application Notes
V2
I2
Negative sequence
Polarisation Directional SBEF Fwd
VN Residual zero
Calculation SBEF Rev
sequence Polarisation
IN
IN> Pick-up
IN> Pick-up
CTS Blocking
&
0
P0490ENa
CTS Block
SBEF Start
SBEF
Overcurrent
SBEF
IDMT/DT
Trip SBEF Trip
SBEF Timer Block
P0484ENa
CTS Block
SBEF
Overcurrent SBEF Start
Slow VTS
Block Directional
Check
Vx > Vs
Ix > Is
IDMT/DT
SBEF Trip
SBEF Timer Block
P0533ENa
When a separate channel for DEF is used, the DEF scheme is independently selectable.
When a common signalling channel is employed, the distance and DEF must share a
common scheme. In this case a permissive overreach or blocking distance scheme must be
used. The aided tripping schemes can perform single pole tripping.
Since version C2.x, some improvements have been integrated in DEF.
New settings are:
Application Notes P44x/EN AP/F65
The relay has aided scheme settings as shown in the following table:
Setting range
Menu text Default setting Step size
Min Max
GROUP 1
AIDED D.E.F.
Aided DEF Status Enabled Disabled, Enabled
Polarisation Zero Sequence Zero Sequence, Negative Sequence
V> Voltage Set 1V 0.5 V 20 V 0.01 V
IN Forward 0.1 x In 0.05 x In 4 x In 0.01 x In
Time Delay 0s 0s 10 s 0.1 s
Scheme Logic Shared Shared, Blocking, Permissive
Tripping Three Phase Three Phase, Single Phase
Since version C2.X:
Tp (if blocking scheme not 2 ms 0 ms 1000 ms 2 ms
shared)
IN Rev Factor 0,6 0 1 0.1
V2
Negative
I2 Polarisation Directionnal DEF Fwd
VN Residual
Calculation DEF Rev
Polarisation
IN
Negative
V2 Polarisation
V> DEF V>
Residual
VN Polarisation
INRev>
IN IN>
INRev = 0.6*INFwd
INFwd>
P0545ENa
FWD FWD
R
-14˚
REV REV
P0491ENa
Application Notes P44x/EN AP/F65
DEF Fwd
IN Fwd>
DEF V>
0
Any Pole Dead
150 ms
T
& DEF Trip
IN Rev>
0
t_delay
UNB CR DEF
P0546ENa
DEF Fwd
IN Fwd>
DEF V>
t_delay
UNB CR DEF
P0547ENa
P3070ENa
A voir
DEF Fwd
IN Fwd>
Tp
DEF V> 0
Reversal Guard
IN Rev>
T
& & DEF Trip
0
0 t_delay
Any Pole Dead
150 ms
UNB CR DEF
DEF Rev
& DEF CS
IN Rev>
DEF V>
P0548ENa
DEF Fwd
IN Fwd>
DEF V>
Reversal Guard 0
IN Rev>
T
& Tp
0
DEF Rev
IN Rev>
& DEF CS
DEF V>
P0549ENa
P0550ENa
IN>1 t t IN>1
0 0
Trip Trip
IN>2 t
0 >1 >1 0
t IN>2
IN>1 t t IN>1
0 0
Trip Trip
IN>2 t
0 >1 >1 0
t IN>2
P0551ENb
Thermal overload protection can be used to prevent electrical plant from operating at
temperatures in excess of the designed maximum withstand. Prolonged overloading causes
excessive heating, which may result in premature ageing of the insulation, or in extreme
cases, insulation failure.
The relay incorporates a current based thermal replica, using load current to model heating
and cooling of the protected plant. The element can be set with both alarm and trip stages.
The heat generated within an item of plant, such as a cable or a transformer, is the resistive
loss (Ι2R x t). Thus, heating is directly proportional to current squared. The thermal time
characteristic used in the relay is therefore based on current squared, integrated over time.
The relay automatically uses the largest phase current for input to the thermal model.
Equipment is designed to operate continuously at a temperature corresponding to its full load
rating, where heat generated is balanced with heat dissipated by radiation etc. Over
temperature conditions therefore occur when currents in excess of rating are allowed to flow
for a period of time. It can be shown that temperatures during heating follow exponential time
constants and a similar exponential decrease of temperature occurs during cooling.
2.19.1 Single time constant characteristic
This characteristic is the recommended typical setting for line and cable protection.
The thermal time characteristic is given by:
For severe overloading, heat accumulates in the transformer windings, with little opportunity
for dissipation into the surrounding insulating oil. Thus, at high current, the replica curve is
dominated by the short time constant for the windings. This provides protection against hot
spots developing within the transformer windings.
Overall, the dual time constant characteristic provided within the relay serves to protect the
winding insulation from ageing, and to minimise gas production by overheated oil. Note,
however, that the thermal model does not compensate for the effects of ambient temperature
change.
The following table shows the menu settings for the thermal protection element:
Setting range
Menu text Default setting Step size
Min Max
THERMAL OVERLOAD
GROUP 1
Thermal Char Single Disabled, Single, Dual
Thermal Trip 1Ιn 0.08Ιn 3.2Ιn 0.01Ιn
Thermal Alarm 70% 50% 100% 1%
Time Constant 1 10 minutes 1 minutes 200 1 minutes
minutes
Time Constant 2 5 minutes 1 minutes 200 1 minutes
minutes
An alarm can be raised on reaching a thermal state corresponding to a percentage of the trip
threshold. A typical setting might be ‘Thermal Alarm’ = 70% of thermal capacity.
Note that the thermal time constants given in the above tables are typical only. Reference
should always be made to the plant manufacturer for accurate information.
2.20 Residual overvoltage (neutral displacement) protection (“Residual overvoltage”
menu)
Software version C5.x model 36, hardware J
On a healthy three phase power system, the summation of all three phase to earth voltages
is normally zero, as it is the vector addition of three balanced vectors at 120° to one another.
However, when an earth (ground) fault occurs on the primary system this balance is upset
and a ‘residual’ voltage is produced.
NOTE: This condition causes a rise in the neutral voltage with respect to earth
which is commonly referred to as “neutral voltage displacement” or
NVD.
The following figures show the residual voltages that are produced during earth fault
conditions occurring on a solid and impedance earthed power system respectively.
P44x/EN AP/F65 Application Notes
S R F
E
ZS ZL
A-G
VAG
VAG
VAG VRES
VAG VRES
V BG V BG V BG
E S R F
ZS ZL
N
ZE A-G
VAG
S VAG
G,F R G,F
G,F
VCG VCG
VCG
VBG VBG VBG
Z S0 + 3Z E
VRES = x3E
2Z S1 + Z S0 + 2Z L1 + Z L0 + 3Z E
P0118ENb
Setting range
Menu text Default setting Step size
Min Max
RESIDUAL OVER-
VOLTAGE GROUP 1
VN>1 Function DT Disabled, DT, IDMT
VN>1 Voltage Set 5V 1V 80 V 1V
VN>1 Time Delay 5.00 s 0s 100.0 s 0.01 s
VN>1 TMS 1.0 0.5 100.0 0.5
VN>1 tReset 0s 0s 100.0 s 0.5 s
VN>2 Status Disabled Enabled, Disabled
VN>2 Voltage Set 10 V 1V 80 V 1V
VN>2 Time Delay 10.00 s 0s 100.0 s 0.01 s
2.21 Maximum of Residual Power Protection – Zero Sequence Power Protection (“Zero Seq
Power” menu) (since version B1.x)
2.21.1 Function description
The aim of this protection is to provide the system with selective and autonomous protection
against resistive phase to ground faults. High resistive faults such as vegetation fires cannot
be detected by distance protection.
When a phase to ground fault occurs, the fault can be considered as a zero-sequence power
generator. Zero-sequence voltage is at maximum value at the fault point. Zero-sequence
power is, therefore, also at maximum value at the same point. Supposing that zero-
sequence current is constant, zero-sequence power will decrease along the lines until null
value at the source’s neutral points (see below).
PA PB
Z os1 x . Zol (1-x).Zol Z os2
P3100XXa
Po Vo
1 1
0,5 0,5
0 0
PA Fault PB
P3101ENa
Selective fault clearance of the protection for forward faults is provided by the power
measurement combined with a time-delay inversely proportional to the measured power.
This protection function does not issue any trip command for reverse faults.
In compliance with sign conventions (the zero-sequence power flows from the fault towards
the sources) and with a mean characteristic angle of the zero-sequence source impedances
of the equal to 75°, the measured power is determined by the following formula:
Déclenchement
Triphasé
Ir(t) Ir(t) > Ir & Zsp Trip
Ta 1 Zsp Start
P0886ENa
3-pole trip is sent out when the residual power threshold “Residual Power" is overshot, after
a time-delay "Basis Time Delay" and a IDMT time-delay adjusted by the “K” time delay
factor.
The basis time-delay is set at a value greater than the 2nd stage time of the distance
protection of the concerned feeder if the 3-pole trip is active, or at a value greater than the
single-phase cycle time if single-pole autorecloser shots are active.
The IDMT time-delay is determined by the following formula:
T(s) = K x (Sref/Sr)
P44x/EN AP/F65 Application Notes
Setting range
Menu text Default setting Step size
Min Max
Group1
ZERO-SEQ. POWER
Zero Seq. Power Status Activated Activated / Disabled N/A
K Time Delay Factor 0 0 2 0.2
Basis Time Delay 1s 0s 10 s 0.01s
Residual Current 0.1 x In 0.05 x In 1 x In 0.01 x In
PO threshold 510 mVA 300 mVA 6.0 VA 30.0 mVA
Application Notes P44x/EN AP/F65
2.21.2 Settings & DDB cells assigned to zero sequence power (ZSP) function
The ZSP TIMER BLOCK cell if assigned to an opto input in a dedicated PSL , Zero
Sequence Power function will start, but will not perform a trip command - the associated
timer will be blocked.
DDB cell OUTPUT associated:
The ZSP START cell at 1 indicates that the Zero Sequence Power function has started - in
the same time, it indicates that the timers associated have started and are running (fixed one
first and then IDMT timer).
P44x/EN AP/F65 Application Notes
The ZSP TRIP cell at 1 indicates that the Zero Sequence Power function has performed a
trip command (after the start and when associated timers are issued)
2.22 Undervoltage protection (“Volt protection” menu)
This protection menu contains undervoltage and overvoltage protection.
2.22.1 Undervoltage protection
Undervoltage conditions may occur on a power system for a variety of reasons, some of
which are outlined below:
• Faults occurring on the power system result in a reduction in voltage of the phases
involved in the fault. The proportion by which the voltage decreases is directly
dependent upon the type of fault, method of system earthing and its location with
respect to the relaying point. Consequently, co-ordination with other voltage and
current-based protection devices is essential in order to achieve correct discrimination.
This function will be blocked with VTS logic or could be disabled if CB open.
Both the under and overvoltage protection functions can be found in the relay menu “Volt
Protection”. The following table shows the undervoltage section of this menu along with the
available setting ranges and factory defaults.
Setting range
Menu text Default setting Step size
Min Max
GROUP 1
VOLT Protection
V< & V> MODE 0 V<1 Trip, V<2 Trip, V>1 Trip, V>2 Trip
UNDER VOLTAGE
V< Measur't Mode Phase-Neutral Phase-phase, Phase-neutral
V<1 Function DT Disabled, DT, IDMT
V<1 Voltage Set 50 V 10 V 120 V 1V
V<1 Time Delay 10 s 0s 100 s 0.01 s
V<1 TMS 1 0.5 100 0.5
V<2 Status Disabled Disabled, Enabled
V<2 Voltage Set 38 V 10 V 120 V 1V
V<2 Time Delay 5s 0s 100 s 0.01 s
As can be seen from the menu, the undervoltage protection included within the P441, P442
and P444 relays consists of two independent stages. These are configurable as either phase
to phase or phase to neutral measuring within the V< Measur’t Mode cell.
Stage 1 may be selected as either IDMT, DT or disabled, within the V<1 Function cell.
Stage 2 is DT only and is enabled/disabled in the V<2 Status cell.
Application Notes P44x/EN AP/F65
Two stages are included to provide both alarm and trip stages, where required.
Alternatively, different time settings may be required depending upon the severity of the
voltage dip.
The IDMT characteristic available on the first stage is defined by the following formula:
K
t=
1–M
Where:
K = Time Multiplier Setting (TMS)
T = Operating Time in Seconds
M = Measured Voltage / relay Setting Voltage (V<)
2.22.2 Setting Guidelines
In the majority of applications, undervoltage protection is not required to operate during
system earth fault conditions. If this is the case, the element should be selected in the menu
to operate from a phase to phase voltage measurement, as this quantity is less affected by
single phase voltage depressions due to earth faults.
The voltage threshold setting for the undervoltage protection should be set at some value
below the voltage excursions which may be expected under normal system operating
conditions. This threshold is dependent upon the system in question but typical healthy
system voltage excursions may be in the order of -10% of nominal value.
Similar comments apply with regard to a time setting for this element, i.e. the required time
delay is dependent upon the time for which the system is able to withstand a depressed
voltage.
2.23 Overvoltage protection
Undervoltage conditions may occur on a power system for a variety of reasons, some of
which are outlined below:-
• Under conditions of load rejection, the supply voltage will increase in magnitude. This
situation would normally be rectified by voltage regulating equipment such as AVRs or
on-load tap changers. However, failure of this equipment to bring the system voltage
back within prescribed limits leaves the system with an overvoltage condition which
must be cleared in order to preserve the life of the system insulation. Hence,
overvoltage protection which is suitably time delayed to allow for normal regulator
action, may be applied.
• During earth fault conditions on a power system there may be an increase in the
healthy phase voltages. Ideally, the system should be designed to withstand such
overvoltages for a defined period of time.
As previously stated, both the over and undervoltage protection functions can be found in the
relay menu “Volt Protection”. The following table shows the overvoltage section of this menu
along with the available setting ranges and factory defaults.
P44x/EN AP/F65 Application Notes
Setting range
Menu text Default setting Step size
Min Max
Group 1
Volt protection
V> Measur't Mode Phase-Neutral Phase-phase, Phase-neutral
V>1 Function DT Disabled, DT, IDMT
V>1 Voltage Set 75,V 60,V 185,V 1,V
V>1 Time Delay 10,s 0,s 100,s 0.01,s
V>1 TMS 1 0.5 100 0.5
V>2 Status Enabled Disabled, Enabled
V>2 Voltage Set 90,V 60,V 185,V 1,V
V>2 Time Delay 0.5,s 0,s 100,s 0.01,s
As can be seen, the setting cells for the overvoltage protection are identical to those
previously described for the undervoltage protection. The IDMT characteristic available on
the first stage is defined by the following formula:
t = K / (M - 1)
Where:
K = Time Multiplier Setting
T = Operating Time in Seconds
M = Measured Voltage / relay Setting Voltage (V>)
2.23.1 Setting Guidelines
The inclusion of the two stages and their respective operating characteristics allows for a
number of possible applications;
• Use of the IDMT characteristic gives the option of a longer time delay if the
overvoltage condition is only slight but results in a fast trip for a severe overvoltage. As
the voltage settings for both of the stages are independent, the second stage could
then be set lower than the first to provide a time delayed alarm stage if required.
• Alternatively, if preferred, both stages could be set to definite time and configured to
provide the required alarm and trip stages.
CBF operation can be used to backtrip upstream circuit breakers to ensure that the fault is
isolated correctly. CBF operation can also reset all start output contacts, ensuring that any
blocks asserted on upstream protection are removed.
2.24.1 Breaker Failure Protection Configurations
The phase selection must be performed by creating dedicated PSL.
The circuit breaker failure protection incorporates two timers, ‘CB Fail 1 Timer’ and ‘CB Fail 2
Timer’, allowing configuration for the following scenarios:
Enable tBF1
CBF1_Status
& 0
tBF1 Trip 3Ph
Pulsed output latched in UI
>1
tBF1
Breaker
Any Internal Trip A
0
& 0
>1 Fail
1
Alarm
2
3 4 tBF2 - tBF1
S
Ia<
0
Q
tBF1 & 0
tBF2 Trip 3Ph
&
1
R
2 0
4
>1
3
0
1
2 S CBF2_Status Enable
Q
>1
3 4
Any Internal Trip A
& 0 R
Non Current Prot Trip 1
2
3 4
CBA_A
Setting:
Non I Trip
Reset:
0) I< Only
1) /Trip & I<
2) CB & I<
3) Disable
4) /Trip or I<
External Trip A 1
2
S
3 4 Q
R
Ia< 1
0
>1
&
2
3 4
Setting:
Ext. Trip
>1 Reset:
0) I< Only
1) /Trip & I<
2) CB & I<
CBA_A
& 3) Disable
4) /Trip or I<
Ib<
PHASE B
Non Current Prot Trip Same logic as A
CBA_B
phase
WI Trip A
External Trip B
WI Trip B
WI Trip C
V<2 Trip
Any Internal Trip C
V>1 Trip
Ic< PHASE C
V>2 Trip
Non Current Prot Trip Same logic as A
phase
CBA_C
• Simple CBF, where only ‘CB Fail 1 Timer’ is enabled. For any protection trip, the ‘CB
Fail 1 Timer’ is started, and normally reset when the circuit breaker opens to isolate
the fault. If breaker opening is not detected, ‘CB Fail 1 Timer’ times out and closes an
output contact assigned to breaker fail (using the programmable scheme logic). This
contact is used to backtrip upstream switchgear, generally tripping all infeeds
connected to the same busbar section.
• A re-tripping scheme, plus delayed back-tripping. Here, ‘CB Fail 1 Timer’ is used to
route a trip to a second trip circuit of the same circuit breaker. This requires
duplicated circuit breaker trip coils, and is known as re-tripping. Should re-tripping fail
to open the circuit breaker, a back-trip may be issued following an additional time
delay. The back-trip uses ‘CB Fail 2 Timer’, which is also started at the instant of the
initial protection element trip.
CBF elements ‘CB Fail 1 Timer’ and ‘CB Fail 2 Timer’ can be configured to operate for trips
triggered by protection elements within the relay or via an external protection trip. The latter
is achieved by allocating one of the relay opto-isolated inputs to ‘External Trip’ using the
programmable scheme logic.
2.24.2 Reset Mechanisms for Breaker Fail Timers
It is common practice to use low set undercurrent elements in protection relays to indicate
that circuit breaker poles have interrupted the fault or load current, as required. This covers
the following situations:
• Where circuit breaker auxiliary contacts are defective, or cannot be relied upon to
definitely indicate that the breaker has tripped.
• Where a circuit breaker has started to open but has become jammed. This may result
in continued arcing at the primary contacts, with an additional arcing resistance in the
fault current path. Should this resistance severely limit fault current, the initiating
protection element may reset. Thus, reset of the element may not give a reliable
indication that the circuit breaker has opened fully.
For any protection function requiring current to operate, the relay uses operation of
undercurrent elements (I<) to detect that the necessary circuit breaker poles have tripped
and reset the CB fail timers. However, the undercurrent elements may not be reliable
methods of resetting circuit breaker fail in all applications. For example:
+ + +
I< T
T
- - -
- - -
P0553ENa
2.24.2.1 Inputs
2.24.2.2 Outputs
Resetting of the CBF is possible from a breaker open indication (from the relay’s pole dead
logic) or from a protection reset. In these cases resetting is only allowed provided the
undercurrent elements have also reset. The resetting options are summarised in the
following table.
Application Notes P44x/EN AP/F65
Setting range
Menu text Default setting Step size
Min Max
CB FAIL & I<
Group 1
BREAKER FAIL
CB Fail 1 Status Enabled Enabled, Disabled
CB Fail 1 Timer 0.2 s 0s 10 s 0.01 s
CB Fail 2 Status Disabled Enabled, Disabled
CB Fail 2 Timer 0.4 s 0s 10 s 0.01 s
CBF Non I Reset CB Open & I< I< Only, CB Open & I<, Prot Reset & I<,
Prot Reset or I<, Disable
CBF Ext Reset CB Open & I< I< Only, CB Open & I<, Prot Reset & I<,
Prot Reset or I<, Disable
UNDER CURRENT
I< Current Set 0.05 x In 0.05 x In 3.2 x In 0.01 x In
The ‘CBF Blocks I>‘ and ‘CBF Blocks IN>‘ settings are used to remove starts issued from the
overcurrent and earth elements respectively following a breaker fail time out. The start is
removed when the cell is set to Enabled.
P44x/EN AP/F65 Application Notes
CB Fail Reset Mechanism tBF time delay Typical delay for 2½ cycle
circuit breaker
Initiating element reset CB interrupting time + element 50 + 50 + 10 + 50
reset time (max.) + error in tBF = 160 ms
timer + safety margin
CB open CB auxiliary contacts 50 + 10 + 50
opening/closing time (max.) + = 110 ms
error in tBF timer + safety
margin
Undercurrent elements CB interrupting time + 50 + 25 + 50
undercurrent element operating = 125 ms
time (max.) + safety margin
Note that all CB Fail resetting involves the operation of the undercurrent elements. Where
element reset or CB open resetting is used the undercurrent time setting should still be used
if this proves to be the worst case.
The examples above consider direct tripping of a 2½ cycle circuit breaker. Note that where
auxiliary tripping relays are used, an additional 10-15 ms must be added to allow for trip
relay operation.
2.24.3.2 Breaker Fail Undercurrent Settings
The phase undercurrent settings (I<) must be set less than load current, to ensure that I<
operation indicates that the circuit breaker pole is open. A typical setting for overhead line or
cable circuits is 20% In, with 5% In common for generator circuit breaker CBF.
Application Notes P44x/EN AP/F65
80 Km
100 Km 60 Km
System Data
Green Valley - Blue River transmission line 21 21
System voltage 230kv
System grounding solid
CT ratio 1200/5
VT ratio 230000/115
Line length 100km
Line impedance
Z1 = 0.089 + J0.476 OHM/km
Z0 = 0.426 + J1.576 OHM/km
Faults levels
Green Valley substation busbars maximum 5000MVA, minimum 2000MVA
Blue River substation busbars maximum 3000MVA, minimum 1000MVA P3074ENa
Therefore set Line Impedance and Line Angle: = 5.81 / 80° Ω secondary.
P44x/EN AP/F65 Application Notes
= 1.15 / 72.9°
1.15 / 72.9°
kZ0 = = 0.79 / –6.5°
3 × 0.484 / 79.4°
Therefore, select:
kZ0 Res. Comp = 0.79 (Set for kZ1, kZ2, kZp, kZ4).
kZ0 Angle = –6.5° (Set for kZ1, kZ2, kZp, kZ4).
3.1.11 Resistive Reach Calculations
All distance elements must avoid the heaviest system loading. Taking the 5A CT secondary
rating as a guide to the maximum load current, the minimum load impedance presented to
the relay would be:
From Table 1 (see §2.4.4), taking a required primary resistive coverage of 14.5Ω for phase
faults, and assuming a typical earth fault coverage of 40Ω, the minimum secondary reaches
become:
Typically, the ∆R and ∆X band settings are both set between 10 - 30% of R3Ph. This gives
a secondary impedance between 0.6 and 1.8Ω. For convenience, 1.0Ω could be set.
The width of the power swing band is calculated as follows:
∆R = 0.032 × ∆f × RLOAD
To ensure that a power swing frequency of 5 Hz is detected, the following is obtained:
∆R = 0.16 × RLOAD
Where:
Case 2:
A Ia Ib B
Zat Zbt
Ic
Zct
C
Va = Ia Zat + Ib Zbt Impedance seen by relay A = Va
Ia
Ib = Ia + Ic Za = Zat + Zbt + Ic Zbt
Ia
Va = Ia Zat + Ia Zbt + Ic Zbt
P3075ENa
(i) A B
Z1A Z1C
= area where no zone 1 overlap exists
C
(ii) A B
Z1A Z1B
C
No infeed
(iii) A B
21
P440
21 21
Feeder 1 Feeder 2
P3077ENa
• Default PSL: To enable the setting group via binary inpputs, the opto input 1 and 2
must be removed from the PSL.
(If assigned in the PSL, instead of Dist DEF Carrier Receive Logic Start, a setting
group change will occur)
Note that each setting group has its own dedicated PSL, which should be configured and
sent to the relay independently)
Application Notes P44x/EN AP/F65
• Or using the relay operator interface / remote communications. Should the user issue
a menu command to change group, the relay will transfer to that settings group, and
then ignore future changes in state of the bit 0 and bit 1 opto-inputs. Thus, the user is
given greater priority than automatic setting group selection.
Binary State of SG Change bit 1 Binary State of SG Change bit 0 Setting Group
Activated
Opto 2 Opto 1
0 0 1
0 1 2
1 0 3
1 1 4
Local viewing on the LCD is achieved in the menu column entitled ‘VIEW RECORDS’. This
column allows viewing of event, fault and maintenance records and is shown below:-
VIEW RECORDS
LCD Reference Description
Select Event Setting range from 0 to 249.
This selects the required event record from the possible 250 that
may be stored. A value of 0 corresponds to the latest event and so
on.
Time & Date Time & Date Stamp for the event given by the internal Real Time
Clock
Event Text Up to 32 Character description of the Event (refer to following
sections)
Event Value Up to 32 Bit Binary Flag or integer representative of the Event
(refer to following sections)
Select Fault Setting range from 0 to 4.
This selects the required fault record from the possible 5 that may
be stored. A value of 0 corresponds to the latest fault and so on.
The following cells show all the fault flags, protection starts,
protection trips, fault location, measurements etc. associated with
the fault, i.e. the complete fault record.
Select Report Setting range from 0 to 4.
This selects the required maintenance report from the possible 5
that may be stored. A value of 0 corresponds to the latest report
and so on.
Report Text Up to 32 Character description of the occurrence (refer to following
sections)
Report Type These cells are numbers representative of the occurrence. They
form a specific error code which should be quoted in any related
correspondence to AREVA T&D P&C Ltd.
Report Data
Reset Indication Either Yes or No. This serves to reset the trip LED indications
provided that the relevant protection element has reset.
For extraction from a remote source via communications, refer to Chapter P44x/EN CM,
(Commissioning) where the procedure is fully explained.
Note that a full list of all the event types and the meaning of their values is given in chapter
P44x/EN GC (Configurations Mapping).
P44x/EN AP/F65 Application Notes
Types of Event
An event may be a change of state of a control input or output relay, an alarm condition,
setting change etc. The following sections show the various items that constitute an event:-
The Event Value is an 8 or 16 bit word showing the status of the opto inputs, where the least
significant bit (extreme right) corresponds to opto input 1 etc. The same information is
present if the event is extracted and viewed via PC.
4.1.2 Change of state of one or more output relay contacts.
If one or more of the output relay contacts has changed state since the last time that the
protection algorithm ran, then the new status is logged as an event. When this event is
selected to be viewed on the LCD, three applicable cells will become visible as shown below;
The Event Value is a 7, 14 or 21 bit word showing the status of the output contacts, where
the least significant bit (extreme right) corresponds to output contact 1 etc. The same
information is present if the event is extracted and viewed via PC.
Application Notes P44x/EN AP/F65
The previous table shows the abbreviated description that is given to the various alarm
conditions and also a corresponding value between 0 and 31. This value is appended to
each alarm event in a similar way as for the input and output events previously described. It
is used by the event extraction software, such as MiCOM S1, to identify the alarm and is
therefore invisible if the event is viewed on the LCD. Either ON or OFF is shown after the
description to signify whether the particular condition has become operated or has reset.
4.1.4 Protection Element Starts and Trips
Any operation of protection elements, (either a start or a trip condition), will be logged as an
event record, consisting of a text string indicating the operated element and an event value.
Again, this value is intended for use by the event extraction software, such as MiCOM S1,
rather than for the user, and is therefore invisible when the event is viewed on the LCD.
4.1.5 General Events
A number of events come under the heading of ‘General Events’ - an example is shown
below:-
Setting range
Menu text Default setting Step size
Min Max
CB CONDITION
CB Operations 0 0 10000 1
{3 pole tripping}
CB A Operations 0 0 10000 1
{1 & 3 pole tripping}
CB B Operations 0 0 10000 1
{1 & 3 pole tripping}
CB C Operations 0 0 10000 1
{1 & 3 pole tripping}
Total IA Broken 0 0 25000In^ 1
Total IB Broken 0 0 25000In^ 1
Total IC Broken 0 0 25000In^ 1In^
CB Operate Time 0 0 0.5s 0.001
Reset All Values No Yes, No
The above counters may be reset to zero, for example, following a maintenance inspection
and overhaul.
The following table, detailing the options available for the CB condition monitoring, is taken
from the relay menu. It includes the setup of the current broken facility and those features
which can be set to raise an alarm or CB lockout.
Application Notes P44x/EN AP/F65
Setting range
Menu text Default setting Step size
Min Max
CB MONITOR SETUP Default Min Max Step
Broken I^ 2 1 2 0.1
I^ Maintenance Alarm Disabled Alarm Disabled, Alarm Enabled
I^ Maintenance 1000In^ 1In^ 25000In^ 1In^
I^ Lockout Alarm Disabled Alarm Disabled, Alarm Enabled
I^ Lockout 2000In^ 1In^ 25000In^ 1In^
N° CB Ops Maint Alarm Disabled Alarm Disabled, Alarm Enabled
N° CB Ops Maint 10 1 10000 1
N° CB Ops Lock Alarm Disabled Alarm Disabled, Alarm Enabled
N° CB Ops Lock 20 1 10000 1
CB Time Maint Alarm Disabled Alarm Disabled, Alarm Enabled
CB Time Maint 0.1s 0.005s 0.5s 0.001s
CB Time Lockout Alarm Disabled Alarm Disabled, Alarm Enabled
CB Time Lockout 0.2s 0.005s 0.5s 0.001s
Fault Freq Lock Alarm Disabled Alarm Disabled, Alarm Enabled
Fault Freq Count 10 0 9999 1
Fault Freq Time 3600s 0 9999s 1s
The circuit breaker condition monitoring counters will be updated every time the relay issues
a trip command.One counter is incremented by phase,.the highest counter value is
compared to two thresholds values settable (value n):
Note that when in Commissioning test mode the CB condition monitoring counters will not be
updated.
4.2.2 Setting guidelines
For OCB’s, the dielectric withstand of the oil generally decreases as a function of Σ I2t. This
is where ‘I’ is the fault current broken, and ‘t’ is the arcing time within the interrupter tank (not
the interrupting time). As the arcing time cannot be determined accurately, the relay would
normally be set to monitor the sum of the broken current squared, by setting ‘Broken I^’ = 2.
For other types of circuit breaker, especially those operating on higher voltage systems,
practical evidence suggests that the value of ‘Broken I^’ = 2 may be inappropriate. In such
applications ‘Broken I^’ may be set lower, typically 1.4 or 1.5. An alarm in this instance may
be indicative of the need for gas/vacuum interrupter HV pressure testing, for example.
The setting range for ‘Broken I^’ is variable between 1.0 and 2.0 in 0.1 steps. It is
imperative that any maintenance programme must be fully compliant with the switchgear
manufacturer’s instructions.
4.2.3 Setting the Number of Operations Thresholds
Every operation of a circuit breaker results in some degree of wear for its components.
Thus, routine maintenance, such as oiling of mechanisms, may be based upon the number
of operations. Suitable setting of the maintenance threshold will allow an alarm to be raised,
indicating when preventative maintenance is due. Should maintenance not be carried out,
the relay can be set to lockout the autoreclose function on reaching a second operations
threshold. This prevents further reclosure when the circuit breaker has not been maintained
to the standard demanded by the switchgear manufacturer’s maintenance instructions.
Application Notes P44x/EN AP/F65
Certain circuit breakers, such as oil circuit breakers (OCB’s) can only perform a certain
number of fault interruptions before requiring maintenance attention. This is because each
fault interruption causes carbonising of the oil, degrading its dielectric properties. The
maintenance alarm threshold (N° CB Ops Maint) may be set to indicate the requirement for
oil sampling for dielectric testing, or for more comprehensive maintenance. Again, the
lockout threshold (N° CB Ops Lock) may be set to disable autoreclosure when repeated
further fault interruptions could not be guaranteed. This minimises the risk of oil fires or
explosion.
4.2.4 Setting the Operating Time Thresholds
Slow CB operation is also indicative of the need for mechanism maintenance. Therefore,
alarm and lockout thresholds (CB Time Maint / CB Time Lockout) are provided and are
settable in the range of 5 to 500ms. This time is set in relation to the specified interrupting
time of the circuit breaker.
4.2.5 Setting the Excessive Fault Frequency Thresholds
A circuit breaker may be rated to break fault current a set number of times before
maintenance is required. However, successive circuit breaker operations in a short period of
time may result in the need for increased maintenance. For this reason it is possible to set a
frequent operations counter on the relay which allows the number of operations (Fault Freq
Count) over a set time period (Fault Freq Time) to be monitored. A separate alarm and
lockout threshold can be set.
4.2.6 Inputs/Outputs for CB Monitoring logic
4.2.6.1 Inputs
I^Maint Alarm
An alarm maintenance is issued when the maximum broken current (1st level) calculated by
the CB monitoring function is reached
CB Ops Maint
An alarm is issued when the maximum of CB operations is reached [initiated by internal (any
protection function) or external trip (via opto)] (1st level:CB Ops Maint)
CB Ops Lockout
An alarm is issued when the maximum of CB operations is reached [initiated by internal or
external trip] (2nd level:CB Ops Lock)
CB Op Time Maint
An alarm is issued when the operating tripping time on any phase pass over the CB Time
Maint adjusted in MiCOM S1 (slowest pole detection calculated by I< from CB Fail logic)
P44x/EN AP/F65 Application Notes
CB Op Time Lock
An alarm is issued when the operating tripping time on any phase pass over the CB Time
Lockout adjusted in MiCOM S1 (slowest pole detection calculated by I< from CB Fail logic)
FF Pre Lockout
An alarm is issued at (n-1) value in the counters of Main lock out or Fault frequency
FF Lock
An alarm is issued at (n) value in the counters of Main lock out or Fault frequency
Lockout Alarm
An alarm is issued with: CBC Unhealthy or CBC No check sync or CBC Fail to close or CBC
fail to trip or FF Lock or CB Op Time Lock or CB Ops Lock
4.3 Circuit Breaker Control (“CB Control” menu)
The relay includes the following options for control of a single circuit breaker:
Protection + ve
trip
Remote
control
trip Trip
0
Remote close
control
close
Local
Remote
Trip Close
ve
P3078ENa
Setting range
Menu text Default setting Step size
Min Max
CB CONTROL
CB Control by Disabled Disabled, Local, Remote, Local+Remote,
Opto, Opto+local, Opto+Remote,
Opto+Rem+local
Close Pulse Time 0.5s 0.1s 10s 0.01s
Trip Pulse Time 0.5s 0.1s 5s 0.01s
Man Close Delay 10s 0.01s 600s 0.01s
Healthy Window 5s 0.01s 9999s 0.01s
C/S Window 5s 0.01s 9999s 0.01s
A/R Single Pole Disabled Disabled, Enabled
{1&3 pole A/R only} {Refer to Autoreclose notes for further
information}
A/R Three Pole Disabled Disabled, Enabled
{Refer to Autoreclose notes for further
information}
SUP_Trip_Loc
&
1
CBC_Local_Control
&
SUP_Close_Loc
SUP_Trip_Rem
&
CBC_Remote_Control
&
SUP_Close_Rem
INP_CB_Trip_Man
&
CBC_Input_Control
1
&
INP_CB_Man
& S CBC_Trip_Pulse
CBA_3P_C
Q CBC_Trip_3P
1
R
t
Pulsed output latched in UI
0 &
CBC_Failed_To_Trip
CBA_3P
CBA_Status_Alarm
& S
Q CBC_Close_In_Progress
AR_Cycle_1P R
1
INP_AR_Cycle_1P t
0
1
AR_Cycle_3P 1 CBC_Delay_Close
INP_AR_Cycle_3P & S
Q
CBA_3P R
CBA_Disc
TRIP_Any
1
INP_AR_Close
Pulsed output latched in UI
CBA_Any
&
INP_CB_Healthy
CBC_Healthy_Window
t
0 & CBC_UnHeathly
CBC_CS_Window
t
0 & CBC_No_Check_Syn
SYNC
P0529ENa
from the circuit breaker following the close command. This time delay will apply to all manual
CB Close commands.
The length of the trip or close control pulse can be set via the ‘ManualTrip Pulse Time’ and
‘Close Pulse Time’ settings respectively. These should be set long enough to ensure the
breaker has completed its open or close cycle before the pulse has elapsed.
NOTE: The manual close commands for each user interface are found in the
System Data column of the menu.
If an attempt to close the breaker is being made, and a protection trip signal is generated,
the protection trip command overrides the close command.
Where the check synchronism function is set, this can be enabled to supervise manual
circuit breaker close commands. A circuit breaker close output will only be issued if the
check synchronism criteria are satisfied. A user settable time delay is included (‘C/S
Window’) for manual closure with check synchronising. If the checksynch criteria are not
satisfied in this time period following a close command the relay will lockout and alarm.
In addition to a synchronism check before manual reclosure there is also a CB Healthy
check if required. This facility accepts an input to one of the relays opto-isolators to indicate
that the breaker is capable of closing (circuit breaker energy for example). A user settable
time delay is included (‘Healthy Window’) for manual closure with this check. If the CB does
not indicate a healthy condition in this time period following a close command then the relay
will lockout and alarm.
Where auto-reclose is used it may be desirable to block its operation when performing a
manual close. In general, the majority of faults following a manual closure will be permanent
faults and it will be undesirable to auto-reclose. The "man close" input without CB Control
selected OR the "CBClose in progress" with CB control enabled: will initiate the SOTF logic
for which auto-reclose will be disabled following a manual closure of the breaker during
500msec (see SOTF logic in section 2.12.1, Figure 36).
If the CB fails to respond to the control command (indicated by no change in the state of CB
Status inputs) a ‘CB Fail Trip Control’ or ‘CB Fail Close Control’ alarm will be generated
after the relevant trip or close pulses have expired. These alarms can be viewed on the relay
LCD display, remotely via the relay communications, or can be assigned to operate output
contacts for annunciation using the relays programmable scheme logic (PSL).
CBA_3P_C
SUP_Trip OR
INP_CB_Trip_Man
0.1 to 5 Sec
CBC_Trip_3P
CBC_Failed_To_Trip
P0560ENa
CBA_3P
SUP_Close OR
INP_CB_Man
CBC_Close_In_Progress
0 to 60 Sec
0.1 to 10 Sec
CBC_Recl_3P
CBC_ Fail_To_Close
P0561ENa
The ‘DISTURBANCE RECORDER’ menu column is shown below (up to version C5.X):
Setting range
Menu text Default setting Step size
Min Max
DISTURB RECORDER
Duration 1.5s 0.1s 10.5s 0.01s
Trigger Position 33.3% 0 100% 0.1%
Trigger Mode Single Single or Extended
Analog Channel 1 VA VA, VB, VC, IA, IB, IC, IN
Analog Channel 2 VB VA, VB, VC, IA, IB, IC, IN
Analog Channel 3 VC VA, VB, VC, IA, IB, IC, IN
Analog Channel 4 VN VA, VB, VC, IA, IB, IC, IN
Analog Channel 5 IA VA, VB, VC, IA, IB, IC, IN
Analog Channel 6 IB VA, VB, VC, IA, IB, IC, IN
Analog Channel 7 IC VA, VB, VC, IA, IB, IC, IN
Analog Channel 8 IN VA, VB, VC, IA, IB, IC, IN
Up to version C5.X
Digital Inputs 1 to 32 Relays 1 to 14/21 According to the model:
and Any of output Contacts
Opto’s 1 to 8/16any or
relay or opto Any of opto Inputs
or
Internal Digital SignalsAny of 14 or 21
O/P Contacts
or
Any of 8 or 16 Opto Inputs
or
Internal Digital Signals
Inputs 1 to 32 Trigger No Trigger except No Trigger, Trigger L/H, Trigger H/L
Dedicated Trip
Relay O/P’s which
are set to Trigger
L/H
Since version C5.X (new default setting)
Digital Input 1 Any Start According to the model:
Any of output Contacts
or
Any of opto Inputs
or
Internal Digital Signals
Input 1 Trigger Trigger L/H No Trigger, Trigger L/H, Trigger H/L
Digital Input 2 Any Trip As Digital input 1
Input 2 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 3 DIST Trip A As Digital input 1
Input 3 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 4 DIST Trip B As Digital input 1
P44x/EN AP/F65 Application Notes
Setting range
Menu text Default setting Step size
Min Max
Input 4 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 5 DIST Trip C As Digital input 1
Input 5 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 6 DIST Fwd As Digital input 1
Input 6 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 7 DIST Rev As Digital input 1
Input 7 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 8 Z1 As Digital input 1
Input 8 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 9 Z2 As Digital input 1
Input 9 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 10 Z3 As Digital input 1
Input 10 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 11 Z4 As Digital input 1
Input 11 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 12 Any Pole Dead As Digital input 1
Input 12 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 13 All Pole Dead As Digital input 1
Input 13 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 14 SOTF Enable As Digital input 1
Input 14 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 15 SOTF/TOR Trip As Digital input 1
Input 15 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 16 S. Swing Conf As Digital input 1
Input 16 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 17 Out Of Step As Digital input 1
Input 17 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 18 Out Of Step Conf As Digital input 1
Input 18 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 19 Man. Close CB As Digital input 1
Input 19 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 20 I A/R Close As Digital input 1
Input 20 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 21 DIST. Chan Recv As Digital input 1
Input 21 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 22 MCB/VTS Main As Digital input 1
Application Notes P44x/EN AP/F65
Setting range
Menu text Default setting Step size
Min Max
Input 22 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 23 MCB/VTS Synchro As Digital input 1
Input 23 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 24 DEF. Chan Recv As Digital input 1
Input 24 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 25 DEF Rev As Digital input 1
Input 25 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 26 DEF Fwd As Digital input 1
Input 26 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 27 DEF Start A As Digital input 1
Input 27 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 28 DEF Start B As Digital input 1
Input 28 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 29 DEF Start C As Digital input 1
Input 29 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 30 Unused
Digital Input 31 Unused
Digital Input 32 Unused
Note
The available analogue and digital signals may differ between relay types and models and
so the individual courier database in Appendix should be referred to when determining
default settings etc.
The pre and post fault recording times are set by a combination of the ‘Duration’ and ‘Trigger
Position’ cells. ‘Duration’ sets the overall recording time and the ‘Trigger Position’ sets the
trigger point as a percentage of the duration. For example, the default settings show that the
overall recording time is set to 1.5s with the trigger point being at 33.3% of this, giving 0.5s
pre-fault and 1s post fault recording times.
If a further trigger occurs whilst a recording is taking place, the recorder will ignore the trigger
if the ‘Trigger Mode’ has been set to ‘Single’. However, if this has been set to ‘Extended’, the
post trigger timer will be reset to zero, thereby extending the recording time.
As can be seen from the menu, each of the analogue channels is selectable from the
available analogue inputs to the relay. The digital channels may be mapped to any of the
opto isolated inputs or output contacts, in addition to a number of internal relay digital
signals, such as protection starts, LED’s etc. The complete list of these signals may be found
by viewing the available settings in the relay menu or via a setting file in MiCOM S1. Any of
the digital channels may be selected to trigger the disturbance recorder on either a low to
high or a high to low transition, via the ‘Input Trigger’ cell. The default trigger settings are that
any dedicated trip output contacts (e.g. relay 3) will trigger the recorder.
P44x/EN AP/F65 Application Notes
Trigger choices:
(Minimum one trigger condition must be present ; for providing Drec file.)
It is not possible to view the disturbance records locally via the LCD; they must be extracted
using suitable software such as MiCOM S1. This process is fully explained in Chapter 6.
This message is displayed if the memory is empty (control in that case the trigger condition):
After extraction the Drec file can be displayed by the viewer integrated in MiCOM S1(See
Commissioning test section – chap CT)
4.5 HOTKEYS / Control input (“Ctrl I/P config” menu) (since version C2.x)
The two hotkeys in the front panel can perform a direct command if a dedicated PSL has
been previously created using “CONTROL INPUT” cell. In total the MiCOM P440 offers 32
control inputs which can be activated by the Hotkey manually or by the IEC 103 remote
communication (if that option has been flashed with the firmware of the relay, see also cortec
code):
The control input can be linked to any DDB cell as: led, relay , internal logic cell (that can be
useful during test & commissioning) – see also the section 9.9 in chapter AP - Different
condition can be managed for the command as:
And also the text for passing the command can be selected between:
Application Notes P44x/EN AP/F65
The labels of the control inputs can be fulfilled by the user (text label customised)
P44x/EN AP/F65 Application Notes
The digits in this table allow to provide filtering on selected DDB cells (changed from 1 to 0),
to avoid the transfer of these special cells to a remote station connected to the relay with IEC
103 protocol. It gives the opportunity to filter the not pertinent data.
Application Notes P44x/EN AP/F65
Speed
Permissive
faster
Blocking
slower
low
high
It must be ensured that the presence of noise in the communications channel isn’t
interpreted as valid messages by the relay. For this reason, InterMiCOM uses a combination
of unique pair addressing described above, basic signal format checking and for “Direct
Intertrip” commands an 8-bit Cyclic Redundancy Check (CRC) is also performed. This CRC
calculation is performed at both the sending and receiving end relay for each message and
then compared in order to maximise the security of the “Direct Intertrip” commands.
Most of the time the communications will perform adequately and the presence of the
various checking algorithms in the message structure will ensure that InterMiCOM signals
are processed correctly. However, careful consideration is also required for the periods of
extreme noise pollution or the unlikely situation of total communications failure and how the
relay should react.
During periods of extreme noise, it is possible that the synchronization of the message
structure will be lost and it may become impossible to decode the full message accurately.
During this noisy period, the last good command can be maintained until a new valid
message is received by setting the “IM# FallBackMode” cell to “Latched”. Alternatively, if the
synchronisation is lost for a period of time, a known fallback state can be assigned to the
command by setting the “IM# FallBackMode” cell to “Default”. In this latter case, the time
period will need to be set in the “IM# FrameSynTim” cell and the default value will need to be
set in “IM# DefaultValue” cell. As soon as a full valid message is seen by the relay all the
timer periods are reset and the new valid command states are used. An alarm is provided if
the noise on the channel becomes excessive.
When there is a total communications failure, the relay will use the fallback (failsafe) strategy
as described above. Total failure of the channel is considered when no message data is
received for four power system cycles or if there is a loss of the DCD line.
4.6.1.5 Physical Connections
InterMiCOM on the Px40 relays is implemented using a 9-pin ‘D’ type female connector
(labelled SK5) located at the bottom of the 2nd Rear communication board. This connector
on the Px40 relay is wired in DTE (Data Terminating Equipment) mode, as indicated below:
Setting Range
Menu Text Default Setting Step Size
Min Max
INTERMICOM COMMS
Source Address 1 1 10 1
Receive Address 2 1 10 1
Baud Rate 9600 600 / 1200 / 2400 / 4800 / 9600 / 19200
Ch Statistics Invisible Invisible / Visible
Ch Diagnostics Invisible Invisible / Visible
Loopback Mode Disabled Disabled / Internal / External
Test pattern 11111111 00000000 11111111 -
Setting Range
Menu Text Default Setting Step Size
Min Max
INTERMICOM CONF
IM Msg Alarm Lvl 25% 0% 100% 1%
IM1 Cmd Type Blocking Disabled/ Blocking/ Direct
IM1 Fallback Mode Default Default/ Latched
IM1 DefaultValue 1 0 1 1
IM1 FrameSyncTim 20ms 10ms 1500ms 10ms
IM2 to IM4 (Cells as for IM1 above)
IM5 Cmd Type Direct Disabled/ Permissive/ Direct
IM5 Fallback Mode Default Default/ Latched
IM5 DefaultValue 0 0 1 1
IM5 FrameSyncTim 10ms 10ms 1500ms 10ms
IM6 to IM8 (Cells as for IM5 above)
TABLE 14: PROGRAMMING THE RESPONSE FOR EACH OF THE 8 INTERMiCOM SIGNALS
Application Notes P44x/EN AP/F65
Both of these factors will reduce the effective communication speed thereby leading to a
recommended baud rate setting of 9600b/s. It should be noted that as the baud rate
decreases, the communications become more robust with fewer interruptions, but that
overall signalling times will increase.
Since it is likely that slower baud rates will be selected, the choice of signalling mode
becomes significant. However, once the signalling mode has been chosen it is necessary to
consider what should happen during periods of noise when message structure and content
can be lost.
If “Blocking” mode is selected, only a small amount of the total message is actually used to
provide the signal, which means that in a noisy environment there is still a good likelihood of
receiving a valid message. In this case, it is recommended that the “IM# Fallback Mode” is
set to “Default” with a reasonably long “IM# FrameSyncTim”.
If “Direct Intertrip” mode is selected, the whole message structure must be valid and checked
to provide the signal, which means that in a very noisy environment the chances of receiving
a valid message are quite small. In this case, it is recommended that the “IM# Fallback
Mode” is set to “Default” with a minimum “IM# FrameSyncTim” setting i.e. whenever a non-
valid message is received, InterMiCOM will use the set default value.
If “Permissive” mode is selected, the chances of receiving a valid message is between that
of the “Blocking” and “Direct Intertrip” modes. In this case, it is possible that the “IM#
Fallback Mode” is set to “Latched”. The table below highlights the recommended “IM#
FrameSyncTim” settings for the different signalling modes and baud rates:
been received based upon the “Baud Rate” setting. If this percentage falls below the
threshold set in the “IM Msg Alarm Lvl” cell, a “Message Fail” alarm will be raised.
Settings
The settings available in the INTERMiCOM COMMS menu column are as follows:
Setting Range
Menu Text Default Setting Step Size
Min Max
INTERMICOM COMMS
IM Output Status 00000000
IM Input Status 00000000
Source Address 1 1 10 1
Receive Address 2 1 10 1
Baud Rate 9600 600 / 1200 / 2400 / 4800 / 9600 / 19200
Ch Statistics Invisible Invisible / Visible
Reset Statistics No No / Yes
Ch Diagnostics Invisible Invisible / Visible
Loopback Mode Disabled Disabled / Internal / External
Test pattern 11111111 00000000 11111111 -
Application Notes P44x/EN AP/F65
Ch Statistics
Rx Direct Count No. of Direct Tripping messages received with the correct message
structure and valid CRC check.
Rx Perm Count No. of Permissive Tripping messages received with the correct
message structure.
Rx Block Count No. of Blocking messages received with the correct message structure.
Rx NewDataCount No. of different messages received.
Rx ErroredCount No. of incomplete or incorrectly formatted messages received.
Lost Messages No. of messages lost within the previous time period set in “Alarm
Window” cell.
Elapsed Time Time in seconds since the InterMiCOM channel statistics were reset.
Ch Diagnostics
Data CD Status Indicates when the DCD OK = DCD is energised
line (pin 1) is energised.
FAIL = DCD is de-energised
Absent = InterMiCOM board is not fitted
Unavailable = hardware error present
FrameSync Status Indicates when the OK = valid message structure and
message structure and synchronisation
synchronisation is valid.
FAIL = synchronisation has been lost
Absent = InterMiCOM board is not fitted
Unavailable = hardware error present
Message Status Indicates when the OK = acceptable ratio of lost messages
percentage of received
FAIL = unacceptable ratio of lost messages
valid messages has
fallen below the Absent = InterMiCOM board is not fitted
“IM Msg Alarm Lvl”
setting within the alarm Unavailable = hardware error present
time period.
Channel Status Indicates the state of the OK = channel healthy
InterMiCOM
FAIL = channel failure
communication channel.
Absent = InterMiCOM board is not fitted
Unavailable = hardware error present
IM H/W Status Indicates the state of the OK = InterMiCOM hardware healthy
InterMiCOM hardware.
Read Error = InterMiCOM hardware failure
Write Error = InterMiCOM hardware failure
Absent = InterMiCOM board is either not
fitted or failed to initialise
It is possible to hide the channel diagnostics and statistics from view by setting the “Ch
Statistics” and/or “Ch Diagnostics” cells to “Invisible”. All channel statistics are reset when
the relay is powered up, or by user selection using the “Reset Statistics” cell.
P44x/EN AP/F65 Application Notes
4.7 Programmable function keys and tricolour LEDs (“Function key” menu)
Since software version D1.X.
The relay has 10 function keys for integral scheme or operator control functionality such as
circuit breaker control, auto-reclose control etc. via PSL. Each function key has an
associated programmable tri-colour LED that can be programmed to give the desired
indication on function key activation.
These function keys can be used to trigger any function that they are connected to as part of
the PSL. The function key commands can be found in the ‘Function Keys’ menu. In the ‘Fn.
Key Status’ menu cell there is a 10 bit word which represent the 10 function key commands
and their status can be read from this 10 bit word. In the programmable scheme logic editor
10 function key signals, DDB 676 – 685, which can be set to a logic 1 or On state are
available to perform control functions defined by the user.
The “Function Keys” column has ‘Fn. Key n Mode’ cell which allows the user to configure the
function key as either ‘Toggled’ or ‘Normal’. In the ‘Toggle’ mode the function key DDB signal
output will remain in the set state until a reset command is given, by activating the function
key on the next key press. In the ‘Normal’ mode, the function key DDB signal will remain
energized for as long as the function key is pressed and will then reset automatically.
A minimum pulse duration can be programmed for a function key by adding a minimum
pulse timer to the function key DDB output signal. The “Fn. Key n Status” cell is used to
enable/unlock or disable the function key signals in PSL. The ‘Lock’ setting has been
specifically provided to allow the locking of a function key thus preventing further activation
of the key on consequent key presses. This allows function keys that are set to ‘Toggled’
mode and their DDB signal active ‘high’, to be locked in their active state thus preventing any
further key presses from deactivating the associated function. Locking a function key that is
set to the “Normal” mode causes the associated DDB signals to be permanently off. This
safety feature prevents any inadvertent function key presses from activating or deactivating
critical relay functions. The “Fn. Key Labels” cell makes it possible to change the text
associated with each individual function key. This text will be displayed when a function key
is accessed in the function key menu, or it can be displayed in the PSL.
The status of the function keys is stored in battery backed memory. In the event that the
auxiliary supply is interrupted the status of all the function keys will be recorded. Following
the restoration of the auxiliary supply the status of the function keys, prior to supply failure,
will be reinstated. If the battery is missing or flat the function key DDB signals will set to logic
0 once the auxiliary supply is restored. The relay will only recognise a single function key
press at a time and that a minimum key press duration of approximately 200msec. is
required before the key press is recognised in PSL. This deglitching feature avoids
accidental double presses.
4.7.1 Setting guidelines
The lock setting allows a function key output that is set to toggle mode to be locked in its
current active state. In toggle mode a single key press will set/latch the function key output
as high or low in programmable scheme logic. This feature can be used to enable/disable
relay functions. In the normal mode the function key output will remain high as long as the
key is pressed. The Fn. Key label allows the text of the function key to be changed to
something more suitable for the application.
Application Notes P44x/EN AP/F65
Setting range
Menu text Default setting Step size
Min Max
FUNCTION KEYS
Fn Key 1 Unlocked Disabled, Locked, Unlocked
Fn Key 1 Mode Normal Toggled, Normal
Fn Key 1 Label Function Key 1
Fn Key 2 Unlocked Disabled, Locked, Unlocked
Fn Key 2 Mode Normal Toggled, Normal
Fn Key 2 Label Function Key 2
Fn Key 3 Unlocked Disabled, Locked, Unlocked
Fn Key 3 Mode Normal Toggled, Normal
Fn Key 3 Label Function Key 3
Fn Key 4 Unlocked Disabled, Locked, Unlocked
Fn Key 4 Mode Normal Toggled, Normal
Fn Key 4 Label Function Key 4
Fn Key 5 Unlocked Disabled, Locked, Unlocked
Fn Key 5 Mode Normal Toggled, Normal
Fn Key 5 Label Function Key 5
Fn Key 6 Unlocked Disabled, Locked, Unlocked
Fn Key 6 Mode Normal Toggled, Normal
Fn Key 6 Label Function Key 6
Fn Key 7 Unlocked Disabled, Locked, Unlocked
Fn Key 7 Mode Normal Toggled, Normal
Fn Key 7 Label Function Key 7
Fn Key 8 Unlocked Disabled, Locked, Unlocked
Fn Key 8 Mode Normal Toggled, Normal
Fn Key 8 Label Function Key 8
Fn Key 9 Unlocked Disabled, Locked, Unlocked
Fn Key 9 Mode Normal Toggled, Normal
Fn Key 9 Label Function Key 9
Fn Key 10 Unlocked Disabled, Locked, Unlocked
Fn Key 10 Mode Normal Toggled, Normal
Fn Key 10 Label Function Key 10
P44x/EN AP/F65 Application Notes
FnKey Key 1
The activation of the function key will drive an associated DDB signal and the DDB signal will
remain active depending on the programmed setting i.e. toggled or normal. Toggled mode
means the DDB signal will remain latched or unlatched on key press and normal means the
DDB will only be active for the duration of the key press. For example, function key 1 should
be operated in order to assert DDB #676.
Application Notes P44x/EN AP/F65
LED 1 Red
Eight programmable tri-colour LEDs that can be programmed to indicate red, yellow or green
as required. The green LED is configured by driving the green DDB input. The red LED is
configured by driving the red DDB input. The yellow LED is configured by driving the red and
green DDB inputs simultaneously. When the LED is activated the associated DDB signal will
be asserted. For example, if Led 1 Red is activated, DDB #640 will be asserted.
LED 1 Grn
The same explanation as for LED 1 Red applies.
Application Notes P44x/EN AP/F65
The following table shows the relay menu for the fault locator, including the available setting
ranges and factory defaults:-
Setting range
Menu text Default setting Step size
Min Max
GROUP 1
DISTANCE ELEMENTS
LINE SETTING
Line Length 1000 km 0.3 km 1000 km 0.015 km
(625 miles) (0.2 mile) (625 miles) (0.005 mile)
Line Impedance 12 / In Ω 0.001 / In Ω 500 / In Ω 0.001 / In Ω
Line Angle 70° –90° +90° 0.1°
FAULT LOCATOR
kZm Mutual Comp 0 0 7 0.01
kZm Angle 0° 0° +360° 1°
Relay Line Angle settings 0° to 360° in 1° steps. Therefore, select Line Angle = 80° for
convenience.
Application Notes P44x/EN AP/F65
Therefore set Line Impedance and Line Angle: = 5.81 / 80° Ω (secondary).
No residual compensation needs to be set for the fault locator, as the relay automatically
uses the kZ0 factor applicable to the distance zone which tripped.
Should a CT residual input be available for the parallel line, mutual compensation could be
set as follows:
= 0.40 / 0°
Therefore set kZm Mutual Comp = 0.40
kZm Angle = 0°
4.9 Supervision (“Supervision” menu)
The “Supervision” menu contains 3 sections:
− the Voltage Transformer Supervision (VTS) section, for analog ac voltage inputs
failures supervision,
− the Current Transformer Supervision (CTS) section, for ac phase current inputs
failures supervision,
4.9.1 Voltage transformer supervision (VTS) – Main VT for minZ measurement
4.9.1.1 VTS logic description
The voltage transformer supervision (VTS) feature is used to detect failure of the analog ac
voltage inputs to the relay. This may be caused by internal voltage transformer faults,
overloading, or faults on the interconnecting wiring to relays. This usually results in one or
more VT fuses blowing. Following a failure of the ac voltage input there would be a
misrepresentation of the phase voltages on the power system, as measured by the relay,
which may result in maloperation of the distance element.
The VTS logic in the relay is designed to detect the voltage failure (with internal thresholds or
external opto input), and automatically adjust the configuration of protection elements
(Distance element is blocked but may be unblocked on I1,I2 or I0 conditions in case of fault
during VTS conditions) whose stability would otherwise be compromised (Distance, DEF,
Weak infeed, Directionnal phase current& all directional elements used in the internal logic).
A settable time-delayed alarm output is also available (min1sec to Max 20sec).
The condition of this alarm is given by:
INP_F.Failure_Line
VN >F.Failure
I2 >F.Failure
&
≥1
VTS Time
I0 >F.Failure ≥1 delay
S
I >F.Failure Q FFUS_Confirmed
R
∆I>F.Failure Fuse_Failure
Any_pole_dead S
& R
Q
Healthy network
V<F.Failure
≥1
All Pole Dead
P0530ENa
• VTS Timer: A settable alarm from 1 to 20s by step of 1s gives the possibility to signal
by an alarm the Failure. This alarm is instantaneous in case of opto energized by
external INP FFU signal (issued from contact of MCB). During no load, the timer
covers the duration of Dead time1 HSAR cycle (Vo&/IO in case of no load) which
could be detected as VT failure 1 pole.
• INP_FFUS Line:The external information given by the MCB to the opto input is secure
and will block instantaneously the distance function and the functions which are use
directional element.
utilities current practices. Energising an opto-isolated input assigned to “MCB Open” on the
relay will therefore provide the necessary block.
Fuse failure conditions are confirmed instantaneously if the opto input "INP_FFus line" is
energised and assigned in PSL, or after elapse of the VTS Time delay in case of 1, 2 or 3
phases Fuse Failure.
The confirmed Fuse Failure blocks all protection functions which use the voltage
measurement (Distance, Weak infeed, Directional overcurrent,…). The directional
overcurrent element may be blocked or set to become non directional with dedicated timer
(Time VTS in MiCOM S1)- I>1 or IN>1.
A non confirmed Fuse Failure will be a detection of an internal fuse failure before the timer is
issued. In that case a fault can be detected by the I2>,I0>,I1>, ∆I> criteria and will force the
unblocking functions:
Distance Protection
DEF Protection
Weak-infeed Protection
I> Directional
U>, U<
4.9.1.2 The internal detection FUSE Failure condition
Is verified by follows (Fuse Failure not confirmed logic)
(Vr AND /I0 AND /l2 Et /I>) OR (FusFus_tri AND /Any_pole_dead AND V< AND /∆Ι )
Vr>_FFUS : The residual voltage is bigger than a fixed threshold:= 0,75Vn
I0>_FFUS : The zero sequence current is bigger than a settable threshold:
From 0.01 to 1.00 In by step of 0.01
I2>_FFUS : The negative sequence current is bigger than a settable threshold
identical to the I0 threshold.
I>_FFUS : The direct current is bigger than a fixed threshold equal to 2,5IN.
V<_FFUS : All the voltages are lower than a settable threshold from 0.05 à 1
Un by step of 0.1
∆Ι>_FFUS : The line currents have a variation bigger than a settable value from
0.01 to 0.5 In by step of 0.01 In
FuseFailure_3P : Parameter in MiCOM S1 which allows the FFU tri pole detection
Any pole dead : Cycle in progress.
• The I0 criteria (zero sequence current threshold) gives the possibility to UNBLOCK the
distance protection in case of phase to ground fault (if the fuse failure has not been yet
confirmed).
• The criteria (V< AND /∆Ι) gives the possibility to detect the 3Poles Fuse Failure(No
more phase voltage and no variation of current) (no specific logic about line
energisation).
P44x/EN AP/F65 Application Notes
Fusion_Fusible = 0
And
INP_FFUS_Line = 0
And
/All Pole Dead Or Healthy Network
• All Pole Dead: No current AND no voltage OR CB Opened ((52a) if assigned in PSL)
• Healthy Network:
Rated Line voltage AND
No V0 and No I0 AND
No start element AND
No Power Swing
There are three main aspects to consider regarding the failure of the VT supply. These are
defined below:
1. Loss of one or two phase voltages
2. Loss of all three phase voltages under load conditions
3. Absence of three phase voltages upon line energisation
4.9.1.4 Loss of One or Two Phase Voltages
The VTS feature within the relay operates on detection of residual voltage without the
presence of zero and negative phase sequence current, and earth fault current (ΣIph). This
gives operation for the loss of one or two phase voltages. Stability of the VTS function is
assured during system fault conditions, by the presence of I0 and/or I2 current. Also, VTS
operation is blocked (and distance element unblocked) when any phase current exceeds 2.5
x In.
Zero Sequence VTS Element:
The thresholds used by the element are:
The phase voltage level detectors is settable (default value is adjusted at 30V / setting
range: min:10V to Max:70V).
The sensitivity of the superimposed current elements is settable and default value is
adjusted at 0.1In (setting range: 0,01In to 5In).
• Instantaneous blocking of distance protection elements (if opto used); and others
protection functions using voltage measurement
VTS”.(if selected)
The VTS block is latched after a user settable time delay ‘VTS Time Delay’. Once the signal
has latched then two methods of resetting are available. (See Reset logic description in
section 4.9.1.3).
P44x/EN AP/F65 Application Notes
If not blocked the time delay associated can be modified as well (Time VTS):
MCB/VTS Line
The DDB:MCB/VTS Line if linked to an opto in the PSL and when energized, informs the
P44X about an internal maloperation from the VT used for the impedance measurement
reference. (Line in this case means Main VT ref measurement / even if the main VT is on the
bus side and the Synchro VT is on the line side).
MCB/VTS Bus
The DDB:MCB/VTS Bus if linked to an opto in the PSL and when energized, informs the
P44X about an internal maloperation from the VT used for synchrocheck control (See
CheckSync logic in section 4.9.3).
4.9.1.8.2 Outputs
VTS Fast
Set high for internal FFAilure detection made with internal logic.
Setting range
Menu text Default setting step size
Min max
GROUP 1
SUPERVISION
CT SUPERVISION
CTS Status Disabled Enabled/Disabled
CTS VN< Inhibit 1 0.5 / 2V 22 / 88V 0.5 / 2V
CTS IN> Set 0.1 0.08 x In 4 x In 0.01 x In
CTS Time Delay 5 0s 10s 1s
Ir>
Temporisation
& 0<->10sec
Vr<
P0554ENa
The residual voltage setting, CTS VN< Inhibit and the residual current setting, CTS IN> set,
should be set to avoid unwanted operation during healthy system conditions. For example
CTS VN< Inhibit should be set to 120% of the maximum steady state residual voltage. The
CTS IN> set will typically be set below minimum load current. The time-delayed alarm,
CTS Time Delay, is generally set to 5 seconds.
Where the magnitude of residual voltage during an earth fault is unpredictable, the element
be disabled to prevent a protection elements being blocked during fault conditions.
P44x/EN AP/F65 Application Notes
CT Fail Alarm
The DDB cell indicates a CT Fail detected after timer is issued
4.9.3 Capacitive Voltage Transformers Supervision (CVT) (since version B1.x)
4.9.3.1 Function description
This CVT supervision will detect the degradation of one or several capacitors of voltage
dividers. It is based on permanent detection of residual voltage.
A “CVT fault” signal is sent out, after a time-delay T which can be set at between 0 and 300
seconds, if the conditions are as follows:
• The residual voltage is greater than the setting threshold during a delay greater then T
Setting range
Menu text Default setting Step size
Min Max
Group1
SUPERVISION
CVTS Status Activated Activated / Disabled
CVTS VN> 1V 0.5 V 22 V 0.5 V
CVTS Time Delay 100 s 0s 300 s 0.01 s
Application Notes P44x/EN AP/F65
4.9.3.2 Settings & DDB cells assigned to Capacitive Voltage Transformers Supervision (CVT)
function
FIGURE 80 – SETTINGS
DDB cell OUTPUT associated:
The check synchronising element provides two ‘output’ signals which feed into the manual
CB control and the auto reclose logic respectively. These signals allow reclosure provided
that the relevant check-synch criteria are fulfilled.
Setting range
Menu text Default setting Step size
Min Max
GROUP 1
SYSTEM CHECKS
C/S Check Scheme for A/R 111 Bit 0: Live Bus / Dead Line,
Bit 1: Dead Bus / Live Line,
Bit 2: Live Bus / Live Line.
Dead / Dead made by PSL only (from
version A3.0 model 05)
C/S Check Scheme for Man 111 Bit 0: Live Bus / Dead Line,
CB Bit 1: Dead Bus / Live Line,
Bit 2: Live Bus / Live Line.
Dead / Dead made by PSL only (from
version A3.0 model 05)
V< Dead Line 13V 5V 30V 1V
V> Live Line 32V 30V 120V 1V
V< Dead Bus 13V 5V 30V 1V
V> Live Bus 32V 30V 120V 1V
Diff Voltage 6.5V 0.5V 40V 0.1V
Diff Frequency 0.05Hz 0.02Hz 1Hz 0.01Hz
Diff Phase 20° 5° 90° 2.5°
Bus-Line Delay 0.2s 0.1s 2s 0.1s
KEY: “Diff” denotes the differential between Line VT and Busbar VT measurements.
− At least one condition of c/s scheme must be selected in the 3 bits, to activate the c/s
check logic.
− Man CB, check sync condition is tallen in account, only if a logic of STF has been
enabled by S1.
− If SOTF is disabled in S1, a dedicated PSL must be created using Deb B (live L or live
B/Dead L) – live/live could not be managed – in that case.
Application Notes P44x/EN AP/F65
Note that the combination of the Diff Phase and Bus-Line Delay settings can also be equated
to a differential frequency, as shown below:
(This facility with cells (Dead Line/Dead Bus) is available since version A3.0 model 05)
This setting might also be used to allow manual close with specific test conditions on the CB.
4.10.2 Live Busbar and Dead Line
Where a radial feeder is protected, tripping the circuit breaker will isolate the infeed, and the
feeder will be dead. Provided that there is no local generation which can backfeed to
energise the feeder, reclosure for live busbar / dead line conditions is acceptable. This
setting might also be used to allow re-energisation of a faulted feeder in an interconnected
power system, which had been isolated at both line ends. Live busbar / dead line reclosing
allows energising from one end first, which can then be followed by live line / live busbar
reclosure with voltages in synchronism at the remote end.
P44x/EN AP/F65 Application Notes
Enable_SYNC
VTS_Slow
1
INP_Fuse Failure Bus
AR_Force_Sync
INP_AR_Cycle_1P S
Q
INP_AR_Reclaim R
INP_AR_Cycle_Conf
1 CHECK
SYNC
INP_AR_Reclaim_Conf 1
Conditions
0 & verified
Any_Pole_Dead &
t 1
&
All_Pole_Dead 200ms
Dead L/Live B
t
V< Dead Line &
0
Live L/Dead B
t
V> Live L &
0
Live L/Live B
V> Live B t
0
&
V> Live L
Bus Line Delay
Diff voltage
Diff frequency
Diff phase
P0492ENa
X1 X2
b0 i0
b1 i1
sample
T sample
P0493ENa
VLine
VBus
x1 x2
Ta
∆T
y1 y2
VBus
VLine
y2 y3
Ta
∆T
x1 x2
P0494ENa
∆T = Ta + (x1-y2)
A phase shift calculation requests a change of sign from both signals.
All the angles will be between 0° and 180°. For a phase shift of 245°,
(360 –245) = 115° will be displayed
P44x/EN AP/F65 Application Notes
• MCB/VTS Bus,
• MCB/VTS Line,
are managed dynamically since version C1.1 (regarding where the main VT are located:bus
side or line side – then the Csync ref is assigned to the other VT which is managed as the
Csync ref)
4.10.5.2 Logic DDB outputs issued by the check sync logic
Check Sync OK
Set high when Check Synchro conditions are verified
[Used with AR close in dedicated PSL – "AND" gate: [(AR Close) & (CheckSync OK)]
V<Dead Line
Set high when the Dead line condition is verified (voltage below the V<Dead Line threshold
value (settable in MiCOM S1) – The measured voltage is always calculated as a single
phase voltage
V>Live Line
Set high when the Live line condition is verified (voltage above the V>Live Line threshold
value (settable in MiCOM S1) - always calculated as a single phase voltage ref
V<Dead Bus
Set high when the Dead Bus condition is verified (voltage below the V<Dead Bus threshold
value (settable in MiCOM S1) - always calculated as a single phase voltage ref
V>Live Bus
Set high when the Live Bus condition is verified (voltage above the V>Live Bus threshold
value (settable in MiCOM S1) - always calculated as a single phase voltage ref
Control No C/S
Set high when the internal Check Sync conditions are not verified
P0537ENa
PSL Output
assigned
AR_Force_Sync
AR_Fail
AReclose AR_Close
AR_Cycle_1P
AR_Cycle_3P
Closing command
& with check sync
1 conditions verified
CB Control CBC_Recl_3P
CBC_No_Check_Sync
P0495ENa
Output_AR_force_Sync
Output_closing order
P0496ENa
Output_Sync
1
Output_AR_force_Sync External closing order
External with internal C. Sync
AR close order &
conditions verified
Output_AR_Close
1
Output_closing order
P0497ENa
Setting range
Menu text Default setting Step size
Min Max
GROUP 1
AUTORECLOSE
AUTORECLOSE MODE
1P Trip Mode Single Single
Single/Three
Single/Three/Three
Single/Three/Three/Three
3P Trip Mode Three Three
Three/Three
Three/Three/Three
Three/Three/Three/Three
1P - Dead Time 1(HSAR) 1s 0.1s 5s 0.01s
3P - Dead Time 1(HSAR) 1s 0.1s 60s 0.01s
Dead Time 2 (DAR) 60s 1s 3600s 1s
Dead Time 3 (DAR) 180s 1s 3600s 1s
Dead Time 4 (DAR) 180s 1s 3600s 1s
Reclaim Time 180s 1s 600s 1s
Close Pulse Time 0.1s 0.1s 10s 0.1s
A/R Inhibit Wind 5s 1s 3600s 1s
(CB healthy application)
C/S on 3P Rcl DT1 Enabled Enabled, Disabled
(Check Sync with HSAR)
AUTORECLOSE
LOCKOUT
Block A/R (Bit = 1 means Bit 0: Block at tZ2, Bit 1: Block at tZ3,
AR blocked) Bit 2: Block at tZp, Bit 3: Block for LoL Trip,
Bit 4: Block for I2> Trip,
Bit 5: Block for I>1 Trip,
Up to version C2.X Bit 6: Block for I>2 Trip,
1111 1111 Bit 7: Block for V<1 Trip,
1111 1111 Bit 8: Block for V<2 Trip,
Bit 9: Block for V>1 Trip,
Bit 10: Block for V>2 Trip,
Bit 11: Block for IN>2 Trip,
Bit 12: Block for IN>2 Trip,
Bit 13: Block for Aided DEF Trip.
P44x/EN AP/F65 Application Notes
Setting range
Menu text Default setting Step size
Min Max
Bit 0: Block at tZ2
Bit 1: Block at tZ3,
Bit 2: Block at tZp
Bit 3: Block for LoL Trip,
Bit 4: Block for I2> Trip,
Bit 5: Block for I>1 Trip,
Bit 6: Block for I>2 Trip,
Bit 7: Block for V<1 Trip,
1111 1111 Bit 8: Block for V<2 Trip,
Since version C2.X 1111 1111 Bit 9: Block for V>1 Trip,
111 Bit 0A: Block for V>2 Trip,
Bit 0B: Block for IN>1 Trip,
Bit 0C: Block for IN>2 Trip,
Bit 0D: Block for Aided DEF Trip.
Bit 0E: Block ZSP Trip
Bit 0F: Block IN>3 Trip
Bit 10: Block IN>4 Trip
Bit11: Block PAP Trip
Bit12: Block Therm Overload Trip
Discrim. Time 5s 0.1s 5s 0.01s
• A high speed trip and reclose cycle clears the fault without threatening system
stability.
When considering feeders which are partly overhead line and partly underground cable, any
decision to install auto-reclosing would be influenced by any data known on the frequency of
transient faults. When a significant proportion of the faults are permanent, the advantages of
auto-reclosing are small, particularly since reclosing on to a faulty cable is likely to aggravate
the damage.
At subtransmission and transmission voltages, utilities often employ single pole tripping for
earth faults, leaving circuit breaker poles on the two unfaulted phases closed. High speed
Application Notes P44x/EN AP/F65
single phase autoreclosure then follows. The advantages and disadvantages of such single
pole trip/reclose cycles are:
• Synchronising power flows on the unfaulted phases, using the line to maintain
synchronism between remote regions of a relatively weakly interconnected system.
• However, the capacitive current induced from the healthy phases can increase the
time taken to de-ionise fault arcs.
4.11.3 Auto-reclose logic operating sequence
An autoreclose cycle is internally initiated by operation of a protective element (could be
started by an internal trip or external trip), provided the circuit breaker is closed at the instant
of protection operation. The appropriate dead timer for the shot is started (Dead Time 1, 2, 3
or 4; noting that separate dead times are provided for the first high speed shot of single pole
(1P), and three pole (3P), reclosure). At the end of the dead time, a CB close command of
set duration = Close Pulse is given, (See Figure 88 with AR Close logic) provided system
conditions are suitable. The conditions to be met for closing are that the system voltages
satisfy the internal check synchronism criteria (set in the System Checks section of the relay
menu – and in a dedicated PSL (needs to be created by user – see section 0), and that the
circuit breaker closing spring, or other energy source, is fully charged indicated from the
DDB: CB Healthy input (Optional application / See Figure 90 and Figure 94 AR inputs).
When the CB has closed the reclaim time (Reclaim Time) starts (See Figure 88 with AR
Close logic). If the circuit breaker has been not retrip, the autoreclose logic is reset at the
end of the reclaim time. The autorecloser is ready again to restart from the first shot a new
cycle again (for future faults). If the protection retrips during the reclaim time, the relay either
advances to the next shot in the programmed autoreclose cycle, or, if all programmed
reclose attempts have been made, goes to lockout.
Trip_1P or Trip_3P
Dead Time_1P or
Dead Time_3P
Close Pulse
AR_Trip_3ph
Reclaim Time
P0555ENa
Trip_1P or Trip_3P
Dead Time_1P
Dead Time_3P
Close Pulse
AR_Trip_3ph
Reclaim Time
P0556ENa
FIGURE 89 - SUCCESSIVE AR CYCLE – SECOND TRIP ORDER BEFORE RECLAIM TIME IS ISSUED
P44x/EN AP/F65 Application Notes
(The reclaim time is reset when the reclaim timer adjusted in MiCOM S1 Timer is issued or if
a new trip order 1P or 3P occurs – see Figure 90)
CHECK SYNC OK
R
Q
End of Dead Time 2 AR_Fail
& S
S
& Q AR_Force_Sync
1 R
End of 1P Dead Time 1
1
& S
Q AR_RECLAIM
R
AR_Enable 0
& t
1 Reclaim Time
Block AR
1
INP_CBHealthy
1 S
Q AR_Close
TRIP_1P
R
1 0
1
t
TRIP_3P
Close pulse Time
P0498ENa
FIGURE 90 - LOGIC FOR RECLAIM TIME /AR CLOSE / AR FAIL AND AR FORCE_SYNC
(AR FAIL is reseted with 3 pole closed)
Application Notes P44x/EN AP/F65
AR_Enable
Block AR
1
AR lock out
inhibit
CBA_Discrepency
& S & AR_lock out
Q
1
R
0
t
End of 1P Dead Time 1 Reclaim
Time
1
End of 3P Dead Time 1
S
&
Q
TRIP_1P
1 R
TRIP_3P
Reset TRIP 1P
1
Reset TRIP 3P
TPAR enable
AR_Cycle_1P & S
Q
AR_Discrimination R
TRIP_3P
Reset TRIP 3P 1
& S
Q
R
P0499ENa
S
Q >1
AR 1P in Prog
>1 &
AR 3P in Prog
BAR_Block_T2 Enable
&
T2
BAR_Block_T3 Enable
&
T3
BAR_Block_Tzp Enable
&
Tzp
T4
BAR_Block_LOL Enable
&
LOL_Trip_3P
BAR_Block_I> Enable
&
TRIP 3P_I>1
BAR_Block_I>2 Enable
&
TRIP 3P_I>2
BAR_Block_V<1 Enable
&
TRIP 3P_V<1
&
BAR_Block_V<2 Enable
&
>1
TRIP 3P_V<2 >1 Block AR
BAR_Block_V>1 Enable
&
TRIP 3P_V>1
BAR_Block_V>2 Enable
&
TRIP 3P_V>2
BAR_Block_IN>1 Enable
&
SBEF_TRIP 3P_IN>1
BAR_Block_IN>2 Enable
&
SBEF_TRIP 3P_IN>2
BAR_Block_DEF Enable
&
DEF_TripA
DEF_TripB >1
DEF_TripC
BRK_Trip 3P
SOTF_Enable
&
SOTF/TOR trip
PHOC_Trip_3P_I>4
CBF1_Trip_3P
CBF2_Trip_3P
INP_BAR
P0500ENa
− With AR Lock out (Block AR) activated, the AR does not initiate any additional AR
cycle. If AR lock out picks up during a cycle, the AR close is blocked.
− A dedicated PSL can be created, for performing an AR lock out in case of Fuse
Failure confirmed.
Application Notes P44x/EN AP/F65
AR_Enable
SPAR enable
& & S
1 AR lockout_Shots>
Q
R
TRIP_1P
1
TRIP_3P
&
TPAR enable
Reset TRIP_1P
1
Reset TRIP_3P
P0501ENa
AR_Enable
P0502ENa
Trip1P
Dead time(1P)
AR_BAR
AR_Trip_3ph
CBA_Discrepency
P0503ENa
Trip1P or Trip 3P
Dead time1 or
Dead time 3P
AR_Close
AR_BAR
P0557ENa
FIGURE 96 - TRIP ORDER STILL PRESENT AT THE END OF DEAD TIME WILL FORCE AR LOCK OUT
(AR _BAR)
P44x/EN AP/F65 Application Notes
CNF_52b
CNF_52a
&
INP_52a_A &
S
Q
& R
INP_52b_A &
1 CBA_A
&
xor
&
INP_52a_B &
S
Q 1 CBA_ANY
& R
INP_52b_B &
1 CBA_B
&
xor
&
INP_52a_C & &
S
Q
& R
INP_52b_C &
1 CBA_C
&
& t
1 CBA_Status_Alarm
0
xor
CBA_Time_Alarm
CBA_Time_Disc
1 t
INP_DISCREPENCY CBA_Disc
0
P0504ENa
(The first 3P_HSAR cycle can be controlled by the check Sync logic)
Scheme Number of Single Pole HSAR Shots Number of Three Pole DAR Shots
1 1 None
1/3 1 1
1/3/3 1 2
1/3/3/3 1 3
Trip_1P or Trip_3P
1P_Dead Time
AR_Discrimination Timer
3P_Dead Time
AR_Trip_3ph
AR_BAR
P0505ENa
Trip_1P or Trip_3P
1P_Dead Time
AR_Discrimination Timer
3P_Dead Time
AR_Trip_3ph
AR_BAR
P0506ENa
SPAR Enable
The DDB SPAR Enable if assigned to an opto input in the PSL (in default PSL is inverted
and recorded to opto8) and when energized, will enable the 1P AR logic (The priority of that
input is higher than the settings done via MiCOM S1 or by front panel - that means the 1P
AR can be disabled even if activated in MiCOM S1; as the opto input is not energized.
(to be valid opto must be energized >1,2 sec).
SPAR
1 AR SPAR enable
INP_SPAR
P0507ENa
FIGURE 100
TPAR Enable
The DDB TPAR Enable if assigned to an opto input in the PSL (in default PSL is inverted
and recorded to opto8) and when energized, will enable the 3P AR logic (The priority is
higher than the settings done via MiCOM S1 or by front panel - that means the 3P AR can be
disabled even if activated in MiCOM S1; as that opto is not energized.
(to be valid opto must be energized >1,2 sec).
TPAR
1 AR TPAR enable
INP_TPAR
P0508ENa
FIGURE 101
NOTE: After a new PSL loaded in the relay (which includes "TPAR" or
"SPAR" cells); it is necessary to transfer again the settings
configuration (from PC to relay) for adjusting the datas in RAM and
EEPROM (otherwise discrepency could appear in the logic status of
AR enable).
A/R Internal
The DDB A/R Internal if assigned to an opto input in the PSL and when energized, will
enable the internal AR logic. This opto input could be connected to an external condition like
the Wdog of protection Main1 – which activates the internal AR of Main 2 (P44x) in case of
internal failure of the Main1.
AR_Internal
TPAR enable
P0509ENa
A/R 1p in Prog
The DDB A/R 1P in Prog if assigned to an opto input in the PSL and when energized, will
block the internal DEF as an external single pole AR cycle is in progress.
A/R 3p in Prog
The DDB A/R 3P in Prog if assigned to an opto input in the PSL and when energized, will
inform the P44X about the presence of an external 3P cycle.That data could be used in case
of evolving fault
A/R Close
The DDB A/R Close if assigned to an opto input in the PSL and when energized, could be
linked with the internal check sync condition to control the external CB closing command.
A/R Reclaim
The DDB A/R Reclaim if assigned to an opto input in the PSL and when energized, will
inform the protection about an external reclaim time in progress; and will initiate the internal
TOR logic. (That information extension logic, by using a dedicated PSL could be used also
in Z1x.
BAR
Block Autoreclose (via Opto Input or PSL) – see Figure 92.
The DDB: BAR input will block the autoreclose and lockout the AR if in progress. If a single
pole cycle is in progress a three pole trip and lockout will be issued. It can be used when
protection operation without autoreclose is required. A typical example is on a transformer
feeder, where autoreclosing may be initiated from the feeder protection but blocked from the
transformer protection. Similarly, where a circuit breaker low gas pressure or loss of vacuum
alarm occurs during the dead time, autoreclosure, should be blocked – and BAR can be
used to realise that blocking logic.
CB Healthy
(via Opto Input)
The majority of circuit breakers are only capable of providing one trip-close-trip cycle. It is
necessary to re-establish sufficient energy in the circuit breaker before the CB can be
reclosed. The DDB: CB Healthy input is used to ensure that there is sufficient energy
available to close and trip the CB before initiating a CB close command. If on completion of
the dead time, sufficient energy is not detected by the relay within a period given by the AR
Inhibit Wind window, lockout will result and the CB will remain open (AR BAR Picks up –
see Figure 91) If the CB energy becomes healthy during the time window, autoreclosure will
occur. This check can be disabled by not allocating an opto input. In this case, the DDB cell
“CB Healthy” is considered invariant for the logic of the relay. This will mean that the signal
is always high within the relay (when the logic required a high level) and at 0, if low level is
requested. It is an invariant status for the firmware (Same logic is applied for every optional
opto – if not linked in the PSL these cells are managed as invariant data for internal logic).
Application Notes P44x/EN AP/F65
INhWind
1P Dead Time or
3P Dead Time
INP_CB_Healthly
Close pulse
AR_Trip_3ph
AR_RECLAIM
P0510ENa
Start of INhWind is
INhWind issued
INhWind
1P_Dead Time or
3P_Dead Time
INP_CB_Healthy
AR_Close
AR_Trip_3ph
AR_BAR
P0511ENa
FIGURE 104 - CB_HEALTHY DID NOT PICKS UP WHEN INHWIND IS ISSUED (AR BAR PICKS UP)
The CB healthy logic is used as a negative logic (due to an inverter in the scheme – see
Figure 94 (logic of inhibit window) but the DDB takes into account the CB healthy as a
positive logic [1=opto energised during inhwind (MiCOM S1 setting) =AR close pulse]
Force 3P Trip
The DDB Force 3P Trip if assigned to an opto input in the PSL and when energized, will
force the internal single phase protection to trip three phases. (external order from Main1 to
Main2 (P44x)) – next Trip will be 3P (Figure 104 & Figure 105)
INP_Trp_3P
1 BAN3
AR_Trip_3Ph
AR_internal
P0512ENa
Trip_3P_SBEF_IN>1
Trip_3P_SBEF_IN>2
Trip_3P_I2>
TOR_Trip_3P
LOL_Trip_3P
BRK_Trip_3P
Trip_3P_I>1
Trip_3P_I>2 1
Trip_3P_I>3
Trip_3P_I>4
Trip_3P_V<1
Trip_3P_V<2 1
Trip_3P_V>1
Trip_3P_V>2 1 1 TRIP_Any Pole
PW_trip
R
Q
& S Dwell
1 Timer
BAN3
Trip_timer
PDist_Trip_A
Dwell
Weak_Trip_A 1 Trip_A
1
Timer
DEF_Trip_A
80 ms
User_Trip_A
1 TRIP_Any_A
INP_EXTERNAL_ProtA 1
& &
1 TRIP_3Poles
Trip_timer
PDist_Trip_B
Dwell 1
Weak_Trip_B Trip_B
1
Timer
DEF_Trip_B 80 ms
User_Trip_B
1 TRIP_Any_B
1
INP_EXTERNAL_ProtB
& TRIP_1Pole
xor
xor
Trip_timer
PDist_Trip_C
Dwell 1 Trip_C
Weak_Trip_C 1
Timer
DEF_Trip_C
80 ms
User_Trip_C
1 TRIP_Any_C
1
INP_EXTERNAL_ProtC
P0513ENa
Manual Close CB
(via Opto Input, Local or Remote Control)
Manual closure of the circuit breaker will force the autorecloser in a lockout logic, if selected
in the menu (see SOTF logic Figure 36).
Application Notes P44x/EN AP/F65
Any fault detected within 500ms of a manual closure will cause an instantaneous three pole
tripping, without autoreclosure (See next Figure 92 BAR logic)
With AR Lock out (AR_BAR) activated, the AR does not initiate any additional AR cycle. If
AR lock out picks up during a cycle, the AR close is blocked.
This prevents excessive circuit breaker operations, which could result in increased circuit
breaker and system damage, when closing onto a fault.
Manual Trip CB
The DDB Force Manual Trip CB if assigned to an opto input in the PSL and when
energized, will inform the protection about an external trip command on the CB by the CB
control function (if activated).
P44x/EN AP/F65 Application Notes
SUP_Trip_Loc
& Manual/Remote/Local Trip
1
CBC_Local_Control
&
SUP_Close_Loc
SUP_Trip_Rem
&
CBC_Remote_Control
&
SUP_Close_Rem
INP_CB_Trip_Man
&
TRIP
& S CBC_Trip_Pulse
CBA_3P_C
Q CBC_Trip_3P
1
R
t
Pulsed output latched in UI
0 &
CBC_Failed_To_Trip
CBA_3P
CLOSE
CBA_Status_Alarm
& S
Q CBC_Close_In_Progress
AR_Cycle_1P R
1
INP_AR_Cycle_1P t
0
1
AR_Cycle_3P 1 CBC_Delay_Close
INP_AR_Cycle_3P & S
Q
CBA_3P R
CBA_Disc
TRIP_Any
1
INP_AR_Close
Pulsed output latched in UI
CBA_Any
&
INP_CB_Healthy
CBC_Healthy_Window
t
0 & CBC_UnHeathly
CBC_CS_Window
t
0 & CBC_No_Check_Syn
SYNC
P0514ENa
CB Discrepancy
The DDB CB Discrepancy if assigned to an opto input in the PSL and when energized, will
inform the protection about a pole Discrepancy status. 1 pole opened and two other poles
closed. Must be Set to high logical level before Dead time 1 is issued (see Figure 95) -can
be generated also internally (see Figure 97 and Figure 121 Cbaux logic).
External TripA
External TripB
External TripC
From External Protection Devices (via Opto Inputs)- see General trip logic Figure 106.
Opto inputs are assigned as External Trip A, External Trip B and External Trip C (external
Trip Order issued by main 2 or in order to initiate the internal AR backup protection).
External trip is integrated in the DDB: Any Trip. No Dwell timer is associated as for an
internal trip (see Figure 106: trip logic).
4.11.7 Logical Outputs generated by the Autoreclose logic
The following DDB signals can be masked to a relay contact in the PSL or assigned to a
Monitor Bit in Commissioning Tests, to provide information about the status of the
autoreclose cycle. These are described below, identified by their DDB signal text.
AR Lockout Shot>
Indicates an unsuccessful autoreclose (definitive trip following the last AR shot). The relay
will be driven to lockout and the autoreclose function will be disabled until the lockout
condition has been reset. An alarm, "AR Lockout Shots>" (along with AR Lockout) will be
raised. – (see Figure 91 and Figure 93)
AR Fail
If the check sync conditions are not meet prior to reclose within the time window, an alarm
"AR Fail" will be raised. (see Figure 90)
AR Close
Initiates the reclosing command pulse for the circuit breaker. This output feeds a signal to
the Reclose Time Delay timer, which maintains the assigned reclose contact closed for a
sufficient time period to ensure reliable CB mechanism operation. This DDB signal may also
be useful during relay commissioning to check the operation of the autoreclose cycle.
Where three single pole circuit breakers are used, the AR Close contact will need to
energise the closing circuits for all three breaker poles (or alternatively assign three CB
Close contacts). (See Figure 90)
AR 1P In Prog.
A single pole autoreclose cycle is in progress. This output will remain activated from the
initiating protection trip, until the circuit breaker is closed successfully, or the AR function is
Locked Out, thus indicating that dead time timeout is in progress. This signal may be useful
during relay commissioning to check the operation of the autoreclose cycle.
P44x/EN AP/F65 Application Notes
SPAR enable
&
TRIP_1P
AR_Cycle_3P S
& Q AR__1P in prog
CBA_Discrepency
R
BAR t
1
0
S
Q AR_Discrimination
R
1 t
0
Discrimination Time
P0515ENa
AR 3P In Prog.
A three phase autoreclose cycle is in progress. This output will remain activated from the
initiating protection trip, until the circuit breaker is closed successfully, or the AR function is
Locked Out, thus indicating that dead time timeout is in progress. This signal may be useful
during relay commissioning to check the operation of the autoreclose cycle.
HS_AR_3P
1 AR_3P in prog
DAR_3P
P0516ENa
AR_1P in prog
TPAR enable
&
1 S
TRIP_3P Q HSAR_3P
R
&
AR_discrimination t
0
P0517ENa
3Par
&
& S
TRIP_3P
Q DAR_3P
0 < Trip counter < setting R
Block AR t
1
0
Dead Time 2
P0518ENa
AR 1st in Prog.
DDB: AR 1st in Prog. is used to indicate that the autorecloser is timing out its first dead
time, whether a high speed single pole or three pole shot.
HSAR_3P
1 AR_1st_Cycle
AR_1P in prog
P0519ENa
AR 234 in Prog.
DDB: AR 234 in Prog. is used to indicate that the autorecloser is timing out delayed
autoreclose dead times for shots 2, 3 or 4. Where certain protection elements should not
initiate autoreclosure for DAR shots, the protection element operation is combined with AR
234 in Prog. as a logical AND operation in the Programmable Scheme Logic, and then set to
assert the DDB: BAR input, forcing lockout.
DAR_3P 1 AR_234th_Cycle
P0520ENa
AR Trip 3 Ph
This is an internal logic signal used to condition any protection trip command to the circuit
breaker(s). Where single pole tripping is enabled, fixed logic converts single phase trips for
faults on autoreclosure to three pole trips.
AR_1P in prog
1
AR_3P in prog
&
TRIP_1P
Block AR 1
AR_RECLAIM
&
inhibit 1 AR_Trip_3Ph
AR_Internal
&
SPAR enable
P0521ENa
AR Reclaim
Indicates that the reclaim timer following a particular autoreclose shot is timing out. The
DDB: AR Reclaim output would be energised at the same instant as resetting of any Cycle
outputs. AR Reclaim could be used to block low-set instantaneous protection on
autoreclosure, which had not been time-graded with downstream protection. This technique
is commonly used when the downstream devices are fuses, and fuse saving is implemented.
This avoids fuse blows for transient faults. See Figure 90.
P44x/EN AP/F65 Application Notes
AR Discrim
Start with the trip order.
When a single pole trip is issued by the relay, a 1 pole AR cycle is initiated. The Dead time1
and Discrimination timer (from version A3.0) are started. If the AR logic detects a single pole
or three poles trip (internal or external) during the discrimination timer, the 1P HSAR cycle is
disabled and replaced by a 3P HSAR cycle, if enable. If no AR 3P is enable in MiCOM S1,
the relay trip 3 poles and AR is blocked. (see Figure 98)
If the AR logic detect a 3 poles trip (internal or external) when the Discrimination Timer is
issued, and during the 1P dead time; the single pole AR cycle is stopped and the relay trip 3
phases and block the AR. (see Figure 99 and Figure 108)
SPAR enable
&
TRIP_1P
AR_3P in prog S
& Q AR_1P in prog
CBA_Discrepency
R
Block AR t
1
0
S
Q AR_Discrimination
R
1 t
0
Discrimination Time
P0522ENa
If an evolving occurs during the discrimination timer, the first single pole high speed
AR cycle (1P HSAR) is stopped and removed by a 3 pole high speed AR cycle (3P HSAR)
P0523ENa
FIGURE 117
To inhibit the discrimination timer logic (fixed logic) ; the value should be equal to the 1P
cycle dead time. (1P Dead Time 1).
AR Enable
Indicates that the autoreclose function is in service. (See Figure 102)
AR SPAR Enable
Single pole AR is enabled. (See Figure 101)
AR TPAR Enable
Three poles AR is enabled. (See Figure 102)
AR Lockout
If protection operates during the reclaim time, following the final reclose attempt, the relay
will be driven to lockout and the autoreclose function will be disabled until the lockout
condition is reset. This will produce an alarm, AR Lockout. Secondly, the DDB: BAR input
will block autoreclose and cause a lockout if autoreclose is in progress. Lockout will also
occur if the CB energy is low and the CB fails to close. Once the autorecloser is locked out,
it will not function until a Reset Lockout or CB Manual Close command is received
(depending on the Reset Lockout method chosen in CB Monitor Setup).
DEC_3P
AR_Cycle_3P
SYNC
AR_Close
AR_Trip_3ph
RECLAIM
AR_Force_Sync
P0558ENa
FIGURE 118 – CHECK SYNC SIGNAL PICK-UP AT THE END OF THE DEAD TIME (AR CYCLE)
DEC_3P
AR_Cycle_3P
SYNC
AR_Close
AR_Trip_3ph
AR_RECLAIM
AR_Fail
AR_Force_Sync
P0559ENa
FIGURE 119 - THE CHECK SYNC SIGNAL IS FORCED AT THE END OF DEAD TIME
(SEE FIGURE 90)
Check Sync;OK
(See Checksync logic description – section 4.10.5.2)
V<Dead Line
(See Checksync logic description – section 4.10.5.2)
V>Live Line
(See Checksync logic description – section 4.10.5.2)
V<Dead Bus
(See Checksync logic description – section 4.10.5.2)
P44x/EN AP/F65 Application Notes
V>Live Bus
(See Checksync logic description – section 4.10.5.2)
Control Trip
CB Trip command by internal CB control
Control Close
CB close command by internal CB control
• CB Opening + Reset time (Trip coil energised → Trip mechanism reset): 200ms (b);
• 280ms (e) for a three phase trip. (560ms for a single pole trip).
The minimum relay dead time setting is the greater of:
(a) + (c) = 50 + 80 = 130ms, to allow protection reset;
(a) + (e) - (d) = 50 + 280 - 85 = 245ms, to allow de-ionising (three pole);
= 50 + 560 - 85 = 525ms, to allow de-ionising (single pole).
In practice a few additional cycles would be added to allow for tolerances, so 3P Rcl - Dead
Time 1 could be chosen as ≥ 300ms, and 1P Rcl - Dead Time 1 could be chosen as ≥
600ms. The overall system dead time is found by adding (d) to the chosen settings, and
then subtracting (a). (This gives 335ms and 635ms respectively here).
4.11.13 Reclaim Timer Setting
A number of factors influence the choice of the reclaim timer, such as;
• Fault incidence/Past experience - Small reclaim times may be required where there
is a high incidence of recurrent lightning strikes to prevent unnecessary lockout for
transient faults.
• Spring charging time - For high speed autoreclose the reclaim time may be set
longer than the spring charging time. A minimum reclaim time of >5s may be needed
to allow the CB time to recover after a trip and close before it can perform another trip-
close-trip cycle. This time will depend on the duty (rating) of the CB. For delayed
autoreclose there is no need as the dead time can be extended by an extra CB
healthy check AR Inhibit Wind window time if there is insufficient energy in the CB.
• Switchgear Maintenance - Excessive operation resulting from short reclaim times can
mean shorter maintenance intervals.
• The Reclaim Time setting is always set greater than the tZ2 distance zone delay.
Application Notes P44x/EN AP/F65
• CB is in isolated position
Should both sets of contacts be closed, only one of the following two conditions would apply:
Sol3: Two optos used for 52a & 52b (3 poles breaker)
Where ‘None’ is selected no CB status will be available. This will directly affect any function
within the relay that requires this signal, for example CB control, auto-reclose, etc. Where
only 52a is used on its own then the relay will assume a 52b signal from the absence of the
52a signal. Circuit breaker status information will be available in this case but no discrepancy
alarm will be available. The above is also true where only a 52b is used. If both 52a and 52b
are used then status information will be available and in addition a discrepancy alarm will be
possible, according to the following table. 52a and 52b inputs are assigned to relay opto-
isolated inputs via the PSL.
Where single pole tripping is used (available on P442 and P444) then an open breaker
condition will only be given if all three phases indicate and open condition. Similarly for a
closed breaker condition indication that all three phases are closed must be given. For single
pole tripping applications 52a-A, 52a-B and 52a-C and/or 52b-A, 52b-B and 52b-C inputs
should be used.
With 52a&52b both present, the relay memorizes the last valid status of the 2 inputs
(52a=/52b). If no valid status is present (52a=52b) when the Alarm timer is issued
(value=150 msec), CBA_Status Alarm is activated. See Figure 121.
P44x/EN AP/F65 Application Notes
CNF_52b
CNF_52a
&
INP_52a_A &
S
Q
& R
INP_52b_A &
1 CBA_A
&
xor
&
INP_52a_B &
S
Q 1 CBA_ANY
& R
INP_52b_B &
1 CBA_B
&
xor
&
INP_52a_C & &
S
Q
& R
INP_52b_C &
1 CBA_C
&
CBA_Time_Alarm
& t
1 CBA_Status_Alarm
0
xor
150 ms
CBA_Time_Disc
1 t
INP_DISC CBA_Discrepancy
0
150 ms P0524ENa
INP_52a_A
INP_52a_A
CBA_A
CBA_STATUS_ALARM
P0525ENa
FIGURE 122 - NON COMPLEMENTARY OF 52a/52b NOT LONG ENOUGH FOR GETTING THE ALARM
INP_52a_A
INP_52b_A
CBA_A
CBA_STATUS_ALARM
P0526ENa
FIGURE 123 - COMPLEMENTARY OF 52a/52b IS LONG ENOUGH FOR GETTING THE ALARM
INP_52a_A
CBA_A
CBA_STATUS_ALARM
P0527ENa
INP_52b_A
CBA_A
CBA_STATUS_ALARM
P0528ENa
External TripA
External TripB
External TripC
From External Protection Devices (via Opto Inputs)- see General trip logic Figure 106.
If these optos inputs are assigned as External Trip A, External Trip B and External Trip C
– their change will update the CB Operation counter.
(External trip is integrated in the DDB: Any Trip.No Dwell timer is associated as for an
internal trip. (see Figure 106: trip logic)
P44x/EN AP/F65 Application Notes
CB aux A(52a)
CB aux B(52a)
CB aux C(52a)
CB aux A(52b)
CB aux B(52b)
CB aux C(52b)
The DDB CB Aux if assigned to an opto input in the PSL and when energized, will be used
for Any pole dead & All pole dead internal logic & Discrepency logic
CB Discrepancy
Used for internal CBA_Disc issued by external (opto) or internal detection (CB Aux)
4.12.2.2 Outputs
CB Status Alarm
Picks up when CB Discrepancy status is detected after CBA timer issued externally by opto
or internally by CB Aux
CB aux A
CB aux B
CB aux C
Pole A+B+C detected Dead pole by internal logic or CB status
TABLE 19
This lower value eliminates fleeting pickups that may occur during a battery earth fault, when
stray capacitance may present up to 50% of battery voltage across an input.
Each input also has selectable filtering which can be utilised. This allows use of a pre-set
filter of ½ cycle which renders the input immune to induced noise on the wiring: although this
method is secure it can be slow, particularly for intertripping. This can be improved by
switching off the ½ cycle filter in which case one of the following methods to reduce ac noise
should be considered. The first method is to use double pole switching on the input, the
second is to use screened twisted cable on the input circuit.
P44x/EN AP/F65 Application Notes
• Enables the mapping of opto-isolated inputs, relay output contacts and the
programmable LED’s.
• Fault Recorder start mapping, i.e. which internal signals initiate a fault record.
• Enables customer specific scheme logic to be generated through the use of the PSL
editor inbuilt into the MiCOM S1 support software.
Further information regarding editing and the use of PSL can be found in the MiCOM S1
user manual. The following section details the default settings of the PSL. Note that
changes to these defaults can only be carried out using the PSL editor and not via the relay
front-plate.
5.1 HOW TO USE PSL Editor?
OFF Line method:
− Open first the application free software delivered with the relay: MiCOM S1 (can be
also downloaded from the web)
− Open a blancking scheme or a default scheme with the good model number
(File\New\Default Scheme or Blanck Scheme)
Selection of type of relay & model number is done in that window (Version software is
displayed for compatibility ) – Italian is available with model ?40X?
ON Line method:
− Any group from 1 to 4 can be modified (ref of group must be validated before
resenting the file from PC to relay)
Before creating a dedicated PSL for covering customized application ; please refer to the
DDB description cell by cell (conditions of set & reset) in the table included in the annex A at
the end of that technical guide.
Some additive cells can be present regarding the type of model used by the software
embedded in the relay.
The type of model used by the relay in the settings or PSL is displayed in the bottom of your
screen by that line:
− Version A: Optos are in 48VDC polarised (can be energised with the internal field
voltage offered by the relay (–J7/J9-J8/J10 in a P441)
− Version B: Optos are universal and opto range can be selected in MiCOM S1 by:
Opto A - 48VDC:
The opto inputs are specified to operate between 30 and 60V to ensure there is enough
current flowing through the opto diode to guarantee operation with component tolerances,
temperature and CTR degradation over time.
Between 13-29V is the uncertainty band.
Below 12V, logical status is guaranteed Off
Opto B – Universal opto inputs:
These margins ensure that ground faults on substation batteries do not create mal-operation
of the opto inputs.
Application Notes P44x/EN AP/F65
Or “Custom” can be selected in the menu to offer the possibility to adjust a different voltage
pick-up for any optos inputs:
P44x/EN AP/F65 Application Notes
Opto
Input P441 Relay P442 Relay P444 Relay
N°
1 Channel Receive (Distance Channel Receive (Distance Channel Receive (Distance
or DEF) or DEF) or DEF)
2 Channel out of Service Channel out of Service Channel out of Service
(Distance or DEF) (Distance or DEF) (Distance or DEF)
3 MCB/VTS Line MCB/VTS Line MCB/VTS Line
(Z measurement-Dist) (Z measurement-Dist) (Z measurement-Dist)
4 Block Block Block
Autoreclose(LockOut) Autoreclose(LockOut) Autoreclose(LockOut)
5 Circuit Breaker Healthy Circuit Breaker Healthy Circuit Breaker Healthy
6 Circuit breaker Manual Circuit breaker Manual Circuit breaker Manual
Close external order Close external order Close external order
7 Reset Lockout Reset Lockout Reset Lockout
8 Disable Autoreclose (1pole Disable Autoreclose (1- Disable Autoreclose (1-
and 3poles) pole and 3poles) pole and 3poles)
9 Not allocated Not allocated
10 Not allocated Not allocated
11 Not allocated Not allocated
12 Not allocated Not allocated
13 Not allocated Not allocated
14 Not allocated Not allocated
15 Not allocated Not allocated
16 Not allocated Not allocated
17 Not allocated
18 Not allocated
19 Not allocated
20 Not allocated
21 Not allocated
22 Not allocated
23 Not allocated
24 Not allocated
Application Notes P44x/EN AP/F65
Relay
Contact P441 Relay P442 Relay P444 Relay
N°
1 TripA+B+C & Z1 TripA+B+C & Z1 TripA+B+C & Z1
2 Any Trip Phase A Any Trip Phase A Any Trip Phase A
3 Any Trip Phase B Any Trip Phase B Any Trip Phase B
4 Any Trip Phase C AnyTrip Phase C Any Trip Phase C
5 Signal send (Dist. or DEF) Signal send (Dist. or DEF) Signal send (Dist. or DEF)
6 Any Protection Start Any Protection Start Any Protection Start
7 Any Trip Any Trip Any Trip
8 General Alarm General Alarm General Alarm
9 DEF A+B+C Trip DEF A+B+C Trip DEF A+B+C Trip
+ IN>1Trip + IN>1Trip + IN>1Trip
+ IN>2Trip + IN>2Trip + IN>2Trip
10 Dist. Trip &Any Dist. Trip &Any Dist. Trip &Any
Zone&DistUnb CR Zone&DistUnb CR Zone&DistUnb CR
11 Autoreclose lockout Autoreclose lockout Autoreclose lockout
12 Autoreclose 1P+3P cycle Autoreclose 1P+3P cycle Autoreclose 1P+3P cycle
in progress in progress in progress
13 A/R Close A/R Close A/R Close
14 Power Swing Detected Power Swing Detected Power Swing Detected
15 Not allocated Not allocated
16 Not allocated Not allocated
17 Not allocated Not allocated
18 Not allocated Not allocated
19 Not allocated Not allocated
20 Not allocated Not allocated
21 Not allocated Not allocated
22 Not allocated Not allocated
23 Not allocated
24 Not allocated
25 Not allocated
26 Not allocated
27 Not allocated
28 Not allocated
29 Not allocated
30 Not allocated
31 Not allocated
32 Not allocated
Note that when 3 pole tripping is selected in the relay menu, all trip contacts: Trip A, Trip B,
Trip C, and Any Trip close simultaneously.
P44x/EN AP/F65 Application Notes
Relay
Contact P441 Relay P442 Relay P444 Relay
N°
1 Straight Straight Straight
2 Straight Straight Straight
3 Straight Straight Straight
4 Straight Straight Straight
5 Straight Straight Straight
6 Straight Straight Straight
7 Straight Straight Straight
8 Straight Straight Straight
9 Straight Straight Straight
10 Straight Straight Straight
11 Straight Straight Straight
12 Straight Straight Straight
13 Straight Straight Straight
14 Straight Straight Straight
15 Not allocated Not allocated
16 Not allocated Not allocated
17 Not allocated Not allocated
18 Not allocated Not allocated
19 Not allocated Not allocated
20 Not allocated Not allocated
21 Not allocated Not allocated
22 Not allocated Not allocated
23 Not allocated
24 Not allocated
25 Not allocated
26 Not allocated
27 Not allocated
28 Not allocated
29 Not allocated
30 Not allocated
31 Not allocated
32 Not allocated
NOTE: Others conditions of relays logic are available in the relays design by
PSL.
Pulse Timer
Pick UP/Drop Off Timer
Dwell Timer
Pick Up Timer
Drop Off Timer
Latching
Straight (Transparent)
Application Notes P44x/EN AP/F65
Input
Output Pulse setting
Pulse Timer Input
Output Pulse setting
Input
Input
Input
Timer setting
Output
Pick Up Timer Input
Timer setting
Output
Input
P0562ENa
FIGURE 127
If the fault recorder trigger is not assigned in the PSL, no Fault recorder can be initiated and
displayed in the list by the LCD front panel.
Application Notes P44x/EN AP/F65
− Integration of InterMiCOM
− Integration of Ethernet board with UCA2 protocol (61850 -8-1 available soon)
− Addition of a settable time delay to prevent maloperation due to zone evolution from
zone n to zone n-1 by CB operation
− Addition of a tilt characteristic for zone 1 (independent setting for phase-to-ground and
phase-to-phase). Settable between ± 45°
Application Notes P44x/EN AP/F65
− Addition of a tilt characteristic for zone 2 and zone P (common setting for phase-to-
ground and phase-to-phase/Z2 and Zp). Settable between ± 45°
− New DDB:
7.3 New Function Description: OUT OF STEP & STABLE SWING improved
An out of step function has been integrated in the firmware.That logic manage the start of the
OOS by the monitoring of the sign of the biphase loops:
∆X
Zone C
X lim
Z3 ∆R
Zone A
Zone B +R
-R
Out Of Step +R Stable swing
-R lim R lim
R
Z4 -X lim
+R
P0885ENa
For additive details check the section 4.7 of HW Chapter and 2.13.5 of that AP chapter.
New settings (Delta I) have been created also in Power swing (stable swing) with Delta I as a
criteria for unblocking the Pswing logic in case of 3 phase fault (see 2.13.2 in the AP
chapter).
Phase selection has been improved with exaggerated Deltas current (See 2.13.2 of AP
Chapter).
P44x/EN AP/F65 Application Notes
− New DDB:
7.4 Function Improved: DEF
Some improvements have been integrated in DEF function (see HW section 4.9 and AP
section 2.18.3)
Thermal overload protection can be used to prevent electrical plant from operating at
temperatures in excess of the designed maximum withstand. Prolonged overloading causes
excessive heating, which may result in premature ageing of the insulation, or in extreme
cases, insulation failure.
The relay incorporates a current based thermal replica, using load current to model heating
and cooling of the protected plant. The element can be set with both alarm and trip stages.
The heat generated within an item of plant, such as a cable or a transformer, is the resistive
loss (Ι2R x t). Thus, heating is directly proportional to current squared. The thermal time
characteristic used in the relay is therefore based on current squared, integrated over time.
The relay automatically uses the largest phase current for input to the thermal model.
Equipment is designed to operate continuously at a temperature corresponding to its full load
rating, where heat generated is balanced with heat dissipated by radiation etc. Over
temperature conditions therefore occur when currents in excess of rating are allowed to flow
for a period of time. It can be shown that temperatures during heating follow exponential time
constants and a similar exponential decrease of temperature occurs during cooling.
P44x/EN AP/F65 Application Notes
Setting range
Menu text Default setting Step size
Min Max
Thermal Char Single Disabled, Single, Dual
Thermal Trip 1Ιn 0.08Ιn 3.2Ιn 0.01Ιn
Thermal Alarm 70% 50% 100% 1%
Time Constant 1 10 minutes 1 minutes 200 minutes 1 minutes
Time Constant 2 5 minutes 1 minutes 200 minutes 1 minutes
Application Notes P44x/EN AP/F65
An alarm can be raised on reaching a thermal state corresponding to a percentage of the trip
threshold. A typical setting might be ‘Thermal Alarm’ = 70% of thermal capacity.
Note that the thermal time constants given in the above tables are typical only. Reference
should always be made to the plant manufacturer for accurate information.
P44x/EN AP/F65 Application Notes
The 2 Hotkeys in the front panel can perform a direct command if a dedicated PSL has been
previously created using “CONTROL INPUT” cell. In total the MiCOM P440 offers 32 control
inputs which can be activated by the Hotkey manually or by the IEC 103 remote
communication (if that option has been flashed with the firmware of the relay (see also cortec
code)):
The control input can be linked to any DDB cell as: led, relay , internal logic cell (that can be
useful during test & commissioning) - Different condition can be managed for the command
as:
And also the text for passing the command can be selected between:
P44x/EN AP/F65 Application Notes
The labels of the control inputs can be fulfilled by the user (text label customised)
Application Notes P44x/EN AP/F65
The digits in this table allow to provide filtering on selected DDB cells (changed from 1 to 0),
to avoid the transfer of these special cells to a remote station connected to the relay with IEC
103 protocol. It gives the opportunity to filter the not pertinent data.
P44x/EN AP/F65 Application Notes
TABLE 20
This lower value eliminates fleeting pickups that may occur during a battery earth fault, when
stray capacitance may present up to 50% of battery voltage across an input.
Each input also has selectable filtering which can be utilised. This allows use of a pre-set
filter of ½ cycle which renders the input immune to induced noise on the wiring: although this
method is secure it can be slow, particularly for intertripping. This can be improved by
switching off the ½ cycle filter in which case one of the following methods to reduce ac noise
should be considered. The first method is to use double pole switching on the input, the
second is to use screened twisted cable on the input circuit.
Application Notes P44x/EN AP/F65
OUTPUTS DDB:
P44x/EN AP/F65 Application Notes
Blank Scheme
Default Configuration
Open
Save
Display the Windows Print dialog, enabling you to print the current diagram.
Undo
Redo
Redraw
Number of DDBs
Calculate CRC
Calculate unique number based on both the function and layout of the logic.
Compare Files
Compare current file with another stored on disk.
Select
Enable the select function. While this button is active, the mouse pointer is displayed as an
arrow. This is the default mouse pointer. It is sometimes referred to as the selection pointer.
Point to a component and click the left mouse button to select it. Several components may
be selected by clicking the left mouse button on the diagram and dragging the pointer to
create a rectangular selection area.
Application Notes P44x/EN AP/F65
Zoom In
Zoom Out
Zoom
Enable the zoom function. While this button is active, the mouse pointer is displayed as a
magnifying glass. Right-clicking will zoom out and left-clicking will zoom in. Press the ESC
key to return to the selection pointer. Click and drag to zoom in to an area.
Zoom to Fit
Display at the highest magnification that will show all the diagram’s components.
Zoom to Selection
Display at the highest magnification that will show the selected component(s).
Pan
Enable the pan function. While this button is active, the mouse pointer is displayed as a
hand. Hold down the left mouse button and drag the pointer across the diagram to pan.
Press the ESC key to return to the selection pointer.
Logic symbols
This toolbar provides icons to place each type of logic element into the scheme diagram. Not
all elements are available in all devices. Icons will only be displayed for those elements
available in the selected device.
Link
Opto Signal
Input Signal
Output Signal
GOOSE in
Create an input signal to logic to receive a GOOSE message transmitted from another IED.
Used in either UCA2.0 or IEC 61850 GOOSE applications only.
P44x/EN AP/F65 Application Notes
GOOSE out
Create an output signal from logic to transmit a GOOSE message to another IED. Used in
either UCA2.0 or IEC 61850 GOOSE applications only.
Integral Tripping in
Create an input signal to logic that receives an InterMiCOM message transmitted from
another IED.
Control in
Create an input signal to logic that can be operated from an external command.
Function Key
Create a Function Key input signal.
Trigger Signal
Create a Fault Record Trigger.
LED Signal or
Create an LED Signal. Icon shown is dependent upon capability of LED’s i.e. mono-colour or
tri-colour.
Contact Signal
LED Conditioner or
Create an LED Conditioner. Icon shown is dependent upon capability of LED’s i.e. mono-
colour or tri-colour.
Contact Conditioner
Timer
Create a Timer.
AND Gate
Create an AND Gate.
OR Gate
Create an OR Gate.
Programmable Gate
Alignment tools
Align Top
Align all selected components so the top of each is level with the others.
Align Middle
Align all selected components so the middle of each is level with the others.
Align Bottom
Align all selected components so the bottom of each is level with the others.
Align Left
Align all selected components so the leftmost point of each is level with the others.
Align Centre
Align all selected components so the centre of each is level with the others.
Align Right
Align all selected components so the rightmost point of each is level with the others.
Drawing tools
Rectangle
When selected, move the mouse pointer to where you want one of the corners to be, hold
down the left mouse button and move it to where you want the diagonally opposite corner to
be. Release the button. To draw a square hold down the SHIFT key to ensure height and
width remain the same.
Ellipse
When selected, move the mouse pointer to where you want one of the corners to be, hold
down the left mouse button and move until the ellipse is the size you want it to be. Release
the button. To draw a circle hold down the SHIFT key to ensure height and width remain the
same.
Line
When selected, move the mouse pointer to where you want the line to start, hold down left
mouse, move to the position of the end of the line and release button. To draw horizontal or
vertical lines only hold down the SHIFT key.
Polyline
When selected, move the mouse pointer to where you want the polyline to start and click the
left mouse button. Now move to the next point on the line and click the left button. Double
click to indicate the final point in the polyline.
P44x/EN AP/F65 Application Notes
Curve
When selected, move the mouse pointer to where you want the polycurve to start and click
the left mouse button. Each time you click the button after this a line will be drawn, each line
bisects its associated curve. Double click to end. The straight lines will disappear leaving the
polycurve. Note: whilst drawing the lines associated with the polycurve, a curve will not be
displayed until either three lines in succession have been drawn or the polycurve line is
complete.
Text
When selected, move the mouse pointer to where you want the text to begin and click the
left mouse button. To change the font, size or colour, or text attributes select Properties from
the right mouse button menu.
Image
When selected, the Open dialog is displayed, enabling you to select a bitmap or icon file.
Click Open, position the mouse pointer where you want the image to be and click the left
mouse button.
Nudge tools
The nudge tool buttons enable you to shift a selected component a single unit in the selected
direction, or five pixels if the SHIFT key is held down.
As well as using the tool buttons, single unit nudge actions on the selected components can
be achieved using the arrow keys on the keyboard.
Nudge Up
Shift the selected component(s) upwards by one unit. Holding down the SHIFT key while
clicking on this button will shift the component five units upwards.
Nudge Down
Shift the selected component(s) downwards by one unit. Holding down the SHIFT key while
clicking on this button will shift the component five units downwards.
Nudge Left
Shift the selected component(s) to the left by one unit. Holding down the SHIFT key while
clicking on this button will shift the component five units to the left.
Nudge Right
Shift the selected component(s) to the right by one unit. Holding down the SHIFT key while
clicking on this button will shift the component five units to the right.
Rotation tools
Free Rotate
Enable the rotation function. While rotation is active components may be rotated as required.
Press the ESC key or click on the diagram to disable the function.
Rotate Left
Rotate Right
Flip Horizontal
Flip Vertical
The structure toolbar enables you to change the stacking order of components.
Bring to Front
Send to Back
Bring Forward
Send Backward
• File
• Edit
• View
• Device
Application Notes P44x/EN AP/F65
File menu
Open…
Displays the Open file dialogue box, enabling you to locate and open an existing GOOSE
configuration file.
Save
Save the current file.
Save As…
Save the current file with a new name or in a new location.
Print…
Print the current GOOSE configuration file.
Print Preview
Preview the hardcopy output with the current print setup.
Print Setup…
Display the Windows Print Setup dialogue box allowing modification of the printer settings.
Exit
Quit the application.
P44x/EN AP/F65 Application Notes
Edit menu
Rename…
Rename the selected IED.
New Enrolled IED…
Add a new IED to the GOOSE configuration.
New Virtual Input…
Add a new Virtual Input to the GOOSE In mapping configuration.
New Mapping…
Add a new bit-pair to the Virtual Input logic.
Delete Enrolled IED
Remove an existing IED from the GOOSE configuration.
Delete Virtual Input
Delete the selected Virtual Input from the GOOSE In mapping configuration.
Delete Mapping
Remove a mapped bit-pair from the Virtual Input logic.
Reset Bitpair
Remove current configuration from selected bit-pair.
Delete All
Delete all mappings, enrolled IED’s and Virtual Inputs from the current GOOSE configuration
file.
Application Notes P44x/EN AP/F65
View menu
Toolbar
Show/hide the toolbar.
Status Bar
Show/hide the status bar.
Properties…
Show associated properties for the selected item.
P44x/EN AP/F65 Application Notes
Device menu
Open Connection
Display the Establish Connection dialog, enabling you to send and receive data from the
connected relay.
Close Connection
Closes active connection to a relay.
Send to Relay
Send the open GOOSE configuration file to the connected relay.
Receive from Relay
Extract the current GOOSE configuration from the connected relay.
Communications Setup
Displays the Local Communication Settings dialogue box, enabling you to select or configure
the communication settings.
The toolbar
Open
Opens an existing GOOSE configuration file.
Save
Save the active document.
Print
Display the Print Options dialog, enabling you to print the current configuration.
View Properties
Show associated properties for the selected item.
Application Notes P44x/EN AP/F65
The signals in the GOOSE In settings of enrolled IED’s are mapped to Virtual Inputs by
selecting New Mapping from the Edit menu. Refer to section below for use of these signals
in logic.
7.9.3.4 GOOSE In settings
Virtual inputs
The GOOSE Scheme Logic interfaces with the Programmable Scheme Logic by means of
32 Virtual Inputs. The Virtual Inputs are then used in much the same way as the Opto Input
signals.
The logic that drives each of the Virtual Inputs is contained within the relay’s GOOSE
Scheme Logic file. It is possible to map any number of bit-pairs, from any enrolled device,
using logic gates onto a Virtual Input.
The following gate types are supported within the GOOSE Scheme Logic:
To add a Virtual Input to the GOOSE logic configuration, select New Virtual Input from the
Edit menu and configure the input number. If required, the gate type can be changed once
input mapping to the Virtual Input has been made.
Application Notes P44x/EN AP/F65
Mapping
GOOSE In signals from enrolled IED’s are mapped to logic gates by selection of the required
bit-pair from either the DNA or User Status section of the inputs.
The value required for a logic 1 or ON state is specified in the State box. The input can be
inverted by checking Input Inversion (equivalent to a NOT input to the logic gate).
GOOSE Out settings
The structure of information transmitted via UCA2.0 GOOSE is defined by the ’Protection
Action’ (PACT) common class template, defined by GOMFSE (Generic Object Models for
Substation and Feeder Equipment).
A UCA2.0 GOOSE message transmitted by a Px40 relay can carry up to 96 Digital Data Bus
signals, where the monitored signals are characterised by a two-bit status value, or "bit-pair".
The value transmitted in the bit-pair is customisable although GOMFSE recommends the
following assignments:
The PACT common class splits the contents of a UCA2.0 GOOSE message into two main
parts; 32 DNA bit-pairs and 64 User Status bit-pairs.
The DNA bit-pairs are intended to carry GOMSFE defined protection scheme information,
where supported by the device. MiCOM Px40 implementation provides full end-user
flexibility, as it is possible to assign any Digital Data Bus signal to any of the 32 DNA bit-
pairs. The User Status bit pairs are intended to carry all ‘user-defined’ state and control
information. As with the DNA, it is possible to assign any Digital Data Bus signal to these bit-
pairs.
P44x/EN AP/F65 Application Notes
To ensure full compatibility with third party UCA2.0 GOOSE enabled products, it is
recommended that the DNA bit-pair assignments are as per the definition given in GOMFSE.
Send GOOSE configuration settings to an IED
1. Open a connection to the required device by selecting Open Connection from the
Device menu. Refer to Section 2.1.1.6 & 2.1.1.7 for details on configuring the IED
communication settings.
2. Enter the device address in the Establish Connection dialogue box.
3. Enter the relay password.
4. Send the current GOOSE configuration settings to the device by selecting Send to
Relay from the Device menu.
Save IED GOOSE setting files
Select Save or Save As from the File menu.
Print IED GOOSE setting files
1. Select Print from the File menu.
2. The Print Options dialogue is displayed allowing formatting of the printed file to be
configured.
3. Click OK after making required selections.
Application Notes P44x/EN AP/F65
Speed
Permissive
faster
Blocking
slower
low
high
TABLE 23: PROGRAMMING THE RESPONSE FOR EACH OF THE 8 INTERMiCOM SIGNALS
P44x/EN AP/F65 Application Notes
received InterMiCOM messages (received from the remote end relay) being used by the
PSL.
Once the relay operation has been confirmed using the loopback test facilities, it will be
necessary to ensure that the communications between the two relays in the scheme are
reliable. To facilitate this, a list of channel statistics and diagnostics are available in the
InterMiCOM COMMS column – see section 10.2. It is possible to hide the channel
diagnostics and statistics from view by setting the “Ch Statistics” and/or “Ch Diagnostics”
cells to “Invisible”. All channel statistics are reset when the relay is powered up, or by user
selection using the “Reset Statistics” cell.
Another indication of the amount of noise on the channel is provided by the communications
failure alarm. Within a fixed 1.6 second time period the relay calculates the percentage of
invalid messages received compared to the total number of messages that should have
been received based upon the “Baud Rate” setting. If this percentage falls below the
threshold set in the “IM Msg Alarm Lvl” cell, a “Message Fail” alarm will be raised.
Settings
The settings available in the INTERMiCOM COMMS menu column are as follows:
TABLE 25
Application Notes P44x/EN AP/F65
Ch Statistics
Rx Direct Count No. of Direct Tripping messages received with the correct message
structure and valid CRC check.
Rx Perm Count No. of Permissive Tripping messages received with the correct
message structure.
Rx Block Count No. of Blocking messages received with the correct message structure.
Rx NewDataCount No. of different messages received.
Rx ErroredCount No. of incomplete or incorrectly formatted messages received.
Lost Messages No. of messages lost within the previous time period set in “Alarm
Window” cell.
Elapsed Time Time in seconds since the InterMiCOM channel statistics were reset.
Ch Diagnostics
Data CD Status Indicates when the DCD OK = DCD is energised
line (pin 1) is energised. FAIL = DCD is de-energised
Absent = InterMiCOM board is not fitted
Unavailable = hardware error present
FrameSync Status Indicates when the OK = valid message structure and
message structure and synchronisation
synchronisation is valid. FAIL = synchronisation has been lost
Absent = InterMiCOM board is not fitted
Unavailable = hardware error present
Message Status Indicates when the OK = acceptable ratio of lost messages
percentage of received FAIL = unacceptable ratio of lost messages
valid messages has
fallen below the Absent = InterMiCOM board is not fitted
“IM Msg Alarm Lvl” Unavailable = hardware error present
setting within the alarm
time period.
Channel Status Indicates the state of the OK = channel healthy
InterMiCOM FAIL = channel failure
communication channel.
Absent = InterMiCOM board is not fitted
Unavailable = hardware error present
IM H/W Status Indicates the state of the OK = InterMiCOM hardware healthy
InterMiCOM hardware. Read Error = InterMiCOM hardware failure
Write Error = InterMiCOM hardware failure
Absent = InterMiCOM board is either not
fitted or failed to initialise
TABLE 26
It is possible to hide the channel diagnostics and statistics from view by setting the “Ch
Statistics” and/or “Ch Diagnostics” cells to “Invisible”. All channel statistics are reset when
the relay is powered up, or by user selection using the “Reset Statistics” cell.
P44x/EN AP/F65 Application Notes
Setting range
Menu text Default setting Step size
Min Max
Fn Key 11 Unlocked Disabled, Locked, Unlocked
Fn Key 11 Mode Normal Toggled, Normal
Fn Key 11 Label Function Key 11
Fn Key 12 Unlocked Disabled, Locked, Unlocked
Fn Key 12 Mode Normal Toggled, Normal
Fn Key 12 Label Function Key 12
Fn Key 13 Unlocked Disabled, Locked, Unlocked
Fn Key 13 Mode Normal Toggled, Normal
Fn Key 13 Label Function Key 13
Fn Key 14 Unlocked Disabled, Locked, Unlocked
Fn Key 14 Mode Normal Toggled, Normal
Fn Key 14 Label Function Key 14
Fn Key 15 Unlocked Disabled, Locked, Unlocked
Fn Key 15 Mode Normal Toggled, Normal
Fn Key 15 Label Function Key 15
Fn Key 16 Unlocked Disabled, Locked, Unlocked
Fn Key 16 Mode Normal Toggled, Normal
Fn Key 16 Label Function Key 16
Fn Key 17 Unlocked Disabled, Locked, Unlocked
Fn Key 17 Mode Normal Toggled, Normal
Fn Key 17 Label Function Key 17
Fn Key 18 Unlocked Disabled, Locked, Unlocked
Fn Key 18 Mode Normal Toggled, Normal
Fn Key 18 Label Function Key 18
Fn Key 19 Unlocked Disabled, Locked, Unlocked
Fn Key 19 Mode Normal Toggled, Normal
Fn Key 19 Label Function Key 19
Fn Key 20 Unlocked Disabled, Locked, Unlocked
Fn Key 20 Mode Normal Toggled, Normal
Fn Key 20 Label Function Key 20
P44x/EN AP/F65 Application Notes
Fn Key 1
The activation of the function key will drive an associated DDB signal and the DDB signal will
remain active depending on the programmed setting i.e. toggled or normal. Toggled mode
means the DDB signal will remain latched or unlatched on key press and normal means the
DDB will only be active for the duration of the key press. For example, function key 1 should
be operated in order to assert DDB #676.
LED 1 Red
Eight programmable tri-colour LEDs that can be programmed to indicate red, yellow or green
as required. The green LED is configured by driving the green DDB input. The red LED is
configured by driving the red DDB input. The yellow LED is configured by driving the red and
green DDB inputs simultaneously. When the LED is activated the associated DDB signal will
be asserted. For example, if Led 1 Red is activated, DDB #640 will be asserted.
LED 1 Grn
The same explanation as for LED 1 Red applies.
P44x/EN AP/F65 Application Notes
Zone q signals
Zq input signal is activated when zone q starts.
TZq input signal is activated when the timer has elapsed.
TZq Timer block is an output signal. Its activation blocks the timer.
VN>1 timer block is an output signal. If it is on, the first stage residual overvoltage timer is
blocked.
VN>2 timer block is an output signal. If it is on, the second stage residual overvoltage timer
is blocked.
S R F
E
ZS ZL
A-G
VAG
VAG
VAG VRES
VAG VRES
V BG V BG V BG
E S R F
ZS ZL
N
ZE A-G
VAG
S VAG
G,F R G,F
G,F
VCG VCG
VCG
VBG VBG VBG
Z S0 + 3Z E
VRES = x3E
2Z S1 + Z S0 + 2Z L1 + Z L0 + 3Z E
P0118ENb
As shown in the figure above, a resistance earthed system will always generate a relatively
large degree of residual voltage, as the zero sequence source impedance now includes the
earthing impedance. It follows then, that the residual voltage generated by an earth fault on
an insulated system will be the highest possible value (3 x phase-neutral voltage), as the
zero sequence source impedance is infinite.
From the above information it can be seen that the detection of a residual overvoltage
condition is an alternative means of earth fault detection, which does not require any
measurement of zero sequence current. This may be particularly advantageous at a tee
terminal where the infeed is from a delta winding of a transformer (and the delta acts as a
zero sequence current trap).
It must be noted that where residual overvoltage protection is applied, such a voltage will be
generated for a fault occurring anywhere on that section of the system and hence the NVD
protection must co-ordinate with other earth/ground fault protection.
P44x/EN AP/F65 Application Notes
Setting range
Menu text Default setting Step size
Min Max
VN>1 Function DT Disabled, DT, IDMT
VN>1 Voltage Set 5V 1V 80 V 1V
VN>1 Time Delay 5.00 s 0s 100.0 s 0.01 s
VN>1 TMS 1.0 0.5 100.0 0.5
VN>1 tReset 0s 0s 100.0 s 0.5 s
VN>2 Status Disabled Enabled, Disabled
VN>2 Voltage Set 10 V 1V 80 V 1V
VN>2 Time Delay 10.00 s 0s 100.0 s 0.01 s
Setting range
Menu text Default setting Step size
Min Max
CT polarity Standard Standard, Inverted
Technical Data P44x/EN TD/F65
TECHNICAL DATA
Technical Data P44x/EN TD/F65
CONTENT
1. RATINGS 5
1.1 Currents 5
1.2 Voltages 5
1.3 Auxiliary Voltage 6
1.4 Frequency 6
1.5 Logic inputs 6
1.6 Output Relay Contacts 7
1.7 Field Voltage 7
1.8 Loop through connections 7
1.9 Wiring requirements 7
1.10 Terminals 7
2. BURDENS 8
2.1 Current Circuit 8
2.2 Voltage Circuit 8
2.3 Auxiliary Supply 8
2.4 Optically-Isolated Inputs 8
3. ACCURACY 9
3.1 Reference Conditions 9
3.2 Measurement Accuracy 9
3.3 Protection accuracy 10
3.4 Thermal Overload Accuracy 12
3.5 Influencing Quantities 12
3.6 High Voltage Withstand IEC60255-5:1977 12
3.6.1 Dielectric Withstand 12
3.6.2 Impulse 13
3.6.3 Insulation Resistance 13
4. ENVIRONMENTAL COMPLIANCE 14
4.1 Electrical Environment 14
4.1.1 DC Supply Interruptions IEC60255-11:1979 14
4.1.2 AC Ripple on DC Supply IEC60255-11:1979 14
4.1.3 Disturbances on AC Supply - EN61000-4-11:1994 14
4.1.4 High Frequency Disturbance IEC60255-22-1:1988 14
4.1.5 Fast Transient IEC60255-22-4:1992 14
4.1.6 Electrostatic Discharge IEC60255-22-2:1996 14
4.1.7 Conducted Emissions EN 55011:1991 14
4.1.8 Radiated Emissions EN 55011:1991 14
P44x/EN TD/F65 Technical Data
7. MEASUREMENT SETTINGS 29
7.1 Disturbance Recorder Settings 29
7.2 Fault Locator Settings 29
BLANK PAGE
Technical Data P44x/EN TD/F65
1. RATINGS
1.1 Currents
All current inputs will withstand the following, with any current function setting:
Withstand Duration
4 Ιn Continuous rating
4.5 Ιn 10 minutes
5 Ιn 5 minutes
6 Ιn 3 minutes
7 Ιn 2 minutes
30 Ιn 10 seconds
50 Ιn 3 seconds
100 Ιn 1 second
1.2 Voltages
Duration Withstand
(Vn = 100/120V)
Continuous rating (2 Vn) 240 Vph - ph rms
10 seconds (2.6 Vn) 312 Vph - ph rms
P44x/EN TD/F65 Technical Data
1.4 Frequency
The nominal frequency (fn) is dual rated 50/60 Hz, the operating range is 45 Hz to 65 Hz.
1.5 Logic inputs
All the logic inputs are independent and isolated, relay type P441 provides 8 inputs, 16
inputs are provided by the P442.
Rating Range
Logical “off” 0 V dc 0 - 12 V dc
Logical “on” 50 V dc 30 - 60 V dc
Higher voltages can be used in conjunction with an external resistor, value of the resistor is
determined by the following equation:
Watchdog Contact
Break DC: 30 W resistive
DC: 15 W inductive (L/R = 40ms)
AC: 275 W inductive (cos φ = 0.7)
• BNC socket
• 10/100 Mbit/s Copper Ethernet (RJ45 connector) and 100 Mbit/s Fibre Optic Ethernet
(SC connector for glass fibre).
2. BURDENS
2.1 Current Circuit
* Nominal is with 50% of the optos energised and one relay per board energised
** Maximum is with all optos and all relays energised.
For each energised Opto powered from the Field Voltage or each energised Output Relay:
3. ACCURACY
For all accuracies specified, the repeatability is ±2.5% unless otherwise specified.
If no range is specified for the validity of the accuracy, then the specified accuracy shall be
valid over the full setting range.
3.1 Reference Conditions
Negative Sequence Overcurrent (I2>) 2 to 20 Is [1] Is±5% 0.95Is±5% greater of ±5% or 40ms
Under Current element (I<) 0.2 - 1.2 In Accuracy: ±10% ±5% Above setting: 10ms or less
Below setting: 15ms or less
Under Voltage elements (V<) DT: Vs±5% greater of 2% or 20ms
Vn = 100/120 V 10 - 120V IDMT: 0.95Vs±5% 1.05Vs±5% greater of 5% or 40ms
Over Voltage elements (V>&V>>) DT: Vs±5% greater of 2% or 20ms
Vn = 100/120 V 60 - 185V IDMT: 1.05Vs±5% 0.95Vs±5% greater of 5% or 40ms
Directional Operating Boundary 0 - 360° Accuracy: ±2° - greater of 2% or 20ms
Technical Data P44x/EN TD/F65
⎛ I 2⎞ ⎛ I 2⎞ ⎛ I 2⎞
Broken conductor protection ⎜ ⎟ 0.2 to 1.0 ⎜ ⎟ ±5% 0.95 ⎜ ⎟ ±5% greater of ±2% or 20ms
⎝ I1⎠ ⎝ I1⎠ ⎝ I1⎠
Transient Overreach 2 to 20 Is <5% (for a system - --
X/R of up to 90)
Relay overshoot 2 to 20 Is <50ms - -
Breaker fail timers 0 to 10s - - greater of ±2% or 20ms
P44x/EN TD/F65 Technical Data
* Operating time measured with applied current of 20% above thermal setting.
3.5 Influencing Quantities
No additional errors will be incurred for any of the following influencing quantities:
3.6.2 Impulse
The product will withstand without damage impulses of 5 kV peak, 1.2/50 µs, 0.5 J across:
Each independent circuit and the case with the terminals of each independent circuit
connected together.
Independent circuits with the terminals of each independent circuit connected together.
Terminals of the same circuit except normally open metallic contacts.
3.6.3 Insulation Resistance
4. ENVIRONMENTAL COMPLIANCE
The product complies with the following specifications:
4.1 Electrical Environment
4.1.1 DC Supply Interruptions IEC60255-11:1979
The product will withstand a 20 ms interruption in the auxiliary voltage in its quiescent
condition.
4.1.2 AC Ripple on DC Supply IEC60255-11:1979
The product will operate with 12% AC ripple on the DC auxiliary supply without any
additional measurement errors.
4.1.3 Disturbances on AC Supply - EN61000-4-11:1994
The products satisfies the requirements of EN61000-4-11 for voltage dips and short
interruptions.
4.1.4 High Frequency Disturbance IEC60255-22-1:1988
The product complies with Class III 2.5 kV common mode and 1 kV differential mode for 2
seconds at 1 MHz with 200 Ω source impedance, without any mal-operations or additional
measurement errors.
4.1.5 Fast Transient IEC60255-22-4:1992
The product complies with all classes up to and including class IV / 4 kV without any mal-
operations or additional measurement errors.
Fast transient disturbances on power supply 4 kV, 5 ns rise time, 50 ns decay time, 5 kHz
(common mode only) repetition frequency, 15 ms burst, repeated
every 300 ms for 1 min in each polarity, with
a 50 Ω source impedance.
Fast transient disturbances on I/O signal, 4 kV, 5 ns rise time, 50 ns decay time, 5 kHz
data and control lines (common mode only) repetition frequency, 15 ms burst, repeated
every 300 ms for 1 min in each polarity, with
a 50 Ω source impedance.
In = 1 A In = 5 A
Setting Range Step size Range Step size
Positive sequence impedance (Z1) 0.001 - 500 Ω 0.001 Ω 0.0002 - 100,0 Ω 0.0002 Ω
Setting In = 1 A In = 5 A
Range Step size Range Step size
Impedance reaches 0.001 - 500 Ω 0.001 Ω 0.0002 - 100 Ω 0.0002 Ω
(Zones 1, 2, 3, P, Q, 4)
Resistive reaches for phase - 0 - 400 Ω 0.01 Ω 0 - 80 Ω 0.002 Ω
earth faults
(Zones 1, 2, 3, P, Q, 4)
Resistive reaches for phase - 0 - 400 Ω 0.01 Ω 0 - 80 Ω 0.002 Ω
earth faults
(Zones 1, 2, 3, P, Q, 4)
In = 1 A In = 5 A
Setting Range Step size Range Step size
Powerswing detection boundaries:
Delta R 0 - 400 Ω 0.01 Ω 0 - 80 Ω 0.002 Ω
Delta X 0 - 400 Ω 0.01 Ω 0 - 80 Ω 0.002 Ω
Setting Range
Signal Send Zone No Signal Send/ Signal send on Z1/ Signal send on Z2/
Signal send on Z4
Type of Scheme on signal None/ None+Z1X/ Aided scheme for Z1 faults/ Aided
Receive scheme for Z2 faults/ Aided scheme for forward faults/
Blocking scheme for Z1 faults/ Blocking scheme for Z2
faults
TD ⎛ K ⎞
t= × ⎜ + L ⎟
7 ⎜ (I/I ) − 1 ⎟
α
⎝ S ⎠
Where
t = operation time
K = constant
I = measured current
IS = current threshold setting
α = constant
L = ANSI/IEEE constant (zero for IEC/UK curves)
TMS = Time Multiplier Setting for IEC/UK curves
TD = Time Dial Setting for IEEE/US curves
IDMT Characteristics
The Inverse Reset characteristics are dependent upon the selected IEEE/US IDMT curve as
shown in the table below. Thus if IDMT reset is selected the curve selection and Time Dial
setting will apply to both operate and reset.
All inverse reset curves conform to the following formula:
⎛ TD ⎞ ⎛⎜ tr ⎞
⎟
t Re set = ⎜ ⎟ ×⎜ α ⎟
⎝ 7 ⎠ ⎝ 1− (I I ) ⎠
S
Where
tReset = reset time
tr = constant
I = measured current
IS = current threshold setting
α = constant
TD = Time Dial Setting (Same setting as that employed by IDMT curve)
K
t=
(1 − M )
Where
K = Time Multiplier Setting
T = Operating time in seconds
M = Applied input voltage / Relay setting voltage (Vs)
K
t=
( M − 1)
Technical Data P44x/EN TD/F65
Where
K = Time Multiplier Setting
T = Operating time in seconds
M = Applied input voltage / Relay setting voltage (Vs)
7. MEASUREMENT SETTINGS
7.1 Disturbance Recorder Settings
8.2 Auto-Reclose
8.2.1 Options
The Auto-recloser in the distance protection allows either single* or three pole for the first
shot. The following shots are three pole only. Due to the complexity of the logic the
Application notes should be referred to.
NOTE: *P442 and P444 only
8.2.2 Auto-recloser settings
BLANK PAGE
Installation P44x/EN IN/F65
INSTALLATION
Installation P44x/EN IN/F65
CONTENT
1. RECEIPT OF RELAYS 3
2. STORAGE 3
3. UNPACKING 3
4. RELAY MOUNTING 4
4.1 Rack mounting 5
4.2 Panel mounting 6
5. RELAY WIRING 8
5.1 Medium and heavy duty terminal block connections 8
5.2 RS485 port 8
5.3 IRIG-B connections (if applicable) 9
5.4 RS232 port 9
5.5 Download/monitor port 9
5.6 Earth connection 9
P44x/EN IN/F65 Installation
BLANK PAGE
Installation P44x/EN IN/F65
1. RECEIPT OF RELAYS
Protective relays, although generally of robust construction, require careful treatment prior to
installation on site. Upon receipt, relays should be examined immediately to ensure no
external damage has been sustained in transit.
If damage has been sustained, a claim should be made to the transport contractor and
AREVA T&D Protection & Control should be promptly notified.
Relays that are supplied unmounted and not intended for immediate installation should be
returned to their protective polythene bags and delivery carton.
Section 3 of this chapter gives more information about the storage of relays.
2. STORAGE
If relays are not to be installed immediately upon receipt, they should be stored in a place
free from dust and moisture in their original cartons. Where de-humidifier bags have been
included in the packing they should be retained. The action of the de-humidifier crystals will
be impaired if the bag is exposed to ambient conditions and may be restored by gently
heating the bag for about an hour prior to replacing it in the carton.
To prevent battery drain during transportation and storage a battery isolation strip is fitted
during manufacture. With the lower access cover open, presence of the battery isolation strip
can be checked by a red tab protruding from the positive side.
Care should be taken on subsequent unpacking that any dust which has collected on the
carton does not fall inside. In locations of high humidity the carton and packing may become
impregnated with moisture and the de-humidifier crystals will lose their efficiency.
Prior to installation, relays should be stored at a temperature of between –25˚C to +70˚C.
3. UNPACKING
Care must be taken when unpacking and installing the relays so that none of the parts are
damaged and additional components are not accidentally left in the packing or lost.
NOTE: With the lower access cover open, the red tab of the battery isolation
strip will be seen protruding from the positive side of the battery
compartment. Do not remove this strip because it prevents battery
drain during transportation and storage and will be removed as part of
the commissioning tests.
Relays must only be handled by skilled persons.
The site should be well lit to facilitate inspection, clean, dry and reasonably free from dust
and excessive vibration. This particularly applies to installations which are being carried out
at the same time as construction work.
P44x/EN IN/F65 Installation
4. RELAY MOUNTING
MiCOM relays are dispatched either individually or as part of a panel/rack assembly.
Individual relays are normally supplied with an outline diagram showing the dimensions for
panel cut-outs and hole centres. This information can also be found in the product
publication.
Secondary front covers can also be supplied as an option item to prevent unauthorised
changing of settings and alarm status. They are available in sizes 40TE (GN0037 001) and
60TE (GN0038 001). Note that the 60TE cover also fits the 80TE case size of the relay.
The design of the relay is such that the fixing holes in the mounting flanges are only
accessible when the access covers are open and hidden from sight when the covers are
closed.
If a P991 or MMLG test block is to be included, it is recommended that, when viewed from
the front, it is positioned on the right-hand side of the relay (or relays) with which it is
associated. This minimises the wiring between the relay and test block, and allows the
correct test block to be easily identified during commissioning and maintenance tests.
P0146XXa
P0147XXa
Further details on mounting MiDOS relays can be found in publication R7012, “MiDOS Parts
Catalogue and Assembly Instructions”.
5. RELAY WIRING
This section serves as a guide to selecting the appropriate cable and connector type for
each terminal on the MiCOM relay.
5.1 Medium and heavy duty terminal block connections
Loose relays are supplied with sufficient M4 screws for making connections to the rear
mounted terminal blocks using ring terminals, with a recommended maximum of two ring
terminals per relay terminal.
If required, AREVA T&D Protection & Control can supply M4 90° crimp ring terminals in three
different sizes depending on wire size (see Table 3). Each type is available in bags of 100.
The IRIG-B input and BNC connector have a characteristic impedance of 50Ω. It is
recommended that connections between the IRIG-B equipment and the relay are made
using coaxial cable of type RG59LSF with a halogen free, fire retardant sheath.
5.4 RS232 port
Short term connections to the RS232 port, located behind the bottom access cover, can be
made using a screened multi-core communication cable up to 15m long, or a total
capacitance of 2500pF. The cable should be terminated at the relay end with a 9-way, metal
shelled, D-type male plug. Chapter 2, Section 3.7 of this manual details the pin allocations.
5.5 Download/monitor port
Short term connections to the download/monitor port, located behind the bottom access
cover, can be made using a screened 25-core communication cable up to 4m long. The
cable should be terminated at the relay end with a 25-way, metal shelled, D-type male plug.
Chapter 2, Section 3.7 of this manual details the pin allocations.
5.6 Earth connection
Every relay must be connected to the local earth bar using the M4 earth studs in the bottom
left hand corner of the relay case. The minimum recommended wire size is 2.5mm2 and
should have a ring terminal at the relay end. Due to the limitations of the ring terminal, the
maximum wire size that can be used for any of the medium or heavy duty terminals is
6.0mm2 per wire. If a greater cross-sectional area is required, two parallel connected wires,
each terminated in a separate ring terminal at the relay, or a metal earth bar could be used.
NOTE: To prevent any possibility of electrolytic action between brass or
copper earth conductors and the rear panel of the relay, precautions
should be taken to isolate them from one another. This could be
achieved in a number of ways, including placing a nickel-plated or
insulating washer between the conductor and the relay case, or using
tinned ring terminals.
Before carrying out any work on the equipment, the user should be familiar with the
contents of the Safety and Technical Data sections and the ratings on the equipment's
rating label
P44x/EN IN/F65 Installation
BLANK PAGE
Commissioning P44x/EN CM/F65
COMMISSIONING
Commissioning P44x/EN CM/F65
CONTENT
1. INTRODUCTION 3
2. SETTING FAMILIARISATION 4
4. PRODUCT CHECKS 6
4.1 With the Relay De-energised 6
4.1.1 Visual Inspection 7
4.1.2 Current Transformer Shorting Contacts 8
4.1.3 External Wiring 9
4.1.4 Insulation 9
4.1.5 Watchdog Contacts 10
4.1.6 Auxiliary Supply 10
4.2 With the Relay Energised 10
4.2.1 Watchdog Contacts 10
4.2.2 Date and Time 10
4.2.3 With an IRIG-B signal (models P442 or P444 only) 11
4.2.4 Without an IRIG-B signal 11
4.2.5 Light Emitting Diodes (LEDs) 11
4.2.6 Field Voltage Supply 12
4.2.7 Input Opto-isolators 12
4.2.8 Output Relays 13
4.2.9 Rear Communications Port 15
4.2.10 Current Inputs 16
4.2.11 Voltage Inputs 16
5. SETTING CHECKS 18
5.1 Apply Application-Specific Settings 18
5.2 Check Application-Specific Settings 18
5.3 Demonstrate Correct Distance Function Operation 19
5.3.1 Functional Tests: Start control & Distance characteristic limits 19
5.3.2 Distance scheme test (if validated in S1 & PSL) 34
5.3.3 Loss of guard/loss of carrier TEST 35
5.3.4 Weak infeed mode test 35
5.3.5 Protection function during fuse failure 36
P44x/EN CM/F65 Commissioning
6. ON-LOAD CHECKS 40
6.1 Voltage Connections 40
6.2 Current Connections 41
7. FINAL CHECKS 42
8. MAINTENANCE 43
8.1 Maintenance Period 43
8.2 Maintenance Checks 43
8.2.1 Alarms 43
8.2.2 Opto-isolators 43
8.2.3 Output Relays 43
8.2.4 Measurement accuracy 43
8.3 Method of Repair 44
8.3.1 Replacing the Complete Relay 44
8.3.2 Replacing a PCB 45
8.4 Recalibration 52
8.5 Changing the battery 52
8.5.1 Instructions for Replacing The Battery 52
8.5.2 Post Modification Tests 53
8.5.3 Battery Disposal 53
Commissioning P44x/EN CM/F65
1. INTRODUCTION
The MiCOM P440 distance protection relays are fully numerical in their design, implementing
all protection and non-protection functions in software. The relays employ a high degree of
self-checking and, in the unlikely event of a failure, will give an alarm. As a result of this, the
commissioning tests do not need to be as extensive as with non-numeric electronic or
electro-mechanical relays.
To commission numeric relays, it is only necessary to verify that the hardware is functioning
correctly and the application-specific software settings have been applied to the relay. It is
considered unnecessary to test every function of the relay if the settings have been verified
by one of the following methods:
Extracting the settings applied to the relay using appropriate setting software (Preferred
method)
Via the operator interface.
To confirm that the product is operating correctly once the application-specific settings have
been applied, a test should be performed on a single protection element.
Unless previously agreed to the contrary, the customer will be responsible for determining
the application-specific settings to be applied to the relay and for testing of any scheme logic
applied by external wiring and/or configuration of the relay’s internal programmable scheme
logic.
Blank commissioning test and setting records are provided at the end of this chapter for
completion as required.
As the relay’s menu language is user-selectable, it is acceptable for the Commissioning
Engineer to change it to allow accurate testing as long as the menu is restored to the
customer’s preferred language on completion.
To simplify the specifying of menu cell locations in these Commissioning Instructions, they
will be given in the form [courier reference: COLUMN HEADING, Cell Text]. For example,
the cell for selecting the menu language (first cell under the column heading) is located in the
System Data column (column 00) so it would be given as [0001: SYSTEM DATA,
Language].
Before carrying out any work on the equipment, the user should be familiar with the contents
of the ‘safety section’ and chapter P44x/EN IN, ‘installation’, of this manual.
P44x/EN CM/F65 Commissioning
2. SETTING FAMILIARISATION
When commissioning a MiCOM P440 relay for the first time, sufficient time should be
allowed to become familiar with the method by which the settings are applied.
Chapter P44x/EN IT contains a detailed description of the menu structure of the relays.
With the secondary front cover in place all keys except the [Enter] key are accessible. All
menu cells can be read. LEDs and alarms can be reset. However, no protection or
configuration settings can be changed, or fault and event records cleared.
Removing the secondary front cover allows access to all keys so that settings can be
changed, LEDs and alarms reset, and fault and event records cleared. However, menu cells
that have access levels higher than the default level will require the appropriate password to
be entered before changes can be made.
Alternatively, if a portable PC is available together with suitable setting software (such as
MiCOM S1), the menu can be viewed a page at a time to display a full column of data and
text. This PC software also allows settings to be entered more easily, saved to a file on disk
for future reference or printed to produce a setting record. Refer to the PC software user
manual for details. If the software is being used for the first time, allow sufficient time to
become familiar with its operation.
Commissioning P44x/EN CM/F65
4. PRODUCT CHECKS
These product checks cover all aspects of the relay that need to be checked to ensure that it
has not been physically damaged prior to commissioning, is functioning correctly and all
input quantity measurements are within the stated tolerances.
If the application-specific settings have been applied to the relay prior to commissioning, it is
advisable to make a copy of the settings so as to allow their restoration later. This could be
done by:
• Obtaining a setting file on a diskette from the customer (This requires a portable PC
with appropriate setting software for transferring the settings from the PC to the relay)
• Extracting the settings from the relay itself (This again requires a portable PC with
appropriate setting software)
• Manually creating a setting record. This could be done using a copy of the setting
record located at the end of this chapter to record the settings as the relay’s menu is
sequentially stepped through via the front panel user interface.
If password protection is enabled and the customer has changed password 2 that prevents
unauthorised changes to some of the settings, either the revised password 2 should be
provided, or the customer should restore the original password prior to commencement of
testing.
NOTE: In the event that the password has been lost, a recovery password
can be obtained from AREVA by quoting the serial number of the
relay. The recovery password is unique to that relay and will not work
on any other relay.
4.1 With the Relay De-energised
The following group of tests should be carried out without the auxiliary supply being applied
to the relay and with the trip circuit isolated.
The current and voltage transformer connections must be isolated from the relay for these
checks. If an MMLG test block is provided, the required isolation can easily be achieved by
inserting test plug type MMLB01 which effectively open-circuits all wiring routed through the
test block.
Before inserting the test plug, reference should be made to the scheme (wiring) diagram to
ensure that this will not potentially cause damage or a safety hazard. For example, the test
block may also be associated with protection current transformer circuits. It is essential that
the sockets in the test plug which correspond to the current transformer secondary windings
are linked before the test plug is inserted into the test block.
DANGER: NEVER OPEN CIRCUIT THE SECONDARY CIRCUIT OF A CURRENT
TRANSFORMER SINCE THE HIGH VOLTAGE PRODUCED MAY BE
LETHAL AND COULD DAMAGE INSULATION.
If a test block is not provided, the voltage transformer supply to the relay should be isolated
by means of the panel links or connecting blocks. The line current transformers should be
short-circuited and disconnected from the relay terminals. Where means of isolating the
auxiliary supply and trip circuit (e.g. isolation links, fuses, MCB, etc.) are provided, these
should be used. If this is not possible, the wiring to these circuits will have to be
disconnected and the exposed ends suitably terminated to prevent them from being a safety
hazard.
Commissioning P44x/EN CM/F65
A B C D E F
P3001ENa
A B C D E F G H J
IRIG-B
TX
RX
P3002ENa
A B C D E F G H J K L M N
1
1
1
1 2 3 19
2
2
3
3
3
4 5 6 20
4
4
5
5
5
IRIG-B
6
6
6
7 8 9 21
7
7
8
8
9
9
9
10 11 12 22
10
10
10
10
10
10
10
10
11
11
11
11
11
11
11
11
12
12
12
12
12
12
12
12
13 14 15 23
13
13
13
13
13
13
13
13
TX
RX
14
14
14
14
14
14
14
14
15
15
15
15
15
15
15
15
16 17 18 24
16
16
16
16
16
16
16
16
17
17
17
17
17
17
17
17
18
18
18
18
18
18
18
18
P3003ENa
2
3
20
4
4
5
6
21
7
8
9
10
11
12
22
10
11
12
13
14
15
23
13
14
16
17
18
24
15
16
17
18
Connection Terminal
K-Bus Modbus or VDEW P441 P442 P444
Screen Screen F16 J16 N16
1 +ve F17 J17 N17
2 –ve F18 J18 N18
The measured voltage values on the relay will either be in primary or secondary volts. If cell
[0D02: MEASURE’T SETUP, Local Values] is set to ‘Primary’, the values displayed on the
relay should be equal to the applied voltage multiplied by the corresponding voltage
transformer ratio set in the ‘VT and CT RATIOS’ menu column (see table 11). If cell [0D02:
MEASURE’T SETUP, Local Values] is set to ‘Secondary’, the value displayed should be
equal to the applied voltage.
The measurement accuracy of the relay is ±2%. However, an additional allowance must be
made for the accuracy of the test equipment being used.
5. SETTING CHECKS
The setting checks ensure that all of the application-specific relay settings (i.e. both the
relay’s function and programmable scheme logic settings) for the particular installation have
been correctly applied to the relay.
If the application-specific settings are not available, ignore sections 5.1 and 5.2.
5.1 Apply Application-Specific Settings
There are two methods of applying the settings:
• Transferring them from a pre-prepared setting file to the relay using a portable PC
running the appropriate software (see compatibility with S1 version in chapter VC) via
the relay’s front RS232 port, located under the bottom access cover, or rear
communications port (with a KITZ protocol converter connected). This method is the
preferred for transferring function settings as it is much faster and there is less margin
for error. If programmable scheme logic other than the default settings with which the
relay is supplied are to be used then this is the only way of changing the settings.
If a setting file has been created for the particular application and provided on a
diskette, this will further reduce the commissioning time and should always be the
case where programmable scheme logic changes are to be applied to the relay.
• Enter them manually via the relay’s operator interface. This method is not suitable for
changing the programmable scheme logic.
• Extract the settings from the relay using a portable PC running the appropriate
software via the front RS232 port, located under the bottom access cover, or rear
communications port (with a KITZ protocol converter connected). Compare the
settings transferred from the relay with the original written application-specific setting
record. (For cases where the customer has only provided a printed copy of the
required settings but a portable PC is available).
• Step through the settings using the relay’s operator interface and compare them with
the original application-specific setting record.
Unless previously agreed to the contrary, the application-specific programmable scheme
logic will not be checked as part of the commissioning tests.
Due to the versatility and possible complexity of the programmable scheme logic, it is
beyond the scope of these commissioning instructions to detail suitable test procedures.
Therefore, when programmable scheme logic tests must be performed, written tests which
will satisfactorily demonstrate the correct operation of the application-specific scheme logic
should be devised by the Engineer who created it. These should be provided to the
Commissioning Engineer together with the diskette containing the programmable scheme
logic setting file.
Commissioning P44x/EN CM/F65
AAAA
NOTE: Every action managed by a laptop, could be done as well by the LCD
front panel (only PSL and Text Editor use a computer)
IA 0,2 IN 0°
Currents IB 0,4 IN - 120°
IC 0,8 IN + 120°
TEST 1
VAN 30 V 0°
Voltages VBN 40 V - 120°
VCN 50 V + 120°
− Control the displayed values in the relay’s front face (LCD): "system/meas1"
− Or primary values (control of ratios VT & CT) – If selected in MiCOM S1 – See Fig 3.
P44x/EN CM/F65 Commissioning
FIGURE 3
NB1: Control the measurement reference (ref. angle of phase shift) in:
"Measurt set up/Measurement ref." (VA by default).
The monitoring can be selected also in MiCOM S1 for providing a polling of the network
parameters (I/U/P/Q/f…)
NB2: In LCD: IN=3I0
After this step the mistakes on phases orders, ratios of CT, VT and
wiring (Analogic input only) will be detected.
NB3: See connections drawing in P44x/EN CO
NB4: See LCD structure in test tools
Commissioning P44x/EN CM/F65
IA IN 20°
Currents IB IN -100°
IC IN +140°
TEST 2
VAN 57 V 0°
Voltages VBN 57 V -120°
VCN 57 V +120°
− If one phase is missing the output Fuse Failure alarm will pick up & the led general
alarm in the front panel will light up (see FFU description P44x /EN AP)
Measurement mode 0 1 2 3
P + - + -
Q - - + +
Selected in S1 by:
W0002ENa
FIGURE 5
P P P P
i u u i u u i u u i u u
i i i i
Q Q Q Q
i u u i u u i u u i u u
i i i i P3014ENa
FIGURE 6
− Control the signs of values P,Q to LCD ("Measurements 2 ") – settable with LCD (see
figure 5)
NOTE: The primary side orientation remains to be achieved (repeat
previously points with a primary injection)
See LCD Structure in chapter HI
Commissioning P44x/EN CM/F65
MEASURE'T SETUP
Default Display
Plant Reference
P3016ENa
− The Vphase voltage has to remain lower than the rated voltage value
Test of the impedance for zone 1:
I1 = 1A
Rfault = R loop
Distance X
Xlim
E
Z
-Rlim ϕ Resistance R
Rlim
P3017ENa
• For phase to phase: Argument of the positive impedance of the line (Z1)
W0003ENa
W0004ENa
FIGURE 10 - EVOLVING IMPEDANCE FROM THE LOAD AREA TO THE FINAL FAULT IMPEDANCE
IN ZONE1
To simulate a default in a zone, it’s necessary to vary progressively the current to move the
point from the load area inside the desired zone.
A single-phase starting characteristic with different values of K0 can be created:
(K0x = (Zx0 - Z1) /(3 Z1) (See P44x /EN AP).
(In S1 there are up to four possibilities KZ1 & KZ2, KZp, KZ3/4)
This solution is carried in case of the underground cable/overhead line section (KZ1
different from KZ2 = KZp = KZ3/4) where arguments between Z01 & Z02 can be very
different (HV Line at 80° and cable at 45°).
Nevertheless the most common injection devices don’t offer the possibility to manage
several values of K0 (the same for ZGraph) ; so it will be necessary for an accurate control of
zones limits,to generate several characteristics files (as much Rio file as KZ values – ref to
ZGraph user ).
P44x/EN CM/F65 Commissioning
W0005ENa
W0006ENa
FIGURE 12
Commissioning P44x/EN CM/F65
In the characteristic above, the marked parts A, B et C are intersections between several
zones.
− Zp < Z4
− RpG ≤ R4G
− RpPh ≤ R4Ph
− The Z minimum value measured by the relay is: 60 mohms (Z1mini adjusted in S1, is
1ohm with CT 1Amp & 200 mohms with CT 5Amp)
− There is no limit for the R/X ratio, because a floating point processor is used for the R
calculation & X calculation (separated dynamic range for each calculation). In
consequence the limit will be given by the angle error of the CT.
For example in PUR with CT accuracy angle at 1° (for IN) it gives a R/X = 5,7 – for keeping
10% of error in the X1 measurement.
• Limit of R: min 0 /Max 80 ohms (CT 5Amp) – min 0/Max400 ohms (CT 1Amp)
• Limit of X: min0,2/100 ohms (CT 5Amp) – min1/Max 500 ohms (CT 1Amp)
P44x/EN CM/F65 Commissioning
− the voltage reference is the line to line voltage between phases, Uab for example;
− the reference current is the difference between the phases current, Ia - Ib for example;
W0007ENa
Uαβ
Fault simulation = 2 x Zd + Rfault
I1
With:
Uαβ : fault voltage phase-to-phase
I1 : fault current
ϕ1 : fault angle
Rfault = R loop
see section 2.2 of P44x/EN AP chapter for Rlim and Zlim explanations
For a triphase fault:
V1 Rfault
Fault simulation = Zd +
I1 2
With:
V1 : fault voltage phase-to-phase
I1 : fault current
ϕ1 : fault angle
Remark: With z graph’s help a Rio format characteristic can be created. This
Rio file can be loaded in a numeric injector which accept this kind of
files. The active settings (distance elements) can be modified by
Zgraph and relay can be upgraded with new distance parameters
For more precision refer to item: Test tools: "Z graph user "
Commissioning P44x/EN CM/F65
W0008ENa
FIGURE 13
Control of single-phase fault characteristic’
CAUTION: IF DIFFERENT K0 ARE USED – SEE § 5.3.1.2
1. Energise MiCOM P440 with a healthy 3phase network (without unbalanced condition)
with load (during a minimum time of 500 msec). This is for:
– Enabling the use of deltas algorithms
– Avoiding the start of SOTF logic (see SOTF logic description in P44x /EN AP)
2. Reduce the current value to obtain a relation between V et I following the attached
table (For Rlim – phase-shift at 0°, for Z limit – phase-shift corresponding to Z1 (in
multiphase default) or corresponding to 2Z1+Z0 (in single fault).
3. Check that the tripping order (DDB: Any trip / Any Trip A/ Any Trip B/ Any Trip C – see
in the chapter AP section 6.3 ”output contact mapping”, the description of DDB for
models 01 to 06) is transmitted when the concerned zone time delay is issued.(For
distance scheme with transmission and all distance trip logic see in P44x /EN AP).
NOTE: The DDB signal any Trip A is a OR gate between
Ext Trip A
Int Trip A
4. See as well the test report model provided in chapter RS Test tools.
5. Control also in the PSL (programmable scheme logic) the tripping orders addressing
(Any Trip is linked by default to the relay 7).
By default: see the wiring diagram in chapter CO (for assignment of inputs/outputs).
Usefultip: - For controlling the logic level of internal datas (DDB cells), all or part of the 8 red
led in the front panel could be assigned using the PSL.
P44x/EN CM/F65 Commissioning
LED 8
Z1
Z1 Latching
DDB #191 DDB #069
Z2
LED 7
Z2 Latching DDB #070
DDB #193
Non- LED 8
T2
T2
DDB #198 Latching DDB #071
P3018ENa
FIGURE 14
If Led are latched, the reset latch could be activated by a dedicated PSL, to avoid useless
keyboard access: during the tests:
P3019ENa
FIGURE 15
Usefultip: - For controlling the logic level of internal datas (DDB cells), monitor bit control can
be used in "commissioning Test/Opto/Relay/Test port status/Led status/Monitor bit1 to bit
8".Any cells from the DDB can be assigned and then displayed as 1 of the 8 bits.(See User
Tools )
NB1: See LCD structure in chapter HI
COMMISSION TESTS
Monitor Bit 1
Relay O/P Status 64
0000000000100
Monitor Bit 1 Monitor Bit 1
64 64
LED Status
00000000
P3020ENa
FIGURE 16 - LCD MENU FOR A CONTROL OF INPUT/OUTPUT/ & MONITOR BITS CONTROL
Commissioning P44x/EN CM/F65
W0009ENa
P44x/EN CM/F65 Commissioning
W0010ENa
If Z3 is deactivated, the resistance limits R3-R4 are not more visible in S1.
NOTE: All other characteristic point can be tested after having calculated the
impedance and the phase shift between U et I.
NOTE: All these examples use the default settings.
W0011ENa
W0012ENa
W0013ENa
Z3
Z2
Z1
- Rlim R1 R2 R3
-Zp
W0014ENa
• Ref to the description feature in P44x /EN AP item 2.4 & 2.5:
⇒ Settings in S1
⇒ DDB cells
1. From MiCOM S1, select a one of the mode in the table 5.6 in P44x /EN AP (last
column).
2. Implement the indicated default in the panel first column , The carrier signal input
being activated (with TAC).
3. Check the tripping contact have been energised at the issue of the indicated time
delay indicated in the same column (With TAC).
4. Repeat step 2 and 3 but without teleaction input and by checking the indicated time
delay in the panel’s 2nd column (Without TAC).
Repeat step 2 and 4 for the others zones defaults by checking, whatever the teleaction input
condition, the associated time delays to every zones are not modified (according to the 4th
column equations)
NOTE: – TAC can be simulated by inverting the opto.
– TAC transmissions can also be checked by generating
defaults according to the 3rd column.
– To make easy the relay I/O control condition, the LEDs
affectation in PSL can be modified. Another possibility is in S1 –
See Testing tools (monitor bit control).
Commissioning P44x/EN CM/F65
FIG WINF2
P44x/EN CM/F65 Commissioning
Put into service the weak infeed mode (Possibility of Single pole except for P441) ;
1. Inhibit tripping authorisation and phase selection.
2. Activate the teleaction input.
3. Check:
- the teleaction transmission signal is activated;
- the tripping contact is not activated.
From MiCOM S1, validate the three-phase authorisation.
FIGURE 21
1. Activate the teleaction input.
2. Check:
- the teleaction signal is activated ;
- the tripping contacts closing.
From MiCOM S1, validate the minimum voltage phase selection, set under voltage
threshold to 0,4 Vn, put VB = -VC = Vn, validate the single phase tripping
authorisation.
1. Activate the teleaction input.
2. Check:
- the teleaction transmission signal is activated;
- the protection trips the phase A single phase.
5.3.5 Protection function during fuse failure
See internal logic description in P44x /EN AP – item 4.2
Relay locking (1 or 2 phases loss)
1. Supply MiCOM P440 with a "healthy" network with charge:
2. Take off the A phase supply .((V0) & (/I0) creation)
3. Check:
- the fuse failure sign is activated at the end of the time delay sign;
- The protection starting and tripping sign are not activated.
Relay unlocking
1. Keep the A phase supply cut and make a fault (Single or two) of which the fault
current (IR>3I0) is superior to the programmed threshold.(I2 or I0)
2. Check the tripping contact is activated.
Relay locking (3 phases loss)
1. Repeat the 1 then open the 3 voltages channels without creating delta I. Check as in 3
Commissioning P44x/EN CM/F65
Outside sign:
1. Polarised the input: and check the outputs change condition:
Sign repercussions :
The sign (VT fail alarm) fall if:
Fuse_Failure = 0
and
INP_FFUS_Line = 0
and
(All Pole Dead Or healthy network)
All Pole Dead:
No current And no voltage on the line or open circuit-breaker
Healthy network:
Rated voltage on the line And
− No starting And
− No pumping
5.4 Demonstrate Correct Overcurrent Function Operation
This test, performed on stage 1 of the overcurrent protection function in setting group 1,
demonstrates that the relay is operating correctly at the application-specific settings.
It is not considered necessary to check the boundaries of operation where cell [3502:
GROUP 1 OVERCURRENT, I>1 Direction] is set to ‘Directional Fwd’ or ‘Directional Rev’ as
the test detailed already confirms the correct functionality between current and voltage
inputs, processor and outputs and earlier checks confirmed the measurement accuracy is
within the stated tolerance.
5.4.1 Connect the Test Circuit
Determine which output relay has been selected to operate when an I>1 trip occurs by
viewing the relay’s programmable scheme logic.
The programmable scheme logic can only be changed using the appropriate software. If this
software has not been available then the default output relay allocations will still be
applicable.
If the trip outputs are phase-segregated (i.e. a different output relay allocated for each
phase), the relay assigned for tripping on ‘A’ phase faults should be used.
If stage 1 is not mapped directly to an output relay in the programmable scheme logic, output
relay 3 should be used for the test as it operates for any trip condition.
The associated terminal numbers can be found either from the external connection diagram
(P44x/EN CO) or table 5.
Connect the output relay so that its operation will trip the test set and stop the timer.
Connect the current output of the test set to the ‘A’ phase current transformer input of the
relay (terminals C3 and C2 where 1A current transformers are being used and terminals C1
and C2 for 5A current transformers).
P44x/EN CM/F65 Commissioning
If [3502: GROUP 1 OVERCURRENT, I>1 Direction] is set to ‘Directional Fwd’, the current
should flow out of terminal C2 but into C2 if set to ‘Directional Rev’.
If cell [351D: GROUP 1 OVERCURRENT, VCO Status] is set to ‘Enabled’ (overcurrent
function configured for voltage controlled overcurrent operation) or [3502: GROUP 1
OVERCURRENT, I>1 Direction] has been set to ‘Directional Fwd’ or ‘Directional Rev’ then
rated voltage should be applied to terminals C19 and C22.
Ensure that the timer will start when the current is applied to the relay.
NOTE: If the timer does not start when the current is applied and stage 1 has
been set for directional operation, the connections may be incorrect
for the direction of operation set. Try again with the current
connections reversed.
5.4.2 Perform the Test
Ensure that the timer is reset.
Apply a current of twice the setting in cell [3503: GROUP 1 OVERCURRENT, I>1 Current
Set] to the relay and note the time displayed when the timer stops.
5.4.3 Check the Operating Time
Check that the operating time recorded by the timer is within the range shown in table 13.
NOTE: Except for the definite time characteristic, the operating times given in
table 13 are for a time multiplier or time dial setting of 1. Therefore, to
obtain the operating time at other time multiplier or time dial settings,
the time given in table 13 must be multiplied by the setting of cell
[3505: GROUP 1 OVERCURRENT, I>1 TMS] for IEC and UK
characteristics or cell [3506: GROUP 1 OVERCURRENT, Time Dial]
for IEEE and US characteristics.
In addition, for definite time and inverse characteristics there is an
additional delay of up to 0.02 second and 0.08 second respectively
that may need to be added to the relay’s acceptable range of
operating times.
For all characteristics, allowance must be made for the accuracy of
the test equipment being used.
6. ON-LOAD CHECKS
Remove all test leads, temporary shorting leads, etc. and replace any external wiring that
has been removed to allow testing.
If it has been necessary to disconnect any of the external wiring from the relay in order to
perform any of the foregoing tests, it should be ensured that all connections are replaced in
accordance with the relevant external connection or scheme diagram.
The following on-load measuring checks ensure the external wiring to the current and
voltage inputs is correct but can only be carried out if there are no restrictions preventing the
energisation of the plant being protected.
6.1 Voltage Connections
Using a multimeter measure the voltage transformer secondary voltages to ensure they are
correctly rated. Check that the system phase rotation is correct using a phase rotation
meter.
Compare the values of the secondary phase voltages with the relay’s measured values,
which can be found in the MEASUREMENTS 1 menu column.
If cell [0D02: MEASURE’T SETUP, Local Values] is set to ‘Secondary’, the values displayed
on the relay should be equal to the applied secondary voltage. The relay values should be
within 1% of the applied secondary voltages. However, an additional allowance must be
made for the accuracy of the test equipment being used.
If cell [0D02: MEASURE’T SETUP, Local Values] is set to ‘Primary’, the values displayed on
the relay should be equal to the applied secondary voltage multiplied the corresponding
voltage transformer ratio set in the ‘VT & CT RATIOS’ menu column (see table 14). Again
the relay values should be within 1% of the expected value, plus an additional allowance for
the accuracy of the test equipment being used.
7. FINAL CHECKS
The tests are now complete.
Remove all test or temporary shorting leads, etc. If it has been necessary to disconnect any
of the external wiring from the relay in order to perform the wiring verification tests, it should
be ensured that all connections are replaced in accordance with the relevant external
connection or scheme diagram.
Ensure that the relay has been restored to service by checking that cell [0F0D:
COMMISSIONING TESTS, Test Mode] is set to ‘Disabled’.
If the relay is in a new installation or the circuit breaker has just been maintained, the circuit
breaker maintenance and current counters should be zero. These counters can be reset
using cell [0608: CB CONDITION, Reset All Values]. If the required access level is not
active, the relay will prompt for a password to be entered so that the setting change can be
made.
If a MMLG test block is installed, remove the MMLB01 test plug and replace the MMLG
cover so that the protection is put into service.
Ensure that all event records, fault records, disturbance records, alarms and LEDs have
been reset before leaving the relay.
If applicable, replace the secondary front cover on the relay.
Commissioning P44x/EN CM/F65
8. MAINTENANCE
8.1 Maintenance Period
It is recommended that products supplied by AREVA T&D Protection & Control receive
regular monitoring after installation. As with all products some deterioration with time is
inevitable. In view of the critical nature of protective relays and their infrequent operation, it
is desirable to confirm that they are operating correctly at regular intervals.
AREVA protective relays are designed for a life in excess of 20 years.
MiCOM P440 distance relays are self-supervising and so require less maintenance than
earlier designs of relay. Most problems will result in an alarm so that remedial action can be
taken. However, some periodic tests should be done to ensure that the relay is functioning
correctly and the external wiring is intact.
If a Preventative Maintenance Policy exists within the customer’s organisation then the
recommended product checks should be included in the regular program. Maintenance
periods will depend on many factors, such as:
F E D C B A
Power supply
Relay board Input board Transformer board Not used IRIG-B board
board
J H G F E D C B A
Power supply
Relay board Relay board Opto board Not used Input board Transformer board Not used IRIG-B board
board
P3007XXa
A B C D E F G H J
IRIG-B
TX
RX
P3008XXa
ZN0007 C
SERIAL No.
P3009XXa
Refit the front panel using the reverse procedure to that given in section 8.3.2. After refitting
and closing the access covers on case sizes 60TE, press at the location of the hinge-
assistance T-pieces so that they click back into the front panel moulding.
Once the relay has been reassembled after repair, it should be recommissioned in
accordance with the instructions in sections 1 to 7 inclusive of this chapter.
8.3.2.3 Replacement of the input module
The input module comprises of two boards fastened together, the transformer board and the
input board.
The module is secured in the case by two screws on its right-hand side, accessible from the
front of the relay, as shown in figure 27. Remove these screws carefully as they are not
captive in the front plate of the module.
Input module
Handle
P3010ENa
P3011XXa
1
2 PL2
3 ZN0002 D
4
SERIAL No.
P3012XXa
P3013XXa
BLANK PAGE
Commissioning Test & Record P44x/EN RS/F65
Sheets
COMMISSIONING TEST
& RECORD SHEETS
Commissioning Test & Record P44x/EN RS/F65
Sheets
CONTENT
BLANK PAGE
Commissioning Test & Record P44x/EN RS/F65
Sheets
Station Circuit
System Frequency
*Delete as appropriate
⎛ [ Phase CT Primary] ⎞
⎜ ⎟ _______A/na*
Phase CT Ratio ⎝ [ Phase CT Sec' y] ⎠
⎛ [ Mutual CT Primary] ⎞
⎜⎜ ⎟⎟ _______A/na*
Mutual CT Ratio ⎝ [ Mutual CT Sec' y] ⎠
⎛ [ Main VT Primary] ⎞
⎜⎜ ⎟⎟ _______V/na*
Main VT Ratio ⎝ [ Main VT Sec' y] ⎠
⎛ [ C/S VT Primary] ⎞
⎜⎜ ⎟⎟ _______V/na*
C/S VT Ratio ⎝ [ C/S VT Secondary] ⎠
⎛ [Main VT Primary] ⎞
⎜⎜ ⎟⎟ _______V/na*
Main VT Ratio ⎝ [Main VT Sec' y] ⎠
⎛ [C/S VT Primary] ⎞
⎜⎜ ⎟⎟ _______V/na*
C/S VT Ratio ⎝ [C/S VT Secondary] ⎠
⎛ [Phase CT Primary] ⎞
⎜⎜ ⎟⎟ _______A/na*
Phase CT Ratio ⎝ [Phase CT Sec' y] ⎠
⎛ [Mutual CT Primary] ⎞
⎜⎜ ⎟⎟ _______A/na*
Mutual CT Ratio ⎝ [Mutual CT Sec' y] ⎠
Comments
Date Date
Connection Diagrams P44x/EN CO/F65
CONNECTION DIAGRAMS
Connection Diagrams P44x/EN CO/F65
CONTENT
BLANK PAGE
1.
18
10.35 181.3 4.5 16 24
202.0 17 18
MiCOM P441/P442 & P444
200.0
IRIG-B
ALARM
OUT OF SERVICE
HEALTHY
= CLEAR
= READ
177.0 157.5 MAX.
= ENTER
TX
RX
THE TERMINATION POSITIONS
SHOWN ARE TYPICAL ONLY
SIDE VIEW
206.0 30.0
P44x/EN CO/F65
Page 3/14
2.
A
DIRECTION OF FORWARD CURRENT FLOW
P2 P1
A
S2 S1
B
C B
C PHASE ROTATION
Page 4/14
C4 5A D3 NOTE 5 F12
- CONTACT
N
IB D4 OPTO 2 F13
+ WATCHDOG
n C5 F14 CONTACT
D5
- E1
1A OPTO 3
C6 D6 RELAY 1
+ E2
a b c C7 5A COMMS
D7 E3
- NOTE 6.
IC OPTO 4 E4 RELAY 2
D8
C8 +
E5
D9 RELAY 3
1A - E6
C9 OPTO 5
D10 E7
C10 5A +
D11 E8 RELAY 4
IM - F17
OPTO 6 - E9
C11 D12
SEE NOTE 2. + EIA485/ SEE DRAWING E10
1A D13 KBUS 10Px4001.
C12 - F18 E11
DIRECTION OF FORWARD CURRENT FLOW OPTO 7 PORT + RELAY 5
D14 E12
+
A F16
P2 P1 D15 SCN E13
A -
OPTO 8 E14 RELAY 6
S2 S1 D16
B + E15
D17 E16
C C B COMMON
PHASE ROTATION D18 CONNECTION E17 RELAY 7
E18
PARALLEL LINE
PROTECTION B1
F1 *
- B2 RELAY 8
AC OR DC
Vx AUX SUPPLY +
F2 B3
VA RELAY 9
C19 B4
MiCOM P441 – WIRING DIAGRAM (1/2)
F7 B5
+
B6 RELAY 10
F8
+
48V DC FIELD B7
VOLTAGE OUT F9
- B8
VB RELAY 11
C20 F10
- B9
B10
B11 RELAY 12
B12
VC C21 B13
B14 RELAY 13
B15
CASE B16
VN C22 EARTH B17 RELAY 14
C23 B18
V BUSBAR
(SEE NOTE 3.)
C24
NOTES 1.
C.T. SHORTING LINKS POWER SUPPLY VERSION 24-48V (NOMINAL) D.C. ONLY
(a) *
3. V BUSBAR ONLY REQUIRED IF CHECK SYNCHRONISM FUNCTION ENABLED. 6. FOR COMMS OPTIONS SEE DRAWING 10Px4001.
P3942ENb
MiCOM P441/P442 & P444
Connection Diagrams
3.
F F F F F F F F F E E E E E E E E E D D D D D D D D D C C C C C C C C C
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 20 22 24
F F F F F F F F F E E E E E E E E E D D D D D D D D D C C C C C C C C C
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 19 21 23
PL1 PL1
* * * *
SK2 SK1
PL3
BATTERY SERIAL TEST/DOWNLOAD
B B B B B B B B B
1 3 5 7 9 11 13 15 17
B B B B B B B B B
2 4 6 8 10 12 14 16 18
Page 5/14
12 OFF HOLES Æ 3.4 3 TERMINAL BLOCK DETAIL
4.
23.25 116.55 142.45 1 2
1 19
Page 6/14
18
10.3 155.4 129.5 4.5
16 24
305.5 17 18
303.5
TRIP
IRIG-B
ALARM
OUT OF SERVICE
HEALTHY
= CLEAR 177.0
= READ
157.5 MAX.
= ENTER
TX
RX
TERMINAL BLOCKS -
309.6 30.0 SIDE VIEW SEE DETAIL
THE TERMINATION POSITIONS
SHOWN ARE TYPICAL ONLY
MiCOM P441/P442 & P444
Connection Diagrams
5.
A
DIRECTION OF FORWARD CURRENT FLOW
P2 P1
A
S2 S1
B
C B
C PHASE ROTATION
1A + G7
C6 H5
C7 5A D7 RELAY 3 G8
a b c - H6 RELAY 11
OPTO 4 G9
IC D8 H7
+ G10
C8 D9 RELAY 4 H8
G11
MiCOM P441/P442 & P444
- RELAY 12
1A OPTO 5 H9
C9 D10 G12
+ H10
C10 5A D11 G13
- RELAY 5 H11
IM OPTO 6 G14
D12 H12 RELAY 13
+ G15
C11 H13
SEE NOTE 2. D13
1A - G16
C12 OPTO 7 RELAY 6 H14
DIRECTION OF FORWARD CURRENT FLOW D14 G17
+ H15 RELAY 14
D15 G18
A - H16
P2 P1
A D16 OPTO 8 H17
+ RELAY 7
S2 S1 H18 F1
B D17
COMMON F2 RELAY 15 **
C C B D18 CONNECTION
PHASE ROTATION F3
COMMS F4 RELAY 16 **
PARALLEL LINE E1 NOTE 6.
- F5
PROTECTION OPTO 9
E2 F6 RELAY 17 **
+
E3 F7
- J17 F8
MiCOM P442 – WIRING DIAGRAM (1/3)
VA E4 OPTO 10 - RELAY 18
C19 + F9
EIA485/ SEE DRAWING
E5 F10
- KBUS 10Px4001.
OPTO 11 J18
E6 PORT + F11
+ RELAY 19
E7 J16 F12
- SCN
VB C20 OPTO 12 F13
E8
+ F14 RELAY 20
E9 F15
-
E10 OPTO 13 J1 * F16
+ -
AC OR DC
E11 Vx J2 F17 RELAY 21
AUX SUPPLY +
VC C21 - F18
E12 OPTO 14
+ J7
E13 +
-
OPTO 15 J8
E14 +
VN C22 + 48V DC FIELD
VOLTAGE OUT J9
E15 -
C23 -
OPTO 16 J10
E16 - CASE
+ EARTH
V BUSBAR
(SEE NOTE 3.) E17
NOTES 1. COMMON
C24
E18 CONNECTION
(a) C.T. SHORTING LINKS
* POWER SUPPLY VERSION 24-48V (NOMINAL) D.C. ONLY
** FAST TRIP RELAY (OPTIONAL)
P3909ENb
P44x/EN CO/F65
Page 7/14
6.
DIRECTION OF FORWARD CURRENT FLOW A
P2 P1
A
S2 S1
B
C B
C PHASE ROTATION
Page 8/14
D4 OPTO 2 J13 G1
C4 5A + WATCHDOG
N CONTACT J14 G2 RELAY 8
IB D5
- G3
n C5 D6 OPTO 3 H1
+ G4 RELAY 9
RELAY 1 H2
1A D7 G5
C6 - H3
C7 5A OPTO 4 G6 RELAY 10
a b c D8 RELAY 2 H4
+
IC G7
D9 H5
- G8
C8 OPTO 5 RELAY 3 H6 RELAY 11
D10 G9
1A +
C9 H7
D11 G10
- H8
C10 5A OPTO 6 RELAY 4 G11
D12 H9 RELAY 12
+
IM G12
D13 H10
NOTE 2 C11 - G13
OPTO 7 RELAY 5 H11
1A D14 G14
C12 + H12 RELAY 13
DIRECTION OF FORWARD CURRENT FLOW D15 G15
- H13
OPTO 8 G16
P2 P1 A D16 H14
+ RELAY 6 G17
A H15 RELAY 14
D17
S2 S1 COMMON G18
B H16
D18 CONNECTION
C B RELAY 7 H17
C
PHASE ROTATION H18
E1 F3
- -
PARALLEL LINE E2 OPTO 9
PROTECTION + RELAY 15
E3 F4
COMMS +
-
E4 OPTO 10 NOTE 6 F7 -
MiCOM P442 – WIRING DIAGRAM (2/3)
+
VA RELAY 16
C19 E5
- F8
OPTO 11 + HIGH BREAK
E6 J17
+ - F11 CONTACTS
-
E7 SEE DRAWING NOTE 7
- EIA485/ RELAY 17
E8 OPTO 12 KBUS 10Px4001. F12
VB + J18 +
C20 PORT +
E9 F15 -
- J16
E10 OPTO 13 SCN RELAY 18
+ F16
+
E11
-
VC E12 OPTO 14
C21 + J1 *
-
E13 AC OR DC
- Vx AUX SUPPLY J2
OPTO 15 +
E14
+
VN C22 E15 J7
- +
C23 E16 OPTO 16 J8
+ +
48V DC FIELD
NOTES E17 J9 CASE
V BUSBAR VOLTAGE OUT - EARTH
COMMON
1. NOTE 3 E18 CONNECTION J10
C24 -
(a) C.T. SHORTING LINKS
P3943ENa
7. TO OBTAIN HIGH BREAK DUTY, CONTACTS MUST BE
4. C.T. CONNECTIONS ARE SHOWN 1A CONNECTED AND ARE TYPICAL ONLY. CONNECTED WITH THE CORRECT POLARITY.
MiCOM P441/P442 & P444
Connection Diagrams
7.
STANDARD INPUT MODULE GN0010 013 (110V)
J J J J J J J J J H H H H H H H H H F F F F F F F F F D D D D D D D D D C C C C C C C C C
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 20 22 24
J J J J J J J J J H H H H H H H H H F F F F F F F F F D D D D D D D D D C C C C C C C C C
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 19 21 23
G G G G G G G G G E E E E E E E E E
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17
G G G G G G G G G E E E E E E E E E BNC FIBRE OPTIC
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 TRANSDUCERS
Optical fiber +
RearCom2 + IRIGB (optional) RearCom2 (optional) IRIG-B PCB IRIG-B PCB
01 ZN0025001 01 ZN0025002 01 ZN0007 001 01 ZN0007 002
Rx1 Tx1
SK4 SK5 (unused) SK4 SK5 (unused)
1 3 5 7 9 1 3 5 7 9 1 3 5 7 9 1 3 5 7 9
2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8
P442
BOARD CONTAINS SALETY CRITICAL COMPONENTS.
* P3911ENa
P44x/EN CO/F65
Page 9/14
8.
74.9 116.55 142.45 12 OFF HOLES Dia. 3.4 TERMINAL BLOCK DETAIL
3
1
Page 10/14
19 2
1
HEAVY DUTY MEDIUM DUTY
4
P44x/EN CO/F65
159.0 168.0
18
62.0 155.4 129.5 FLUSH MOUNTING
PANEL CUT-OUT 16 24
DETAIL. 17 18
408.9
406.9
TERMINAL SCREWS : M4 x 7 BRASS CHEESE HEAD SCREWS WITH LOCK WASHERS PROVIDED.
TRIP IRIG-B
ALARM
OUT OF SERVICE
HEALTHY
CLEAR
= 177.0 157.5 MAX.
= READ TX
RX
ENTER
=
16
TERMINAL BLOCKS -
SIDE VIEW SEE DETAIL
413.2 30.0
THE TERMINATION POSITIONS
SHOWN ARE TYPICAL ONLY
MiCOM P441/P442 & P444
Connection Diagrams
A
9.
DIRECTION OF FORWARD CURRENT FLOW
P2 P1 MiCOM P444 (PART) MiCOM P444 (PART)
A N11 J1
WATCHDOG
S2 S1 CONTACT N12 J2 RELAY 25
B D1
C B - N13 J3
C PHASE ROTATION D2 OPTO 1 WATCHDOG RELAY 26
+ CONTACT N14 J4
D3 NOTE 5 J5
- M1
J6 RELAY 27
D4 OPTO 2 RELAY 1 M2
+ J7
D5 M3
- J8 RELAY 28
RELAY 2 M4
C1 5A D6 OPTO 3 J9
A B C + M5
IA D7 J10 RELAY 29
RELAY 3 M6
-
C2 OPTO 4 J11
D8 M7
1A + J12 RELAY 30
N NOTE 4. C3 D9 RELAY 4 M8
- J13
C4 5A M9
D10 OPTO 5 J14
n + RELAY 5 M10 RELAY 31
IB
D11 J15
C5 - M11
OPTO 6 RELAY 6 J16
1A D12 M12
a b c C6 + J17
M13 RELAY 32
D13 J18
C7 5A
Connection Diagrams
- M14
D14 OPTO 7 RELAY 7
IC + M15 H1
C8 D15 M16 H2 RELAY 33
-
1A D16 OPTO 8 M17 H3
C9 RELAY 8
+ RELAY 34
C10 5A M18 H4
MiCOM P441/P442 & P444
D17
COMMON H5
IM D18 L1
CONNECTION H6 RELAY 35
C11 ** RELAY 9 L2
SEE NOTE 2. E1 H7
1A - L3
C12 E2 OPTO 9 RELAY 10 H8
DIRECTION OF FORWARD CURRENT FLOW ** L4 RELAY 36
+ H9
E3 L5
P2 P1 A - H10
** RELAY 11 L6
A E4 OPTO 10
+ H11 RELAY 37
S2 S1 L7
B E5 RELAY 12 H12
- ** L8
C B E6 OPTO 11 H13
C L9
PHASE ROTATION + H14
E7 RELAY 13 L10 RELAY 38
- H15
PARALLEL LINE L11
E8 OPTO 12 H16
PROTECTION + RELAY 14 L12
E9 H17 RELAY 39
- L13
OPTO 13 H18
E10 L14 OPTIONAL
+ RELAY 15
E11 L15 G1 DEPENDANT ON
VA
C19 - RELAY 40 MODEL VERSION
L16 G2
E12 OPTO 14
+ L17 G3
RELAY 16
E13 L18 RELAY 41
- G4
MiCOM P444 – WIRING DIAGRAM (1/3)
E14 OPTO 15 G5
+ K1
VB G6 RELAY 42
C20 E15 ** RELAY 17 K2
- G7
E16 OPTO 16 K3
+ RELAY 18 G8 RELAY 43
** K4
E17 G9
COMMON K5
E18 CONNECTION RELAY 19 G10
VC ** K6
C21 G11
F1 K7 RELAY 44
- RELAY 20 G12
F2 OPTO 17 ** K8
+ G13
K9
VN C22 F3 RELAY 21 G14
- K10 RELAY 45
F4 OPTO 18 G15
P3910ENc
C23 + K11
RELAY 22 G16
F5 K12
- G17 RELAY 46
V BUSBAR OPTO 19 K13
F6 G18
(SEE NOTE 3.) + K14
C24 F7 RELAY 23
- K15
F8 OPTO 20 K16
+ * N1
(a) C.T. SHORTING LINKS K17 -
F9 RELAY 24 AC OR DC
- K18 N2 Vx
F10 OPTO 21 + AUX SUPPLY
+
(b) F11 N7
PIN TERMINAL (P.C.B. TYPE) - COMMS +
F12 OPTO 22 NOTE 6.
+ N8
2. I INPUT IS FOR OPTIONAL MUTUAL COMPENSATION OF FAULT LOCATOR. +
M F13 48V DC FIELD
- N9 VOLTAGE OUT
3. V BUSBAR ONLY REQUIRED IF CHECK SYNCHRONISM FUNCTION ENABLED. N17 -
F14 OPTO 23 -
+ N10
4. C.T. CONNECTIONS ARE SHOWN 1A CONNECTED AND ARE TYPICAL ONLY. SEE DRAWING -
F15 EIA485/
- KBUS 10Px4001.
5. OPTO INPUTS 1 AND 2 MUST BE USED FOR SETTING GROUP CHANGES F16 OPTO 24 N18
PORT +
+ CASE
IF THIS OPTION IS SELECTED IN THE RELAY MENU.
F17 N16 EARTH
COMMON SCN
6. FOR COMMS OPTIONS SEE DRAWING 10Px4001. F18 CONNECTION
10.
P2 P1
A D1
-
S2 S1 OPTO 1
B D2 MiCOM P444 (PART)
+
C B NOTE 5
C D3 N11 J3 -
PHASE ROTATION - WATCHDOG
D4 OPTO 2 CONTACT N12 RELAY 17
+ J4
N13 +
D5 WATCHDOG
- N14 J7
OPTO 3 CONTACT -
D6
+
Page 12/14
C1 5A M1 RELAY 18
D7 J8 HIGH BREAK
A B C - RELAY 1 M2 +
IA OPTO 4
D8 J11 CONTACTS
C2 + M3 - NOTE 7
D9 RELAY 2 M4 RELAY 19
NOTE 4 1A -
N C3 J12
D10 OPTO 5 M5 +
C4 5A + RELAY 3 M6 J15
P44x/EN CO/F65
n D11 -
IB - M7
OPTO 6 RELAY 20
C5 D12 RELAY 4 M8 J16
+ +
a b c 1A D13 M9
C6 -
OPTO 7 RELAY 5 M10
C7 5A D14 + H1
M11
IC D15 RELAY 6 H2 RELAY 21
- M12
C8 OPTO 8 H3
D16 M13
+ RELAY 22
1A H4
C9 D17 M14
RELAY 7
C10 5A COMMON H5
M15
D18 CONNECTION H6 RELAY 23
IM M16
E1 H7
C11 - RELAY 8 M17
NOTE 2 OPTO 9 H8
E2 M18 RELAY 24
1A +
C12 H9
DIRECTION OF FORWARD CURRENT FLOW E3
- H10
OPTO 10 - L3
P2 P1 A E4 H11
+ RELAY 25
A RELAY 9 H12
E5 L4
S2 S1 - +
B OPTO 11 H13
E6 L7
+ - H14
C C B RELAY 26
PHASE ROTATION
E7 RELAY 10 H15
-
OPTO 12 HIGH BREAK L8
PARALLEL LINE E8 + + H16
CONTACTS L11 H17
PROTECTION E9 - RELAY 27
- NOTE 7
OPTO 13 RELAY 11 H18
E10
+ L12
+ G1
E11
- L15 G2 RELAY 28
VA OPTO 14 -
C19 E12
+ RELAY 12 G3
E13 L16 G4 RELAY 29
- +
OPTO 15 G5
MiCOM P444 – WIRING DIAGRAM (2/3)
E14 +
G6 RELAY 30
E15 - K3
VB - G7
C20 OPTO 16 RELAY 13
E16 G8
+ K4 RELAY 31
+
E17 G9
COMMON - K7
E18 CONNECTION G10
RELAY 14 G11
F1 HIGH BREAK K8 RELAY 32
VC C21 - + G12
OPTO 17 CONTACTS K11
F2 NOTE 7 - G13
+
P3944ENa
F3 RELAY 15 G14
- K12 RELAY 33
OPTO 18 + G15
VN C22 F4
+ K15 G16
-
C23 F5
- RELAY 16 G17 RELAY 34
NOTES F6 OPTO 19 K16 G18
V BUSBAR + +
1. NOTE 3 F7
-
C24 OPTO 20
F8 +
(a) C.T. SHORTING LINKS * N1
COMMS -
F9 AC OR DC
- NOTE 6 N2 Vx
OPTO 21 + AUX SUPPLY
F10
+
(b) PIN TERMINAL (P.C.B. TYPE)
F11 N7
- +
F12 OPTO 22
2.I M INPUT IS FOR OPTIONAL MUTUAL COMPENSATION OF FAULT LOCATOR. + N17 N8
- +
48V DC FIELD
3. V BUSBAR ONLY REQUIRED IF CHECK SYNCHRONISM FUNCTION ENABLED. F13 SEE DRAWING N9
- EIA485/ - VOLTAGE OUT
F14 OPTO 23 KBUS 10Px4001.
4. C.T. CONNECTIONS ARE SHOWN 1A CONNECTED AND ARE TYPICAL ONLY. + N18 N10
PORT + -
F15
5. OPTO INPUTS 1 AND 2 MUST BE USED FOR SETTING GROUP CHANGES - N16
IF THIS OPTION IS SELECTED IN THE RELAY MENU. F16 OPTO 24 SCN
+ CASE
F17 EARTH
6. FOR COMMS OPTIONS SEE DRAWING 10Px4001.
COMMON
F18 CONNECTION
7. TO OBTAIN HIGH BREAK DUTY, CONTACTS MUST BE
CONNECTED WITH THE CORRECT POLARITY. MiCOM P444 (PART) POWER SUPPLY VERSION 24-48V (NOMINAL) D.C. ONLY
*
MiCOM P441/P442 & P444
Connection Diagrams
11.
N N N N N N N N N M M M M M M M M M L L L L L L L L L D D D D D D D D D C C C C C C C C C
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 20 22 24
N N N N N N N N N M M M M M M M M M L L L L L L L L L D D D D D D D D D C C C C C C C C C
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 19 21 23
* * * * *
Connection Diagrams
* * * * *
MAIN PROCESSOR & RELAY PCB UNIVERSEL OPTO UNIVERSEL OPTO
RELAY PCB INPUT PCB INPUT PCB
USER INTERLACE PCB CIRCUIT DIAG. CIRCUIT DIAG.
CIRCUIT DIAG. 01 ZN0006 01 01 Zn0019 01 CIRCUIT DIAG. CIRCUIT DIAG.
01 Zn0019 01 01 Zn0017 02 01 ZN0017 02
SK2 SK1
BATTERY SERIAL TEST/DOWNLOAD
J J J J J J J J J K K K K K K K K K F F F F F F F F F E E E E E E E E E
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17
J J J J J J J J J K K K K K E K K K F F F F F F F F F E E E E E E E E E
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18
MiCOM P444 – WIRING DIAGRAM (3/3)
P444
BOARD CONTAINS SALETY CRITICAL COMPONENTS.
BLANK PAGE
Courrier Data Base P44x/EN GC/F65
CONFIGURATION /
MAPPING
P44x/EN GC/F65 Courrier Data Base
CONFIGURATION / MAPPING
This Chapter is split into several sections, these are as follows:
References
Chapter IT: Introduction : User Interface operation and connections to relay
Courier User Guide R6512
Modicon Modbus Protocol Reference Guide PI-MBUS-300 Rev. E
IEC60870-5-103 Telecontrol Equipment and Systems - Transmission Protocols –
Companion
Standard for the informative interface of Protection Equipment
Courrier Data Base P44x/EN GC /F65
00 2 Password ASCII Password(4 bytes) 40001 40002 G20 G20 2 AAAA Setting 65 90 1 0 * * * *
00 3 Unused 1 * * * *
00 5 Plant Reference ASCII Text(16 bytes) 40012 40019 G3 8 AREVA Setting 32 163 1 2 * * * *
00 6 Model Number ASCII Text(32 bytes) 30020 30035 G3 16 Model Number Data * * * *
00 7 Unused * * * *
00 8 Serial Number ASCII Text(7 bytes) 30044 30051 G3 8 Serial Number Data * * * *
00 0F Unused * * * *
00 10 CB Trip/Close Indexed String(2) 40021 40021 G55 G55 1 No Operation Command 0 2 1 0 * * * * 0702
00 15-1F Unused
00 20 Opto I/P Status Binary Flag(32 bits) 30727 30728 G27 2 Data * * * *
Indexed String
00 21 Relay O/P Status Binary Flag(32 bits) G9 2 Data * * * *
Indexed String
00 22 Alarm Status 1 Binary Flag(32 bits) G96 2 Data * * * *
Indexed String
00 23 Unused
00 D2 Password Level 1 ASCII Password(4 characters) 40023 40024 G20 G20 2 AAAA Setting 65 90 1 1 * * * *
00 D3 Password Level 2 ASCII Password(4 characters) 40025 40026 G20 G20 2 AAAA Setting 65 90 1 2 * * * *
01 00 VIEW RECORDS * * * *
01 3 Time & Date IEC870 Time & Date 30103 30106 G12 4 (From Record) Data * * * *
01 9 Start Elements Binary Flags (32 Bits) N/A 30115 30116 G84 G84 2 Data * * * *
01 0A Trip Elements Binary Flags (32 Bits) N/A 30117 30118 G85 G85 2 Data * * * *
01 0B Validities Binary Flags (8 Bits) N/A 30119 30119 G130 G130 1 Data * * * *
01 0C Time Stamp IEC870 Time & Date 30120 30123 G12 G12 4 Data * * * *
01 0D Fault Alarms Binary Flags (32 Bits) 30124 30125 G87 G87 2 Data * * * *
01 10 Relay Trip Time Courier Number (time) 30129 30130 G24 2 Data * * * *
01 11 Fault Location Courier Number (Metres) 30131 30132 G125 2 Data * * * * SMF
01 12 Fault Location Courier Number (Miles) 30133 30134 G125 2 Data * * * * SMF
01 13 Fault Location Courier Number (ohms) 30135 30136 G125 2 Data * * * * SMF
01 20 Trip Elements 2 Binary Flags (32 Bits) N/A 30154 30155 G86 G86 2 Data * * * *
02 00 MEASUREMENTS 1 * * * *
02 7 UNUSED * * * *
02 8 UNUSED * * * *
02 0B UNUSED * * * *
02 0C UNUSED * * * *
02 10 UNUSED
02 11 UNUSED
02 12 UNUSED
02 13 UNUSED
02 1D VBN Phase Angle Courier Number (angle) 30244 30244 G30 1 Data * * * *
02 1F VCN Phase Angle Courier Number (angle) 30247 30247 G30 1 Data * * * *
02 20 UNUSED
02 21 UNUSED
02 27 UNUSED
02 28 UNUSED
02 29 UNUSED
02 2C C/S Voltage Ang Courier Number (angle) 30266 30266 G30 1 Data * * * *
02 2D
02 2E
02 31 Slip Frequency Courier Number (frequency) 30270 30270 G30 1 Data * * * 0919
* * * *
03 00 MEASUREMENTS 2 * * * *
03 0D Zero Seq Power Courier Number (VA) 30336 30338 G29 3 Data * * * *
03 0E 3Ph Power Factor Courier Number (decimal) 30339 30339 G30 1 Data * * * *
311020 311020 G30 1 Data * * * *
03 0F APh Power Factor Courier Number (decimal) 30340 30340 G30 1 Data * * * *
03 10 BPh Power Factor Courier Number (decimal) 30341 30341 G30 1 Data * * * *
03 11 CPh Power Factor Courier Number (decimal) 30342 30342 G30 1 Data * * * *
03 12 UNUSED
03 13 UNUSED
03 14 UNUSED
03 15 UNUSED
03 18 UNUSED
03 19 UNUSED
03 1A UNUSED
03 1B UNUSED
03 1C UNUSED
03 1D UNUSED
03 1E UNUSED
03 1F UNUSED
03 21 3Ph VArs Peak Demand Courier Number (decimal) 30352 30354 G29 3 Data * * * *
04 00 MEASUREMENTS 3 * * * *
06 00 CB CONDITION * * * *
06 9 Total 1P Reclosures Unsigned Integer (16 bits) 30611 30611 G1 1 Data * * * * 0924
06 0A Total 3P Reclosures Unsigned Integer (16 bits) 30612 30612 G1 1 Data * * * * 0924
06 0B Reset Total A/R Indexed String 40141 40141 G11 G11 1 No Command 0 1 1 1 * * * * 0924
07 00 CB CONTROL * * * *
07 2 Manual Close Pulse Time Courier Number (Time) 40201 40201 G2 1 0.5 Setting 0.1 10 0.01 2 * * * * 0701
07 3 Trip Pulse Time Courier Number (Time) 40202 40202 G2 1 0.5 Setting 0.1 5 0.01 2 * * * * 0701
07 4 Man Close Delay Courier Number (Time) 40203 40203 G2 1 10 Setting 0.01 600 0.01 2 * * * * 0701
07 5 Healthy Window Courier Number (Time) 40206 40207 G35 2 5 Setting 0.01 9999 0.01 2 * * * * 0701
07 6 C/S Window Courier Number (Time) 40208 40209 G35 2 5 Setting 0.01 9999 0.01 2 * * * * 0701
07 7 A/R Single Pole Indexed String 40204 40204 G37 G37 1 Disabled Setting 0 1 1 2 * * 0924
07 8 A/R Three Pole Indexed String 40205 40205 G37 G37 1 Disabled Setting 0 1 1 2 * * * * 0924
08 1 Date/Time IEC870 Time & Date N/A 40300 40303 G12 4 Setting 0 * * * *
42049 42052 G12 4 Setting 0 * * * *
N/A Date
12-janv-98
N/A Time
12:00
08 4 IRIG-B Sync Indexed String 40304 40304 G37 G37 1 Disabled Setting 0 1 1 2 * * IRIG-B Fitted
08 5 IRIG-B Status ASCII String 30090 30090 G17 G17 1 Data * * 0804
08 07 Battery Alarm Indexed String 40305 40305 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
09 00 CONFIGURATION * * * *
09 1 Restore Defaults Indexed String 40402 40402 G53 G53 1 No Operation Command 0 5 1 2 * * * *
09 2 Setting Group Indexed String 40403 40403 G61 G61 1 Select via Menu Setting 0 1 1 2 * * * *
09 3 Active Settings Indexed String 40404 40404 G90 G90 1 Group 1 Setting 0 3 1 1 * * * * 0902
09 4 Save Changes Indexed String 40405 40405 G62 G62 1 No Operation Command 0 2 1 2 * * * *
09 5 Copy From Indexed String 40406 40406 G90 G90 1 Group 1 Setting 0 3 1 2 * * * *
09 7 Setting Group 1 Indexed String 40408 40408 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
09 8 Setting Group 2 Indexed String 40409 40409 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
09 9 Setting Group 3 Indexed String 40410 40410 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
09 0A Setting Group 4 Indexed String 40411 40411 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
09 0D Dist. Protection Indexed String 40412 40412 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
09 11 Back-Up I> Indexed String 40414 40414 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
09 12 Neg Sequence O/C Indexed String 40415 40415 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
09 13 Broken Conductor Indexed String 40416 40416 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
09 14 Earth Fault Prot Indexed String 40417 40417 G131 G131 1 Disabled Setting 0 2 1 2 * * * *
09 15 Aided D.E.F Indexed String 40418 40418 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
09 16 Volt Protection Indexed String 40419 40419 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
09 17 CB Fail & I< Indexed String 40420 40420 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
09 19 System Checks Indexed String 40422 40422 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
09 1A Thermal Overload Indexed String 40423 40423 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
09 1D Residual O/V NVD Indexed String 40425 40425 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
09 24 Internal A/R Indexed String 40424 40424 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
09 40 InterMicom Indexed String 40440 G37 1 Disabled Setting 0 1 1 * * * InterMiCOM Option Fitted
0A 1 Main VT Primary Courier Number (Voltage) 40500 40501 G35 2 110 Setting 100 1000000 1 2 * * * *
0A 2 Main VT Sec'y Courier Number (Voltage) 40502 40502 G2 1 110 Setting 80*V1 140*V1 1*V1 2 * * * *
0A 3 C/S VT Primary Courier Number (Voltage) 40503 40504 G35 2 110 Setting 100 1000000 1 2 * * * *
0A 4 C/S VT Secondary Courier Number (Voltage) 40505 40505 G2 1 110 Setting 80*V2 140*V2 1*V2 2 * * * *
0A 0F C/S Input Indexed String 40510 40510 G302 G302 1 A-N Setting 0 3 1 2 * * * *
Courrier Data Base P44x/EN GC /F65
0B 40 DDB element 31 - 0 Binary Flag (32 bits) 410407 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 41 DDB element 63 - 32 Binary Flag (32 bits) 410409 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 42 DDB element 95 - 64 Binary Flag (32 bits) 410411 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 43 DDB element 127 - 96 Binary Flag (32 bits) 410413 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 44 DDB element 159 - 128 Binary Flag (32 bits) 410415 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 45 DDB element 191 - 160 Binary Flag (32 bits) 410417 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 46 DDB element 223 - 192 Binary Flag (32 bits) 410419 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 47 DDB element 255 - 224 Binary Flag (32 bits) 410421 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 48 DDB element 287 - 256 Binary Flag (32 bits) 410423 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 49 DDB element 319 - 288 Binary Flag (32 bits) 410425 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 4A DDB element 351 - 320 Binary Flag (32 bits) 410427 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 4B DDB element 383 - 352 Binary Flag (32 bits) 410429 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 4C DDB element 415 - 384 Binary Flag (32 bits) 410431 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 4D DDB element 447 - 415 Binary Flag (32 bits) 410433 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 4E DDB element 479 - 448 Binary Flag (32 bits) 410435 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 4F DDB element 511 - 480 Binary Flag (32 bits) 410437 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 50 DDB element 543 - 512 Binary Flag (32 bits) 410439 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 51 DDB element 575 - 544 Binary Flag (32 bits) 410441 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
Courrier Data Base P44x/EN GC /F65
0B 52 DDB element 607 - 575 Binary Flag (32 bits) 410443 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 53 DDB element 639 - 608 Binary Flag (32 bits) 410445 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 54 DDB element 671 - 640 Binary Flag (32 bits) 410447 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 55 DDB element 703 - 672 Binary Flag (32 bits) 410449 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 56 DDB element 735 - 704 Binary Flag (32 bits) 410451 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 57 DDB element 767 - 736 Binary Flag (32 bits) 410453 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 58 DDB element 799 - 768 Binary Flag (32 bits) 410455 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 59 DDB element 831 - 800 Binary Flag (32 bits) 410457 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 5A DDB element 863 - 832 Binary Flag (32 bits) 410459 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 5B DDB element 895 - 864 Binary Flag (32 bits) 410461 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 5C DDB element 927 - 896 Binary Flag (32 bits) 410163 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 5D DDB element 959 - 928 Binary Flag (32 bits) 410465 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 5E DDB element 991 - 960 Binary Flag (32 bits) 410467 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
0B 5F DDB element 1023 - 992 Binary Flag (31 bits) 410469 G27 2 0x7FFFFFFF Setting 0 1 32 1 * * * * 0B0A
0C 1 Duration Courier Number (time) 40600 40600 G2 1 1.5 Setting 0.1 10.5 0.01 2 * * * *
0C 2 Trigger Position Courier Number (percentage) 40601 40601 G2 1 33.3 Setting 0 100 0.1 2 * * * *
0C 0C Digital Input 1 Indexed String 40611 40611 G32 G32 1 Relay 1 Setting 0 DDB Size 1 2 * * * *
0C 0D Input 1 Trigger Indexed String 40612 40612 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C0C
0C 0E Digital Input 2 Indexed String 40613 40613 G32 G32 1 Relay 2 Setting 0 DDB Size 1 2 * * * *
0C 0F Input 2 Trigger Indexed String 40614 40614 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C0E
0C 10 Digital Input 3 Indexed String 40615 40615 G32 G32 1 Relay 3 Setting 0 DDB Size 1 2 * * * *
0C 11 Input 3 Trigger Indexed String 40616 40616 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C10
Courrier Data Base P44x/EN GC /F65
0C 12 Digital Input 4 Indexed String 40617 40617 G32 G32 1 Relay 4 Setting 0 DDB Size 1 2 * * * *
0C 13 Input 4 Trigger Indexed String 40618 40618 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C12
0C 14 Digital Input 5 Indexed String 40619 40619 G32 G32 1 Relay 5 Setting 0 DDB Size 1 2 * * * *
0C 15 Input 5 Trigger Indexed String 40620 40620 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C14
0C 16 Digital Input 6 Indexed String 40621 40621 G32 G32 1 Relay 6 Setting 0 DDB Size 1 2 * * * *
0C 17 Input 6 Trigger Indexed String 40622 40622 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C16
0C 18 Digital Input 7 Indexed String 40623 40623 G32 G32 1 Relay 7 Setting 0 DDB Size 1 2 * * * *
0C 19 Input 7 Trigger Indexed String 40624 40624 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C18
0C 1A Digital Input 8 Indexed String 40625 40625 G32 G32 1 Relay 8 Setting 0 DDB Size 1 2 * * * *
0C 1B Input 8 Trigger Indexed String 40626 40626 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C1A
0C 1C Digital Input 9 Indexed String 40627 40627 G32 G32 1 Relay 9 Setting 0 DDB Size 1 2 * * * *
0C 1D Input 9 Trigger Indexed String 40628 40628 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C1C
0C 1E Digital Input 10 Indexed String 40629 40629 G32 G32 1 Relay 10 Setting 0 DDB Size 1 2 * * * *
0C 1F Input 10 Trigger Indexed String 40630 40630 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C1E
0C 20 Digital Input 11 Indexed String 40631 40631 G32 G32 1 Relay 11 Setting 0 DDB Size 1 2 * * * *
0C 21 Input 11 Trigger Indexed String 40632 40632 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C20
0C 22 Digital Input 12 Indexed String 40633 40633 G32 G32 1 Relay 12 Setting 0 DDB Size 1 2 * * * *
0C 23 Input 12 Trigger Indexed String 40634 40634 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C22
0C 24 Digital Input 13 Indexed String 40635 40635 G32 G32 1 Relay 13 Setting 0 DDB Size 1 2 * * * *
0C 25 Input 13 Trigger Indexed String 40636 40636 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C24
0C 26 Digital Input 14 Indexed String 40637 40637 G32 G32 1 Relay 14 Setting 0 DDB Size 1 2 * * * *
0C 27 Input 14 Trigger Indexed String 40638 40638 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C26
0C 28 Digital Input 15 Indexed String 40639 40639 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 29 Input 15 Trigger Indexed String 40640 40640 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C28
0C 2A Digital Input 16 Indexed String 40641 40641 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 2B Input 16 Trigger Indexed String 40642 40642 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C2A
0C 2C Digital Input 17 Indexed String 40643 40643 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 2D Input 17 Trigger Indexed String 40644 40644 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C2C
0C 2E Digital Input 18 Indexed String 40645 40645 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 2F Input 18 Trigger Indexed String 40646 40646 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C2E
0C 30 Digital Input 19 Indexed String 40647 40647 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 31 Input 19 Trigger Indexed String 40648 40648 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C30
0C 32 Digital Input 20 Indexed String 40649 40649 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
Courrier Data Base P44x/EN GC /F65
0C 33 Input 20 Trigger Indexed String 40650 40650 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C32
0C 34 Digital Input 21 Indexed String 40651 40651 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 35 Input 21 Trigger Indexed String 40652 40652 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C34
0C 36 Digital Input 22 Indexed String 40653 40653 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 37 Input 22 Trigger Indexed String 40654 40654 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C36
0C 38 Digital Input 23 Indexed String 40655 40655 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 39 Input 23 Trigger Indexed String 40656 40656 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C38
0C 3A Digital Input 24 Indexed String 40657 40657 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 3B Input 24 Trigger Indexed String 40658 40658 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C3A
0C 3C Digital Input 25 Indexed String 40659 40659 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 3D Input 25 Trigger Indexed String 40660 40660 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C3C
0C 3E Digital Input 26 Indexed String 40661 40661 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 3F Input 26 Trigger Indexed String 40662 40662 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C3E
0C 40 Digital Input 27 Indexed String 40663 40663 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 41 Input 27 Trigger Indexed String 40664 40664 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C40
0C 42 Digital Input 28 Indexed String 40665 40665 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 43 Input 28 Trigger Indexed String 40666 40666 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C42
0C 44 Digital Input 29 Indexed String 40667 40667 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 45 Input 29 Trigger Indexed String 40668 40668 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C44
0C 46 Digital Input 30 Indexed String 40669 40669 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 47 Input 30 Trigger Indexed String 40670 40670 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C46
0C 48 Digital Input 31 Indexed String 40671 40671 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 49 Input 31 Trigger Indexed String 40672 40672 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C48
0C 4A Digital Input 32 Indexed String 40673 40673 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
0C 4B Input 32 Trigger Indexed String 40674 40674 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C4A
0D 1 Default Display Indexed String 40700 40700 G52 G52 1 Description Setting 0 6 1 2 * * * *
0D 2 Local Values Indexed String 40701 40701 G54 G54 1 Secondary Setting 0 1 1 2 * * * *
0D 3 Remote Values Indexed String 40702 40702 G54 G54 1 Primary Setting 0 1 1 2 * * * *
0D 7 Distance Unit Indexed String 40706 40706 G97 G97 1 Kilometres Setting 0 1 1 2 * * * * 090D
0D 8 Fault Location Indexed String 40707 40707 G51 G51 1 Distance Setting 0 2 1 2 * * * * 090D
0E 00 COMMUNICATIONS * * * * 092C
0E 4 Baud Rate Indexed String 40802 40802 G38m G38 1 19200 bits/s Setting 0 1 1 2 * * * *
0E 0D RP1 Comms Mode Indexed String G206 G1 1 IEC60870 FT1.2 Setting 0 1 1 2 * * * * 0E0B
0E 0E RP1 Baud Rate Indexed String G38m G1 1 19200 bits/s Setting 0 2 1 2 * * * * 0E0B
0E 10 Message Gap (ms) Courier Number (Time) 0 Setting 0 50 1 * * * Build = DNP ( Interframe GAP)
0E 64 NIC Tunl Timeout Courier Number (time-minutes) 5.00 min Setting 1 30 1 2 * * * Build = IEC61850
0E 6A NIC Link Report Indexed String G226 Alarm Setting 0 2 1 2 * * * Build = IEC61850
Courrier Data Base P44x/EN GC /F65
0E 88 RP2 Port Config Indexed String G205 G205 G1 EIA232 (RS232) Setting 0 1 1 2 * * *
0E 8A RP2 Comms Mode Indexed String G206 G206 G1 IEC60870 FT1.2 Setting 0 1 1 2 * * *
0E 94 RP2 Baud Rate Indexed String G38 G38m G1 19200 bits/s Setting 0 1 1 2 * * *
0E A9 Link Check Timeout Courier Number (Time) 60s Setting 0,1 60 0,1 2 * * *
0F 6 Monitor Bit 1 Unsigned Integer 40849 40849 G32 G32 1 Relay 1 Setting 0 DDB Size 1 2 * * * *
0F 7 Monitor Bit 2 Unsigned Integer 40851 40850 G32 G32 1 Relay 2 Setting 0 DDB Size 1 2 * * * *
0F 8 Monitor Bit 3 Unsigned Integer 40852 40851 G32 G32 1 Relay 3 Setting 0 DDB Size 1 2 * * * *
Courrier Data Base P44x/EN GC /F65
0F 9 Monitor Bit 4 Unsigned Integer 40853 40852 G32 G32 1 Relay 4 Setting 0 DDB Size 1 2 * * * *
0F 0A Monitor Bit 5 Unsigned Integer 40854 40853 G32 G32 1 Relay 5 Setting 0 DDB Size 1 2 * * * *
0F 0B Monitor Bit 6 Unsigned Integer 40855 40854 G32 G32 1 Relay 6 Setting 0 DDB Size 1 2 * * * *
0F 0C Monitor Bit 7 Unsigned Integer 40856 40855 G32 G32 1 Relay 7 Setting 0 DDB Size 1 2 * * * *
0F 0D Monitor Bit 8 Unsigned Integer 40857 40856 G32 G32 1 Relay 8 Setting 0 DDB Size 1 2 * * * *
0F 0E Test Mode Indexed String 40858 40858 G204 G204 1 Disabled Setting 0 2 1 2 * * * *
0F 0F Test Pattern 1 Binary Flags (32bits) 40859 40860 G9 G9 2 0 Setting 0 4,295E+09 1 2 * * * * 0F0E
Indexed String
0F 10 Test Pattern 2 Binary Flags (32bits) 40861 40862 G9 G9 2 0 Setting 0 16383 1 2 0F0E
Indexed String
0F 11 Contact Test Indexed String 40863 40863 G93 G93 1 No Operation Command 0 2 1 2 * * * * 0F0E
0F 12 Test LEDs Binary Flags (8bits) 40864 40864 G94 G94 1 No Operation Command 0 1 1 2 * * * *
Indexed String
0F 13 Autoreclose Test Indexed String 40865 40865 G36 G36 1 No Operation Command 0 4 1 2 * * * * SMF
0F 20 DDB element 31 - 0 Binary Flag (32 bits) N/A 311023 311024 G27 2 Data * * * *
0F 21 DDB element 63 - 32 Binary Flag (32 bits) N/A 311025 311026 G27 2 Data * * * *
0F 22 DDB element 95 - 64 Binary Flag (32 bits) N/A 311027 311028 G27 2 Data * * * *
0F 23 DDB element 127 - 96 Binary Flag (32 bits) N/A 311029 311030 G27 2 Data * * * *
0F 24 DDB element 159 - 128 Binary Flag (32 bits) N/A 311031 311032 G27 2 Data * * * *
0F 25 DDB element 191 - 160 Binary Flag (32 bits) N/A 311033 311034 G27 2 Data * * * *
0F 26 DDB element 223 - 192 Binary Flag (32 bits) N/A 311035 311036 G27 2 Data * * * *
0F 27 DDB element 255 - 224 Binary Flag (32 bits) N/A 311037 311038 G27 2 Data * * * *
0F 28 DDB element 287 - 256 Binary Flag (32 bits) N/A 311039 311040 G27 2 Data * * * *
0F 29 DDB element 319 - 288 Binary Flag (32 bits) N/A 311041 311042 G27 2 Data * * * *
0F 2A DDB element 351 - 320 Binary Flag (32 bits) N/A 311043 311044 G27 2 Data * * * *
0F 2B DDB element 383 - 352 Binary Flag (32 bits) N/A 311045 311046 G27 2 Data * * * *
0F 2C DDB element 415 - 384 Binary Flag (32 bits) N/A 311047 311048 G27 2 Data * * * *
0F 2D DDB element 447 - 415 Binary Flag (32 bits) N/A 311049 311050 G27 2 Data * * * *
0F 2E DDB element 479 - 448 Binary Flag (32 bits) N/A 311051 311052 G27 2 Data * * * *
0F 2F DDB element 511 - 480 Binary Flag (32 bits) N/A 311053 311054 G27 2 Data * * * *
0F 30 DDB element 543 - 512 Binary Flag (32 bits) N/A 311055 311056 G27 2 Data * * * *
0F 31 DDB element 575 - 544 Binary Flag (32 bits) N/A 311057 311058 G27 2 Data * * * *
0F 32 DDB element 607 - 575 Binary Flag (32 bits) N/A 311059 311060 G27 2 Data * * * *
0F 33 DDB element 639 - 608 Binary Flag (32 bits) N/A 311061 311062 G27 2 Data * * * *
Courrier Data Base P44x/EN GC /F65
0F 34 DDB element 671 - 640 Binary Flag (32 bits) N/A 311063 311064 G27 2 Data * * * *
0F 35 DDB element 703 - 672 Binary Flag (32 bits) N/A 311065 311066 G27 2 Data * * * *
0F 36 DDB element 735 - 704 Binary Flag (32 bits) N/A 311067 311068 G27 2 Data * * * *
0F 37 DDB element 767 - 736 Binary Flag (32 bits) N/A 311069 311070 G27 2 Data * * * *
0F 38 DDB element 799 - 768 Binary Flag (32 bits) N/A 311071 311072 G27 2 Data * * * *
0F 39 DDB element 831 - 800 Binary Flag (32 bits) N/A 311073 311074 G27 2 Data * * * *
0F 3A DDB element 863 - 832 Binary Flag (32 bits) N/A 311075 311076 G27 2 Data * * * *
0F 3B DDB element 895 - 864 Binary Flag (32 bits) N/A 311077 311078 G27 2 Data * * * *
0F 3C DDB element 927 - 896 Binary Flag (32 bits) N/A 311079 311080 G27 2 Data * * * *
0F 3D DDB element 959 - 928 Binary Flag (32 bits) N/A 311081 311082 G27 2 Data * * * *
0F 3E DDB element 991 - 960 Binary Flag (32 bits) N/A 311083 311084 G27 2 Data * * * *
0F 3F DDB element 1023 - 992 Binary Flag (31 bits) N/A 311085 311086 G27 2 Data * * * *
10 00 CB MONITOR SETUP * * * *
10 2 I^ Maintenance Indexed String 40152 40152 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *
10 3 I^ Maintenance Courier Number (Current) 40153 40154 G35 24999 2 1000 Setting 1*NM1 25000*NM1 1*NM1 2 * * * * 1002
10 4 I^ Lockout Indexed String 40155 40155 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *
10 5 I^ Lockout Courier Number (Current) 40156 40157 G35 24999 2 2000 Setting 1*NM1 25000*NM1 1*NM1 2 * * * * 1004
10 6 N° CB Ops Maint Indexed String 40158 40158 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *
10 7 N° CB Ops Maint Unsigned Integer 40159 40159 G1 9999 1 10 Setting 1 10000 1 2 * * * * 1006
10 8 N° CB Ops Lock Indexed String 40160 40160 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *
10 9 N° CB Ops Lock Unsigned Integer 40161 40161 G1 9999 1 20 Setting 1 10000 1 2 * * * * 1008
10 0A CB Time Maint Indexed String 40162 40162 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *
10 0B CB Time Maint Courier Number (Time) 40163 40164 G35 495 2 0,1 Setting 0,005 0,5 0,001 2 * * * * 100A
10 0C CB Time Lockout Indexed String 40165 40165 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *
10 0D CB Time Lockout Courier Number (Time) 40166 40167 G35 495 2 0,2 Setting 0,005 0,5 0,001 2 * * * * 100C
10 0E Fault Freq Lock Indexed String 40168 40168 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *
10 0F Fault Freq Count Unsigned Integer 40169 40169 G1 9999 1 10 Setting 0 9999 1 2 * * * * 100E
10 10 Fault Freq Time Courier Number (time) 40170 40171 G35 2 3600 Setting 0 9999 1 2 * * * * 100E
10 12 Reset Lockout by Indexed String 40173 40173 G81 G81 1 CB Close Setting 0 1 1 2 * * * *
Courrier Data Base P44x/EN GC /F65
11 01 Global threshold Indexed String 40900 40900 G200 G200 1 24-27V Setting 0 5 1 2 * * * *
11 02 Opto Input 1 Indexed String 40901 40901 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101
11 03 Opto Input 2 Indexed String 40902 40902 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101
11 04 Opto Input 3 Indexed String 40903 40903 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101
11 05 Opto Input 4 Indexed String 40904 40904 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101
11 06 Opto Input 5 Indexed String 40905 40905 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101
11 07 Opto Input 6 Indexed String 40906 40906 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101
11 08 Opto Input 7 Indexed String 40907 40907 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101
11 09 Opto Input 8 Indexed String 40908 40908 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101
11 0A Opto Input 9 Indexed String 40909 40909 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101
11 0B Opto Input 10 Indexed String 40910 40910 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101
11 0C Opto Input 11 Indexed String 40911 40911 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101
11 0D Opto Input 12 Indexed String 40912 40912 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101
11 0E Opto Input 13 Indexed String 40913 40913 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101
11 0F Opto Input 14 Indexed String 40914 40914 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101
11 10 Opto Input 15 Indexed String 40915 40915 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101
11 11 Opto Input 16 Indexed String 40916 40916 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101
11 12 Opto Input 17 Indexed String 40917 40917 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101
11 13 Opto Input 18 Indexed String 40918 40918 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101
11 14 Opto Input 19 Indexed String 40919 40919 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101
11 15 Opto Input 20 Indexed String 40920 40920 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101
11 16 Opto Input 21 Indexed String 40921 40921 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101
11 17 Opto Input 22 Indexed String 40922 40922 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101
11 18 Opto Input 23 Indexed String 40923 40923 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101
11 19 Opto Input 24 Indexed String 40924 40924 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101
11 1A Opto Input 25 Indexed String 40925 40925 G201 G201 1 24-27V Setting 0 4 1 2 1101
11 1B Opto Input 26 Indexed String 40926 40926 G201 G201 1 24-27V Setting 0 4 1 2 1101
11 1C Opto Input 27 Indexed String 40927 40927 G201 G201 1 24-27V Setting 0 4 1 2 1101
11 1D Opto Input 28 Indexed String 40928 40928 G201 G201 1 24-27V Setting 0 4 1 2 1101
11 1E Opto Input 29 Indexed String 40929 40929 G201 G201 1 24-27V Setting 0 4 1 2 1101
Courrier Data Base P44x/EN GC /F65
11 1F Opto Input 30 Indexed String 40930 40930 G201 G201 1 24-27V Setting 0 4 1 2 1101
11 20 Opto Input 31 Indexed String 40931 40931 G201 G201 1 24-27V Setting 0 4 1 2 1101
11 21 Opto Input 32 Indexed String 40932 40932 G201 G201 1 24-27V Setting 0 4 1 2 1101
11 50 Opto Filter Cntl Binary Flag 40933 40934 G8 G8 2 0xFFFFFFFF Setting 0 FFFFFFFF 1 2 * * * *
(32 bits)
11 80 Characteristic Indexed String 40935 40935 G237 G1 1 PLAT_OPTO_CHARSetting 0 1 1 2 * * * * smf
12 01 Ctrl I/P Status Binary Flag (32 bits) 40950 40951 G202 G202 2 0x00000000 Setting 0x00000000 32 1 2 * * * *
Indexed String
12 02 Control Input 1 Indexed String 40952 G203 G203 1 No operation Command 0 2 1 2 * * * *
13 01 Hotkey Enabled Binary Flag (32 bits) G233 0xFFFFFFFF Setting 0xFFFFFFFF 32 1 2 * * * * 0939
Indexed String
13 10 Control Input 1 Indexed String 410 002 G234 G234 Latched Setting 0 1 1 2 * * * *
13 11 Ctrl Command 1 Indexed String 410 003 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 14 Control Input 2 Indexed String 410 004 G234 G234 Latched Setting 0 1 1 2 * * * *
13 15 Ctrl Command 2 Indexed String 410 005 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 18 Control Input 3 Indexed String 410 006 G234 G234 Latched Setting 0 1 1 2 * * * *
13 19 Ctrl Command 3 Indexed String 410 007 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 1C Control Input 4 Indexed String 410 008 G234 G234 Latched Setting 0 1 1 2 * * * *
13 1D Ctrl Command 4 Indexed String 410 009 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 20 Control Input 5 Indexed String 410 010 G234 G234 Latched Setting 0 1 1 2 * * * *
13 21 Ctrl Command 5 Indexed String 410 011 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 24 Control Input 6 Indexed String 410 012 G234 G234 Latched Setting 0 1 1 2 * * * *
13 25 Ctrl Command 6 Indexed String 410 013 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 28 Control Input 7 Indexed String 410 014 G234 G234 Latched Setting 0 1 1 2 * * * *
13 29 Ctrl Command 7 Indexed String 410 015 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 2C Control Input 8 Indexed String 410 016 G234 G234 Latched Setting 0 1 1 2 * * * *
13 2D Ctrl Command 8 Indexed String 410 017 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 30 Control Input 9 Indexed String 410 018 G234 G234 Latched Setting 0 1 1 2 * * * *
13 31 Ctrl Command 9 Indexed String 410 019 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 34 Control Input 10 Indexed String 410 020 G234 G234 Latched Setting 0 1 1 2 * * * *
13 35 Ctrl Command 10 Indexed String 410 021 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 38 Control Input 11 Indexed String 410 022 G234 G234 Latched Setting 0 1 1 2 * * * *
13 39 Ctrl Command 11 Indexed String 410 023 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 3C Control Input 12 Indexed String 410 024 G234 G234 Latched Setting 0 1 1 2 * * * *
13 3D Ctrl Command 12 Indexed String 410 025 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
Courrier Data Base P44x/EN GC /F65
13 41 Ctrl Command 13 Indexed String 410 027 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 44 Control Input 14 Indexed String 410 028 G234 G234 Latched Setting 0 1 1 2 * * * *
13 45 Ctrl Command 14 Indexed String 410 029 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 48 Control Input 15 Indexed String 410 030 G234 G234 Latched Setting 0 1 1 2 * * * *
13 49 Ctrl Command 15 Indexed String 410 031 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 4C Control Input 16 Indexed String 410 032 G234 G234 Latched Setting 0 1 1 2 * * * *
13 4D Ctrl Command 16 Indexed String 410 033 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 50 Control Input 17 Indexed String 410 034 G234 G234 Latched Setting 0 1 1 2 * * * *
13 51 Ctrl Command 17 Indexed String 410 035 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 54 Control Input 18 Indexed String 410 036 G234 G234 Latched Setting 0 1 1 2 * * * *
13 55 Ctrl Command 18 Indexed String 410 037 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 58 Control Input 19 Indexed String 410 038 G234 G234 Latched Setting 0 1 1 2 * * * *
13 59 Ctrl Command 19 Indexed String 410 039 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 5C Control Input 20 Indexed String 410 040 G234 G234 Latched Setting 0 1 1 2 * * * *
13 5D Ctrl Command 20 Indexed String 410 041 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 60 Control Input 21 Indexed String 410 042 G234 G234 Latched Setting 0 1 1 2 * * * *
13 61 Ctrl Command 21 Indexed String 410 043 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 64 Control Input 22 Indexed String 410 044 G234 G234 Latched Setting 0 1 1 2 * * * *
13 65 Ctrl Command 22 Indexed String 410 045 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 68 Control Input 23 Indexed String 410 046 G234 G234 Latched Setting 0 1 1 2 * * * *
13 69 Ctrl Command 23 Indexed String 410 047 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 6C Control Input 24 Indexed String 410 048 G234 G234 Latched Setting 0 1 1 2 * * * *
13 6D Ctrl Command 24 Indexed String 410 049 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 70 Control Input 25 Indexed String 410 050 G234 G234 Latched Setting 0 1 1 2 * * * *
13 71 Ctrl Command 25 Indexed String 410 051 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 74 Control Input 26 Indexed String 410 052 G234 G234 Latched Setting 0 1 1 2 * * * *
13 75 Ctrl Command 26 Indexed String 410 053 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 78 Control Input 27 Indexed String 410 054 G234 G234 Latched Setting 0 1 1 2 * * * *
13 79 Ctrl Command 27 Indexed String 410 055 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 7C Control Input 28 Indexed String 410 056 G234 G234 Latched Setting 0 1 1 2 * * * *
13 7D Ctrl Command 28 Indexed String 410 057 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 80 Control Input 29 Indexed String 410 058 G234 G234 Latched Setting 0 1 1 2 * * * *
13 81 Ctrl Command 29 Indexed String 410 059 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
Courrier Data Base P44x/EN GC /F65
13 85 Ctrl Command 30 Indexed String 410 061 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 88 Control Input 31 Indexed String 410 062 G234 G234 Latched Setting 0 1 1 2 * * * *
13 89 Ctrl Command 31 Indexed String 410 063 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
13 8C Control Input 32 Indexed String 410 064 G234 G234 Latched Setting 0 1 1 2 * * * *
13 8D Ctrl Command 32 Indexed String 410 065 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
15 21 Rx Direct Count Unsigned Integer(32 bit) 310002 310003 G27 Data * * * 1520
15 22 Rx Perm Count Unsigned Integer(32 bit) 310004 310005 G27 Data * * * 1520
15 23 Rx Block Count Unsigned Integer(32 bit) 310006 310007 G27 Data * * * 1520
15 30 Elapsed Time Unsigned Integer(32 bit) 310014 310015 G27 Data * * * 1520
15 51 Test Pattern Binary Flags (8 bits) 410508 410508 G1 256 Setting 0 8 1 2 * * * 1550
Indexed String
15 52 Loopback Status Indexed Strings 310021 310021 G217 G1 Data * * * 1550
16 01 IM Msg Alarm Lvl Float 410520 410521 G35 25 Setting 0 100 0,1 2 * * *
Courrier Data Base P44x/EN GC /F65
16 11 IM1 FallBackMode Indexed Strings 410523 410523 G215 G1 Default Setting 0 1 1 2 * * * 1610
16 13 IM1 FrameSyncTim Float 410525 410526 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1611
16 18 IM2 Cmd Type Indexed Strings 410527 410527 G211 G1 Direct Setting 0 2 1 2 * * *
16 19 IM2 FallBackMode Indexed Strings 410528 410528 G215 G1 Default Setting 0 1 1 2 * * * 1618
16 1B IM2 FrameSyncTim Float 410530 410531 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1619
16 20 IM3 Cmd Type Indexed Strings 410532 410532 G211 G1 Direct Setting 0 2 1 2 * * *
16 21 IM3 FallBackMode Indexed Strings 410533 410533 G215 G1 Default Setting 0 1 1 2 * * * 1620
16 23 IM3 FrameSyncTim Float 410535 410536 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1621
16 28 IM4 Cmd Type Indexed Strings 410537 410537 G211 G1 Direct Setting 0 2 1 2 * * *
16 29 IM4 FallBackMode Indexed Strings 410538 410538 G215 G1 Default Setting 0 1 1 2 * * * 1628
16 2B IM4 FrameSyncTim Float 410540 410541 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1629
16 30 IM5 Cmd Type Indexed Strings 410542 410542 G212 G1 Direct Setting 0 2 1 2 * * *
16 31 IM5 FallBackMode Indexed Strings 410543 410543 G215 G1 Default Setting 0 1 1 2 * * * 1630
16 33 IM5 FrameSyncTim Float 410545 410546 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1631
16 38 IM6 Cmd Type Indexed Strings 410547 410547 G212 G1 Direct Setting 0 2 1 2 * * *
16 39 IM6 FallBackMode Indexed Strings 410548 410548 G215 G1 Default Setting 0 1 1 2 * * * 1638
16 2B IM6 FrameSyncTim Float 410550 410551 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1639
16 40 IM7 Cmd Type Indexed Strings 410552 410552 G212 G1 Direct Setting 0 2 1 2 * * *
16 41 IM7 FallBackMode Indexed Strings 410553 410553 G215 G1 Default Setting 0 1 1 2 * * * 1640
16 43 IM7 FrameSyncTim Float 410555 410556 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1641
16 48 IM8 Cmd Type Indexed Strings 410557 410557 G212 G1 Direct Setting 0 2 1 2 * * *
16 49 IM8 FallBackMode Indexed Strings 410558 410558 G215 G1 Default Setting 0 1 1 2 * * * 1648
16 4B IM8 FrameSyncTim Float 410560 410561 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1649
17 00 FUNCTION KEYS
17 04 Fn Key 1 Label ASCII Text(16 characters) 410777 410784 G3 Function Key 1 Setting 32 163 1 2 * * *
17 07 Fn Key 2 Label ASCII Text(16 characters) 410787 410794 G3 Function Key 1 Setting 32 163 1 2 * * *
17 0A Fn Key 3 Label ASCII Text(16 characters) 410797 410804 G3 Function Key 1 Setting 32 163 1 2 * * *
17 0D Fn Key 4 Label ASCII Text(16 characters) 410807 410814 G3 Function Key 1 Setting 32 163 1 2 * * *
17 10 Fn Key 5 Label ASCII Text(16 characters) 410817 410824 G3 Function Key 1 Setting 32 163 1 2 * * *
17 13 Fn Key 6 Label ASCII Text(16 characters) 410827 410834 G3 Function Key 1 Setting 32 163 1 2 * * *
17 16 Fn Key 7 Label ASCII Text(16 characters) 410837 410844 G3 Function Key 1 Setting 32 163 1 2 * * *
17 19 Fn Key 8 Label ASCII Text(16 characters) 410847 410854 G3 Function Key 1 Setting 32 163 1 2 * * *
17 1C Fn Key 9 Label ASCII Text(16 characters) 410857 410864 G3 Function Key 1 Setting 32 163 1 2 * * *
17 1F Fn Key 10 Label ASCII Text(16 characters) 410867 410874 G3 Function Key 1 Setting 32 163 1 2 * * *
19 72 VOP Test Pattern Binary Flag (32 bits) 0x00000000 Setting 0xFFFFFFFF 32 1 2 * * * Build=IEC61850
Courrier Data Base P44x/EN GC /F65
29 01 Control Input 1 ASCII Text (16 chars) 410 100 410 107 G3 8 Control Input 1 Setting 32 163 1 2 * * * *
29 02 Control Input 2 ASCII Text (16 chars) 410 108 410 115 G3 8 Control Input 2 Setting 32 163 1 2 * * * *
29 03 Control Input 3 ASCII Text (16 chars) 410 116 410 123 G3 8 Control Input 3 Setting 32 163 1 2 * * * *
29 04 Control Input 4 ASCII Text (16 chars) 410 124 410 131 G3 8 Control Input 4 Setting 32 163 1 2 * * * *
29 05 Control Input 5 ASCII Text (16 chars) 410 132 410 139 G3 8 Control Input 5 Setting 32 163 1 2 * * * *
29 06 Control Input 6 ASCII Text (16 chars) 410 140 410 147 G3 8 Control Input 6 Setting 32 163 1 2 * * * *
29 07 Control Input 7 ASCII Text (16 chars) 410 148 410 155 G3 8 Control Input 7 Setting 32 163 1 2 * * * *
29 08 Control Input 8 ASCII Text (16 chars) 410 156 410 163 G3 8 Control Input 8 Setting 32 163 1 2 * * * *
29 09 Control Input 9 ASCII Text (16 chars) 410 164 410 171 G3 8 Control Input 9 Setting 32 163 1 2 * * * *
29 0A Control Input 10 ASCII Text (16 chars) 410 172 410 179 G3 8 Control Input 10 Setting 32 163 1 2 * * * *
29 0B Control Input 11 ASCII Text (16 chars) 410 180 410 187 G3 8 Control Input 11 Setting 32 163 1 2 * * * *
29 0C Control Input 12 ASCII Text (16 chars) 410 188 410 195 G3 8 Control Input 12 Setting 32 163 1 2 * * * *
29 0D Control Input 13 ASCII Text (16 chars) 410 196 410 203 G3 8 Control Input 13 Setting 32 163 1 2 * * * *
29 0E Control Input 14 ASCII Text (16 chars) 410 204 410 211 G3 8 Control Input 14 Setting 32 163 1 2 * * * *
29 0F Control Input 15 ASCII Text (16 chars) 410 212 410 219 G3 8 Control Input 15 Setting 32 163 1 2 * * * *
29 10 Control Input 16 ASCII Text (16 chars) 410 220 410 227 G3 8 Control Input 16 Setting 32 163 1 2 * * * *
29 11 Control Input 17 ASCII Text (16 chars) 410 228 410 235 G3 8 Control Input 17 Setting 32 163 1 2 * * * *
29 12 Control Input 18 ASCII Text (16 chars) 410 236 410 243 G3 8 Control Input 18 Setting 32 163 1 2 * * * *
29 13 Control Input 19 ASCII Text (16 chars) 410 244 410 251 G3 8 Control Input 19 Setting 32 163 1 2 * * * *
29 14 Control Input 20 ASCII Text (16 chars) 410 252 410 259 G3 8 Control Input 20 Setting 32 163 1 2 * * * *
29 15 Control Input 21 ASCII Text (16 chars) 410 260 410 267 G3 8 Control Input 21 Setting 32 163 1 2 * * * *
29 16 Control Input 22 ASCII Text (16 chars) 410 268 410 275 G3 8 Control Input 22 Setting 32 163 1 2 * * * *
29 17 Control Input 23 ASCII Text (16 chars) 410 276 410 283 G3 8 Control Input 23 Setting 32 163 1 2 * * * *
29 18 Control Input 24 ASCII Text (16 chars) 410 284 410 291 G3 8 Control Input 24 Setting 32 163 1 2 * * * *
29 19 Control Input 25 ASCII Text (16 chars) 410 292 410 299 G3 8 Control Input 25 Setting 32 163 1 2 * * * *
29 1A Control Input 26 ASCII Text (16 chars) 410 300 410 307 G3 8 Control Input 26 Setting 32 163 1 2 * * * *
29 1B Control Input 27 ASCII Text (16 chars) 410 308 410 315 G3 8 Control Input 27 Setting 32 163 1 2 * * * *
29 1C Control Input 28 ASCII Text (16 chars) 410 316 410 323 G3 8 Control Input 28 Setting 32 163 1 2 * * * *
29 1D Control Input 29 ASCII Text (16 chars) 410 324 410 331 G3 8 Control Input 29 Setting 32 163 1 2 * * * *
29 1E Control Input 30 ASCII Text (16 chars) 410 332 410 339 G3 8 Control Input 30 Setting 32 163 1 2 * * * *
29 1F Control Input 31 ASCII Text (16 chars) 410 340 410 347 G3 8 Control Input 31 Setting 32 163 1 2 * * * *
Courrier Data Base P44x/EN GC /F65
29 20 Control Input 32 ASCII Text (16 chars) 410 348 410 355 G3 8 Control Input 32 Setting 32 163 1 2 * * * *
30 2 Line Length Courier Number (metres) 41000 41001 G35 2 100000 Setting 300 1000000 10 2 * * * * 0D07
30 3 Line Length Courier Number (miles) 41002 41003 G35 2 62 Setting 0.2 625 0.005 2 * * * * 0D07
30 4 Line Impedance Courier Number(Ohms) 41004 41005 G35 2 12 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * *
30 5 Line Angle Courier Number (Angle) 41006 41006 G2 1 70 Setting -90 90 0.1 2 * * * *
30 9 kZ1 Angle Courier Number (Angle) 41008 41008 G2 1 0 Setting -180 180 0.1 2 * * * *
30 0B Z1X Courier Number(Ohms) 41011 41012 G35 2 15 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * * SMF
30 0F kZ2 Res Comp Courier Number 41016 41016 G2 1 1 Setting 0 7 0.001 2 * * * * SMF
30 10 kZ2 Angle Courier Number (Angle) 41017 41017 G2 1 0 Setting -180 180 0.1 2 * * * * SMF
30 11 Z2 Courier Number(Ohms) 41018 41019 G35 2 20 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * * SMF
30 15 kZ3/4 Res Comp Courier Number 41023 41023 G2 1 1 Setting 0 7 0.001 2 * * * * SMF
30 16 kZ3/4 Angle Courier Number (Angle) 41024 41024 G2 1 0 Setting -180 180 0.1 2 * * * * SMF
30 17 Z3 Courier Number(Ohms) 41025 41026 G35 2 30 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * * SMF
30 18 R3G - R4G Courier Number(Ohms) 41027 41027 G2 1 30 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * * SMF
30 19 R3Ph - R4Ph Courier Number(Ohms) 41028 41028 G2 1 30 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * * SMF
30 1B Z4 Courier Number(Ohms) 41030 41031 G35 2 40 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * * SMF
30 1D Zone P - Direct. Indexed String 41033 41033 G123 1 Directional Fwd Setting 0 1 1 2 * * * * SMF
Courrier Data Base P44x/EN GC /F65
30 1E kZp Res Comp Courier Number 41034 41034 G2 1 1 Setting 0 7 0.001 2 * * * * SMF
30 1F kZp Angle Courier Number (Angle) 41035 41035 G2 1 0 Setting -180 180 0.1 2 * * * * SMF
30 20 Zp Courier Number(Ohms) 41036 41037 G35 2 25 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * * SMF
30 24 Zone Q - Direct. Indexed String 41041 41041 G123 1 Directional Fwd Setting 0 1 1 2 * * * * SMF
30 25 kZq Res Comp Courier Number 41042 41042 G2 1 1 Setting 0 7 0.001 2 * * * * SMF
30 26 kZq Angle Courier Number (Angle) 41043 41043 G2 1 0 Setting -180 180 0.1 2 * * * * SMF
30 27 Zq Courier Number(Ohms) 41044 41045 G35 2 27 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * * SMF
30 2C Serial Comp Line Indexed String 41049 41049 G37 1 Disableb Setting 0 1 1 2 * * * *
30 2D Zone Overlap Mode Indexed String 41050 41050 G37 1 Disableb Setting 0 1 1 2 * * * *
30 2E Z1m Tilt Angle Courier Number (Angle) 41051 41051 G2 1 0 Setting -45 45 1 2 * * * * SMF
30 2F Z1p Tilt Angle Courier Number (Angle) 41052 41052 G2 1 0 Setting -45 45 1 2 * * * * SMF
30 30 Z2/Zp/Zq Tilt Angle Courier Number (Angle) 41053 41053 G2 1 0 Setting -45 45 1 2 * * * * SMF
30 31 Fwd Zone Chg Del Courier Number(Time) 41054 41054 G2 1 0,03 Setting 0 0,1 0,01 2 * * * * SMF
30 33 Earth I Detect Courier Number(Time) 41056 41056 G2 1 0.05*I1 Setting 0*I1 0.1*I1 0.01*I1 2 * * * *
30 36 kZm Angle Courier Number (Angle) 41058 41058 G2 1 0 Setting -180 180 0.1 2 * * * *
DISTANCE ELEMENTS
31 00 GROUP 1 * * * *
DISTANCE SCHEMES
31 1 Program Mode Indexed String 41060 41060 G106 G106 1 Standard Scheme Setting 0 1 1 2 * * * *
31 2 Standard Mode Indexed String 41061 41061 G107 G107 1 Basic + Z1X Setting 0 6 1 2 * * * * 3101
31 3 Fault Type Indexed String 41062 41062 G115 G115 1 Both Enabled Setting 0 2 1 2 * * * *
31 4 Trip Mode Indexed String 41063 41063 G114 G114 1 Force 3 Poles Trip Setting 0 2 1 2 * * *
31 5 Sig. Send Zone Indexed String 41064 41064 G108 G108 1 None Setting 0 3 1 2 * * * * 3101
31 6 DistCR Indexed String 41065 41065 G109 G109 1 None Setting 0 5 1 2 * * * * 3101
Courrier Data Base P44x/EN GC /F65
31 8 tReversal Guard Courier Number(Time) 41067 41067 G2 1 0.02 Setting 0 0.15 0.002 2 * * * *
31 9 Unblocking Logic Indexed String 41068 41068 G113 G113 1 None Setting 0 2 1 * * * *
31 0A TOR-SOTF Mode Binary Flags (16bits) 41069 41069 G118 G118 1 48 Setting 0 32767 1 2 * * * *
31 0C Z1Ext On Chan.Fail Indexed String 41071 41071 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
31 0E WI :Mode Status Indexed String 41072 41072 G116 G116 1 Disabled Setting 0 3 1 2 * * * *
31 0F WI : Single Pole Trip Indexed String 41073 41073 G37 G37 1 Disabled Setting 0 1 1 2 * * * 310E
31 11 WI : Trip Time Delay Courier Number (Time) 41075 41075 G2 1 0.06 Setting 0 1 0.002 2 * * * * 310E
31 12 PAP : TeleTrip Enable Indexed String 41076 41076 G37 G37 1 Disabled Setting 0 1 1 2 * * * * 310E
31 13 PAP : Trip Delayed Enable Indexed String 41077 41077 G37 G37 1 Disabled Setting 0 1 1 2 * * * * 310E
31 14 PAP : P1 Indexed String 41078 41078 G37 G37 1 Disabled Setting 0 1 1 2 * * * 3113
31 15 PAP : 1P Trip Time Delay Courier Number (Time) 41079 41079 G2 1 0,5 Setting 0,1 1,5 0,1 2 * * * 3114
31 16 PAP : P2 Indexed String 41080 41080 G37 G37 1 Disabled Setting 0 1 1 2 * * * * 3113
31 17 PAP : P3 Indexed String 41081 41081 G37 G37 1 Disabled Setting 0 1 1 2 * * * * 3113
31 18 PAP : 3P Trip Delay Courier Number (Time) 41082 41082 G2 1 2 Setting 1 12 0,1 2 * * * * 3113
31 19 PAP : Residual Current Courier Number (Current) 41083 41083 G2 1 0.5*I1 Setting 0.1*I1 1*I1 0.01*I1 2 * * * * SMF
31 1A PAP : K Courier Number 41084 41084 G2 1 0,5 Setting 0,5 1 0,05 2 * * * * SMF
31 1C LoL: Mode Status Indexed String 41085 41085 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
31 1D LoL. Chan. Fail Indexed String 41086 41086 G37 G37 1 Disabled Setting 0 1 1 2 * * * * 311C
31 1E LoL: I< Courier Number (Current) 41087 41087 G2 1 0.5 Setting 0.05*I1 1*I1 0.05*I1 2 * * * * 311C
31 1F LoL: Window Courier Number (Time) 41088 41088 G2 1 0.04 Setting 0.01 0.1 0.01 2 * * * * 311C
DISTANCE SCHEMES
32 00 GROUP 1 * * * * 0910
POWER-SWING
32 1 ∆Ρ Courier Number (Ohms) 41150 41150 G2 1 0.5 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * *
32 3 IN > Status Indexed String 41152 41152 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
32 4 IN > (% Imax) Courier Number (%) 41153 41153 G2 1 40 Setting 10 100 1 2 * * * * 3203
32 5 I2 > Status Indexed String 41154 41154 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
32 6 I2 > (% Imax) Courier Number (%) 41155 41155 G2 1 30 Setting 10 100 1 2 * * * * 3205
Courrier Data Base P44x/EN GC /F65
32 7 Imax Line > Status Indexed String 41156 41156 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
32 8 Imax Line > Courier Number (Current) 41157 41157 G2 1 3 Setting 1*I1 20*I1 0.01*I1 2 * * * * 3207
32 9 Delta I Status Indexed String 41158 41158 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
32 0B Blocking Zones Binary Flag(8 bits) 41160 41160 G119 G119 1 0 Setting 0 63 1 2 * * * *
Indexed String
32 0C Out of Step Unisgned Integer (16 bits) 41161 41161 1 Setting 1 255 1 2 * * * *
32 0D Stable Swing Unisgned Integer (16 bits) 41162 41162 1 Setting 1 255 1 2 * * * *
POWER-SWING
35 00 GROUP 1 * * * * 0911
BACK-UP I>
35 1 I>1 Function Indexed String 41250 41250 G43 G43 1 DT Setting 0 10 1 2 * * * *
35 2 I>1 Directional Indexed String 41251 41251 G44 G44 1 Directional Fwd Setting 0 2 1 2 * * * * 3501
35 3 I>1 VTS Block Indexed String 41252 41252 G45 G45 1 Non-Directional Setting 0 1 1 2 * * * * 3502
35 4 I>1 Current Set Courier Number (Current) 41253 41253 G2 1 1.5 Setting 0.08*I1 10.0*I1 0.01*I1 2 * * * * 3501
35 5 I>1 Time Delay Courier Number (Time) 41254 41254 G2 1 1 Setting 0 100 0.01 2 * * * * 3501
35 6 I>1 Time Delay VTS Courier Number (Time) 41255 41255 G2 1 0.2 Setting 0 100 0.01 2 * * * * SMF
35 7 I>1 TMS Courier Number (Decimal) 41256 41256 G2 1 1 Setting 0.025 1.2 0,005 2 * * * * SMF
35 8 I>1 Time Dial Courier Number (Decimal) 41257 41257 G2 1 7 Setting 0.5 15 0.1 2 * * * * 3501
35 9 I>1 Reset Char Indexed String 41258 41258 G60 G60 1 DT Setting 0 1 1 2 * * * * 3501
35 0A I>1 tRESET Courier Number (Time) 41259 41259 G2 1 0 Setting 0 100 0.01 2 * * * * SMF
35 0C I>2 Directional Indexed String 41261 41261 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 350B
35 0D I>2 VTS Block Indexed String 41262 41262 G45 G45 1 Non-Directional Setting 0 1 1 2 * * * * 350C
35 0E I>2 Current Set Courier Number (Current) 41263 41263 G2 1 2 Setting 0.08*I1 10.0*I1 0.01*I1 2 * * * * 350B
35 0F I>2 Time Delay Courier Number (Time) 41264 41264 G2 1 2 Setting 0 100 0.01 2 * * * * 350B
35 10 I>2 Time Delay VTS Courier Number (Time) 41265 41265 G2 1 2 Setting 0 100 0.01 2 * * * * SMF
35 11 I>2 TMS Courier Number (Decimal) 41266 41266 G2 1 1 Setting 0.025 1.2 0,005 2 * * * * SMF
35 12 I>2 Time Dial Courier Number (Decimal) 41267 41267 G2 1 7 Setting 0.5 15 0.1 2 * * * * 350B
35 13 I>2 Reset Char Indexed String 41268 41268 G60 G60 1 DT Setting 0 1 1 2 * * * * 350B
35 14 I>2 tRESET Courier Number (Time) 41269 41269 G2 1 0 Setting 0 100 0.01 2 * * * * SMF
35 15 I>3 Status Indexed String 41270 41270 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
35 16 I>3 Current Set Courier Number (Current) 41271 41271 G2 1 3 Setting 0.08*I1 32*I1 0.01*I1 2 * * * * 3515
35 17 I>3 Time Delay Courier Number (Time) 41272 41272 G2 1 3 Setting 0 100 0.01 2 * * * * 3515
35 18 I>4 Status Indexed String 41273 41273 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
Courrier Data Base P44x/EN GC /F65
35 1A I>4 Time Delay Courier Number (Time) 41275 41275 G2 1 4 Setting 0 100 0.01 2 * * * * 3518
BACK-UP I>
36 00 GROUP 1 * * * * 0912
NEG SEQUENCE O/C
36 1 I2>1 Function Indexed String 41300 41300 G43 G43 1 DT Setting 0 10 1 2 * * * *
36 2 I2>1 Directional Indexed String 41301 41301 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 3601
36 3 I2>1 VTS Block Indexed String 41302 41302 G45 G45 1 Block Setting 0 1 1 2 * * * * 3602
36 4 I2>1 Current Set Courier Number (Current) 41303 41303 G2 1 0.2 Setting 0.08*I1 4*I1 0.01*I1 2 * * * * 3601
36 5 I2>1 Time Delay Courier Number (Time) 41304 41304 G2 1 10 Setting 0 100 0.01 2 * * * * 3601
36 6 I2>1 Time Delay VTS Courier Number (Time) 41305 41305 G2 1 0.2 Setting 0 100 0.01 2 * * * * SMF
36 7 I2>1 TMS Courier Number (Decimal) 41306 41306 G2 1 1 Setting 0.025 1.2 0,005 2 * * * * SMF
36 8 I2>1 Time Dial Courier Number (Decimal) 41307 41307 G2 1 1 Setting 0,01 100 0,01 2 * * * * 3601
36 9 I2>1 Reset Char Indexed String 41308 41308 G60 G60 1 DT Setting 0 1 1 2 * * * * 3601
36 0A I2>1 tRESET Courier Number (Time) 41309 41309 G2 1 0 Setting 0 100 0.01 2 * * * * SMF
36 0C I2>2 Directional Indexed String 41311 41311 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 360B
36 0D I2>2 VTS Block Indexed String 41312 41312 G45 G45 1 Block Setting 0 1 1 2 * * * * 360C
36 0E I2>2 Current Set Courier Number (Current) 41313 41313 G2 1 0.2 Setting 0.08*I1 4*I1 0.01*I1 2 * * * * 360B
36 0F I2>2 Time Delay Courier Number (Time) 41314 41314 G2 1 10 Setting 0 100 0.01 2 * * * * 360B
36 10 I2>2 Time Delay VTS Courier Number (Time) 41315 41315 G2 1 0.2 Setting 0 100 0.01 2 * * * * SMF
36 11 I2>2 TMS Courier Number (Decimal) 41316 41316 G2 1 1 Setting 0.025 1.2 0,005 2 * * * * SMF
36 12 I2>2 Time Dial Courier Number (Decimal) 41317 41317 G2 1 1 Setting 0,01 100 0,01 2 * * * * 360B
36 13 I2>2 Reset Char Indexed String 41318 41318 G60 G60 1 DT Setting 0 1 1 2 * * * * 360B
36 14 I2>2 tRESET Courier Number (Time) 41319 41319 G2 1 0 Setting 0 100 0.01 2 * * * * SMF
36 15 I2>3 Status Indexed String 41320 41320 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
36 16 I2>3 Directional Indexed String 41321 41321 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 3615
36 17 I2>3 VTS Block Indexed String 41322 41322 G45 G45 1 Block Setting 0 1 1 2 * * * * 3616
36 18 I2>3 Current Set Courier Number (Current) 41323 41323 G2 1 0.2 Setting 0.08*I1 32*I1 0.01*I1 2 * * * * 3615
36 19 I2>3 Time Delay Courier Number (Time) 41324 41324 G2 1 10 Setting 0 100 0.01 2 * * * * 3615
36 1A I2>3 Time Delay VTS Courier Number (Time) 41325 41325 G2 1 0.2 Setting 0 100 0.01 2 * * * * SMF
36 1B I2>4 Status Indexed String 41326 41326 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
36 1C I2>4 Directional Indexed String 41327 41327 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 361C
36 1D I2>4 VTS Block Indexed String 41328 41328 G45 G45 1 Block Setting 0 1 1 2 * * * * 361D
Courrier Data Base P44x/EN GC /F65
36 1F I2>4 Time Delay Courier Number (Time) 41330 41330 G2 1 10 Setting 0 100 0.01 2 * * * * 361C
36 20 I2>4 Time Delay VTS Courier Number (Time) 41331 41331 G2 1 0.2 Setting 0 100 0.01 2 * * * * SMF
36 21 I2> Char Angle Courier Number (Angle) 41332 41332 G2 1 -45 Setting -95 95 1 2 * * * * SMF
37 2 I2/I1 Setting Courier Number (Decimal) 41351 41351 G2 1 0.2 Setting 0.2 1 0.01 2 * * * * 3701
37 3 I2/I1 Time Delay Courier Number (Time) 41352 41352 G2 1 60 Setting 0 100 0.1 2 * * * * 3701
BROKEN CONDUCTOR
38 00 GROUP 1 * * * * 0914
EARTH FAULT O/C
38 1 IN>1 Function Indexed String 41400 41400 G43 G43 1 DT Setting 0 10 1 2 * * * *
38 2 IN>1 Directional Indexed String 41401 41401 G44 G44 1 Directional Fwd Setting 0 2 1 2 * * * * 3801
38 3 IN>1 VTS Block Indexed String 41402 41402 G45 G45 1 Non-Directional Setting 0 1 1 2 * * * * 3802
38 4 IN>1 Current Set Courier Number (Current) 41403 41403 G2 1 0.2 Setting 0.08*I1 10.0*I1 0.01*I1 2 * * * * 3801
38 5 IN>1 Time Delay Courier Number (Time) 41404 41404 G2 1 1 Setting 0 200 0.01 2 * * * * 3801
38 6 IN>1 Time Delay VTS Courier Number (Time) 41405 41405 G2 1 0.2 Setting 0 200 0.01 2 * * * * SMF
38 7 IN>1 TMS Courier Number (Decimal) 41406 41406 G2 1 1 Setting 0.025 1.2 0,005 2 * * * * SMF
38 8 IN>1 Time Dial Courier Number (Decimal) 41407 41407 G2 1 7 Setting 0.5 15 0.1 2 * * * * 3801
38 9 IN>1 Reset Char Indexed String 41408 41408 G60 G60 1 DT Setting 0 1 1 2 * * * * 3801
38 0A IN>1 tRESET Courier Number (Time) 41409 41409 G2 1 0 Setting 0 100 0.01 2 * * * * SMF
38 0C IN>2 Directional Indexed String 41411 41411 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 380B
38 0D IN>2 VTS Block Indexed String 41412 41412 G45 G45 1 Non-Directional Setting 0 1 1 2 * * * * 380C
38 0E IN>2 Current Set Courier Number (Current) 41413 41413 G2 1 0.3 Setting 0.08*I1 10.0*I1 0.01*I1 2 * * * * 380B
38 0F IN>2 Time Delay Courier Number (Time) 41414 41414 G2 1 2 Setting 0 200 0.01 2 * * * * 380B
38 10 IN>2 Time Delay VTS Courier Number (Time) 41415 41415 G2 1 2 Setting 0 200 0.01 2 * * * * SMF
38 11 IN>2 TMS Courier Number (Decimal) 41416 41416 G2 1 1 Setting 0.025 1.2 0,005 2 * * * * SMF
38 12 IN>2 Time Dial Courier Number (Decimal) 41417 41417 G2 1 7 Setting 0.5 15 0.1 2 * * * * 380B
38 13 IN>2 Reset Char Indexed String 41418 41418 G60 G60 1 DT Setting 0 1 1 2 * * * * 380B
38 14 IN>2 tRESET Courier Number (Time) 41419 41419 G2 1 0 Setting 0 100 0.01 2 * * * * SMF
38 15 IN>3 Status Indexed String 41420 41420 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
38 16 IN>3 Directional Indexed String 41421 41421 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 3815
Courrier Data Base P44x/EN GC /F65
38 17 IN>3 VTS Block Indexed String 41422 41422 G45 G45 1 Non-Directional Setting 0 1 1 2 * * * * 3816
38 18 IN>3 Current Set Courier Number (Current) 41423 41423 G2 1 0.3 Setting 0.08*I1 32*I1 0.01*I1 2 * * * * 3815
38 19 IN>3 Time Delay Courier Number (Time) 41424 41424 G2 1 2 Setting 0 200 0.01 2 * * * * 3815
38 1A IN>3 Time Delay VTS Courier Number (Time) 41425 41425 G2 1 2 Setting 0 200 0.01 2 * * * * SMF
38 1B IN>4 Status Indexed String 41426 41426 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
38 1C IN>4 Directional Indexed String 41427 41427 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 381B
38 1D IN>4 VTS Block Indexed String 41428 41428 G45 G45 1 Non-Directional Setting 0 1 1 2 * * * * 381C
38 1E IN>4 Current Set Courier Number (Current) 41429 41429 G2 1 0.3 Setting 0.08*I1 32*I1 0.01*I1 2 * * * * 381B
38 1F IN>4 Time Delay Courier Number (Time) 41430 41430 G2 1 2 Setting 0 200 0.01 2 * * * * 381B
38 20 IN>4 Time Delay VTS Courier Number (Time) 41431 41431 G2 1 2 Setting 0 200 0.01 2 * * * * SMF
38 22 IN> Char Angle Courier Number(Angle) 41432 41432 G2 1 -45 Setting -95 95 1 2 * * * * SMF
38 23 Polarisation Indexed String 41433 41433 G46 G46 1 Zero Sequence Setting 0 1 1 2 * * * * SMF
39 2 Polarisation Indexed String 41451 41451 G46 G46 1 Zero Sequence Setting 0 1 1 2 * * * * 3901
39 3 V> Voltage Set Courier Number (Voltage) 41452 41452 G2 1 1 Setting 0.5 20 0.01 2 * * * * 3901
39 4 IN Forward Courier Number (Current) 41453 41453 G2 1 0.1 Setting 0.05*I1 4*I1 0.01*I1 2 * * * * 3901
39 5 Time Delay Courier Number (Time) 41454 41454 G2 1 0 Setting 0 10 0,002 2 * * * * 3901
39 6 Scheme Logic Indexed String 41455 41455 G112 1 Shared Setting 0 2 1 2 * * * * 3901
39 7 Tripping Indexed String 41456 41456 G48 1 Three Phase Setting 0 1 1 2 * * * 3901
39 9 IN Rev Factor Courier Number() 41458 41458 G2 1 0,6 Setting 0,1 1 0,1 2 * * * * 3901
AIDED DEF
3A 00 GROUP 1 * * * * 091A
THERMAL OVERLOAD
3A 01 Characteristic Indexed String 41500 G67 G67 1 Single Setting 0 1 2 2 * * * *
3A 02 Thermal Trip Courier Number (current) 41501 41501 G2 1 1 Setting 0.08*I1 3.2*I1 0.01*I1 2 * * * * 3A01
3A 03 Thermal Alarm Courier Number (percentage) 41502 41502 G2 1 70 Setting 50 100 1 2 * * * * 3A01
3A 04 Time Constant 1 Courier Number (time-minutes) 41503 41503 G2 1 10 Setting 1 200 1 2 * * * * 3A01
3A 05 Time Constant 2 Courier Number (time-minutes) 41504 41504 G2 1 5 Setting 1 200 1 2 * * * * 3A01
THERMAL OVERLOAD
3B 00 GROUP 1 * * * * 091D
RESIDUAL OVERVOLTAGE
3B 01 VN>1 Function Indexed String 41550 41550 G23 G23 1 DT Setting 0 2 1 2 * * * *
Courrier Data Base P44x/EN GC /F65
3B 03 VN>1 Time Delay Courier Number (Time) 41552 41552 G2 1 5 Setting 0 100 0.01 2 * * * * 3B01
3B 04 VN>1 TMS Courier Number (Decimal) 41553 41553 G2 1 1 Setting 0.5 100 0.5 2 * * * * 3B01
3B 05 VN>1 tRESET Courier Number (Time) 41554 41554 G2 1 0 Setting 0 100 0.01 2 * * * * SMF
3B 06 VN>2 Status Indexed String 41555 41555 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
3B 07 VN>2 Voltage Set Courier Number (Voltage) 41556 41556 G2 1 10 Setting 1 80 1 2 * * * * 3B06
3B 08 VN>2 Time Delay Courier Number (Time) 41557 41557 G2 1 10 Setting 0 100 0.01 2 * * * * 3B06
RESIDUAL OVERVOLTAGE
3C 00 GROUP 1 * * * * 0914
ZERO SEQ. POWER
1 Zero Seq. Power Status Indexed String 41600 41600 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
2 K Time Delay Factor Courier Number (Time) 41601 41601 G2 1 0 Setting 0 2 0,2 2 * * * * 3C01
3 Basis Time Delay Courier Number (Time) 41602 41602 G2 1 1 Setting 0 10 0,01 2 * * * * 3C01
4 Residual Current Courier Number (Current) 41603 41603 G2 1 0,1 Setting 0.05*I1 1*I1 0,01 2 * * * * 3C01
5 Residual Power Courier Number (Power) 41604 41604 G2 1 0,5 Setting 0.3*I1*V1 6*I1*V1 0.01*I1*V1 2 * * * * * 3C01
42 3 V< Measur't Mode Indexed String 41950 41950 G47 G47 1 Phase-Neutral Setting 0 1 1 2 * * * *
42 5 V<1 Voltage Set Courier Number (Voltage) 41952 41952 G2 1 50 Setting 10 120 1 2 * * * * 4204
42 6 V<1 Time Delay Courier Number (Time) 41953 41953 G2 1 10 Setting 0 100 0.01 2 * * * * 4204
42 7 V<1 TMS Courier Number (Decimal) 41954 41954 G2 1 1 Setting 0.5 100 0.5 2 * * * * 4204
42 8 V<2 Status Indexed String 41955 41955 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
42 9 V<2 Voltage Set Courier Number (Voltage) 41956 41956 G2 1 38 Setting 10 120 1 2 * * * * 4208
42 0A V<2 Time Delay Courier Number (Time) 41957 41957 G2 1 5 Setting 0 100 0.01 2 * * * * 4208
42 0C V> Measur't Mode Indexed String 41958 41958 G47 G47 1 Phase-Neutral Setting 0 1 1 2 * * * *
42 0E V>1 Voltage Set Courier Number (Voltage) 41960 41960 G2 1 75 Setting 60 185 1 2 * * * * 420D
42 0F V>1 Time Delay Courier Number (Time) 41961 41961 G2 1 10 Setting 0 100 0.01 2 * * * * 420D
42 10 V>1 TMS Courier Number (Decimal) 41962 41962 G2 1 1 Setting 0.5 100 0.5 2 * * * * 420D
42 11 V>2 Status Indexed String 41963 41963 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
42 12 V>2 Voltage Set Courier Number (Voltage) 41964 41964 G2 1 90 Setting 60 185 1 2 * * * * 4211
Courrier Data Base P44x/EN GC /F65
42 13 V>2 Time Delay Courier Number (Time) 41965 41965 G2 1 0.5 Setting 0 100 0.01 2 * * * * 4211
VOLT PROTECTION
45 00 GROUP 1 * * * *
CB FAIL & I<
45 1 BREAKER FAIL (Sub Heading) * * * * 0917
45 2 CB Fail 1 Status Indexed String 42100 42100 G37 G37 1 Enabled Setting 0 1 1 2 * * * *
45 3 CB Fail 1 Timer Courier Number (Time) 42101 42101 G2 G2 1 0.2 Setting 0 10 0.005 2 * * * * 4502
45 4 CB Fail 2 Status Indexed String 42102 42102 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
45 5 CB Fail 2 Timer Courier Number (Time) 42103 42103 G2 G2 1 0.4 Setting 0 10 0.005 2 * * * * 4504
45 6 CBF Non I Reset Indexed String 42104 42104 G205 G205 1 1 Setting 0 4 1 2 * * * * 4502
45 7 CBF Ext Reset Indexed String 42105 42105 G205 G205 1 1 Setting 0 4 1 2 * * * * 4502
45 9 I < Current Set Courier Number (Current) 42106 42106 G2 G2 1 0.05*I1 Setting 0.05*I1 3.2*I1 0.1*I1 2 * * * *
46 3 VTS I2> & I0> Inhibit Courier Number (Current) 42151 42151 G2 1 0.05 Setting 0 1.0*I1 0.01*I1 2 * * * *
46 6 Delta I> Courier Number (Current) G2 1 0.1*I1 Setting 0.01*I1 5*I1 0.01*I1 2 * * * * 4604
46 8 CTS Status Indexed String 42152 42152 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
46 9 CTS VN< Inhibit Courier Number (Voltage) 42153 42153 G2 1 1 Setting 0.5 22 0.5 2 * * * * 4608
46 0A CTS IN> Set Courier Number (Current) 42154 42154 G2 1 0.1 Setting 0.08*I1 4*I1 0.01*I1 2 * * * * 4608
46 0B CTS Time Delay Courier Number (Time s) 42155 42155 G2 1 5 Setting 0 10 1 2 * * * * 4608
46 0D CVTS Status Indexed String 42156 42156 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
46 0E CVTS VN> Courier Number (Voltage) 42157 42157 G2 1 1 Setting 0,5 22 0,5 2 * * * * 460D
46 0F CVTS Time Delay Courier Number (Time s) 42158 42158 G2 1 100 Setting 0 300 1 2 * * * * 460D
SUPERVISION
48 00 GROUP 1 * * * * 0919
SYSTEM CHECKS
48 1 C/S Check Schem. for A/R Binary Flags (8bits) 42250 42250 G103 G103 1 7 Setting 0 7 1 2 * * * *
48 2 C/S Check Schem. for Man CB Binary Flags (8bits) 42251 42251 G103 G103 1 7 Setting 0 7 1 2 * * * *
48 3 V< Dead Line Courier Number (Voltage) 42252 42252 G2 1 13 Setting 5 30 1 2 * * * * SMF
Courrier Data Base P44x/EN GC /F65
48 4 V> Live Line Courier Number (Voltage) 42253 42253 G2 1 32 Setting 30 120 1 2 * * * * SMF
48 5 V< Dead Bus Courier Number (Voltage) 42254 42254 G2 1 13 Setting 5 30 1 2 * * * * SMF
48 6 V> Live Bus Courier Number (Voltage) 42255 42255 G2 1 32 Setting 30 120 1 2 * * * * SMF
48 7 Diff Voltage Courier Number (Voltage) 42256 42256 G2 1 6.5 Setting 0.5 40 0.1 2 * * * * SMF
48 8 Diff Frequency Courier Number (Frequency) 42257 42257 G2 1 0.05 Setting 0.02 1 0.01 2 * * * * SMF
48 0A Bus-Line Delay Courier Number (Time) 42259 42259 G2 1 0.2 Setting 0.1 2 0.1 2 * * * * SMF
SYSTEM CHECKS
49 00 GROUP 1 * * * *
AUTORECLOSE
49 1 AUTORECLOSE MODE (Sub Heading) * * * * 0924
49 2 1P Trip Mode Indexed String 42300 42300 G101 G101 1 1 Setting 0 3 1 2 * * 0707
49 3 3P Trip Mode Indexed String 42301 42301 G102 G102 1 1 Setting 0 3 1 2 * * * * 0708
49 4 1P Rcl - Dead Time 1 Courier Number (Time) 42302 42302 G2 G2 1 1 Setting 0.1 5 0.01 2 * * * 0707
49 5 3P Rcl - Dead Time 1 Courier Number (Time) 42303 42303 G2 G2 1 1 Setting 0.1 60 0.01 2 * * * * 0708
49 6 Dead Time 2 Courier Number (Time) 42304 42304 G2 G2 1 60 Setting 1 3600 1 2 * * * * SMF
49 7 Dead Time 3 Courier Number (Time) 42305 42305 G2 G2 1 180 Setting 1 3600 1 2 * * * * SMF
49 8 Dead Time 4 Courier Number (Time) 42306 42306 G2 G2 1 180 Setting 1 3600 1 2 * * * * SMF
49 9 Reclaim Time Courier Number (Time) 42307 42307 G2 G2 1 180 Setting 1 600 1 2 * * * *
49 0A Reclose Time Delay Courier Number (Time) 42308 42308 G2 G2 1 0.1 Setting 0.1 10 0.1 2 * * * *
49 0B Discrimination Time Courier Number (Time) 42309 42309 G2 G2 1 5 Setting 0,1 5 0,01 2 * * * * 0707
49 0C A/R Inhbit Wind Courier Number (Time) 42310 42310 G2 G2 1 5 Setting 1 3600 1 2 * * * *
49 0D C/S on 3P Rcl DT1 Indexed String 42311 42311 G37 G37 1 Enabled Setting 0 1 1 2 * * * * 0708
49 0F Block A/R Binary Flag (32 bits) 42312 41313 G117 G117 2 33554431 Setting 0 33554431 1 2 * * * *
AUTORECLOSE
4A 00 GROUP 1 * * * * 0925
INPUT LABELS
4A 1 Opto Input 1 ASCII Text (16 chars) 42400 42407 G3 8 Opto Label 01 Setting 32 163 1 2 * * * *
1
4A 2 Opto Input 2 ASCII Text (16 chars) 42408 42415 G3 8 Opto Label 02 Setting 32 163 1 2 * * * *
4A 3 Opto Input 3 ASCII Text (16 chars) 42416 42423 G3 8 Opto Label 03 Setting 32 163 1 2 * * * *
4A 4 Opto Input 4 ASCII Text (16 chars) 42424 42431 G3 8 Opto Label 04 Setting 32 163 1 2 * * * *
4A 5 Opto Input 5 ASCII Text (16 chars) 42432 42439 G3 8 Opto Label 05 Setting 32 163 1 2 * * * *
4A 6 Opto Input 6 ASCII Text (16 chars) 42440 42447 G3 8 Opto Label 06 Setting 32 163 1 2 * * * *
4A 7 Opto Input 7 ASCII Text (16 chars) 42448 42455 G3 8 Opto Label 07 Setting 32 163 1 2 * * * *
Courrier Data Base P44x/EN GC /F65
4A 9 Opto Input 9 ASCII Text (16 chars) 42464 42471 G3 8 Opto Label 09 Setting 32 163 1 2 * * *
4A 0A Opto Input 10 ASCII Text (16 chars) 42472 42479 G3 8 Opto Label 10 Setting 32 163 1 2 * * *
4A 0B Opto Input 11 ASCII Text (16 chars) 42480 42487 G3 8 Opto Label 11 Setting 32 163 1 2 * * *
4A 0C Opto Input 12 ASCII Text (16 chars) 42488 42495 G3 8 Opto Label 12 Setting 32 163 1 2 * * *
4A 0D Opto Input 13 ASCII Text (16 chars) 42496 42503 G3 8 Opto Label 13 Setting 32 163 1 2 * * *
4A 0E Opto Input 14 ASCII Text (16 chars) 42504 42511 G3 8 Opto Label 14 Setting 32 163 1 2 * * *
4A 0F Opto Input 15 ASCII Text (16 chars) 42512 42519 G3 8 Opto Label 15 Setting 32 163 1 2 * * *
4A 10 Opto Input 16 ASCII Text (16 chars) 42520 42527 G3 8 Opto Label 16 Setting 32 163 1 2 * * *
4A 11 Opto Input 17 ASCII Text (16 chars) 42528 42535 G3 8 Opto Label 17 Setting 32 163 1 2 * *
4A 12 Opto Input 18 ASCII Text (16 chars) 42536 42543 G3 8 Opto Label 18 Setting 32 163 1 2 * *
4A 13 Opto Input 19 ASCII Text (16 chars) 42544 42551 G3 8 Opto Label 19 Setting 32 163 1 2 * *
4A 14 Opto Input 20 ASCII Text (16 chars) 42552 42559 G3 8 Opto Label 20 Setting 32 163 1 2 * *
4A 15 Opto Input 21 ASCII Text (16 chars) 42560 42567 G3 8 Opto Label 21 Setting 32 163 1 2 * *
4A 16 Opto Input 22 ASCII Text (16 chars) 42568 42575 G3 8 Opto Label 22 Setting 32 163 1 2 * *
4A 17 Opto Input 23 ASCII Text (16 chars) 42576 42583 G3 8 Opto Label 23 Setting 32 163 1 2 * *
4A 18 Opto Input 24 ASCII Text (16 chars) 42584 42591 G3 8 Opto Label 24 Setting 32 163 1 2 * *
INPUT LABELS
4B 00 GROUP 1 * * * * 0926
OUTPUT LABELS
4B 1 Relay 1 ASCII Text (16 chars) 42600 42607 G3 8 Relay Label 01 Setting 32 163 1 2 * * * *
4B 2 Relay 2 ASCII Text (16 chars) 42608 42615 G3 8 Relay Label 02 Setting 32 163 1 2 * * * *
4B 3 Relay 3 ASCII Text (16 chars) 42616 42623 G3 8 Relay Label 03 Setting 32 163 1 2 * * * *
4B 4 Relay 4 ASCII Text (16 chars) 42624 42631 G3 8 Relay Label 04 Setting 32 163 1 2 * * * *
4B 5 Relay 5 ASCII Text (16 chars) 42632 42639 G3 8 Relay Label 05 Setting 32 163 1 2 * * * *
4B 6 Relay 6 ASCII Text (16 chars) 42640 42647 G3 8 Relay Label 06 Setting 32 163 1 2 * * * *
4B 7 Relay 7 ASCII Text (16 chars) 42648 42655 G3 8 Relay Label 07 Setting 32 163 1 2 * * * *
4B 8 Relay 8 ASCII Text (16 chars) 42656 42663 G3 8 Relay Label 08 Setting 32 163 1 2 * * * *
4B 9 Relay 9 ASCII Text (16 chars) 42664 42671 G3 8 Relay Label 09 Setting 32 163 1 2 * * * *
4B 0A Relay 10 ASCII Text (16 chars) 42672 42679 G3 8 Relay Label 10 Setting 32 163 1 2 * * * *
4B 0B Relay 11 ASCII Text (16 chars) 42680 42687 G3 8 Relay Label 11 Setting 32 163 1 2 * * * *
4B 0C Relay 12 ASCII Text (16 chars) 42688 42695 G3 8 Relay Label 12 Setting 32 163 1 2 * * * *
4B 0D Relay 13 ASCII Text (16 chars) 42696 42703 G3 8 Relay Label 13 Setting 32 163 1 2 * * * *
4B 0E Relay 14 ASCII Text (16 chars) 42704 42711 G3 8 Relay Label 14 Setting 32 163 1 2 * * * *
Courrier Data Base P44x/EN GC /F65
4B 10 Relay 16 ASCII Text (16 chars) 42720 42727 G3 8 Relay Label 16 Setting 32 163 1 2 * * * *
4B 11 Relay 17 ASCII Text (16 chars) 42728 42735 G3 8 Relay Label 17 Setting 32 163 1 2 * * * *
4B 12 Relay 18 ASCII Text (16 chars) 42736 42743 G3 8 Relay Label 18 Setting 32 163 1 2 * * * *
4B 13 Relay 19 ASCII Text (16 chars) 42744 42751 G3 8 Relay Label 19 Setting 32 163 1 2 * * * *
4B 14 Relay 20 ASCII Text (16 chars) 42752 42759 G3 8 Relay Label 20 Setting 32 163 1 2 * * * *
4B 15 Relay 21 ASCII Text (16 chars) 42760 42767 G3 8 Relay Label 21 Setting 32 163 1 2 * * * *
4B 16 Relay 22 ASCII Text (16 chars) 42768 42775 G3 8 Relay Label 22 Setting 32 163 1 2 * * * *
4B 17 Relay 23 ASCII Text (16 chars) 42776 42783 G3 8 Relay Label 23 Setting 32 163 1 2 * * * *
4B 18 Relay 24 ASCII Text (16 chars) 42784 42791 G3 8 Relay Label 24 Setting 32 163 1 2 * * * *
4B 19 Relay 25 ASCII Text (16 chars) 42792 42799 G3 8 Relay Label 25 Setting 32 163 1 2 * *
4B 1A Relay 26 ASCII Text (16 chars) 42800 42807 G3 8 Relay Label 26 Setting 32 163 1 2 * *
4B 1B Relay 27 ASCII Text (16 chars) 42808 42815 G3 8 Relay Label 27 Setting 32 163 1 2 * *
4B 1C Relay 28 ASCII Text (16 chars) 42816 42823 G3 8 Relay Label 28 Setting 32 163 1 2 * *
4B 1D Relay 29 ASCII Text (16 chars) 42824 42831 G3 8 Relay Label 29 Setting 32 163 1 2 * *
4B 1E Relay 30 ASCII Text (16 chars) 42832 42839 G3 8 Relay Label 30 Setting 32 163 1 2 * *
4B 1F Relay 31 ASCII Text (16 chars) 42840 42847 G3 8 Relay Label 31 Setting 32 163 1 2 * *
4B 20 Relay 32 ASCII Text (16 chars) 42848 42855 G3 8 Relay Label 32 Setting 32 163 1 2 * *
4B 21 Relay 33 ASCII Text (16 chars) 42856 42863 G3 8 Relay Label 33 Setting 32 163 1 2 *
4B 22 Relay 34 ASCII Text (16 chars) 42864 42871 G3 8 Relay Label 34 Setting 32 163 1 2 *
4B 23 Relay 35 ASCII Text (16 chars) 42872 42879 G3 8 Relay Label 35 Setting 32 163 1 2 *
4B 24 Relay 36 ASCII Text (16 chars) 42880 42887 G3 8 Relay Label 36 Setting 32 163 1 2 *
4B 25 Relay 37 ASCII Text (16 chars) 42888 42895 G3 8 Relay Label 37 Setting 32 163 1 2 *
4B 26 Relay 38 ASCII Text (16 chars) 42896 42903 G3 8 Relay Label 38 Setting 32 163 1 2 *
4B 27 Relay 39 ASCII Text (16 chars) 42904 42911 G3 8 Relay Label 39 Setting 32 163 1 2 *
4B 28 Relay 40 ASCII Text (16 chars) 42912 42919 G3 8 Relay Label 40 Setting 32 163 1 2 *
4B 29 Relay 41 ASCII Text (16 chars) 42920 42927 G3 8 Relay Label 41 Setting 32 163 1 2 *
4B 2A Relay 42 ASCII Text (16 chars) 42928 42935 G3 8 Relay Label 42 Setting 32 163 1 2 *
4B 2B Relay 43 ASCII Text (16 chars) 42936 42943 G3 8 Relay Label 43 Setting 32 163 1 2 *
4B 2C Relay 44 ASCII Text (16 chars) 42944 42951 G3 8 Relay Label 44 Setting 32 163 1 2 *
4B 2D Relay 45 ASCII Text (16 chars) 42952 42959 G3 8 Relay Label 45 Setting 32 163 1 2 *
4B 2E Relay 46 ASCII Text (16 chars) 42960 42967 G3 8 Relay Label 46 Setting 32 163 1 2 *
OUTPUT LABEL
Courrier Data Base P44x/EN GC /F65
GROUP 3
PROTECTION SETTINGS
70 00 Repeat of Group 1 columns/rows 45000 46999
GROUP 4
PROTECTION SETTINGS
90 00 Repeat of Group 1 columns/rows 47000 48999
This is an invisible column for auto extraction of event records, do not redefine any of its rows but keep it consistent with column [01]
B0 00 (No Header) Auto extraction Event Record ColumN/A * * * *
B0 1 Select Event Unsigned Integer(2) Setting 0 65535 1 * * * *
B0 2 Time & Date IEC870 Time & Date (From Record) Data * * * *
B0 3 Record Type Ascii String(32) Data * * * *
B0 4 Faulted Phases Binary Flag (8 bits) Indexed String Data * * * *
B0 5 Active Setting Group Unsigned Integer Data * * * *
B0 6 Time Stamp * * * *
B0 7 UNUSED
B0 8 Started Elements (1) Binary Flags (32 Bits)Indexed String 0..31 0..31 1 bit per elementLSBData * * * *
B0 9 Tripped Elements (1) Binary Flags (32 Bits)Indexed String 0..31 0..31 1 bit per elementLSBData * * * *
B0 0A UNUSED
B0 0B System Frequency Courier Number (frequency) Data * * * *
B0 0C Fault Duration Courier Number (time) Data * * * *
B0 0D CB Operate Time Courier Number (time) Data * * * *
B0 0E Relay Trip Time Courier Number (time) Data * * * *
B0 0F Fault Location Courier Number(metres) Data * * * *
B0 10 Fault Location Courier Number(miles) Data * * * *
B0 11 Fault Location Courier Number(ohms) Data * * * *
B0 12 Fault Location Courier Number(%) Data * * * *
B0 13 IA Courier Number (current) Data * * * *
B0 14 IB Courier Number (current) Data * * * *
B0 15 IC Courier Number (current) Data * * * *
B0 16 UNUSED
B0 17 UNUSED
B0 18 Tripped Elements 2 (1) Binary Flags (32 Bits)Indexed String 0..31 0..31 1 bit per elementLSBData * * * *
B0 19 VAN Courier Number (Voltage) Data * * * *
B0 1A VBN Courier Number (Voltage) Data * * * *
B0 1B VCN Courier Number (Voltage) Data * * * *
B0 1C Fault Resistor Courier Number (ohms) Data * * * *
B0 1D Fault in Zone Indexed String Data * * * *
This is an invisible column for auto extraction of event records, do not redefine any of its rows but keep it consistent with column [01]
B1 00 No Header N/A
B1 1 Select Record UINT16 Setting 0 65535 1 * * * *
B1 2 Time and Date IEC Date and Time Data * * * *
B1 3 Record Text ASCII Text Data * * * *
B1 4 Error No1 UINT32 Data * * * *
B1 5 Error No2 UINT32 Data * * * *
B7 00 PSL Data
B7 01 Grp1 PSL Ref ASCII Text (32 chars) 31000 31015 G3 16 Default PSL "model number" * * * *
B7 02 Date/Time IEC870 Date & Time 31016 31019 G12 4 * * * *
B7 03 PSL unique ID Unsigned Integer (32 bits) 31020 31021 G27 2 0 * * * *
B7 11 Grp2 PSL Ref ASCII Text (32 chars) 31022 31037 G3 16 Default PSL "model number" * * * *
B7 12 Date/Time IEC870 Date & Time 31038 31041 G12 4 * * * *
B7 13 PSL unique ID Unsigned Integer (32 bits) 31042 31043 G27 2 0 * * * *
B7 21 Grp3 PSL Ref ASCII Text (32 chars) 31044 31059 G3 16 Default PSL "model number" * * * *
B7 22 Date/Time IEC870 Date & Time 31060 31063 G12 4 * * * *
B7 23 PSL unique ID Unsigned Integer (32 bits) 31064 31065 G27 2 0 * * * *
B7 31 Grp3 PSL Ref ASCII Text (32 chars) 31066 31079 G3 16 Default PSL "model number" * * * *
B7 32 Date/Time IEC870 Date & Time 31082 31085 G12 4 * * * *
B7 33 PSL unique ID Unsigned Integer (32 bits) 31086 31087 G27 2 0 * * * *
FE 03 YN> Set Special cell that points to the correct PU setting cell - E/F Pu or SEF Pu.
FE 04 GN> Set Special cell that points to the correct PU setting cell - E/F Pu or SEF Pu.
FE 05 BN> Set Special cell that points to the correct PU setting cell - E/F Pu or SEF Pu.
FE 06 Control Input 1 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 07 Control Input 2 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 08 Control Input 3 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 09 Control Input 4 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 0A Control Input 5 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 0B Control Input 6 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 0C Control Input 7 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 0D Control Input 8 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 0E Control Input 9 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 0F Control Input 10 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 10 Control Input 11 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 11 Control Input 12 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 12 Control Input 13 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
Courrier Data Base P44x/EN GC /F65
FE 13 Control Input 14 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 14 Control Input 15 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 15 Control Input 16 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 16 Control Input 17 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 17 Control Input 18 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 18 Control Input 19 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 19 Control Input 20 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 1A Control Input 21 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 1B Control Input 22 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 1C Control Input 23 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 1D Control Input 24 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 1E Control Input 25 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 1F Control Input 26 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 20 Control Input 27 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 21 Control Input 28 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 22 Control Input 29 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 23 Control Input 30 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 24 Control Input 31 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 25 Control Input 32 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
FE 26 Num Unextracted DR (Note: No Text) - Returns the number of unextracted Disturbance Records * * *
FE 27 Fault Locator Line Length Special cell that references [47 01] / [47 02] depending upon the selected distance unit (miles or metres) * * *
FF 01 Modbus Status Register Binary Flags (16bits) N/A 30001 30001 G26 1 Data * * * * *
FF 01 Modbus Status Register Binary Flags(16 bits) N/A 311001 311001 G26 1
FF 02 Number of Event records stored 30100 G1 1 * * * *
FF 03 Number of Fault records stored 30101 G1 1 * * * *
FF 04 Number of Maint records stored 30102 G1 1 * * * *
FF 05 Additionnal data present Unsigned Integer N/A 30112 30112 G1 1 Data * * * *
FF 6 Number of disturbance records. 30800 G1 1 Data * * * *
FF 7 Oldest stored disturbance record. 30801 G1 1 Data * * * *
FF 8 Number registers in current page. 30802 G1 1 Data * * * *
FF 09-87 Disturbance record data [1-127] 30803 30929 G1 127 Data * * * *
FF 88 Disturbance record time stamp. 30930 30933 G1 4 Data * * * *
FF 89 SelectDisturbance record. 40250 G1 1 Setting 1 65535 1 2 * * * *
FF 8A Record Selection Command Register N/A 40400 40400 G18 1 0 Command 0 24 1 2 * * * *
FF 8B Record Control Command Register N/A 40401 40401 G6 1 0 Command 0 4 1 2 * * * *
FF 8C Event Type Cell Reference N/A 30107 30107 G13 1 (From Record) Data * *
FF 8D Modbus Adress Unsigned Integer N/A 30110 30110 G1 1 Data * * * * *
FF 8E Event Index Unsigned Integer N/A 30111 30111 G1 1 Data * * * *
FF 8F Disturbance recorder status N/A 30934 30934 G1 1 Data
FF 90 FileFormat N/A 40250 40251 G1 1 Setting
FF 91 IEC Time Format N/A 40306 40306 G37 1 Setting 0 1 1 2 * * * *
FF EF A Phase Watts 30360 30361 G125 2 * * * *
FF F0 B Phase Watts 30362 30363 G125 2 * * * *
Courrier Data Base P44x/EN GC /F65
G1 UNSIGNED INTEGER
eg. 5678 stored as 5678
G2 NUMERIC SETTING
See 50300.3110.004
G7 VTS Indicate/Block
Courrier Data Base P44x/EN GC/F65
G11 YES/NO
0 No
1 Yes
G17 ACTIVE/INACTIVE
0 Card not fitted
1 Card failed
2 Signal healthy
Courrier Data Base P44x/EN GC/F65
G19 LANGUAGE
0 English
1 Francais
2 Deutsch
3 Espanol
G32 Digital channel assignment this mapping depend of the model (P441 P442 P444)
0 8/16/24 Optos These are example values. Need one to be unassigned
to 14/21/32/46 Relays
8 Feedback
1024 72 - 1024 Internal Signals
G44 DIRECTION
0 Non-Directional
1 Directional Fwd
2 Directional Rev
G46 POLARISATION
0 Zero Sequence
1 Neg Sequence
G49 V0 INPUT
0 Measured
1 Derived
G62 SAVE AS
0 No Operation
1 Save
2 Abort
G71 PROTOCOL
0 Courier
1 IEC60870-5-103
2 Modbus
3 DNP 3.0
G77 Auto-Reclose
0 Out of Service
1 In Service
G80 Visible/Invisible
0 Invisible
1 Visible
G88 Alarms
0 Alarm Disabled
1 Alarm Enabled
G92 Lockout
0 No Lockout
1 Lockout
G98 Copy to
0 No Operation
1 Group 1
2 Group 2
3 Group 3
4 Group 4
G99 CB Control
0 Disabled
1 Local
2 Remote
3 Local+Remote
4 Opto
5 Opto+local
6 Opto+Remote
7 Opto+Rem+local
G123 DIRECTION
0 Directional Fwd
1 Directional Rev
G215 Trip
0 Default
1 Latched
G237 Characteristic
0 Standard 60%-80%
1 50% - 70 %
G239 IEC61850-9.2LE
0 Electrical
1 Fibre Optic
DDB_ENTRY (DDB_INP_TRP_3P 121 Force 3P Trip Three pole tripping only PSL (IN)
DDB_ENTRY (DDB_INP_CB_MAN 122 Man. Close CB Circuit breaker manual close - order received PSL (IN) CB Status
DDB_ENTRY (DDB_INP_CB_TRIP_MAN 123 Man. Trip CB Circuit breaker manual trip - order received PSL (IN) CB Status
DDB_ENTRY (DDB_INP_DISC 124 CB Discrepancy CB Discrepancy (one pole open) PSL (IN) CB Status
DDB_ENTRY (DDB_INP_PROTA 125 External Trip A Phase A trip by external protection relay PSL (IN)
DDB_ENTRY (DDB_INP_PROTB 126 External Trip B Phase B trip by external protection relay PSL (IN)
DDB_ENTRY (DDB_INP_PROTC 127 External Trip C Phase C trip by external protection relay PSL (IN)
DDB_ENTRY (DDB_INP_CR 128 DIST. Chan Recv Signal receive on main channel (Distance) PSL (IN) Un-blocking logic
DDB_ENTRY (DDB_INP_CR_DEF 129 DEF. Chan Recv Signal receive on DEF channel PSL (IN) Un-blocking logic
DDB_ENTRY (DDB_INP_COS 130 DIST. COS Distance scheme channel out of service / Loss of Guard (Carrier out PSL (IN) Un-blocking logic
of service)
DDB_ENTRY (DDB_INP_COS_DEF 131 DEF. COS DEF scheme channel out of service / Loss of Guard PSL (IN) Un-blocking logic
DDB_ENTRY (DDB_INP_Z1X_EXT 132 Z1X Extension Zone 1 Extension Input PSL (IN)
DDB_ENTRY (DDB_INP_MCB_VTS_BUS 133 MCB/VTS Bus Fuse failure on busbar VT or MCB open (blocks voltage dependant PSL (IN) VTS
functions)
DDB_ENTRY (DDB_INP_MCB_VTS_LINE 134 MCB/VTS Line Fuse failure on line VT or MCB open (blocks voltage dependant PSL (IN) VTS
functions)
DDB_ENTRY (DDB_INP_SBEF_TIMER_BLOCK_1 135 IN>1 Timer Block Block earth fault stage 1 time delay PSL (IN) Earth Fault
DDB_ENTRY (DDB_INP_SBEF_TIMER_BLOCK_2 136 IN>2 Timer Block Block earth fault stage 2 time delay PSL (IN) Earth Fault
DDB_ENTRY (DDB_INP_DEF_TIMER_BLOCK 137 DEF Timer Block Block aided DEF time delay PSL (IN) DEF
DDB_ENTRY (DDB_INP_PHOC_TIMER_BLOCK_1 138 I>1 Timer Block Block phase overcurrent stage 1 time delay PSL (IN) I>1
DDB_ENTRY (DDB_INP_PHOC_TIMER_BLOCK_2 139 I>2 Timer Block Block phase overcurrent stage 2 time delay PSL (IN) I>2
DDB_ENTRY (DDB_INP_PHOC_TIMER_BLOCK_3 140 I>3 Timer Block Block phase overcurrent stage 3 time delay PSL (IN) I>3
DDB_ENTRY (DDB_INP_PHOC_TIMER_BLOCK_4 141 I>4 Timer Block Block phase overcurrent stage 4 time delay PSL (IN) I>4
DDB_ENTRY (DDB_INP_NPS_TIMER_BLOCK_1 142 I2> Timer Block Block negative sequence overcurrent time delay PSL (IN) I>4
DDB_ENTRY (DDB_INP_UNDU_TIMER_BLOCK_1 143 V<1 Timer Block Block phase undervoltage stage 1 time delay PSL (IN) V<1
DDB_ENTRY (DDB_INP_UNDU_TIMER_BLOCK_2 144 V<2 Timer Block Block phase undervoltage stage 2 time delay PSL (IN) V<2
DDB_ENTRY (DDB_INP_OVEU_TIMER_BLOCK_1 145 V>1 Timer Block Block phase overvoltage stage 1 time delay PSL (IN) V>1
DDB_ENTRY (DDB_INP_OVEU_TIMER_BLOCK_2 146 V>2 Timer Block Block phase overvoltage stage 2 time delay PSL (IN) V>2
DDB_ENTRY (DDB_INP_DISTANCE_TIMER_BLOCK 147 DIST. Tim. Block Block distance element time delay PSL (IN) Distance
DDB_ENTRY (DDB_INP_CB_RESET_LOCKOUT 148 Reset Lockout CB monitoring lockout reset PSL (IN) CB Monitoring
DDB_ENTRY (DDB_INP_CB_RESET_ALL_VALUES 149 Reset All values Reset all values of CB monitoring PSL (IN) CB Monitoring
DDB_ENTRY (DDB_INP_RESET_RELAYS_LEDS 150 Reset Latches Reset all permanent alarms + led and relay lached PSl (IN)
DDB_ENTRY (DDB_INP_STUB_BUS 151 Stub Bus Enable Enable I>4 Element for stub bus protection (isolator of HV line open - PSL (IN)
status isolator must be connected to an opto input)
DDB_ENTRY (DDB_INP_TRIP_A_USER 152 User Trip A Internal input for trip logic A PSL (IN) Trip Logic
DDB_ENTRY (DDB_INP_TRIP_B_USER 153 User Trip B Internal input for trip logic B PSL (IN) Trip Logic
DDB_ENTRY (DDB_INP_TRIP_C_USER 154 User Trip C Internal input for trip logic C PSL (IN) Trip Logic
DDB_ENTRY (DDB_INP_ZSP_TIMER_BLOCK 155 ZSP Timer Block Zero Sequence Power - Timer Block PSL (IN) ZSP
DDB_ENTRY (DDB_INP_PAP_TELETRIP_REC 156 PAP Tele Trip CR PAP Carrier Receive for teletransmission PSL(IN)
DDB_ENTRY (DDB_INP_PAP_TELETRIP_HEALT 157 PAP Tele Trip Hea PAP Carrier Out of Service (DT trip decision) PSL(IN)
DDB_ENTRY (DDB_INP_PAP_TIMER_BLOCK 158 PAP Timer Block Timer Block for frosen every timer initiated with PAP function PSL(IN)
DDB_ENTRY (DDB_INP_SBEF_TIMER_BLOCK_3 159 IN>3 Timer Block Timer Block for frosen timer initiated with IN>3 function PSL(IN)
DDB_ENTRY (DDB_INP_SBEF_TIMER_BLOCK_4 160 IN>4 Timer Block Timer Block for frosen timer initiated with IN>4 function PSL(IN)
DDB_ENTRY (DDB_INP_RESET_THERMAL 161 Reset Thermal Reset Thermal Overload Protection PSL(IN)
DDB_ENTRY (DDB_INP_TIMESYNC 162 Time Synchro External time synchronisation input PSL(IN)
DDB_ENTRY (DDB_UNUSED163 163 -- Unused
DDB_ENTRY (DDB_UNUSED164 164 -- Unused
DDB_ENTRY (DDB_UNUSED165 165 -- Unused
DDB_ENTRY (DDB_UNUSED166 166 -- Unused
DDB_ENTRY (DDB_UNUSED167 167 -- Unused
DDB_ENTRY (DDB_UNUSED168 168 -- Unused
DDB_ENTRY (DDB_INP_NPS_TIMER_BLOCK_2 169 I2>2 Timer Block Block negative sequence 2nd stage overcurrent time delay
DDB_ENTRY (DDB_INP_NPS_TIMER_BLOCK_3 170 I2>3 Timer Block Block negative sequence 3rd stage overcurrent time delay
DDB_ENTRY (DDB_INP_NPS_TIMER_BLOCK_4 171 I2>4 Timer Block Block negative sequence 4th stage overcurrent time delay
DDB_ENTRY (DDB_UNUSED172 172 -- Unused
DDB_ENTRY (DDB_ALARM_UNUSED0 173 -- Unused
DDB_ENTRY (DDB_INP_SELECT_CS_NCIT 163 Select CS(NCIT) Select Check synchro for NCIT PSL
DDB_ENTRY (DDB_INP_T1_TIMER_BLOCK 164 T1 Timer Block Timer block T1 input PSL
DDB_ENTRY (DDB_INP_T2_TIMER_BLOCK 165 T2 Timer Block Timer block T2 input PSL
DDB_ENTRY (DDB_INP_TZP_TIMER_BLOCK 166 TZp Timer Block Timer block TZp input PSL
DDB_ENTRY (DDB_INP_T3_TIMER_BLOCK 167 T3 Timer Block Timer block T3 input PSL
DDB_ENTRY (DDB_INP_T4_TIMER_BLOCK 168 T4 Timer Block Timer block T4 input PSL
DDB_ENTRY (DDB_ALARM_GENERAL 174 General Alarm Groupment of all alarms PSL (OUT)
DDB_ENTRY (DDB_ALARM_PROT_DISABLED 175 Prot'n Disabled Test mode enabled every protection out of order PSL (OUT)
DDB_ENTRY (DDB_ALARM_F_OUT_OF_RANGE 176 F out of Range Frequency tracking not working correctly PSL (OUT)
DDB_ENTRY (DDB_ALARM_VTS_SLOW 177 VT Fail Alarm Fuse failure indication (VT alarm) PSL (OUT) VT Supervision
DDB_ENTRY (DDB_ALARM_CTS 178 CT Fail Alarm Current transformers supervision indication PSL (OUT) CT Supervision
DDB_ENTRY (DDB_ALARM_BREAKER_FAIL 179 CB Fail Alarm Circuit breaker failure on any trip PSL (OUT) Breaker Fail
DDB_ENTRY (DDB_ALARM_I_BROK_MAINT 180 I^ Maint Alarm Broken current maintenance alarm (1st level) PSL (OUT) CB monitoring
DDB_ENTRY (DDB_ALARM_I_BROK_LOCKOUT 181 I^ Lockout Alarm Broken current lockout alarm (2nd level) PSL (OUT) CB monitoring
Courier Data Base P44x/EN GC/F65
DDB_ENTRY (DDB_TRI_LED_GRN_CON_1 765 LED 1 Grn Condit Assignment of signal to drive output LED 1 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_2 766 LED 2 Red Condit Assignment of signal to drive output LED 2 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_2 767 LED 2 Grn Condit Assignment of signal to drive output LED 2 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_3 768 LED 3 Red Condit Assignment of signal to drive output LED 3 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_3 769 LED 3 Grn Condit Assignment of signal to drive output LED 3 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_4 770 LED 4 Red Condit Assignment of signal to drive output LED 4 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_4 771 LED 4 Grn Condit Assignment of signal to drive output LED 4 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_5 772 LED 5 Red Condit Assignment of signal to drive output LED 5 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_5 773 LED 5 Grn Condit Assignment of signal to drive output LED 5 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_6 774 LED 6 Red Condit Assignment of signal to drive output LED 6 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_6 775 LED 6 Grn Condit Assignment of signal to drive output LED 6 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_7 776 LED 7 Red Condit Assignment of signal to drive output LED 7 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_7 777 LED 7 Grn Condit Assignment of signal to drive output LED 7 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_8 778 LED 8 Red Condit Assignment of signal to drive output LED 8 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_8 779 LED 8 Grn Condit Assignment of signal to drive output LED 8 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_9 780 FnKey LED 1 Red Assignment of signal to drive output Function Key LED 1 Red - This PSL
LED is associated with Function Key 1
DDB_ENTRY (DDB_TRI_LED_GRN_CON_9 781 FnKey LED 1 Grn Assignment of signal to drive output Function Key LED 1 Green - PSL
This LED is associated with Function Key 1 - To drive function key
LED, yellow DDB 780 and DDB 782 must be active at the same time
DDB_ENTRY (DDB_TRI_LED_RED_CON_10 782 FnKey LED 2 Red Assignment of signal to drive output Function Key LED 2 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_10 783 FnKey LED 2 Grn Assignment of signal to drive output Function Key LED 2 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_11 784 FnKey LED 3 Red Assignment of signal to drive output Function Key LED 3 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_11 785 FnKey LED 3 Grn Assignment of signal to drive output Function Key LED 3 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_12 786 FnKey LED 4 Red Assignment of signal to drive output Function Key LED 4 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_12 787 FnKey LED 4 Grn Assignment of signal to drive output Function Key LED 4 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_13 788 FnKey LED 5 Red Assignment of signal to drive output Function Key LED 5 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_13 789 FnKey LED 5 Grn Assignment of signal to drive output Function Key LED 5 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_14 790 FnKey LED 6 Red Assignment of signal to drive output Function Key LED 6 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_14 791 FnKey LED 6 Grn Assignment of signal to drive output Function Key LED 6 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_15 792 FnKey LED 7 Red Assignment of signal to drive output Function Key LED 7 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_15 793 FnKey LED 7 Grn Assignment of signal to drive output Function Key LED 7 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_16 794 FnKey LED 8 Red Assignment of signal to drive output Function Key LED 8 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_16 795 FnKey LED 8 Grn Assignment of signal to drive output Function Key LED 8 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_17 796 FnKey LED 9 Red Assignment of signal to drive output Function Key LED 9 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_17 797 FnKey LED 9 Grn Assignment of signal to drive output Function Key LED 9 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_18 798 FnKey LED 10 Red Assignment of signal to drive output Function Key LED 10 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_18 799 FnKey LED 10 Grn Assignment of signal to drive output Function Key LED 10 Green PSL
Group 1
41000 41001 Line Length 30 2 G35 2 2 2 2 2 2 2 2 Setting 300 1000000 10
41002 41003 Line Length 30 3 G35 2 2 2 2 2 2 2 2 Setting 0.2 625 0.005
41004 41005 Line Impedance 30 4 G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41006 41006 Line Angle 30 5 G2 1 1 1 1 1 1 1 1 Setting -90 90 0.1
41007 41007 kZ1 Res Comp 30 8 G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41008 41008 kZ1 Angle 30 9 G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41009 41010 Z1 30 0A G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41011 41012 Z1X 30 0B G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41013 41013 R1G 30 0C G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41014 41014 R1Ph 30 0D G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41015 41015 tZ1 30 0E G2 1 1 1 1 1 1 1 1 Setting 0 10 0.002
41016 41016 kZ2 Res Comp 30 0F G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41017 41017 kZ2 Angle 30 10 G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41018 41019 Z2 30 11 G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41020 41020 R2G 30 12 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41021 41021 R2Ph 30 13 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41022 41022 tZ2 30 14 G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41023 41023 kZ3/4 Res Comp 30 15 G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41024 41024 kZ3/4 Angle 30 16 G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41025 41026 Z3 30 17 G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41027 41027 R3G - R4G 30 18 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41028 41028 R3Ph - R4Ph 30 19 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41029 41029 tZ3 30 1A G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41030 41031 Z4 30 1B G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41032 41032 tZ4 30 1C G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41033 41033 Zone P - Direct. 30 1D G123 1 1 1 1 1 1 1 1 Setting 0 1 1
41034 41034 kZp Res Comp 30 1E G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41035 41035 kZp Angle 30 1F G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41036 41037 Zp 30 20 G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41038 41038 RpG 30 21 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41039 41039 RpPh 30 22 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41040 41040 tZp 30 23 G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41041 41041 Zone Q - Direct. 30 24 G123 1 1 1 1 1 1 1 1 Setting 0 1 1
41042 41042 kZq Res Comp 30 25 G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41043 41043 kZq Angle 30 26 G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41044 41045 Zq 30 27 G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41046 41046 RqG 30 28 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
Courier Data Base P44x/EN GC/F65
System Functions(Monitor)
Note: Identification message in ASDU 5: ALSTOM P44x Software ref i.e. ALSTOM P444 3.0
Status Indications
1 1,7,9,11,12,20,21 16 128 Auto-recloser active * * * * DDB_PRT_AR_ENABLE
1 1,7,9,11,12,20,21 17 Tele-protection active
1 1,7,9,11,12,20,21 18 Protection active
1 1,7,9,11,12,20,21 19 128 LED Reset * * * RESET_INDICATIONS
1 9,11 20 Monitor direction blocked
1 9,11 21 128 Test mode * * * * DDB_ALARM_PROT_DISABLED
1 9,11 22 Local parameter setting
1 1,7,9,11,12,20,21 23 128 Characteristic 1 * * * * PG1 Changed
1 1,7,9,11,12,20,21 24 128 Characteristic 2 * * * * PG2 Changed
1 1,7,9,11,12,20,21 25 128 Characteristic 3 * * * * PG3 Changed
1 1,7,9,11,12,20,21 26 128 Characteristic 4 * * * * PG4 Changed
1 1,7,9,11 27 128 Auxillary input 1 * * * * DDB_OPTO_ISOLATOR_1
1 1,7,9,11 28 128 Auxillary input 2 * * * * DDB_OPTO_ISOLATOR_2
1 1,7,9,11 29 128 Auxillary input 3 * * * * DDB_OPTO_ISOLATOR_3
1 1,7,9,11 30 128 Auxillary input 4 * * * * DDB_OPTO_ISOLATOR_4
Supervision Indications
1 1,7,9 32 Measurand supervision I
1 1,7,9 33 Measurand supervision V
1 1,7,9 35 Phase sequence supervision
1 1,7,9 36 128 Trip circuit supervision * * * * DDB_ALARM_CTS
1 1,7,9 37 I>> back-up supervision
1 1,7,9 38 128 VT fuse failure * * * * DDB_ALARM_VTS_SLOW
1 1,7,9 39 128 Teleprotection disturbed * * * * DDB_ALARM_COS
1 1,7,9 46 Group warning
1 1,7,9 47 Group alarm
Fault Indications
Measurands (Monitor)
3,1 2,7 144 128 Measurand I
3,2 2,7 145 128 Measurands I,V
3,3 2,7 146 128 Measurands I,V,P,Q
3,4 2,7 147 128 Measurands IN,VEN
9 2,7 148 128 Measurands IL1,2,3,VL1,2,3,P,Q,f * * *
Generic Functions(Monitor)
10 42,43 240 128 Read Headings
10 42,43 241 128 Read attributes of all entries of a group
10 42,43 243 128 Read directory of entry
10 1,2,7,9,11,12,42,43 244 128 Real attribute of entry
10 10 245 128 End of GGI
10 41,44 249 128 Write entry with confirm
10 40,41 250 128 Write entry with execute
10 40 251 128 Write entry aborted
General Commands
20 20 16 128 Auto-recloser on/off * * *
20 20 17 Teleprotection on/off
20 20 18 Protection on/off
20 20 19 128 LED Reset * * *
20 20 23 128 Activate characteristic 1 * * *
20 20 24 128 Activate characteristic 2 * * *
20 20 25 128 Activate characteristic 3 * * *
20 20 26 128 Activate characteristic 4 * * *
Generic Functions
21 42 240 254 Read headings of all defined groups
21 42 241 254 Read single attribute of all entries of a group
21 42 243 254 Read directory of single entry
21 42 244 254 Read attribute of sngle entry
21 9 245 254 Generic General Interrogation (GGI)
10 40 248 254 Write entry
10 40 249 254 Write with confirm
10 40 250 254 Write with execute
10 40 251 254 Write entry abort
Pulse On Trip
Virtual Points
Pulse On Nul
CROB Type
Include In
Latch Off
Latch On
Pulse On
Close
Object 10 Object Name Col Row P442 P442C P444G P444H P444C
Include In
Virtual
Points
Deadb Scaling
Object 30 Source Object Name Col Row Class 1 2 3 4 5 Desription in device profile
and factor index
/* Active group
*/
0 Active group 0x00 0x0E 3 1 Null * * * * * * Active Group
/* Measurements 1
*/
Phase IA Magnitude
* * *
1 IA Magnitude 0x02 0x01 3 0,005 Currents * * *
IA Phase Angle
* * *
2 IA Phase Angle 0x02 0x02 3 0,01 Phase Angles * * *
Phase IB Magnitude
* * *
3 IB Magnitude 0x02 0x03 3 0,005 Currents * * *
IB Phase Angle
* * *
4 IB Phase Angle 0x02 0x04 3 0,01 Phase Angles * * *
Phase IC Magnitude
* * *
5 IC Magnitude 0x02 0x05 3 0,005 Currents * * *
IC Phase Angle
* * *
6 IC Phase Angle 0x02 0x06 3 0,01 Phase Angles * * *
Phase IN Derived Magnitude
* * *
7 IN Derived Magnitude 0x02 0x09 3 0,005 Currents * * *
IN Derived Angle
* * *
8 IN Derived Phase Angle 0x02 0x0A 3 0,01 Phase Angles * * *
Phase I1 Magnitude
* * *
9 I1 Magnitude 0x02 0x0D 3 0,005 Currents * * *
Phase I2 Magnitude
* * *
10 I2 Magnitude 0x02 0x0E 3 0,005 Currents * * *
Phase I0 Magnitude
* * *
11 I0 Magnitude 0x02 0x0F 3 0,005 Currents * * *
Phase VAB Magnitude
* * *
12 VAB Magnitude 0x02 0x14 3 0,01 Voltages * * *
VAB Phase Angle
* * *
13 VAB Phase Angle 0x02 0x15 3 0,01 Phase Angles * * *
Phase VBC Magnitude
* * *
14 VBC Magnitude 0x02 0x16 3 0,01 Voltages * * *
VBC Phase Angle
* * *
15 VBC Phase Angle 0x02 0x17 3 0,01 Phase Angles * * *
Phase VCA Magnitude
* * *
16 VCA Magnitude 0x02 0x18 3 0,01 Voltages * * *
VCA Phase Angle
* * *
17 VCA Phase Angle 0x02 0x19 3 0,01 Phase Angles * * *
Phase VAN Magnitude
* * *
18 VAN Magnitude 0x02 0x1A 3 0,01 Voltages * * *
VAN Phase Angle
* * *
19 VAN Phase Angle 0x02 0x1B 3 0,01 Phase Angles * * *
Phase VBN Magnitude
* * *
20 VBN Magnitude 0x02 0x1C 3 0,01 Voltages * * *
VBN Phase Angle
* * *
21 VBN Phase Angle 0x02 0x1D 3 0,01 Phase Angles * * *
Phase VCN Magnitude
* * *
22 VCN Magnitude 0x02 0x1E 3 0,01 Voltages * * *
VCN Phase Angle
* * *
23 VCN Phase Angle 0x02 0x1F 3 0,01 Phase Angles * * *
Phase VN Magnitude
* * *
24 VN Derived Magnitude 0x02 0x22 3 0,01 Voltages * * *
VN Angle
* * *
25 VN Derived Phase Angle 0x02 0x23 3 0,01 Phase Angles * * *
Phase V1 Magnitude
* * *
26 V1 Magnitude 0x02 0x24 3 0,01 Voltages * * *
Phase V2 Magnitude
* * *
27 V2 Magnitude 0x02 0x25 3 0,01 Voltages * * *
Phase V0 Magnitude
* * *
28 V0 Magnitude 0x02 0x26 3 0,01 Voltages * * *
29 Frequency 0x02 0x2A 3 0,01 Frequency * * * * * * Frequency
Phase C/S Voltage Magnitude
30 C/S Voltage Magnitude 0x02 0x2B 3 0,01 Voltages * * * * * *
C/S Voltage Angle
31 C/S Voltage Phase Angle 0x02 0x2C 3 0,01 Phase Angles * * * * * *
Phase C/S Bus-Line Angle
32 IM Magnitude 0x02 0x2F 3 0,005 Currents * * * * * *
Phase C/S Bus-Line Angle
33 IM Magnitude 0x02 0x30 3 0,01 Currents * * * * * *
/* Measurements 2
*/
34 A Phase Watts 0x03 0x01 3 0,01 Power * * * * * * A Phase Watts
35 B Phase Watts 0x03 0x02 3 0,01 Power * * * * * * B Phase Watts
36 C Phase Watts 0x03 0x03 3 0,01 Power * * * * * * C Phase Watts
37 A Phase VArs 0x03 0x04 3 0,01 Power * * * * * * A Phase VArs
38 B Phase VArs 0x03 0x05 3 0,01 Power * * * * * * B Phase VArs
39 C Phase VArs 0x03 0x06 3 0,01 Power * * * * * * C Phase VArs
40 A Phase VA 0x03 0x07 3 0,01 Power * * * * * * A Phase VA
41 B Phase VA 0x03 0x08 3 0,01 Power * * * * * * B Phase VA
42 C Phase VA 0x03 0x09 3 0,01 Power * * * * * * C Phase VA
43 3 Phase Watts 0x03 0x0A 3 0,01 Power * * * * * * 3 Phase Watts
44 3 Phase VArs 0x03 0x0B 3 0,01 Power * * * * * * 3 Phase VArs
45 3 Phase VA 0x03 0x0C 3 0,01 Power * * * * * * 3 Phase VA
3Ph Power Factor
* * *
46 Zero Sequence Power 0x03 0x0D 3 0,01 Power Factor * * *
3Ph Power Factor
* * *
47 3Ph Power Factor 0x03 0x0E 3 0,01 Power Factor * * *
APh Power Factor
* * *
48 APh Power Factor 0x03 0x0F 3 0,01 Power Factor * * *
BPh Power Factor
* * *
49 BPh Power Factor 0x03 0x10 3 0,01 Power Factor * * *
CPh Power Factor
* * *
50 CPh Power Factor 0x03 0x11 3 0,01 Power Factor * * *
51 3Ph W Fix Demand 0x03 0x16 3 0,01 Null * * * * * * 3Ph W Fix Demand
52 3Ph VArs Fix Dem 0x03 0x17 3 0,01 Null * * * * * * 3Ph W Peak Demand
53 3Ph W Peak Demand 0x03 0x20 3 0,01 Null * * * * * * 3Ph VAr Peak Demand
54 3Ph VArs Peak Demand 0x03 0x21 3 0,01 Null * * * * * * 3Ph VAr Peak Demand
/* Measurements 1 Slip Frequency
*/
55 Slip Frequency 0x02 0x31 3 0,01 Frequency * * * * * * Slip Frequency
/* Measurements 3
*/
56 Thermal State 0x04 0x02 3 0,1 Percentage * * * * * * Highest Phase Current
/* Measurements Addendum
*/
57 Fault Location (%) 0x01 0x14 3 10 Percentage * * * * * * Fault Location (%)
Courier Data Base P44x/EN GC/F65
1.2.1 Micom S1 V2
P0855ENa
P44x/EN GC/F65 Courier Data Base
1.4 Warnings
Before the scheme is sent to the relay checks are done. Various warning messages may be
displayed as a result of these checks.
The Editor first reads in the model number of the connected relay, and then compares it with
the stored model number. A "wildcard" comparison is employed. If a model mismatch occurs
then a warning will be generated before sending commences. Both the stored model number
and that read-in from the relay are displayed along with the warning; the onus is on you to
decide if the settings to be sent are compatible with the connected relay. Wrongly ignoring
the warning could lead to undesired behaviour in the relay.
If there are any potential problems of an obvious nature then a list will be generated. The
types of potential problems that the program attempts to detect are:
• One or more gates, LED signals, contact signals, and/or timers have their outputs
linked directly back to their inputs. An erroneous link of this sort could lock up the
relay, or cause other more subtle problems to arise.
• Inputs to Trigger (ITT) exceed the number of inputs. A programmable gate has its ITT
value set to greater than the number of actual inputs; the gate can never activate.
Note that there is no lower ITT value check. A 0-value does not generate a warning.
• Too many gates. There is a theoretical upper limit of 256 gates in a scheme, but the
practical limit is determined by the complexity of the logic. In practice the scheme
would have to be very complex, and this error is unlikely to occur.
• Too many links. There is no fixed upper limit to the number of links in a scheme.
However, as with the maximum number of gates, the practical limit is determined by
the complexity of the logic. In practice the scheme would have to be very complex,
and this error is unlikely to occur.
P44x/EN GC/F65 Courier Data Base
Print Display the Windows Print dialog, enabling you to print the
: current diagram.
Select Enable the select function. While this button is active, the
: mouse pointer is displayed as an arrow. This is the default
mouse pointer. It is sometimes referred to as the selection
pointer.
Point to a component and click the left mouse button to select
it. Several components may be selected by clicking the left
mouse button on the diagram and dragging the pointer to
create a rectangular selection area.
Align Top Align all selected components so the top of each is level with
: the others.
Align Middle Align all selected components so the middle of each is level
: with the others.
Align Bottom Align all selected components so the bottom of each is level
: with the others.
Courier Data Base P44x/EN GC/F65
Align Left Align all selected components so the leftmost point of each is
: level with the others.
Align Centre Align all selected components so the centre of each is level
: with the others.
Align Right Align all selected components so the rightmost point of each
: is level with the others.
• To add text comments and other annotations, for easier reading of PSL schemes.
Rectangle When selected, move the mouse pointer to where you want
: one of the corners to be hold down the left mouse button and
move it to where you want the diagonally opposite corner to
be. Release the button. To draw a square hold down the
SHIFT key to ensure height and width remain the same.
Ellipse When selected, move the mouse pointer to where you want
: one of the corners to be hold down the left mouse button and
move until the ellipse is the size you want it to be. Release
the button. To draw a circle hold down the SHIFT key to
ensure height and width remain the same.
Line When selected, move the mouse pointer to where you want
: the line to start, hold down left mouse, move to the position of
the end of the line and release button. To draw horizontal or
vertical lines only hold down the SHIFT key.
Polyline When selected, move the mouse pointer to where you want
: the polyline to start and click the left mouse button. Now
move to the next point on the line and click the left button.
Double click to indicate the final point in the polyline.
Curve When selected, move the mouse pointer to where you want
: the polycurve to start and click the left mouse button. Each
time you click the button after this a line will be drawn, each
line bisects its associated curve. Double click to end. The
straight lines will disappear leaving the polycurve. Note:
whilst drawing the lines associated with the polycurve, a
curve will not be displayed until either three lines in
succession have been drawn or the polycurve line is
complete.
Text When selected, move the mouse pointer to where you want
: the text to begin and click the left mouse button. To change
the font, size or colour, or text attributes select Properties
from the right mouse button menu.
The nudge tool buttons enable you to shift a selected component a single unit in the selected
direction, or five pixels if the SHIFT key is held down.
As well as using the tool buttons, single unit nudge actions on the selected components can
be achieved using the arrow keys on the keyboard.
Nudge Left Shift the selected component(s) to the left by one unit.
: Holding down the SHIFT key while clicking on this button will
shift the component five units to the left.
Nudge Right Shift the selected component(s) to the right by one unit.
: Holding down the SHIFT key while clicking on this button will
shift the component five units to the right.
The structure toolbar enables you to change the stacking order of components.
Send to Back Bring the selected components behind all other components.
:
• For scaling the displayed screen size, viewing the entire PSL, or zooming to a
selection.
Zoom Enable the zoom function. While this button is active, the
: mouse pointer is displayed as a magnifying glass. Right-
clicking will zoom out and left-clicking will zoom in. Press
the ESC key to return to the selection pointer. Click and
drag to zoom in to an area.
Zoom to Fit Display at the highest magnification that will show all the
: diagram’s components.
Zoom to Selection Display at the highest magnification that will show the
: selected component(s).
Pan Enable the pan function. While this button is active, the
: mouse pointer is displayed as a hand. Hold down the left
mouse button and drag the pointer across the diagram to
pan. Press the ESC key to return to the selection pointer.
This toolbar provides icons to place each type of logic element into the scheme diagram. Not
all elements are available in all devices. Icons will only be displayed for those elements
available in the selected device.
Links can only be started from the output of a signal, gate, or conditioner, and can only be
ended on an input to any element.
Since signals can only be either an input or an output then the concept is somewhat
different. In order to follow the convention adopted for gates and conditioners, input signals
are connected from the left and output signals to the right. The Editor will automatically
enforce this convention.
A link attempt will be refused where one or more rules would otherwise be broken. A link will
be refused for the following reasons:
• An attempt to connect to a signal that is already driven. The cause of the refusal may
not be obvious, since the signal symbol may appear elsewhere in the diagram. Use
“Highlight a Path” to find the other signal.
• An attempt is made to repeat a link between two symbols. The cause of the refusal
may not be obvious, since the existing link may be represented elsewhere in the
diagram.
1. Select the contact name from the Contact Name list (only shown when inserting a new
symbol).
2. Choose the conditioner type required in the Mode tick list.
3. Set the Pick-up Time (in milliseconds), if required.
4. Set the Drop-off Time (in milliseconds), if required.
Courier Data Base P44x/EN GC/F65
1. Choose the operation mode from the Timer Mode tick list.
2. Set the Pick-up Time (in milliseconds), if required.
3. Set the Drop-off Time (in milliseconds), if required.
An OR gate requires that one or more input is TRUE for the output to be TRUE.
A Programmable gate requires that the number of inputs that are TRUE is equal to or
greater than its ‘Inputs to Trigger’ setting for the output to be TRUE.
Standard
S R Q
S 1 0 1
Q 0 1 0
R 0 0 no change / last state
1 1 no change / last state
S R Q
1 0 1
SD
Q 0 1 0
R 0 0 no change / last state
1 1 1
• File
• Edit
• View
• Device
P44x/EN GC/F65 Courier Data Base
File menu
Open…
Displays the Open file dialogue box, enabling you to locate and open an existing GOOSE
configuration file.
Save
Save the current file.
Save As…
Save the current file with a new name or in a new location.
Print…
Print the current GOOSE configuration file.
Print Preview
Preview the hardcopy output with the current print setup.
Print Setup…
Display the Windows Print Setup dialogue box allowing modification of the printer settings.
Exit
Quit the application.
Courier Data Base P44x/EN GC/F65
Edit menu
Rename…
Rename the selected IED.
New Enrolled IED…
Add a new IED to the GOOSE configuration.
New Virtual Input…
Add a new Virtual Input to the GOOSE In mapping configuration.
New Mapping…
Add a new bit-pair to the Virtual Input logic.
Delete Enrolled IED
Remove an existing IED from the GOOSE configuration.
Delete Virtual Input
Delete the selected Virtual Input from the GOOSE In mapping configuration.
Delete Mapping
Remove a mapped bit-pair from the Virtual Input logic.
Reset Bitpair
Remove current configuration from selected bit-pair.
Delete All
Delete all mappings, enrolled IED’s and Virtual Inputs from the current GOOSE configuration
file.
P44x/EN GC/F65 Courier Data Base
View menu
Toolbar
Show/hide the toolbar.
Status Bar
Show/hide the status bar.
Properties…
Show associated properties for the selected item.
Courier Data Base P44x/EN GC/F65
Device menu
Open Connection
Display the Establish Connection dialog, enabling you to send and receive data from the
connected relay.
Close Connection
Closes active connection to a relay.
Send to Relay
Send the open GOOSE configuration file to the connected relay.
Receive from Relay
Extract the current GOOSE configuration from the connected relay.
Communications Setup
Displays the Local Communication Settings dialogue box, enabling you to select or configure
the communication settings.
P44x/EN GC/F65 Courier Data Base
The toolbar
Open
Opens an existing GOOSE configuration file.
Save
Save the active document.
Print
Display the Print Options dialog, enabling you to print the current configuration.
View Properties
Show associated properties for the selected item.
How to Use the GOOSE Editor
The main functions available within the GOOSE Editor module are:
The signals in the GOOSE In settings of enrolled IED’s are mapped to Virtual Inputs by
selecting New Mapping from the Edit menu. Refer to section below for use of these signals
in logic.
2.4 GOOSE In settings
Virtual inputs
The GOOSE Scheme Logic interfaces with the Programmable Scheme Logic by means of
32 Virtual Inputs. The Virtual Inputs are then used in much the same way as the Opto Input
signals.
The logic that drives each of the Virtual Inputs is contained within the relay’s GOOSE
Scheme Logic file. It is possible to map any number of bit-pairs, from any enrolled device,
using logic gates onto a Virtual Input.
P44x/EN GC/F65 Courier Data Base
The following gate types are supported within the GOOSE Scheme Logic:
To add a Virtual Input to the GOOSE logic configuration, select New Virtual Input from the
Edit menu and configure the input number. If required, the gate type can be changed once
input mapping to the Virtual Input has been made.
Mapping
GOOSE In signals from enrolled IED’s are mapped to logic gates by selection of the required
bit-pair from either the DNA or User Status section of the inputs.
The value required for a logic 1 or ON state is specified in the State box. The input can be
inverted by checking Input Inversion (equivalent to a NOT input to the logic gate).
GOOSE Out settings
The structure of information transmitted via UCA2.0 GOOSE is defined by the ’Protection
Action’ (PACT) common class template, defined by GOMFSE (Generic Object Models for
Substation and Feeder Equipment).
A UCA2.0 GOOSE message transmitted by a Px40 relay can carry up to 96 Digital Data Bus
signals, where the monitored signals are characterised by a two-bit status value, or "bit-pair".
The value transmitted in the bit-pair is customisable although GOMFSE recommends the
following assignments:
The PACT common class splits the contents of a UCA2.0 GOOSE message into two main
parts; 32 DNA bit-pairs and 64 User Status bit-pairs.
The DNA bit-pairs are intended to carry GOMSFE defined protection scheme information,
where supported by the device. MiCOM Px40 implementation provides full end-user
flexibility, as it is possible to assign any Digital Data Bus signal to any of the 32 DNA bit-
Courier Data Base P44x/EN GC/F65
pairs. The User Status bit pairs are intended to carry all ‘user-defined’ state and control
information. As with the DNA, it is possible to assign any Digital Data Bus signal to these bit-
pairs.
To ensure full compatibility with third party UCA2.0 GOOSE enabled products, it is
recommended that the DNA bit-pair assignments are as per the definition given in GOMFSE.
Send GOOSE configuration settings to an IED
1. Open a connection to the required device by selecting Open Connection from the
Device menu. Refer to Section 2.1.1.6 & 2.1.1.7 for details on configuring the IED
communication settings.
2. Enter the device address in the Establish Connection dialogue box.
3. Enter the relay password.
4. Send the current GOOSE configuration settings to the device by selecting Send to
Relay from the Device menu.
Save IED GOOSE setting files
Select Save or Save As from the File menu.
Print IED GOOSE setting files
1. Select Print from the File menu.
2. The Print Options dialogue is displayed allowing formatting of the printed file to be
configured.
3. Click OK after making required selections.
P44x/EN GC/F65 Courier Data Base
Input-Opto Couplers
DIST. COS
DDB #130
TPAR Enable
DDB #111
Opto Label 08
DDB #071
&
SPAR Enable
DDB #110
Courier Data Base P44x/EN GC/F65
Output Contact
Trip Z1
Z1 0
DDB #255 Relay Label 01
& Straight
0
DDB #000
DIST Trip A
DDB #246
DIST Trip B
DDB #247 1
DIST Trip C
Dist Aided Trip
DDB #248
0
Relay Label 10
& Straight
0
DDB #009
DIST UNB CR
DDB #243
Z1
DDB #255
Z1X
DDB #256
Z2
DDB #257
Zp
DDB #260 1
Z3
DDB #258
Z4
DDB #259 Led
Z1
DDB #255 LED 5
1 Latching DDB #100
Z1X
DDB #256
Trip A
0
Any Trip A Relay Label 02
DDB #325 Straight DDB #001
0
Trip B
0
Any Trip B Relay Label 03
DDB #326 Straight DDB #002
0
Trip C
0
Any Trip C Relay Label 04
DDB #327 Straight DDB #003
0
Output Contact
General Start
0
Relay Label 06
Straight DDB #005
0
Any Start
DDB #317
LED 4
20 Latching DDB #099
Dwell
0
Starting Fault Recorder
Fault_REC_TRIG
Any Trip
DDB #321
1 DDB #468
General trip
0
Any Trip Relay Label 07
DDB #321 Straight DDB #006
0
General Alarm
0
General Alarm Relay Label 08
DDB #174 Straight DDB #007
0
IN>2 Trip
DDB #282
IN>3 Trip
DDB #355 Trip DEF + SBEF
0
DEF Trip A Relay Label 09
DDB #278 1 Straight
0
DDB #008
DEF Trip B
DDB #279
DEF Trip C
DDB #280
AR Lockout
0
A/R Lockout Relay Label 11
DDB #234 Straight DDB #010
0
AR in Progress
A/R 1P In Prog
DDB #224
0
Relay Label 12
A/R 3P In Prog
1 Straight
0
DDB #011
DDB #225
AR Close
0
A/R Close Relay Label 13
DDB #223 Straight DDB #012
0
Power Swing
0
Power Swing Relay Label 14
DDB #269 Straight DDB #013
0
Courier Data Base P44x/EN GC/F65
Trip A
Trip B
Trip C
Forward
Reverse
A/R Enable
BLANK PAGE
Menu Content Tables P44x/EN HI/F65
System Data View Records Measurements 1 Measurements 2 Measurements 3 CB Condition CB Control Date and Time
Configuration CT and VT ratios Record control Disturb Recorder Measure't setup Communications Commission tests CB monitor setup
Opto config Control Input CTRL I/P config Intermicom comms Intermicom conf Function keys Ethernet NCIT IED Configurator
Distance Distance schemes Power swing Back-up I> NEG sequence O/C Broken conductor Earth fault O/C
CTRL I/P label group 1 group 1 group 1
group 1 group 1 group 1 group 1
Residual
Aided D.E.F Thermal overload Zero seq. Power Volt protection CB Fail & I< System check Autoreclose
overvoltage
group 1 group 1 group 1 group 1 Group 1 group 1 group 1
group 1
Notes:
This Menu Content table is given for complete menu enabled (i.e. if the corresponding option in the configuration menu is enabled). Some options or menu could not
appear according to the installation.
Group 1 is shown on the menu map, Groups 2, 3 and 4 are identical to Group 1 and therefore omitted.
P44x/EN HI/F65 Menu Content Tables
Password Menu Cell Ref IA Phase Angle VAN Phase Angle B Phase Watts
o o
XXXX (From Record) 0 0 0 W
Plant Reference Event Text IB Phase Angle VBN Phase Angle A Phase VArs
o
AREVA 0 0o 0 Var
Serial Number Select Fault IC Phase Angle VCN Phase Angle C Phase VArs
o o
123456A [0…4] 0 0 0 0 Var
CB Trip/Close Alarm Status 3 VAB Phase Angle C/S Voltage Mag Zero Seq Power
o
No Operation 0000000000000000 0 0V 0
Software Ref. 1 Access Level VBC Magnitude C/S Voltage Ang 3Ph Power Factor
o
C2.6 2 0V 0 0
Software Ref.2 Password Control VBC Phase Angle IM Magnitude APh Power Factor
o
C2.6 2 0 0A 0
Opto I/P Status Password Level 1 VCA Magnitude IM Angle BPh Power Factor
o
0001100100001000 **** 0V 0 0
Relay Status 1 Password Level 2 VCA Phase Angle Slip Frequency CPh Power Factor
o
0000000000000000 **** 0 50 Hz 0 Wh
Menu Content Tables P44x/EN HI/F65
Reset Thermal CB B Operations Close Pulse Time Time Setting Group Volt Protection
No 0 0.5 ms 16:25:53 Select via Menu Disabled
CB C Operations Trip Pulse Time IRIG-B Sync Active Settings CB Fail & I<
0 0.5 ms Disabled Group 1 Enabled
Total IA Broken Man Close Delay IRIG-B Status Save Changes Supervision
0A 10 s 0 No Operation Enabled
Total IB Broken Healthy Window Battery Status Copy From System Checks
0A 5s Healthy Group 1 Disabled
CB Operate Time A/R Single Pole SNTP Status Setting Group 1 Residual O/V NVD
0s Disabled Enabled Disabled
Reset CB Data A/R Three Pole LocalTime Enable Setting Group 2 Internal A/R
No Disabled Fixed Disabled Disabled
3 Ph W Fix Dem DST End Mins DST Start Day Back-Up I> Disturb Recorder
0 Wh 60.00 min Sunday Disabled Invisible
3Ph Vars Fix Dem RP1 Time Zone DST Start Month Neg Sequence O/C Measure't Setup
0 Varh Local March Disabled Invisible
3Ph W Peak Dem RP2 Time Zone DST Start Mins Broken Conductor Comms Settings
0 Wh Local 60.00 min Disabled Visible
3Ph VArs Peak Dem DNPOE Time Zone DST End Earth Fault Prot Commission Tests
0 Varh Local Last Zero Seq. Power Invisible
Earth Fault O/C
Reset Demand Tunnel Time Zone DST End Day Disabled Setting Values
No Local Sunday Secondary
P44x/EN HI/F65 Menu Content Tables
Main VT Sec'y Clear Faults Trigger Position Local Values RP1 Address
110.0 V No 33.30 % Secondary 255
C/S VT Primary Clear Maint Trigger Mode Remote Values RP1 Address
110.0 V No Single Primary 1
C/S VT Secondary Alarm Event Analog Channel 1 Measurement Ref RP1 Address
110.0 V Enabled VA VA 1
Phase CT Primary Relay O/P Event Analog Channel 2 Measurement Mode RP1 Address
1A Enabled VB 0 1
Phase CT Sec'y Opto Input Event Analog Channel 3 Demand Interval RP1 Inactiv Timer
1A Enabled VC 30.00 mins 15.00 mins
Mcomp CT Primary System event Analog Channel 4 Distance Unit Baud Rate
1A Enabled VN Kilometres 19200 bits/s
Mcomp CT Sec'y Fault Rec Event Analog Channel 5 Fault Location Baud Rate
1A Enabled IA Distance 19200 bits/s
Ctrl I/P Config CT Polarity Clear Dist -Recs Analog Channel 8 Parity
Visible Line Decs No IN None
LCD Contrast
11
Menu Content Tables P44x/EN HI/F65
COMMISSION CB MONITOR
OPTO CONFIG CONTROL INPUT CTRL I/P CONFIG
TESTS SETUP
Opto I/P Status Broken I^ Global Nominal V Ctrl I/P Status Hotkey Enabled
0001011001000011 2 24-27V 0000000000000000 111--111--111
Relay Status 1 I^ Maintenance Opto Filter Cntl Ctrl Input 1 Control Input 1
0001011001000011 Alarm Disabled 11111111111 No Operation Latched
N° CB Ops Maint
Alarm Disabled
Monitor Bit 8
RP1 Port Config Relay Label 08 N° CB Ops Maint
K Bus 10
Test Mode
RP1 Comms Mode Disabled N° CB Ops Lock
IEC60870 FT1.2 Alarm Disabled
Test Pattern 1
RP1 Baud Rate 0 N° CB Ops Lock
19200 bits/s 20
Test Pattern 2
Scale Value 0 CB Time Maint
IEC61850 Alarm Disabled
Contact Test
Message Gap (ms) No Operation CB Time Maint
0 100.0 ms
Test LEDs
NIC Protocol No Operation CB Time Lockout
IEC64850 Alarm Disabled
Autoreclose Test
NIC MAC Address No Operation CB Time Lockout
200.0 ms
Red LED Status
NIC Tunl Timeout Fault Freq Lock
5 min Alarm Disabled
Green LED Status
NIC Link Report Fault Freq Count
Alarm 10
DDB 31-00
NIC Link Timeout Fault Freq Time Reset Lockout by
60s 3.600 Ks CB Close
INTERMICOM IED
INTERMICOM CONF FUNCTION KEYS ETHERNET NCIT CTRL I/P LABEL
COMMS CONFIGURATOR
IM Input Status IM Msg Alarm Lvl Kn Key Status Physical link Switch Conf.Bank Control Input 1
25 Electrical No Action Control Input 1
IM Output Status IM1 Cmd Type Fn Key 1 Antialiasing Fil Active Conf.Name
Direct Unlocked Disabled
Source Address IM1 Fallback Mode Fn Key 1 Mode Merge Unit Delay Active Conf.Rev Control Input 32
1 Default Toggled 0 Control Input 32
Received Address IM1 Default Value Fn Key 1 Label L.N. Arrangement Inact.Conf.Name
2 0 Function key 1 LN1
Rx Direct Count IM8 Fallback Mode Fn Key 10 Label Logic Node 2B Subnet mask
Default Function key 1 Logical Node 4
Rx Block Count IM8 Default Value Synchro Alarm Gateway IEC61850 SCL
0 0
Line Setting R2Ph Zone Q - Direct Program Mode WI: Single Pole Delta R
Group 1 20 Ω Directional Fwd Standard Scheme Disabled 500 mΩ
Line Length tZ2 kZq Res Comp Standard Mode WI : V< Thres. Delta X
100 km / Miles 200 ms 1.000 Basic + Z1X 45 V 500 mΩ
Line Impedance kZ3/4 Res Comp kZq Angle Fault Type WI : Trip Time Delay IN > Status
12 Ω 1.000 0° Both Enabled 60 ms Enabled
Line Angle kZ3/4 Angle Zq Trip Mode PAP: Tele Trip En IN > (% Imax)
70 ° 0° 27 Ω Force 3 Poles Disabled 40 %
Zone Setting Z3 RqG Sig. Send Zone PAP: Del. Trip En I2 > Status
Group 1 30 Ω 27 Ω None Disabled Enabled
kZ1 Res Comp R3Ph - R4Ph tZq Tp PAP: 1P Time Del Imax Line > Status
1.000 30 Ω 0,5 σ 20.0 ms 500 ms Enabled
kZ1 Angle tZ3 OTHER PARA- tReversal Guard PAP: P2 Imax Line>
0° 600 ms METERS 20.0 ms Disabled 3.000 A
Z1X tZ4 Overlap Z Mode TOR-SOTF Mode PAP 3P Time Del Unblocking Delay
15 Ω 1.000 s Disabled 00000000110000 2.000 s 30.0 s
R1G Zone P - Direct. Z1m Tilt Angle SOFT Delay PAP: IN Thres Blocking Zones
10 Ω Directional Fwd o
0° 110 s 500.0 mA 00000
R1Ph kZp Res Comp Z1p Tilt Angle Z1Ext Fail PAP; K (%Un) Out Of Step
10 Ω 1.000 0° Disabled 0.500 1
tZ1 kZp Angle Z2/Zp/Zq Tilt Angle Weak Infeed Loss Of Load Stable Swing
0s 0° 0° Group 1 Group 1 1
kZ2 Res Comp Zp Fwd Z Chgt Delay WI :Mode Status LoL: Mode Status
1.000 25 Ω 30.00 ms Disabled/PAP/Trip Echo Disabled
BROKEN
BACK-UP I> NEG SEQUENCE O/C EARTH FAULT O/C
CONDUCTOR
GROUP 1 GROUP 1 GROUP 1
GROUP1
I>1 VTS Block I2>1 VTS Block I2>2 Time Dial I2/I1 Time Delay IN>1 VTS Block
Non-Directional Block 1 60 s Non-Directional
I>1 Current Set I2>1 Current Set I2>2 Reset Char I2/I1 Trip IN>1 Current Set
1.500 A 200 mA Disabled 200.0 mA
I>1 Time Delay VTS I2>1 Time Delay I2>2 tRESET IN>1 Time Delay
1.000 s 10 s 1s
I>1 TMS I2>1 Time Delay VTS I2>3 Status IN>1 Time Delay VTS
1 200 ms 0.2 s
I>1 Reset Char I2>1 Time Dial I2>3 VTS Block IN>1 Time Dial
DT 1 7
I>1 tRESET I2>1 Rest Char I2>3 Current Set IN>1 Reset Char
0s DT DT
I>2 Directional I>2 tRESET I2>2 Function I2>4 Status IN>2 Function
Non-Directional 0s DT Enabled
I>2 VTS Block I>3 Status I2>2 Directional I2>4 Directional IN>2 Directional
Non-Directional Enabled Non Directional Non-Directional
I>2 Current Set I>3 Current Set I2>2 VTS Block I2>4 VTS Block IN>2 VTS Block
2A 3A Block Non-Directional
I>2 Time Delay VTS I>3 Time Delay I2>2 Current Set I2>4 VTS Block IN>2 Current Set
2s 3s 200 mA 300.0 mA
I>2 TMS I>4 Status I2>2 Time Delay I2>4 Time Delay IN>2 Time Delay VTS
1 Disabled 10 s 2.0 s
I>2 Time Dial I>4 Current Set I2>2 Time Delay VTS I2>4 Time Delay VTS Idem for
7 4A 200 ms IN>3 & IN>4
I>2 Reset Char I>4 Time Delay I2>2 TMS I2> Char Angle IN> Char Angle
DT 4s 1 -45
Menu Content Tables P44x/EN HI/F65
RESIDUAL
AIDED D.E.F. THERMAL OVERLOAD ZERO SEQ. POWER VOLT PROTECTION CB FAIL & I<
OVERVOLTAGE
GROUP 1 GROUP 1 GROUP1 GROUP 1 GROUP 1
GROUP1
Channel Aided DEF Status Characteristic VN>1 Function Zero Seq. Power st. V< & V> MODE BREAKER FAIL
Enabled Simple/Dual DT Enabled 0000 GROUP 1
Polarisation Thermal Trip VN>1 Volatge Set K Time Delay Factor UNDER VOLTAGE CB Fail 1 Status
Zero Sequence 1.000 A 5V 0.00 s GROUP 1 Enabled
V> Voltage Set Thermal Alarm VN>1 Time Delay Basis Time Delay V< Measur't Mode CB Fail 1 Timer
1.0 V 70.0% 5s 1.00 s Phase-Neutral 200.0 ms
IN Forward Time Constant 1 VN>1 TMS Residual Current V<1 Function CB Fail 2 Status
100.0 mA 10.00 1 100.0 mA DT Disabled
Time Delay Time Constant 2 VN>1 tRESET Residual Power V<1 Voltage Set CB Fail 2 Timer
0s 5.00 0 0.5 mVA 50.0 V 0.4
Scheme Logic VN>2 Status V<1 Time Delay CBF Non I Reset
Shared Enabled 10.0 s CB Open & I<
OVERVOLTAGE
GROUP 1
V>1 Function
DT
VT SUPERVISION C/S Check Schem A/R AUTORECLOSE MODE Opto Input 1 Relay 1 Grp 1 PSL Ref idem for GROUP
GROUP 1 7 GROUP 1 Opto Label 01 Relay Label 01 2, 3 & 4
VTS Time Delay C/S check Schem Man CB 1P Trip Mode P441/2/4 P441/2/4 26 May 2005
5.0 s 111 1/3 11:21:14:441
VTS I2> & I0> Inhibit V< Dead Line 3P Trip Mode Opto Input 8 Relay 14 Grp 1 PSL ID
50.0 mA 13.0 V 3/3 Opto Label 08 Relay Label 14 -481741114
Detect 3P V> Live Line 1P - Dead Time 1 P442/4 P442/4 Grp 2 PSL Ref
Disabled 32.0 V 1.0 s
Delta I> V> Live Bus Dead Time 2 P444 P444 Idem for group 3 & 4
100.0 mA 32.0 V 60.0 s
HARDWARE / SOFTWARE
VERSION HISTORY AND
COMPATIBILITY
(Note: Includes versions released and supplied to customers only)
Hardware / Software- P44x/EN VC/F65
Version
Backward Compatibility
Software Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch A2.x: First Model – P441/P442 (P444 not available) – Modbus/Kbus/IEC103 – 4 languages – Optos 48Vcc (Hardware=A)
Documentation: TG 1.1671-C & OG 1.1671-B
VDEW-ModBus-Kbus cells/CBaux/IRIGB/WeakInfeed/Reset No compatibility with branch
03 10/2000 V1.09
IDMT/SyncCheck/AR Led A1.x (model 02)
A2.6 VDEW-ModBus-Kbus cells/CBaux/IRIGB/ WeakInfeed/Reset
04 10/2000 IDMT/ SyncCheck/AR Led V2.0 03 03 03
New S1 version
No compatibility with branch
03 04/2001 Freq out of range (major correction)- 1/3 pole AR logic - VTS V1.10
A1.x (model 02)
A2.7
Frequency out of range (major correction)- 1/3 pole AR logic
04 04/2001 V2.0 03 03 03
A New S1 version
A2.8 04 07/2001 Communication improvement / Floc with 5Amp / IrigB V2.0 03 03 03
3P fault in Power Swing/SOTF logic/CB Fail/Ext. Trip + 5
A2.9 04 01/ 2002 ms/Z1-Z2 measure for small characteristic /SOTF-TOR / U-I V2.0 03 03 03
prim sec
EEPROM correction/RCA angle/DEF correction/New general
A2.10 04 05/2002 V2.0 03 03 03
distance Trip equation (Block scheme) / Fault Locator
Last A2.x branch version: Retrip CB/Ffailure/31th December for
DRec/Disturbance compressed function and communication
A2.11 04 09/2003 V2.0 03 03 03
correction/Voltage memory/DEF/Ext Csync/P.Phase ref
Csync/Sync live-live/2UN Vref Sync/Z1 & Arg<55°
Note: Software version / hardware version / model number can be found by setting in “system data” with MiCOM S1 or LCD front panel.
P44x/EN VC/F65 Hardware / Software-Version
Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch A3.x : P444 model with 24optos/32 outputs (Omron) – Universal optos – Italian Language – DNP3
Documentation: TG 1.1671-C & OG 1.1671-B
P444/DNP3/NCIT/universal input/5 languages
Italian model 4050A for P444
No compatibility with branch
A3.0 05 05/2001 P441/P442 models 050A (48Vcc) or 050B (Universal optos) V2.02 + patch
A2.x (model 03 or 04)
DDB with 1022cells/Discrimination timer in AR/New DDB
distance cells/DEFlogic/SOTF timer/Broken Conductor/Com.
SOTF-TOR/Z4 block Pswing/CB Fail/IEC103 disturbance/U-I 05
A3.1 A or B 06 12/2001 Prim-sec/Kms-Miles/3P fault in Power Swing/Z1-Z2 measure for V2.02 + patch N/A 05
for P441/442 (Same DDB)
small charateristic/Ext Trip+5msec/New settings
Note: Software version / hardware version / model number can be found by setting in “system data” with MiCOM S1 or LCD front panel.
Hardware / Software- P44x/EN VC/F65
Version
Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch A4.x : Second Rear Port - more alarms - new application feature
Documentation: P44x/EN T/B22
Second rear port/Slip frequency/Retrip CB/VTS phase
selec/PPGround phase selection/Extraction PSL/Serial Cmp
A4.0 07 09/2002 V2.05 + patch
Line/New DDB cells/Overlap Z/ Rev with X4 limit/Winfeed/Floc
in IEC /Dead time2/I Bk conduct.
A4.1 07 12/ 2002 Bi phase ground & phase selection/Synchro VT bus side V2.07
Voltage memory improvement/compliant IEC103 with Px3x
A4.3 07 04/ 2003 V2.07
/DEF/Pswing & glitchZ
Synchro check function improvement/Tripping time stability for
A4.4 07 08/2003 Z2 fault/Problem of battery alarm when IEC103 communication V2.07
A or B resolved
for P441/442 Disturbance (compressed or not compressed) and No compatibility with branch
communication correction / DEF/ Ext Csync/P.Phase ref Csync A3.x (model 05 or 06)
A4.5 07 09/2003 / Sync live-live / I broken Cond./ Px4X with Px3x in V2.07
A
for P444 IEC103/Battery Alarm IEC 103/31th December for Drec/2UN
Vref Sync/Z1 & Arg<55°/Zn-Zn+1 with +30msec
Timesync cell in ModBus/Synchro TP bus/Optos taging in
event/Dynamic management Bus-Line for checksync /ModBus
A4.8 07 09/2004 correction /DNP3/Frequency tracking/Directionnal with V2.07
Deltas&Classical are computed in parallel (No delay between
the algorithms)
Last A4.x branch version: DNP3 with S1/ ModBus/ CB close
A4.9 07 05/2005 DNP3/ Floc with evolving fault/ Status opto with setting group/ V2.07
Im displayed in Measurement mode/ VTS alarm using V2
Note 1: Software version / hardware version / model number can be found by setting in “system data” with MiCOM S1 or LCD front panel.
Note 2: Version A4.2 - A4.4 – A4.6 – A4.7 not distributed
P44x/EN VC/F65 Hardware / Software-Version
Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch B1.x : New Hardware Platform (Coprocessor Board 150MHz-2nd rear port-Triptime= 1,1Cycle - 48 samples/T) & New functions (32N & 59N)
Documentation: P44x/EN T/E33
New platform/model 080C/coprocessor board at 150 MHz/PW
B1.0 08 12/2002 (32N)/CVTS (59N) new functions/ Px4X with Px3x in IEC103 / V2.09 No compatibility with branch A.x
Retrip CB/Ffu/31st December for Drec/I Brok.cond./DEF polar.
Synchrocheck ext correction & PPhase ref & L-Live / 32N
V2.09 +
B1.1 09 07/2003 correction / Line angle<55° / Voltage memory / Power swing & 08 08 08
patch*
Z glitch
Disturbance compressed & not compressed function and
V2.09 +
B1.2 09 09/2003 communication correction/2UN Vref Sync/Zn-Zn+1 with 08 08 08
patch*
+30msec
Note: Software version / hardware version / model number can be found by setting in “system data” with MiCOM S1 or LCD front panel.
Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch C1.x : New Hardware Platform (New CPU Board 150MHz + Coprocessor Board 150MHz-2nd rear port-Triptime= 1,1Cycle - 48 samples/T) &
Functions as B1.4+ New Distance Features
Documentation: P44x/EN T/E44
New platform/model 20G or 20H/Cpu board at 150 MHz/Fast
trip board/46 output-P444 model 20H/Pswing for China
V2.09 +
Distance feature: timer from Zn to Zn-1/Tilt settable in
patch*
Z1Z2Zp/Output “Phaseground detection”/PAP (Winfeed for RTE
C1.0 20 04/2004
G France)/Drec not compressed with 24 samples by cycle/Control or
for P441/442 input/InterMicom/Tp in DEF/DEF timer from 2 to No compatibility with branch A.x
V2.10
100msec/3rd&4th IN>/Internal trace by Zgraph
G-H Relay-opto event log/Z4Zp indication/ No compatibility with branch B.x
for P444
V2.09 +
Last C1.x branch version:UCA2 / InterMicom with patch*
C1.1 20 12/2004 UCA2/Timesync cell in ModBus/Synchro TP bus/Optos taging
or
in event/Dynamic management Bus-Line for checksync
V2.10
P44x/EN VC/F65 Hardware / Software-Version
Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch C2.x : Idem C1.x with UCA2 (Ethernet optical support) & new function (49+NCIT)
Documentation: P44x/EN T/E44
New platform- NCIT/ Thermal Overload as P540/ Synchro TP No compatibility with branch A.x
bus/ Optos tagging in event/ ZSP angle/ Dynamic management
C2.0 30 08/2004 No compatibility with branch B.x
Bus-Line for checksync/ DEF Reverse sensitivity/ Time sync
input/ ZSP start/ Ethernet module NCIT 61850-9-2 No compatibility with branch C1
C2.2 30 10/2004 InterMicom/ DEF primary scale/ AREVA name in UCA2 V2.10 + 30 30 30
patch*
Phase select. PPground/ Reset IN dead/ DNP3 & CB Close/
C2.5 30 11/2004 30 30 30
Floc/ Opto& setting group selection/ DNP3 or
G-J Primary measurement & Im - Error during flash with optical V2.11
C2.6 for P441/442 30 05/2005 fiber/ Floc&Broken currents new cells in DNP3-E2.0 official 30 30 30
platform with NCIT
Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Last C2.x branch version:
Zone reset&overlap/ WeakInfeed Echo+DEF/ Control Inp/
C2.11 30 052007 V2.14 30 30 30
Z1ext+Tilt/ Selfcheck Output board/ DRec & 5Amp/ Start D &
Phase Selection/ Timer&Thermal Protec 5Amp
Note 1: Software version / hardware version / model number can be found by setting in “system data” with MiCOM S1 or LCD front panel.
Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch C3.x : Idem C2.x with new communication protocol (IEC 61850-8-1) / UCA2 not supported – Model J only (Dual optos managed by default)
Documentation: P44x/EN T/G54
Add IEC 61850-8-1 protocol / Zone reset&overlap/ WeakInfeed
Echo+DEF/ Control Inp/ 2nd Sync +NCIT/ 21-67N activated
C3.7 31 12/2006 V2.12 + Patch
separately/ 67N&Blocking Scheme/ Floc&measurement with
high harmonic/ Hysteresis at 2% for V> &V<
No compatibility with branch Ax.x
C3.8 J 31 02/2007 Z1ext+Tilt/ Selfcheck Output board/ NCIT acquisition No compatibility with branch Bx.x
for P441 Start ∆ & Phase Selection/ Timer&Thermal Protec 5Amp/ KEMA No compatibility with branch C1.x
C3.9 for P442 31 06/2007
& Floc for 61850-8-1 No compatibility with branch C2.x
for P444
V2.14 + Patch
C3.10 31 02/2008 State change & Time stamping
Last C3.x branch version:
C3.11 31 03/2008 Phase select & PPGnd fault /DEF & Negative polarisation/
61850-8-1
Hardware / Software- P44x/EN VC/F65
Version
Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch C4.x : Idem C3.x with new features (cells and DDB)
Documentation: P44x/EN T/G54
C4.0 35 04/2007 Start ∆ & Phase Selection/ Add new DDB (Dist. Block/V>-V< ) V2.14 + Patch No compatibility with branch Ax.x
J
No compatibility with branch Bx.x
for P441 No compatibility with branch C1.x
for P442 Last C4.x branch version: Timer&Thermal Protec 5Amp/ KEMA
C4.1 35 10/2007 V2.14 + Patch
for P444 & Floc for 61850-8-1 No compatibility with branch C2.x
No compatibility with branch C3.x
P44x/EN VC/F65 Hardware / Software-Version
Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch C5.x : Idem C3.x with new features (cells and DDB)
Documentation: P44x/EN T/G54
Phase selec & PPGnd fault/ DEF & Negative polarisation/
Conventional algo & 1PGnd fault/ Fault report/ Cont Input label/ No compatibility with branch Ax.x
RGuard/ IN> 2nd stage/ IDMT TMS steps/ New DDB: Internal
C5.0 J 36 05/2007 trip+trip LED/ DRec default settings/ SOTF-TOR/ I>4&StubB/ V2.14 + Patch No compatibility with branch Bx.x
VMemory settable/ CT polarity/ I2>/ VR>/ DNP3/ New Zone Q/ No compatibility with branch C1.x
for P441
PSwing RLim/ Channel aided scheme/ I0 setting/ PSL graphic No compatibility with branch C2.x
for P442
improved
for P444 No compatibility with branch C3.x
Last C5.x branch version: State&time stamp/ IEC 61850-8-1/
No compatibility with branch C4.x
C5.1 36 04/2008 DNP3 over Ethernet/ Courier&Group/ I2&Dist start/ WeakInfeed V2.14 + Patch
TAC received extented
Hardware / Software- P44x/EN VC/F65
Version
Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch C5.x : Idem C3.x with new HW suffix K: extended buttons, high break contacts, tri colors LEDs…
Documentation: P44x/EN T/G54
HW suffix K/ Start D & Phase Selection/ New DDB cells V> No compatibility with branch Ax.x
D1.0 K 40 02/2007 V2.14 + Patch
&V<&independent distance scheme
for P442 No compatibility with branch Bx.x
for P444 Last D1.x branch version: Timer&Thermal Protec 5Amp/ KEMA No compatibility with branch Cx.x
D1.1 40 04/2008 V2.14 + Patch
& Floc for 61850-8-1
Last D2.x branch version: The following features are added:
- reverse guard detection
- Second stage of IN> earth overcurrent with DT or IDMT,
- IDMT step size for TMS from 0.025 to 0.005
- Extension from 4 In to 10 In the maximum setting range for
the 2 first stages
- Labels for disturbance records modified,
- “SOFT I>3 Enabled” TOR/SOTF mode creation,
- “Trip LED” menu added in DDB No compatibility with branch Ax.x
K 40 - voltage memory validity settable from 0s to 10s (step 0.01s) V2.14 + Patch No compatibility with branch Bx.x
D2.0 for P442 11/2008 - CT connection can be modified by software
for P444 45 - Negative sequence overcurrent protection enhanced, S1 Studio No compatibility with branch Cx.x
- Residual overvoltage enhanced No compatibility with branch D1.x
- DNP3 serial added
- Zone Q added
- resistance limits for power swing = R1, R2, RP, RQ, R3/R4)
- Channel aided trip modification
- Channel-aided distance schemes: trip after receipt of signal
from remote end protection and Tp instead of T1.
- New settings for I0 threshold
- InterMiCom Interrupt integration
P44x/EN VC/F65 Hardware / Software-Version
BLANK PAGE
Publication: P44x/EN T/F65