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MiCOM

P441/P442/P444
Numerical Distance Protection

Version D2.0

Technical Manual

P44x/EN T/F65
Technical Guide P44x/EN T/F65

MiCOM P441/P442 & P444 Page 1/2

Numerical Distance Protection


MiCOM P44x

GENERAL CONTENT

Safety Section Sxxxx/EN SS/G11

Introduction P44x/EN IT/F65

Hardware Description P44x/EN HW/F65

Application Guide P44x/EN AP/F65

Technical Data P44x/EN TD/F65

Installation P44x/EN IN/F65

Commissioning & Maintenance P44x/EN CM/F65

Commissioning Test & Record Sheet P44x/EN RS/F65

Connection Diagrams P44x/EN CO/F65

Relay Menu Database P44x/EN GC/F65

Menu Content Tables P44x/EN HI/F65

Version Compatibility P44x/EN VC/F65


P44x/EN T/F65 Technical Guide

Page 2/2 MiCOM P441/P442 & P444

BLANK PAGE
Safety Section Pxxxx/EN SS/G11

SAFETY SECTION
Pxxxx/EN SS/G11 Safety Section
Safety Section Pxxxx/EN SS/G11

(SS) - 1

CONTENTS

1. INTRODUCTION 3

2. HEALTH AND SAFETY 3

3. SYMBOLS AND LABELS ON THE EQUIPMENT 4


3.1 Symbols 4

3.2 Labels 4

4. INSTALLING, COMMISSIONING AND SERVICING 4

5. DE-COMMISSIONING AND DISPOSAL 7

6. TECHNICAL SPECIFICATIONS FOR SAFETY 7


6.1 Protective fuse rating 7

6.2 Protective class 7

6.3 Installation category 7

6.4 Environment 7
Pxxxx/EN SS/G11 Safety Section

(SS) - 2
Safety Section Pxxxx/EN SS/G11

(SS) - 3

STANDARD SAFETY STATEMENTS FOR AREVA T&D EQUIPMENT

1. INTRODUCTION
This Safety Section and the relevant equipment documentation provide full information on
safe handling, commissioning and testing of this equipment. This Safety Section also
includes reference to typical equipment label markings.
The technical data in this Safety Section is typical only, see the technical data section of the
relevant equipment documentation for data specific to a particular equipment.

Before carrying out any work on the equipment the user should be familiar with
the contents of this Safety Section and the ratings on the equipment’s rating
label.

Reference should be made to the external connection diagram before the equipment is
installed, commissioned or serviced.
Language specific, self-adhesive User Interface labels are provided in a bag for some
equipment.

2. HEALTH AND SAFETY


The information in the Safety Section of the equipment documentation is intended to ensure
that equipment is properly installed and handled in order to maintain it in a safe condition.
It is assumed that everyone who will be associated with the equipment will be familiar with
the contents of this Safety Section, or the Safety Guide (SFTY/4L M).
When electrical equipment is in operation, dangerous voltages will be present in certain parts
of the equipment. Failure to observe warning notices, incorrect use, or improper use may
endanger personnel and equipment and also cause personal injury or physical damage.
Before working in the terminal strip area, the equipment must be isolated.
Proper and safe operation of the equipment depends on appropriate shipping and handling,
proper storage, installation and commissioning, and on careful operation, maintenance and
servicing. For this reason only qualified personnel may work on or operate the equipment.
Qualified personnel are individuals who:

• Are familiar with the installation, commissioning, and operation of the equipment and of
the system to which it is being connected;

• Are able to safely perform switching operations in accordance with accepted safety
engineering practices and are authorized to energize and de-energize equipment and to
isolate, ground, and label it;

• Are trained in the care and use of safety apparatus in accordance with safety
engineering practices;

• Are trained in emergency procedures (first aid).


The equipment documentation gives instructions for its installation, commissioning, and
operation. However, the manuals cannot cover all conceivable circumstances or include
detailed information on all topics. In the event of questions or specific problems, do not take
any action without proper authorization. Contact the appropriate AREVA technical sales
office and request the necessary information.
Pxxxx/EN SS/G11 Safety Section

(SS) - 4

3. SYMBOLS AND LABELS ON THE EQUIPMENT


For safety reasons the following symbols which may be used on the equipment or referred to
in the equipment documentation, should be understood before it is installed or
commissioned.

3.1 Symbols

Caution: refer to equipment documentation Caution: risk of electric shock

Functional/Protective Conductor (*Earth)


terminal.
Protective Conductor (*Earth) terminal
Note: This symbol may also be used for a
Protective Conductor (Earth) Terminal
if that terminal is part of a terminal
block or sub-assembly e.g. power
supply.

*NOTE: THE TERM EARTH USED THROUGHOUT THIS TECHNICAL


MANUAL IS THE DIRECT EQUIVALENT OF THE NORTH
AMERICAN TERM GROUND.

3.2 Labels
See Safety Guide (SFTY/4L M) for typical equipment labeling information.

4. INSTALLING, COMMISSIONING AND SERVICING


Equipment connections
Personnel undertaking installation, commissioning or servicing work for this
equipment should be aware of the correct working procedures to ensure safety.
The equipment documentation should be consulted before installing,
commissioning, or servicing the equipment.
Terminals exposed during installation, commissioning and maintenance may
present a hazardous voltage unless the equipment is electrically isolated.
The clamping screws of all terminal block connectors, for field wiring, using M4
screws shall be tightened to a nominal torque of 1.3 Nm.
Equipment intended for rack or panel mounting is for use on a flat surface of a
Type 1 enclosure, as defined by Underwriters Laboratories (UL).
Any disassembly of the equipment may expose parts at hazardous voltage, also
electronic parts may be damaged if suitable electrostatic voltage discharge (ESD)
precautions are not taken.
If there is unlocked access to the rear of the equipment, care should be taken by
all personnel to avoid electric shock or energy hazards.
Voltage and current connections shall be made using insulated crimp terminations
to ensure that terminal block insulation requirements are maintained for safety.
Watchdog (self-monitoring) contacts are provided in numerical relays to indicate
the health of the device. AREVA T&D strongly recommends that these contacts
are hardwired into the substation's automation system, for alarm purposes.
Safety Section Pxxxx/EN SS/G11

(SS) - 5

To ensure that wires are correctly terminated the correct crimp terminal and tool
for the wire size should be used.
The equipment must be connected in accordance with the appropriate connection
diagram.
Protection Class I Equipment
- Before energizing the equipment it must be earthed using the protective
conductor terminal, if provided, or the appropriate termination of the
supply plug in the case of plug connected equipment.
- The protective conductor (earth) connection must not be removed since
the protection against electric shock provided by the equipment would be
lost.
- When the protective (earth) conductor terminal (PCT) is also used to
terminate cable screens, etc., it is essential that the integrity of the
protective (earth) conductor is checked after the addition or removal of
such functional earth connections. For M4 stud PCTs the integrity of the
protective (earth) connections should be ensured by use of a locknut or
similar.
The recommended minimum protective conductor (earth) wire size is 2.5 mm²
(3.3 mm² for North America) unless otherwise stated in the technical data section
of the equipment documentation, or otherwise required by local or country wiring
regulations.
The protective conductor (earth) connection must be low-inductance and as short
as possible.
All connections to the equipment must have a defined potential. Connections that
are pre-wired, but not used, should preferably be grounded when binary inputs
and output relays are isolated. When binary inputs and output relays are
connected to common potential, the pre-wired but unused connections should be
connected to the common potential of the grouped connections.
Before energizing the equipment, the following should be checked:
- Voltage rating/polarity (rating label/equipment documentation);
- CT circuit rating (rating label) and integrity of connections;
- Protective fuse rating;
- Integrity of the protective conductor (earth) connection (where
applicable);
- Voltage and current rating of external wiring, applicable to the application.
Accidental touching of exposed terminals
If working in an area of restricted space, such as a cubicle, where there is a risk of
electric shock due to accidental touching of terminals which do not comply with
IP20 rating, then a suitable protective barrier should be provided.
Equipment use
If the equipment is used in a manner not specified by the manufacturer, the
protection provided by the equipment may be impaired.
Removal of the equipment front panel/cover
Removal of the equipment front panel/cover may expose hazardous live parts,
which must not be touched until the electrical power is removed.
UL and CSA/CUL Listed or Recognized equipment
To maintain UL and CSA/CUL Listing/Recognized status for North America the
equipment should be installed using UL or CSA Listed or Recognized parts for the
following items: connection cables, protective fuses/fuseholders or circuit
breakers, insulation crimp terminals and replacement internal battery, as specified
in the equipment documentation.
Pxxxx/EN SS/G11 Safety Section

(SS) - 6

For external protective fuses a UL or CSA Listed fuse shall be used. The Listed
type shall be a Class J time delay fuse, with a maximum current rating of 15 A and
a minimum d.c. rating of 250 Vd.c., for example type AJT15.
Where UL or CSA Listing of the equipment is not required, a high rupture capacity
(HRC) fuse type with a maximum current rating of 16 Amps and a minimum d.c.
rating of 250 Vd.c. may be used, for example Red Spot type NIT or TIA.
Equipment operating conditions
The equipment should be operated within the specified electrical and
environmental limits.
Current transformer circuits
Do not open the secondary circuit of a live CT since the high voltage produced
may be lethal to personnel and could damage insulation. Generally, for safety,
the secondary of the line CT must be shorted before opening any connections to
it.
For most equipment with ring-terminal connections, the threaded terminal block
for current transformer termination has automatic CT shorting on removal of the
module. Therefore external shorting of the CTs may not be required, the
equipment documentation should be checked to see if this applies.
For equipment with pin-terminal connections, the threaded terminal block for
current transformer termination does NOT have automatic CT shorting on removal
of the module.
External resistors, including voltage dependent resistors (VDRs)
Where external resistors, including voltage dependent resistors (VDRs), are fitted
to the equipment, these may present a risk of electric shock or burns, if touched.
Battery replacement
Where internal batteries are fitted they should be replaced with the recommended
type and be installed with the correct polarity to avoid possible damage to the
equipment, buildings and persons.
Insulation and dielectric strength testing
Insulation testing may leave capacitors charged up to a hazardous voltage. At the
end of each part of the test, the voltage should be gradually reduced to zero, to
discharge capacitors, before the test leads are disconnected.
Insertion of modules and pcb cards
Modules and PCB cards must not be inserted into or withdrawn from the
equipment whilst it is energized, since this may result in damage.
Insertion and withdrawal of extender cards
Extender cards are available for some equipment. If an extender card is used,
this should not be inserted or withdrawn from the equipment whilst it is energized.
This is to avoid possible shock or damage hazards. Hazardous live voltages may
be accessible on the extender card.
External test blocks and test plugs
Great care should be taken when using external test blocks and test plugs such
as the MMLG, MMLB and MiCOM P990 types, hazardous voltages may be
accessible when using these. *CT shorting links must be in place before the
insertion or removal of MMLB test plugs, to avoid potentially lethal voltages.
*Note: When a MiCOM P992 Test Plug is inserted into the MiCOM P991 Test
Block, the secondaries of the line CTs are automatically shorted, making
them safe.
Fiber optic communication
Where fiber optic communication devices are fitted, these should not be viewed
directly. Optical power meters should be used to determine the operation or
signal level of the device.
Safety Section Pxxxx/EN SS/G11

(SS) - 7

Cleaning
The equipment may be cleaned using a lint free cloth dampened with clean water,
when no connections are energized. Contact fingers of test plugs are normally
protected by petroleum jelly, which should not be removed.

5. DE-COMMISSIONING AND DISPOSAL


De-commissioning
The supply input (auxiliary) for the equipment may include capacitors across the
supply or to earth. To avoid electric shock or energy hazards, after completely
isolating the supplies to the equipment (both poles of any dc supply), the
capacitors should be safely discharged via the external terminals prior to
de-commissioning.
Disposal
It is recommended that incineration and disposal to water courses is avoided.
The equipment should be disposed of in a safe manner. Any equipment
containing batteries should have them removed before disposal, taking
precautions to avoid short circuits. Particular regulations within the country of
operation, may apply to the disposal of the equipment.

6. TECHNICAL SPECIFICATIONS FOR SAFETY


Unless otherwise stated in the equipment technical manual, the following data is applicable.
6.1 Protective fuse rating
The recommended maximum rating of the external protective fuse for equipments is 16A,
high rupture capacity (HRC) Red Spot type NIT, or TIA, or equivalent. The protective fuse
should be located as close to the unit as possible.

CAUTION - CTs must NOT be fused since open circuiting them may
produce lethal hazardous voltages.

6.2 Protective class

IEC 60255-27: 2005 Class I (unless otherwise specified in the equipment


EN 60255-27: 2005 documentation). This equipment requires a protective
conductor (earth) connection to ensure user safety.

6.3 Installation category


IEC 60255-27: 2005 Installation category III (Overvoltage Category III):
EN 60255-27: 2005 Distribution level, fixed installation.
Equipment in this category is qualification tested at
5 kV peak, 1.2/50 µs, 500 Ω, 0.5 J, between all supply
circuits and earth and also between independent circuits.

6.4 Environment
The equipment is intended for indoor installation and use only. If it is required for use in an
outdoor environment then it must be mounted in a specific cabinet of housing which will
enable it to meet the requirements of IEC 60529 with the classification of degree of
protection IP54 (dust and splashing water protected).
Pollution Degree - Pollution Degree 2 Compliance is demonstrated by reference to
Altitude - Operation up to 2000m safety standards.
IEC 60255-27:2005
EN 60255-27: 2005
Pxxxx/EN SS/G11 Safety Section

(SS) - 8

BLANK PAGE
Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444

INTRODUCTION
Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 1/36

CONTENT

1. INTRODUCTION TO MiCOM 3

2. INTRODUCTION TO MiCOM GUIDES 4

3. USER INTERFACES AND MENU STRUCTURE 5


3.1 Introduction to the relay 5
3.1.1 Front panel 5
3.1.2 Relay rear panel 8
3.2 Introduction to the user interfaces and settings options 10
3.3 Menu structure 11
3.3.1 Protection settings 12
3.3.2 Disturbance recorder settings 12
3.3.3 Control and support settings 12
3.4 Password protection 13
3.5 Relay configuration 13
3.6 Front panel user interface (keypad and LCD) 14
3.6.1 Default display and menu time-out 15
3.6.2 Menu navigation and setting browsing 15
3.6.3 Hotkey menu navigation (since version C2.X) 15
3.6.4 Password entry 16
3.6.5 Reading and clearing of alarm messages and fault records 17
3.6.6 Setting changes 17
3.7 Front communication port user interface 18
3.8 Rear communication port user interface 20
3.8.1 Courier communication 20
3.8.2 Modbus communication 22
3.8.3 IEC 60870-5 CS 103 communication 23
3.8.4 DNP 3.0 Communication 24
3.8.5 IEC61850 Ethernet Interface (since version C3.X) 25
3.9 Second rear Communication Port 31
3.10 InterMiCOM Teleprotection (since C2.X) 33
3.10.1 Physical Connections 33
3.10.2 Direct Connection 34
3.10.3 Modem Connection 34
3.10.4 Settings 34
3.11 Ethernet Rear Port (option) – since version C2.X 35
P44x/EN IT/F65 Introduction

Page 2/36 MiCOM P441/P442 & P444

BLANK PAGE
Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 3/36

1. INTRODUCTION TO MiCOM
MiCOM is a comprehensive solution capable of meeting all electricity supply requirements. It
comprises a range of components, systems and services from AREVA T&D Protection and
Control.
Central to the MiCOM concept is flexibility.
MiCOM provides the ability to define an application solution and, through extensive
communication capabilities, to integrate it with your power supply control system.
The components within MiCOM are:

• P range protection relays;

• C range control products;

• M range measurement products for accurate metering and monitoring;

• S range versatile PC support and substation control packages.


MiCOM products include extensive facilities for recording information on the state and
behaviour of the power system using disturbance and fault records. They can also provide
measurements of the system at regular intervals to a control centre enabling remote
monitoring and control to take place.
For up-to-date information on any MiCOM product, visit our website:
www.areva-td.com
P44x/EN IT/F65 Introduction

Page 4/36 MiCOM P441/P442 & P444

2. INTRODUCTION TO MiCOM GUIDES


The guides provide a functional and technical description of the MiCOM protection relay and
a comprehensive set of instructions for the relay’s use and application.
The technical manual include the previous technical documentation, as follows:
Technical Guide, includes information on the application of the relay and a technical
description of its features. It is mainly intended for protection engineers concerned with the
selection and application of the relay for the protection of the power system.
Operation Guide, contains information on the installation and commissioning of the relay,
and also a section on fault finding. This volume is intended for site engineers who are
responsible for the installation, commissioning and maintenance of the relay.
The chapter content within the technical manual is summarised below:
Safety Guide
P44x/EN IT Introduction
A guide to the different user interfaces of the protection relay describing how
to start using the relay.
P44x/EN HW Relay Description
Overview of the operation of the relay’s hardware and software. This chapter
includes information on the self-checking features and diagnostics of the
relay.
P44x/EN AP Application Notes:
Comprehensive and detailed description of the features of the relay including
both the protection elements and the relay’s other functions such as event
and disturbance recording, fault location and programmable scheme logic.
This chapter includes a description of common power system applications of
the relay, calculation of suitable settings, some typical worked examples,
and how to apply the settings to the relay.
P44x/EN TD Technical Data
Technical data including setting ranges, accuracy limits, recommended
operating conditions, ratings and performance data. Compliance with
technical standards is quoted where appropriate.
P44x/EN IN Installation
Recommendations on unpacking, handling, inspection and storage of the
relay. A guide to the mechanical and electrical installation of the relay is
provided incorporating earthing recommendations.
P44x/EN CM Commissioning and Maintenance
Instructions on how to commission the relay, comprising checks on the
calibration and functionality of the relay. A general maintenance policy for
the relay is outlined.
P44x/EN CO External Connection Diagrams
All external wiring connections to the relay.
P44x/EN GC Relay Menu Database:
User interface/Courier/Modbus/IEC 60870-5-103/DNP 3.0
Listing of all of the settings contained within the relay together with a brief
description of each.
Default Programmable Scheme Logic
P44x/EN HI Menu Content Tables
P44x/EN VC Hardware / Software Version History and Compatibility
Repair Form
Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 5/36

3. USER INTERFACES AND MENU STRUCTURE


The settings and functions of the MiCOM protection relay can be accessed both from the
front panel keypad and LCD, and via the front and rear communication ports. Information on
each of these methods is given in this section to describe how to get started using the relay.
3.1 Introduction to the relay
3.1.1 Front panel
The front panel of the relay is shown in the following figures, with the hinged covers at the
top and bottom of the relay shown open. Extra physical protection for the front panel can be
provided by an optional transparent front cover. With the cover in place read only access to
the user interface is possible. Removal of the cover does not compromise the environmental
withstand capability of the product, but allows access to the relay settings. When full access
to the relay keypad is required, for editing the settings, the transparent cover can be
unclipped and removed when the top and bottom covers are open. If the lower cover is
secured with a wire seal, this will need to be removed. Using the side flanges of the
transparent cover, pull the bottom edge away from the relay front panel until it is clear of the
seal tab.
The cover can then be moved vertically down to release the two fixing lugs from their
recesses in the front panel.

Serial N˚ and I*, V Ratings Top cover

Zn 1/5 A 50/60 Hz
SER N o Vx V
DIAG N o Vn V
LCD

TRIP

Fixed ALARM

function
OUT OF SERVICE
LEDs
HEALTHY
User programable
= CLEAR function LEDs
= READ

= ENTER

Keypad
SK 1 SK 2

Bottom
cover
Battery compartment Front comms port Download/monitor port

P0103ENa

FIGURE 1 - RELAY FRONT VIEW (HARDWARE A – B AND C)


P44x/EN IT/F65 Introduction

Page 6/36 MiCOM P441/P442 & P444

Serial No and I*, V Ratings Top cover

In 1/5 A 50/60 Hz
SER No Vx V
DIAG No Vn V

LCD
TRIP

Fixed ALARM
Hotkeys
function
LEDs OUT OF SERVICE

HEALTHY
User programable
= CLEAR function LEDs
= READ

= ENTER

Keypad

Bottom
cover
Battery compartment Front comms port Download/monitor port P0103ENb

FIGURE 2 - RELAY FRONT VIEW ARRANGEMENT WITH HOTKEYS (HARDWARE G, H AND J)

Serial No., Model No. and Ratings LCD Top Cover

I 50/60 Hz E202519
Vx V
C
UL US LISTED
SER No.
V
IBD2
DIAG No. Vn V IND. CONT. EQ. User Programmable
Fixed Function Function LED’s (tri-color)
LED’s
TRIP
1 6
ALARM

OUT OF 2 7
SERVICE
Hotkeys
HEALTHY
3 8
User Programmable C = CLEAR
Function LED’s = READ
(tri-color) = ENTER
4 9
Navigation
Keypad
5 10

SK1 SK2 SK3

Bottom Cover Battery Front Download/Monitor Function


Compartment Comms. Port Port Keys

P0103ENc

FIGURE 3 - RELAY FRONT VIEW WITH FUNCTION KEYS (HARDWARE K)


Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 7/36

The front panel of the relay includes the following:

• a 16-character by 2- or 3-line (since version C2.X) alphanumeric liquid crystal display


(LCD).

• a keypad comprising 4 arrow keys ( , ,  and ), an enter key (), a clear key
(), and a read key (c) and two additive hotkeys (since hardware G-J, software
C2.X).

• 12 LEDs; 4 fixed function LEDs on the left hand side of the front panel and 8
programmable function LEDs on the right hand side.

• 10 additional function keys plus 10 additional LEDs (since hardware K, software D1.x)
Hotkey functionality (figures 2 and 3):

• SCROLL: Starts scrolling through the various default displays.

• STOP: Stops scrolling the default display


for control of setting groups, control inputs and circuit breaker operation.
Function key functionality (figure 3):

• The relay front panel, features control pushbutton switches with programmable LEDs
that facilitate local control. Factory default settings associate specific relay functions
with these 10 direct-action pushbuttons and LEDs e.g. Enable/Disable the auto-
recloser function. Using programmable scheme logic, the user can readily change the
default direct-action pushbutton functions and LED indications to fit specific control
and operational needs.
Under the top hinged cover:

• the relay serial number, and the relay’s current and voltage rating information*.
Under the bottom hinged cover:

• battery compartment to hold the 1/2 AA size battery which is used for memory
back-up for the real time clock, event, fault and disturbance records.

• a 9-pin female D-type front port for communication with a PC locally to the relay (up to
15m distance) via an EIA(RS)232 serial data connection.

• a 25-pin female D-type port providing internal signal monitoring and high speed local
downloading of software and language text via a parallel data connection.
The fixed function LEDs on the left hand side of the front panel are used to indicate the
following conditions:
Trip (Red) indicates that the relay has issued a trip signal. It is reset when the associated
fault record is cleared from the front display. (Alternatively the trip LED can be configured to
be self-resetting)*.
Alarm (Yellow) flashes to indicate that the relay has registered an alarm. This may be
triggered by a fault, event or maintenance record. The LED will flash until the alarms have
been accepted (read), after which the LED will change to constant illumination, and will
extinguish when the alarms have been cleared.
Out of service (Yellow) indicates that the relay’s protection is unavailable.
Healthy (Green) indicates that the relay is in correct working order, and should be on at all
times. It will be extinguished if the relay’s self-test facilities indicate that there is an error with
the relay’s hardware or software. The state of the healthy LED is reflected by the watchdog
contact at the back of the relay.
Since version C2.0, to improve the visibility of the settings via the front panel, the LCD
contrast can be adjusted using the “LCD Contrast” setting with the last cell in the
CONFIGURATION column.
P44x/EN IT/F65 Introduction

Page 8/36 MiCOM P441/P442 & P444

3.1.2 Relay rear panel


The rear panel of the relay is shown in figure 4. All current and voltage signals, digital logic
input signals and output contacts are connected at the rear of the relay. Also connected at
the rear is the twisted pair wiring for the rear EIA(RS)485 communication port, the IRIG-B
time synchronising input and the optical fibre rear communication port (IEC103 or UCA2 by
Ethernet) which are both optional. A second rear port (Courier) and an interMiCOM port are
also available.

Digital output (relays)


connections (Terminal blocks B & E)

A B C D E F

Power supply
connection
(Terminal
block F)

Rear comms
port (RS485)

Current and voltage Digital input


input terminals (Terminal block C) connections (Terminal block D)
P3023ENa

FIGURE 4A - RELAY REAR VIEW 40TE CASE

Optional IRIG-B board Digital output (relays) Power supply


(Terminal Block A) connections (Terminal blocks F & H) connection (TB J)

A C D E F G H J
B

IRIG -B

TX
RX

Optional fibre optic Current and voltage Digital input connections Rear comms port
connection input terminals (Terminal blocks D & E) (RS485) (TB J)
(Terminal block A) (Terminal block C) P3024ENa

FIGURE 4B - RELAY REAR VIEW 60 TE


Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 9/36

Programmable Power supply


Optional
digital outputs (relays) connections connection
IRIG-B board (Terminal block N)
(Terminal blocks J, K, L & M)

A B C D E F G H J K L M N

1
1 2 3 19

2
3

3
3

3
4 5 6 20

4
4

4
5

5
IRIG-B

6
7 8 9 21

7
8

8
9

9
10 11 12 22

10

10

10

10

10

10

10

10
11

11

11

11
11

11

11

11
12

12

12

12

12

12

12

12
13

13

13

13
13 14 15 23

13

13

13

13
TX
RX
14

14

14

14

14

14

14

14
15

15

15

15

15

15

15

15
16 17 18 24
16

16

16

16

16

16

16

16
17

17

17

17

17

17

17

17
18

18

18

18

18

18

18

18
Optional fibre 1A/5A Programmable
optic connection Current and voltage digital input Rear comms port
IEC60870-5-103 input terminals connections (RS485)
(VDEW) (Terminal block C) (Terminal blocks D, E & F) P3025ENa

FIGURE 4C - RELAY REAR VIEW 80 TE


Refer to the wiring diagram in chapter P44x/EN CO for complete connection details.
(for 2nd rear port in model 42 or 44)
P44x/EN IT/F65 Introduction

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3.2 Introduction to the user interfaces and settings options


The relay has three user interfaces:

• the front panel user interface via the LCD and keypad.

• the front port which supports Courier communication.

• the rear port which supports one protocol of either Courier, Modbus,
IEC 60870-5-103 or DNP3.0. The protocol for the rear port must be specified when the
relay is ordered.

• the optional Ethernet port wich supports IEC61850 (since version C3.X),

• The optional second rear port wich supports Courier protocol (since version C3.X).
The measurement information and relay settings which can be accessed from the three
interfaces are summarised in Table 1.

Keypad/ IEC IEC


Courier Modbus DNP3.0
LCD 870-5-103 61850(3)
Display & modification (2)

of all settings
• • • •
Digital I/O signal status
• • • • • •
Display/extraction of
measurements
• • • • • •
Display/extraction of
fault records
• • • • • •
Extraction of
disturbance records
• • • • •
(Floc in %) (1)

Programmable scheme
logic settings

Reset of fault & alarm
records
• • • • •
Clear event & fault (2)

records
• • • • •
Time synchronisation
• • • • •
Control commands
• • • • •
TABLE 1
(1)
since version C2.X.
(2)
with generic commands
(3)
Since version C3.X.
Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 11/36

3.3 Menu structure


The relay’s menu is arranged in a tabular structure. Each setting in the menu is referred to
as a cell, and each cell in the menu may be accessed by reference to a row and column
address. The settings are arranged so that each column contains related settings, for
example all of the disturbance recorder settings are contained within the same column. As
shown in figure 5, the top row of each column contains the heading which describes the
settings contained within that column. Movement between the columns of the menu can only
be made at the column heading level. A complete list of all of the menu settings is given in
Appendix A of the manual.

Column header Up to 4 protection setting groups

System data View records Overcurrent Earth fault

Column
data
settings

Control & support Group 1


Repeated for Groups 2, 3, 4
P4003ENa

FIGURE 5 - MENU STRUCTURE


All of the settings in the menu fall into one of three categories: protection settings,
disturbance recorder settings, or control and support (C&S) settings. One of two different
methods is used to change a setting depending on which category the setting falls into.
Control and support settings are stored and used by the relay immediately after they are
entered. For either protection settings or disturbance recorder settings, the relay stores the
new setting values in a temporary ‘scratchpad’. It activates all the new settings together, but
only after it has been confirmed that the new settings are to be adopted. This technique is
employed to provide extra security, and so that several setting changes that are made within
a group of protection settings will all take effect at the same time.
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3.3.1 Protection settings


The protection settings include the following items:

• protection element settings

• scheme logic settings

• auto-reclose and check synchronisation settings (where appropriate)*∗

• fault locator settings (where appropriate)*


There are four groups of protection settings, with each group containing the same setting
cells. One group of protection settings is selected as the active group, and is used by the
protection elements.
3.3.2 Disturbance recorder settings
The disturbance recorder settings include the record duration and trigger position, selection
of analogue and digital signals to record, and the signal sources that trigger the recording.
3.3.3 Control and support settings
The control and support settings include:

• relay configuration settings

• open/close circuit breaker*

• CT & VT ratio settings*

• reset LEDs

• active protection setting group

• password & language settings

• circuit breaker control & monitoring settings*

• communications settings

• measurement settings

• event & fault record settings

• user interface settings

• commissioning settings


may vary according to relay type/model
Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 13/36

3.4 Password protection


The menu structure contains three levels of access. The level of access that is enabled
determines which of the relay’s settings can be changed and is controlled by entry of two
different passwords. The levels of access are summarised in Table 2.

Access level Operations enabled


Level 0 Read access to all settings, alarms, event records
No password required and fault records
Level 1 As level 0 plus:
Password 1 or 2 Control commands, e.g.
circuit breaker open/close.
Reset of fault and alarm conditions.
Reset LEDs.
Clearing of event and fault records.
Level 2 Password 2 required
As level 1 plus:
All other settings.

TABLE 2
Each of the two passwords are 4 characters of upper case text. The factory default for both
passwords is AAAA. Each password is user-changeable once it has been correctly entered.
Entry of the password is achieved either by a prompt when a setting change is attempted, or
by moving to the ‘Password’ cell in the ‘System data’ column of the menu. The level of
access is independently enabled for each interface, that is to say if level 2 access is enabled
for the rear communication port, the front panel access will remain at level 0 unless the
relevant password is entered at the front panel. The access level enabled by the password
entry will time-out independently for each interface after a period of inactivity and revert to
the default level. If the passwords are lost an emergency password can be supplied - contact
AREVA with the relay’s serial number. The current level of access enabled for an interface
can be determined by examining the 'Access level' cell in the 'System data' column, the
access level for the front panel User Interface (UI), can also be found as one of the default
display options.
The relay is supplied with a default access level of 2, such that no password is required to
change any of the relay settings. It is also possible to set the default menu access level to
either level 0 or level1, preventing write access to the relay settings without the correct
password. The default menu access level is set in the ‘Password control’ cell which is found
in the ‘System data’ column of the menu (note that this setting can only be changed when
level 2 access is enabled).
3.5 Relay configuration
The relay is a multi-function device which supports numerous different protection, control
and communication features. In order to simplify the setting of the relay, there is a
configuration settings column which can be used to enable or disable many of the functions
of the relay. The settings associated with any function that is disabled are made invisible, i.e.
they are not shown in the menu. To disable a function change the relevant cell in the
‘Configuration’ column from ‘Enabled’ to ‘Disabled’.
The configuration column controls which of the four protection settings groups is selected as
active through the ‘Active settings’ cell. A protection setting group can also be disabled in the
configuration column, provided it is not the present active group. Similarly, a disabled setting
group cannot be set as the active group.
The column also allows all of the setting values in one group of protection settings to be
copied to another group.
To do this firstly set the ‘Copy from’ cell to the protection setting group to be copied, then set
the ‘Copy to’ cell to the protection group where the copy is to be placed. The copied settings
are initially placed in the temporary scratchpad, and will only be used by the relay following
confirmation.
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To restore the default values to the settings in any protection settings group, set the ‘Restore
defaults’ cell to the relevant group number. Alternatively it is possible to set the ‘Restore
defaults’ cell to ‘All settings’ to restore the default values to all of the relay’s settings, not just
the protection groups’ settings. The default settings will initially be placed in the scratchpad
and will only be used by the relay after they have been confirmed. Note that restoring
defaults to all settings includes the rear communication port settings, which may result in
communication via the rear port being disrupted if the new (default) settings do not match
those of the master station.
3.6 Front panel user interface (keypad and LCD)
When the keypad is exposed it provides full access to the menu options of the relay, with the
information displayed on the LCD.
The (, , ,  and  keys which are used for menu navigation and setting value
changes include an auto-repeat function that comes into operation if any of these keys are
held continually pressed. This can be used to speed up both setting value changes and
menu navigation; the longer the key is held depressed, the faster the rate of change or
movement becomes.

System Other default displays


3-phase voltage
frequency
Alarm messages

Date and time


C
C

Column 1 Column 2 Column n


System data View records Group 4
Overcurrent

Data 1.1 Data 2.1 Data n.1


Language Last record I>1 function
C
Note: The C key will return
to column header
Data 1.2 Data 2.2 from any menu cell Data n.2
Password Time and date I>1 directional

Other setting Other setting Other setting


cells in cells in cells in
column 1 column 2 column n

Data 1.n Data 2.n Data n.n


Password C - A voltage
level 2
I> char angle

P0105ENa

FIGURE 6 - FRONT PANEL USER INTERFACE


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3.6.1 Default display and menu time-out


The front panel menu has a selectable default display. The relay will time-out and return to
the default display and turn the LCD backlight off after 15 minutes of keypad inactivity. If this
happens any setting changes which have not been confirmed will be lost and the original
setting values maintained.
The contents of the default display can be selected from the following options: 3-phase and
neutral current, 3-phase voltage, power, system frequency, date and time, relay description,
or a user-defined plant reference*. The default display is selected with the ‘Default display’
cell of the ‘Measure’t setup’ column. Also, from the default display the different default
display options can be scrolled through using the  and  keys. However the menu
selected default display will be restored following the menu time-out elapsing. Whenever
there is an uncleared alarm present in the relay (e.g. fault record, protection alarm, control
alarm etc.) the default display will be replaced by:

Alarms/Faults
Present

Entry to the menu structure of the relay is made from the default display and is not affected if
the display is showing the ‘Alarms/Faults present’ message.
3.6.2 Menu navigation and setting browsing
The menu can be browsed using the four arrow keys, following the structure shown in
figure 6. Thus, starting at the default display the  key will display the first column heading.
To select the required column heading use the  and  keys. The setting data contained in
the column can then be viewed by using the  and  keys. It is possible to return to the
column header either by holding the [up arrow symbol] key down or by a single press of the
clear key . It is only possible to move across columns at the column heading level. To
return to the default display press the  key or the clear key  from any of the column
headings. It is not possible to go straight to the default display from within one of the column
cells using the auto-repeat facility of the  key, as the auto-repeat will stop at the column
heading. To move to the default display, the  key must be released and pressed again.

3.6.3 Hotkey menu navigation (since version C2.X)


The hotkey menu can be browsed using the two keys directly below the LCD. These are
known as direct access keys. The direct access keys perform the function that is displayed
directly above them on the LCD. Thus, to access the hotkey menu from the default display
the direct access key below the “HOTKEY” text must be pressed. Once in the hotkey menu
the ⇐ and ⇒ keys can be used to scroll between the available options and the direct access
keys can be used to control the function currently displayed. If neither the ⇐ or ⇒ keys are
pressed with 20 seconds of entering a hotkey sub menu, the relay will revert to the default
display. The clear key C will also act to return to the default menu from any page of the
hotkey menu. The layout of a typical page of the hotkey menu is described below.
The top line shows the contents of the previous and next cells for easy menu navigation.
The centre line shows the function.
The bottom line shows the options assigned to the direct access keys.
The functions available in the hotkey menu are listed below:
3.6.3.1 Setting group selection (since version C2.X)
The user can either scroll using <<NXT GRP>> through the available setting groups or
<<SELECT>> the setting group that is currently displayed.
When the SELECT button is pressed a screen confirming the current setting group is
displayed for 2 seconds before the user is prompted with the <<NXT GRP>> or
<<SELECT>> options again. The user can exit the sub menu by using the left and right
arrow keys.
For more information on setting group selection refer to “Changing setting group” section in
the Application Notes (P440/EN AP).
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3.6.3.2 Control inputs – user assignable functions (since version C2.X)


The number of control inputs (user assignable functions – USR ASS) represented in the
hotkey menu is user configurable in the “CTRL I/P CONFIG” column. The chosen inputs can
be SET/RESET using the hotkey menu.
For more information refer to the “Control Inputs” section in the Application Notes
(P44x/EN AP).
3.6.3.3 CB control (since version C2.X)
The CB control functionality varies from one Px40 relay to another. For a detailed
description of the CB control via the hotkey menu refer to the “Circuit breaker control” section
of the Application Notes (P440/EN AP).

Default Display

MiCOM
P140

HOTKEY CB CTRL

(See CB Control in Application Notes)

<USR ASSX STG GRP> <MENU USR ASS1> <STG GRP USR ASS2> <USR ASS1 USR ASSX> <USR ASS2 MENU>

HOT KEY MENU SETTING GROUP 1 CONTROL INPUT 1 CONTROL INPUT 2 CONTROL INPUT 2

EXIT NXT GRP SELECT EXIT ON EXIT ON EXIT ON

<MENU USR ASS1> <MENU USR ASS2> Confirmation


SETTING GROUP 2 CONTROL INPUT 1 screen
dispalyed for
2 seconds
NXT GRP SELECT ON

<MENU <MENU USR ASS2>


Confirmation USR ASS1>
NOTE: <<EXIT>> Key returns
screen SETTING GROUP 2 CONTROL INPUT 1 the user to the Hotkey
displayed for
Menu Screen
2 seconds
SELECTED OFF EXIT

P1246ENa

FIGURE 7 - HOTKEY MENU NAVIGATION


3.6.4 Password entry
When entry of a password is required the following prompt will appear:

Enter password
**** Level 1

NOTE: The password required to edit the setting is the prompt as shown
above
A flashing cursor will indicate which character field of the password may be changed. Press
the  and  keys to vary each character between A and Z. To move between the
character fields of the password, use the  and  keys. The password is confirmed by
pressing the enter key . The display will revert to ‘Enter Password’ if an incorrect
password is entered. At this point a message will be displayed indicating whether a correct
password has been entered and if so what level of access has been unlocked. If this level is
sufficient to edit the selected setting then the display will return to the setting page to allow
the edit to continue. If the correct level of password has not been entered then the password
prompt page will be returned to. To escape from this prompt press the clear key .
Alternatively, the password can be entered using the ‘Password’ cell of the ‘System data’
column.
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For the front panel user interface the password protected access will revert to the default
access level after a keypad inactivity time-out of 15 minutes. It is possible to manually reset
the password protection to the default level by moving to the ‘Password’ menu cell in the
‘System data’ column and pressing the clear key  instead of entering a password.

3.6.5 Reading and clearing of alarm messages and fault records


The presence of one or more alarm messages will be indicated by the default display and by
the yellow alarm LED flashing. The alarm messages can either be self-resetting or latched,
in which case they must be cleared manually. To view the alarm messages press the read
key c. When all alarms have been viewed, but not cleared, the alarm LED will change from
flashing to constant illumination and the latest fault record will be displayed (if there is one).
To scroll through the pages of this use the c key. When all pages of the fault record have
been viewed, the following prompt will appear:

Press clear to
reset alarms

To clear all alarm messages press ; to return to the alarms/faults present display and
leave the alarms uncleared, press c. Depending on the password configuration settings, it
may be necessary to enter a password before the alarm messages can be cleared (see
section on password entry). When the alarms have been cleared the yellow alarm LED will
extinguish, as will the red trip LED if it was illuminated following a trip.
Alternatively it is possible to accelerate the procedure, once the alarm viewer has been
entered using the c key, the  key can be pressed, this will move the display straight to
the fault record. Pressing  again will move straight to the alarm reset prompt where
pressing  once more will clear all alarms.

3.6.6 Setting changes


To change the value of a setting, first navigate the menu to display the relevant cell. To
change the cell value press the enter key  which will bring up a flashing cursor on the LCD
to indicate that the value can be changed. This will only happen if the appropriate password
has been entered, otherwise the prompt to enter a password will appear. The setting value
can then be changed by pressing the or  keys. If the setting to be changed is a binary value
or a text string, the required bit or character to be changed must first be selected using the
( and  keys. When the desired new value has been reached it is confirmed as the new
setting value by pressing . Alternatively, the new value will be discarded either if the clear
button  is pressed or if the menu time-out occurs.

For protection group settings and disturbance recorder settings, the changes must be
confirmed before they are used by the relay. To do this, when all required changes have
been entered, return to the column heading level and press the key. Prior to returning to the
default display the following prompt will be given:

Update settings?
Enter or clear

Pressing  will result in the new settings being adopted, pressing  will cause the relay to
discard the newly entered values. It should be noted that, the setting values will also be
discarded if the menu time out occurs before the setting changes have been confirmed.
Control and support settings will be updated immediately after they are entered, without
‘Update settings?’ prompt.
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3.7 Front communication port user interface


The front communication port is provided by a 9-pin female D-type connector located under
the bottom hinged cover. It provides EIA(RS)232 serial data communication and is intended
for use with a PC locally to the relay (up to 15m distance) as shown in figure 8. This port
supports the Courier communication protocol only. Courier is the communication language
developed by AREVA T&D Protection & Control to allow communication with its range of
protection relays. The front port is particularly designed for use with the relay settings
program MiCOM S1 which is a Windows 95/NT based software package.

MiCOM relay

Laptop

SK 2

25 pin
download/monitor port

9 pin
Battery front comms port Serial communication port
(COM 1 or COM 2)
Serial data connector
(up to 15m) P0107ENa

FIGURE 8 - FRONT PORT CONNECTION


The relay is a Data Communication Equipment (DCE) device. Thus the pin connections of
the relay’s 9-pin front port are as follows:
Pin no. 2 Tx Transmit data
Pin no. 3 Rx Receive data
Pin no. 5 0V Zero volts common
Introduction P44x/EN IT/F65

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None of the other pins are connected in the relay. The relay should be connected to the
serial port of a PC, usually called COM1 or COM2. PCs are normally Data Terminal
Equipment (DTE) devices which have a serial port pin connection as below (if in doubt check
your PC manual):
25 Way 9 Way
Pin no. 3 2 Rx Receive data
Pin no. 2 3 Tx Transmit data
Pin no. 7 5 0V Zero volts common
For successful data communication, the Tx pin on the relay must be connected to the Rx pin
on the PC, and the Rx pin on the relay must be connected to the Tx pin on the PC, as shown
in figure 9. Therefore, providing that the PC is a DTE with pin connections as given above, a
‘straight through’ serial connector is required, i.e. one that connects pin 2 to pin 2, pin 3 to
pin 3, and pin 5 to pin 5. Note that a common cause of difficulty with serial data
communication is connecting Tx to Tx and Rx to Rx. This could happen if a ‘cross-over’
serial connector is used, i.e. one that connects pin 2 to pin 3, and pin 3 to pin 2, or if the PC
has the same pin configuration as the relay.

PC
MiCOM relay

DCE Serial data connector DTE


Pin 2 Tx Pin 2 Tx
Pin 3 Rx Pin 3 Rx
Pin 5 0V Pin 5 0V

Note: PC connection shown assuming 9 Way serial port


P0108ENa

FIGURE 9 - PC – RELAY SIGNAL CONNECTION


Having made the physical connection from the relay to the PC, the PC’s communication
settings must be configured to match those of the relay. The relay’s communication settings
for the front port are fixed as shown in the table below:

Protocol Courier
Baud rate 19,200 bits/s
Courier address 1
Message format 11 bit - 1 start bit, 8 data bits, 1 parity bit (even parity), 1 stop bit

The inactivity timer for the front port is set at 15 minutes. This controls how long the relay will
maintain its level of password access on the front port. If no messages are received on the
front port for 15 minutes then any password access level that has been enabled will be
revoked.
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3.8 Rear communication port user interface


The rear port can support one of four communication protocols (Courier, Modbus, DNP3.0,
IEC 60870-5-103), the choice of which must be made when the relay is ordered. The rear
communication port is provided by a 3-terminal screw connector located on the back of the
relay. See Appendix B for details of the connection terminals. The rear port provides K-
Bus/EIA(RS)485 serial data communication and is intended for use with a permanently-wired
connection to a remote control centre. Of the three connections, two are for the signal
connection, and the other is for the earth shield of the cable. When the K-Bus option is
selected for the rear port, the two signal connections are not polarity conscious, however for
Modbus, IEC 60870-5-103 and DNP3.0 care must be taken to observe the correct polarity.
The protocol provided by the relay is indicated in the relay menu in the ‘Communications’
column. Using the keypad and LCD, firstly check that the ‘Comms settings’ cell in the
‘Configuration’ column is set to ‘Visible’, then move to the ‘Communications’ column. The
first cell down the column shows the communication protocol being used by the rear port.
3.8.1 Courier communication
Courier is the communication language developed by AREVA T&D Energy Automation &
Information to allow remote interrogation of its range of protection relays.
Courier works on a master/slave basis where the slave units contain information in the form
of a database, and respond with information from the database when it is requested by a
master unit.
The relay is a slave unit which is designed to be used with a Courier master unit such as
MiCOM S1, MiCOM S10, PAS&T or a SCADA system.
MiCOM S1 is a Windows NT4.0/95 compatible software package which is specifically
designed for setting changes with the relay.
To use the rear port to communicate with a PC-based master station using Courier, a KITZ
K-Bus to EIA(RS)232 protocol converter is required. This unit is available from AREVA T&D
Energy Automation & Information. A typical connection arrangement is shown in figure 10.
For more detailed information on other possible connection arrangements refer to the
manual for the Courier master station software and the manual for the KITZ protocol
converter. Each spur of the K-Bus twisted pair wiring can be up to 1000m in length and have
up to 32 relays connected to it.
Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 21/36

Twisted pair 'K-Bus' RS485 communications link

MiCOM relay MiCOM relay MiCOM relay

RS232 K-Bus

PC

KITZ protocol
PC serial port converter

Modem

Public switched Courier master station


telephone network eg. substation control room

PC

Modem

Remote Courier master station


eg. area control center P0109ENa

FIGURE 10 - REMOTE COMMUNICATION CONNECTION ARRANGEMENTS


Having made the physical connection to the relay, the relay’s communication settings must
be configured. To do this use the keypad and LCD user interface.
In the relay menu firstly check that the ‘Comms settings’ cell in the ‘Configuration’ column is
set to ‘Visible’, then move to the ‘Communications’ column. Only two settings apply to the
rear port using Courier, the relay’s address and the inactivity timer. Synchronous
communication is used at a fixed baud rate of 64kbits/s.
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Move down the ‘Communications’ column from the column heading to the first cell down
which indicates the communication protocol:

Protocol
Courier

The next cell down the column controls the address of the relay:

Remote address
1

Since up to 32 relays can be connected to one K-bus spur, as indicated in figure 10, it is
necessary for each relay to have a unique address so that messages from the master control
station are accepted by one relay only. Courier uses an integer number between 0 and 254
for the relay address which is set with this cell. It is important that no two relays have the
same Courier address. The Courier address is then used by the master station to
communicate with the relay.
The next cell down controls the inactivity timer:

Inactivity timer
10.00 mins

The inactivity timer controls how long the relay will wait without receiving any messages on
the rear port before it reverts to its default state, including revoking any password access
that was enabled. For the rear port this can be set between 1 and 30 minutes.
Note that protection and disturbance recorder settings that are modified using an on-line
editor such as PAS&T must be confirmed with a write to the ‘Save changes’ cell of the
‘Configuration’ column. Off-line editors such as MiCOM S1 do not require this action for the
setting changes to take effect.
3.8.2 Modbus communication
Modbus is a master/slave communication protocol which can be used for network control. In
a similar fashion to Courier, the system works by the master device initiating all actions and
the slave devices, (the relays), responding to the master by supplying the requested data or
by taking the requested action.
Modbus communication is achieved via a twisted pair connection to the rear port and can be
used over a distance of 1000m with up to 32 slave devices.
To use the rear port with Modbus communication, the relay’s communication settings must
be configured. To do this use the keypad and LCD user interface.
In the relay menu firstly check that the ‘Comms settings’ cell in the ‘Configuration’ column is
set to ‘Visible’, then move to the ‘Communications’ column.
Four settings apply to the rear port using Modbus which are described below. Move down
the ‘Communications’ column from the column heading to the first cell down which indicates
the communication protocol:

Protocol
Modbus

The next cell down controls the Modbus address of the relay:

Modbus address
23

Up to 32 relays can be connected to one Modbus spur, and therefore it is necessary for each
relay to have a unique address so that messages from the master control station are
accepted by one relay only. Modbus uses an integer number between 1 and 247 for the
relay address. It is important that no two relays have the same Modbus address. The
Modbus address is then used by the master station to communicate with the relay.
Introduction P44x/EN IT/F65

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The next cell down controls the inactivity timer:

Inactivity timer
10.00 mins

The inactivity timer controls how long the relay will wait without receiving any messages on
the rear port before it reverts to its default state, including revoking any password access
that was enabled. For the rear port this can be set between 1 and 30 minutes.
The next cell down the column controls the baud rate to be used:

Baud rate
9600 bits/s

Modbus communication is asynchronous. Three baud rates are supported by the relay,
‘9600 bits/s’, ‘19200 bits/s’ and ‘38400 bits/s’. It is important that whatever baud rate is
selected on the relay is the same as that set on the Modbus master station.
The next cell down controls the parity format used in the data frames:

Parity
None

The parity can be set to be one of ‘None’, ‘Odd’ or ‘Even’. It is important that whatever parity
format is selected on the relay is the same as that set on the Modbus master station.
3.8.3 IEC 60870-5 CS 103 communication
The IEC specification IEC 60870-5-103: Telecontrol Equipment and Systems, Part 5:
Transmission Protocols Section 103 defines the use of standards IEC 60870-5-1 to
IEC 60870-5-5 to perform communication with protection equipment. The standard
configuration for the IEC 60870-5-103 protocol is to use a twisted pair connection over
distances up to 1000m. As an option for IEC 60870-5-103, the rear port can be specified to
use a fibre optic connection for direct connection to a master station. The relay operates as a
slave in the system, responding to commands from a master station. The method of
communication uses standardised messages which are based on the VDEW communication
protocol.
To use the rear port with IEC 60870-5-103 communication, the relay’s communication
settings must be configured. To do this use the keypad and LCD user interface. In the relay
menu firstly check that the ‘Comms settings’ cell in the ‘Configuration’ column is set to
‘Visible’, then move to the ‘Communications’ column. Four settings apply to the rear port
using IEC 60870-5-103 which are described below. Move down the ‘Communications’
column from the column heading to the first cell which indicates the communication protocol:

Protocol
IEC 60870-5-103

The next cell down controls the IEC 60870-5-103 address of the relay:

Remote address
162

Up to 32 relays can be connected to one IEC 60870-5-103 spur, and therefore it is


necessary for each relay to have a unique address so that messages from the master control
station are accepted by one relay only. IEC 60870-5-103 uses an integer number between 0
and 254 for the relay address. It is important that no two relays have the same
IEC 60870-5-103 address. The IEC 60870-5-103 address is then used by the master station
to communicate with the relay.
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The next cell down the column controls the baud rate to be used:

Baud rate
9600 bits/s

IEC 60870-5-103 communication is asynchronous. Two baud rates are supported by the
relay, ‘9600 bits/s’ and ‘19200 bits/s’. It is important that whatever baud rate is selected on
the relay is the same as that set on the IEC 60870-5-103 master station.
The next cell down controls the period between IEC 60870-5-103 measurements:

Measure’t period
30.00 s

The IEC 60870-5-103 protocol allows the relay to supply measurements at regular intervals.
The interval between measurements is controlled by this cell, and can be set between 1 and
60 seconds.
The next cell down the column controls the physical media used for the communication:

Physical link
EIA(RS)485

The default setting is to select the electrical EIA(RS)485 connection. If the optional fibre optic
connectors are fitted to the relay, then this setting can be changed to ‘Fibre optic’.
The next cell down can be used to define the primary function type for this interface, where
this is not explicitly defined for the application by the IEC 60870-5-103 protocol*.

Function type
226

3.8.4 DNP 3.0 Communication


The DNP 3.0 protocol is defined and administered by the DNP User Group. Information
about the user group, DNP 3.0 in general and protocol specifications can be found on their
website: www.dnp.org
The relay operates as a DNP 3.0 slave and supports subset level 2 of the protocol plus some
of the features from level 3. DNP 3.0 communication is achieved via a twisted pair
connection to the rear port and can be used over a distance of 1000m with up to 32 slave
devices.
To use the rear port with DNP 3.0 communication, the relay’s communication settings must
be configured. To do this use the keypad and LCD user interface. In the relay menu firstly
check that the ‘Comms setting’ cell in the ‘Configuration’ column is set to ‘Visible’, then move
to the ‘Communications’ column. Four settings apply to the rear port using DNP 3.0, which
are described below. Move down the ‘Communications’ column from the column heading to
the first cell which indicates the communications protocol:

Protocol
DNP 3.0

The next cell controls the DNP 3.0 address of the relay:

DNP 3.0 address


232

Upto 32 relays can be connected to one DNP 3.0 spur, and therefore it is necessary for each
relay to have a unique address so that messages from the master control station are
accepted by only one relay. DNP 3.0 uses a decimal number between 1 and 65519 for the
relay address. It is important that no two relays have the same DNP 3.0 address.
The DNP 3.0 address is then used by the master station to communicate with the relay.
Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 25/36

The next cell down the column controls the baud rate to be used:

Baud rate
9600 bits/s

DNP 3.0 communication is asynchronous. Six baud rates are supported by the relay
‘1200bits/s’, ‘2400bits/s’, ‘4800bits/s’, ’9600bits/s’, ‘19200bits/s’ and ‘38400bits/s’. It is
important that whatever baud rate is selected on the relay is the same as that set on the
DNP 3.0 master station.
The next cell down the column controls the parity format used in the data frames:

Parity
None

The parity can be set to be one of ‘None’, ‘Odd’ or ‘Even’. It is important that whatever parity
format is selected on the relay is the same as that set on the DNP 3.0 master station.
The next cell down the column sets the time synchronisation request from the master by the
relay:

Time Synch
Enabled

The time synch can be set to either enabled or disabled. If enabled it allows the DNP 3.0
master to synchronise the time.
3.8.5 IEC61850 Ethernet Interface (since version C3.X)
3.8.5.1 Introduction
IEC 61850 is the international standard for Ethernet-based communication in substations. It
enables integration of all protection, control, measurement and monitoring functions within a
substation, and additionally provides the means for interlocking and inter-tripping. It
combines the convenience of Ethernet with the security which is essential in substations
today.
The MiCOM protection relays can integrate with the PACiS substation control systems, to
complete AREVA T&D Automation's offer of a full IEC 61850 solution for the substation. The
majority of MiCOM Px3x and Px4x relay types can be supplied with Ethernet, in addition to
traditional serial protocols. Relays which have already been delivered with UCA2 on Ethernet
can be easily upgraded to IEC 61850.
3.8.5.2 What is IEC 61850?
IEC 61850 is an international standard, comprising 14 parts, which defines a communication
architecture for substations.
The standard defines and offers much more than just a protocol. It provides:

• standardized models for IEDs and other equipment within the substation

• standardized communication services (the methods used to access and exchange


data)

• standardized formats for configuration files

• peer-to-peer (e.g. relay to relay) communication


The standard includes mapping of data onto Ethernet. Using Ethernet in the substation offers
many advantages, most significantly including:

• high-speed data rates (currently 100 Mbits/s, rather than 10’s of kbits/s or less used by
most serial protocols)

• multiple masters (called “clients”)

• Ethernet is an open standard in every-day use


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AREVA T&D has been involved in the Working Groups which formed the standard, building
on experience gained with UCA2, the predecessor of IEC 61850.
3.8.5.2.1 Interoperability
A major benefit of IEC 61850 is interoperability. IEC 61850 standardizes the data model of
substation IEDs. This responds to the utilities’ desire of having easier integration for different
vendors’ products, i.e. interoperability. It means that data is accessed in the same manner in
different IEDs from either the same or different IED vendors, even though, for example, the
protection algorithms of different vendors’ relay types remain different.
When a device is described as IEC 61850-compliant, this does not mean that it is
interchangeable, but does mean that it is interoperable. You cannot simply replace one
product with another, however the terminology is pre-defined and anyone with prior
knowledge of IEC 61850 should be able very quickly integrate a new device without the need
for mapping of all of the new data. IEC 61850 will inevitably bring improved substation
communications and interoperability, at a lower cost to the end user.
3.8.5.2.2 The data model
To ease understanding, the data model of any IEC 61850 IED can be viewed as a hierarchy
of information. The categories and naming of this information is standardized in the IEC
61850 specification.

P1445ENb

FIGURE 11 - DATA MODEL LAYERS IN IEC 61850


The levels of this hierarchy can be described as follows:
Physical Device Identifies the actual IED within a system. Typically the
device’s name or IP address can be used (for example
Feeder_1 or 10.0.0.2).
Logical Device– Identifies groups of related Logical Nodes within the
Physical Device. For the MiCOM relays, 5 Logical
Devices exist: Control, Measurements, Protection,
Records, System.
Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 27/36

Wrapper/Logical Node Instance Identifies the major functional areas within the IEC 61850
data model. Either 3 or 6 characters are used as a prefix to
define the functional group (wrapper) while the actual
functionality is identified by a 4 character Logical Node
name suffixed by an instance number. For example,
XCBR1 (circuit breaker), MMXU1 (measurements),
FrqPTOF2 (overfrequency protection, stage 2).
Data Object This next layer is used to identify the type of data you will
be presented with. For example, Pos (position) of Logical
Node type XCBR.
Data Attribute This is the actual data (measurement value, status,
description, etc.). For example, stVal (status value)
indicating actual position of circuit breaker for Data Object
type Pos of Logical Node type XCBR.
3.8.5.3 IEC 61850 in MiCOM relays
IEC 61850 is implemented in MiCOM relays by use of a separate Ethernet card. This card
manages the majority of the IEC 61850 implementation and data transfer to avoid any
impact on the performance of the protection.
In order to communicate with an IEC 61850 IED on Ethernet, it is necessary only to know its
IP address. This can then be configured into either:

• An IEC 61850 “client” (or master), for example a PACiS computer (MiCOM C264) or
HMI, or

• An “MMS browser”, with which the full data model can be retrieved from the IED,
without any prior knowledge.
3.8.5.3.1 Capability
The IEC 61850 interface provides the following capabilities:
1. Read access to measurements
2. All measurands are presented using the measurement Logical Nodes, in the
‘Measurements’ Logical Device. Reported measurement values are refreshed by the
relay once per second, in line with the relay user interface.
3. Generation of unbuffered reports on change of status/measurement
4. Unbuffered reports, when enabled, report any change of state in statuses and/or
measurements (according to deadband settings).
5. Support for time synchronization over an Ethernet link
6. Time synchronization is supported using SNTP (Simple Network Time Protocol); this
protocol is used to synchronize the internal real time clock of the relays.
7. GOOSE peer-to-peer communication
8. GOOSE communications of statuses are included as part of the IEC 61850
implementation. Please see section 6.6 for more details.
9. Disturbance record extraction
10. Extraction of disturbance records, by file transfer, is supported by the MiCOM relays.
The record is extracted as an ASCII format COMTRADE file.
Setting changes (e.g. of protection settings) are not supported in the current IEC 61850
implementation. In order to keep this process as simple as possible, such setting changes
are done using MiCOM S1 Settings & Records program. This can be done as previously
using the front port serial connection of the relay, or now optionally over the Ethernet
connection if preferred.
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3.8.5.4 IEC 61850 and Ethernet settings


The settings which allow support for the IEC 61850 implementation are located in the
following columns of the relay settings database:

• Communication column for Ethernet settings

• GOOSE Publisher column

• GOOSE Subscriber column

• Date & Time column for SNTP time synchronization settings.


Settings for the Ethernet card are prefixed with “NIC” (Network Interface Card) in the MiCOM
relay user interface.

3.8.5.5 Network connectivity


Note: This section presumes a prior knowledge of IP addressing and related
topics. Further details on this topic may be found on the Internet
(search for IP Configuration) and in numerous relevant books.
When configuring the relay for operation on a network, a unique IP address must be set on
the relay. If the assigned IP address is duplicated elsewhere on the same network, the
remote communications will operate in an indeterminate way. However, the relay will check
for a conflict on every IP configuration change and at power up. An alarm will be raised if an
IP conflict is detected. Similarly, a relay set with an invalid IP configuration (or factory
default) will also cause an alarm to be displayed (Bad TCP/IP Cfg.).
The relay can be configured to accept data from networks other than the local network by
using the ‘NIC Gateway’ setting.
3.8.5.6 The data model of MiCOM relays
The data model naming adopted in the Px30 and Px40 relays has been standardized for
consistency. Hence the Logical Nodes are allocated to one of the five Logical Devices, as
appropriate, and the wrapper names used to instantiate Logical Nodes are consistent
between Px30 and Px40 relays.
The data model is described in the Model Implementation Conformance Statement (MICS)
document, which is available separately. The MICS document provides lists of Logical
Device definitions, Logical Node definitions, Common Data Class and Attribute definitions,
Enumeration definitions, and MMS data type conversions. It generally follows the format
used in Parts 7-3 and 7-4 of the IEC 61850 standard.
3.8.5.7 The communication services of MiCOM relays
The IEC 61850 communication services which are implemented in the Px30 and Px40 relays
are described in the Protocol Implementation Conformance Statement (PICS) document,
which is available separately. The PICS document provides the Abstract Communication
Service Interface (ACSI) conformance statements as defined in Annex A of Part 7-2 of the
IEC 61850 standard.
Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 29/36

3.8.5.8 Peer-to-peer (GSE) communications


The implementation of IEC 61850 Generic Substation Event (GSE) sets the way for cheaper
and faster inter-relay communications. The generic substation event model provides the
possibility for a fast and reliable system-wide distribution of input and output data values.
The generic substation event model is based on the concept of an autonomous
decentralization, providing an efficient method allowing the simultaneous delivery of the
same generic substation event information to more than one physical device through the use
of multicast services.
The use of multicast messaging means that IEC 61850 GOOSE uses a publisher-subscriber
system to transfer information around the network*. When a device detects a change in one
of its monitored status points it publishes (i.e. sends) a new message. Any device that is
interested in the information subscribes (i.e. listens) to the data it contains.
Note: * Multicast messages cannot be routed across networks without
specialized equipment.
Each new message is re-transmitted at user-configurable intervals until the maximum
interval is reached, in order to overcome possible corruption due to interference, and
collisions. In practice, the parameters which control the message transmission cannot be
calculated. Time must be allocated to the testing of GSE schemes before or during
commissioning, in just the same way a hardwired scheme must be tested.
3.8.5.9 Scope
MiCOM relays support the Generic Object Oriented Substation Event (GOOSE).
Each subscribed GOOSE input in a message from an external IED is mapped to a GOOSE
Virtual Input in the receiving IED. A maximum of 32 GOOSE Virtual Inputs are available in
the PSL.
All GOOSE outputs from the MiCOM relay are BOOLEAN values derived directly from
GOOSE Virtual Outputs. A maximum of 32 GOOSE Virtual Outputs are available in the PSL.
All IEC GOOSE messages will be received but only the following data types can be decoded
and mapped to a GOOSE Virtual Input:

Name Type
BSTR2 Basic data type
BOOL Basic data type
INT8 Basic data type
INT16 Basic data type
INT32 Basic data type
UINT8 Basic data type
UINT16 Basic data type
UINT32 Basic data type
SPS (Single Point Status) Common data class
DPS (Double Point Status) Common data class
INS (Integer Status) Common data class

A single GOOSE message will be published by each Px40 IED.


For further information about the GOOSE implementation in MiCOM relays, refer to the PICS
document(s) for the relevant relay type(s).
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3.8.5.10 IEC 61850 GOOSE Configuration


The configuration settings for IEC 61850 GOOSE are split into two columns in the relay user
interface:

• GOOSE PUBLISHER, which is required to build and send a GOOSE message

• GOOSE SUBSCRIBER, which is required to receive, decode and map GOOSE


messages.
The IEC 61850 GOOSE messaging is configured by way of the min. cycle time, max. cycle
time, increment and message life period. Due to the risk of incorrect operation, specific care
should be taken to ensure that the configuration is correct.
Subscribing is done for each Virtual Input using the settings in the GOOSE SUBSCRIBER
column.
3.8.5.11 Ethernet hardware
The optional Ethernet card (ZN0012) has one variant which supports the IEC 61850
implementation, a card with RJ45 and SC (100Mb card). This allows the following
connection media:
10BASE-T – 10Mb Copper Connection (RJ45 type)
100BASE-TX – 100Mb Copper Connection (RJ45 type)
100BASE-FX – 100Mb Fiber Optic Connection (SC type)
This card is fitted into Slot A of the relay, which is the optional communications slot.
When using IEC 61850 communications through the Ethernet card, the rear EIA(RS)485 and
front EIA(RS)232 ports are also available for simultaneous use, using the Courier protocol.
Each Ethernet card has a unique ‘Mac address’ used for Ethernet communications, this is
also printed on the rear of the card, alongside the Ethernet sockets.
When using copper Ethernet, it is important to use Shielded Twisted Pair (STP) or Foil
Twisted Pair (FTP) cables, to shield the IEC 61850 communications against electromagnetic
interference. The RJ45 connector at each end of the cable must be shielded, and the cable
shield must be connected to this RJ45 connector shield, so that the shield is grounded to the
relay case. Both the cable and the RJ45 connector at each end of the cable must be
Category 5 minimum, as specified by the IEC 61850 standard. It is recommended that each
copper Ethernet cable is limited to a maximum length of 3 meters and confined within one
bay/cubicle.
3.8.5.12 Ethernet disconnection
IEC 61850 ‘Associations’ are unique and made to the relay between the client (master) and
server (IEC 61850 device). In the event that the Ethernet is disconnected, such associations
are lost, and will need to be re-established by the client. The TCP_KEEPALIVE function is
implemented in the relay to monitor each association, and terminate any which are no longer
active.
3.8.5.13 Loss of power
The relay allows the re-establishment of associations by the client without a negative impact
on the relay’s operation after having its power removed. As the relay acts as a server in this
process, the client must request the association. Uncommitted settings are cancelled when
power is lost, and reports requested by connected clients are reset and must be re-enabled
by the client when it next creates the new association to the relay.
Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 31/36

3.9 Second rear Communication Port

“K-Bus Application” example


Master 1 Master 2
st
Note: 1 RP could be any chosen protocol, 2nd RP is always Courier To SCADA

CENTRAL PROCESSOR
POWER SUPPLY
modem modem R.T.U.
EIA(RS)232 K-Bus KITZ102 EIA(RS)232

EIA(RS)232 1st RP (Courier)


port 1

Master 3 KITZ K-Bus


201 port 3

EIA(RS)232
port 0
2nd RP (Courier)

3 Master stations configuration: SCADA (Px40 1st RP) via


KITZ101, K-Bus 2nd rear port via remote PC and S/S PC
P2084ENA

FIGURE 12 - SECOND REAR PORT K-BUS APPLICATION

“EIA(RS)485 Application” example


Master 2
Master 1
Note: 1st RP could be any chosen protocol,nd2 RP is always Courier To SCADA

CE
PO NT
WE RAL
R PR
SU OC
ESS
modem modem PPL
Y OR R.T.U.
EIA232 EIA232 EIA232
EIA485
CK222

1st RP (Modbus / IEC103)


KITZ202/4

CK222

EIA485
Front port

EIA232
2nd RP (EIA485)
MiCOMS1

2 Master stations configuration: SCADA (Px40 1st RP) via CK222, EIA485 2nd
rear port via remote PC, Px40 & Px30 mixture plus front access P2085ENA

FIGURE 13 - SECOND REAR PORT EIA(RS)485 EXAMPLE


P44x/EN IT/F65 Introduction

Page 32/36 MiCOM P441/P442 & P444

“EIA(RS)232 Application” example


Master 2
Master 1
Note: 1st RP could be any chosen protocol, 2nd RP is always Courier To SCADA

CENTRAL PROCESSOR
POWER SUPPLY
EIA232
modem modem R.T.U.
EIA232 EIA232
EIA485 CK222

EIA232
splitter 1st RP (Modbus / DNP/ IEC103)
EIA232
15 ax
m
m

Front port

EIA232
2nd RP (EIA232)
MiCOMS1

2 Master stations configuration: SCADA (Px40 1st RP) via CK222, EIA232 2nd rear P2086ENA

port via remote PC, max EIA232 bus distance 15m, PC local front/rear access

FIGURE 14 - SECOND REAR PORT EIA(RS)232 EXAMPLE

For relays with Courier, Modbus, IEC60870-5-103 or DNP3 protocol on the first rear
communications port there is the hardware option of a second rear communications port,
(P442 and P444 only) which will run the Courier language. This can be used over one of
three physical links: twisted pair K-Bus (non polarity sensitive), twisted pair EIA(RS)485
(connection polarity sensitive) or EIA(RS)232.
The settings for this port are located immediately below the ones for the first port as
described in previous sections of this chapter. Move down the settings unit the following sub
heading is displayed.

REAR PORT2 (RP2)

The next cell down indicates the language, which is fixed at Courier for RP2.

RP2 Protocol
Courier

The next cell down indicates the status of the hardware, e.g.

RP2 Card Status


EIA232 OK

The next cell allows for selection of the port configuration.

RP2 Port Config


EIA232

The port can be configured for EIA(RS)232, EIA(RS)485 or K-Bus.


In the case of EIA(RS)232 and EIA(RS)485 the next cell selects the communication mode.

RP2 Comms Mode


IEC60870 FT1.2
The choice is either IEC60870 FT1.2 for normal operation with 11-bit modems, or 10-bit no
parity.
Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 33/36

The next cell down controls the comms port address.

RP2 Address
255

Since up to 32 relays can be connected to one K-bus spur, as indicated in figure 10, it is
necessary for each relay to have a unique address so that messages from the master control
station are accepted by one relay only. Courier uses a integer number between 0 and 254
for the relay address which is set with this cell. It is important that no two relays have the
same Courier address. The Courier address is then use by the master station to
communicate with the relay.
The next cell down controls how long the relay will wait without receiving any massages on
the rear port before it reverts to its default state, including revoking any password access
that was enabled. For the rear port this can be set between 1 and 30 minutes.
In the case of EIA(RS)232 and EIA(RS)485 the next cell down controls the baud rate. For K-
Bus the baud rate is fixed at 64kbit/second between the relay and the KITZ interface at the
end of the relay spur.

RP2 Baud Rate


19200

Courier communications is asynchronous. Three baud rates are supported by the relay,
‘9600 bits/s’, ‘19200 bits/s’ and ‘38400 bits/s’.
3.10 InterMiCOM Teleprotection (since C2.X)
InterMiCOM is a protection signalling system that is an optional feature of MiCOM Px40
relays and provides a cost-effective alternative to discrete carrier equipment. InterMiCOM
sends eight signals between the two relays in the scheme, with each signal having a
selectable operation mode to provide an optimal combination of speed, security and
dependability in accordance with the application. Once the information is received, it may be
assigned in the Programmable Scheme Logic to any function as specified by the user’s
application.
3.10.1 Physical Connections
InterMiCOM on the Px40 relays is implemented using a 9-pin ‘D’ type female connector
(labelled SK5) located at the bottom of the 2nd Rear communication board. This connector
on the Px40 relay is wired in DTE (Data Terminating Equipment) mode, as indicated below:

Pin Acronym InterMiCOM Usage


1 DCD “Data Carrier Detect” is only used when connecting to modems
otherwise this should be tied high by connecting to terminal 4.
2 RxD “Receive Data”
3 TxD “Transmit Data”
4 DTR “Data Terminal Ready” is permanently tied high by the hardware
since InterMiCOM requires a permanently open communication
channel.
5 GND “Signal Ground”
6 Not used -
7 RTS “Ready To Send” is permanently tied high by the hardware since
InterMiCOM requires a permanently open communication channel.
8 Not used -
9 Not used -

Depending upon whether a direct or modem connection between the two relays in the
scheme is being used, the required pin connections are described below.
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3.10.2 Direct Connection


The EIA(RS)232 protocol only allows for short transmission distances due to the signalling
levels used and therefore the connection shown below is limited to less than 15m. However,
this may be extended by introducing suitable EIA(RS)232 to fibre optic convertors, such as
the AREVA T&D CILI203. Depending upon the type of convertor and fibre used, direct
communication over a few kilometres can easily be achieved.

This type of connection should also be used when connecting to multiplexers which have no
ability to control the DCD line.
3.10.3 Modem Connection
For long distance communication, modems may be used in which the case the following
connections should be made.

This type of connection should also be used when connecting to multiplexers which have the
ability to control the DCD line.
With this type of connection it should be noted that the maximum distance between the Px40
relay and the modem should be 15m, and that a baud rate suitable for the communications
path used should be selected. See P443/EN AP for setting guidelines.
3.10.4 Settings
The settings necessary for the implementation of InterMiCOM are contained within two
columns of the relay menu structure. The first column entitled “INTERMICOM COMMS”
contains all the information to configure the communication channel and also contains the
channel statistics and diagnostic facilities. The second column entitled “INTERMICOM
CONF” selects the format of each signal and its fallback operation mode. The following table
shows the relay menu for the communication channel including the available setting ranges
and factory defaults.
Introduction P44x/EN IT/F65

MiCOM P441/P442 & P444 Page 35/36

Setting Range
Menu Text Default Setting Step Size
Min Max
INTERMICOM COMMS
IM Output Status 00000000
IM Input Status 00000000
Source Address 1 1 10 1
Receive Address 2 1 10 1
Baud Rate 9600 600 / 1200 / 2400 / 4800 / 9600 / 19200
Remote Device Px40 Px30 / Px40
Ch Statistics Invisible Invisible / Visible
Reset Statistics No No / Yes
Ch Diagnostics Invisible Invisible / Visible
Loopback Mode Disabled Disabled / Internal / External
Test pattern 11111111 00000000 11111111 -

3.11 Ethernet Rear Port (option) – since version C2.X


If UCA2.0 is chosen when the relay is ordered, the relay is fitted with an Ethernet interface
card.
See P44x/EN UC/E44 section 4.4 for more detail of the Ethernet hardware.
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BLANK PAGE
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444

RELAY DESCRIPTION
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 1/48

CONTENT

1. RELAY SYSTEM OVERVIEW 5


1.1 Hardware overview 5
1.1.1 Power supply module 5
1.1.2 Main processor board 5
1.1.3 Co-processor board 5
1.1.4 Input module 5
1.1.5 Input and output boards 5
1.1.6 IRIG-B board (P442 and P444 only) 5
1.1.7 Second rear comms and InterMiCOM board (optional since version C2.X) 7
1.1.8 Ethernet board (from version C2.0 up to C2.7) 7
1.2 Software overview 7
1.2.1 Real-time operating system 7
1.2.2 System services software 7
1.2.3 Platform software 7
1.2.4 Protection & control software 7
1.2.5 Disturbance Recorder 8

2. HARDWARE MODULES 9
2.1 Processor board 9
2.2 Co-processor board 9
2.3 Internal communication buses 9
2.4 Input module 10
2.4.1 Transformer board 10
2.4.2 Input board 10
2.4.3 Universal opto isolated logic inputs 10
2.5 Power supply module (including output relays) 12
2.5.1 Power supply board (including RS485 communication interface) 12
2.5.2 Output relay board 13
2.6 IRIG-B board (P442 and P444 only) 13
2.7 2nd rear communications board 14
2.8 Ethernet board 14
2.9 Mechanical layout 15

3. RELAY SOFTWARE 16
3.1 Real-time operating system 16
3.2 System services software 16
3.3 Platform software 17
3.3.1 Record logging 17
3.3.2 Settings database 17
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3.3.3 Database interface 17


3.4 Protection and control software 18
3.4.1 Overview - protection and control scheduling 18
3.4.2 Signal processing 18
3.4.3 Programmable scheme logic 19
3.4.4 Event and Fault Recording 19
3.4.5 Disturbance recorder 19
3.4.6 Fault locator 20

4. DISTANCE ALGORITHMS 21
4.1 Distance and Resistance Measurement 21
4.1.1 Phase-to-earth loop impedance 23
4.1.2 Impedance measurement algorithms work with instantaneous values (current and voltage).24
4.1.3 Phase-to-phase loop impedance 24
4.2 "Delta" Algorithms 25
4.2.1 Fault Modelling 25
4.2.2 Detecting a Transition 27
4.2.3 Confirmation 30
4.2.4 Directional Decision 30
4.2.5 Phase Selection 31
4.2.6 Summary 31
4.3 "Conventional" Algorithms 32
4.3.1 Convergence Analysis 33
4.3.2 Start-Up 33
4.3.3 Phase Selection 34
4.3.4 Directional Decision 35
4.3.5 Directional Decision during SOTF/TOR (Switch On To Fault/Trip On Reclose) 35
4.4 Faulted Zone Decision 36
4.5 Tripping Logic 37
4.6 Fault Locator 38
4.6.1 Selecting the fault location data 39
4.6.2 Processing algorithms 39
4.7 Power swing detection 40
4.7.1 Power swing detection 40
4.7.2 Line in one pole open condition (during single-pole trip) 41
4.7.3 Conditions for isolating lines 41
4.7.4 Tripping logic 41
4.7.5 Fault Detection after Single-phase Tripping (single-pole-open condition) 42
4.8 Double Circuit Lines 42
4.9 DEF Protection Against High Resistance Ground Faults 44
4.9.1 High Resistance Ground Fault Detection 44
4.9.2 Directional determination 44
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 3/48

4.9.3 Phase selection 44


4.9.4 Tripping Logic 45
4.9.5 SBEF – Stand-By earth fault (not communication-aided) 46

5. SELF TESTING & DIAGNOSTICS 47


5.1 Start-up self-testing 47
5.1.1 System boot 47
5.1.2 Initialisation software 47
5.1.3 Platform software initialisation & monitoring 48
5.2 Continuous self-testing 48
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BLANK PAGE
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 5/48

1. RELAY SYSTEM OVERVIEW


1.1 Hardware overview
The relay hardware is based on a modular design whereby the relay is made up of several
modules which are drawn from a standard range. Some modules are essential while others
are optional depending on the user’s requirements.
The different modules that can be present in the relay are as follows:
1.1.1 Power supply module
The power supply module provides a power supply to all of the other modules in the relay, at
three different voltage levels. The power supply board also provides the RS485 electrical
connection for the rear communication port. On a second board the power supply module
contains relays which provide the output contacts.
1.1.2 Main processor board
The processor board performs most of the calculations for the relay (fixed and
programmable scheme logic, protection functions other than distance protection) and
controls the operation of all other modules within the relay. The processor board also
contains and controls the user interfaces (LCD, LEDs, keypad and communication
interfaces).
1.1.3 Co-processor board
The co-processor board manages the acquisition of analogue quantities, filters them and
calculates the thresholds used by the protection functions. It also processes the distance
algorithms.
1.1.4 Input module
The input module converts the information contained in the analogue and digital input signals
into a format suitable for the co-processor board. The standard input module consists of two
boards: a transformer board to provide electrical isolation and a main input board which
provides analogue to digital conversion and the isolated digital inputs.
1.1.5 Input and output boards

P441 P442 P444


(1) (1)
Opto-inputs 8 x UNI 16 x UNI 24 x UNI(1)
Relay outputs 6 N/O 9 N/O 24 N/O
8 C/O 12 C/O 8 C/O
(1)
Universal voltage range opto inputs N/O – normally open
C/O – change over
Since version C2.X:

• P444 could manage in option : 46 outputs

• Fast outputs can be ordered following the cortec reference


(available in the Technical Data Sheet document)

• See also the hysteresis values of the optos in the §6.2 from chapter AP
1.1.6 IRIG-B board (P442 and P444 only)
This board, which is optional, can be used where an IRIG-B signal is available to provide an
accurate time reference for the relay. There is also an option on this board to specify a fibre
optic rear communication port, for use with IEC60870 communication only.
All modules are connected by a parallel data and address bus which allows the processor
board to send and receive information to and from the other modules as required. There is
also a separate serial data bus for conveying sample data from the input module to the
processor. figure 1 shows the modules of the relay and the flow of information between
them.
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Present values CPU code & data,


Alarm, event, fault, Default settings &
of all setting
disturbance & parameters, language text,
settings database data
maintenance record software code

Battery Flash
backed-up E²PROM SRAM
EPROM
SRAM

Front LCD panel RS232 Front comms port

CPU
Parallel test port

LEDs Main processor board

Timing data
Comms between
IRIG-B signal main & coprocessor CPU code & data
IRIG-B board boards
optional
Fibre optic
rear comms
port optional
FPGA SRAM

CPU
Serial data bus
(sample data)

Coprocessor board

Power supply, rear comms


data, output relay status Parallel data bus
Digital input values
Output relay contacts (x14 or x21 or x32)

Digital inputs (x8 or x16 or x24)


Opto-isolated
Output relays

inputs

Relay board ADC Input board

Power supply (3 voltages),


rear comms data Analogue input signals

Power supply board Transformer board

Power Watchdog Field Rear RS485


Current & voltage inputs (6 to 8)
supply contacts voltage communication port

P3026ENb

FIGURE 1 - RELAY MODULES AND INFORMATION FLOW


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MiCOM P441/P442 & P444 Page 7/48

1.1.7 Second rear comms and InterMiCOM board (optional since version C2.X)
The optional second rear port is designed typically for dial-up modem access by protection
engineers/operators, when the main port is reserved for SCADA traffic. It is denoted “SK4”.
Communication is via one of three physical links: K-Bus, EIA(RS)485 or EIA(RS)232. The
port supports full local or remote protection and control access by MiCOM S1 software. The
second rear port is also available with an on board IRIG-B input.
The optional board also houses port “SK5”, the InterMiCOM teleprotection port. InterMiCOM
permits end-to-end signalling with a remote P440 relay, for example in a distance protection
channel aided scheme. Port SK5 has an EIA(RS)232 connection, allowing connection to a
MODEM, or compatible multiplexers.
1.1.8 Ethernet board (from version C2.0 up to C2.7)
This is a mandatory board for UCA2.0 enabled relays. It provides network connectivity
through either copper or fibre media at rates of 10Mb/s or 100Mb/s. This board, the IRIG-B
board and second rear comms board are mutually exclusive as they both utilise slot A within
the relay case.
1.2 Software overview
The software for the relay can be conceptually split into four elements: the real-time
operating system, the system services software, the platform software and the protection
and control software. These four elements are not distinguishable to the user, and are all
processed by the same processor board. The distinction between the four parts of the
software is made purely for the purpose of explanation here:
1.2.1 Real-time operating system
The real time operating system is used to provide a framework for the different parts of the
relay’s software to operate within. To this end the software is split into tasks. The real-time
operating system is responsible for scheduling the processing of these tasks such that they
are carried out in the time available and in the desired order of priority.
The operating system is also responsible for the exchange of information between tasks, in
the form of messages.
1.2.2 System services software
The system services software provides the low-level control of the relay hardware. For
example, the system services software controls the boot of the relay’s software from the non-
volatile flash EPROM memory at power-on, and provides driver software for the user
interface via the LCD and keypad, and via the serial communication ports. The system
services software provides an interface layer between the control of the relay’s hardware and
the rest of the relay software.
1.2.3 Platform software
The platform software deals with the management of the relay settings, the user interfaces
and logging of event, alarm, fault and maintenance records. All of the relay settings are
stored in a database within the relay which provides direct compatibility with Courier
communications. For all other interfaces (i.e. the front panel keypad and LCD interface,
Modbus and IEC60870-5-103) the platform software converts the information from the
database into the format required. The platform software notifies the protection & control
software of all setting changes and logs data as specified by the protection & control
software.
1.2.4 Protection & control software
The protection and control software performs the calculations for all of the protection
algorithms of the relay. This includes digital signal processing such as Fourier filtering and
ancillary tasks such as the measurements. The protection & control software interfaces with
the platform software for settings changes and logging of records, and with the system
services software for acquisition of sample data and access to output relays and digital opto-
isolated inputs.
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1.2.5 Disturbance Recorder


The disturbance recorder software is passed the sampled analogue values and logic signals
from the protection and control software. This software compresses the data to allow a
greater number of records to be stored. The platform software interfaces to the disturbance
recorder to allow extraction of the stored records.
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 9/48

2. HARDWARE MODULES
The relay is based on a modular hardware design where each module performs a separate
function within the relay operation. This section describes the functional operation of the
various hardware modules.
2.1 Processor board
The relay is based around a TMS320VC33-150MHz (peak speed) floating point, 32-bit digital
signal processor (DSP) operating at a clock frequency of 75MHz. This processor performs all
of the calculations for the relay, including the protection functions, control of the data
communication and user interfaces including the operation of the LCD, keypad and LEDs.
The processor board is located directly behind the relay’s front panel which allows the LCD
and LEDs to be mounted on the processor board along with the front panel communication
ports. These comprise the 9-pin D-connector for RS232 serial communications (e.g. using
MiCOM S1 and Courier communications) and the 25-pin D-connector relay test port for
parallel communication. All serial communication is handled using a two-channel 85C30
serial communications controller (SCC).
The memory provided on the main processor board is split into two categories, volatile and
non-volatile: the volatile memory is fast access (zero wait state) SRAM which is used for the
storage and execution of the processor software, and data storage as required during the
processor’s calculations. The non-volatile memory is sub-divided into 3 groups: 2MB of flash
memory for non-volatile storage of software code and text together with default settings,
256kB of battery backed-up SRAM for the storage of disturbance, event, fault and
maintenance record data and 32kB of E2PROM memory for the storage of configuration
data, including the present setting values.
2.2 Co-processor board
A second processor board is used in the relay for the processing of the distance protection
algorithms. The processor used on the second board is the same as that used on the main
processor board. The second processor board has provision for fast access (zero wait state)
SRAM for use with both program and data memory storage. This memory can be accessed
by the main processor board via the parallel bus, and this route is used at power-on to
download the software for the second processor from the flash memory on the main
processor board. Further communication between the two processor boards is achieved via
interrupts and the shared SRAM. The serial bus carrying the sample data is also connected
to the co-processor board, using the processor’s built-in serial port, as on the main processor
board.
From software version B1.0, coprocessor board works at 150MHz.
2.3 Internal communication buses
The relay has two internal buses for the communication of data between different modules.
The main bus is a parallel link which is part of a 64-way ribbon cable. The ribbon cable
carries the data and address bus signals in addition to control signals and all power supply
lines. Operation of the bus is driven by the main processor board which operates as a
master while all other modules within the relay are slaves.
The second bus is a serial link which is used exclusively for communicating the digital
sample values from the input module to the main processor board. The DSP processor has a
built-in serial port which is used to read the sample data from the serial bus. The serial bus is
also carried on the 64-way ribbon cable.
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2.4 Input module


The input module provides the interface between the relay processor board and the
analogue and digital signals coming into the relay. The input module consist of two PCBs;
the main input board and a transformer board. The P441, P442 and P444 relays provide
three voltage inputs and four current inputs. They also provide an additional voltage input for
the check sync function.
2.4.1 Transformer board
The transformer board holds up to four voltage transformers (VTs) and up to five current
transformers (CTs). The current inputs will accept either 1A or 5A nominal current (menu and
wiring options) and the nominal voltage input is 110V.
The transformers are used both to step-down the currents and voltages to levels appropriate
to the relay’s electronic circuitry and to provide effective isolation between the relay and the
power system. The connection arrangements of both the current and voltage transformer
secondaries provide differential input signals to the main input board to reduce noise.
2.4.2 Input board
The main input board is shown as a block diagram in figure 2. It provides the circuitry for the
digital input signals and the analogue-to-digital conversion for the analogue signals. Hence it
takes the differential analogue signals from the CTs and VTs on the transformer board(s),
converts these to digital samples and transmits the samples to the processor board via the
serial data bus. On the input board the analogue signals are passed through an anti-alias
filter before being multiplexed into a single analogue-to-digital converter chip. The A – D
converter provides 16-bit resolution and a serial data stream output. The digital input signals
are opto isolated on this board to prevent excessive voltages on these inputs causing
damage to the relay's internal circuitry.
2.4.3 Universal opto isolated logic inputs
The P441, P442 and P444 relays are fitted with universal opto isolated logic inputs that can
be programmed for the nominal battery voltage of the circuit of which they are a part. i.e.
thereby allowing different voltages for different circuits e.g. signalling, tripping. They
nominally provide a Logic 1 or On value for Voltages ≥80% of the set voltage and a Logic 0
or Off value for the voltages ≤60% of the set voltage. This lower value eliminates fleeting
pickups that may occur during a battery earth fault, when stray capacitance may present up
to 50% of battery voltage across an input.
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MiCOM P441/P442 & P444 Page 11/48

Up to 5 current inputs 3/4 voltage inputs

Up to 5
CT

CT

VT

VT
4
Transformer board
Input board

Up to 5

Anti-alias filters
single

single
single

single
Diffn

Diffn
Diffn

Diffn
to

to
to

to
4
Up to 5
pass

pass
filter

filter
pass

pass
filter

filter
Low

Low
Low

Low
4
16:1
Multiplexer

isolator
Optical
Noise
filter
Buffer

8 digital inputs
16-bit
ADC
Sample
control

Interface
Calibration

Serial
E²PROM

isolator
Optical
Noise
filter
processor board
Trigger from

data bus
Serial sample
Parallel bus

Buffer

Parallel bus
P3027ENa

FIGURE 2 - MAIN INPUT BOARD


The other function of the input board is to read the state of the signals present on the digital
inputs and present this to the parallel data bus for processing. The input board holds 8
optical isolators for the connection of up to eight digital input signals. The opto-isolators are
used with the digital signals for the same reason as the transformers with the analogue
signals; to isolate the relay’s electronics from the power system environment. A 48V ‘field
voltage’ supply is provided at the back of the relay for use in driving the digital opto-inputs.
The input board provides some hardware filtering of the digital signals to remove unwanted
noise before buffering the signals for reading on the parallel data bus. Depending on the
relay model, more than 8 digital input signals can be accepted by the relay. This is achieved
by the use of an additional opto-board which contains the same provision for 8 isolated
digital inputs as the main input board, but does not contain any of the circuits for analogue
signals which are provided on the main input board.
Each input also has selectable filtering which can be utilised (available since version C2.0).
Duals optos are available since C2.0 (hysteresis value selectable between 2 ranges).
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The P440 series relays are fitted with universal opto isolated logic inputs that can be
programmed for the nominal battery voltage of the circuit of which they are a part i.e. thereby
allowing different voltages for different circuits e.g. signalling, tripping. From software version
C2.x they can also be programmed as Standard 60% - 80% or 50% - 70% to satisfy different
operating constraints.
Threshold levels are as follows:

Nominal Standard 60% - 80% 50% - 70%


battery voltage
No Operation Operation No Operation Operation
(Vdc)
(logic 0) Vdc (logic 1) Vdc (logic 0) Vdc (logic 1) Vdc
24 / 27 <16.2 >19.2 <12.0 >16.8
30 / 34 <20.4 >24.0 <15.0 >21.0
48 / 54 <32.4 >38.4 <24.0 >33.6
110 / 125 <75.0 >88.0 <55.0 >77.0
220 / 250 <150.0 >176.0 <110 >154

This lower value eliminates fleeting pickups that may occur during a battery earth fault, when
stray capacitance may present up to 50% of battery voltage across an input.
Each input also has selectable filtering which can be utilised. This allows use of a pre-set
filter of ½ cycle which renders the input immune to induced noise on the wiring: although this
method is secure it can be slow, particularly for intertripping. This can be improved by
switching off the ½ cycle filter in which case one of the following methods to reduce ac noise
should be considered. The first method is to use double pole switching on the input, the
second is to use screened twisted cable on the input circuit.
2.5 Power supply module (including output relays)
The power supply module contains two PCBs, one for the power supply unit itself and the
other for the output relays. The power supply board also contains the input and output
hardware for the rear communication port which provides an RS485 communication
interface.
2.5.1 Power supply board (including RS485 communication interface)
One of three different configurations of the power supply board can be fitted to the relay.
This will be specified at the time of order and depends on the nature of the supply voltage
that will be connected to the relay. The three options are shown in table 1 below.

Nominal dc range Nominal ac range


24 – 48 V dc only
48 – 110 V 30 – 100 V rms
110 – 250 V 100 – 240 V rms

TABLE 1 - POWER SUPPLY OPTIONS


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MiCOM P441/P442 & P444 Page 13/48

The output from all versions of the power supply module are used to provide isolated power
supply rails to all of the other modules within the relay. Three voltage levels are used within
the relay, 5.1V for all of the digital circuits, •16V for the analogue electronics, e.g. on the
input board, and 22V for driving the output relay coils. All power supply voltages including
the 0V earth line are distributed around the relay via the 64-way ribbon cable. One further
voltage level is provided by the power supply board which is the field voltage of 48V. This is
brought out to terminals on the back of the relay so that it can be used to drive the optically
isolated digital inputs.
The two other functions provided by the power supply board are the RS485 communications
interface and the watchdog contacts for the relay. The RS485 interface is used with the
relay’s rear communication port to provide communication using one of either Courier,
Modbus or IEC60870-5-103 protocols. The RS485 hardware supports half-duplex
communication and provides optical isolation of the serial data being transmitted and
received.
All internal communication of data from the power supply board is conducted via the output
relay board which is connected to the parallel bus.
The watchdog facility provides two output relay contacts, one normally open and one
normally closed which are driven by the processor board. These are provided to give an
indication that the relay is in a healthy state.
2.5.2 Output relay board
The output relay board holds seven relays, three with normally open contacts and four with
changeover contacts. The relays are driven from the 22V power supply line. The relays’ state
is written to or read from using the parallel data bus. Depending on the relay model seven
additional output contacts may be provided, through the use of up to three extra relay
boards.
Since version D1.X: ‘High break’ output relay boards consisting of four normally open output
contacts are available as an option.
2.6 IRIG-B board (P442 and P444 only)
The IRIG-B board is an order option which can be fitted to provide an accurate timing
reference for the relay. This can be used wherever an IRIG-B signal is available. The IRIG-B
signal is connected to the board via a BNC connector on the back of the relay. The timing
information is used to synchronise the relay’s internal real-time clock to an accuracy of 1ms.
The internal clock is then used for the time tagging of the event, fault maintenance and
disturbance records.
The IRIG-B board can also be specified with a fibre optic transmitter/receiver which can be
used for the rear communication port instead of the RS485 electrical connection (IEC60870
only).
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Page 14/48 MiCOM P441/P442 & P444

2.7 2nd rear communications board


For relays with Courier, Modbus, IEC60870-5-103 or DNP3 protocol on the first rear
communications port there is the hardware option of a second rear communications
port,which will run the Courier language. This can be used over one of three physical links:
twisted pair K-Bus (non polarity sensitive), twisted pair EIA(RS)485 (connection polarity
sensitive) or EIA(RS)232.
The second rear comms board and IRIG-B board are mutually exclusive since they use the
same hardware slot. For this reason two versions of second rear comms board are available;
one with an IRIG-B input and one without. The physical layout of the second rear comms
board is shown in Figure 3.

Optional IRIG-B Language:

Courier always

Courier Port Physical links:


SK4 EIA 232
(EIA232/EIA485)
or
EIA 485 (polarity sensitive)
or
Not used (EIA232) SK5 K-Bus (non polarity sensitive)

Physical links are s/w selectable


P2083ENa

FIGURE 3 - REAR COMMS. PORT


2.8 Ethernet board
The ethernet board, presently only available for UCA2 communication variant relays,
supports network connections of the following type:

− 10BASE-T

− 10BASE-FL

− 100BASE-TX

− 100BASE-FX
For all copper based network connections an RJ45 style connector is supported. 10Mbit/s
fibre network connections use an ST style connector while 100Mbit/s connections use the
SC style fibre connection. An extra processor, a Motorola PPC, and memory block is fitted to
the ethernet card that is responsible for running all the network related functions such as
TCP/IP/OSI as supplied by VxWorks and the UCA2/MMS server as supplied by Sisco inc.
The extra memory block also holds the UCA2 data model supported by the relay.
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 15/48

2.9 Mechanical layout


The case materials of the relay are constructed from pre-finished steel which has a
conductive covering of aluminium and zinc. This provides good earthing at all joints giving a
low impedance path to earth which is essential for performance in the presence of external
noise. The boards and modules use a multi-point earthing strategy to improve the immunity
to external noise and minimise the effect of circuit noise. Ground planes are used on boards
to reduce impedance paths and spring clips are used to ground the module metalwork.
Heavy duty terminal blocks are used at the rear of the relay for the current and voltage signal
connections. Medium duty terminal blocks are used for the digital logic input signals, the
output relay contacts, the power supply and the rear communication port. A BNC connector
is used for the optional IRIG-B signal. 9-pin and 25-pin female D-connectors are used at the
front of the relay for data communication.
Inside the relay the PCBs plug into the connector blocks at the rear, and can be removed
from the front of the relay only. The connector blocks to the relay’s CT inputs are provided
with internal shorting links inside the relay which will automatically short the current
transformer circuits before they are broken when the board is removed.
The front panel consists of a membrane keypad with tactile dome keys, an LCD and 12
LEDs mounted on an aluminium backing plate.
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Page 16/48 MiCOM P441/P442 & P444

3. RELAY SOFTWARE
The relay software was introduced in the overview of the relay at the start of this chapter.
The software can be considered to be made up of four sections:

• the real-time operating system

• the system services software

• the platform software

• the protection & control software


This section describes in detail the latter two of these, the platform software and the
protection & control software, which between them control the functional behaviour of the
relay. Figure 4 shows the structure of the relay software.

Protection & Control


Software Measurements and event, fault
& disturbance records
Disturbance
recorder task

Programables & Protection task


fixed scheme logic
Platform Software

Fourier signal Protection Event, fault, Remote


processing disturbance, communications
algorithms Protection & control settings maintenance record interface -
logging CEI 60870-5-103

Supervisor task

Settings Remote
database communications
interface - Modbus

Sampling function -
copies samples into Control of output contacts and Front panel Local & Remote
2 cycle buffer programmable LEDs interface - LCD & communications
keypad interface - Courier

Sample data & digital Control of interfaces to keypad, LCD,


logic input LEDs, front & rear comms ports.
Self-checking maintenance records

System services software

Relay hardware

P0128ENa

FIGURE 4 - RELAY SOFTWARE STRUCTURE


3.1 Real-time operating system
The software is split into tasks; the real-time operating system is used to schedule the
processing of the tasks to ensure that they are processed in the time available and in the
desired order of priority. The operating system is also responsible in part for controlling the
communication between the software tasks through the use of operating system messages.
3.2 System services software
As shown in Figure 4, the system services software provides the interface between the
relay’s hardware and the higher-level functionality of the platform software and the protection
& control software. For example, the system services software provides drivers for items
such as the LCD display, the keypad and the remote communication ports, and controls the
boot of the processor and downloading of the processor code into SRAM from non-volatile
flash EPROM at power up.
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MiCOM P441/P442 & P444 Page 17/48

3.3 Platform software


The platform software has three main functions:

• to control the logging of records that are generated by the protection software,
including alarms and event, fault, and maintenance records.

• to store and maintain a database of all of the relay’s settings in non-volatile memory.

• to provide the internal interface between the settings database and each of the relay’s
user interfaces, i.e. the front panel interface and the front and rear communication
ports, using whichever communication protocol has been specified (Courier, Modbus,
IEC60870-5-103, DNP3).
3.3.1 Record logging
The logging function is provided to store all alarms, events, faults and maintenance records.
The records for all of these incidents are logged in battery backed-up SRAM in order to
provide a non-volatile log of what has happened. The relay maintains four logs: one each for
up to 96 alarms (with 64 application alarms: 32 alarms in alarm status 1 and another group
of 32 alarms in alarm status 2 and 32 alarms platform (see GC annex for mapping), 250
event records, 5 fault records and 5 maintenance records. The logs are maintained such that
the oldest record is overwritten with the newest record. The logging function can be initiated
from the protection software or the platform software is responsible for logging of a
maintenance record in the event of a relay failure. This includes errors that have been
detected by the platform software itself or error that are detected by either the system
services or the protection software function. See also the section on supervision and
diagnostics later in this chapter.
3.3.2 Settings database
The settings database contains all of the settings and data for the relay, including the
protection, disturbance recorder and control & support settings. The settings are maintained
in non-volatile E2PROM memory. The platform software’s management of the settings
database includes the responsibility of ensuring that only one user interface modifies the
settings of the database at any one time. This feature is employed to avoid conflict between
different parts of the software during a setting change. For changes to protection settings
and disturbance recorder settings, the platform software operates a ‘scratchpad’ in SRAM
memory. This allows a number of setting changes to be applied to the protection elements,
disturbance recorder and saved in the database in E2PROM. (See also chapter 1 on the
user interface). If a setting change affects the protection & control task, the database advises
it of the new values.
3.3.3 Database interface
The other function of the platform software is to implement the relay’s internal interface
between the database and each of the relay’s user interfaces. The database of settings and
measurements must be accessible from all of the relay’s user interfaces to allow read and
modify operations. The platform software presents the data in the appropriate format for
each user interface.
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3.4 Protection and control software


The protection and control software task is responsible for processing all of the protection
elements and measurement functions of the relay. To achieve this it has to communicate
with both the system services software and the platform software as well as organise its own
operations. The protection software has the highest priority of any of the software tasks in
the relay in order to provide the fastest possible protection response. The protection &
control software has a supervisor task which controls the start-up of the task and deals with
the exchange of messages between the task and the platform software.
3.4.1 Overview - protection and control scheduling
After initialisation at start-up, the protection and control task is suspended until there are
sufficient samples available for it to process. The acquisition of samples is controlled by a
‘sampling function’ which is called by the system services software and takes each set of
new samples from the input module and stores them in a two-cycle buffer. The protection
and control software resumes execution when the number of unprocessed samples in the
buffer reaches a certain number. For the P441-442-444 distance protection relay, the
protection task is executed twice per cycle, i.e. after every 24 samples for the sample rate of
48 samples per power cycle used by the relay. The protection and control software is
suspended again when all of its processing on a set of samples is complete. This allows
operations by other software tasks to take place.
3.4.2 Signal processing
The sampling function provides filtering of the digital input signals from the opto-isolators and
frequency tracking of the analogue signals. The digital inputs are checked against their
previous value over a period of half a cycle. Hence a change in the state of one of the inputs
must be maintained over at least half a cycle before it is registered with the protection and
control software.

12 Samples per Cycle

I Transformation & LOW PASS ONE-SAMPLE If


ANTI-ALIASING SUB-SAMPLE
Low Pass Filter FILTER FILTER DELAY 1/2
A-D
DFT
Converter I'f
FIR SUB-SAMPLE
DERIVATOR 1/2
24 Samples
per Cycle
V Transformation & ANTI-ALIASING LOW PASS ONE-SAMPLE SUB-SAMPLE V
Low Pass Filter FILTER FILTER DELAY 1/2

FIR = Impulse Finite Response Filter


P3029ENa

FIGURE 5 - SIGNAL ACQUISITION AND PROCESSING


The frequency tracking of the analogue input signals is achieved by a recursive Fourier
algorithm which is applied to one of the input signals, and works by detecting a change in the
measured signal’s phase angle. The calculated value of the frequency is used to modify the
sample rate being used by the input module so as to achieve a constant sample rate of 24
samples per cycle of the power waveform. The value of the frequency is also stored for use
by the protection and control task.
When the protection and control task is re-started by the sampling function, it calculates the
Fourier components for the analogue signals. The Fourier components are calculated using
a one-cycle, 24-sample Discrete Fourier Transform (DFT). The DFT is always calculated
using the last cycle of samples from the 2-cycle buffer, i.e. the most recent data is used. The
DFT used in this way extracts the power frequency fundamental component from the signal
and produces the magnitude and phase angle of the fundamental in rectangular component
format. The DFT provides an accurate measurement of the fundamental frequency
component, and effective filtering of harmonic frequencies and noise. This performance is
achieved in conjunction with the relay input module which provides hardware anti-alias
filtering to attenuate frequencies above the half sample rate, and frequency tracking to
maintain a sample rate of 24 samples per cycle. The Fourier components of the input current
and voltage signals are stored in memory so that they can be accessed by all of the
protection elements’ algorithms. The samples from the input module are also used in an
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 19/48

unprocessed form by the disturbance recorder for waveform recording and to calculate true
rms values of current, voltage and power for metering purposes.
3.4.3 Programmable scheme logic
The purpose of the programmable scheme logic (PSL) is to allow the relay user to configure
an individual protection scheme to suit their own particular application. This is achieved
through the use of programmable logic gates and delay timers.
The input to the PSL is any combination of the status of the digital input signals from the
opto-isolators on the input board, the outputs of the protection elements, e.g. protection
starts and trips, and the outputs of the fixed protection scheme logic. The fixed scheme logic
provides the relay’s standard protection schemes. The PSL itself consists of software logic
gates and timers. The logic gates can be programmed to perform a range of different logic
functions and can accept any number of inputs. The timers are used either to create a
programmable delay, and/or to condition the logic outputs, e.g. to create a pulse of fixed
duration on the output regardless of the length of the pulse on the input. The outputs of the
PSL are the LEDs on the front panel of the relay and the output contacts at the rear.
The execution of the PSL logic is event driven; the logic is processed whenever any of its
inputs change, for example as a result of a change in one of the digital input signals or a trip
output from a protection element. Also, only the part of the PSL logic that is affected by the
particular input change that has occurred is processed. This reduces the amount of
processing time that is used by the PSL. The protection and control software updates the
logic delay timers and checks for a change in the PSL input signals every time it runs.
This system provides flexibility for the user to create their own scheme logic design.
However, it also means that the PSL can be configured into a very complex system, and
because of this setting of the PSL is implemented through the PC support MiCOM S1.
3.4.4 Event and Fault Recording
A change in any digital input signal or protection element output signal causes an event
record to be created. When this happens, the protection and control task sends a message
to the supervisor task to indicate that an event is available to be processed and writes the
event data to a fast buffer in SRAM which is controlled by the supervisor task. When the
supervisor task receives either an event or fault record message, it instructs the platform
software to create the appropriate log in battery backed-up SRAM. The operation of the
record logging to battery backed-up SRAM is slower than the supervisor’s buffer. This
means that the protection software is not delayed waiting for the records to be logged by the
platform software. However, in the rare case when a large number of records to be logged
are created in a short period of time, it is possible that some will be lost if the supervisor’s
buffer is full before the platform software is able to create a new log in battery backed-up
SRAM. If this occurs then an event is logged to indicate this loss of information.
3.4.5 Disturbance recorder
The disturbance recorder operates as a separate task from the protection and control task. It
can record the waveforms for up to 8 analogue channels and the values of up to 32 digital
signals. The recording time is user selectable up to a maximum of 10 seconds. The
disturbance recorder is supplied with data by the protection and control task once per cycle.
The disturbance recorder collates the data that it receives into the required length
disturbance record. With Kbus or ModBus comms, the relay attempts to limit the demands
on memory space by saving the analogue data in compressed format whenever possible.
This is done by detecting changes in the analogue input signals and compressing the
recording of the waveform when it is in a steady-state condition. The compressed records
can be decompressed by MiCOM S1 which can also store the data in COMTRADE format,
thus allowing the use of other packages to view the recorded data. With IEC based protocols
no data compression is done.
Since C1.x, the disturbance files are no more compressed. This version manage the
disturbance task with 24 samples by cycle (since B1x & C1x). Maximum storage capacity is
equivalent to 28 events of 3 s which gives a maximum duration of 84 s.
P44x/EN HW/F65 Relay Description

Page 20/48 MiCOM P441/P442 & P444

3.4.6 Fault locator


The fault locator task is also separate from the protection and control task. The fault locator
is invoked by the protection and control task when a fault is detected. The fault locator uses
a 12-cycle buffer of the analogue input signals and returns the calculated location of the fault
to the protection and control task wich includes it in the fault record for the fault. When the
fault record is complete (i.e. includes the fault location), the protection and control task can
send a message to the supervisor task to log the fault record.
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 21/48

4. DISTANCE ALGORITHMS
The operation is based on the combined use of two types of algorithms:

• "Deltas" algorithms using the superimposed current and voltage values that are
characteristic of a fault. These are used for phase selection and directional
determination. The fault distance calculation is performed by the "impedance
measurement algorithms ” using Gauss-Seidel.

• "Conventional" algorithms using the impedance values measured while the fault
occurs. These are also used for phase selection and directional determination.
The fault distance calculation is performed by the "impedance measurement
algorithms." Using Gauss-Seidel.
The "Deltas" algorithms have priority over the "Conventional" algorithms if they have been
started first. The latter are actuated only if "Deltas" algorithms have not been able to clear
the fault within two cycles of its detection.
Since version C1.x no priority is managed any more. The fastest algorithm will give the
immediate directional decision.
4.1 Distance and Resistance Measurement
MiCOM P44x distance protection is a full scheme distance relay. To measure the distance
and apparent resistance of a fault, the following equation is solved on the loop with a fault:

IL I
R

Z SL (n).ZL (1-n).ZL Z SR

Relay Relay

VL VR

RF I F = I + I'
Local Remote
Source Source

V L = (ZL x I x D)+ RF x IF
= ((r +jx) x I x D) +RF x IF where
V L = local terminal relay voltage
r = line resistance (ohm/mile)
x = line reactance (ohm/mile)
IF = current flowing in the fault (I + I')
I = current measured by the relay on the faulty phase
= current flowing into the fault from local terminal
I' = current flowing into the fault from remote terminal
D = fault location (permile or km from relay to the fault)
R = fault resistance
R F = apparent fault resistance at relay; R x (1 + I'/I)

Assumed Fault Currents:


For Phase to Ground Faults (ex., A-N), IF = 3 I0 for 40ms, then IA after 40 ms
For Phase to Phase Faults (ex., A-B), IF =IAB
P3030ENa

FIGURE 6 - DISTANCE AND FAULT RESISTANCE ESTIMATION


The impedance measurements are used by High Speed and Conventional Algorithms.
P44x/EN HW/F65 Relay Description

Page 22/48 MiCOM P441/P442 & P444

The following describes how to solve the above equation (determination of D fault distance
and R fault resistance). The line model used will be the 3×3 matrix of the symmetrical line
impedance (resistive and inductive) of the three phases, and mutual values between phases.

⏐Raa + jω Laa Rab + jω Lab Rac + jω Lac⏐

⏐Rab + jω Lab Rbb + jω Lbb Rbc + jω Lbc⏐

⏐Rac + jω Lac Rbc + jω Lbc Rcc + jω Lcc⏐


Where:
Raa=Rbb=Rcc and Rab=Rbc=Rac
2.X1 + X0 X – X1
ωLaa = ωLbb = ωLcc = and ωLab = ωLbc = ωLac = 0
3 3

and
X1 : positive sequence reactance
X0 : zero-sequence reactance
The line model is obtained from the positive and zero-sequence impedance. The use of four
different residual compensation factor settings is permitted on the relay, as follows:
kZ1: residual compensation factor used to calculate faults in zones 1 and 1X.
kZ2: residual compensation factor used to calculate faults in zone 2.
kZp: residual compensation factor used to calculate faults in zone p.
kZ3/4: residual compensation factor used to calculate faults in zones 3 and 4.
The solutions "Dfault " and "Rfault " are obtained by solving the system of equations (one
equation per step of the calculation) using the Gauss Seidel method.
n n

∑ (VL.Ifault) − Dfault.(n − 1) . ∑ (Z1.Il.Ifault)


n0 n0
Rfault (n) = n

∑ (I
n0
fault )²

n n

∑ (VL.Z1.Il) − Rfault.(n − 1) . ∑ (Z1.Il.Ifault)


n0 n0
Dfault (n) = n

∑ (Z .I )²
n0
1 l

Rfault and Dfault are computed for every sample (24 samples per cycle).
NOTE: See also in § 4.3.1 the Rn and Dn (Xn) conditions of convergence.

With IL equal to Iα + k0 x 3I0 for phase-to-earth loop or IL equal to Iαβ for phase-to-phase
loop.
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 23/48

4.1.1 Phase-to-earth loop impedance

Zs i Z1 X / Phase R Fault / (1+k 0)


C

Z1
Zs iB Z1
Z Fault
Zs iA Z1

R / Phase
VCN VBN VAN kS ZS VA VB VC k0 Z1 RFault

Location
of Distance Relay
P3031ENa

FIGURE 7 - PHASE-TO-EARTH LOOP IMPEDANCE


The impedance model for the phase-to-earth loop is :

VαN = Z1 x Dfault x (Iα + k0 x 3I0) + Rfault x Ifault

with α = phase A, B or C
The (3I0) current is used for the first 40 milliseconds to model the fault current, thus
eliminating the load current before the circuit breakers are operated during the 40ms (one
pole tripping). After the 40ms, the phase current is used.
VAN = Z1.Dfault.(IA+k0 x 3I0)+Rfault.Ifault
VBN = Z1.Dfault.(IB+k0 X.3I0)+Rfault.Ifault
VCN = Z1.Dfault.(IC+k0 x 3I0)+Rfault.Ifault
x 5 k0 residual compensation factors
= 15 phase-to-earth loops are continuously monitored and computed for each samples.
P44x/EN HW/F65 Relay Description

Page 24/48 MiCOM P441/P442 & P444

VαN = Z1.Dfault.(Iα + k0.3I0) + Rfault.Ifault


Z0–Z1
VαN = Z1.Dfault.(Iα + .3I0) + Rfault.Ifault
3

R0–R1 + j.(X0–X1)
VαN = (R1+j.X1).Dfault.(Iα + .3I0) + Rfault.Ifault
3.(R1-jX1)

R0–R1 + j.(X0–X1)
VαN = (R1+j.X1).Dfault.Iα + .Dfault.3I0 + Rfault.Ifault
3

R0–R1 j.(X0–X1)
VαN = R1.Dfault.Iα + .Dfault.3I0 + j.X1. Dfault.Iα + .Dfault.3I0 + Rfault.Ifault
3 3

R0–R1 j.(X0–X1)
VαN = R1.Dfault.Iα + .Dfault.3I0 + j.X1. Dfault.Iα + .Dfault.(IA+IB+IC) + Rfault.Ifault
3 3

R0–R1 j.(X0+2.X1) j.(X0–X1)


VAN = R1.Dfault.IA + .Dfault.3I0 + .Dfault.IA + .Dfault.(IB+IC) + Rfault.Ifault
3 3 3

R0–R1 (X +2.X1) dI (X –X ) dI (X –X ) dI
VAN = R1.Dfault.IA + .Dfault.3I0 + 0 .Dfault. A + 0 1 .Dfault. B + 0 1 .Dfault. C + Rfault.Ifault
3 3 dt 3 dt 3 dt

R0–R1 dI dI dI
VAN = R1.Dfault.IA + .Dfault.3I0 + LAA.Dfault. A + LAB.Dfault. B + LAC.Dfault. C + Rfault.Ifault
3 dt dt dt

R0–R1 dI dI dI
VBN = R1.Dfault.IB + .Dfault.3I0 + LAB.Dfault. A + LBB.Dfault. B + LBC.Dfault. C + Rfault.Ifault
3 dt dt dt

R0–R1 dI dI dI
VCN = R1.Dfault.IC + .Dfault.3I0 + LAC.Dfault. A + LBC.Dfault. B + LCC.Dfault. C + Rfault.Ifault
3 dt dt dt

4.1.2 Impedance measurement algorithms work with instantaneous values (current and voltage).
Derivative current value (dI/dt) is obtained by using FIR filter.
4.1.3 Phase-to-phase loop impedance

Zs i Z1 X / Phase R Fault/ 2
C

Z1
Zs iB Z1

Z Fault
Zs iA Z1 RFault

R / Phase
VCN VBN VAN VC

Location
of Distance Relay P3032ENa

FIGURE 8 - PHASE-TO-PHASE LOOP IMPEDANCE


The impedance model for the phase-to-phase loop is :

Vαβ = ZL x Dfault x Iαβ + Rfault /2 x Ifault

with αβ = phase AB, BC or CA


Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 25/48

The model for the current Ifault circulating in the fault Iαβ.
VAB = 2Z1.Dfault.IAB + Rfault.Ifault
VBC = 2Z1.Dfault.IBC + Rfault.Ifault
VCA = 2Z1.Dfault.ICA + Rfault.Ifault
= 3 phase-to-phase loops are continuously monitored and computed for each sample.

Vαβ = 2Z1.Dfault.Iαβ + Rfault.Ifault

Vαβ = 2(R1 + j. X1).Dfault.Iαβ + Rfault.Ifault

Vαβ = 2R1.Dfault.Iαβ + 2j. X1.Dfault.Iαβ + Rfault.Ifault

dIαβ
Vαβ = 2R1.Dfault.Iαβ + 2X1.Dfault. + Rfault.Ifault
dt

dIA dI dI R
VAB = R1.Dfault.(IA – IB) + (LAA–LAB).Dfault. + (LAB–LBB).Dfault. B + (LAC–LBC).Dfault. C + fault.Ifault
dt dt dt 2

dIA dI dI R
VBC = R1.Dfault.(IB – IC) + (LAB–LAC).Dfault. + (LBB–LBC).Dfault. B + (LBC–LCC).Dfault. C + fault.Ifault
dt dt dt 2

dIA dI dI R
VCA = R1.Dfault.(IC – IA) + (LAC–LAA).Dfault. + (LBC–LAB).Dfault. B + (LCC–LAC).Dfault. C + fault.Ifault
dt dt dt 2

Impedance measurement algorithms work with instantaneous values (current and voltage).
Derivative current value (dI/dt) is obtained by using FIR filter.
4.2 "Delta" Algorithms
The patented high-speed algorithm has been proven with 10 years of service at all voltage
levels from MV to EHV networks. The P440 relay has ultimate reliability of phase selection
and directional decision far superior to standard distance techniques using superimposed
algorithms. These algorithms or delta algorithms are based on transient components and
they are used for the following functions which are computed in parallel:
Detection of the fault
By comparing the superimposed values to a threshold which is low enough to be crossed
when a fault occurs and high enough not to be crossed during normal switching outside of
the protected zones.
Establishing the fault direction
Only a fault can generate superimposed values; therefore, it is possible to determine
direction by measuring the transit direction of the superimposed energy.
Phase selection
As the superimposed values no longer include the load currents, it is possible to make high-
speed phase selection.
4.2.1 Fault Modelling
Consider a stable network status-the steady-state load flow prior to any start. When a fault
occurs, a new network is established. If there is no other modification, the differences
between the two networks (before and after the fault) are caused by the fault. The network
after the fault is equivalent to the sum of the values of the status before the fault and the
values characteristic of the fault. The fault acts as a source for the latter, and the sources
act as passive impedance in this case.
P44x/EN HW/F65 Relay Description

Page 26/48 MiCOM P441/P442 & P444

VR IR VR IR
R F R F

ZS ZL ZL ZR

Relay Relay
V F (prefault voltage)

V R = Voltage at Relay Location

I R = Current at Relay Location

Unfaulted Network (steady state prefault conditions)

VR' I R' VR' I R'


R F R F

ZS ZL ZL ZR

Relay Relay

RF
V R ' = Voltage at Relay Location

I R ' = Current at Relay Location

Faulted Network (steady state)

VR IR VR IR
R F R F

ZS ZL ZL ZR

Relay Relay

-V F

V R= Voltage at Relay Location

I R= Current at Relay Location RF

Fault Inception
P3033ENa

FIGURE 9 - PRE, FAULT AND FAULT INCEPTION VALUE


Network Status Monitoring
The network status is monitored continuously to determine whether the "Deltas" algorithms
may be used. To do so, the network must be "healthy," which is characterised by the
following:

• The circuit breaker(s) should be closed just prior to fault inception (2 cycles of healthy
pre-fault data should be stored) – the line is energised from one or both ends,

• The source characteristics should not change noticeably (there is no power swing or
out-of-step detected).

• Power System Frequency is being measured and tracked (48 samples per cycle at 50
or 60Hz).
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 27/48

No fault is detected :

• all nominal phase voltages are between 70% and 130% of the nominal value.

• the residual voltage (3V0) is less than 10% of the nominal value

• the residual current (3I0) is less than 10% of the nominal value + 3.3% of the
maximum load current flowing on the line
The measured loop impedance are outside the characteristic, when these requirements are
fulfilled, the superimposed values are used to determine the fault inception (start), faulty
phase selection and fault direction. The network is then said to be "healthy" before the fault
occurrence.
4.2.2 Detecting a Transition
In order to detect a transition, the MiCOM P441, P442 and P444 compares sampled current
and voltage values at the instant "t" with the values predicted from those stored in the
memory one period and two periods earlier.

2T
G
G = Current or Voltage

T
G(t)

G(t-2T) G(t-T)
Gp(t)

Time
t-2T t-T t

P3034ENa

FIGURE 10 - TRANSITION DETECTION


Gp(t) = 2G(t-T) - G(t-2T) where Gp(t) are the predicted values of either the sampled current
or voltage
A transition is detected on one of the current or voltage input values if the absolute value of
(G(t) - Gp(t)) exceeds a threshold of 0.2 x IN (nominal current) or 0.1 x UN / √3 = 0.1x VN
(nominal voltage)
With: U = line-to-line voltage

V = line-to-ground voltage = U / √3
G(t) = G(t) - Gp(t) is the transition value of the reading G.
The high-speed algorithms will be started if ∆U OR ∆I is detected on one sample.
P44x/EN HW/F65 Relay Description

Page 28/48 MiCOM P441/P442 & P444

Example: isolated AC fault


Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 29/48


P44x/EN HW/F65 Relay Description

Page 30/48 MiCOM P441/P442 & P444

4.2.3 Confirmation
In order to eliminate the transitions generated by possible operations or by high frequencies,
the transition detected over a succession of three sampled values is confirmed by checking
for at least one loop for which the two following conditions are met:

• ∆V > threshold V, where threshold V = 0.1 Un /√3 = 0.1 Vn


and

• ∆I > threshold l, where threshold I = 0.2 In.


The start-up of the high-speed algorithms will be confirmed if ∆U AND ∆I are detected on
three consecutive samples.
4.2.4 Directional Decision
The "Delta" detection of the fault direction is determined from the sign of the energy per
Phase for the transition values characterising the fault.

VR
IR
F

ZS ZL ZL ZR

Relay

-V F

V R = Voltage at Relay Location

I R = Current at Relay Location RF

Forward Fault
VR
IR
R

ZS ZL ZL ZR

Relay

-V F

V R = Voltage at Relay Location

I R = Current at Relay Location RF

Reverse Fault
P3035ENa

FIGURE 11 - DIRECTIONAL DETERMINATION USING SUPERIMPOSED VALUES


To do this, the following sum per phase is calculated:
ni ≥ n0 + 5 ni ≥ n0 + 5 ni ≥ n0 + 5
SA = ∑ (∆V
n0
ANi.∆IAi ) SB = ∑ (∆V
n0
BNi .∆IBi ) SC = ∑ (∆V
n0
CNi .∆ICi )

Where no is the instant at which the fault is detected, ni is the instant of the calculation and S
is the calculated transition energy.
If the fault is in the forward direction, then S i <0 (i = A, B or C phase).
If the fault is in the reverse direction, then S i >0.
The directional criterion is valid if
S >5 x (10% x Vn x 20% x In x cos (85° )
This sum is calculated on five successive samples.
RCA angle of the delta algorithms is equal to 60° (-30°) if the protected line is not serie
compensated (else RCA is equal to 0°).
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 31/48

4.2.5 Phase Selection


Phase selection is made on the basis of a comparison between the transition values for the
derivatives of currents IA, IB and IC:

∆I'A, ∆I'B, ∆I'C, ∆I'AB, ∆I'BC, ∆I'CA


NOTE: The derivatives of the currents are used to eliminate the effects of the
DC current component.
Hence:

ni ≥ n 0 + 4 ni ≥ n 0 + 4
SAN = ∑ (∆I ' A i )²
n0
SAB = ∑ (∆I '
n0
ABi )²

ni ≥ n 0 + 4 ni ≥ n 0 + 4
SBN = ∑ (∆I ' Bi )²
n0
SBC = ∑ (∆I '
n0
BC i )²

ni ≥ n 0 + 4 ni ≥ n 0 + 4
SCN = ∑ (∆I ' C i )²
n0
SCA = ∑ (∆I '
n0
CAi )²

The phase selection is valid if the sum (SAB+SBC+SCA) is higher than a threshold. This
sum is not valid if the positive sequence impedance on the source side is far higher than the
zero sequence impedance. In this case, the conventional algorithms are used to select the
faulted phase(s).
Sums on one-phase and two-phase loops are performed. The relative magnitudes of these
sums determine the faulted phase(s).
For examples, assume :
If SAB<SBC<SCA and If SAB<<SBC, the fault has had little effect on the loop A to B. If
SAN<SBN<SCN , the fault declared as single phase fault C.
If the fault is not detected as single-phase by the previous criterion, the fault conditions are
multi-phase.
If SAN<SBN<SCN and If SAB<<SBC, the fault is B to C.

If SAN<SBN<SCN and If SAB≈SBC≈SCA and if SAN≈SBN≈SCN, the fault is three-phase


(the fault occurs on the three phases).
4.2.6 Summary

A transition is detected if ∆I > 20% x In or ∆V >10% x Vn


Then three tasks are starting in parallel:

• Fault confirmation : ∆I and ∆V (3 consecutive samples)

• Faulty phase selection (4 consecutive samples)

• Fault directional decision (5 consecutive samples)


P44x/EN HW/F65 Relay Description

Page 32/48 MiCOM P441/P442 & P444

Confirmation
Phase selection
Start Directional decision

P3036ENa

FIGURE 12 - DELTAS ALGORITHMS


High speed algorithms are used only during the first 2 cycles following a fault detection.
4.3 "Conventional" Algorithms
These algorithms do not use the superimposed values but use the impedance values
measured under fault conditions. They are based on fault distance and resistance
measurements.
They are used in the following circumstances:

• The condition before the fault could not be modelled.

• The superimposed values are not exclusively generated by the fault.


This may be true if the following occurs:

• A breaker closing occurs during a fault. By SOTF, only the Conventional Algorithms
can be used as there are not 2 cycles of healthy network stored.

• The fault is not recent and so the operating conditions of the generators have
changed, or corrective action has been taken, i.e., opening the circuit breakers. This
occurs generally after the first trip. High Speed algorithms are used only during the
first 2 cycles after the fault detection.

• operating conditions are not linear.


The conventional algorithms are also suited to detect low current faults that do not have the
required changes in current and voltage for the "high-speed" (superimposed) algorithms.
Therefore, their use assures improved coverage.
The "Conventional" algorithms run continuously with "high-speed" algorithms. If the "high
speed" algorithms cannot declare faulted phase(s) and direction, the conventional algorithms
will.
NOTE: The distance measurement of the fault is taken on the loop selected
by the "Delta" or "conventional" phase selection algorithms. This
measurement uses the fault values which are computed by Gauss
Seidel method.
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 33/48

4.3.1 Convergence Analysis


This analysis is based on the measurements of distance and resistance of the fault. These
measurements are taken on each phase-ground and phase-phase loops (18 loops in total).
They determine the convergence of these loops within a parallelogram-shaped, start-up
characteristic.

L = line length in km or mile s


D3 = Z3/Zd x L = X3
D4 = Zd x L = X4 Dlim = X3

For multi phase fault :


θ = argument of Z1 (positive sequenceimpedance)
For single phase fault :

θ = argument of (2Z 1 + Z 01 )/3


1
for zone 1 d
θ2 = argument of (2Z 1 + Z 02)/3
-R R R
for zone 2, etc... lim lim

-D = X4
lim

P3037ENa

FIGURE 13 - START-UP CHARACTERISTIC


Let Rlim and Dlim be the limits of the starting characteristic.
The pair of solutions (Dfault (n-1), Rfault (n-1)) and (Dfault (n), Rfault (n)):

• Rfault (n-1)< Rlim, and Rfault (n)< Rlim, and Rfault (n-1) - Rfault (n)< 10% x Rlim

• Dfault (n-1)< Dlim and Dfault (n) < Dlim and Dfault (n-1) - Dfault (n) < 10% x Dlim
with Rlim being the resistance limit for the single and multi phase faults. This convergence is
dependent on the equations not being collinear thus allowing the terms in Dfault and Rfault
to be discriminated.
Theoretically, zone limits are Z3, Z4, +/- R3G-R4G or +/- R3Ph-R4Ph, if zones 3 and 4 are
enabled. The slope of the characteristic mimics the characteristic of the line.
To model the fault current:

• Phase-phase loops: the values (IA - IB), (IB - IC), or (IC - IA) are used.

• Phase-ground loops: (IA+ k0 x 3I0), (IB + k0 x 3I0), or (IC + k0 x 3I0) are used.
The results of these algorithms are mainly used as a backup; therefore, the circuit breaker
located at the other end is assumed to be open.
4.3.2 Start-Up
Start-up is initiated when at least one of the six measuring loops converges within the
characteristic (ZAN, ZBN, ZCN, ZAB, ZBC, ZCA).
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Page 34/48 MiCOM P441/P442 & P444

4.3.3 Phase Selection


If the fault currents are high enough with respect to the maximum load currents current-
based phase selection is used; if not, impedance-based phase selection is required.
Current Phase Selection
Amplitudes I'A, I'B, I'C are derived from the three measured phase currents IA, IB, IC. These
values are then compared to each other and to the two thresholds S1 and S2:

• First threshold is S1= 3 x I'X

• Second threshold is S2 = 5 x I'X


Example:
If I'A< I'B < I' C:

• If I'C > S2 and I'A > S1, the fault is three-phase.

• If I'C > S2, I'B > S1 and I'A < S1, the fault is two-phase, on phases B and C.

• If I'C > S2 and I'B < S1, the fault is single-phase, on phase C.

• If I'C < S2, the current phase selection cannot be used. Impedance phase selection
should then be used.
Impedance Phase Selection
Impedance phase selection is obtained by checking the convergence of the various
measuring loops within the start-up characteristic, as follows:

− T = Presence of zero-sequence voltage or current(Logical Information : 0 or 1).

− ZAN = Convergence within the characteristic of the loop A (Logical Information).

− ZBN = Convergence within the characteristic of the loop B (Logical Information).

− ZCN = Convergence within the characteristic of the loop C (Logical Information).

− ZAB = Convergence within the characteristic of the loop AB (Logical Information).

− ZBC = Convergence within the characteristic of the loop BC (Logical Information).

− ZCA = Convergence within the characteristic of the loop CA (Logical Information).


In addition, the following are also defined:

• RAN = ZAN x ZBC with ZBC = convergence within the characteristic of the loop
BC (Logical Information).

• RBN = ZBN x ZCA with ZCA = convergence within the characteristic of the loop
CA (Logical Information).

• RCN = ZCN x ZAB with ZAB = convergence within the characteristic of the loop
AB (Logical Information).

• RAB = ZAB x ZCN with ZCN = convergence within the characteristic of the loop
C (Logical Information).

• RBC = ZBC x ZAN with ZAN = convergence within the characteristic of the loop
A (Logical Information).

• RCA = ZCA x ZBN with ZBN= convergence within the characteristic of the loop
B (Logical Information).
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 35/48

Following are the different phase selections:

• SAN = T x RAN x RBN x RCN single-phase A to ground fault

• SBN = T x RBN x RAN x RCN single-phase B to ground fault

• SCN = T x RCN x RBN x RCN single-phase C to ground fault

• SABN = T x RAB x ZAN x ZBN double-phase A to B to ground fault

• SBCN = T x RBC x ZBN x ZCN double-phase B to C to ground fault

• SCAN = T x RCA x ZAN x ZCN double-phase C to A to ground fault

• SAB = T x RAB x RBC x RCA double-phase A to B fault

• BC = T x RBC x RAB x RCA double-phase B to C fault

• CA = T x RCA x RAB x RBC double-phase B to C fault

• SABC = ZAN x ZBN x ZCN x ZAB x ZBC x ZCA three-phase fault


For a three-phase fault, the fault resistance of one of the two-phase loops is less than half of
the fault resistances of the other two-phase loops, it will be used for the directional and
distance measuring function. If not, the loop AB will be used.
NOTE: Impedance phase selection is used only if current phase selection is
unable to make a decision.
4.3.4 Directional Decision
The fault direction is defined on the basis of the calculation of the phase shift between the
stored voltage and the derivative of a current. The current and the voltage used are those of
the measuring loop(s) defined by the phase selection.
For the two-phase loops, the calculation of the phase shift between the stored voltage and
the derivative of the current on the faulty two-phases.
For the single-phase loops, the calculation of the phase shift between the stored voltage and
the current (I'x + k0 x 3I'0), where:
I'x = derivative of current on the faulted single-phase where x = A, B, or C
3I’0 = derivative of residual current
k0 = ground compensation factor, where for example k01 = (Z0–Z1)/3Z1
The directional angle is fixed between-30° and +150° (RCA =60°).
4.3.5 Directional Decision during SOTF/TOR (Switch On To Fault/Trip On Reclose)
The directional information is calculated from the stored voltage values if the network is
detected as healthy. The calculations vary depending on the type of fault, i.e., single-phase
or multiphase.
If the network frequency cannot be measured and tracked, the directional element cannot be
calculated from the stored voltage. A zero sequence directional will be calculated if there are
enough zero-sequence voltage and current. If the zero-sequence directional is not valid, a
negative-sequence directional will be calculated if there are enough negative sequence
voltage and current. If both directional cannot be calculated, the directional element will be
forced forward.
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Single-phase fault
The reference voltage is stored in memory when the fault appears. When the fault is
eliminated by single-phase tripping, the high-speed single-phase auto-reclose (HSAR) is
started.
If a fault appears less than three cycles after the AR starts, the stored voltage value remains
valid as the reference and is used to calculate direction.
If no fault appears during the three cycles after the AR starts, the reference voltage value
becomes that of one of the healthy phases.
If a fault appears during the continuation of the AR cycle or reclosure occurs, the stored
voltage value remains valid for 10 seconds.
If a stored voltage does not exist (SOTF) when one or more loops are convergent within the
start-up characteristic, the directional is forced forward and the trip is instantaneous (if
“SOTF All Zones“ is set or according to the zone location if SOTF Zone 2, etc. is set). If the
settable switch on to fault current threshold I>3 is exceeded on reclosure, the relay
instantaneously trips three-phase (No timer I>3 is applied – see also the chapter AP in
§2.12).
Two-phase or three-phase fault
The reference voltage is stored in memory when the fault appears. When the fault is
cleared, the stored voltage value remains valid for 10 seconds. If reclosure occurs during
these 10 seconds, the direction is calculated using the stored voltage value.
If a stored voltage does not exist when one or more loops are convergent within the start-up
characteristic, the forward direction is forced and the trip is instantaneous when protection
starts (SOTF All Zones). If the switch on to fault current threshold I>3 is exceeded on
reclosure, the relay trips instantaneously three-phase (TOR All Zones).
The distance element trips immediately as soon as one or more loops converge within the
start-up characteristic during SOTF (SOTF All Zones).
Other modes can be selected to trip selectively by SOFT or TOR according to the fault
location (SOTF Zone 1, SOTF Zone 2, etc., TOR Zone 1, TOR Zone 2, etc. depending from
the software version - from version A3.1 available). There are 13 bits of settings in
TOR/SOTF logic (15 since version C5.X).
4.4 Faulted Zone Decision
The Decision of the faulted zone is determined by either the zone "Deltas" or "Conventional"
algorithms.
The zones are defined for a convergence between the Dfault and Rfault limits related to
each zone. So, the solution pair (Rfault, Dfault) is said to be convergent if:

• Rfault (n-1) < Rfault (i) and Rfault (n) < Rfault (i) and |Rfault (n-1) – Rfault (n)| < 10% x
Rfault (i)

• Dfault (n-1) < Dfault (i) and Dfault (n) < Dfault (i) and |Dfault (n-1) - Dfault (n)| < k% x
Dfault (i)
where .
k= 5% for zones 1 and 1X and
10% for other zones Z2, Z3, Zp, Zq and Z4.
i=1, 1X, 2, p, q, 3 and 4.
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 37/48

Z1

2 1 0
3
4..
R

P3028ENa

FIGURE 14 - PHASE-TO-EARTH LOOP IMPEDANCE


4.5 Tripping Logic
Three tripping modes can be selected (in MiCOM S1: Distance Scheme\Trip Mode):
Single-pole trip at T1 (if “1P. Z1 & CR” is set): Single-pole trip for fault in zone 1 at T1 and
Pilot Aided trip at T1. All other zones trip three-phase at their respective times for any fault
types (∅-G, ∅-∅, ∅-∅-G, ∅-∅-∅, ∅-∅-∅-G).
Single-pole trip at T1 and T2 (if “1P. Z1Z2 & CR” is set): Single-pole trip for Z1 at T1, Pilot
Aided trip at T1, and Z2 at T2. All other zones trip three-phase at their respective times for
any fault types (∅-G, ∅-∅, ∅-∅-G, ∅-∅-∅, ∅-∅-∅-G). See section 2.8.2.5 chapter AP
(Tripping Mode).
Three-pole trip for all zones (Forces 3 poles): Three-phase trip for all zones at their
respective times for any fault types (∅-G, ∅-∅, ∅-∅-G, ∅-∅-∅, ∅-∅-∅-G). Pilot aided
trips will be three-phase with times corresponding to the pilot logic applied.

Zone Time
Z1 T1
Z1X T1
Z2 T2
Zp Tp
Zq Tq
Z3 T3
Z4 T4

There are six time delays associated with the seven zones present. Zone 1 and extended
zone 1 have the same time delay.
NOTE: See general trip equation in §2.5 from AP chapter
NOTE: All the timers are initiated when the general start of the relay picks up
(Z3Z4 convergence)
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4.6 Fault Locator


The relay has an integral fault locator that uses information from the current and voltage
inputs to provide a distance to fault measurement. The fault locator measures the distance
by applying the same distance calculation principle as that used for the fault-clearing,
distance-measurement algorithm.
The dedicated fault locator measurement is more accurate as it is based on a greater
number of samples, and it uses the fault currents Ifault as models, as shown below:

• For a single-phase fault AN : Ifault∆ (IA – I0)

BN : Ifault∆ (IB – I0)

CN : Ifault∆ (IC – I0)

• For a two-phase fault AB : Ifault∆ (IA–IB)

BC : Ifault∆ (IB–IC)

CA : Ifault∆ (IC–IA)

• For a three-phase fault ABC : Ifault∆ (IA–IB)


The sampled data from the analogue input circuits is written to a cyclic buffer until a fault
condition is detected. The data in the input buffer is then held to allow the fault calculation to
be made. When the fault calculation is complete the fault location information is available in
the relay fault record.
When applied to parallel circuits mutual flux coupling can alter the impedance seen by the
fault locator. The coupling will contain positive, negative and zero sequence components. In
practice the positive and negative sequence coupling is insignificant. The effect on the fault
locator of the zero sequence mutual coupling can be eliminated by using the mutual
compensation feature provided. This requires that the residual current on the parallel line is
measured, as shown in Appendix B.
The calculation for single phase loop is based on the following equation:
R0–R1 dI dI dI dI
VAN = R1.Dfault.IA + .Dfault.3I0 + LAA.Dfault. A + LAB.Dfault. B + LAC.Dfault. C + Rfault.Ifault + Rm.Im + Lm. m
3 dt dt dt dt

R0–R1 dI dI dI dI
VBN = R1.Dfault.IB + .Dfault.3I0 + LAB.Dfault. A + LBB.Dfault. B + LBC.Dfault. C + Rfault.Ifault + Rm.Im + Lm. m
3 dt dt dt dt

R0–R1 dI dI dI dI
VCN = R1.Dfault.IC + .Dfault.3I0 + LAC.Dfault. A + LBC.Dfault. B + LCC.Dfault. C + Rfault.Ifault + Rm.Im + Lm. m
3 dt dt dt dt

With:
Rm: zero-sequence mutual resistance
Lm: zero-sequence mutual inductance
Im: zero-sequence mutual current

Ifault: fault current = ∆I – I0


Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 39/48

The calculation for phase-to-phase loop is based on the following equation:


dIA dI dI R
VAB = R1.Dfault.(IA – IB) + (LAA – LAB).Dfault. + (LAB – LBB).Dfault. B + (LAC – LBC).Dfault. C + fault.Ifault
dt dt dt 2

dIA dI dI R
VBC = R1.Dfault.(IB – IC) + (LAB – LAC).Dfault. + (LBB – LBC).Dfault. B + (LBC – LCC).Dfault. C + fault.Ifault
dt dt dt 2

dIA dI dI R
VAC = R1.Dfault.(IC – IA) + (LAC – LAA).Dfault. + (LBC – LAB).Dfault. B + (LCC – LAC).Dfault. C + fault.Ifault
dt dt dt 2

With:

Ifault= ∆I (∆I = ∆I' - ∆I")

∆IA - ∆IB
∆IB - ∆IC
∆IC - ∆IA
4.6.1 Selecting the fault location data
Selection of the analogue data that is used depends on

• How the fault is processed by the algorithms.

• The line model.


4.6.2 Processing algorithms
Distance to fault calculation will use the high speed algorithms if

• A fault is detected by the high-speed algorithms

• The tripping occurred within the T1 or T2 time delays

• The distance to the fault is less than 105% of the line.


In this case, the distance to fault saved in the fault report will be displayed as:
Distance to the fault = 24.48 km (L) accuracy 3%
If all three of these conditions are not met, the distance to fault value will be the same value
used by the distance protection. The format of the display will then be as follows:
Distance to the fault = 31.02 km accuracy 5%
NOTE: The more accurate fault location will be post scripted with an (L). This
will occur when conditions are favourable for using the more accurate
algorithm for distance to fault calculation.
4.6.2.1 Line Model Selection
The fault locator can distinguish between two types of line, as follows:

• Single lines.

• Parallel lines with mutual coupling.


Mutual coupling between transmission lines is common on power systems. Significant
effects on distance relay operation during faults involving ground may occur. Typically, the
positive and negative, mutual-sequence impedance are negligible, but zero-sequence
mutual coupling may be large, and either must be factored onto the settings, or
accommodated by measurement of parallel, mutually-coupled lines residual (ground)
current, where zero-sequence current information is available. The value of the residual
currents from parallel lines is then integrated into the distance measurement equation.
The relay is capable of measuring and using mutually coupled residual current information
from parallel lines. The mutual current is measured by a dedicated analogue input.
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Page 40/48 MiCOM P441/P442 & P444

4.7 Power swing detection


Power swings are caused by a lack of stability in the network with sudden load fluctuations.
A power swing may cause the two sources connected by the protected line to go out of step
(loose synchronism) with each other.
The power swing detection element may be used to selectively prevent when the measured
impedance point moves into the start-up characteristic from a power swing and still allows
tripping for a fault (fault evolving during a power swing). The power swing detection element
may also be used to selectively trip once an out-of-step condition has been declared.
For such feature a dedicated PSL must be designed in the internal logic of the relay by using
the graphic tool available in S1.(See AP chapter section 2.13).
When the locus of the 3 phase-phase loops leave the power swing polygon, the sign of R is
checked. If the R component still has the same sign as at the point of entry, then a power
swing is detected and managed in the internal logic as a stable swing.
Otherwise the locus of the 3 phase-phase loops have passed through the polygon (indicating
loss of synchronism) and the sign of R is different from the point of entry, then an out of step
is detected.
Figure 15 illustrates the characteristics of power swing:

− Stable swing – same resistance sign

− Unstable swing (Out Of Step) – opposite resistance sign

Powerswing Z3
Boundary Stable R
Characteristic Unstable
Swing Swing

Z4

P3038ENa

FIGURE 15 - POWER SWING


4.7.1 Power swing detection
The power swing detection element is used to detect a stable power swing or loss of
synchronism condition (out-of-step) as it passes through near the loop convergence (start-
up) characteristic (Z3 and Z4 if enabled). Power swing detection is based on the status of
the line to be protected:
Power swings are characterised by the simultaneous appearance of three impedance points
in the start-up zone, passing through the power swing boundary ∆R/∆X .Their speed of entry
(passing through the resistance limits that define the power swing detector) is slower than
that in the case of three-phase faults, which is instantaneous.
The protection P44x differentiates since version C1.0 a stable power swing from a loss of
synchronism (out of step) condition.
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 41/48

A power swing is detected and declared if:

• At least one phase-phase impedance is within the start-up zone after having crossed
the power swing band in more than 5 ms.

• The three impedance points have been in the power swing band for more than 5 ms.

• At least two poles of the breaker are closed (impedance measurement possible on two
phases).
NOTE: During Power swing the residual compensation factors k0 are not
applied in the detection of the characteristic.(the extended limit in R
gives: R1=R2=R3=RpFwd).
4.7.2 Line in one pole open condition (during single-pole trip)
In this case, the power swing occurs only on two phases. A power swing is detected if:

• At least one phase-phase impedance is within the start-up zone after having crossed
the power swing band in more than 5ms.

• The two impedance points have been in the power swing band for more than 5 ms.
NOTE: During an open-pole condition, the P44x monitors the power swing on
the healthy phase-phase loop. No external information is needed if
the voltage transformers are on the line side. If the voltage
transformers are on the bus side, the «pole discrepancy» signal
should be used. The «pole discrepancy» input represents a «one-
circuit-breaker-pole-open» condition.
4.7.3 Conditions for isolating lines
If there is a power swing, it may be necessary to disconnect the two out-of-step sources.
There are various tripping and blocking options available that are used to select if the line
has to be tripped for power swings or not.
The selective blocking of back up zones only allows the P44x to separate the network near
the electrical zero by tripping zone 1 only. Therefore, in the example given in figure 16, the
relay D trips out.

Electrical
Zero

A B C D E F

Relay set for out-of-step tripping,


zone 1.
P3039ENa

FIGURE 16 - SELECTIVE PROTECTION BLOCKING


4.7.4 Tripping logic
Depending on the blocking or unblocking selected, the P44x will trip or block as the swing
(stable or unstable) passes through the zones.
NOTE: If selected, tripping will occur if the impedance stays in any zone
longer than its time delay (see chapter AP – section 2.13).
There is a master unblocking timer that is used to override any blocked zone (unblocking
time delay). This is used to separate the sources (open the breaker, 3-phase trip) in the
event that a block was taking place, and the impedance remained in the blocked zone for a
relatively long time. This would indicate a serious overcurrent condition as a result of too
great a power transfer after a disturbance (a power swing that does not pass through or
recover). If the impedance point moves out of the start-up characteristic again before the
time delay expires, a trip is not issued and the adjustable time delay is reset.
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Page 42/48 MiCOM P441/P442 & P444

Unblocking the Zones Blocked due to Faults.


In order to protect the network against a fault that may occur during power swing, blocking
signals can be stopped when current thresholds are exceeded For detecting any type of fault
during a power swing, the P44x uses adjustable unblocking current thresholds:

• A residual current threshold equal to 0.1 In + (kr x Imax(t)).

• A negative-sequence current threshold equal to 0.1 In + (ki x Imax(t)).

• A phase current threshold: IMAX.


A Delta phase current criterion can be enabled in S1 (since version C1.0) – to detect the 3-
phase fault (with faulty current lower than Swing current) during Power swing
Where:
kr = an adjustable coefficient for residual or zero sequence current (3I0),
ki: = an adjustable coefficient for negative sequence current (I2),
Imax(t): maximum instantaneous current detected on one phase (A, B or C),
In: nominal current
4.7.5 Fault Detection after Single-phase Tripping (single-pole-open condition)
After a circuit breaker pole has opened, there is no current and voltage on the applicable
phase, which allows the protection unit to detect whether a one-pole cycle of the voltage
transformer are on a line side.
The reception of «poles discrepancy» input signal allows the protection unit to detect one-
pole-open condition blocking if the voltage transformer is on the bus side.
If another fault appears during a one-pole cycle or just after the voltage has been restored on
the applicable phase, direction is defined and phase selection performed.
4.8 Double Circuit Lines
Double circuit lines must be taken into account in the operating principle of the protection
scheme to avoid unwanted tripping of «sound» phases, which could be the result of an
excessively general phase selection.
Phase selection for an inter-circuit fault
During a two-phase fault selection, for example on loop AB, the P44x checks direction on the
two adjacent ground loops, (A to Neutral and B to Neutral). The direction is determined using
either the conventional algorithm or the high-speed algorithm (using superimposed
quantities), depending on fault severity. If superimposed components are used, the transient
(fault) energy is summated phase by phase.
n n
FaultDirectionLoop_AN = ∑ (∆VAN.∆IA ) and FaultDirectionLoop_BN =
n0
∑ (∆V
n0
BN .∆IB )

Z1 AN fault Z1 BN fault

AN Trip single pole Trip single pole


BN
P3040ENa
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 43/48

The directions of the two adjacent ground loops are compared, as follows:

• If the two directions are forward, the fault is a two-phase fault on the protected line.

• If only one of the directions is forward, for instance Sa, the fault is single-phase
(A to Neutral) on the protected line.

• If the two directions are reverse, the fault is not on the protected line.
Protection against Current Reversal (Transient Blocking)
When a fault occurs on a line, which is parallel to the protected line, the pilot schemes on the
protected line may be subjected current reversals from sequential clearing on the parallel
line. A fault on the parallel line may start by appearing external to the protected line in the
reverse direction, and then, after a sequential operation of one of the parallel line breakers,
the fault appears forward. This situation can affect security of certain pilot schemes on the
protected line.

Reverse Forward
3 4
3 4

Weak 1 2 Strong
Source Forward Forward Source
1 2
All breakers closed
Relay 3 senses reverse current

3 4
Forward Reverse
3 4

Weak 1 2 Strong
Source Source
1 Forward 2
Breaker 1 opens
Relay 3 senses forward current
P3041ENa

FIGURE 17 - DIRECTION REVERSAL FROM SEQUENTIAL CLEARING OF PARALLEL LINES


The P44x provides protection against the effects of this phenomenon by employing transient
blocking. An adjustable timer is available that will block direct and permissive transfer trip
signals from being used in the P44x logic, and will also block the P44x from sending direct or
permissive transfer trip signals. This timer is designated as «Reverse Guard Timer».
This provides protection against fault current reversal and will still allow fast tripping in the
event of faults occurring in zone 1, if zone 1 is independent (not used as overreach zone).
P44x/EN HW/F65 Relay Description

Page 44/48 MiCOM P441/P442 & P444

4.9 DEF Protection Against High Resistance Ground Faults


Protection against high-resistance ground faults, also called DEF (Directional Earth Fault), is
used to protect the network against highly resistive faults. High resistance faults may not be
detected by distance protection. DEF Protection can be applied in one of the two following
modes: faults using the following:

• The main operating mode, directional comparison protection uses the signalling
channel and is a communication-aided scheme.

• In backup-operating mode SBEF (Stand-By Earth Fault), an inverse/definite time


ground overcurrent element with 4 stages is selectable. A communication channel is
not used - OR – a zero sequence power (since version B1.x) with IDMT Time Delay
(see section 5 in chapter P44x/EN AP).
Both the main and backup mode can use different methods for fault detection and directional
determination (negative or zero sequence polarisation, RCA angle settable for backup SBEF
protection, etc.)
The use of Aided-Trip logic in conjunction with the DEF element allows faster trip times, and
can facilitate single-phase tripping if single-phase tripping is applied to the breaker.
The DEF directional comparison protection may be applied on the same signal channel as
the distance protection, or it may be applied on an independent channel (facility to use two
different aided-trip logic for distance or DEF element).
When used on the same signalling channel (shared scheme selected by MiCOM S1) as the
distance protection, if the distance protection picks up, it has priority (the output from the
DEF element is blocked from asserting the Carrier Send common output).
The use of directional comparison protection with an independent signalling channel allows
the distance functions and DEF function to operate in parallel. Each function is routed to its
own Carrier Send output. If a ground fault is present where both the distance and DEF
elements pick up, the faster of the two functions will perform the trip.
4.9.1 High Resistance Ground Fault Detection
A high resistance fault is detected when residual or zero sequence voltage (3V0) and current
thresholds are exceeded or using the high speed algorithms:

• ∆I ≥ 0.05 In

• ∆V ≥ 0.1 Vn (P-G)
A fault is confirmed if these thresholds are exceeded for more than 1 ½ cycles.
4.9.2 Directional determination
The fault direction is determined by measuring the angle between the residual voltage and
the residual current derivative. The fault is forward if the angle is between –14° and +166°. A
negative or zero sequence polarisation is selectable in order to determinate the earth fault
direction.
4.9.3 Phase selection
The phase is selected in the same way as for distance protection except that the current
threshold is reduced (∆I ≥ 0.05 x In and ∆V ≥ 0.1 x Vn).
NOTE: If the phase has not been selected within one cycle, a three-phase
selection is made automatically.
Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 45/48

4.9.4 Tripping Logic


Legend For Tripping Logic Diagrams (DEF)

Abbreviation Definition
Vr> Threshold of residual or zero sequence voltage (3V0)
IRev Threshold of residual current (settable in S1 – default:0,6IN)
Forward Forward directional with zero/negative sequence polarisation
Reverse Reverse directional with zero/negative sequence polarisation
DEF blocking Blocking of DEF element
Carrier Receive DEF Carrier received for the principal line protected (same channel as
distance protection)
Iev Threshold of residual current (0.6 x Ied)
Tripping mode Single or three-phase tripping (selectable)
Z< starting Convergence of at least 1 of the 6 loops within the tripping
characteristic (internal starting of the distance element)
t_cycle Additional time delay (150ms) of 1 pole AR cycle
t_delay Tripping time delay
t_trans Carrier Send delay

Forward Startup
Vr>threshold
Ied threshold
Forward decision & & Carrier Send DEF
Reverse decision &

Blocking DEF
Carrier Received DEF &

Single phase selection & Single Phase Trip


0
Iev threshold
T
t-delay Single

Reverse decision
Vr>threshold
& & Reversal Startup

Tripping mode

1 pole dead 0
1
T
Z< starting t-cycle
&
Independant & Three Phase Trip
channels DIST/DEF

Three
2 Pole or 3 Pole Selection 1
P3042ENa

FIGURE 18 - DIRECTIONAL COMPARISON PROTECTION PERMISSIVE SCHEME


P44x/EN HW/F65 Relay Description

Page 46/48 MiCOM P441/P442 & P444

Forward Startup
Vr>threshold
Ied threshold 0
Forward decision & & &
Reverse decision T
t-trans

Carrier Received DEF


&
Blocking DEF
Single phase selection & Single Phase Trip
0
Iev threshold
T
t-delay Single

& Blocking Carrier Send


Reverse decision
Vr>threshold
&

Tripping Mode
& Reversal Startup
1 pole dead 0
1
T
Z< starting t-cycle
&
Independant & Three Phase Trip
channels DIST/DEF

Three
2 Pole or 3 Pole Selection 1
P3043ENa

FIGURE 19 - DIRECTIONAL COMPARISON PROTECTION BLOCKING SCHEME


If the DEF directional comparison transmission is selected on the same channel that is used
to transmit distance aided-trip messages, the DEF will have the same tripping logic as the
main protection (permissive or blocking).
4.9.5 SBEF – Stand-By earth fault (not communication-aided)
This protection trips the local breaker directly, without a aided-trip signal, if a high resistance
fault remains after a time delay. The time delay varies inversely with the value of the fault
current. The selectable inverse time curves comply with the ANSI and IEC standards (see
Appendix A).
This protection three-pole trips and can block autoreclosing.

CTS Block
&
IN>x start
& SBEF

Slow VTS
Block
& Directional
Check
Trip
Vx > Vs & IDMT/DT
Ix > Is

SBEF Timer Block


P3044ENa

FIGURE 20 - SBEF – STAND-BY EARTH FAULT


Relay Description P44x/EN HW/F65

MiCOM P441/P442 & P444 Page 47/48

5. SELF TESTING & DIAGNOSTICS


The relay includes a number of self-monitoring functions to check the operation of its
hardware and software when it is in service. These are included so that if an error or fault
occurs within the relay’s hardware or software, the relay is able to detect and report the
problem and attempt to resolve it by performing a re-boot. This involves the relay being out
of service for a short period of time which is indicated by the ‘Healthy’ LED on the front of the
relay being extinguished and the watchdog contact at the rear operating. If the restart fails to
resolve the problem, then the relay will take itself permanently out of service. Again this will
be indicated by the LED and watchdog contact.
If a problem is detected by the self-monitoring functions, the relay attempts to store a
maintenance record in battery backed-up SRAM to allow the nature of the problem to be
notified to the user.
The self-monitoring is implemented in two stages: firstly a thorough diagnostic check which
is performed when the relay is booted-up, e.g. at power-on, and secondly a continuous self-
checking operation which checks the operation of the relay’s critical functions whilst it is in
service.
5.1 Start-up self-testing
The self-testing which is carried out when the relay is started takes a few seconds to
complete, during which time the relay’s protection is unavailable. This is signalled by the
‘Healthy’ LED on the front of the relay which will illuminate when the relay has passed all of
the tests and entered operation. If the testing detects a problem, the relay will remain out of
service until it is manually restored to working order.
The operations that are performed at start-up are as follows:
5.1.1 System boot
The integrity of the flash EPROM memory is verified using a checksum before the program
code and data stored in it is copied into SRAM to be used for execution by the processor.
When the copy has been completed the data then held in SRAM is compared to that in the
flash EPROM to ensure that the two are the same and that no errors have occurred in the
transfer of data from flash EPROM to SRAM. The entry point of the software code in SRAM
is then called which is the relay initialisation code.
5.1.2 Initialisation software
The initialisation process includes the operations of initialising the processor registers and
interrupts, starting the watchdog timers (used by the hardware to determine whether the
software is still running), starting the real-time operating system and creating and starting the
supervisor task. In the course of the initialisation process the relay checks:

• the status of the battery.

• the integrity of the battery backed-up SRAM that is used to store event, fault and
disturbance records.

• the voltage level of the field voltage supply which is used to drive the opto-isolated
inputs.

• the operation of the LCD controller.

• the watchdog operation.


At the conclusion of the initialisation software the supervisor task begins the process of
starting the platform software.
P44x/EN HW/F65 Relay Description

Page 48/48 MiCOM P441/P442 & P444

5.1.3 Platform software initialisation & monitoring


In starting the platform software, the relay checks the integrity of the data held in E2PROM
with a checksum, the operation of the real-time clock, and the IRIG-B board if fitted. The final
test that is made concerns the input and output of data; the presence and healthy condition
of the input board is checked and the analogue data acquisition system is checked through
sampling the reference voltage.
At the successful conclusion of all of these tests the relay is entered into service and the
protection started-up.
5.2 Continuous self-testing
When the relay is in service, it continually checks the operation of the critical parts of its
hardware and software. The checking is carried out by the system services software (see
section on relay software earlier in this chapter) and the results reported to the platform
software. The functions that are checked are as follows:

• the flash EPROM containing all program code and language text is verified by a
checksum.

• the code and constant data held in SRAM is checked against the corresponding data
in flash EPROM to check for data corruption.

• the SRAM containing all data other than the code and constant data is verified with a
checksum.

• the E2PROM containing setting values is verified by a checksum.

• the battery status.

• the level of the field voltage.

• the integrity of the digital signal I/O data from the opto-isolated inputs and the relay
contacts is checked by the data acquisition function every time it is executed. The
operation of the analogue data acquisition system is continuously checked by the
acquisition function every time it is executed, by means of sampling the reference
voltages.

• the operation of the IRIG-B board is checked, where it is fitted, by the software that
reads the time and date from the board.
In the unlikely event that one of the checks detects an error within the relay’s subsystems,
the platform software is notified and it will attempt to log a maintenance record in battery
backed-up SRAM. If the problem is with the battery status or the IRIG-B board, the relay will
continue in operation. However, for problems detected in any other area the relay will initiate
a shutdown and re-boot. This will result in a period of up to 5 seconds when the protection is
unavailable, but the complete restart of the relay including all initialisations should clear most
problems that could occur. As described above, an integral part of the start-up procedure is a
thorough diagnostic self-check. If this detects the same problem that caused the relay to
restart, i.e. the restart has not cleared the problem, then the relay will take itself permanently
out of service. This is indicated by the ‘Healthy’ LED on the front of the relay, which will
extinguish, and the watchdog contact which will operate.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444

APPLICATION NOTES
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 1/286

CONTENT

1. INTRODUCTION 9
1.1 Protection of overhead lines and cable circuits 9
1.2 MiCOM distance relay 9
1.2.1 Protection Features 10
1.2.2 Non-Protection Features 11
1.2.3 Additional Features for the P441 Relay Model 11
1.2.4 Additional Features for the P442 Relay Model 11
1.2.5 Additional Features for the P444 Relay Model 12
1.3 Remark 12

2. APPLICATION OF INDIVIDUAL PROTECTION FUNCTIONS 13


2.1 Configuration column (“Configuration” menu) 13
2.2 Phase fault distance protection 15
2.3 Earth fault distance protection 16
2.4 Consistency between zones 17
2.5 General Distance Trip logic 18
2.5.1 Equation 18
2.5.2 Inputs 19
2.5.3 Outputs 19
2.6 Type of trip 19
2.6.1 Inputs 20
2.6.2 Outputs 20
2.7 Distance zone settings (“Distance” menu) 20
2.7.1 Settings table 21
2.7.2 Zone Logic Applied 24
2.7.3 Zone Reaches 28
2.7.4 Zone Time Delay Settings 30
2.7.5 Residual Compensation for Earth Fault Elements 30
2.7.6 Resistive Reach Calculation - Phase Fault Elements 31
2.7.7 Resistive Reach Calculation - Earth Fault Elements 33
2.7.8 Effects of Mutual Coupling on Distance Settings 33
2.7.9 Effect of Mutual Coupling on Zone 1 Setting 34
2.7.10 Effect of Mutual Coupling on Zone 2 Setting 34
P44x/EN AP/F65 Application Notes

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2.8 Distance protection schemes “Distance Scheme” menu) 35


2.8.1 Description 35
2.8.2 Settings 36
2.8.3 Carrier send & Trip logic 38
2.8.4 The Basic Scheme 40
2.8.5 Zone 1 Extension Scheme 43
2.8.6 Loss of Load Accelerated Tripping (LoL) 45
2.9 Channel-aided distance schemes 48
2.9.1 Permissive Underreach Transfer Trip Schemes PUP Z2 and PUP Fwd 48
2.9.2 Permissive Overreach Transfer Trip Schemes POP Z2 and POP Z1 52
2.9.3 Permissive Overreach Schemes Weak Infeed Features 56
2.9.4 Permissive Scheme Unblocking Logic 59
2.9.5 Blocking Schemes BOP Z2 and BOP Z1 63
2.10 Distance schemes current reversal guard logic 66
2.10.1 Permissive Overreach Schemes Current Reversal Guard 66
2.10.2 Blocking Scheme Current Reversal Guard 66
2.11 Distance schemes in the “open” programming mode 67
2.12 Switch On To Fault and Trip On Reclose protection 67
2.12.1 Initiating TOR/SOTF Protection 69
2.12.2 TOR-SOTF Trip Logic 71
2.12.3 Switch on to Fault and Trip on Reclose by I>3 Overcurrent Element
(not filtered for inruch current): 73
2.12.4 Switch on to Fault and Trip on Reclose by Level Detectors 73
2.12.5 Setting Guidelines 75
2.12.6 Inputs /Outputs in SOTF-TOR DDB Logic 76
2.13 Power swing blocking (PSB) (“Power swing” menu) 77
2.13.1 Description 77
2.13.2 The Power Swing Blocking Element 79
2.13.3 Unblocking of the Relay for Faults During Power Swings 80
2.13.4 Typical Current Settings 83
2.13.5 Removal of PSB to Allow Tripping for Prolonged Power Swings 83
2.13.6 Out Of Step (OOS) 83
2.14 Directional and non-directional overcurrent protection (“Back-up I>” menu) 86
2.14.1 Application of Timer Hold Facility 88
2.14.2 Directional Overcurrent Protection 88
2.14.3 Time Delay VTS 89
2.14.4 Setting Guidelines 89
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 3/286

2.15 Negative sequence overcurrent protection (NPS) (“NEG sequence O/C” menu) 91
2.15.1 Setting Guidelines 92
2.15.2 Negative phase sequence current threshold, ‘I2> Current Set’ 94
2.15.3 Time Delay for the Negative Phase Sequence Overcurrent Element, ‘I2> Time Delay’ 94
2.15.4 Directionalising the Negative Phase Sequence Overcurrent Element 94
2.16 Broken conductor detection 95
2.16.1 Setting Guidelines 95
2.16.2 Example Setting 96
2.17 Directional and non-directional earth fault protection (“Earth fault O/C” menu) 97
2.17.1 Directional Earth Fault Protection (DEF) 101
2.17.2 Application of Zero Sequence Polarising 101
2.17.3 Application of Negative Sequence Polarising 102
2.18 Aided DEF protection schemes (“Aided D.E.F” menu) 102
2.18.1 Polarising the Directional Decision 104
2.18.2 Aided DEF Permissive Overreach Scheme 105
2.18.3 Aided DEF Blocking Scheme 106
2.19 Thermal overload (“Thermal overload” menu) – Since version C2.x 108
2.19.1 Single time constant characteristic 109
2.19.2 Dual time constant characteristic (Typically not applied for MiCOMho P443) 109
2.19.3 Setting guidelines 111
2.20 Residual overvoltage (neutral displacement) protection (“Residual overvoltage”
menu) 111
2.20.1 Setting guidelines 114
2.21 Maximum of Residual Power Protection – Zero Sequence Power Protection
(“Zero Seq Power” menu) (since version B1.x) 114
2.21.1 Function description 114
2.21.2 Settings & DDB cells assigned to zero sequence power (ZSP) function 117
2.22 Undervoltage protection (“Volt protection” menu) 118
2.22.1 Undervoltage protection 118
2.22.2 Setting Guidelines 119
2.23 Overvoltage protection 119
2.23.1 Setting Guidelines 120
2.24 Circuit breaker fail protection (CBF) (“CB Fail & I<” menu) 120
2.24.1 Breaker Failure Protection Configurations 121
2.24.2 Reset Mechanisms for Breaker Fail Timers 122
2.24.3 Typical settings 126
P44x/EN AP/F65 Application Notes

Page 4/286 MiCOM P441/P442 & P444

3. OTHER PROTECTION CONSIDERATIONS - SETTINGS EXAMPLE 127


3.1 Distance Protection Setting Example 127
3.1.1 Objective 127
3.1.2 System Data 127
3.1.3 Relay Settings 127
3.1.4 Line Impedance 127
3.1.5 Zone 1 Phase Reach Settings 128
3.1.6 Zone 2 Phase Reach Settings 128
3.1.7 Zone 3 Phase Reach Settings 128
3.1.8 Zone 4 Reverse Settings with no Weak Infeed Logic Selected 128
3.1.9 Zone 4 Reverse Settings with Weak Infeed Logic Selected 128
3.1.10 Residual Compensation for Earth Fault Elements 129
3.1.11 Resistive Reach Calculations 129
3.1.12 Power Swing Band 130
3.1.13 Current Reversal Guard 130
3.1.14 Instantaneous Overcurrent Protection 130
3.2 Teed feeder protection 131
3.2.1 The Apparent Impedance Seen by the Distance Elements 131
3.2.2 Permissive Overreach Schemes 131
3.2.3 Permissive Underreach Schemes 132
3.2.4 Blocking Schemes 133
3.3 Alternative setting groups 133
3.3.1 Selection of Setting Groups 134

4. APPLICATION OF NON-PROTECTION FUNCTIONS 136


4.1 Event Recorder (“View records” menu) 136
4.1.1 Change of state of opto-isolated inputs. 138
4.1.2 Change of state of one or more output relay contacts. 138
4.1.3 Relay Alarm conditions. 139
4.1.4 Protection Element Starts and Trips 139
4.1.5 General Events 139
4.1.6 Fault Records 139
4.1.7 Maintenance Reports 140
4.1.8 Setting Changes 140
4.1.9 Resetting of Event / Fault Records 140
4.1.10 Viewing Event Records via MiCOM S1 Support Software 140
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 5/286

4.2 Circuit breaker condition monitoring (“CB Condition” menu) 142


4.2.1 Circuit Breaker Condition Monitoring Features 142
4.2.2 Setting guidelines 144
4.2.3 Setting the Number of Operations Thresholds 144
4.2.4 Setting the Operating Time Thresholds 145
4.2.5 Setting the Excessive Fault Frequency Thresholds 145
4.2.6 Inputs/Outputs for CB Monitoring logic 145
4.3 Circuit Breaker Control (“CB Control” menu) 146
4.4 Disturbance recorder (“Disturb recorder” menu) 150
4.5 HOTKEYS / Control input (“Ctrl I/P config” menu) (since version C2.x) 156
4.6 InterMiCOM Teleprotection (“InterMiCOM comms” and “InterMiCOM conf” menus) 159
4.6.1 Protection Signalling 159
4.6.2 Functional Assignment 163
4.6.3 InterMiCOM Settings 163
4.6.4 Testing InterMiCOM Teleprotection 167
4.7 Programmable function keys and tricolour LEDs (“Function key” menu) 170
4.7.1 Setting guidelines 170
4.8 Fault locator (“Distance elements” menu) 175
4.8.1 Mutual Coupling 176
4.8.2 Setting Guidelines 176
4.9 Supervision (“Supervision” menu) 177
4.9.1 Voltage transformer supervision (VTS) – Main VT for minZ measurement 177
4.9.2 Current Transformer Supervision (CTS) 183
4.9.3 Capacitive Voltage Transformers Supervision (CVT) (since version B1.x) 184
4.10 Check synchronisation (“System checks” menu) 185
4.10.1 Dead Busbar and Dead Line 187
4.10.2 Live Busbar and Dead Line 187
4.10.3 Dead Busbar and Live Line 188
4.10.4 Check Synchronism Settings 188
4.10.5 Logic inputs / Outputs from synchrocheck function 192
4.11 Autorecloser (“autoreclose” menu) 194
4.11.1 Autorecloser Functional Description 194
4.11.2 Benefits of Autoreclosure 196
4.11.3 Auto-reclose logic operating sequence 197
4.11.4 Scheme for Three Phase Trips 203
4.11.5 Scheme for Single Pole Trips 203
4.11.6 Logical Inputs used by the Autoreclose logic 205
4.11.7 Logical Outputs generated by the Autoreclose logic 211
4.11.8 Setting Guidelines 218
4.11.9 Choice of Protection Elements to Initiate Autoreclosure 218
P44x/EN AP/F65 Application Notes

Page 6/286 MiCOM P441/P442 & P444

4.11.10 Number of Shots 218


4.11.11 Dead Timer Setting 219
4.11.12 De-Ionising Time 219
4.11.13 Reclaim Timer Setting 220
4.12 Circuit breaker state monitoring 221
4.12.1 Circuit Breaker State Monitoring Features 221
4.12.2 Inputs / outputs DDB for CB logic: 225

5. PROGRAMMABLE SCHEME LOGIC DEFAULT SETTINGS 228


5.1 HOW TO USE PSL Editor? 228
5.2 Logic input mapping 230
5.3 Relay output contact mapping 233
5.4 Relay output conditioning 234
5.5 Programmable LED output mapping 236
5.6 Fault recorder trigger 236

6. CURRENT TRANSFORMER REQUIREMENTS 237


6.1 CT Knee Point Voltage for Phase Fault Distance Protection 237
6.2 CT Knee Point Voltage for Earth Fault Distance Protection 237
6.3 Recommended CT classes (British and IEC) 237
6.4 Determining Vk for an IEEE “C" class CT 237

7. NEW ADDITIONNAL FUNCTIONS – VERSION C2.X


(MODEL 030G/H/J) 238
7.1 Hardware new features 238
7.2 Function Improved: Distance 238
7.3 New Function Description: OUT OF STEP & STABLE SWING improved 239
7.4 Function Improved: DEF 240
7.5 New Function Description: SBEF with IN>3 &IN>4 240
7.6 New Function Description: THERMAL OVERLOAD 241
7.6.1 Single time constant characteristic 242
7.6.2 Dual time constant characteristic (Typically not applied for MiCOMho P443) 242
7.6.3 Setting guidelines 243
7.7 New Function Description: PAP (RTE feature) 244
7.8 New Elements: Miscellaneous features 245
7.8.1 HOTKEYS / Control input 245
7.8.2 Optos: Dual hysteresis and filter removed or not 248
7.9 New Elements: PSL features 249
7.9.1 DDB Cells: 249
7.9.2 New Tools in S1 & PSL: Toolbar and Commands 250
7.9.3 MiCOM Px40 GOOSE editor 255
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 7/286

7.10 New Function: Inter MiCOM features 265


7.10.1 InterMiCOM Teleprotection 265
7.10.2 Protection Signalling 265
7.10.3 Functional Assignment 269
7.10.4 InterMiCOM Settings 270
7.10.5 TESTING InterMiCOM Teleprotection 273

8. NEW ADDITIONAL FUNCTIONS – VERSION C4.X (MODEL 0350J) 276


8.1 New DDB signals 276

9. NEW ADDITIONAL FUNCTIONS – VERSION D1.X (MODEL 0400K) 278


9.1 Programmable function keys and tricolour LEDs 278
9.2 Setting guidelines 278

10. NEW ADDITIONAL FUNCTIONS – VERSION C5.X (MODEL 0360J) 282


10.1 New DDB signals 282
10.2 Residual overvoltage (neutral displacement) protection 284
10.2.1 Setting guidelines 286
10.3 CT polarity setting 286
P44x/EN AP/F65 Application Notes

Page 8/286 MiCOM P441/P442 & P444

BLANK PAGE
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 9/286

1. INTRODUCTION
1.1 Protection of overhead lines and cable circuits
Overhead lines are amongst the most fault susceptible items of plant in a modern power
system. It is therefore essential that the protection associated with them provides secure and
reliable operation. For distribution systems, continuity of supply is of para mount importance.
The majority of faults on overhead lines are transient or semi-permanent in nature, and multi-
shot autoreclose cycles are commonly used in conjunction with instantaneous tripping
elements to increase system availability. Thus, high speed, fault clearance is often a
fundamental requirement of any protection scheme on a distribution network. The protection
requirements for sub-transmission and higher voltage systems must also take into account
system stability. Where systems are not highly interconnected the use of single phase
tripping and high speed autoreclosure is commonly used. This in turn dictates the need for
high speed protection to reduce overall fault clearance times.
Underground cables are vulnerable to mechanical damage, such as disturbance by
construction work or ground subsidence. Also, faults can be caused by ingress of ground
moisture into the cable insulation, or its buried joints. Fast fault clearance is essential to limit
extensive damage, and avoid the risk of fire, etc.
Many power systems use earthing arrangements designed to limit the passage of earth fault
current. Methods such as resistance earthing make the detection of earth faults difficult.
Special protection elements are often used to meet such onerous protection requirements.
Physical distance must also be taken into account. Overhead lines can be hundreds of
kilometres in length. If high speed, discriminative protection is to be applied it will be
necessary to transfer information between the line ends. This not only puts the onus on the
security of signalling equipment but also on the protection in the event of loss of this signal.
Thus, backup protection is an important feature of any protection scheme. In the event of
equipment failure, maybe of signalling equipment or switchgear, it is necessary to provide
alternative forms of fault clearance. It is desirable to provide backup protection which can
operate with minimum time delay and yet discriminate with the main protection and
protection elsewhere on the system.
1.2 MiCOM distance relay
MiCOM relays are a range of products from AREVA T&D. Using advanced numerical
technology, MiCOM relays include devices designed for application to a wide range of power
system plant such as motors, generators, feeders, overhead lines and cables.
Each relay is designed around a common hardware and software platform in order to
achieve a high degree of commonality between products. One such product in the range is
the series of distance relays. The relay series has been designed to cater for the protection
of a wide range of overhead lines and underground cables from distribution to transmission
voltage levels.
The relay also includes a comprehensive range of non-protection features to aid with power
system diagnosis and fault analysis. All these features can be accessed remotely from one
of the relays remote serial communications options.
P44x/EN AP/F65 Application Notes

Page 10/286 MiCOM P441/P442 & P444

1.2.1 Protection Features


The distance relays offer a comprehensive range of protection functions, for application to
many overhead line and underground cable circuits. There are 3 separate models available,
the P441, P442 and P444. The P442 and P444 models can provide single and three pole
tripping. The P441 model provides three pole tripping only. The protection features of each
model are summarised below:

• 21G/21P: Phase and earth fault distance protection, each with up to 5 independent
zones of protection (6 zones from version C5.0, model 36J). Standard and customised
signalling schemes are available to give fast fault clearance for the whole of the
protected line or cable.
• 50/51: Instantaneous and time delayed overcurrent protection - Four elements are
available, with independent directional control for the 1st and 2nd element. The 3rd
element can be used for SOFT/TOR logic. The fourth element can be configured for
stub bus protection in 1½ circuit breaker arrangements.

• 50N/51N: Instantaneous and time delayed neutral overcurrent protection. Two


elements are available (four elements from version C1.0, model 020G or 020H).
• 67N: Directional earth fault protection (DEF) - This can be configured for channel
aided protection, plus two elements are available for backup DEF.
• 32N: Maximum of Residual Power Protection - Zero sequence Power Protection This
element provides protection for high resistance faults, eliminated without
communication channel.
• 27: Undervoltage Protection - Two stage, configurable as either phase to phase or
phase to neutral measuring. Stage 1 may be selected as either IDMT or DT and stage
2 is DT only.
• 49: (Since version C2.X) Thermal overload Protection - with dual time constant. This
element provides separate alarm and trip thresholds.

• 59: Overvoltage Protection - Two stages, configurable as either phase to phase or


phase to neutral measuring. Stage 1 may be selected as either IDMT or DT and stage
2 is DT only.
• 67/46: Directional or non-directional negative sequence overcurrent protection - This
element can provide backup protection for many unbalanced fault conditions.
• 50/27: Switch on to fault (SOTF) protection - These settings enhance the protection
applied for manual circuit breaker closure.
• 50/27:Trip on reclose (TOR) protection - These settings enhance the protection
applied on autoreclosure of the circuit breaker.
• 78 – 68: Power swing blocking - Selective blocking of distance protection zones
ensures stability during the power swings experienced on sub-transmission and
transmission systems (stable swing or Out of Step condition = loss of synchronism).
From version C1.0, the relay can differentiate between a stable power swing and a
loss of synchronism (out of steps).
• VTS: Voltage transformer supervision (VTS). - To detect VT fuse failures. This
prevents maloperation of voltage dependent protection on AC voltage input failure.
• CTS: Current transformer supervision - To raise an alarm should one or more of the
connections from the phase CTs become faulty.
• 46 BC: Broken conductor detection - To detect network faults such as open circuits,
where a conductor may be broken but not in contact with another conductor or the
earth.
• 50 BF: Circuit breaker failure protection - Generally set to backtrip upstream circuit
breakers, should the circuit breaker at the protected terminal fail to trip. Two stages
are provided.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 11/286

1.2.2 Non-Protection Features


The P441, P442 and P444 relays have the following non-protection features:

• 79/25: Autoreclosure with Check synchronism - This permits up to 4 reclose shots,


with voltage synchronism, differential voltage, live line/dead bus, and dead bus/live
line interlocking available. Check synchronism is optional.

• Measurements - Selected measurement values polled at the line/cable terminal,


available for display on the relay or accessed from the serial communications facility.

• Fault/Event/Disturbance Records - Available from the serial communications or on the


relay display (fault and event records only).

• Distance to fault locator - Reading in km, miles or % of line length.

• Four Setting Groups - Independent setting groups to cater for alternative power
system arrangements or customer specific applications.

• Remote Serial Communications - To allow remote access to the relays. The following
communications protocols are supported: Courier, MODBUS, IEC60870-5/103 and
DNP3 (UCA2 soon available).

• Continuous Self Monitoring - Power on diagnostics and self checking routines to


provide maximum relay reliability and availability.

• Circuit Breaker State Monitoring - Provides indication of any discrepancy between


circuit breaker auxiliary contacts.

• Circuit Breaker Control - Opening and closing of the circuit breaker can be achieved
either locally via the user interface / opto inputs, or remotely via serial
communications.

• Circuit Breaker Condition Monitoring - Provides records / alarm outputs regarding the
number of CB operations, sum of the interrupted current and the breaker operating
time.

• Commissioning Test Facilities.


1.2.3 Additional Features for the P441 Relay Model

• 8 Logic Inputs - For monitoring of the circuit breaker and other plant status.

• 14 Output relay contacts - For tripping, alarming, status indication and remote control.
1.2.4 Additional Features for the P442 Relay Model

• Single pole tripping and autoreclose.

• Real Time Clock Synchronisation - Time synchronisation is possible from the relay
IRIG-B input. (IRIG-B must be specified as an option at time of order).

• Fibre optic converter for IEC60870-5/103 communication (optional).

• Second rear port in COURIER Protocol (KBus/RS232/RS485)

• 16 Logic Inputs - For monitoring of the circuit breaker and other plant status.

• 21 Output relay contacts - For tripping, alarming, status indication and remote control.
P44x/EN AP/F65 Application Notes

Page 12/286 MiCOM P441/P442 & P444

1.2.5 Additional Features for the P444 Relay Model

• Single pole tripping and autoreclose.

• Real Time Clock Synchronisation - Time synchronisation is possible from the relay
IRIG-B input. (IRIG-B must be specified as an option at time of order).

• Fibre optic converter for IEC60870-5/103 communication (optional).

• Second rear port in COURIER Protocol (KBus/RS232/RS485)

• 24 Logic Inputs - For monitoring of the circuit breaker and other plant status.

• 32 Output relay contacts - For tripping, alarming, status indication and remote control.
1.3 Remark
The PSL screen copy extracted from S1, uses the different types of model P44x (07, 09…).
(See the DDB equivalent table with the different model number).
Example: check synch OK (model 07) = DDB204
check synch OK (model 09) = DDB236

• It is recommended to check in the DDB table, the reference number of each cell,
included in the chapter P44x/EN GC/E33 (“Relay menu Data base”)

• Version C2.x uses the model 030 G / 030 H / 030 J


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 13/286

2. APPLICATION OF INDIVIDUAL PROTECTION FUNCTIONS


The following sections detail the individual protection functions in addition to where and how
they may be applied. Each section also gives an extract from the respective menu columns
to demonstrate how the settings are applied to the relay.
The P441, P442 and P444 relays each include a column in the menu called the
‘CONFIGURATION’ column. As this affects the operation of each of the individual protection
functions, it is described in the following section.
2.1 Configuration column (“Configuration” menu)
The following table shows the Configuration column:-

Menu text Default setting Available settings


CONFIGURATION
Restore Defaults No Operation No Operation
All Settings
Setting Group 1
Setting Group 2
Setting Group 3
Setting Group 4
Setting Group Select via Menu Select via Menu
Select via Optos
Active Settings Group 1 Group1
Group 2
Group 3
Group 4
Save Changes No Operation No Operation
Save
Abort
Copy From Group 1 Group1,2,3 or 4
Copy To No Operation No Operation
Group1,2,3 or 4
Setting Group 1 Enabled Enabled or Disabled
Setting Group 2 Disabled Enabled or Disabled
Setting Group 3 Disabled Enabled or Disabled
Setting Group 4 Disabled Enabled or Disabled
Distance Enabled Enabled or Disabled
Power Swing Enabled Enabled or Disabled
Back-up I> Disabled Enabled or Disabled
Neg Sequence O/C Disabled Enabled or Disabled
Broken Conductor Disabled Enabled or Disabled
Earth Fault O/C Disabled Enabled or Disabled
Earth fault prot (4) (ZSP) Disabled Enabled or Disabled
Aided DEF Enabled Enabled or Disabled
Volt Protection Disabled Enabled or Disabled
CB Fail & I< Enabled Enabled or Disabled
Supervision Enabled Enabled or Disabled
P44x/EN AP/F65 Application Notes

Page 14/286 MiCOM P441/P442 & P444

Menu text Default setting Available settings


System Checks Disabled Enabled or Disabled
3
Thermal Overload ( ) Disabled Enabled or Disabled
4
Residual O/V NVD ( ) Disabled Enabled or Disabled
Internal A/R Disabled Enabled or Disabled
Input Labels Visible Invisible or Visible
Output Labels Visible Invisible or Visible
CT & VT Ratios Visible Invisible or Visible
Record Control Invisible Invisible or Visible
Disturb Recorder Invisible Invisible or Visible
Measure’t Setup Invisible Invisible or Visible
Comms Settings Visible Invisible or Visible
Commission Tests Visible Invisible or Visible
Setting Values Primary Primary or Secondary
Control Inputs (3) Visible Invisible or Visible
3
Ctrl I/P Config ( ) Visible Invisible or Visible
3
Ctrl I/P Labels ( ) Visible Invisible or Visible
Direct Access (3) Enabled Enabled or Disabled
2
Inter MiCOM ( ) Enabled Enabled or Disabled
Ethernet NCIT (3) Visible Visible / Invisible
3
Function key ( ) Visible Visible / Invisible
LCD Control 11 1 – 31

(1) Since B1.0


(2) Since C1.0
(3) Since C2.0
(4) Since D1.0
The aim of the Configuration column is to allow general configuration of the relay from a
single point in the menu. Any of the functions that are disabled or made invisible from this
column do not then appear within the main relay menu.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 15/286

2.2 Phase fault distance protection


The P441, P442 and P444 relays have 6 zones of phase fault protection, as shown in the
impedance plot Figure 1 below.

X( /phase)

ZONE 3

ZONE P

ZONE 2

ZONE 1X

ZONE 1

R1Ph/2 R2Ph/2 RpPh/2 R3Ph/2 = R4Ph/2 R ( /phase)

ZONE 4

P0470ENa

FIGURE 1A – PHASE/PHASE FAULT QUADRILATERAL CHARACTERISTICS (Ω/PHASE SCHEME)


Since version C2.X, the previous phase fault protection is completed by optional TILT
characteristic (Z1p manages the TILT characteristic for phase fault).

X (Ω/phase)

ZONE 3

ZONE P

ZONE 2
ZONE 1X

ZONE 1

R (Ω/phase)
R1Ph/2 R2Ph/2 RpPh/2 R3Ph/2 =R4Ph/2

ZONE Q
ZONE 4

P0470ENb

FIGURE 1B – PHASE/PHASE FAULT QUADRILATERAL CHARACTERISTICS (Ω/PHASE SCHEME)


P44x/EN AP/F65 Application Notes

Page 16/286 MiCOM P441/P442 & P444

Remarks: 1. Z1 (zone 1) programmed in ohm/loop.


R limit value in MiCOM S1 is in ohms loop and Z limit in MiCOM S1
is in ohms phase.
2. In a Ω/phase scheme the R value must be divided by 2 (for
phase/phase diagram).
3. The angle of the start element (Quad) is the angle of the
positive impedance of the line (value adjusted in the settings)
4. TILT angle protection is only applied with conventional protection
All phase fault protection elements are quadrilateral shaped, and are directionalied as
follows:

• Zones 1, 2 and 3 - Directional forward zones, as used in conventional three zone


distance schemes. Note that Zone 1 can be extended to Zone 1X when required in
zone 1 extension schemes (see page 17 §2.5.2).

• Zone p and q - Programmable. Selectable in MiCOM S1 (Distance scheme\Fault type)


as a directional forward or reverse zone.

• Zone 4 - Directional reverse zone. Note that zone 3 and zone 4 can be set with same
Rloop value to provide a general start of the relay.
Remark: If any zone i presents an Rloop i bigger than R3=R4, the limit of the
start is always given by R3. See also the "Commissioning Test"
chapter.

2.3 Earth fault distance protection


The P441, P442 and P444 relays have 6 zones of earth (ground) fault protection, as shown
in the earth loop impedance plot Figure 2 below.
Type of fault can be selected in MiCOM S1 (only Phase/Phase or P/P & P/Ground)

X( /phase)

ZONE 3

ZONE P (Programmable)

ZONE 2

ZONE 1X

ZONE 1

R1G R2G RpG R3G = R4G


1+KZ 1+KZ 1+KZ 1+KZ 1+KZ
1 2 p 3/4 3/4 R( /phase)

ZONE P Reverse

ZONE 4

P0471ENa

FIGURE 2A – PHASE/GROUND FAULT QUADRILATERAL CHARACTERISTICS (Ω/PHASE SCHEME)


Since version C2.X, the previous phase fault protection is completed by optional TILT
characteristic (Z1m manages the TILT characteristic for phase fault).
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 17/286

X (Ω/phase)

ZONE 3

ZONE P

ZONE 2
ZONE 1X

ZONE 1
R (Ω/phase)
R1G R2G RpG R3G R4G
1+KZ1 1+KZ1 1+KZ1 1+KZ1 1+KZ1

ZONE Q
ZONE 4

P0471ENb

FIGURE 2B – PHASE/GROUND FAULT QUADRILATERAL CHARACTERISTICS (Ω/PHASE SCHEME)

Remarks: 1. In a Ω/phase scheme the R value must be divided by 1+KZ (for


phase/ground diagram)
2. The angle of the start element (Quad) is the angle of the
2Z1+Z0 (Z1: positive sequence Z, Z0: zero sequence Z)
3. See calculation of KZ in section 2.6.5.
All earth fault protection elements are quadrilateral shaped, and are directionalised as per
the phase fault elements. The reaches of the earth fault elements use residual compensation
of the corresponding phase fault reach. The residual compensation factors are as follows:

• kZ1 - For zone 1 and zone 1X;

• kZ2 - For zone 2;

• kZ3/4 - Shared by zones 3 and 4;

• kZp - For zone p;

• kZq - For zone q.

2.4 Consistency between zones


In order to understand how the different distance zones interact the parameters below
should be considered:

• If Zp is a forward zone

− Z1 U Z2 < Zp < Z3
− tZ1 < tZ2 < tZp < tZ3
− R1G < R2G < RpG < R3G = R4G
− R1Ph < R1extPh < R2Ph < RpPh < R3Ph
P44x/EN AP/F65 Application Notes

Page 18/286 MiCOM P441/P442 & P444

• If Zp is a reverse zone

− Z1 < Z2 < Z3
− Zp > Z4
− tZ1 < tZ2 < tZ3
− tZp < tZ4
− R1G < R2G < R3G
− RpG < R3G = R4G
− R1Ph < R2Ph < R3Ph
− RpPh < R3Ph = R4Ph
− R3G < UN / (1.2 X √3 IN)
− R3Ph < UN / (1.2 X √3 IN)
Remarks: 1. If Z3 is disabled, the forward limit element becomes the
smaller zone Z2 (or Zp if selected forward)
2. If Z4 is disabled, the directional limit for the forward zone is:
30° (since version A4.0)
0° (versions older than A4.0)

Conventional rules are used as follows:

− Distance timers are initiated as soon as the relay has picked up – CVMR pickup
distance (CVMR = Start & Convergence)
− The minimum tripping time even with carrier received is T1.
Since version C5.0 (model 36J) this applies only for standard distance scheme,
while in teleprotection schemes minimum tripping time is separately settable.
− Zone 4 is always reverse

2.5 General Distance Trip logic


2.5.1 Equation

Z1'.T1. BZ1 . PZ1


+ Z1x'.(None + Z1xSiAnomTac.UNB_Alarm).[ T1. INP_Z1EXT]
+ UNB_CR.T1.[ PZ1.Z1'+PZ2.Z2'+PFwd.Aval’]
+ UNB_CR .T1.(Tp +INP_COS(*)).[ Z1'.BZ1 + (Z2'.BZ2. INP_COS (*)])
+ T2 [ Z2' + PZ1.Z1' + BZ1.Z1']
+ Z3'.T3
+ Zp' .Tzp
+ Zq' .Tzq
+ Z4'.T4
[(*) from version A2.10 & A3.1]
(See Figure 3 in section 2.7.2.1- Z’ logic description)
Remarks: 1. In case of COS (carrier out of service), the logic swap back to a
basic scheme.
2. In the column Data Type:"Configuration" means MiCOM S1 Setting
(the parameter is present in the settings).
3. The inputs Z1X must be polarised for activating Z1X the logic.
4 For the 1P – 3P trip logic check in section 2.8.3.5 Tripping logic.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 19/286

With the inputs/outputs described above:


2.5.2 Inputs

Data Type Description


T1 to T4 Internal logic Elapse of Distance Timer 1 to 4 (T1/T2/T3/TZp/T4)
Tp Internal logic Elapse of transmission time in blocking scheme
Z1' to Z4' (*) Internal logic Detection of fault in zones 1 to 4
(lock out by PSWing or Rev Guard) – See figure 3 section
2.7.21
Forward’ Internal logic Fwd Fault Detection l (lockout by reversal guard)
UNB_CR Internal logic Carrier Received
INP_COS TS Opto Carrier Out of Service
None Configuration Scheme without carrier
PZ1 Configuration Permissive scheme Z1
PZ2 Configuration Permissive scheme Z2
PFwd Configuration Permissive Scheme with directional Fwd
BZ1 Configuration Blocking scheme Z1
BZ2 Configuration Blocking scheme Z2
INP_Z1EXT Internal logic Zone extension (digital input assigned to an opto by
dedicated PSL)
Z1xChannel Fail Configuration Z1x logic enabled if channel fail detected (Carrier out of
service = COS)
UNBAlarm Internal logic Carrier Out Of Service

(*) the use of an apostrophe in the above logic (Z'1) is explained in section 2.7.2.1 Figure 3
2.5.3 Outputs

Data Type Description


PDist_Dec Internal logic Distance protection Trip
CSZ1 Configuration Carrier send in case of zone 1 decision
CSZ2 Configuration Carrier send in case of zone 2 decision
CSZ4 Configuration Carrier send in case of zone 4 decision (Reverse)

2.6 Type of trip

Single Pole Z1 Single pole Z2 T1 T2 Tzp T3 T4


0 1 1 1 3 3 3
1 0 1 3 3 3 3
0 0 3 3 3 3 3

1: Trip 1P if selected in MiCOM S1 otherwise trip 3P


3: Trip 3P
P44x/EN AP/F65 Application Notes

Page 20/286 MiCOM P441/P442 & P444

2.6.1 Inputs

Data Type Description


INP_Dist_Timer_Block TS opto Input for blocking the distance function
Single Pole T1 Configuration Trip 1pole at T1 – 3P in other cases
Single Pole T1 & T2 Configuration Trip 1pole at T1 /T2 – 3P in other cases
PDist_Trip Internal Logic Trip by Distance protection
T1 to T4 Internal Logic End of distance timer by Zone
Fault A Internal Logic Phase A selection
Fault B Internal Logic Phase B selection
Fault C Internal Logic Phase C selection

2.6.2 Outputs

Data Type Description


PDist_Trip A Internal Logic Trip Order phase A
PDist_Trip B Internal Logic Trip Order phase B
PDist_Trip C Internal Logic Trip Order phase C

2.7 Distance zone settings (“Distance” menu)


NOTE: Individual distance protection zones can be enabled or disabled by
means of the Zone Status function links. Setting the relevant bit to 1
will enable that zone, setting bits to 0 will disable that distance
zone. Note that zone 1 is always enabled, and that zones 2 and 4 will
need to be enabled if required for use in channel aided schemes.

Remarks: 1. .Z3 disable means Fwd start becomes Zp


.Z3 & Zp Fwd disable means Fwd start becomes Z2
.Z3 & Zp Fwd & Z2 disable means Fwd start becomes Z1
2. Z4 disable (see remark 1/2/3 in section 2.4)
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 21/286

2.7.1 Settings table

Setting range
Menu text Default setting Step size
Min Max
GROUP 1
DISTANCE
ELEMENTS
LINE SETTING
Line Length 1000 km 0.3 km 1000 km 0.010 km
(625 miles) (0.2 mile) (625 miles) (0.005 mile)
Line Impedance 12/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
Line Angle 70° –90° +90° 0.1°
Zone Setting
Zone Status 110110 Bit 0: Z1X Enable, Bit 1: Z2 Enable,
Bit 2: Zone P Enable, Bit 3: Zone Q Enable
(since version D2.0), Bit 4: Z3 Enable, Bit 5:
Z4 Enable.
KZ1 Res Comp 1 0 7 0.001
KZ1 Angle 0° 0° 360° 0.1°
Z1 10/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
Z1X 15/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
R1G 10/In Ω 0 400/In Ω 0.01/In Ω
R1Ph 10/In Ω 0 400/In Ω 0.01/In Ω
tZ1 0 0 10s 0.002s
KZ2 Res Comp 1 0 7 0.001
KZ2 Angle 0° 0° 360° 0.1°
Z2 20/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
R2G 20/In Ω 0 400/In Ω 0.01/In Ω
R2Ph 20/In Ω 0 400/In Ω 0.01/In Ω
tZ2 0.2s 0 10s 0.01s
KZ3/4 Res Comp 1 0 7 0.01
KZ3/4 Angle 0° 0° 360° 0.1°
Z3 30/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
R3G - R4G 30/In Ω 0 400/In Ω 0.01/In Ω
R3Ph - R4Ph 30/In Ω 0 400/In Ω 0.01/In Ω
tZ3 0.6s 0 10s 0.01s
Z4 40/In Ω 0.001/In Ω 500/In Ω 0.01/In Ω
tZ4 1s 0 10s 0.01s
Zone P - Direct. Directional Fwd Directional Fwd or Directional Rev
KZp Res Comp 1 0 7 0.001
KZp Angle 0° 0° 360° 0.1°
P44x/EN AP/F65 Application Notes

Page 22/286 MiCOM P441/P442 & P444

Setting range
Menu text Default setting Step size
Min Max
Zp 25/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
RpG 25/In Ω 0 400/In Ω 0.01/In Ω
RpPh 25/In Ω 0 400/In Ω 0.01/In Ω
tZp 0.4s 0 10s 0.01s
Zone Q – Direct Directional Fwd Directional Fwd or Directional Rev
(since D2.0)
(since version D2.0)

KZq Res Comp) 1 0 7 0.001


KZq Angle 0° -180° 180° 0.1°
Zq 27*V1/I1 0.001*V1/I1 500*V1/I1 0.001*V1/I1
RqG 27*V1/I1 0 400*V1/I1 0.01*V1/I1
RqPh 27*V1/I1 0 400*V1/I1 0.01*V1/I1
tZq 0.5s 0 10s 0.01s
Serial Cmp.line (*) Disable Enable Disable
Overlap Z Mode (*) Disable Enable Disable
Z1m Tilt Angle 0° -45° 45° 1°
(since C2.x)

Z1p Tilt Angle 0° -45° 45° 1°


Z2/Zp/Zq Tilt Angle 0° -45° 45° 1°
Fwd Z Chgt Delay 30ms 0 100ms 1ms
Umem Validity 10s 0 10s 10mss
Earth Detect 0.05*I1 0*I1 0.1*I1 0.01*I1
Fault Locator
KZm Mutual Comp 0 0 7 0.001
KZm Angle 0° 0° 360° 0.1°

Since version C2.x:

− Addition of a settable time delay to prevent maloperation due to zone evolution from
zone n to zone n-1 by CB operation

− Addition of a tilt characteristic for zone 1 (independent setting for phase-to-ground and
phase-to-phase). Settable between ± 45°

− Addition of a tilt characteristic for zone 2 and zone P (common setting for phase-to-
ground and phase-to-phase/Z2 and Zp). Settable between ± 45°
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 23/286

− DDB associated:
Since version C5.X, a new setting is added to set the duration of the voltage memory
availability after fault detection. When the voltage memory is declared unavailable (e.g. the V
Mem Validity set duration has expired, SOTF Mode, no healthy network to record memory
voltage), other polarizing quantities can be considered. These include zero, negative and
positive sequence (if voltage is sufficient). Otherwise directional decision is forced to forward.
Zone q is a further distance zone. It can be faster or slower than any other zone (except
zone 1), and it can be in either direction. The only constraint is that it must be inside the
overall Z3/Z4 start-up zone.
The residual current threshold (Earth I Detect.) used by the conventional algorithm to detect
earth faults is now settable.

Setting range
Menu text Default setting Step size
Min Max
V Mem Validity 10.00 s 0s 10.00 s 0.01 s
ZoneQ - Direct Directional FWD Directional FWD/ Directional REV
kZq Res Comp 1.000 0 7.000 0.001
kZq Angle 0 deg -180.0 180.0 0.1
Zq 27.00 Ohm 0.001 500.0 0.001
RqG 27.00 Ohm 0 400.0 0.010
RqPh 27.00 Ohm 0 400.0 0.010
tZq 500.0ms 0 10.00 0.010
Earth I Detect. 0.05 0 0.10 0.01

Serial Cmp. Line Enabled


Overlap Z Mode Enabled
(*) Z1m Tilt Angle 20,00 deg
(*) Z1p Tilt Angle 20,00 deg
(*) Z2/Zp Tilt Angle 20,00 deg
(*) Fwd Z Chgt Delay 30,00 ms

(*) parameters available from version C2.0 onwards


P44x/EN AP/F65 Application Notes

Page 24/286 MiCOM P441/P442 & P444

• Remark: New settings from C1.x dealing with the tilt and the evolving forward zone
detection to zone1 (to avoid a Z1 detection in case of impedance locus getting out
from the quad (due to remote CB operating) but crossing the Z1 before being out from
the quad (with enough points that a Z1 decision can be confirmed if that timer has
been set to 0ms).

• Serial Compensated Line: If enabled, the Directional Line used in the Delta Algorithms
is set at 90°
(Fwd = Quad1&4 / Rev = Quad 2&3)

REV FWD

REV FWD

P0472ENa

• If disabled, the Directional Line of the Delta algorithms is set at -30° like conventional
algorithms

FWD FWD

R
REV FWD

REV -30˚

P0473ENa

• Overlap Z Mode: If enable, for a fault in Zp (fwd), then Z1 & Z2 will be displayed in
LCD/Events/Drec – The internal logic is not modified
2.7.2 Zone Logic Applied
Normally the zone logic used by the distance algorithm is as below:

Z1'
Z2'

Z4'

P0462XXa

(with overlap logic the Z2 will cover also the Z1)


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 25/286

2.7.2.1 Zone Logic


The relay internal logic will modify the zones & directionality under the following conditions:

• Power swing detection

• Settings about blocking logic during Power swing

• Reversal Guard Timer

• Type of teleprotection scheme


For Power swing, two signals are considered:

• Presence of power swing

• Unblocking during power swing


During Power swing the zones are blocked; but can be unblocked with:

• Start of unblocking logic

• Unblocking logic enable in MiCOM S1 on the concerned zone or all zones


During the reversal guard logic (in case of parallel lines with overreaching teleprotection
scheme - Z1x>ZL), the reverse direction decision is latched (until that timer is elapsed) from
the change from reverse to forward fault direction.
P44x/EN AP/F65 Application Notes

Page 26/286 MiCOM P441/P442 & P444

Z1x
& Z1x'

unblock PS ≥1
in Z1

Z1<ZL &
≥1
1

& Z1'
Z1

Reversal
Guard
&
PermZ2
≥1
Power
Swing
≥1 & Z2'
Unblock PS
≥1 unblock PS
in Z2

Z2

&

PermFwd
≥1 Forward'
&
Forward

unblock PS ≥1
in Z3
& Z3'
Z3 Z2'

unblock PS
in Z4 ≥1

Z4 & Z4'

Zp_Fwd
&
unblock PS
in Zp
≥1
Zp'
Zp &

Reverse
Reverse'
≥1

P0474ENa

FIGURE 3 - ZONES UNBLOCKING/BLOCKING LOGIC WITH POWER SWING OR REVERSAL GUARD

Explanation about the symbols used in the logical schemas.


Represents an internal logic status from the logic of the protection
(« the line is dead » or « the pole is dead »)
Represents a setting adjusted or selected by MiCOM S1

Represenst a command / a logical external status linked to an opto


input from the protection
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 27/286

2.7.2.2 Inputs

Data Type Description


Z1 Internal Logic Fault detected in zone 1
Z1x Internal Logic Fault detected in zone 1 extended
Z2 Internal Logic Fault detected in zone 2
Z3 Internal Logic Fault detected in zone 3
Zp Internal Logic Fault detected in zone p
Z4 Internal Logic Fault detected in zone 4
Forward Internal Logic FWD Fault Detected
Reverse Internal Logic REV Fault Detected
Reversal Guard Internal Logic Reversal guard
Unblock PS Internal Logic Unblocking Power Swing
Power Swing Internal Logic Power Swing Detected
INP_Distance_Timer_block TS opto Zones blocked by external input (*)
Unblock Z1 Configuration Unblocking Pswing with Z1
Unblock Z2 Configuration Unblocking Pswing with Z2
Unblock Zp Configuration Unblocking Pswing with Zp
Unblock Z3 Configuration Unblocking Pswing with Z3
Unblock Z4 Configuration Unblocking Pswing with Z4
Zp_Fwd Configuration Directional Zp set Forward
Z1<ZL Configuration Internal Configuration which determine that Z1
is lower than the length of the line ZL
Perm Z2 Configuration Type of logical distance scheme
(PUP Z2– POP Z2) (**)
Perm Fwd Configuration Type of logical distance scheme
(PUP Fwd)
Block Z1 Configuration Type of logical distance scheme
(BOP Z1)
Block Z2 Configuration Type of logical distance scheme
(BOP Z2)

Remarks: *. Usefull for dedicated logic designed in PSL


Facility in Commissioning Test
**. For Aided Distace Scheme – See description in the TRIP
LOGIC Table (section 2.8.3.4)
P44x/EN AP/F65 Application Notes

Page 28/286 MiCOM P441/P442 & P444

2.7.2.3 Outputs

Data Type Description


Z1x’ Internal Logic Fault detected in zone 1 extended
Z1’ Internal Logic Fault detected in zone 1
Z2’ Internal Logic Fault detected in zone 2
Z3’ Internal Logic Fault detected in zone 3
Zp’ Internal Logic Fault detected in zone p
Z4’ Internal Logic Fault detected in zone 4
Forward’ Internal Logic Fault Detected in Forward Direction
Reverse’ Internal Logic Fault Detected in Reverse Direction

For guidance on Line Length, Line Impedance, kZm Mutual Compensation and kZm mutual
compensation Angle settings, refer to section 4.1.
2.7.3 Zone Reaches

All impedance reaches for phase fault protection are calculated in polar form: Z ∠θ, where Z
is the reach in ohms, and θ is the line angle setting in degrees, common to all zones.
The line parameters can be adjusted in polar or rectangular mode to give the total positive
impedance of the protected line:

Remark: Z limit in MiCOM S1 are adjusted for Ω/phase


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 29/286

• The zone 1 elements of a distance relay should be set to cover as much of the
protected line as possible, allowing instantaneous tripping for as many faults as
possible. In most applications the zone 1 reach (Z1) should not be able to respond to
faults beyond the protected line. For an underreaching application the zone 1 reach
must therefore be set to account for any possible overreaching errors. These errors
come from the relay, the VTs and CTs and inaccurate line impedance data. It is
therefore recommended that the reach of the zone 1 distance elements is restricted to
80 - 85% of the protected line impedance (positive phase sequence line impedance),
with zone 2 elements set to cover the final 20% of the line. (Note: Two of the channel
aided distance schemes described later, schemes POP Z1 and BOP Z1 use
overreaching zone 1 elements, and the previous setting recommendation does not
apply).

• The zone 2 elements should be set to cover the 20% of the line not covered by zone
1. Allowing for underreaching errors, the zone 2 reach (Z2) should be set in excess of
120% of the protected line impedance for all fault conditions. Where aided tripping
schemes are used, fast operation of the zone 2 elements is required. It is therefore
beneficial to set zone 2 to reach as far as possible, such that faults on the protected
line are well within reach. A constraining requirement is that, where possible, zone 2
does not reach beyond the zone 1 reach of adjacent line protection. Where this is not
possible, it is necessary to time grade zone 2 elements of relays on adjacent lines.
For this reason the zone 2 reach should be set to cover ≤50% of the shortest adjacent
line impedance, if possible. When setting zone 2 earth fault elements on parallel
circuits, the effects of zero sequence mutual coupling will need to be accounted for.
The mutual coupling will result in the Zone 2 ground fault elements underreaching. To
ensure adequate coverage an extended reach setting may be required, this is covered
in Section 2.7.7.

• The zone 3 elements would usually be used to provide overall back-up protection for
adjacent circuits. The zone 3 reach (Z3) is therefore set to approximately 120% of the
combined impedance of the protected line plus the longest adjacent line. A higher
apparent impedance of the adjacent line may need to be allowed where fault current
can be fed from multiple sources or flow via parallel paths.

• Zones p and q are a reversible directional zones. The setting chosen for zone p (q), if
used at all, will depend upon its application. Typical applications include its use as an
additional time delayed zone or as a reverse back-up protection zone for busbars and
transformers. Use of zone p(q) as an additional forward zone of protection may be
required by some users to line up with any existing practice of using more than three
forward zones of distance protection. Zone p(q) may also be useful for dealing with
some mutual coupling effects when protecting a double circuit line, which will be
discussed in section 2.7.7.

• The zone 4 elements would typically provide back-up protection for the local busbar,
where the offset reach is set to 25% of the zone 1 reach of the relay for short lines
(<30km) or 10% of the zone 1 reach for long lines. Setting zone 4 in this way would
also satisfy the requirements for Switch on to Fault, and Trip on Reclose protection, as
described in later sections. Where zone 4 is used to provide reverse directional
decisions for Blocking or Permissive Overreach schemes, zone 4 must reach further
behind the relay than zone 2 for the remote relay. This can be achieved by setting:
Z4 ≥ ((Remote zone 2 reach) x 120%) minus the protected line impedance.
P44x/EN AP/F65 Application Notes

Page 30/286 MiCOM P441/P442 & P444

2.7.4 Zone Time Delay Settings


(initiated with CVMR (General start convergency))

• The zone 1 time delay (tZ1) is generally set to zero, giving instantaneous operation.
However, a time delay might be employed in cases where a large transient DC
component is expected in the fault current, and older circuit breakers may be unable
to break the current until zero crossings appear.

• The zone 2 time delay (tZ2) is set to co-ordinate with zone 1 fault clearance time for
adjacent lines. The total fault clearance time will consist of the downstream zone 1
operating time plus the associated breaker operating time. Allowance must also be
made for the zone 2 elements to reset following clearance of an adjacent line fault and
also for a safety margin. A typical minimum zone 2 time delay is of the order of 200ms.
This time may have to be adjusted where the relay is required to grade with other
zone 2 protection or slower forms of back-up protection for adjacent circuits.

• The zone 3 and zone p(q) time delays (tZ3, tZp, tZq) are typically set with the same
considerations made for the zone 2 time delay, except that the delay needs to co-
ordinate with the downstream zone 2 fault clearance (or reverse busbar protection
fault clearance). A typical minimum operating time would be about 400ms. Again, this
may need to be modified to co-ordinate with slower forms of back-up protection for
adjacent circuits.

• The zone 4 time delay (tZ4) needs to co-ordinate with any protection for adjacent lines
in the relay’s reverse direction. If zone 4 is required merely for use in a Blocking
scheme, tZ4 may be set high.
Remark: In MiCOM S1, timers settable are: tZi but in the DDB corresponding
cells are: Ti
2.7.5 Residual Compensation for Earth Fault Elements
For earth faults, residual current (derived as the vector sum of phase current inputs
(Ia + Ib + Ic) is assumed to flow in the residual path of the earth loop circuit. Thus, the earth
loop reach of any zone must generally be extended by a multiplication factor of (1 + kZ0)
compared to the positive sequence reach for the corresponding phase fault element.
kZ0 is designated as the residual compensation factor, and is calculated as:

kZ0 Res. Comp, ⏐kZ0⏐ = (Z0 – Z1) / 3.Z1 Set as a ratio.

kZ0 Angle, ∠kZ0 = ∠ (Z0 – Z1) / 3.Z1 Set in degrees.

Where:
Z1 = Positive sequence impedance for the line or cable;
Z0 = Zero sequence impedance for the line or cable.
kZ0 CALCULATION DESCRIPTION
If we consider a phase to ground fault AN with analog values VA and IA.
Using symetrical components, VA is described as above:
(1) VA = V1 + V2 + V0 = Z1I1 + Z2I2 + Z0I0
Z2 = Z1 (for a line or a cable)
(2) VA = Z1 (I1 + I2) + Z0I0
we can write also: IA = I1 + I2 +I0
(3) (I1 + I2) = IA – I0
with (3) in (2) we obtain:
(4) VA = Z1 (IA – I0) + Z0I0
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 31/286

The physical fault current is IR = 3I0 – if put in (4) – we obtain:


VA = Z1 [IA – IR/3 + Z0IR/3Z1] = Z1 [IA + IR (Z0–Z1)/3Z1]
but: (Z0 – Z1)/3Z1 = kZ0
(5) VA = Z1 [IA + kZ0 IR]
(6) Z1 = VA/(IA + kZ0 IR)
Particular case
Resistive fault
(7) VA = Z1 [IA + kZ0 IR] + Rdef. Idef (Rdef = Rloop)
To determine the distance, Z1 term is extracted.
(8) Z1 = (VA – Rdef. Idef)/(IA + kZ0 IR)
with
Rdef: fault resistance (loop)
Idef: current crossing the fault resistance
Open line:
Ifault = IR = IA
(9) VA = Z1 IA (1 + kZ0) + Rfault IA
(10) Z1 = (VA/IA – Rfault)/(1 + kZ0)
The impedance detected will be:
Z = Z1 (1 + kZ0) + Rfault

That is the form used for the result of Z measured with injector providing U, I, ϕ
Separate compensation for each zone (KZ1, KZ2, KZ3/4, KZp and KZq) allows more
accurate earth fault reach control for elements which are set to overreach the protected line,
such that they cover other circuits which may have different zero sequence to positive
sequence impedance ratios (example: underground cable & overhead line in the protected
line).
2.7.6 Resistive Reach Calculation - Phase Fault Elements
In MiCOM S1 all resistances are set per loop
The P441, P442 and P444 relays have quadrilateral distance elements, thus the resistive
reach (RPh) is set independently of the impedance reach along the protected line/cable.
RPh defines the maximum amount of fault resistance additional to the line impedance for
which a distance zone will trip, regardless of the location of the fault within the zone. Thus,
the right hand and left hand resistive reach constraints of each zone are displaced by +RPh
and -RPh either side of the characteristic impedance of the line, respectively. RPh is
generally set on a per zone basis, using R1Ph, R2Ph, RpPh and RqPh. Note that zones 3
and 4 share the resistive reach R3Ph-R4Ph.
When the relay is set in primary impedance terms, RPh must be set to cover the maximum
expected phase-to-phase fault resistance. In general, RPh must be set greater than the
maximum fault arc resistance for a phase-phase fault, e.g. calculated as follows:
Ra = (28710 x L) / If1.4

RPh ≥ Ra
P44x/EN AP/F65 Application Notes

Page 32/286 MiCOM P441/P442 & P444

Where:
If = Minimum expected phase-phase fault current (A);
L = Maximum phase conductor spacing (m);

Ra = Arc resistance, calculated from the van Warrington formula (Ω).


Typical figures for Ra are given in Table 1 below, for different values of minimum expected
phase fault current.

Conductor Typical system If = 1kA If = 5kA If = 10kA


spacing (m) voltage (kV)
2 33 3.6Ω 0.4Ω 0.2Ω
5 110 9.1Ω 1.0Ω 0.4Ω
8 220 14.5Ω 1.5Ω 0.6Ω

TABLE 1 - TYPICAL ARC RESISTANCES CALCULATED USING THE VAN WARRINGTON FORMULA
The maximum phase fault resistive reach must be limited to avoid load encroachment trips.
Thus, R3Ph and other phase fault resistive reach settings must be set to avoid the heaviest
allowable loading on the feeder. An example is shown in Figure 3 below, where the worst
case loading has been determined as point “Z”, calculated from:

Impedance magnitude, ⏐Z⏐ = kV2 / MVA

Leading phase angle, ∠Z = cos–1 (PF)


Where:
kV = Rated line voltage (kV);
MVA = Maximum loading, taking the short term overloading during out ages of
parallel circuits into account (MVA);
PF = Worst case lagging power factor.

Zone 3

∆R

R3PG-R4PG
Z

LOAD

Zone 4

P0475ENa

FIGURE 4 - RESISTIVE REACHES FOR LOAD AVOIDANCE


As shown in the Figure, R3Ph-R4Ph is set such as to avoid point Z by a suitable margin.
Zone 3 must never reach more than 80% of the distance from the line characteristic
impedance (shown dotted), towards Z. However, where power swing blocking is used, a
larger impedance (including ∆R) characteristic surrounds zones 3 and 4, and it is essential
also that load does not encroach upon this characteristic. For this reason, R3Ph would be
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 33/286

set ≤ 60% of the distance from the line characteristic impedance towards Z. A setting
between the calculated minimum and maximum should be applied.
R/Z ratio: For best zone reach accuracy, the resistive reach of each zone would not normally
be set greater than 10 times the corresponding zone reach. This avoids relay overreach or
underreach where the protected line is exporting or importing power at the instant of fault
inception. The resistive reach of any other zone cannot be set greater than R3Ph, and
where zone 4 is used to provide reverse directional decisions for Blocking or Permissive
Overreach schemes, the zone 2 elements used in the scheme must satisfy R2Ph ≤ (R3Ph-
R4Ph) x 80%.
2.7.7 Resistive Reach Calculation - Earth Fault Elements
The resistive reach setting of the relay earth fault elements (RG) should be set to cover the
desired level of earth fault resistance, but to avoid operation with minimum load impedance.
Fault resistance would comprise arc-resistance and tower footing resistance. In addition, for
best reach accuracy, the resistive reach of any zone of the relay would not normally be
greater than 10 times the corresponding earth loop reach.
EXPERT SECTION
As shown in Figure 4 (section 2.7.6), R3G – R4G is set such as to avoid point Z (minimum
load impedance) by a suitable margin.

R3G – R4G ≤ 80% Z minimum load impedance


Umin/√3
≤ 80%
1,2 x Imax

• Vmin: minimum phase/phase voltage in normal condition without fault

• Imax: maximum load current in normal condition without fault


However, where Power Swing blocking is used, a larger impedance surrounds zone 3 and
zone 4, and it is essential also, that load does not encroach upon the characteristic (with
version up to C1.X).
Since version C1.x there is an earth detection criteria (10% IN + 5% IphaseMax) which
blocks the start of the relay if not enough residual current has been detected (it secures the
start in case of load encroachment for Delta algorithms).
Another improvement since C1.x in the Power Swing detection is made by using Phase-
Phase detectors. In that case phase ground start could be bigger compared to previous
versions, because the band ∆R is applied only to the phase phase loops.

[(R3G – R4G) – ∆R] ≤ 80% Z min load

With ∆R = 0,032 x ∆f x R load min


∆f: power swing frequency
R load min: minimum load resistance

A typical resistive reach coverage would be 40Ω on the primary system. The same load
impedance as in section 2.4.4 must be avoided. Thus R3G is set such as to avoid point Z by
a suitable margin. Zone 3 must never reach more than 80% of the distance from the line
characteristic impedance (shown dotted in Figure 3), towards Z.
For high resistance earth faults, the situation may arise where no distance elements could
operate. In this case it will be necessary to provide supplementary earth fault protection, for
example using the relay Channel Aided DEF protection.
2.7.8 Effects of Mutual Coupling on Distance Settings
Where overhead lines are connected in parallel or run in close proximity for the whole or part
of their length, mutual coupling exists between the two circuits. The positive and negative
sequence coupling is small and can be neglected. The zero sequence coupling is more
significant and will affect relay measurement during earth faults with parallel line operation.
P44x/EN AP/F65 Application Notes

Page 34/286 MiCOM P441/P442 & P444

Zero sequence mutual coupling will cause a distance relay to underreach or overreach,
depending on the direction of zero sequence current flow in the parallel line. However, it can
be shown that this underreach or overreach will not affect relay discrimination during parallel
line operation (ie. it is not be possible to overreach for faults beyond the protected line and
neither will it be possible to underreach to such a degree that no zone 1 overlap exists). A
channel-aided scheme will therefore still respond to faults within the protected line and
remain secure during external faults. Some applications exist, however, where the effects of
mutual coupling should be addressed.
2.7.9 Effect of Mutual Coupling on Zone 1 Setting
For the case shown in Figure 5, where one circuit of a parallel line is out of service and
earthed at both ends, an earth fault at the remote bus may result in incorrect operation of the
zone 1 earth fault elements. It may be desirable to reduce the zone 1 earth loop reach for
this application. This can be achieved using an alternative setting group within the relay, in
which the residual compensation factor kZ1 is set at a lower value than normal (typically ≤
80% of normal kZ1).

Z1 G/F (Optional)

Z1 G/F (Normal)

ZMO

P3048ENa

FIGURE 5 - ZONE 1 REACH CONSIDERATIONS


2.7.10 Effect of Mutual Coupling on Zone 2 Setting
If the double circuit line to be protected is long and there is a relatively short adjacent line, it
is difficult to set the reach of the zone 2 elements to cover 120% of the protected line
impedance for all faults, but not more than 50% of the adjacent line. This problem can be
exacerbated when a significant additional allowance has to be made for the zero-sequence
mutual impedance in the case of earth faults (see Section 2.4.6). For parallel circuit
operation the relay Zone 2 earth fault elements will tend to underreach. Therefore, it is
desirable to boost the setting of the earth fault elements such that they will have a
comparable reach to the phase fault elements. Increasing the residual compensation factor
kZ2 for zone 2 will ensure adequate fault coverage.
Under single circuit operation, no mutual coupling exists, and the zone 2 earth fault elements
may overreach beyond 50% of the adjacent line, necessitating time discrimination with other
Zone 2 elements. Therefore, it is desirable to reduce the earth fault settings to that of the
phase fault elements for single circuit operation, as shown in Figure 5. Changing between
appropriate settings can be achieved by using the alternative setting groups available in the
relay series relays.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 35/286

Z2 ' Boost ' G/F


Z2 PH

ZMO

(i) Group 1

Z2 ' Reduced ' G/F


Z2 PH

(ii) Group 2 P3049ENa

FIGURE 6 - MUTUAL COUPLING EXAMPLE - ZONE 2 REACH CONSIDERATIONS


2.8 Distance protection schemes “Distance Scheme” menu)
2.8.1 Description
The option of using separate channels for DEF aided tripping, and distance protection
schemes, is offered in the P441, P442 and P444 relays. Alternatively, the aided DEF
protection can share the distance protection signalling channel, and the same scheme logic.
In this case a permissive overreach or blocking distance scheme must be used. The aided
tripping schemes can perform single pole tripping. The relays include basic five-zone
distance scheme logic for stand-alone operation (where no signalling channel is available)
and logic for a number of optional additional schemes. The features of the basic scheme will
be available whether or not an additional scheme has been selected.
Since version C2.x, the function is based on a specification with a dedicated application
equivalent to a customised weak infeed.
The settings are above:
P44x/EN AP/F65 Application Notes

Page 36/286 MiCOM P441/P442 & P444

New Outputs DDB cells:

New Inputs DDB cells:

2.8.2 Settings

Setting range
Menu text Default setting Step size
Min Max
Group 1
Distance schemes
Program Mode Standard Scheme Standard Scheme
Open Scheme
Standard Mode Basic + Z1X Basic + Z1X, POP Z1,
POP Z2, PUP Z2, PUP Fwd, BOP Z1,
BOP Z2.
Fault Type Both Enabled Phase to Ground,
Phase to Phase,
Both Enabled.
Trip Mode Force 3 Poles Force 3 Poles,
1 Pole Z1 & CR,
1 Pole Z1 Z2 & CR.
Sig. Send Zone None None, CsZ1, CsZ2, CsZ4.
Dist CR None None, PermZ1, PermZ2, PermFwd, BlkZ1,
BlkZ2.
Tp 0.02s 0 1s 0.002s
tReversal Guard 0.02s 0 0.15s 0.002s
Unblocking Logic None None, Loss of Guard, Loss of Carrier.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 37/286

Setting range
Menu text Default setting Step size
Min Max
TOR-SOTF Mode 00000000110000 Bit 0: TOR Z1
Bit 1: TOR Z2
Bit 2: TOR Z3
Bit 3: TOR All Zones
Bit 4: TOR Dist. Scheme
Bit 5: SOFT All Zones
Bit 6: SOFT Lev. Det.
Bit 7: SOFT Z1
Bit 8: SOFT Z2
Bit 9: SOFT Z3
Bit 0A: SOFT Z1 + Rev
Bit 0B: SOFT Z2 + Rev
Bit 0C: SOFT Dist. Scheme
Bit 0D: SOFT Disable
Bit 0E: SOTF I>3 enabled
SOTF Delay 110s 10.00s 3600s 1s
Z1 Ext. on Chan. Fail Disabled Disabled or Enabled
Weak Infeed
WI: Mode Status Disabled Disabled, Echo, WI Trip & Echo.
WI: Single Pole Disabled Disabled, Enabled
WI: V< Thres. 45V 10V 70V 5V
WI: Trip Time Delay 0.06s 0 1s 0.002s
PAP: Del Trip En Disabled Disabled, Enabled
PAP: P1 / P2 / P3 Disabled Disabled, Enabled
PAP: 1P / 2P / 3P Time 500 ms 100ms 1500s 100.0ms
Del
PAP: IN Thres 500 mA 100mA 1A 10mA
PAP: K (%Vn) 500 e-3 500e-3 1.000 50e-3
Loss of Load
LoL: Mode Status Disabled Disabled or Enabled
LoL: Chan. Fail Disabled Disabled or Enabled
LoL: I< 0.5 x In 0.05 x In 1 x In 0.05 x In
LoL: Window 0.04s 0.01s 0.1s 0.01s
P44x/EN AP/F65 Application Notes

Page 38/286 MiCOM P441/P442 & P444

2.8.3 Carrier send & Trip logic


2.8.3.1 Carrier send can be triggered by

• Zone1 (CSZ1)

• Zone2 (CSZ2)

• Zone4 Reverse (CSZ4)


Remarks: 1. CSZ1 means: "carrier send if Z1 detected"
2. The carrier send in Z4 is managed by "Reverse", instead of Z4
(because Reverse decision starts quicker than Z4).
The zones decision logic is described as below:

Z1'
Z2'

Z4' Z2'(*)

P0476XXa

Remark: Z2'(*) if overlapping zone enabled in MiCOM S1


PDist-CS = (Z1' + Z2').CSZ2 + Z1'.CSZ1 + Reverse.CSZ4 + WI_CS
The complete logic – with DEF integrated is:

CS = PDist_CS + ( Share_Logic Share_Logic_DEF. DEF_CS) → logic with canal shared


CS_DEF = Not Share_Logic_DEF. DEF_CS → logic with canal independent

(There is a 10ms delay in drop of on the carried send to avoid a logic race between this
signal and the zone pick up.)
2.8.3.2 Inputs

Data Type Description


CSZ1 Configuration Carrier send for zone 1
CSZ2 Configuration Carrier send for zone 2
CSZ4 Configuration Carrier send for zone 4 (reverse)
Not Share_Logic_DEF Configuration DEF channel independent
Reverse' Internal Logic Fault detected Reverse
Z1' to Z4' Internal Logic Zone 1 to 4 decision
(blocked by Pswing or Rguard)
WI_CS Internal Logic Winfeed carrier send (Echo)
DEF_CS Internal Logic DEF carrier send

2.8.3.3 Outputs

Data Type Description


CS Internal Logic Main channel Carrier send
CS_DEF Internal Logic DEF channel Carrier send
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 39/286

2.8.3.4 Trip logic

IEC Standard Carrier Trip Logic Application Setting


Send MiCOM
448.15.13 PUR Z1 Z2.CR.T1 + Z1T1 + Z2.T2 + Z3T3... Z1 = 80% ZL PUP Z2
(LFZR)
or AUP
PUR2 Z2 Z2.CR.T1 + Z1.T1 + Z2.T2 + Z3T3... Z1 = 80% ZL POP Z2
POR2
(LFZR)
448.15.14 BOR1 or Z4 Z1. CR .T1.Tp + Z1.T2 + Z2T2 + Z3T3... Z1 > ZL BOP Z1
BOP
BOR2 Z4 Z2. CR .T1.Tp + Z1.T1 + Z2.T2 + Z3.T3... Z1 = 80% ZL BOP Z2
BLOCK2
(LFZR)
448.15.11 PUP or Z1 Fwd.CR.T1 + Z1.T1 + Z2.T2 +... Z1 = 80% ZL PUP Fwd
PUTT
448.15.16 POR1 or Z1 Z1.CR.T1 + Z1.T2 Z1 > ZL POP Z1
POP or Z2.T2 + Z3.T3...
POTT

2.8.3.5 Tripping modes


The tripping mode is settable (Distance scheme\Trip mode):

− Force 3P: Trip 3P in all cases

− 1PZ1 & CR: Trip 1Pole in T1 for fault in Z1 and also in case of Carrier Received
(aided Trip)

− 1PZ1, Z2 & CR: Trip 1Pole for T1 & T2 in T1 for fault in Z1 and CR (aided Trip) and
also in Z2 with CR

Several defined aided trip logic can be selected or an open logic can be designed by user
(see also section 4.5 from chapter P44x/EN HW).
P44x/EN AP/F65 Application Notes

Page 40/286 MiCOM P441/P442 & P444

Unblocking Basic
+
Aided
Schemes
+
Weak-Infeed
Trip
Distance
Protection

PSB
TOR
+ SOTF
RVG
LOL

PSB: Power swing blocking


RVG: Reversal guard
LOL: Loss of load
P0477ENa

FIGURE 7 - MIMIC DIAGRAM


The zones unblocking/blocking logic with power swing or reversal guard is managed as
explained in the scheme: Figure 3 (section 0)

• The unblocking function if enabled, carries out a function similar to Carrier receive
logic. (see explanations in section 0)

• Weak infeed allows for the case where there may be no zone pick up from local end.

• TOR & SOTF applies specific logic in case of manual closing or AR closing logic.

• Trip Distance Protection manages the trip order regarding the distance algorithm
outputs, the type of trip 1P or 3P, the distance timers, and the logic data such as
power swing blocking.

• Loss of Load manages a specific logic for tripping 3P in Z2 accelerated without carrier.
2.8.4 The Basic Scheme
The Basic distance scheme is suitable for applications where no signalling channel is
available. Zones 1, 2 and 3 are set as described in Sections 2.7.3 to 2.7.10. In general
zones 1 and 2 provide main protection for the line or cable as shown in Figure 9 below, with
zone 3 reaching further to provide back up protection for faults on adjacent circuits.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 41/286

FIGURE 8 - SETTINGS IN MiCOM S1(GROUP1\DISTANCE SCHEME\STANDARD MODE)


– 6 DIFFERENTS SETTABLE SCHEMES –

Z2A
ZL
A Z1A B

Z1B
Z2B
P3050XXa

FIGURE 9 - MAIN PROTECTION IN THE BASIC SCHEME (NO REQUIREMENT FOR SIGNALLING
CHANNEL)
Key:
A, B = Relay locations;
ZL = Impedance of the protected line.
P44x/EN AP/F65 Application Notes

Page 42/286 MiCOM P441/P442 & P444

Protection A Protection B
Z1' Z1'
& &
T1
tZ1 T1
tZ1

Z2' Z2'
& &
T2
tZ2 T2
tZ2
Trip Trip
Z3' Z3'

T3
tZ3
& ≥1 ≥1 &
T3
tZ3

Zp' Zp'
& &
Tzp
tZp Tzp
tZp

Z4' Z4'
& &
T4
tZ4 T4
tZ4

P0543ENa

FIGURE 10 - LOGIC DIAGRAM FOR THE BASIC SCHEME


Figure 10 shows the tripping logic for the Basic scheme. Note that for the P441, P442 and
P444 relays, zone timers tZ1 to tZ4 are started at the instant of fault detection, which is why
they are shown as a parallel process to the distance zones. The use of an apostrophe in the
logic (eg. the ‘ in Z1’) indicates that protection zones are stabilised to avoid maloperation for
transformer magnetising inrush current. The method used to achieve stability is based on
second harmonic current detection.
The Basic scheme incorporates the following features:
Instantaneous zone 1 tripping. Alternatively, zone 1 can have an optional time delay of 0 to
10s.
Time delayed tripping by zones 2, 3, 4, p and q. Each with a time delay set between 0 and
10s.
The Basic scheme is suitable for single or double circuit lines fed from one or both ends.
The limitation of the Basic scheme is that faults in the end 20% sections of the line will be
cleared after the zone 2 time delay. Where no signalling channel is available, then improved
fault clearance times can be achieved through the use of a zone 1 extension scheme or by
using loss of load logic, as described below. Under certain conditions however, these two
schemes will still result in time delayed tripping. Where high speed protection is required
over the entire line, then a channel aided scheme will have to be employed.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 43/286

2.8.5 Zone 1 Extension Scheme


Auto-reclosure is widely used on radial overhead line circuits to re-establish supply following
a transient fault. A Zone 1 extension scheme may therefore be applied to a radial overhead
feeder to provide high speed protection for transient faults along the whole of the protected
line. Figure 11 shows the alternative reach selections for zone 1: Z1 or the extended reach
Z1X.

Z1 Extension (A)

ZL
A Z1A B

Z1B
Z1 Extension (B)

P3052ENa

FIGURE 11 - ZONE 1 EXTENSION SCHEME DEFINIED AS DESCRIBED ABOVE


Z1 < Z1X < Z2 or Z1 < Z2 < Z1X
(with Z1 < ZL < Z1X)
In this scheme, zone 1X is enabled and set to overreach the protected line. A fault on the
line, including one in the end 20% not covered by zone 1, will now result in instantaneous
tripping followed by autoreclosure. Zone 1X has resistive reaches and residual
compensation similar to zone 1. The autorecloser in the relay is used to inhibit tripping from
zone 1X such that upon reclosure the relay will operate with Basic scheme logic only, to co-
ordinate with downstream protection for permanent faults. Thus, transient faults on the line
will be cleared instantaneously, which will reduce the probability of a transient fault becoming
permanent. The scheme can, however, operate for some faults on an adjacent line, although
this will be followed by autoreclosure with correct protection discrimination. Increased circuit
breaker operations would occur, together with transient loss of supply to a substation.
The time delays associated with extended zone Z1X are shown in Table 2 below:

Scenario Z1X Time Delay


First fault trip = tZ1
Fault trip for persistent fault on autoreclose = tZ2

TABLE 2 - TRIP TIME DELAYS ASSOCIATED WITH ZONE 1X


The Zone 1 Extension scheme is selected by setting the Z1X Enable bit in the Zone Status
function links to 1.

FIGURE 12 – SETTINGS IN MiCOM S1 (GROUP1\DISTANCE SCHEME\ZONE STATUS)


P44x/EN AP/F65 Application Notes

Page 44/286 MiCOM P441/P442 & P444

Remark: To enable the Z1X logic, the DDB "Z1X extension" cell must be linked
in the PSL (opto/reclaim time…)

FIGURE 13 - DISTANCE SCHEME WITHOUT CARRIER & Z1 EXTENDED

Z1'
&
T1

INP_Z1EXT &

None
& >1

Z1x'
T2
Z1X channel fail & & PDist_Trip
Z2'
UNB_Alarm ≥1
Z3'
&
T3

Zp'
&
Tzp

Z4'
&
T4

P0478ENa

FIGURE 14 – Z1X TRIP LOGIC


(Z1X can be used as well as the default scheme logic in case of UNB _Alarm-carrier out of
service (See unblocking logic – section 0))
2.8.5.1 Inputs

Data Type Description


None Configuration No distance scheme (basic scheme)
INP_Z1EXT Digital input Input for Z1 extended
Z1x channel fail Configuration Z1X extension enabled on channel fail (UNB-CR.
see Mode loss of guard or Loss of carrier)
UNB_Alarm Internal logic (See Unblocking logic)
Z1x’ Internal logic Z1X Decision (lock out by Power Swing)
Z1’ Internal logic Z1 Decision (lock out by Power Swing)
Z2’ Internal logic Z2 Decision (lock out by Power Swing)
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 45/286

Data Type Description


Z3’ Internal logic Z3 Decision (lock out by Power Swing)
Zp’ Internal logic Zp Decision (lock out by Power Swing)
Z4’ Internal logic Z4 Decision (lock out by Power Swing)
T1 Internal logic Elapse of distance timer 1
T2 Internal logic Elapse of distance timer 2
T3 Internal logic Elapse of distance timer 3
Tzp Internal logic Elapse of distance timer p
T4 Internal logic Elapse of distance timer 4

2.8.5.2 Outputs

Data Type Description


PDist_Dec Internal logic Trip order by Distance Protection

2.8.6 Loss of Load Accelerated Tripping (LoL)


The loss of load accelerated trip logic is shown in Figure 15. The loss of load logic provides
fast fault clearance for faults over the whole of a double end fed protected circuit for all types
of fault, except three phase. The scheme has the advantage of not requiring a signalling
channel. Alternatively, the logic can be chosen to be enabled when the channel associated
with an aided scheme has failed. This failure is detected by permissive scheme unblocking
logic, or a Channel Out of Service (COS) opto input.
Any fault located within the reach of Zone 1 will result in fast tripping of the local circuit
breaker. For an end zone fault with remote infeed, the remote breaker will be tripped in
Zone 1 by the remote relay and the local relay can recognise this by detecting the loss of
load current in the healthy phases. This, coupled with operation of a Zone 2 comparator
causes tripping of the local circuit breaker.
Before an accelerated trip can occur, load current must have been detected prior to the fault.
The loss of load current opens a window during which time a trip will occur if a Zone 2
comparator operates. A typical setting for this window is 40ms as shown in Figure 15,
although this can be altered in the menu LoL: Window cell. The accelerated trip is delayed
by 18ms to prevent initiation of a loss of load trip due to circuit breaker pole discrepancy
occurring for clearance of an external fault. The local fault clearance time can be deduced
as follows:
t = Z1d + 2CB + LDr + 18ms
Where:
Z1d = maximum downstream zone 1 trip time
CB = Breaker operating time
LDr = Upstream level detector (LoL: I<) reset time
For circuits with load tapped off the protected line, care must be taken in setting the loss of
load feature to ensure that the I< level detector setting is above the tapped load current.
When selected, the loss of load feature operates in conjunction with the main distance
scheme that is selected. In this way it provides high speed clearance for end zone faults
when the Basic scheme is selected or, with permissive signal aided tripping schemes, it
provides high speed back-up clearance for end zone faults if the channel fails.
Note that loss of load tripping is only available where 3 pole tripping is used.
P44x/EN AP/F65 Application Notes

Page 46/286 MiCOM P441/P442 & P444

Z2
Z1

Z1 Z1
Z1
Z2

LOL-A
LOL-B
&
LOL-C

18ms
0 & Trip
40ms 0
&
Z2
1

P3053ENa

FIGURE 15 - LOSS-OF-LOAD ACCELERATED TRIP SCHEME


2.8.6.1 Inputs

Data Type Description


Activ_LOL Configuration Loss of Load activated (LOL)
TRIP_Any Internal Logic Any trip (internal or external)
LOL. channel fail Configuration LOL enabled on channel fail (alarm carrier)
Force_3P_Dist Internal Logic Force Trip 3P in Distance Logic
Force_3P_DEF Configuration Force Trip 3P in DEF Logic
Activ_WI Configuration Weak-infeed activated (Trip & Echo)
WI_1pTrip Configuration WI 1Pole trip
PZ1, PZ2, PFwd, None Configuration Underreach scheme: Z1 < ZL
PZ1: permissive underreach Z1
PZ2: permissive underreach Z2
PFwd: permissive underreach forward
None: no distance scheme (basic scheme)
Z1<ZL Configuration Underreach scheme in Z1
UNB_CR_Alarm Internal Logic Carrier out of service Alarm
LOL Wind Configuration Activated time window for Loss Of Load logic
IA_LOL< Internal Logic Threshold I< for phase A in LOL logic
IB_LOL< Internal Logic Threshold I< for phase B in LOL logic
IC_LOL< Internal Logic Threshold I< for phase C in LOL logic
Flt A Internal Logic Faulty Phase A
Flt B Internal Logic Faulty Phase B
Flt C Internal Logic Faulty Phase C
Flt AB Internal Logic Faulty Phase AB
Flt BC Internal Logic Faulty Phase BC
Flt AC Internal Logic Faulty Phase AC
Z2' Internal Logic Fault in Z2 (lockout by Pswing or RGuard)
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 47/286

2.8.6.2 Outputs

Data Type Description


LOL_Trip3p Internal Logic 3P Trip by LOL logic

Activ_LOL

TRIP _Any

Force_3P_Dist Yes

Force3P_DEF 3p &
Activ WI = WI/echo &
WI_1pTrip = No

LOL. channel fail

UNB_CR_Alarm
&
&
PZ1, PZ2, PFwd ≥1
Z1<ZL

None

S
&
0 Q
R
T
LOL Wind
&
IA_LOL<

&
IB_LOL<

IC_LOL< &

≥1 T
Flt A & 0 S
LOL_Trip3P
Q
18 ms R
Flt B &

Flt C

Flt AB
&
Flt BC

Flt AC
&

Z2'
P0479ENa

FIGURE 16 – LOSS OF LOAD TRIP LOGIC


P44x/EN AP/F65 Application Notes

Page 48/286 MiCOM P441/P442 & P444

2.9 Channel-aided distance schemes


The following channel aided distance tripping schemes are available when the Standard
program mode is selected:

• Permissive Underreach Transfer Trip Schemes PUP Z2 and PUP Fwd;

• Permissive Overreach Transfer Trip Schemes POP Z2 and POP Z1;

• Weak infeed logic to supplement permissive overreach schemes;

• Unblocking logic to supplement permissive schemes;

• Blocking Schemes BOP Z2 and BOP Z1;

• Current reversal guard logic to prevent maloperation of any overreaching zone used in
a channel aided scheme, when fault clearance is in progress on the parallel circuit of a
double circuit line.
Since the version C5.X, in PUP Z2, PUP FWD, POP Z1 and POP Z2 schemes the timer TZ1
has been replaced by the timer Tp.
2.9.1 Permissive Underreach Transfer Trip Schemes PUP Z2 and PUP Fwd
To provide fast fault clearance for all faults, both transient and permanent, along the length
of the protected circuit, it is necessary to use a signal aided tripping scheme. The simplest
of these is the permissive underreach protection scheme (PUP), of which two variants are
offered in the P441, P442 and P444 relays. The channel for a PUP scheme is keyed by
operation of the underreaching zone 1 elements of the relay. If the remote relay has detected
a forward fault upon receipt of this signal, the relay will operate with no additional delay.
Faults in the last 20% of the protected line are therefore cleared with no intentional time
delay.
Listed below are some of the main features/requirements for a permissive underreaching
scheme:

• Only a simplex signalling channel is required.

• The scheme has a high degree of security since the signalling channel is only keyed
for faults within the protected line.

• If the remote terminal of a line is open then faults in the remote 20% of the line will be
cleared via the zone 2 time delay of the local relay.

• If there is a weak or zero infeed from the remote line end, (ie. current below the relay
sensitivity), then faults in the remote 20% of the line will be cleared via the zone 2 time
delay of the local relay.

• If the signalling channel fails, Basic distance scheme tripping will be available.

Z2A
ZL
A Z1A B

Z1B
Z2B

P3054XXa

FIGURE 17 - ZONE 1 AND 2 REACHES FOR PERMISSIVE UNDERREACH SCHEMES


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 49/286

2.9.1.1 Permissive Underreach Protection, Accelerating Zone 2 (PUP Z2)


This scheme is similar to that used in the other AREVA distance relays, allowing an
instantaneous Z2 trip on receipt of the signal from the remote end protection. Figure 18
shows the simplified scheme logic.
Since the version C5.X, if the remote relay has picked up in zone 2, then it will trip after the
Tp delay upon reception of the permissive signal from the other end of the line.

Send logic: Zone 1


Permissive trip logic: Zone 2 plus Channel Received.

Protection A Protection B
Signal Signal
Send Z1' Send Z1'

Z1' Z1'
tZ1 & & tZ1

Z3' Z3'
& &
tZ3 tZ3

Zp' Zp'
& &
tZp tZp

Z4'
≥1 Trip Trip
≥1 Z4'
& &
tZ4 tZ4

tZ2 tZ2
& &

Z2' Z2'

&
&

P3055ENa

FIGURE 18A - THE PUP Z2 PERMISSIVE UNDERREACH SCHEME


(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)
P44x/EN AP/F65 Application Notes

Page 50/286 MiCOM P441/P442 & P444

Protection A Protection B
Signal Signal
Send Z1' Send Z1'

Z1' Z1'
& &
tZ1 tZ1

Z3' Z3'
& &
tZ3 tZ3

Zp' Zp'
& &
tZp tZp
Trip Trip
Z4' Z4'
& &
tZ4 tZ4

tZ2 tZ2
& &
&
Z2' Z2'

& tp
tp &

P3055ENb

FIGURE 18B - THE PUP Z2 PERMISSIVE UNDERREACH SCHEME SINCE VERSION C5.X
(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 51/286

2.9.1.2 Permissive Underreach Protection Tripping via Forward Start (PUP Fwd)
This scheme is similar to that used in the AREVA EPAC and PXLN relays, allowing an
instantaneous Z2 or Z3 trip on receipt of the signal from the remote end protection. Figure
19 shows the simplified scheme logic.
Since the version C5.X, if the remote relay has picked up in a forward zone and the
underimpedance element has started, then it will trip after the Tp delay upon reception of the
permissive signal from the other end of the line.

Send logic: Zone 1


Permissive trip logic: Underimpedance Start within any Forward Distance Zone, plus
Channel Received.

Signal Protection A Protection B Signal


Send Z1' Send Z1'

Z1' Z1'

tZ1 & & tZ1

Z3' Z3'
& &
tZ3 tZ3

Zp' Zp'
tZp & &
tZp
Trip
Z4' ≥1
Trip
≥1
Z4'
&
tZ4 & tZ4
tZ2
tZ2
&
Z2' & Z2'

Fwd' Fwd'

<Z & & <Z

P3056ENa

FIGURE 19A - THE PUP FWD PERMISSIVE UNDERREACH SCHEME


(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)
P44x/EN AP/F65 Application Notes

Page 52/286 MiCOM P441/P442 & P444

Signal Protection A Protection B Signal


Send Z1' Send Z1'

Z1' Z1'
& &
tZ1 tZ1

Z3' Z3'
& &
tZ3 tZ3

Zp' Zp'
& &
tZp
tZp
Trip Trip
Z4'
& Z4'
tZ4 &
tZ4
tZ2
& tZ2
&
Z2' Z2'

Fwd’ Fwd’
tp & & tp
<Z <Z

P3056ENb

FIGURE 19B - THE PUP FWD PERMISSIVE UNDERREACH SCHEME SINCE VERSION C5.X
(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)
Key:
Fwd = Forward fault detection;
<Z = Underimpedance start by Z2 or Z3.
2.9.2 Permissive Overreach Transfer Trip Schemes POP Z2 and POP Z1
The P441, P442 and P444 relays offer two variants of permissive overreach protection
schemes (POP), having the following common features/requirements:

• The scheme requires a duplex signalling channel to prevent possible relay


maloperation due to spurious keying of the signalling equipment. This is necessary
due to the fact that the signalling channel is keyed for faults external to the protected
line.

• The POP Z2 scheme may be more advantageous than permissive underreach


schemes for the protection of short transmission lines, since the resistive coverage of
the Zone 2 elements may be greater than that of the Zone 1 elements.

• Current reversal guard logic is used to prevent healthy line protection maloperation for
the high speed current reversals experienced in double circuit lines, caused by
sequential opening of circuit breakers.

• If the signalling channel fails, Basic distance scheme tripping will be available.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 53/286

2.9.2.1 Permissive Overreach Protection with Overreaching Zone 2 (POP Z2)


This scheme is similar to that used in the AREVA LFZP and LFZR relays. Figure 20 shows
the zone reaches, and Figure 21 the simplified scheme logic. The signalling channel is keyed
from operation of the overreaching zone 2 elements of the relay. If the remote relay has
picked up in zone 2, then it will operate with no additional delay upon receipt of this signal.
The POP Z2 scheme also uses the reverse looking zone 4 of the relay as a reverse fault
detector. This is used in the current reversal logic and in the optional weak infeed echo
feature.
Since the version C5.X, the signaling channel is keyed from operation of zone 2 elements of
the relay. If the remote relay has picked up in zone 2, then it will operate with Tp delay upon
reception of the permissive signal.

Send logic: Zone 2


Permissive trip logic: Zone 2 plus Channel Received.

Z2A
ZL
A Z1A B

Z1B
Z2B

P3054XXa

FIGURE 20 - MAIN PROTECTION IN THE POP Z2 SCHEME

Protection A Protection B Signal


Signal
Send Z2' Send Z2'

Z1' Z1'
tZ1 tZ1
& &

Z3' Z3'

tZ3 & & tZ3

Zp' Zp'

tZp & & tZp


Trip Trip
Z4'
≥1 ≥1
Z4'
tZ4 & & tZ4

tZ2 tZ2
& &
Z2' Z2'

& &

P3058ENa

FIGURE 21A - LOGIC DIAGRAM FOR THE POP Z2 SCHEME


(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)
P44x/EN AP/F65 Application Notes

Page 54/286 MiCOM P441/P442 & P444

Protection A Protection B
Signal Signal
Send Z2' Send Z2'
Z1' Z1'
tZ 1 tZ 1
& &

Z3' Z3'

tZ 3 & & tZ 3

Zp' Zp'

tZ p & & tZ p
Trip Trip
Z4'
1 1
Z4'
tZ 4 & & tZ 4

tZ 2 tZ 2
& &

Z2' Z2'

tp tp
& &

P3058ENb

FIGURE 21B - LOGIC DIAGRAM FOR THE POP Z2 SCHEME SINCE VERSION C5.X
(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)

2.9.2.2 Permissive Overreach Protection with Overreaching Zone 1 (POP Z1)


This scheme is similar to that used in the AREVA EPAC and PXLN relays. Figure 22 shows
the zone reaches, and Figure 23 the simplified scheme logic. The signalling channel is keyed
from operation of zone 1 elements set to overreach the protected line. If the remote relay has
picked up in zone 1, then it will operate with no additional delay upon receipt of this signal.
The POP Z1 scheme also uses the reverse looking zone 4 of the relay as a reverse fault
detector. This is used in the current reversal logic and in the optional weak infeed echo
feature.
NOTE: Should the signalling channel fail, the fastest tripping in the Basic
scheme will be subject to the tZ2 time delay.
Since the version C5.X, the signaling channel is keyed from operation of zone 1 elements
set to overreach the protected line. If the remote relay has picked up in zone 1, then it will
operate with Tp delay upon reception of the permissive signal.

Send logic: Zone 1


Permissive trip logic: Zone 1 plus Channel Received.

Z2A
Z1A
A ZL B

Z1B
Z2B

P3059XXa

FIGURE 22 - MAIN PROTECTION IN THE POP Z1 SCHEME


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 55/286

Signal Protection A Protection B Signal


Send Z1' Send Z1'

Z2' Z2'

& & tZ2


tZ2

Z3' Z3'
& &
tZ3 tZ3

Zp' Zp'

tZp & &


tZp

Z4' ≥1 Trip Trip ≥1


Z4'
&
tZ4 & tZ4

&
&

Z1' Z1'

& &
tZ1 tZ1

P3060ENa

FIGURE 23A - LOGIC DIAGRAM FOR THE POP Z1 SCHEME


(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)

Signal Protection A Protection B Signal


Send Z1' Send Z1'

Z2 ' Z2'

& & tZ 2
tZ 2

Z3 ' Z3'
& &
tZ 3 tZ 3

Zp ' Zp'

tZ p & &
tZ p
Trip Trip
Z4 ' 1 1 Z4'
&
tZ 4 & tZ 4

&
&

Z1 ' Z1'

& &
tp tp

P3060ENb

FIGURE 24B - LOGIC DIAGRAM FOR THE POP Z1 SCHEME SINCE VERSION C5.X
(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)
P44x/EN AP/F65 Application Notes

Page 56/286 MiCOM P441/P442 & P444

2.9.3 Permissive Overreach Schemes Weak Infeed Features


Weak infeed logic can be enabled to run in parallel with all the permissive schemes. Two
options are available: WI Echo, and WI Tripping.
NOTE: The 2 modes are blocked during Fuse failure conditions.

Power swing detection

Def_Reverse

Reverse

0 &
Distance start
T
FFUS_Confirmed 150 ms
WI Logic confirmed
0
UNB_CR T
60 ms &

Pulse
Timer
200 ms
Activ_WI Echo or WI/echo

P0480ENa

FIGURE 25 - WEAK INFEED MODE ACTIVATION LOGIC

• Weak Infeed Echo


For permissive schemes, a signal would only be sent if the required signal send zone were
to detect a fault. However, the fault current infeed at one line end may be so low as to be
insufficient to operate any distance zones, and risks a failure to send the signal. Also, if one
circuit breaker had already been left open, the current infeed would be zero. These are
termed weak infeed conditions, and may result in slow fault clearance at the strong infeed
line end (tripping after time tZ2). To avoid this slow tripping, the weak infeed relay can be
set to “echo” back any channel received to the strong infeed relay (ie. to immediately send a
signal once a signal has been received). This allows the strong infeed relay to trip
instantaneously in its permissive trip zone. The additional signal send logic is:

WI logic

& WI_CS
UNB_CR
Echo send:
(NB: For UNB_CR explanation see Unblocking logic in next section 0)

• Weak Infeed Tripping


Weak infeed echo logic ensures an aided trip at the strong infeed terminal but not at the
weak infeed. The P441, P442 and P444 relays also have a setting option to allow tripping of
the weak infeed circuit breaker of a faulted line.
Three undervoltage elements, Va<, Vb< and Vc< are used to detect the line fault at the weak
infeed terminal, with a common setting typically 70% of rated phase-neutral voltage. This
voltage check prevents tripping during spurious operations of the channel or during channel
testing.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 57/286

VA<_WI
& WI_A
CB 52a_phA
& FLT_A
VB<_WI
& WI_B
CB 52a_phB
& FLT_B
VC<_WI
& WI_C
CB 52a_phC

UNB_CR & FLT_B


P0481ENa

FIGURE 26 - WEAK INFEED PHASE SELECTION LOGIC


UNB_CR is used as a filter to avoid a permanent phase selection which could be maintained
if Cbaux signals are not mapped in the PSL (when line is opened).
The additional weak infeed trip logic is:
Weak infeed trip: No Distance Zone Operation, plus reverse directional decision, plus
V<, plus Channel Received.
Weak infeed tripping is time delayed according to the WI:
Trip Time Delay value, usually set at 60ms. Due to the use of phase segregated
undervoltage elements, single pole tripping can be enabled for WI trips if required. If single
pole tripping is disabled a three pole trip will result after the time delay.

WI_A

WI_B ≥1
≥1 WI_PhaseA
WI_C &
WI/echo

Activ_WI

Trip1P_WI Yes
≥1 WI_PhaseB
&

&

≥1 WI_PhaseC

&

P0482ENa

FIGURE 27 – WEAK INFEED TRIP DECISION LOGIC


P44x/EN AP/F65 Application Notes

Page 58/286 MiCOM P441/P442 & P444

WI_Phase A

T
WI_Phase B ≥1 0

TtripWI
WI_Phase C

& WI_TripA

& WI_TripB

& WI_TripC

Autor_WI
P0531ENa

FIGURE 28 - WEAK INFEED TRIP LOGIC


2.9.3.1 Inputs

Data Type Description


Activ_WI Configuration Weak infeed mode selection (Disable, Echo,
WI/echo)
Trip1P_WI Configuration Trip 1P in Weak infeed mode
Any Pole Dead Internal Logical Minimum 1 pole is open
Distance start Internal Logical Convergency of any impedance Loop – start of
distance
Reverse Internal Logical Fault detected in Reverse direction
FFUS_Confirmed Internal Logical Fuse Failure confirmed
Power swing Internal Logical Power swing detection
UNB_CR Internal Logical Carrier Received
VA<_WI Internal Logical Phase A selection by WI
VB<_WI Internal Logical Phase B selection by WI
VC<_WI Internal Logical Phase C selection by WI
CB52a_A, CB52a_B, Internal Logical Dead Pole by phase A/B/C
CB52a_C (detected by interlocking contacts 52a/52b)
TtripWI Configuration Weak-Infeed Trip Timer

2.9.3.2 Outputs

Data Type Description


WI_CS Internal Logical Carrier Send (echo)
WI_TripA Internal Logical Trip Phase A by WI logic
WI_TripB Internal Logical Trip Phase A by WI logic
WI_TripC Internal Logical Trip Phase A by WI logic
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 59/286

2.9.3.3 PAP – Weak infeed for RTE application (since version C2.X)
(PAP= Protection Antenne Passive)
That specific request from RTE is an exclusive choice with the export Weak infeed logic:

If the PAP has been selected then the following settings are activated with MiCOM S1:
For internal logic description, check the RTE manual ref P440 user guide EF GS

2.9.4 Permissive Scheme Unblocking Logic


Two modes of unblocking logic are available for use with permissive schemes, (Blocking
schemes are excluded).
The unblocking logic creates the: "UNB_Alarm" and the: "UNB_CR" signals, which depend
upon:

• Inputs signals [binary inputs: CR (Carrier Receive) COS (Carrier Out of Service)]

• Settings used for the distance channel & DEF aided trip channel

• Shared or independent logic between DEF & Distance

• Carrier Out of Service detected


Different modes are selectable:

• None (basic mode)

• Loss of Guard mode

• Loss of Carrier mode


P44x/EN AP/F65 Application Notes

Page 60/286 MiCOM P441/P442 & P444

Two types of carrier received signals are used:

• Carrier received (INP_CR - binary input)

• Carrier Out of Service (INP_COS - binary input for distance logic) and
(INP_COS_DEF - binary input for DEF logic)
2.9.4.1 None

The status of opto is copied directly:

UNB_ALARM = INP_COS + INP_COS_DEF


UNB_CR = INP_CR
UNB_CR_DEF = INP_CR_DEF

2.9.4.2 Loss of Guard Mode


This mode is designed for use with frequency shift keyed (FSK) power line carrier
communications. When the protected line is healthy a guard frequency is sent between line
ends, to verify that the channel is in service. However, when a line fault occurs and a
permissive trip signal must be sent over the line, the power line carrier frequency is shifted to
a new (trip) frequency. Thus, distance relays should receive either the guard, or trip
frequency, but not both together. With any permissive scheme, the PLC communications are
transmitted over the power line which may contain a fault. So, for certain fault types the line
fault can attenuate the PLC signals, so that the permissive signal is lost and not received at
the other line end. To overcome this problem, when the guard is lost and no “trip” frequency
is received, the relay opens a window of time during which the permissive scheme logic acts
as though a “trip” signal had been received. Two opto inputs to the relay need to be
assigned, one is the Channel Receive opto, the second is designated Loss of Guard (the
inverse function to guard received). The function logic is summarised in Table 3.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 61/286

System Permissive Loss of Permissive Trip Alarm


Condition Channel Guard Allowed Generated
Received
Healthy Line No No No No
Internal Line Fault Yes Yes Yes No
Unblock No Yes Yes, during a Yes, delayed on
150ms window pickup by 150ms
Signalling Yes No No Yes, delayed on
Anomaly pickup by 150ms

TABLE 3 - LOGIC FOR THE LOSS OF GUARD FUNCTION


The window of time during which the unblocking logic is enabled starts 10ms after the guard
signal is lost, and continues for 150ms. The 10ms delay gives time for the signalling
equipment to change frequency as in normal operation.
For the duration of any alarm condition, zone 1 extension logic will be invoked if the option
Z1 Ext on Chan. Fail has been Enabled.

150 ms

0
S
=1 Q UNB Alarm
R
Pulse Timer
Indicates by digital input
200 ms
the Loss of guard

INP COS

&
INP CR
≥1 UNB CR

10 ms

0
S
&
Q
R
Pulse Timer
150 ms

P3061ENa

FIGURE 29 - LOSS OF GUARD LOGIC

INP_CR INP_COS UNB_CR UNB_Alarm


0 0 0 0
1 1 1 0
0 1 1 (Window) 1 (delayed)
1 0 0 1 (delayed)
P44x/EN AP/F65 Application Notes

Page 62/286 MiCOM P441/P442 & P444

2.9.4.3 Loss of Carrier


In this mode the signalling equipment used is such that a carrier/data messages are
continuously transmitted across the channel, when in service. For a permissive trip signal to
be sent, additional information is contained in the carrier (eg. a trip bit is set), such that both
the carrier and permissive trip are normally received together. Should the carrier be lost at
any time, the relay must open the unblocking window, in case a line fault has also affected
the signalling channel. Two opto inputs to the relay need to be assigned, one is the Channel
Receive opto, the second is designated Loss of Carrier (the inverse function to carrier
received). The function logic is summarised in Table 4.

System Permissive Loss of Permissive Trip Alarm


Condition Channel Guard Allowed Generated
Received
Healthy Line No No No No
Internal Line Fault Yes No Yes No
Unblock No Yes Yes, during a Yes, delayed on
150ms window pickup by 150ms
Signalling No Yes No Yes, delayed on
Anomaly pickup by 150ms

TABLE 4 - LOGIC FOR THE LOSS OF CARRIER FUNCTION


The window of time during which the unblocking logic is enabled starts 10ms after the guard
signal is lost, and continues for 150ms.
For the duration of any alarm condition, zone 1 extension logic will be invoked if the option
Z1 Ext on Chan. Fail has been Enabled.

150 ms

0 S
Q UNB Alarm
R
Pulse Timer

Indicates by digital input 200 ms


the Loss of Carrier

INP COS
&
UNB CR
INP CR ≥1

10 ms

0
S
&
Q
R
Pulse Timer
150 ms

P3062ENa

FIGURE 30 - LOSS OF CARRIER


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 63/286

INP_CR INP_COS UNB_CR UNB_Alarm


0 0 0 0
0 1 1 (Window) 1 (delayed)
1 0 1 0
1 1 0 1 (delayed)

NOTE: For DEF the logic will used depende upon which settings are enabled:

• Same channel (shared)


In this case, the DEF channel is the Main Distance channel signal (the scheme & contacts of
carrier received will be identical)

• Independent channel (2 Different channels) – (2 independent contacts)


2.9.4.4 Inputs

Data Type Description


INP_CR Digital input Distance channel carrier received
INP_CR_DEF Digital input DEF channel carrier received
INP_COS Digital input Carrier Out of Service - Distance channel
INP_COS_DEF Digital input Carrier Out of Service – DEF channel

2.9.4.5 Outputs

Data Type Description


UNB_CR internal logic Internal carrier received – Distance channel
UNB_CR _DEF internal logic Internal carrier received – DEF channel
UNB_Alarm internal logic Alarm channel Main & DEF

2.9.5 Blocking Schemes BOP Z2 and BOP Z1


The P441, P442 and P444 relays offer two variants of blocking overreach protection
schemes (BOP). With a blocking scheme, the signalling channel is keyed from the reverse
looking zone 4 element, which is used to block fast tripping at the remote line end. Features
are as follows:

• BOP schemes require only a simplex signalling channel.


• Reverse looking Zone 4 is used to send a blocking signal to the remote end to prevent
unwanted tripping.
• When a simplex channel is used, a BOP scheme can easily be applied to a multi-
terminal line provided that outfeed does not occur for any internal faults.
• The blocking signal is transmitted over a healthy line, and so there are no problems
associated with power line carrier signalling equipment.
• BOP schemes provides similar resistive coverage to the permissive overreach
schemes.
• Fast tripping will occur at a strong source line end, for faults along the protected line
section, even if there is weak or zero infeed at the other end of the protected line.
• If a line terminal is open, fast tripping will still occur for faults along the whole of the
protected line length.
• If the signalling channel fails to send a blocking signal during a fault, fast tripping will
occur for faults along the whole of the protected line, but also for some faults within
the next line section.
P44x/EN AP/F65 Application Notes

Page 64/286 MiCOM P441/P442 & P444

• If the signalling channel is taken out of service, the relay will operate in the
conventional Basic mode.

• A current reversal guard timer is included in the signal send logic to prevent unwanted
trips of the relay on the healthy circuit, during current reversal situations on a parallel
circuit.

• To allow time for a blocking signal to arrive, a short time delay on aided tripping, Tp,
must be used, as follows:
Recommended Tp setting = Max. signalling channel operating time + 14ms
2.9.5.1 Blocking Overreach Protection with Overreaching Zone 2 (BOP Z2)
This scheme is similar to that used in the other AREVA distance relays. Figure 31 shows the
zone reaches, and Figure 32 the simplified scheme logic. The signalling channel is keyed
from operation of the reverse zone 4 elements of the relay. If the remote relay has picked up
in zone 2, then it will operate after the Tp delay if no block is received.

Send logic: Reverse Zone 4


Trip logic: Zone 2, plus Channel NOT Received, delayed by Tp.

Z4A Z2A
ZL
A Z1A B

Z1B Z4B
Z2B

P3063XXa

FIGURE 31 - MAIN PROTECTION IN THE BOP Z2 SCHEME

Protection A Protection B
Signal
Emission Signal
Emission
Send Z4'
Téléac Send Z4'
Téléac

Z1' Z1'

tZ1 & & tZ1


T1 T1

Z3' Z3'
& &
tZ3
T3 tZ3
T3

Zp' Zp'
& &
tZp
Tzp tZp
Trip Tzp
≥1 Trip ≥1
Z4' Z4'
& &
tZ4
T4 tZ4
T4

Tp Tp
& &

Z2' Z2'
tZ2
T2 & & tZ2
T2

P0533ENa

FIGURE 32 - LOGIC DIAGRAM FOR THE BOP Z2 SCHEME


(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 65/286

2.9.5.2 Blocking Overreach Protection with Overreaching Zone 1 (BOP Z1)


This scheme is similar to that used in the AREVA EPAC and PXLN relays. Figure 33 shows
the zone reaches, and Figure 34 the simplified scheme logic. The signalling channel is
keyed from operation of the reverse zone 4 elements of the relay. If the remote relay has
picked up in overreaching zone 1, then it will operate after the Tp delay if no block is
received.
NOTE: The fastest tripping is always subject to the Tp delay.

Send logic: Reverse Zone 4


Trip logic: Zone 1, plus Channel NOT Received, delayed by Tp.

Z4A Z2A
Z1A
A ZL B

Z1B
Z4B
Z2B

P3065XXa

FIGURE 33 - MAIN PROTECTION IN THE BOP Z1 SCHEME

Signal Protection A Protection B Signal


Send Z4' Send Z4'

Z2' Z2'
tZ2 & & tZ2

Z3' Z3'
& &
tZ3 tZ3

Zp' Zp'
& &
tZp tZp

≥1 Trip Trip ≥1
Z4' Z4'
& &
tZ4 tZ4

&
&

Z1' Z1'
tZ1 tZ1
& &
Tp Tp

P3066ENa

FIGURE 34 - LOGIC DIAGRAM FOR THE BOP Z1 SCHEME


(SEE TRIP LOGIC TABLE IN SECTION 2.8.3.4)
P44x/EN AP/F65 Application Notes

Page 66/286 MiCOM P441/P442 & P444

2.10 Distance schemes current reversal guard logic


For double circuit lines, the fault current direction can change in one circuit when circuit
breakers open sequentially to clear the fault on the parallel circuit. The change in current
direction causes the overreaching distance elements to see the fault in the opposite direction
to the direction in which the fault was initially detected (settings of these elements exceed
150% of the line impedance at each terminal). The race between operation and resetting of
the overreaching distance elements at each line terminal can cause the Permissive
Overreach, and Blocking schemes to trip the healthy line. A system configuration that could
result in current reversals is shown in Figure 35. For a fault on line L1 close to circuit breaker
B, as circuit breaker B trips it causes the direction of current flow in line L2 to reverse.

t2(C) t2(D)
Fault Fault
A L1 B A L1 B

Strong Weak
source C L2 D source C L2 D

Note how after circuit breaker B on line L1 opens


the direction of current flow in line L2 is reversed.
P3067ENa

FIGURE 35 - CURRENT REVERSAL IN DOUBLE CIRCUIT LINES


(See the zone’ description in section 2.4 – unblock/blocking logical scheme)
2.10.1 Permissive Overreach Schemes Current Reversal Guard
The current reversal guard incorporated in the POP scheme logic is initiated when the
reverse looking Zone 4 elements operate on a healthy line. Once the reverse looking Zone 4
elements have operated, the relay’s permissive trip logic and signal send logic are inhibited
at substation D (Figure 35). The reset of the current reversal guard timer is initiated when the
reverse looking Zone 4 resets. A time delay tREVERSAL GUARD is required in case the
overreaching trip element at end D operates before the signal send from the relay at end C
has reset. Otherwise this would cause the relay at D to over trip. Permissive tripping for the
relays at D and C substations is enabled again, once the faulted line is isolated and the
current reversal guard time has expired. The recommended setting is:
tREVERSAL GUARD = Maximum signalling channel reset time + 35ms.
NOTE: Since software version D2.0, the reverse guard begins when “reverse”
falls and not when the directional is reverse and immediately forward.
It is validated if the directional becomes forward.
2.10.2 Blocking Scheme Current Reversal Guard
The current reversal guard incorporated in the BOP scheme logic is initiated when a blocking
signal is received to inhibit the channel-aided trip. When the current reverses and the
reverse looking Zone 4 elements reset, the blocking signal is maintained by the timer
tREVERSAL GUARD. Thus referring to Figure 35, the relays in the healthy line are
prevented from over tripping due to the sequential opening of the circuit breakers in the
faulted line. After the faulty line is isolated, the reverse-looking Zone 4 elements at
substation C and the forward looking elements at substation D will reset. The recommended
setting is:
Where Duplex signalling channels are used:
tREVERSAL GUARD = Maximum signalling channel operating time + 14ms.
Where Simplex signalling channels are used:
tREVERSAL GUARD = Maximum signalling channel operating time -
minimum signalling channel reset time + 14ms.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 67/286

2.11 Distance schemes in the “open” programming mode


When a scheme is required which is not covered in the Standard modes above, the Open
programming mode can be selected. The user then has the facility to decide which distance
relay zone is to be used to key the signalling channel, and what type of aided scheme runs
when the channel is received. The signal send zone options are shown in Table 5, and the
aided scheme options on channel receipt are shown in Table 6.

Setting Signal Send Zone Function


None No Signal Send To configure a Basic scheme.
CsZ1 Zone 1 To configure a Permissive scheme.
CsZ2 Zone 2 To configure a Permissive scheme.
CsZ4 Zone 4 To configure a Blocking scheme.

TABLE 5 - SIGNAL SEND ZONES IN OPEN SCHEMES

Setting Aided Scheme Function


None None To configure a Basic scheme.
PermZ1 To configure a Permissive scheme where Zone 1 can only trip if a
channel is received.
PermZ2 To configure a Permissive scheme where Zone 2 can trip without
waiting for tZ2 timeout if a channel is received.
PermFwd To configure a Permissive scheme where any forward distance zone
start will cause an aided trip if a channel is received.
BlkZ1 To configure a Blocking scheme where Zone 1 can only trip if a
channel is NOT received.
BlkZ2 To configure a Blocking scheme where Zone 2 can trip without waiting
for tZ2 timeout if a channel is NOT received.

TABLE 6 - AIDED SCHEME OPTIONS ON CHANNEL RECEIPT


Where appropriate, the tREVERSAL GUARD and Tp timer (in case of blocking scheme for
covering the time transmission) settings will appear in the relay menu. Further customising
of distance schemes can be achieved using the Programmable Scheme Logic to condition
send and receive logic.
2.12 Switch On To Fault and Trip On Reclose protection
Switch on to fault protection (SOTF) is provided for high speed clearance of any detected
fault immediately following manual closure of the circuit breaker. SOTF protection remains
enabled for 500ms following circuit breaker closure, detected via the CB Man Close input or
CB close with CB control or Internal detection with all pole dead (see Figure 38), or for the
duration of the close pulse on internal detection.
Since version C5.X, the SOFT I>3 enabled setting is included in the SOFT/TOR mode
[Instantaneous three pole tripping (and auto-reclose blocking) can be also selected (AR lock
out by BAR Figure 92 in AR section)– See BAR logic in Figure 92 AR description section].
Trip on reclose protection (TOR) is provided for high speed clearance of any detected fault
immediately following autoreclosure of the circuit breaker.
Instantaneous three pole tripping (TOR logic) can be selected for faults detected by various
elements, (See MiCOM S1 settings description above). TOR protection remains enabled for
500ms following circuit breaker closure. The use of a TOR scheme is usually advantageous
for most distance schemes, since a persistent fault at the remote end of the line can be
cleared instantaneously after reclosure of the breaker, rather than after the zone 2 time
delay.
P44x/EN AP/F65 Application Notes

Page 68/286 MiCOM P441/P442 & P444

The options for SOTF and TOR are found in the “Distance Schemes” menu.

(7 additional settable bits are available from version A3.1)

Setting range
Menu text Default setting Step size
Min Max
GROUP 1
DISTANCE SCHEMES
TOR-SOTF Mode TOR Bit 0: TOR Z1 Enabled,
Dist scheme Bit 1: TOR Z2 Enabled,
Bit 0 to 4
Bit 2: TOR Z3 Enabled,
Default: bit 4
Bit 3: TOR All Zones,
15 bits Bit 4: TOR Dist. Scheme .
SOTF all Zones Bit 5: SOTF All Zones
Bit 5 to E Bit 6: SOTF Lev. Detect.
Default: bit 5 From version A3.1:
Bit 7: SOTF Z1 Enabled
Bit 8: SOTF Z2 Enabled
Bit 9: SOTF Z3 Enabled
Bit A: SOTF Z1+Rev
Bit B: SOTF Z2+Rev
Bit C: SOTF Dist. Scheme
Bit D: SOTF Disabled
From version C5.x:
Bit E: SOTF I>3 Enabled
SOTF Delay 110sec 10sec 3600sec 1 sec
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 69/286

2.12.1 Initiating TOR/SOTF Protection


SOTF/TOR Activated
2 signals are issued from the logic: TOR Enable - SOTF Enable (See DDB description in
appendix from that chapter). There is a difference between them due to the AR (internal or
external) which must be blocked in SOTF logic.
The detection of open pole is based on the activation of: Any Pole Dead (at least one pole
opened). It is a OR logic between the internal analog detection (level detectors) or the
external detection (given by CB status: 52A/52B, which is requested in case of VT Bus side).
The Dead pole Level Detectors V< and I< per phase are settable as described belows:
− V< is either a fixed threshold 20% Vn or equal to V Dead Line threshold of the check
synchro function if enabled, (default value for V< dead line = 20% VN)
− I< is either a fixed threshold of 5% In or equal to the I< threshold of the Breaker
Failure protection (default value for I< CB fail = 5% IN).
TOR Enable logic is activated in 2 cases:
1. When internal AR is activated or when the reclaim signal from an external AR is
connected to a digital input (opto):
As soon as the reclaim time starts, the « TOR Enable » is activated . It will be reset at the
end of the internal or external reclaim time.
2. Without any reclaim time (internal AR disabled or external opto input Reclaim Time not
assigned in the PSL):
TOR Enable will be activated during a 200 ms time window, following the detection of pole
dead detection. The TOR logic will be reset (TOR Enable) ONLY 500 ms after the drop off of
any pole dead detection.
This behaviour has been designed to avoid any maloperation on a parallel line, in case of an
incorrect Any Pole Dead detection performed by the internal level detectors (Ex: Fault front
of Busbar on a parallel line and weak source on the other end of the line).
A delay of 200ms will allow the adjacent line to be tripped and the level detectors will then
reset the timer:
• TOR protection logic is enabled any time that any circuit breaker pole has been open
longer than 200ms but not longer than 110s default value (ie. First shot autoreclosure
is in progress)- the timer is configurable from version A3.0 /allows variation of the
duration when dead pole is detected before the internal logic detects line dead and
activates the SOTF logic and also where the relay logic detects that further delayed
autoreclose shots are in progress.

Trip

Reclosing

Any Pole Dead

200 ms 500 ms
TOR Enable

P0532ENa

• SOTF protection is enabled any time that the circuit breaker has been open 3 pole for
longer than 110s, that timer is configurable from version A3.0 /allows variation of the
duration when dead pole is detected before the internal logic detects line dead and
activates the SOTF logic and autoreclosure is not in progress. Thus, SOTF protection
is enabled for manual reclosures, not for autoreclosure.
P44x/EN AP/F65 Application Notes

Page 70/286 MiCOM P441/P442 & P444

SOTF Enable logic is activated in 2 cases:

1. If no external closing command (manual or by remote communication via control


system) is present:
When the internal levels detectors have detected a three pole open for more than 110 s
(settable from A3.0); as soon as all poles are closed, then SOTF is enabled for 500 ms and
then reset,

2. When an external closing command (manual or by remote communication via control


system) is present:
The SOTF logic is activated immediately. As soon as all the poles are closed (after the
external closing order if a synchro condition is used in the PSL); SOTF is enabled for 500 ms
and then is reset.

AR_RECLAIM
Pulse
>1
T
INP_RECLAIM >1 TOR Enable
500 ms
1P or 3P AR

INP_RECLAIM >1
Assigned
T
& 0
200 ms S
Q
>1
>1 R
Any Pole Dead 0
T
500 ms
>1
R
T Q SOTF Enable
All Pole Dead
0 S
>1
TSOTF Enable &
SOTF (by default:110 s)
disabled

CBC_Closing Order

CB_Control &
activated

&
INP_CB_Man_Close
P0485ENb

FIGURE 36 – SOTF/TOR LOGIC - START


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 71/286

2.12.2 TOR-SOTF Trip Logic


During the TOR/SOTF 500ms window, individual distance protection zones can be enabled
or disabled by means of the TOR-SOTF Mode function links (TOR logic Bit0 to Bit4 & SOTF
logic Bit5 to BitD). Setting the relevant Bit to 1 will enable that zone, setting Bits to 0 will
disable distance zones. When enabled (Bit = 1), the zones will trip without waiting for their
usual time delays. Thus tripping can even occur for close-up three phase short circuits
where line connected VTs are used, and memory voltage for a directional decision is
unavailable. Setting “All Zones Enabled” allows instantaneous tripping to occur for all faults
within the trip characteristic shown in Figure 37 below. Note, the TOR/SOTF element has
second harmonic current detection, to avoid maloperation where power transformers are
connected in-zone, and inrush current would otherwise cause problems. Harmonic blocking
of distance zones occurs when the magnitude of the second harmonic current exceeds 25%
of the fundamental.

Zone 4

Zone 3
Directional
line (not used)
P0535ENa

FIGURE 37 - “ALL ZONES” DISTANCE CHARACTERISTIC AVAILABLE FOR SOTF/TOR TRIPPING


Test results from different settings selected in MiCOM S1.
WARNING: MiCOM S1 DOES NOT DYNAMICALLY CHANGE THE SETTINGS, AND
ONE SETTING MAY AFFECT ANOTHER.
SOTF Z2: means that an instantaneous 3 pole trip will occur for fault in Z1 or Z2 without
waiting for the distance timer T1 or T2 to elapse.
T0 = instantaneous Trip
Ts = Trip at the end of SOTF time window (500ms)
T1 = 0, T2=200ms, Tzp=400ms, T3=600ms, T4=1s (Distance timer).
The fault is maintained with a duration bigger than the 500msec SOTF time, until a trip
occurs.
P44x/EN AP/F65 Application Notes

Page 72/286 MiCOM P441/P442 & P444

SOTF Trip logic results

Type of Fault
Fault in Zp Fault in Zp
Fault in Z1 Fault in Z2 Fault in Z3 Fault in Z4
Fwd Rev
SOTF selected Logic
SOTF All Zone SOTF trip SOTF trip SOTF trip Same result SOTF trip SOTF trip
(Zp Fwd) T0 T0 T0 if Zp Rev T0 T0
T0

SOTF Z1 SOTF trip DIST trip DIST trip x DIST trip DIST trip
(Zp Fwd) T0 T2 TZp T3 T4

SOTF Z2 SOTF trip SOTF trip DIST trip x DIST trip DIST trip
(Zp Fwd) T0 T0 TZp T3 T4
SOTF Z3 SOTF trip SOTF trip SOTF trip x SOTF trip DIST trip
(Zp Fwd) T0 T0 T0 T0 T4
SOTF Z1+Rev (Zp Fwd) SOTF trip DIST trip DIST trip x DIST trip SOTF trip
T0 T2 TZp T3 T0
SOTF Z2+Rev (Zp Fwd) SOTF trip SOTF trip DIST trip x DIST trip SOTF trip
T0 T0 TZp T3 T0
SOTF Z1+Rev (Zp Rev) SOTF trip DIST trip x SOTF trip DIST trip DIST trip
T0 T2 T0 T3 T4
SOTF Z2+Rev (Zp Rev) SOTF trip SOTF trip x SOTF trip DIST trip DIST trip
T0 T0 T0 T3 T4
SOTF Dist. Sch. (Zp fwd) SOTF trip SOTF trip SOTF trip x SOTF trip SOTF trip
(With a 3Plogic) T1 T2 TZp T3 T4
SOTF Disable DIST trip DIST trip DIST trip x DIST trip DIST trip
(Distance scheme & 1P) T1* T2 TZp* T3 T4
No setting in SOTF DIST trip DIST trip DIST trip x DIST trip DIST trip
(All Bits at 0) & No I>3 T1* T2 TZp T3 T4
Level detectors SOTF trip SOTF trip SOTF trip x SOTF trip SOTF trip
T0 T0 T0 T0 T0
*No Ban Tri: Distance trip logic is applied without any 3P trip logic forced by SOTF.
TOR Trip logic results

Type of Fault
Fault in Zp Fault in Zp
Fault in Z1 Fault in Z2 Fault in Z3 Fault in Z4
Fwd Rev
TOR selected Logic
TOR All Zone TOR trip TOR trip TOR trip TOR trip TOR trip TOR trip
(Zp Fwd) T0 T0 T0 T0 T0 T0
TOR Z1 Enabled TOR trip Dist trip Dist trip Dist trip Dist trip Dist trip
(Zp Fwd) T0 T2 Tp Tp T3 T4
TOR Z2 Enabled TOR trip TOR trip Dist trip Dist trip Dist trip Dist trip
(Zp Fwd) T0 T0 Tp Tp T3 T4
TOR Z3 Enabled TOR trip TOR trip TOR trip Dist trip TOR trip Dist trip
(Zp Fwd) T0 T0 T0 Tp T0 T4
TOR Dist.Scheme Dist trip Dist trip Dist trip Dist trip Dist trip Dist trip
(logic POP/PUP) T1 T2 Tp Tp T3 T4
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 73/286

2.12.3 Switch on to Fault and Trip on Reclose by I>3 Overcurrent Element (not filtered for inruch
current):
Inside the 500 ms time window initiated by SOTF/TOR logic, an instantaneous 3 phases trip
logic will be issued, if a faulty current is measured over the I>3 threshold value (adjusted in
MiCOM S1).

After the 500 ms TOR/SOTF time windows has ended, the I>3 overcurrent element remains
in service with a trip time delay equal to the setting I>3 Time Delay. This element would trip
for close-up high current faults, such as those where maintenance earth clamps are
inadvertently left in position on line energisation.
2.12.4 Switch on to Fault and Trip on Reclose by Level Detectors
TOR/SOTF level detectors (Bit6 in SOTF logic), allows an instantaneous 3 phases tripping
from any low set I< level detector, provided that its corresponding Live Line level detector
has not picked up within 20ms. When closing a circuit breaker to energize a healthy line,
current would normally be detected above setting, but no trip results as the system voltage
rapidly recovers to near nominal. Only when a line fault is present will the voltage fail to
recover, resulting in a trip.

• SOTF/TOR trip by level detectors per phase: If Vphase< 70% Vn AND if Iphase> 5% In
during 20 ms (to avoid any maloperation due to unstable contact during reclosing
order), an instantaneous trip order is issued.
P44x/EN AP/F65 Application Notes

Page 74/286 MiCOM P441/P442 & P444

The logic diagram for this, and other modes of TOR/SOTF protection is shown in Figure 38:

T
Va > & 0 & TOC A

Ia < 20 ms
T
Vb >
& 0 & TOC B

Ib <
20 ms
Vc > T
& 0 & TOC C
Ic <
20 ms
SOTF LD Enable LD Enable

SOTF All Zones Enable


&
All Zones
SOTF Z1 Enable
&
Z1

≥1
SOTF Z1 + rev Enable & &
Zp
&
Z4

Zp Reverse &

SOTF Z2 + rev Enable &


Z1 + Z2

SOTF Z2 Enable &

SOTF Z3 Enable
&
Z1 + Z2 + Z3

Dist. Scheme Enable


&
Dist. Trip ≥1 SOTF/TOR trip

PHO C_Start_3 Ph_I>3

SOTF Enable

TOR Z1 Enable
&
Z1

TOR Z2 Enable

Z1 + Z2 &

TOR Z3 Enable
& ≥1
Z1 + Z2 + Z3
&
TOR All Zones Enable &
All Zones

Dist. Scheme Enable &


Dist. Trip

TOR Enable

P0486ENb

FIGURE 38 - SWITCH ON TO FAULT AND TRIP ON RECLOSE LOGIC DIAGRAM


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 75/286

2.12.5 Setting Guidelines

• When the overcurrent option is enabled, the I>3 current setting applied should be
above load current, and > 35% of peak magnetising inrush current for any connected
transformers as this element has no second harmonic blocking. Setting guidelines for
the I>3 element are shown in more detail in Table below.

• When a Zone 1 Extension scheme is used along with autoreclosure, it must be


ensured that only Zone 1 distance protection can trip instantaneously for TOR.
Typically, TOR-SOTF Mode bit 0 only would be set to “1”. Also the I>3 element must
be disabled to avoid overreaching trips by level detectors.
2.12.5.1 Inputs

Data Type Description


Ia<, Ib<, Ic< Internal Logic No current detected (I< threshold, by default 5% In
or I< CB fail)
Dist Trip Internal Logic Trip by Distance logic
AR_RECLAIM Internal Logic Internal AR reclaim in progress
INP_RECLAIM Digital Input External AR in progress (by opto)
CBC_closing order Internal Logic Closing order in progress by CB Control
INP_CB_Man_Close Digital Input CB Closing order (by opto)
CB Control activated Configuration CB control activated
1P or 3 P AR Configuration 1P or 3P AR enabled
TOR Zi Enable Configuration TOR logic enabled in case of fault in Zi
TOR All Zones Enable Configuration TOR logic enabled in case for all zones (Distance
Start)
Dist. Scheme Enable Configuration Distance scheme aided Trip logic applied
SOTF LD Enable Configuration Levels detectors in SOTF activated
SOTF All Zones Enable Configuration SOTF logic enabled for all zones (Distance Start)
Va>, Vb>, Vc> Internal Logic Live Voltage detected ( V Live Line threshold, fixed
at 70% Vn)
Valid_stx_PHOC Configuration Threshold I>3 must be activated
PHOC_Start_3Ph_I>3 Internal Logic Detection by I>3 overcurrents (not filtered by
INRUSH.)
Z1, Z2, Z3, all zones Internal Logic Zones Detected

2.12.5.2 Outputs

Data Type Description


TOC_A Internal Logic Trip phase A by TOR /SOTF
TOC_B Internal Logic Trip phase B by TOR /SOTF
TOC_C Internal Logic Trip phase C by TOR /SOTF
SOTF/TOR trip Internal Logic Trip by SOTF (manual close) or TOR (AR close)
logic
P44x/EN AP/F65 Application Notes

Page 76/286 MiCOM P441/P442 & P444

2.12.6 Inputs /Outputs in SOTF-TOR DDB Logic


See also, DDB description in appendix of the same section.
2.12.6.1 Inputs

Man Close CB
Digital input (opto) 6 is assigned by default PSL to "Man Close CB"
The DDB Man Close CB if assigned to an opto input in PSL and when energized, will initiate
the internal SOTF logic enable (see Figure 36) without CB control.
If CB control is activated SOTF will be enable by internal detection (CB closing order
managed by CB control).

AR Reclaim
The DDB AR Reclaim if assigned to an opto input in PSL and when energized, will start the
internal logic TOR enable (see Figure 36).- (External AR logic applied).

CB aux A
CB aux B
CB aux C
The DDB CB Aux if assigned to an opto input in PSL and when energized, will be used for
Any pole dead & All pole dead internal detection.
2.12.6.2 Outputs

SOTF Enable
The DDB SOTF Enable if assigned in PSL, indicates that SOTF logic is enabled in the relay
– see logic description in Figure 38

TOR Enable
The DDB TOR Enable if assigned in PSL, indicates that TOR logic is activated in the relay -
see logic description in Figure 38

TOC Start A
The DDB TOC Start A if assigned in PSL, indicates a Tripping order on phase A issued by
the SOTF levels detectors - see Figure 38

TOC Start B
The DDB TOC Start B if assigned in PSL, indicates a Tripping order on phase B issued by
the SOTF levels detectors - see Figure 38

TOC Start C
The DDB TOC Start C if assigned in PSL, indicates a Tripping order on phase C issued by
the SOTF levels detectors - see Figure 38

Any Pole Dead


The DDB Any Pole Dead if assigned in PSL, indicates that at least one pole is opened
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 77/286

All Pole Dead


The DDB All Pole Dead if assigned in PSL, indicates all pole are dead (All 3 poles are
opened)

SOTF/TOR Trip
The DDB SOTF/TOR Trip if assigned in PSL, indicates a 3poles trip by TOR or SOTF logic -
see Figure 38
2.13 Power swing blocking (PSB) (“Power swing” menu)
2.13.1 Description
Power swings are oscillations in power flow which can follow a power system disturbance.
They can be caused by sudden removal of faults, loss of synchronism across a power
system or changes in direction of power flow as a result of switching. Such disturbances can
cause generators on the system to accelerate or decelerate to adapt to new power flow
conditions, which in turn leads to power swinging. A power swing may cause the impedance
presented to a distance relay to move away from the normal load area and into one or more
of its tripping characteristics. In the case of a stable power swing it is important that the relay
should not trip. The relay should also not trip during loss of stability since there may be a
utility strategy for controlled system break up during such an event.
Since version C2.x, an out of step function has been integrated in the firmware.That logic
manage the start of the OOS by the monitoring of the sign of the biphase loops:

∆X
Zone C
X lim
Z3 ∆R

Zone A
Zone B +R
-R
Out Of Step +R Stable swing
-R lim R lim
R
Z4 -X lim
+R
P0885ENa

New settings (Delta I) have been created also in Power swing (stable swing) with Delta I as a
criteria for unblocking the Pswing logic in case of 3 phase fault (see 2.13.2 in the AP
chapter).
Phase selection has been improved with exaggerated Deltas current.
P44x/EN AP/F65 Application Notes

Page 78/286 MiCOM P441/P442 & P444

− New DDB:

Since version C5.X, when power swing blocking is detected, the resistive reaches of every
distance zone are no longer R3/R4. Instead they are kept the same as adjusted.

Menu text Default setting Setting range Step size


Min Max
GROUP 1
POWER SWING
Delta R 0.5/In Ω 0 400/In Ω 0.01/In Ω
Delta X 0.5/In Ω 0 400/In Ω 0.01/In Ω
IN > Status Enabled Disabled or Enabled
IN > (% Imax) 40% 10% 100% 1%
I2 > Status Enabled Disabled or Enabled
I2 > (% Imax) 30% 10% 100% 1%
Imax line > Status Enabled Disabled or Enabled
Imax line > 3 x In 1 x In 20 x In 0.01 x In
(1)
Delta I Status Enabled Disabled or Enabled
Unblocking Time delay 30s 0 30s 0.1s
Blocking Zones 00000000 Bit 0: Z1/Z1X Block, Bit 1: Z2 Block,
Bit 2: Zp Block, Bit 3: Zq Block, Bit 4: Z3
Block, Z5: Z4 Block
Out of Step (1) 1 1 255 1
Stable swing (1) 1 1 255 1
(1)
Since version C2.x
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 79/286

2.13.2 The Power Swing Blocking Element


PSB can be disabled on distribution systems, where power swings would not normally be
experienced.
Operation of the PSB element is menu selectable to block the operation of any or all of the
distance zones (including aided trip logic) or to provide indication of the swing only. The
Blocked Zones function links are set to 1 to block zone tripping, or set to 0 to allow tripping
as normal. Power swing detection uses a ∆R (resistive) and ∆X (reactive) impedance band
which surrounds the entire phase fault trip characteristic. This band is shown in Figure 39
below:

∆X

Zone 3

Power
swing
∆R ∆R bundary

Zone 4

∆X

P3068ENa

FIGURE 39 - POWER SWING DETECTION CHARACTERISTICS

FIGURE 40 - POWER SWING SETTINGS (SET HIGHZONE IS LOCKED OUT)


P44x/EN AP/F65 Application Notes

Page 80/286 MiCOM P441/P442 & P444

A fault on the system results in the measured impedance rapidly crossing the ∆R band, en
route to a tripping zone. Power swings follow a much slower impedance locus. A power
swing is detected where all three phase-phase measured impedances have remained within
the ∆R band for at least 5ms, and have taken longer than 5ms to reach the trip characteristic
(the trip characteristic boundary is defined by zones 3 and 4). PSB is indicated on reaching
zone 3 or zone 4. Typically, the ∆R and ∆X band settings are both set with: 0.032 x ∆f x
Rmin load.

NOTE: ∆f = Power swing frequency


2.13.3 Unblocking of the Relay for Faults During Power Swings
The relay can operate normally for any fault occurring during a power swing, as there are
three selectable conditions which can unblock the relay:

• A biased residual current threshold is exceeded - this allows tripping for earth faults
occurring during a power swing. The bias is set as: Ir> (as a percentage of the
highest measured current on any phase), with the threshold always subject to a
minimum of 0.1 x In. Thus the residual current threshold is:
IN > 0.1 In + ( (IN> / 100) . (I maximum) ).

• A biased negative sequence current threshold is exceeded - this allows tripping for
phase-phase faults occurring during a power swing. The bias is set as: I2> (as a
percentage of the highest measured current on any phase), with the threshold always
subject to a minimum of 0.1 x In. Thus the negative sequence current threshold is:
I2 > 0.1 In + ( (I2> / 100) . (I maximum) ).

• A phase current threshold is exceeded - this allows tripping for three-phase faults
occurring during a power swing. The threshold is set as: Imax line> (in A).

• A Criteria in Delta Current can be activated in MiCOM S1 since version C1.0:

That flat delta criterion (enabled by S1) will improve the detection of a 3 Phase fault during a
power swing (in case of faulty current lower than the Imax line threshold settable in S1) –
100ms are required for unblocking the logic.
With the exaggerated delta current (activated all the time in the internal logic) the phase
selection has been improved in case of unblocking logic applied with a fault detected during
a power swing. Regarding the presence of negative current or zero sequence current, the
exaggerated delta current detection are calculated on the phase-phase loop or phase-
ground loop.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 81/286

AnyPoleDead

Loop AN detected
≥1 &
S ≥2
in PS bundary ∆t
Q S
≥1 R Q PS loop AN

≥1
Tunb &

Loop BN detected ≥1
in PS bundary S
∆t
Q S
≥1 R Q PS loop BN

Tunb

≥1
Loop CN detected
in PS bundary S
Q
∆t
S ≥1 & S
≥1 R Q PS loop CN Q
Power Swing Detection
R
R

Tunb

Inrush AN

Inrush BN

Inrush CN

Fault clear ≥1
Healthy Network

All Pole Dead


& /Fuse Failure confirmed

PS disabled

Iphase>(Imax line>) S
Q
Unblocking Imax disabled R

∆ Tunblk
IN> threshold S
≥1 S
Q
R
Unblocking IN disabled Q
Power Swing unblocking

∆Tunblk ≥1 R
I2> threshold S
Q
R
Unblocking I2> disabled
P0488ENa

FIGURE 41 – POWER SWING DETECTION & UNBLOCKING LOGIC


P44x/EN AP/F65 Application Notes

Page 82/286 MiCOM P441/P442 & P444

Z1x
& Z1x'

Unblock Z1
≥1
Z1'
Z1 &

Power Swing Detection Unblock Z2


≥1 ≥1
Unblocking Power Swing Z2'
&
Z2

Unblock Z3
≥1
Z3'
&
Z3

≥1
Zp_Fwd Zp'
& &
Unblock Zp
Zp
P0489ENa

FIGURE 42 - DISTANCE PROTECTION BLOCK/UNBLOCKING LOGIC

Data Type Description


∆R Configuration 0.1/In to 250/In by step 0.01/In
∆X Configuration 0.1/In to 250/In by step de 0.01/In
∆Tunbk Configuration 0 to 60 s by step de 1 s.
Imax> Configuration 1 to 20 In by step de 0.01
IN> Configuration 0.1In + 10 to 100 % of Imax>
I2> Configuration 0.1In + 10 to 100 % of Imax>
Unblock Z1 Configuration 0 => Z1 blocked during PSwing
1 => Z1 unblocked during PSwing
Unblock Z2 Configuration 0 => Z2 blocked during PSwing
1 => Z2 unblocked during PSwing
Unblock Z3 Configuration 0 => Z3 blocked during PSwing
1 => Z3 unblocked during PSwing
Unblock Zp Configuration 0 => Zp blocked during PSwing
1 => Zp unblocked during PSwing
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 83/286

2.13.4 Typical Current Settings


The three current thresholds must be set above the maximum expected residual current
unbalance, the maximum negative sequence unbalance, and the maximum expected power
swing current. Generally, the power swing current will not exceed 2.In. Typical setting limits
are given in Table 7 and Table 8 below:

Parameter Minimum Setting (to avoid Maximum Setting (to ensure Typical
maloperation for asymmetry unblocking for line faults) Setting
in power swing currents)
IN> > 30% < 100% 40%
I2> > 10% < 50% 30%

TABLE 7 - BIAS THRESHOLDS TO UNBLOCK PSB FOR LINE FAULTS

Parameter Minimum Setting Maximum Setting


Imax line> 1.2 x (maximum power swing 0.8 x (minimum phase fault current level)
current)

TABLE 8 - PHASE CURRENT THRESHOLD TO UNBLOCK PSB FOR LINE FAULTS


2.13.5 Removal of PSB to Allow Tripping for Prolonged Power Swings
It is possible to limit the time for which blocking of any distance protection zones is applied.
Thus, certain locations on the power system can be designated as split points, where circuit
breakers will trip three pole should a power swing fail to stabilise. Power swing blocking is
automatically removed after the Unblocking Delay with typical settings:

− 30s if a near permanent block is required;

− 2s if unblocking is required to split the system.


2.13.6 Out Of Step (OOS)
A new feature has been integrated since C1.0, which can detect the out of step (OOS)
conditions.

• How MiCOM Detect the out of step ?:


When the criteria for power swing detection are met, and when out of step tripping is
selected, then the distance protection with all of its stages is blocked – in order to prevent
tripping by the distance protection (The relay can operate normally for any fault occurring
during a power swing as there are different criteria which can be used by monitoring current
& delta current).
When the locus of the 3 single phase loops leave the power swing polygon, the sign of R is
checked. If the R component still has the same sign as at the point of entry, then the power
swing is detected and managed in the internal logic as a stable swing.
Otherwise the locus of the 3 single phase loops have passed through the polygon (indicating
loss of synchronism) and the sign of R is different from the point of entry ; then an out of step
is detected.
In the both cases the MiCOM P440 will provide a monitoring of the number of cycles and
check if the setting from S1 has been reached. In that case a trip order is performed by the
relay.
P44x/EN AP/F65 Application Notes

Page 84/286 MiCOM P441/P442 & P444

∆X
Zone C
X lim
Z3 ∆R

Zone A
Zone B +R
-R
Out Of Step +R Stable swing
-R lim R lim
R
Z4 -X lim
+R
P0885ENa

• What are the settings and logic used in MiCOM S1 ?:


The settings are located with the Power-Swing function:
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 85/286

And a dedicated PSL must be created by the user if such logic has to be activated in the
relay.
DDB n°269: Power Swing is detected (3 single phase loop inside the quad & crossing the
∆R band in less than 5 ms in a 50 Hz network). Power swing is present either with out of
step cycle or stable swing cycle.
Outputs for Out of Step:
Out Of Step
DDB #350
Pow er Sw ing
DDB #269
Out Of Step Conf
DDB #352

DDB n°350: The first out of step cycle has been detected (Zlocus in/out with the opposite R
sign) & the « Out Of Step start » picks-up.
DDB n°352: The number of cycles set by S1 has been reached & Out Of Step is now
confirmed
Outputs for stable swing:
S. Sw ing
DDB #351
Pow er Sw ing
DDB #269
S. Sw ing Conf
DDB #353

DDB n°351: The first stable swing cycle has been detected (Zlocus in/out with the same R
sign) & the « Stable Swing start » picks-up.
DDB n°353: The number of cycles set by S1 has been reached & Stable Swing is now
confirmed.
Remark: Out-of-step tripping systems should be applied at proper network
locations to detect Out of step conditions and separate the network at
pre-selected locations only in order to create system islands with
balanced generation and load demand that will remain in
synchronism.
P44x/EN AP/F65 Application Notes

Page 86/286 MiCOM P441/P442 & P444

2.14 Directional and non-directional overcurrent protection (“Back-up I>” menu)


The overcurrent protection included in the P441, P442 and P444 relays provides two stage
non-directional / directional three phase overcurrent protection and two non directional
stages (I>3 and I>4), with independent time delay characteristics. One or more stages may
be enabled, in order to complement the relay distance protection. All overcurrent and
directional settings apply to all three phases but are independent for each of the four stages.
The first two stages of overcurrent protection, I>1 and I>2 have time delayed characteristics
which are selectable between inverse definite minimum time (IDMT), or definite time (DT).
The third and fourth overcurrent stages can be set as follows:
I>3 - The third element is fixed as non-directional, for instantaneous or definite time delayed
tripping. This element can be permanently enabled, or enabled only for Switch on to Fault
(SOTF) or Trip on Reclose (TOR). It is also used to detect close-up faults (in SOTF/TOR
tripping logic no timer is applied).
I>4 - he fourth element is only used for stub bus protection, where it is fixed as non-
directional, and only enabled when the opto-input Stub Bus Isolator Open (Stub Bus
Enable) is energised. Since version D2.0, if the “stub bus enable” input is equal to 0, the I>4
function is still active, if the “stub bus enable” input is equal to 1, only the I>4 function is
active (not I>1, I>2 and I>3).
All the stages trip three-phase only. They could be used for back up protection during a VT
failure.
The following table shows the relay menu for overcurrent protection, including the available
setting ranges and factory defaults.
NOTE: Since version C5.x, the maximum setting range and the step size for
I> TMS for the two first stages of I> changed.

Setting range
Menu text Default setting Step size
Min Max
GROUP 1
BACK-UP I>
I>1 Function DT Disabled, DT, IEC S Inverse, IEC V
Inverse, IEC E Inverse, UK LT Inverse,
IEEE M Inverse, IEEE V Inverse, IEEE E
Inverse, US Inverse, US ST Inverse
I>1 Direction Directional Fwd Non-Directional, Directional Fwd,
Directional Rev
I>1 VTS Block Non-Directional Block, Non-Directional
I>1 Current Set 1.5 x In 0.08 x In 4.0 x In 0.01 x In
Since version C5.X 1.50 x In 0.08 x In 10.00 x In 0.01 x In
I>1 Time Delay 1s 0s 100 s 0.01 s
I>1 Time Delay VTS 0.2 s 0s 100 s 0.01 s
I>1 TMS 1 0.025 1.2 0.025
Since version C5.X 1 0.025 1.2 0.005
I>1 Time Dial 7 0.5 15 0.1
I>1 Reset Char DT DT or Inverse
I>1 tRESET 0 0 100 s 0.01 s
I>2 Function DT Disabled, DT, IEC S Inverse, IEC V
Inverse, IEC E Inverse, UK LT Inverse,
IEEE M Inverse, IEEE V Inverse, IEEE E
Inverse, US Inverse, US ST Inverse
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 87/286

Setting range
Menu text Default setting Step size
Min Max
I>2 Direction Non Directional Non-Directional, Directional Fwd,
Directional Rev
I>2 VTS Block Non-Directional Block, Non-Directional
I>2 Current Set 2 x In 0.08 x In 4.0 x In 0.01 x In
Since version C5.X 2.00 x In 0.08 x In 10.00 x In 0.01 x In
I>2 Time Delay 2s 0s 100 s 0.01 s
I>2 Time Delay VTS 2s 0s 100 s 0.01 s
I>2 TMS 1 0.025 1.2 0.025
Since version C5.X 1 0.025 1.2 0.00 5
I>2 Time Dial 7 0.5 15 0.1
I>2 Reset Char DT DT or Inverse
I>2 tRESET 0 0s 100 s 0.01 s
I>3 Status Enabled Disabled or Enabled
I>3 Current Set 3 x In 0.08 x In 32 x In 0.01 x In
I>3 Time Delay 3s 0s 100 s 0.01 s
I>4 Status Disabled Disabled or Enabled
I>4 Current Set 4 x In 0.08 x In 32 x In 0.01 x In
I>4 Time Delay 4s 0s 100 s 0.01 s

Since version C5.X, I>4 may be used as a normal overcurrent stage if no stub bus condition
is activated through the binary input Stub Bus Enabled.
The inverse time delay characteristics listed above, comply with the following formula:

t=T×⎛ + L⎞
K
⎝(I/Is) α
–1 ⎠
Where:
t = operation time
K = constant
I = measured current
Is = current threshold setting

α = constant
L = ANSI/IEEE constant (zero for IEC curves)
T = Time multiplier Setting
P44x/EN AP/F65 Application Notes

Page 88/286 MiCOM P441/P442 & P444

Curve description Standard K constant α constant L constant


Standard Inverse IEC 0.14 0.02 0
Very Inverse IEC 13.5 1 0
Extremely Inverse IEC 80 2 0
Long Time Inverse UK 120 1 0
Moderately Inverse IEEE 0.0515 0.02 0.0114
Very Inverse IEEE 19.61 2 0.491
Extremely Inverse IEEE 28.2 2 0.1217
Inverse US 5.95 2 0.18
Short Time Inverse US 0.02394 0.02 0.1694

Note that the IEEE and US curves are set differently to the IEC/UK curves, with regard to the
time setting. A time multiplier setting (TMS) is used to adjust the operating time of the IEC
curves, whereas a time dial setting is employed for the IEEE/US curves. Both the TMS and
Time Dial settings act as multipliers on the basic characteristics but the scaling of the time
dial is 10 times that of the TMS, as shown in the previous menu. The menu is arranged such
that if an IEC/UK curve is selected, the I> Time Dial cell is not visible and vice versa for the
TMS setting.
2.14.1 Application of Timer Hold Facility
The first two stages of overcurrent protection in the P441, P442 and P444 relays are
provided with a timer hold facility, which may either be set to zero or to a definite time value.
(Note that if an IEEE/US operate curve is selected, the reset characteristic may be set to
either definite or inverse time in cell I>1 Reset Char; otherwise this setting cell is not visible
in the menu). Setting of the timer to zero means that the overcurrent timer for that stage will
reset instantaneously once the current falls below 95% of the current setting. Setting of the
hold timer to a value other than zero, delays the resetting of the protection element timers for
this period. This may be useful in certain applications, for example when grading with
upstream electromechanical overcurrent relays which have inherent reset time delays.
Another possible situation where the timer hold facility may be used to reduce fault clearance
times is where intermittent faults may be experienced. An example of this may occur in a
plastic insulated cable. In this application it is possible that the fault energy melts and reseals
the cable insulation, thereby extinguishing the fault. This process repeats to give a
succession of fault current pulses, each of increasing duration with reducing intervals
between the pulses, until the fault becomes permanent. When the reset time of the
overcurrent relay is instantaneous the relay may not trip until the fault becomes permanent.
By using the timer hold facility the relay will integrate the fault current pulses, thereby
reducing fault clearance time.
Note that the timer hold facility should not be used where high speed autoreclose with short
dead times are set.
The timer hold facility can be found for the first and second overcurrent stages as settings
I>1 tRESET and I>2 tRESET. Note that these cells are not visible if an inverse time reset
characteristic has been selected, as the reset time is then determined by the programmed
time dial setting.
2.14.2 Directional Overcurrent Protection
If fault current can flow in both directions through a relay location, it is necessary to add
directional control to the overcurrent relays in order to obtain correct discrimination. Typical
systems which require such protection are parallel feeders and ring main systems. Where
I>1 or I>2 stages are directionalised, no characteristic angle needs to be set as the relay
uses the same directionalising technique as for the distance zones (fixed superimposed
power technique).
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 89/286

2.14.3 Time Delay VTS


Should the Voltage Transformer Supervision function detect an ac voltage input failure to the
relay, such as due to a VT fuse blow, this will affect operation of voltage dependent
protection elements. Distance protection will not be able to make a forward or reverse
decision, and so will be blocked. As the I>1 and I>2 overcurrent elements in the relay use
the same directionalising technique as for the distance zones, any directional zones would
be unable to trip.
To maintain protection during periods of VTS detected failure, the relay allows an I> Time
Delay VTS to be applied to the I>1 and I>2 elements. On VTS pickup, both elements are
forced to have non-directional operation, and are subject to their revised definite time delay.
2.14.4 Setting Guidelines
I>1 and I>2 Overcurrent Protection
When applying the overcurrent or directional overcurrent protection provided in the P441,
P442 and P444 relays, standard principles should be applied in calculating the necessary
current and time settings for co-ordination. For more detailed information regarding
overcurrent relay co-ordination, reference should be made to AREVA’s ‘Protective relay
Application Guide’ - Chapter 9. In general, where overcurrent elements are set, these
should also be set to time discriminate with downstream and reverse distance protection.
The I>1 and I>2 elements are continuously active. However tripping is blocked if the
distance protection function starts. An example is shown in Figure 43.

Time
I>1
I>2
Z3,tZ3
Z4, tZ4
Zp,tZp
Z2,tZ2
Reverse Z1,tZ1 Forward

P3069ENa

FIGURE 43 - TIME GRADING OVERCURRENT PROTECTION WITH DISTANCE PROTECTION (DT


EXAMPLE)
I>1 and I>2 Time Delay VTS
The I>1 and I>2 overcurrent elements should be set to mimic operation of distance
protection during VTS pickup. This requires I>1 and I>2 current settings to be calculated to
approximate to distance zone reaches, although operating non-directional. If fast protection
is the main priority then a time delay of zero or equal to tZ2 could be used. If parallel
current-based main protection is used alongside the relay, and protection discrimination
remains the priority, then a DT setting greater than that for the distance zones should be
used. An example is shown in Figure 44.
P44x/EN AP/F65 Application Notes

Page 90/286 MiCOM P441/P442 & P444

I phase

I 1>

Trip

I 2>

No trip

t
tI1> tI2> P0483ENa

FIGURE 44 - TRIPPING LOGIC FOR PHASE OVERCURRENT PROTECTION


I>3 Highset Overcurrent and Switch on to Fault Protection
The I>3 overcurrent element of the P441, P442 and P444 relays can be Enabled as an
instantaneous highset just during the TOR/SOTF period. After this period has ended, the
element remains in service with a trip time delay setting I>3 Time Delay. This element
would trip for close-up high current faults, such as those where maintenance earth clamps
are inadvertently left in position on line energisation.
The I>3 current setting applied should be above load current, and > 35% of peak
magnetising inrush current for any connected transformers as this element has no second
harmonic blocking. If a high current setting is chosen, such that the I>3 element will not
overreach the protected line, then the I>3 Time Delay can be set to zero. It should also be
verified that the remote source is not sufficiently strong to cause element pickup for a close-
up reverse fault.
If a low current setting is chosen, I>3 will need to discriminate with local and remote distance
protection. This principle is shown in Table 9.

I>3 Current Setting Instantaneous Function After Time Delay Required


TOR/SOTF Function TOR/SOTF Period
Above load and inrush Yes - sensitive. Time delayed backup Longer than tZ3 to
current but LOW protection. grade with distance
protection.
HIGH, ≥ 120% of max. Yes - may detect Instantaneous I>3 Time Delay = 0.
fault current for a fault at high current close- highset to detect (Note #.)
the remote line terminal up faults. close-up faults.
and max. reverse fault
current

TABLE 9 - CURRENT AND TIME DELAY SETTINGS FOR THE I>3 ELEMENT
Key:
As the instantaneous highset trips three pole it is recommended that the I>3 Time
Delay is set ≥ tZ2 in single pole tripping schemes, to allow operation of the correct
single pole autoreclose cycle.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 91/286

I>4 Stub Bus Protection


When the protected line is switched from a breaker and a half arrangement it is possible to
use the I>4 overcurrent element to provide stub bus protection. When stub bus protection is
selected in the relay menu, the element is only enabled when the opto-input Stub Bus
Isolator Open (Stub Bus Enable) is energised. Thus, a set of 52b auxiliary contacts (closed
when the isolator is open) are required.

I>4 Element: Stub Bus Protection


Busbar 1
VT

V=0

Protection's blocking using VTs

I>0
Open isolator

Stub Bus Protection : I >4

Busbar 2
P0536ENa

Although this element would not need to discriminate with load current, it is still common
practice to apply a high current setting. This avoids maloperation for heavy through fault
currents, where mismatched CT saturation could present a spill current to the relay. The I>4
element would normally be set instantaneous, t>4 = 0s.
2.15 Negative sequence overcurrent protection (NPS) (“NEG sequence O/C” menu)
When applying traditional phase overcurrent protection, the overcurrent elements must be
set higher than maximum load current, thereby limiting the element’s sensitivity. Most
protection schemes also use an earth fault element operating from residual current, which
improves sensitivity for earth faults. However, certain faults may arise which can remain
undetected by such schemes.
Any unbalanced fault condition will produce negative sequence current of some magnitude.
Thus, a negative phase sequence overcurrent element can operate for both phase-to-phase
and phase to earth faults.
The following section describes how negative phase sequence overcurrent protection may
be applied in conjunction with standard overcurrent and earth fault protection in order to
alleviate some less common application difficulties.

• Negative phase sequence overcurrent elements give greater sensitivity to resistive


phase-to-phase faults, where phase overcurrent elements may not operate.

• In certain applications, residual current may not be detected by an earth fault relay
due to the system configuration. For example, an earth fault relay applied on the delta
side of a delta-star transformer is unable to detect earth faults on the star side.
However, negative sequence current will be present on both sides of the transformer
for any fault condition, irrespective of the transformer configuration. Therefore, an
negative phase sequence overcurrent element may be employed to provide time-
delayed back-up protection for any uncleared asymmetrical faults downstream.
P44x/EN AP/F65 Application Notes

Page 92/286 MiCOM P441/P442 & P444

• Where rotating machines are protected by fuses, loss of a fuse produces a large
amount of negative sequence current. This is a dangerous condition for the machine
due to the heating effects of negative phase sequence current and hence an upstream
negative phase sequence overcurrent element may be applied to provide back-up
protection for dedicated motor protection relays.

• It may be required to simply alarm for the presence of negative phase sequence
currents on the system. Operators may then investigate the cause of the unbalance.
The negative phase sequence overcurrent element has a current pick up setting ‘I2> Current
Set’, and is time delayed in operation by the adjustable timer ‘I2> Time Delay’. The user
may choose to directionalise operation of the element, for either forward or reverse fault
protection for which a suitable relay characteristic angle may be set. Alternatively, the
element may be set as non-directional.
2.15.1 Setting Guidelines
The relay menu for the negative sequence overcurrent element (up to version C5.X) is
shown below:

Setting range
Menu text Default setting Step size
Min Max
GROUP 1
NEG SEQUENCE
O/C
I2> Status Enabled Disabled, Enabled
I2> Directional Non-Directional Non-Directional, Directional Fwd, Directional Rev
I2> VTS Non-Directionel Block, Non-Directional
I2> Current Set 0.2 x In 0.08 x In 4 x In 0.01 x In
I2> Time Delay 10 s 0s 100 s 0.01 s
I2> Char Angle –45° –95° +95° 1°

Since version C5.X, three additional negative sequence overcurrent stages have been
implemented. The second stage includes IDMT curves. The third and fourth stages may be
set to operate as definite time or instantaneous negative sequence overcurrent elements.
The corresponding relay menu for the negative sequence overcurrent element is shown
below:

Setting range
Menu text Default setting Step size
Min Max
GROUP 1
NEG SEQUENCE
O/C
I2>1 Function DT Disabled, DT, IEC S Inverse, IEC V Inverse, IEC
E Inverse, UK LT Inverse, IEEE M Inverse, IEEE
V Inverse, IEEE E Inverse, US Inverse, US ST
Inverse
I2>1 Directional Non-directional Non-directional, Directional FWD, Directional
REV
I2>1 VTS Block Block Block, Non-directional
I2>1 Current Set 0.20 x In 0.08 x In 4.00 x In 0.01 x In
I2>1 Time Delay 10.00 s 0s 100.0 s 0.01 s
I2>1 Time VTS 0.200 s 0s 100.0 s 0.01 s
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 93/286

Setting range
Menu text Default setting Step size
Min Max
I2>1 TMS 1.000 0.025 1.200 0.005
I2>1 Time Dial 1.000 0.01 100.0 0.01
I2>1 Reset Char DT DT, Inverse
I2>1 tReset 0s 0s 100.0 s 0.01 s
I2>2 Function DT Disabled, DT, IEC S Inverse, IEC V Inverse, IEC
E Inverse, UK LT Inverse, IEEE M Inverse, IEEE
V Inverse, IEEE E Inverse, US Inverse, US ST
Inverse
I2>2 Directional Non Directional Non-Directional, Directional FWD, Directional
REV
I2>2 VTS Block Block Block, Non-directional
I2>2 Current Set 0.20 x In 0.08 x In 4.00 x In 0.01 x In
I2>2 Time Delay 10.00 s 0s 100.0 s 0.01 s
I2>2 Time VTS 0.200 s 0s 100.0 s 0.01 s
I2>2 TMS 1.000 0.025 1.200 0.005
I2>2 Time Dial 1.000 0.01 100.0 0.01
I2>2 Reset Char DT DT, Inverse
I2>2 tReset 0s 0s 100.0 s 0.01 s
I2>3 Status Disabled Disabled, Enabled
I2>3 Directional Non Directional Non-directional, Directional FWD, Directional
REV
I2>3 VTS Block Block Block, Non-directional
I2>3 Current Set 0.20 x In 0.08 x In 4.00 x In 0.01 x In
I2>3 Time Delay 10.00 s 0s 100.0 s 0.01 s
I2>3 Time VTS 0.200 s 0s 100.0 s 0.01 s
I2>4 Status Disabled Disabled, Enabled
I2>4 Directional Non Directional Non-directional, Directional FWD, Directional
REV
I2>4 VTS Block Block Block, Non-directional
I2>4 Current Set 0.20 x In 0.08 x In 4.00 x In 0.01 x In
I2>4 Time Delay 10.00 s 0s 100.0 s 0.01 s
I2>4 Time VTS 0.200 s 0s 100.0 s 0.01 s
I2> Char angle - 45° -95° 95° 1°
P44x/EN AP/F65 Application Notes

Page 94/286 MiCOM P441/P442 & P444

2.15.2 Negative phase sequence current threshold, ‘I2> Current Set’


The current pick-up threshold must be set higher than the negative phase sequence current
due to the maximum normal load unbalance on the system. This can be set practically at the
commissioning stage, making use of the relay measurement function to display the standing
negative phase sequence current, and setting at least 20% above this figure.
Where the negative phase sequence element is required to operate for specific uncleared
asymmetric faults, a precise threshold setting would have to be based upon an individual
fault analysis for that particular system due to the complexities involved. However, to ensure
operation of the protection, the current pick-up setting must be set approximately 20% below
the lowest calculated negative phase sequence fault current contribution to a specific remote
fault condition.
Note that in practice, if the required fault study information is not available, the setting must
adhere to the minimum threshold previously outlined, employing a suitable time delay for co-
ordination with downstream devices. This is vital to prevent unnecessary interruption of the
supply resulting from inadvertent operation of this element.
2.15.3 Time Delay for the Negative Phase Sequence Overcurrent Element, ‘I2> Time Delay’
As stated above, correct setting of the time delay for this function is vital. It should also be
noted that this element is applied primarily to provide back-up protection to other protective
devices or to provide an alarm. Hence, in practice, it would be associated with a long time
delay.
It must be ensured that the time delay is set greater than the operating time of any other
protective device (at minimum fault level) on the system which may respond to unbalanced
faults, such as:

• Phase overcurrent elements

• Earth fault elements

• Broken conductor elements

• Negative phase sequence influenced thermal elements


2.15.4 Directionalising the Negative Phase Sequence Overcurrent Element
Where negative phase sequence current may flow in either direction through a relay location,
such as parallel lines or ring main systems, directional control of the element should be
employed.
Directionality is achieved by comparison of the angle between the negative phase sequence
voltage and the negative phase sequence current and the element may be selected to
operate in either the forward or reverse direction. A suitable relay characteristic angle setting
(I2> Char Angle) is chosen to provide optimum performance. This setting should be set
equal to the phase angle of the negative sequence current with respect to the inverted
negative sequence voltage (- V2), in order to be at the centre of the directional characteristic.
The angle that occurs between V2 and I2 under fault conditions is directly dependent upon
the negative sequence source impedance of the system. However, typical settings for the
element are as follows:

• For a transmission system the RCA should be set equal to -60°

• For a distribution system the RCA should be set equal to -45°


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 95/286

2.16 Broken conductor detection


The majority of faults on a power system occur between one phase and ground or two
phases and ground. These are known as shunt faults and arise from lightning discharges
and other overvoltages which initiate flashovers. Alternatively, they may arise from other
causes such as birds on overhead lines or mechanical damage to cables etc. Such faults
result in an appreciable increase in current and hence in the majority of applications are
easily detectable.
Another type of unbalanced fault which can occur on the system is the series or open circuit
fault. These can arise from broken conductors, maloperation of single phase switchgear, or
the operation of fuses. Series faults will not cause an increase in phase current on the
system and hence are not readily detectable by standard overcurrent relays. However, they
will produce an unbalance and a resultant level of negative phase sequence current, which
can be detected.
It is possible to apply a negative phase sequence overcurrent relay to detect the above
condition. However, on a lightly loaded line, the negative sequence current resulting from a
series fault condition may be very close to, or less than, the full load steady state unbalance
arising from CT errors, load unbalance etc. A negative sequence element therefore would
not operate at low load levels.
The relay incorporates an element which measures the ratio of negative to positive phase
sequence current (I2/I1). This will be affected to a lesser extent than the measurement of
negative sequence current alone, since the ratio is approximately constant with variations in
load current. Hence, a more sensitive setting may be achieved.
2.16.1 Setting Guidelines
The sequence network connection diagram for an open circuit fault is detailed in Figure 1.
From this, it can be seen that when a conductor open circuit occurs, current from the positive
sequence network will be series injected into the negative and zero sequence networks
across the break.
In the case of a single point earthed power system, there will be little zero sequence current
flow and the ratio of I2/I1 that flows in the protected circuit will approach 100%. In the case of
a multiple earthed power system (assuming equal impedances in each sequence network),
the ratio I2/I1 will be 50%.
It is possible to calculate the ratio of I2/I1 that will occur for varying system impedances, by
referring to the following equations:-
E (Z + Z )
I1F = Z Z +g Z 2Z + 0Z Z
1 2 1 0 2 0

–E Z
I2F = Z Z + Z Zg 0+ Z Z
1 2 1 0 2 0

Where:
Eg = System Voltage
Z0 = Zero sequence impedance
Z1 = Positive sequence impedance
Z2 = Negative sequence impedance
Therefore:

I2F Z0
=
I1F Z0
+ Z2
P44x/EN AP/F65 Application Notes

Page 96/286 MiCOM P441/P442 & P444

It follows that, for an open circuit in a particular part of the system, I2/I1 can be determined
from the ratio of zero sequence to negative sequence impedance. It must be noted however,
that this ratio may vary depending upon the fault location. It is desirable therefore to apply as
sensitive a setting as possible. In practice, this minimum setting is governed by the levels of
standing negative phase sequence current present on the system. This can be determined
from a system study, or by making use of the relay measurement facilities at the
commissioning stage. If the latter method is adopted, it is important to take the
measurements during maximum system load conditions, to ensure that all single phase
loads are accounted for.
Note that a minimum value of 8% negative phase sequence current is required for
successful relay operation.
Since sensitive settings have been employed, it can be expected that the element will
operate for any unbalance condition occurring on the system (for example, during a single
pole autoreclose cycle). Hence, a long time delay is necessary to ensure co-ordination with
other protective devices. A 60 second time delay setting may be typical.
The following table shows the relay menu for the Broken Conductor protection, including the
available setting ranges and factory defaults:-

Setting range
Menu text Default setting Step size
Min Max
GROUP 1
BROKEN CONDUCTOR
Broken Conductor Enabled Enabled, Disabled
I2/I1 0.2 0.2 1 0.01
I2/I1 Time Delay 60 s 0s 100 s 1s
I2/I1 Trip Disabled* Enabled, Disabled

* If disabled, only a Broken Conductor Alarm is possible.


2.16.2 Example Setting
The following information was recorded by the relay during commissioning;
Ifull load = 1000A
I2 = 100A
therefore the quiescent I2/I1 ratio is given by;
I2/I1 = 100/1000 = 0.1
To allow for tolerances and load variations a setting of 200% of this value may be typical:
Therefore set I2/I1 = 0.2
Set I2/I1 Time Delay = 60 s to allow adequate time for short circuit fault clearance by time
delayed protections.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 97/286

2.17 Directional and non-directional earth fault protection (“Earth fault O/C” menu)
The following elements of earth fault protection are available, as follows:

• IN> element - Channel aided directional earth fault protection;

• IN>1 element - Directional or non-directional protection, definite time


(DT) or IDMT time-delayed.

• IN>2 element - Directional or non-directional, DT and IDMT (since version


D2.0) delayed.
Since version C2.X, the following elements are available:

• IN>3 element - Directional or non-directional, DT delayed.

• IN>4 element - Directional or non-directional, DT delayed.


The IN> element may only be used as part of a channel-aided scheme, and is fully described
in the Aided DEF section of the Application Notes which follow.
The IN>1, IN>2, and, since version C2.X, IN>3 and IN>4 backup elements always trip three
pole, and have an optional timer hold facility on reset, as per the phase fault elements. (The
IN> element can be selected to trip single and/or three pole).
All Earth Fault overcurrent elements operate from a residual current quantity which is derived
internally from the summation of the three phase currents.
These current thresholds are activated as an exclusive choice with Zero sequence Power
Protection (since version C2.X):

The following table shows the relay menu for the Earth Fault protection, including the
available setting ranges and factory defaults.
P44x/EN AP/F65 Application Notes

Page 98/286 MiCOM P441/P442 & P444

Since version C2.x, two new thresholds of IN have been added:

New DDB cells:

Since version C5.X, The second stage earth fault overcurrent element can be configured as
inverse time. The maximum setting range and the step size for IN> TMS for the two first
stages of IN> changed.

Setting range
Menu text Default setting Step size
Min Max
GROUP 1
EARTH FAULT O/C
IN>1 Function DT Disabled, DT, IEC S Inverse, IEC V Inverse,
IEC E Inverse, UK LT Inverse, IEEE M
Inverse, IEEE V Inverse, IEEE E Inverse, US
Inverse, US ST Inverse
IN>1 Directional Directional Fwd Non-Directional, Directional Fwd,
Directional Rev
IN>1 VTS Block Non directional Block, Non directional
IN>1 Current Set 0.2 x In 0.08 x In 4.0 x In 0.01 x In
Since version C5.X: 0.2 x In 0.08 x In 10.0 x In 0.01 x In
IN>1 Time Delay 1s 0s 200 s 0.01 s
IN>1 Time Delay VTS 0.2 s 0s 200 s 0.01 s
IN>1 TMS 1 0.025 1.2 0.025
Since version C5.X: 1 0.025 1.2 0.005
IN>1 Time Dial 7 0.5 15 0.1
IN>1 Reset Char DT DT, Inverse
IN>1 tRESET 0s 0s 100 s 0.01s
IN>2 Status Enabled Disabled, Enabled
(up to version C5.X)
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 99/286

Setting range
Menu text Default setting Step size
Min Max
IN>1 Function DT Disabled, DT, IEC S Inverse, IEC V Inverse,
since version C5.X IEC E Inverse, UK LT Inverse, IEEE M
Inverse, IEEE V Inverse, IEEE E Inverse, US
Inverse, US ST Inverse
IN>2 Directional Non Directional Non-Directional, Directional Fwd,
Directional Rev
IN>2 VTS Block Non directional Block, Non directional
IN>2 Current Set 0.3 x In 0.08 x In 32 x In 0.01 x In
Since version C5.X
1 0.025 1.2 0.005
IN>2 Time Delay 2s 0s 200 s 0.01 s
IN>2 Time Delay VTS 2s 0s 200 s 0.01 s
IN>2TMS 1 0.025 1.2 0.005
since version C5.X
IN>3 Status Enabled Disabled, Enabled
IN>3 Directional Non Directional Non-Directional, Directional Fwd,
Directional Rev
IN>3 VTS Block Non directional Block, Non directional
IN>3 Current Set 0.3 x In 0.08 x In 32 x In 0.01 x In
Since version C2.X

IN>3 Time Delay 2s 0s 200 s 0.01 s


IN>3 Time Delay VTS 0.2 s 0s 200 s 0.01 s
IN>4 Status Enabled Disabled, Enabled
IN>4 Directional Non Directional Non-Directional, Directional Fwd,
Directional Rev
IN>4 VTS Block Non directional Block, Non directional
IN>4 Current Set 0.3 x In 0.08 x In 32 x In 0.01 x In
IN>4 Time Delay 2s 0s 200 s 0.01 s
IN>4 Time Delay VTS 0.2 s 0s 200 s 0.01 s
IN> DIRECTIONAL
IN> Char Angle –45° –95° 95° 1°
Polarisation Zero Sequence Zero Sequence, Negative Sequence

Note that the elements are set in terms of residual current, which is three times the
magnitude of zero sequence current (Ires = 3I0). The IDMT time delay characteristics
available for the IN>1 element, and the grading principles used will be as per the phase fault
overcurrent elements.
To maintain protection during periods of VTS detected failure, the relay allows an IN> Time
Delay VTS to be applied to the IN>1 and IN>2 elements. On VTS pickup, both elements are
forced to have non-directional operation, and are subject to their revised definite time delay.
P44x/EN AP/F65 Application Notes

Page 100/286 MiCOM P441/P442 & P444

V2

I2
Negative sequence
Polarisation Directional SBEF Fwd
VN Residual zero
Calculation SBEF Rev
sequence Polarisation

IN

IN IN> IN> Pick-up

IN> Pick-up

CTS Blocking IDMT/DT IN> Trip


Any Pole Dead &
IN> Timer Block

IN> Pick-up

CTS Blocking

Any Pole Dead


&
IN> Timer Block & IDMT/DT

SBEF Fwd Directionnal


Check
SBEF Rev
& >1 IN> Trip
MCB/VTS Line
IN> TD VTS

&
0
P0490ENa

FIGURE 45 - SBEF CALCULATION & LOGIC


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 101/286

CTS Block
SBEF Start
SBEF
Overcurrent
SBEF
IDMT/DT
Trip SBEF Trip
SBEF Timer Block
P0484ENa

FIGURE 46 - LOGIC WITHOUT DIRECTIONALITY

CTS Block

SBEF
Overcurrent SBEF Start

Slow VTS
Block Directional
Check
Vx > Vs
Ix > Is
IDMT/DT
SBEF Trip
SBEF Timer Block
P0533ENa

FIGURE 47 - LOGIC WITH DIRECTIONALITY


2.17.1 Directional Earth Fault Protection (DEF)
The method of directional polarising selected is common to all directional earth fault
elements, including the channel-aided element. There are two options available in the relay
menu:
• Zero sequence polarising - The relay performs a directional decision by comparing the
phase angle of the residual current with respect to the inverted residual voltage:
(–Vres = –(Va + Vb + Vc)) derived by the relay.

• Negative sequence polarising - The relay performs a directional decision by


comparing the phase angle of the derived negative sequence current with respect to
the derived negative sequence voltage.
NOTE: Even though the directional decision is based on the phase
relationship of I2 with respect to V2, the operating current quantity for
DEF elements remains the derived residual current.
2.17.2 Application of Zero Sequence Polarising
This is the conventional option, applied where there is not significant mutual coupling with a
parallel line, and where the power system is not solidly earthed close to the relay location.
As residual voltage is generated during earth fault conditions, this quantity is commonly used
to polarise DEF elements. The relay internally derives this voltage from the 3 phase voltage
input which must be supplied from either a 5-limb or three single phase VT’s. These types of
VT design allow the passage of residual flux and consequently permit the relay to derive the
required residual voltage. In addition, the primary star point of the VT must be earthed. A
three limb VT has no path for residual flux and is therefore incompatible with the use of zero
sequence polarising.
The required characteristic angle (RCA) settings for DEF will differ depending on the
application. Typical characteristic angle settings are as follows:
• Resistance earthed systems generally use a 0° RCA setting. This means that for a
forward earth fault, the residual current is expected to be approximately in phase with
the inverted residual voltage (-Vres).
P44x/EN AP/F65 Application Notes

Page 102/286 MiCOM P441/P442 & P444

• When protecting solidly-earthed distribution systems or cable feeders, a -45° RCA


setting should be set.

• When protecting solidly-earthed transmission systems, a -60° RCA setting should be


set.
2.17.3 Application of Negative Sequence Polarising
In certain applications, the use of residual voltage polarisation of DEF may either be not
possible to achieve, or problematic. An example of the former case would be where a
suitable type of VT was unavailable, for example if only a three limb VT were fitted. An
example of the latter case would be an HV/EHV parallel line application where problems with
zero sequence mutual coupling may exist. In either of these situations, the problem may be
solved by the use of negative phase sequence (nps) quantities for polarisation. This method
determines the fault direction by comparison of nps voltage with nps current. The operate
quantity, however, is still residual current.
When negative sequence polarising is used, the relay requires that the Characteristic Angle
is set. The Application Notes section for the Negative Sequence Overcurrent Protection
better describes how the angle is calculated - typically set at - 45° (I2 lags (-V2)).
2.18 Aided DEF protection schemes (“Aided D.E.F” menu)
The option of using separate channels for DEF aided tripping, and distance protection
schemes, is offered in the P441, P442 and P444 relays.
Since C1.0 a better sensitivity could be obtained by using a settable threshold for the
residual current in case of reverse fault, e.g. for creating quicker blocking scheme logic.
The IN Rev factor can be adjusted from 10% to 100% of IN>.
As well in case of independent channel logic with a blocking scheme an independent
transmission timer Tp has been created with a short step at: 2ms.

When a separate channel for DEF is used, the DEF scheme is independently selectable.
When a common signalling channel is employed, the distance and DEF must share a
common scheme. In this case a permissive overreach or blocking distance scheme must be
used. The aided tripping schemes can perform single pole tripping.
Since version C2.x, some improvements have been integrated in DEF.
New settings are:
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 103/286

The relay has aided scheme settings as shown in the following table:

Setting range
Menu text Default setting Step size
Min Max
GROUP 1
AIDED D.E.F.
Aided DEF Status Enabled Disabled, Enabled
Polarisation Zero Sequence Zero Sequence, Negative Sequence
V> Voltage Set 1V 0.5 V 20 V 0.01 V
IN Forward 0.1 x In 0.05 x In 4 x In 0.01 x In
Time Delay 0s 0s 10 s 0.1 s
Scheme Logic Shared Shared, Blocking, Permissive
Tripping Three Phase Three Phase, Single Phase
Since version C2.X:
Tp (if blocking scheme not 2 ms 0 ms 1000 ms 2 ms
shared)
IN Rev Factor 0,6 0 1 0.1

FIGURE 48 - MiCOM S1 SETTINGS

Opto label 01 DIST. CR DIST CS Relay Label 01

Opto Label 02 DEF. CR DEF CS Relay Label 02


P0534ENa

FIGURE 49 - PSL REQUIRED TO ACTIVATE DEF LOGIC WITH AN INDEPENDANT CHANNEL

Opto label 01 DIST. CR DIST CS


>1 Relay label 01
DEF. CR DEF CS
P0544ENa

FIGURE 50 - PSL REQUIRED TO ACTIVATE DEF LOGIC WITH SHARED CHANNEL


P44x/EN AP/F65 Application Notes

Page 104/286 MiCOM P441/P442 & P444

V2
Negative
I2 Polarisation Directionnal DEF Fwd
VN Residual
Calculation DEF Rev
Polarisation
IN

Negative
V2 Polarisation
V> DEF V>
Residual
VN Polarisation

INRev>
IN IN>
INRev = 0.6*INFwd
INFwd>
P0545ENa

FIGURE 51 - DEF CALCULATION


NOTE: The DEF is blocked in case of VTS or CTS
2.18.1 Polarising the Directional Decision
The relative advantages of zero sequence and negative sequence polarising are outlined on
the previous page. Note how the polarising chosen for aided DEF is independent of that
chosen for backup earth fault elements.
The relay has a V> threshold which defines the minimum residual voltage required to enable
an aided DEF directional decision to be made. A residual voltage measured below this
setting would block the directional decision, and hence there would be no tripping from the
scheme. The V> threshold is set above the standing residual voltage on the protected
system, to avoid operation for typical power system imbalance and voltage transformer
errors. In practice, the typical zero sequence voltage on a healthy system can be as high as
1% (ie: 3% residual), and the VT error could be 1% per phase. This could equate to an
overall error of up to 5% of phase-neutral voltage, although a setting between 2% and 4% is
typical. On high resistance earthed and insulated neutral systems the settings might need to
be as high as 10% to 30% of phase-neutral voltage, respectively.
When negative sequence polarising is set, the V> threshold becomes a V2> negative
sequence voltage detector.
The characteristic angle for aided DEF protection is fixed at –14°, suitable for protecting all
solidly earthed and resistance earthed systems.

FWD FWD

R
-14˚
REV REV

P0491ENa
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 105/286

2.18.2 Aided DEF Permissive Overreach Scheme

DEF Fwd

IN Fwd>

DEF V>

DEF Timer Block

Reversal Guard & DEF CS

0
Any Pole Dead
150 ms

T
& DEF Trip
IN Rev>
0

t_delay
UNB CR DEF
P0546ENa

FIGURE 52 - INDEPENDENT CHANNEL – PERMISSIVE SCHEME

DEF Fwd

IN Fwd>

DEF V>

DEF Timer Block

Reversal Guard & DEF CS

Any Pole Dead 0


>1
Any DIST Start 150 ms
& DEF Trip
T
IN Rev>
0

t_delay
UNB CR DEF
P0547ENa

FIGURE 53 - SHARED CHANNEL – PERMISSIVE SCHEME


This scheme is similar to that used in the AREVA LFZP, LFZR, EPAC and PXLN relays.
Figure 54 shows the element reaches, and Figure 55 the simplified scheme logic. The
signalling channel is keyed from operation of the forward IN> DEF element of the relay. If the
remote relay has also detected a forward fault, then it will operate with no additional delay
upon receipt of this signal.
Send logic: IN> Forward pickup
Permissive trip logic: IN> Forward plus Channel Received.

IN> Fwd (A)


ZL
A B

IN> Fwd (B)

P3070ENa

FIGURE 54 - THE DEF PERMISSIVE SCHEME


P44x/EN AP/F65 Application Notes

Page 106/286 MiCOM P441/P442 & P444

A voir

FIGURE 55 - LOGIC DIAGRAM FOR THE DEF PERMISSIVE SCHEME


The scheme has the same features/requirements as the corresponding distance scheme
and provides sensitive protection for high resistance earth faults.
Where “t” is shown in the diagram this signifies the time delay associated with an element,
noting that the Time Delay for a permissive scheme aided trip would normally be set to zero.
2.18.3 Aided DEF Blocking Scheme
This scheme is similar to that used in the AREVA LFZP, LFZR, EPAC and PXLN relays.
Figure 58 shows the element reaches, and Figure 59 the simplified scheme logic. The
signalling channel is keyed from operation of the reverse DEF element of the relay. If the
remote relay forward IN> element has picked up, then it will operate after the set Time Delay
if no block is received.

DEF Fwd

IN Fwd>
Tp

DEF V> 0

Reversal Guard

IN Rev>
T
& & DEF Trip
0

0 t_delay
Any Pole Dead
150 ms

DEF Timer Block

UNB CR DEF

DEF Rev
& DEF CS
IN Rev>

DEF V>
P0548ENa

FIGURE 56 - INDEPENDENT CHANNEL – BLOCKING SCHEME


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 107/286

DEF Fwd

IN Fwd>

DEF V>

Reversal Guard 0

IN Rev>
T
& Tp
0

Any Pole Dead t_delay


0

Any DIST Start


>1 150 ms

DEF Timer Block


& DEF Trip
UNB CR DEF

DEF Rev

IN Rev>
& DEF CS

DEF V>
P0549ENa

FIGURE 57 - SHARED CHANNEL – BLOCKING SCHEME


Send logic: DEF Reverse
Trip logic: IN> Forward, plus Channel NOT Received, with small set delay.

IN> Fwd (A)


IN> Rev (A)
ZL
A B

IN> Fwd (B)


IN> Rev (B)

P0550ENa

FIGURE 58 - THE DEF BLOCKING SCHEME


P44x/EN AP/F65 Application Notes

Page 108/286 MiCOM P441/P442 & P444

Signal Protection A Protection B Signal


Send IN> Send IN>
Reverse Reverse

IN>1 t t IN>1
0 0

Trip Trip
IN>2 t
0 >1 >1 0
t IN>2

IN > & t t IN>


Forward 0 0 &
Forward

Signal Protection A Protection B Signal


Send IN>1 Send IN>1
Reverse Reverse

IN>1 t t IN>1
0 0

Trip Trip
IN>2 t
0 >1 >1 0
t IN>2

IN>1 & t t IN>1


Forward 0 0 &
Forward

P0551ENb

FIGURE 59 - LOGIC DIAGRAM FOR THE DEF BLOCKING SCHEME


The scheme has the same features/requirements as the corresponding distance scheme
and provides sensitive protection for high resistance earth faults.
Where “t” is shown in the diagram this signifies the time delay associated with an element.
To allow time for a blocking signal to arrive, a short time delay on aided tripping must be
used. The recommended Time Delay setting = max. signalling channel operating time +
14ms.
2.19 Thermal overload (“Thermal overload” menu) – Since version C2.x
Since version C2.x, a THERMAL OVERLOAD (with 2 time constant) function has been
created as in the other transmission protection of the MiCOM Range, which offer alarm & trip
(see section 1.2.1).
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 109/286

New DDB cells:

Thermal overload protection can be used to prevent electrical plant from operating at
temperatures in excess of the designed maximum withstand. Prolonged overloading causes
excessive heating, which may result in premature ageing of the insulation, or in extreme
cases, insulation failure.
The relay incorporates a current based thermal replica, using load current to model heating
and cooling of the protected plant. The element can be set with both alarm and trip stages.
The heat generated within an item of plant, such as a cable or a transformer, is the resistive
loss (Ι2R x t). Thus, heating is directly proportional to current squared. The thermal time
characteristic used in the relay is therefore based on current squared, integrated over time.
The relay automatically uses the largest phase current for input to the thermal model.
Equipment is designed to operate continuously at a temperature corresponding to its full load
rating, where heat generated is balanced with heat dissipated by radiation etc. Over
temperature conditions therefore occur when currents in excess of rating are allowed to flow
for a period of time. It can be shown that temperatures during heating follow exponential time
constants and a similar exponential decrease of temperature occurs during cooling.
2.19.1 Single time constant characteristic
This characteristic is the recommended typical setting for line and cable protection.
The thermal time characteristic is given by:

exp(-t/τ) = (Ι2 - (k.ΙFLC)2) / (Ι2 - ΙP2)


Where:

t = Time to trip, following application of the overload current, Ι;


τ = Heating and cooling time constant of the protected plant;
Ι = Largest phase current;
ΙFLC = Full load current rating (relay setting ‘Thermal Trip’);
k = 1.05 constant, allows continuous operation up to < 1.05 ΙFLC.
ΙP = Steady state pre-loading before application of the overload.
The time to trip varies depending on the load current carried before application of the
overload, i.e. whether the overload was applied from «hot» or «cold».
2.19.2 Dual time constant characteristic (Typically not applied for MiCOMho P443)
This characteristic is used to protect oil-filled transformers with natural air cooling (e.g. type
ONAN). The thermal model is similar to that with the single time constant, except that two
time constants must be set. The thermal curve is defined as:

0.4 exp(-t/τ1) + 0.6 exp(-t/τ2) = (Ι2 - (k.ΙFLC)2) / (Ι2 - ΙP2)


Where:

τ1 = Heating and cooling time constant of the transformer windings;


τ2 = Heating and cooling time constant for the insulating oil.
For marginal overloading, heat will flow from the windings into the bulk of the insulating oil.
Thus, at low current, the replica curve is dominated by the long time constant for the oil.
This provides protection against a general rise in oil temperature.
P44x/EN AP/F65 Application Notes

Page 110/286 MiCOM P441/P442 & P444

For severe overloading, heat accumulates in the transformer windings, with little opportunity
for dissipation into the surrounding insulating oil. Thus, at high current, the replica curve is
dominated by the short time constant for the windings. This provides protection against hot
spots developing within the transformer windings.
Overall, the dual time constant characteristic provided within the relay serves to protect the
winding insulation from ageing, and to minimise gas production by overheated oil. Note,
however, that the thermal model does not compensate for the effects of ambient temperature
change.
The following table shows the menu settings for the thermal protection element:

Setting range
Menu text Default setting Step size
Min Max
THERMAL OVERLOAD
GROUP 1
Thermal Char Single Disabled, Single, Dual
Thermal Trip 1Ιn 0.08Ιn 3.2Ιn 0.01Ιn
Thermal Alarm 70% 50% 100% 1%
Time Constant 1 10 minutes 1 minutes 200 1 minutes
minutes
Time Constant 2 5 minutes 1 minutes 200 1 minutes
minutes

THERMAL PROTECTION MENU SETTINGS


The thermal protection also provides an indication of the thermal state in the measurement
column of the relay. The thermal state can be reset by either an opto input (if assigned to this
function using the programmable scheme logic) or the relay menu, for example to reset after
injection testing. The reset function in the menu is found in the measurement column with the
thermal state.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 111/286

2.19.3 Setting guidelines


2.19.3.1 Single time constant characteristic
The current setting is calculated as:
Thermal Trip = Permissible continuous loading of the plant item/CT ratio.
Typical time constant values are given in the following table.
The relay setting, ‘Time Constant 1’, is in minutes.

Time constant τ (minutes) Limits


Air-core reactors 40
Capacitor banks 10
Overhead lines 10 Cross section ≥ 100 mm2
Cu or 150mm2 Al
Cables 60 - 90 Typical, at 66kV and above
Busbars 60

TYPICAL PROTECTED PLANT THERMAL TIME CONSTANTS


An alarm can be raised on reaching a thermal state corresponding to a percentage of the trip
threshold. A typical setting might be ‘Thermal Trip’ = 70% of thermal capacity.
2.19.3.2 Dual time constant characteristic
The current setting is calculated as:
Thermal Trip = Permissible continuous loading of the transformer / CT ratio.
Typical time constants:

τ1 (minutes) τ2 (minutes) Limits


Oil-filled transformer 5 120 Rating 400 - 1600 kVA

An alarm can be raised on reaching a thermal state corresponding to a percentage of the trip
threshold. A typical setting might be ‘Thermal Alarm’ = 70% of thermal capacity.
Note that the thermal time constants given in the above tables are typical only. Reference
should always be made to the plant manufacturer for accurate information.
2.20 Residual overvoltage (neutral displacement) protection (“Residual overvoltage”
menu)
Software version C5.x model 36, hardware J
On a healthy three phase power system, the summation of all three phase to earth voltages
is normally zero, as it is the vector addition of three balanced vectors at 120° to one another.
However, when an earth (ground) fault occurs on the primary system this balance is upset
and a ‘residual’ voltage is produced.
NOTE: This condition causes a rise in the neutral voltage with respect to earth
which is commonly referred to as “neutral voltage displacement” or
NVD.
The following figures show the residual voltages that are produced during earth fault
conditions occurring on a solid and impedance earthed power system respectively.
P44x/EN AP/F65 Application Notes

Page 112/286 MiCOM P441/P442 & P444

S R F
E
ZS ZL

A-G

VAG
VAG

VCG V BG VCG V BG VCG V BG

VAG VRES
VAG VRES
V BG V BG V BG

VCG VCG VCG

Residual voltage at R (relay point) is dependant upon ZS /ZL ratio.


Z S0
VRES = x3E
2Z S1 + Z S0 + 2Z L1 + Z L0
P0117ENb

FIGURE 60 - RESIDUAL VOLTAGE, SOLIDLY EARTHED SYSTEM


As can be seen in the previous figure, the residual voltage measured by a relay for an earth
fault on a solidly earthed system is solely depending on the ratio of source impedance
behind the relay to line impedance in front of the relay, up to the point of fault. For a remote
fault, the ZS/ZL ratio will be small, resulting in a correspondingly small residual voltage. As
such, depending upon the relay setting, such a relay would only operate for faults up to a
certain distance along the system. The value of residual voltage generated for an earth fault
condition is given by the general formula shown.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 113/286

E S R F
ZS ZL
N

ZE A-G

VAG
S VAG
G,F R G,F
G,F
VCG VCG
VCG
VBG VBG VBG

VRES VRES VRES


VBG VBG VBG
VAG VAG

VCG VCG VCG

Z S0 + 3Z E
VRES = x3E
2Z S1 + Z S0 + 2Z L1 + Z L0 + 3Z E
P0118ENb

FIGURE 61 - RESIDUAL VOLTAGE, RESISTANCE EARTHED SYSTEM


As shown in the figure above, a resistance earthed system will always generate a relatively
large degree of residual voltage, as the zero sequence source impedance now includes the
earthing impedance. It follows then, that the residual voltage generated by an earth fault on
an insulated system will be the highest possible value (3 x phase-neutral voltage), as the
zero sequence source impedance is infinite.
From the above information it can be seen that the detection of a residual overvoltage
condition is an alternative means of earth fault detection, which does not require any
measurement of zero sequence current. This may be particularly advantageous at a tee
terminal where the infeed is from a delta winding of a transformer (and the delta acts as a
zero sequence current trap).
It must be noted that where residual overvoltage protection is applied, such a voltage will be
generated for a fault occurring anywhere on that section of the system and hence the NVD
protection must co-ordinate with other earth/ground fault protection.
P44x/EN AP/F65 Application Notes

Page 114/286 MiCOM P441/P442 & P444

2.20.1 Setting guidelines


The voltage setting applied to the elements is dependent upon the magnitude of residual
voltage that is expected to occur during the earth fault condition. This in turn is dependent
upon the method of system earthing employed and may be calculated by using the
formulae’s previously given in the above figures. It must also be ensured that the relay is set
above any standing level of residual voltage that is present on the healthy system.
NOTE: IDMT characteristics are selectable on the first stage of NVD and a
time delay setting is available on the second stage of NVD in order
that elements located at various points on the system may be time
graded with one another.

Setting range
Menu text Default setting Step size
Min Max
RESIDUAL OVER-
VOLTAGE GROUP 1
VN>1 Function DT Disabled, DT, IDMT
VN>1 Voltage Set 5V 1V 80 V 1V
VN>1 Time Delay 5.00 s 0s 100.0 s 0.01 s
VN>1 TMS 1.0 0.5 100.0 0.5
VN>1 tReset 0s 0s 100.0 s 0.5 s
VN>2 Status Disabled Enabled, Disabled
VN>2 Voltage Set 10 V 1V 80 V 1V
VN>2 Time Delay 10.00 s 0s 100.0 s 0.01 s

2.21 Maximum of Residual Power Protection – Zero Sequence Power Protection (“Zero Seq
Power” menu) (since version B1.x)
2.21.1 Function description
The aim of this protection is to provide the system with selective and autonomous protection
against resistive phase to ground faults. High resistive faults such as vegetation fires cannot
be detected by distance protection.
When a phase to ground fault occurs, the fault can be considered as a zero-sequence power
generator. Zero-sequence voltage is at maximum value at the fault point. Zero-sequence
power is, therefore, also at maximum value at the same point. Supposing that zero-
sequence current is constant, zero-sequence power will decrease along the lines until null
value at the source’s neutral points (see below).

PA PB
Z os1 x . Zol (1-x).Zol Z os2

P3100XXa

With: Zos1: Zero-sequence source side 1 impedance


Zol: Zero-sequence line impedance
Zos2: Zero-sequence source side2 impedance
x: Distance to the fault from PA
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 115/286

Po Vo
1 1

0,5 0,5

0 0

PA Fault PB
P3101ENa

Selective fault clearance of the protection for forward faults is provided by the power
measurement combined with a time-delay inversely proportional to the measured power.
This protection function does not issue any trip command for reverse faults.
In compliance with sign conventions (the zero-sequence power flows from the fault towards
the sources) and with a mean characteristic angle of the zero-sequence source impedances
of the equal to 75°, the measured power is determined by the following formula:

Sr = Vrr.m.s x Irr.m.s x cos(ϕ - ϕ0)

With: ϕ: Phaseshift between Vr and Ir

ϕ0: 255° or – 75°


Vrr.m.s, Irr.m.s: R.M.S values of the residual voltage and current
The Vr and Ir values are filtered in order to eliminate the effect of the 3rd and 5th harmonics.

Zsp Timer Block

Déclenchement
Triphasé
Ir(t) Ir(t) > Ir & Zsp Trip

Vr(t) Sr(t) = Vr(t)* Ir(t)*cos(phi- phi0) Sr(t) > Sr Tb

Ta 1 Zsp Start

P0886ENa

3-pole trip is sent out when the residual power threshold “Residual Power" is overshot, after
a time-delay "Basis Time Delay" and a IDMT time-delay adjusted by the “K” time delay
factor.
The basis time-delay is set at a value greater than the 2nd stage time of the distance
protection of the concerned feeder if the 3-pole trip is active, or at a value greater than the
single-phase cycle time if single-pole autorecloser shots are active.
The IDMT time-delay is determined by the following formula:
T(s) = K x (Sref/Sr)
P44x/EN AP/F65 Application Notes

Page 116/286 MiCOM P441/P442 & P444

With: K: Adjustable time constant from 0 to 2sec (Time delay factor)


Sref: Reference residual power at:
10 VA for In = 1A
50 VA for In = 5A
Sr: Residual power generated by the fault
The following chart shows the adjustment menu for the zero-sequence residual overcurrent
protection, the adjustment ranges and the default in-factory adjustments.

Setting range
Menu text Default setting Step size
Min Max
Group1
ZERO-SEQ. POWER
Zero Seq. Power Status Activated Activated / Disabled N/A
K Time Delay Factor 0 0 2 0.2
Basis Time Delay 1s 0s 10 s 0.01s
Residual Current 0.1 x In 0.05 x In 1 x In 0.01 x In
PO threshold 510 mVA 300 mVA 6.0 VA 30.0 mVA
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 117/286

2.21.2 Settings & DDB cells assigned to zero sequence power (ZSP) function

DDB cell INPUT associated:

The ZSP TIMER BLOCK cell if assigned to an opto input in a dedicated PSL , Zero
Sequence Power function will start, but will not perform a trip command - the associated
timer will be blocked.
DDB cell OUTPUT associated:

The ZSP START cell at 1 indicates that the Zero Sequence Power function has started - in
the same time, it indicates that the timers associated have started and are running (fixed one
first and then IDMT timer).
P44x/EN AP/F65 Application Notes

Page 118/286 MiCOM P441/P442 & P444

The ZSP TRIP cell at 1 indicates that the Zero Sequence Power function has performed a
trip command (after the start and when associated timers are issued)
2.22 Undervoltage protection (“Volt protection” menu)
This protection menu contains undervoltage and overvoltage protection.
2.22.1 Undervoltage protection
Undervoltage conditions may occur on a power system for a variety of reasons, some of
which are outlined below:

• Increased system loading. Generally, some corrective action would be taken by


voltage regulating equipment such as AVR’s or On Load Tap Changers, in order to
bring the system voltage back to it’s nominal value. If the regulating equipment is
unsuccessful in restoring healthy system voltage, then tripping by means of an
undervoltage relay will be required following a suitable time delay.

• Faults occurring on the power system result in a reduction in voltage of the phases
involved in the fault. The proportion by which the voltage decreases is directly
dependent upon the type of fault, method of system earthing and its location with
respect to the relaying point. Consequently, co-ordination with other voltage and
current-based protection devices is essential in order to achieve correct discrimination.
This function will be blocked with VTS logic or could be disabled if CB open.
Both the under and overvoltage protection functions can be found in the relay menu “Volt
Protection”. The following table shows the undervoltage section of this menu along with the
available setting ranges and factory defaults.

Setting range
Menu text Default setting Step size
Min Max
GROUP 1
VOLT Protection
V< & V> MODE 0 V<1 Trip, V<2 Trip, V>1 Trip, V>2 Trip
UNDER VOLTAGE
V< Measur't Mode Phase-Neutral Phase-phase, Phase-neutral
V<1 Function DT Disabled, DT, IDMT
V<1 Voltage Set 50 V 10 V 120 V 1V
V<1 Time Delay 10 s 0s 100 s 0.01 s
V<1 TMS 1 0.5 100 0.5
V<2 Status Disabled Disabled, Enabled
V<2 Voltage Set 38 V 10 V 120 V 1V
V<2 Time Delay 5s 0s 100 s 0.01 s

As can be seen from the menu, the undervoltage protection included within the P441, P442
and P444 relays consists of two independent stages. These are configurable as either phase
to phase or phase to neutral measuring within the V< Measur’t Mode cell.
Stage 1 may be selected as either IDMT, DT or disabled, within the V<1 Function cell.
Stage 2 is DT only and is enabled/disabled in the V<2 Status cell.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 119/286

Two stages are included to provide both alarm and trip stages, where required.
Alternatively, different time settings may be required depending upon the severity of the
voltage dip.
The IDMT characteristic available on the first stage is defined by the following formula:
K
t=
1–M

Where:
K = Time Multiplier Setting (TMS)
T = Operating Time in Seconds
M = Measured Voltage / relay Setting Voltage (V<)
2.22.2 Setting Guidelines
In the majority of applications, undervoltage protection is not required to operate during
system earth fault conditions. If this is the case, the element should be selected in the menu
to operate from a phase to phase voltage measurement, as this quantity is less affected by
single phase voltage depressions due to earth faults.
The voltage threshold setting for the undervoltage protection should be set at some value
below the voltage excursions which may be expected under normal system operating
conditions. This threshold is dependent upon the system in question but typical healthy
system voltage excursions may be in the order of -10% of nominal value.
Similar comments apply with regard to a time setting for this element, i.e. the required time
delay is dependent upon the time for which the system is able to withstand a depressed
voltage.
2.23 Overvoltage protection
Undervoltage conditions may occur on a power system for a variety of reasons, some of
which are outlined below:-
• Under conditions of load rejection, the supply voltage will increase in magnitude. This
situation would normally be rectified by voltage regulating equipment such as AVRs or
on-load tap changers. However, failure of this equipment to bring the system voltage
back within prescribed limits leaves the system with an overvoltage condition which
must be cleared in order to preserve the life of the system insulation. Hence,
overvoltage protection which is suitably time delayed to allow for normal regulator
action, may be applied.

• During earth fault conditions on a power system there may be an increase in the
healthy phase voltages. Ideally, the system should be designed to withstand such
overvoltages for a defined period of time.
As previously stated, both the over and undervoltage protection functions can be found in the
relay menu “Volt Protection”. The following table shows the overvoltage section of this menu
along with the available setting ranges and factory defaults.
P44x/EN AP/F65 Application Notes

Page 120/286 MiCOM P441/P442 & P444

Setting range
Menu text Default setting Step size
Min Max
Group 1
Volt protection
V> Measur't Mode Phase-Neutral Phase-phase, Phase-neutral
V>1 Function DT Disabled, DT, IDMT
V>1 Voltage Set 75,V 60,V 185,V 1,V
V>1 Time Delay 10,s 0,s 100,s 0.01,s
V>1 TMS 1 0.5 100 0.5
V>2 Status Enabled Disabled, Enabled
V>2 Voltage Set 90,V 60,V 185,V 1,V
V>2 Time Delay 0.5,s 0,s 100,s 0.01,s

As can be seen, the setting cells for the overvoltage protection are identical to those
previously described for the undervoltage protection. The IDMT characteristic available on
the first stage is defined by the following formula:
t = K / (M - 1)
Where:
K = Time Multiplier Setting
T = Operating Time in Seconds
M = Measured Voltage / relay Setting Voltage (V>)
2.23.1 Setting Guidelines
The inclusion of the two stages and their respective operating characteristics allows for a
number of possible applications;

• Use of the IDMT characteristic gives the option of a longer time delay if the
overvoltage condition is only slight but results in a fast trip for a severe overvoltage. As
the voltage settings for both of the stages are independent, the second stage could
then be set lower than the first to provide a time delayed alarm stage if required.

• Alternatively, if preferred, both stages could be set to definite time and configured to
provide the required alarm and trip stages.

• If only one stage of overvoltage protection is required, or if the element is required to


provide an alarm only, the remaining stage may be disabled within the relay menu.
This type of protection must be co-ordinated with any other overvoltage relays at other
locations on the system. This should be carried out in a similar manner to that used for
grading current operated devices.
2.24 Circuit breaker fail protection (CBF) (“CB Fail & I<” menu)
Following inception of a fault one or more main protection devices will operate and issue a
trip output to the circuit breaker(s) associated with the faulted circuit. Operation of the circuit
breaker is essential to isolate the fault, and prevent damage / further damage to the power
system. For transmission/sub-transmission systems, slow fault clearance can also threaten
system stability. It is therefore common practice to install circuit breaker failure protection,
which monitors that the circuit breaker has opened within a reasonable time. If the fault
current has not been interrupted following a set time delay from circuit breaker trip initiation,
breaker failure protection (CBF) will operate.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 121/286

CBF operation can be used to backtrip upstream circuit breakers to ensure that the fault is
isolated correctly. CBF operation can also reset all start output contacts, ensuring that any
blocks asserted on upstream protection are removed.
2.24.1 Breaker Failure Protection Configurations
The phase selection must be performed by creating dedicated PSL.
The circuit breaker failure protection incorporates two timers, ‘CB Fail 1 Timer’ and ‘CB Fail 2
Timer’, allowing configuration for the following scenarios:

Enable tBF1
CBF1_Status
& 0
tBF1 Trip 3Ph
Pulsed output latched in UI

>1
tBF1
Breaker
Any Internal Trip A
0
& 0
>1 Fail
1
Alarm
2
3 4 tBF2 - tBF1

S
Ia<
0
Q
tBF1 & 0
tBF2 Trip 3Ph

&
1
R
2 0
4
>1
3

0
1

2 S CBF2_Status Enable

Q
>1
3 4
Any Internal Trip A
& 0 R
Non Current Prot Trip 1

2
3 4
CBA_A
Setting:
Non I Trip
Reset:
0) I< Only
1) /Trip & I<
2) CB & I<
3) Disable
4) /Trip or I<

External Trip A 1

2
S
3 4 Q
R

Ia< 1
0
>1
&
2
3 4

Setting:
Ext. Trip
>1 Reset:
0) I< Only
1) /Trip & I<
2) CB & I<

CBA_A
& 3) Disable
4) /Trip or I<

Any Internal Trip B

Ib<
PHASE B
Non Current Prot Trip Same logic as A
CBA_B
phase
WI Trip A
External Trip B
WI Trip B

WI Trip C

V<1 Trip >1 Non Current Prot Trip

V<2 Trip
Any Internal Trip C
V>1 Trip
Ic< PHASE C
V>2 Trip
Non Current Prot Trip Same logic as A
phase
CBA_C

External Trip C P0552ENa

FIGURE 62 - CB FAIL GENERAL LOGIC


P44x/EN AP/F65 Application Notes

Page 122/286 MiCOM P441/P442 & P444

• Simple CBF, where only ‘CB Fail 1 Timer’ is enabled. For any protection trip, the ‘CB
Fail 1 Timer’ is started, and normally reset when the circuit breaker opens to isolate
the fault. If breaker opening is not detected, ‘CB Fail 1 Timer’ times out and closes an
output contact assigned to breaker fail (using the programmable scheme logic). This
contact is used to backtrip upstream switchgear, generally tripping all infeeds
connected to the same busbar section.

• A re-tripping scheme, plus delayed back-tripping. Here, ‘CB Fail 1 Timer’ is used to
route a trip to a second trip circuit of the same circuit breaker. This requires
duplicated circuit breaker trip coils, and is known as re-tripping. Should re-tripping fail
to open the circuit breaker, a back-trip may be issued following an additional time
delay. The back-trip uses ‘CB Fail 2 Timer’, which is also started at the instant of the
initial protection element trip.
CBF elements ‘CB Fail 1 Timer’ and ‘CB Fail 2 Timer’ can be configured to operate for trips
triggered by protection elements within the relay or via an external protection trip. The latter
is achieved by allocating one of the relay opto-isolated inputs to ‘External Trip’ using the
programmable scheme logic.
2.24.2 Reset Mechanisms for Breaker Fail Timers
It is common practice to use low set undercurrent elements in protection relays to indicate
that circuit breaker poles have interrupted the fault or load current, as required. This covers
the following situations:

• Where circuit breaker auxiliary contacts are defective, or cannot be relied upon to
definitely indicate that the breaker has tripped.

• Where a circuit breaker has started to open but has become jammed. This may result
in continued arcing at the primary contacts, with an additional arcing resistance in the
fault current path. Should this resistance severely limit fault current, the initiating
protection element may reset. Thus, reset of the element may not give a reliable
indication that the circuit breaker has opened fully.
For any protection function requiring current to operate, the relay uses operation of
undercurrent elements (I<) to detect that the necessary circuit breaker poles have tripped
and reset the CB fail timers. However, the undercurrent elements may not be reliable
methods of resetting circuit breaker fail in all applications. For example:

• Where non-current operated protection, such as under/overvoltage or


under/overfrequency, derives measurements from a line connected voltage
transformer. Here, I< only gives a reliable reset method if the protected circuit would
always have load current flowing. Detecting drop-off of the initiating protection element
might be a more reliable method. (in that case setting will be: "Prot. Reset or I<")

• Where non-current operated protection, such as under/overvoltage or


under/overfrequency, derives measurements from a busbar connected voltage
transformer. Again using I< would rely upon the feeder normally being loaded. Also,
tripping the circuit breaker may not remove the initiating condition from the busbar,
and hence drop-off of the protection element may not occur. In such cases, the
position of the circuit breaker auxiliary contacts may give the best reset method.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 123/286

Pole Live Pole Dead

+ + +
I< T
T

- - -

Pole Live Pole Dead


+ + +
I< T

- - -

P0553ENa

FIGURE 63 - ALGORITHM FOR POLE DEAD DETECTION


Description of open pole detection algorithm:
Each half period after zero crossing of current, the algorithm detects if the current is bigger
than the I< threshold. If yes, then the detection timer is restarted, if it is lower than the
adjusted value nothing is done.
At the end of the detection timer, open pole decision is given by the algorithm.
Timer value given by: (Number of Samples/2 + 2) * ((1/Freq)/Number of Samples)
With:
T = 13,3 ms (50 Hz) T = 11,1 ms (60 Hz)
The current used is the unfiltered current (only the analog lowPass )
Example:
In the first example, the current line is interrupted by the CB opening.
The detection is confirmed 3 ms after the pole is opened.
In the second example, some residual current remains due to the CT; The detection is
confirmed 12 / 15 msec after the pole is opened.
P44x/EN AP/F65 Application Notes

Page 124/286 MiCOM P441/P442 & P444

2.24.2.1 Inputs

Data Type Description


CBF1_Status Configuration Breaker Failure 1 activated
CBF2_Status Configuration Breaker Failure 2 activated
CBF1_Timer Configuration Timer Breaker Failure 1
CBF2_Timer Configuration Timer Breaker Failure 2
CBF1_Reset Configuration Type of reset (current, CB status, interlocks).
CBF2_Reset Configuration Type of reset (current, CB Status, interlocks).
CBF_I< Configuration Dead Pole threshold detection
Any Trip A Internal Logic Trip phase A by internal or external protection
function
Any Trip B Internal Logic Trip phase B by internal or external protection
function
Any Trip C Internal Logic Trip phase C by internal or external protection
function
CB 52a_A Internal Logic CB Pole A opened
CB 52a_B Internal Logic CB Pole B opened
CB 52a_C Internal Logic CB Pole C opened
Ia<, Ib<, Ic< Internal Logic Under-current detection for dead pole

2.24.2.2 Outputs

Data Type Description


CBF1_Trip_3p Internal Logic Trip 3P CB fail by TBF1
CBF2_Trip_3p Internal Logic Trip 3P CB fail by TBF2
CB Fail Alarm Internal Logic CB Fail alarm

Resetting of the CBF is possible from a breaker open indication (from the relay’s pole dead
logic) or from a protection reset. In these cases resetting is only allowed provided the
undercurrent elements have also reset. The resetting options are summarised in the
following table.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 125/286

Initiation CB fail timer reset mechanism


(Menu selectable)
Current based protection - The resetting mechanism is fixed.
(eg. 50/51/46/21/87..) [IA< operates] &
[IB< operates] &
[IC< operates] &
[IN< operates]
Non-current based protection Three options are available. The user can select from
(eg. 27/59/81/32L..) the following options.
[All I< and IN< elements operate]
[Protection element reset] AND [All I< and IN<
elements operate]
CB open (all 3 poles) AND [All I< and IN< elements
operate]
External protection - Three options are available. The user can select any or
all of the options.
[All I< and IN< elements operate]
[External trip reset] AND [All I< and IN< elements
operate]
CB open (all 3 poles) AND [All I< and IN< elements
operate]

The selection in the relay menu is grouped as follows:

Setting range
Menu text Default setting Step size
Min Max
CB FAIL & I<
Group 1
BREAKER FAIL
CB Fail 1 Status Enabled Enabled, Disabled
CB Fail 1 Timer 0.2 s 0s 10 s 0.01 s
CB Fail 2 Status Disabled Enabled, Disabled
CB Fail 2 Timer 0.4 s 0s 10 s 0.01 s
CBF Non I Reset CB Open & I< I< Only, CB Open & I<, Prot Reset & I<,
Prot Reset or I<, Disable
CBF Ext Reset CB Open & I< I< Only, CB Open & I<, Prot Reset & I<,
Prot Reset or I<, Disable
UNDER CURRENT
I< Current Set 0.05 x In 0.05 x In 3.2 x In 0.01 x In

The ‘CBF Blocks I>‘ and ‘CBF Blocks IN>‘ settings are used to remove starts issued from the
overcurrent and earth elements respectively following a breaker fail time out. The start is
removed when the cell is set to Enabled.
P44x/EN AP/F65 Application Notes

Page 126/286 MiCOM P441/P442 & P444

2.24.3 Typical settings


2.24.3.1 Breaker Fail Timer Settings
Typical timer settings to use are as follows:

CB Fail Reset Mechanism tBF time delay Typical delay for 2½ cycle
circuit breaker
Initiating element reset CB interrupting time + element 50 + 50 + 10 + 50
reset time (max.) + error in tBF = 160 ms
timer + safety margin
CB open CB auxiliary contacts 50 + 10 + 50
opening/closing time (max.) + = 110 ms
error in tBF timer + safety
margin
Undercurrent elements CB interrupting time + 50 + 25 + 50
undercurrent element operating = 125 ms
time (max.) + safety margin

Note that all CB Fail resetting involves the operation of the undercurrent elements. Where
element reset or CB open resetting is used the undercurrent time setting should still be used
if this proves to be the worst case.
The examples above consider direct tripping of a 2½ cycle circuit breaker. Note that where
auxiliary tripping relays are used, an additional 10-15 ms must be added to allow for trip
relay operation.
2.24.3.2 Breaker Fail Undercurrent Settings
The phase undercurrent settings (I<) must be set less than load current, to ensure that I<
operation indicates that the circuit breaker pole is open. A typical setting for overhead line or
cable circuits is 20% In, with 5% In common for generator circuit breaker CBF.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 127/286

3. OTHER PROTECTION CONSIDERATIONS - SETTINGS EXAMPLE


3.1 Distance Protection Setting Example
3.1.1 Objective
To protect the 100Km double circuit line between Green Valley and Blue River substations
using relay protection in the POP Z2 Permissive Overreach mode and to set the relay at
Green Valley substation, shown in Figure 64.

Tiger Bay Green valley


Blue River Rocky bay

80 Km
100 Km 60 Km

System Data
Green Valley - Blue River transmission line 21 21
System voltage 230kv
System grounding solid
CT ratio 1200/5
VT ratio 230000/115
Line length 100km
Line impedance
Z1 = 0.089 + J0.476 OHM/km
Z0 = 0.426 + J1.576 OHM/km
Faults levels
Green Valley substation busbars maximum 5000MVA, minimum 2000MVA
Blue River substation busbars maximum 3000MVA, minimum 1000MVA P3074ENa

FIGURE 64 - SYSTEM ASSUMED FOR WORKED EXAMPLE


3.1.2 System Data
Line length: 100Km

Line impedances: Z = 0.089 + j0.476 = 0.484 / 79.4° Ω/km


1

Z = 0.426 + j1.576 = 1.632 / 74.8° Ω/km


0

Z /Z1 = 3.372 / -4.6°


0
CT ratio: 1 200 / 5
VT ratio: 230 000 / 115
3.1.3 Relay Settings
It is assumed that Zone 1 Extension is not used and that only three forward zones are
required. Settings on the relay can be performed in primary or secondary quantities and
impedances can be expressed as either polar or rectangular quantities (menu selectable).
For the purposes of this example, secondary quantities are used.
3.1.4 Line Impedance
1200 / 5
Ratio of secondary to primary impedance = = 0.12
230000 / 115
Line impedance secondary = ratio CT/VT x line impedance primary.
Line Impedance = 100 x 0.484 / 79.4° (primary) x 0.12
= 5.81 / 79.4° Ω secondary.
Relay Line Angle settings -90° to 90° in 1° steps. Therefore, select Line Angle = 80° for
convenience.

Therefore set Line Impedance and Line Angle: = 5.81 / 80° Ω secondary.
P44x/EN AP/F65 Application Notes

Page 128/286 MiCOM P441/P442 & P444

3.1.5 Zone 1 Phase Reach Settings


Required Zone 1 reach is to be 80% of the line impedance between Green Valley and Blue
River substations.

Required Zone 1 reach = 0.8 x 100 x 0.484 / 79.4° x 0.12


Z1 = 4.64 / 79.4° Ω secondary.
Z2 = 100 x 0.484 / 79.4° + 50% x 60 x 0.484 / 79.4°
The Line Angle = 80°.

Therefore actual Zone 1 reach, Z1 = 4.64 / 80° Ω secondary.


3.1.6 Zone 2 Phase Reach Settings
Required Zone 2 impedance =
(Green Valley-Blue River) line impedance + 50% (Blue River-Rocky Bay) line impedance

Z2 = (100+30) x 0.484 / 79.4° x 0.12


= 7.56 / 79.4° Ω secondary.
The Line Angle = 80°.

Actual Zone 2 reach setting = 7.56 / 80° Ω secondary


3.1.7 Zone 3 Phase Reach Settings
Required Zone 3 forward reach =
(Green Valley-Blue River + Blue River-Rocky Bay) x 1.2

= (100+60) x 1.2 x 0.484 / 79.4° x 0.12


Z3 = 11.15 / 79.4° ohms secondary
Actual Zone 3 forward reach setting = 11.16 / 80° ohms secondary
3.1.8 Zone 4 Reverse Settings with no Weak Infeed Logic Selected
Required Zone 4 reverse reach impedance = Typically 10% Zone 1 reach

= 0.1 x 4.64 / 79.4°


Z4 = 0.464 / 79.4°
Actual Zone 4 reverse reach setting = 0.46 / 80° ohms secondary
3.1.9 Zone 4 Reverse Settings with Weak Infeed Logic Selected
Where zone 4 is used to provide reverse directional decisions for Blocking or Permissive
Overreach schemes, zone 4 must reach further behind the relay than zone 2 for the remote
relay. This can be achieved by setting: Z4 ≥ ((Remote zone 2 reach) x 120%) minus the
protected line impedance:
Remote Zone 2 reach =
(Blue River-Green Valley) line impedance + 50% (Green Valley-Tiger Bay) line impedance

= (100+40) x 0.484 / 79.4° x 0.12


= 8.13 / 79.4° Ω secondary.
Z4 ≥ ((8.13 / 79.4°) x 120%) - (5.81 / 79.4°)
= 3.95 / 79.4°
Minimum zone 4 reverse reach setting = 3.96 / 80° ohms secondary
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 129/286

3.1.10 Residual Compensation for Earth Fault Elements


The residual compensation factor can be applied independently to certain zones if required.
This feature is useful where line impedance characteristics change between sections or
where hybrid circuits are used. In this example, the line impedance characteristics do not
change and as such a common KZ0 factor can be applied to each zone. This is set as a
ratio “kZ0 Res. Comp”, and an angle “kZ0 Angle”:

kZ0 Res. Comp, ⏐kZ0⏐ = (Z0 - Z1) / 3.Z1 Ie: As a ratio.

kZ0 Angle, ∠kZ0 = ∠ (Z0 - Z1) / 3.Z1 Set in degrees.


Z -Z = (0.426 + j1.576) - (0.089 + j0.476)
L0 L1
= 0.337 + j1.1

= 1.15 / 72.9°
1.15 / 72.9°
kZ0 = = 0.79 / –6.5°
3 × 0.484 / 79.4°

Therefore, select:
kZ0 Res. Comp = 0.79 (Set for kZ1, kZ2, kZp, kZ4).
kZ0 Angle = –6.5° (Set for kZ1, kZ2, kZp, kZ4).
3.1.11 Resistive Reach Calculations
All distance elements must avoid the heaviest system loading. Taking the 5A CT secondary
rating as a guide to the maximum load current, the minimum load impedance presented to
the relay would be:

Vn (phase-neutral) / In = (115 / √3) / 5 = 13.3 Ω (secondary)


Typically, phase fault distance zones would avoid the minimum load impedance by a margin
of ≥40% if possible (bearing in mind that the power swing characteristic surrounds the
tripping zones), earth fault zones would use a ≥20% margin. This allows maximum resistive
reaches of 7.9Ω, and 10.6Ω, respectively.

From Table 1 (see §2.4.4), taking a required primary resistive coverage of 14.5Ω for phase
faults, and assuming a typical earth fault coverage of 40Ω, the minimum secondary reaches
become:

RPh (min) = 14.5 x 0.12 = 1.74Ω (secondary);

RG (min) = 40 x 0.12 = 4.8Ω (secondary).


Resistive reaches could be chosen between the calculated values as shown in Table 10.
The zone 2 elements satisfy R2Ph ≤ (R3Ph x 80%), and R2G ≤ (R3G x 80%).

Minimum Maximum Zone 1 Zone 2 Zones 3 & 4


Phase (RPh) Ω 1.74 7.9 R1Ph = 3 R1Ph = 4 R3Ph-4Ph = 8
Earth (RG) Ω 4.8 10.6 R1G = 5 R1G = 6 R3G-4G = 10

TABLE 10 - SELECTION OF RESISTIVE REACHES

R3Ph/2 = R4Ph/2 should be set ≤ 80% Z minimum load – ∆R.


P44x/EN AP/F65 Application Notes

Page 130/286 MiCOM P441/P442 & P444

3.1.12 Power Swing Band

Typically, the ∆R and ∆X band settings are both set between 10 - 30% of R3Ph. This gives
a secondary impedance between 0.6 and 1.8Ω. For convenience, 1.0Ω could be set.
The width of the power swing band is calculated as follows:

∆R = 1.3 × tan(π × ∆f × ∆t) × RLOAD


Assuming that the load corresponds to 60° angles between sources and if the resistive reach
is set so that Rlim = RLOAD/2, the following is obtained:

∆R = 0.032 × ∆f × RLOAD
To ensure that a power swing frequency of 5 Hz is detected, the following is obtained:

∆R = 0.16 × RLOAD
Where:

∆R width of the power swing detection band

∆f power swing frequency (fA – fB)


Rlim resistive reach of the starting characteristic (=R3ph-R4ph)
Z network impedance corresponding to the sum of the reverse (Z4) and
forward (Z3) impedances
RLOAD load resistance
3.1.13 Current Reversal Guard
The current reversal guard timer available with POP schemes needs a non-zero setting
when the reach of the zone 2 elements is greater than 1.5 times the impedance of the
protected line. In this example, their reach is only 1.3 times the protected line impedance.
Therefore, current reversal guard logic does not need to be used and the recommended
settings for scheme timers are:
tREVERSAL GUARD = 0
Tp = 98ms (typical).
3.1.14 Instantaneous Overcurrent Protection
To provide parallel high-speed fault clearance to the distance protection, it is possible to use
the I>3 element as an instantaneous highset. It must be ensured that the element will only
respond to faults on the protected line. The worst case scenario for this is when only one of
the parallel lines is in service.
Two cases must be considered. The first case is a fault at Blue River substation with the
relay seeing fault current contribution via Green Valley. The second case is a fault at Green
Valley with the relay seeing fault current contribution via Blue River.
Case 1:

Source Impedance = 2302 / 5000 = 10.58Ω

Line Impedance = 48.4Ω

Fault current seen by relay = (230000 / √3) / (10.58 + 48.4)


= 2251A
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 131/286

Case 2:

Source Impedance = 2302 / 3000 = 17.63Ω

Line Impedance = 48.4Ω

Fault current seen by relay = (230000 / √3) / (17.63 + 48.4)


= 2011A
The overcurrent setting must be in excess of 2251A. To provide an adequate safety margin
a setting ≥120% the minimum calculated should be chosen, say 2800A.
3.2 Teed feeder protection
The application of distance relays to three terminal lines is fairly common. However, several
problems arise when applying distance protection to three terminal lines.
3.2.1 The Apparent Impedance Seen by the Distance Elements
Figure 65 shows a typical three terminal line arrangement. For a fault at the busbars of
terminal B the impedance seen by a relay at terminal A will be equal to:
Za = Zat + Zbt + [ Zbt.(Ic/Ia) ]
Relay A will underreach for faults beyond the tee-point with infeed from terminal C. When
terminal C is a relatively strong source, the underreaching effect can be substantial. For a
zone 2 element set to 120% of the protected line, this effect may result in non-operation of
the element for internal faults. This not only effects time delayed zone 2 tripping but also
channel-aided schemes. Where infeed is present, it will be necessary for Zone 2 elements
at all line terminals to overreach both remote terminals with allowance for the effect of tee-
point infeed. Zone 1 elements must be set to underreach the true impedance to the nearest
terminal without infeed. Both these requirements can be met through use of the alternative
setting groups in the P441, P442 and P444 relays.

A Ia Ib B

Zat Zbt

Ic

Zct

C
Va = Ia Zat + Ib Zbt Impedance seen by relay A = Va
Ia
Ib = Ia + Ic Za = Zat + Zbt + Ic Zbt
Ia
Va = Ia Zat + Ia Zbt + Ic Zbt
P3075ENa

FIGURE 65 - TEED FEEDER APPLICATION - APPARENT IMPEDANCES SEEN BY RELAY


3.2.2 Permissive Overreach Schemes
To ensure operation for internal faults in a POP scheme, the relays at the three terminals
should be able to see a fault at any point within the protected feeder. This may demand very
large zone 2 reach settings to deal with the apparent impedances seen by the relays.
A POP scheme requires the use of two signalling channels. A permissive trip can only be
issued upon operation of zone 2 and receipt of a signal from both remote line ends. The
requirement for an 'AND' function of received signals must be realised through use of contact
logic external to the relay, or the internal Programmable Scheme Logic. Although a POP
scheme can be applied to a three terminal line, the signalling requirements make its use
unattractive.
P44x/EN AP/F65 Application Notes

Page 132/286 MiCOM P441/P442 & P444

3.2.3 Permissive Underreach Schemes


For a PUP scheme, the signalling channel is only keyed for internal faults. Permissive
tripping is allowed for operation of zone 2 plus receipt of a signal from either remote line end.
This makes the signalling channel requirements for a PUP scheme less demanding than for
a POP scheme. A common power line carrier (PLC) signalling channel or a triangulated
signalling arrangement can be used. This makes the use of a PUP scheme for a teed feeder
a more attractive alternative than use of a POP scheme.
The channel is keyed from operation of zone 1 tripping elements. Provided at least one
zone 1 element can see an internal fault then aided tripping will occur at the other terminals if
the overreaching zone 2 setting requirement has been met. There are however two cases
where this is not possible:
Figure 66 (i) shows the case where a short tee is connected close to another terminal. In
this case, zone 1 elements set to 80% of the shortest relative feeder length do not overlap.
This leaves a section not covered by any zone 1 element. Any fault in this section would
result in zone 2 time delayed tripping.
Figure 66 (ii) shows an example where terminal 'C' has no infeed. Faults close to this
terminal will not operate the relay at 'C' and hence the fault will be cleared by the zone 2
time-delayed elements of the relays at 'A' and 'B'.
Figure 66 (iii) illustrates a further difficulty for a PUP scheme. In this example current is
outfeed from terminal 'C' for an internal fault. The relay at 'C' will therefore see the fault as
reverse and not operate until the breaker at 'B' has opened; i.e. sequential tripping will occur.

(i) A B

Z1A Z1C
= area where no zone 1 overlap exists

C
(ii) A B

Z1A Z1B

Fault Fault seen by A & B in zone 2

C
No infeed

(iii) A B

Relay at C sees reverse fault until B opens


P3076ENa

FIGURE 66 - TEED FEEDER APPLICATIONS


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 133/286

3.2.4 Blocking Schemes


Blocking schemes are particularly suited to the protection of teed feeders, since high speed
operation can be achieved where there is no current infeed from one or more terminals. The
scheme also has the advantage that only a common simplex channel or a triangulated
simplex channel is required.
The major disadvantage of blocking schemes is highlighted in Figure 66 (iii) where fault
current is outfeed from a terminal for an internal fault condition. relay 'C' sees a reverse fault
condition. This results in a blocking signal being sent to the two remote line ends, preventing
tripping until the normal zone 2 time delay has expired.
3.3 Alternative setting groups
The P441, P442 and P444 relays can store up to four independent groups of settings. The
active group is selected either locally via the menu or remotely via the serial
communications. The ability to quickly reconfigure the relay to a new setting group may be
desirable if changes to the system configuration demand new protection settings. Typical
examples where this feature can be used include:
Single bus installations with a transfer bus;
Double bus installations, with or without a separate transfer bus, where the transfer circuit
breaker or bus coupler might be used to take up the duties of any feeder circuit breaker
when both the feeder circuit breaker and the current transformers are by-passed.
In the case of a double bus installation, it is usual for bus 1 to be referred to as the main bus
and bus 2 as the reserve bus, and for any bypass circuit isolator to be connected to bus 2 as
shown in Figure 67. This arrangement avoids the need for a current polarity reversing switch
that would be required if both buses were to be used for by-pass purposes. The standby
relay, associated with the transfer circuit breaker or the bus coupler, can be programmed
with the individual setting required for each of the outgoing feeders. For bypass operation the
appropriate setting group can be selected as required. This facility is extremely useful in the
case of unattended substations where all of the switching can be controlled remotely.

Main bus (1)

Reserve bus (2)

21

P440
21 21

Feeder 1 Feeder 2
P3077ENa

FIGURE 67 - TYPICAL DOUBLE BUS INSTALLATION WITH BYPASS FACILITIES


A further use for this feature is the ability to provide alternative settings for teed feeders or
double circuit lines with mutual coupling. Similar alternative settings could be required to
cover different operating criteria in the event of the channel failing, or an alternative system
configuration (ie. lines being switched in or out).
P44x/EN AP/F65 Application Notes

Page 134/286 MiCOM P441/P442 & P444

3.3.1 Selection of Setting Groups


Setting groups can be changed by one of two methods selectable by MiCOM S1:

• Automatic group selection by changes in state of two opto-isolated inputs, assigned as


Setting Group Change bit 0 (opto 1), and Setting Group Change bit 1 (opto 2), as
shown in Table 11 below. The new setting group binary code must be maintained for 2
seconds before a group change is implemented, thus rejecting spurious induced
interference.(See also hysteresis value for level logic 0 & level logic 1 in section 5.1 of
this chapter).
When this selection is chosen, the two opto-isolated inputs assigned to this function
will be opto inputs 1 and 2 and they must not be connected to any output signal
in the PSL. Special care should be take into account to avoid use them for another
purpose (i.e in the default PSL they have been used for another functions: DIST/DEF
Chan. Recv. For opto 1 and DIST/DEF carrier out of service).

• Default PSL: To enable the setting group via binary inpputs, the opto input 1 and 2
must be removed from the PSL.
(If assigned in the PSL, instead of Dist DEF Carrier Receive Logic Start, a setting
group change will occur)

Note that each setting group has its own dedicated PSL, which should be configured and
sent to the relay independently)
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 135/286

• Or using the relay operator interface / remote communications. Should the user issue
a menu command to change group, the relay will transfer to that settings group, and
then ignore future changes in state of the bit 0 and bit 1 opto-inputs. Thus, the user is
given greater priority than automatic setting group selection.

Binary State of SG Change bit 1 Binary State of SG Change bit 0 Setting Group
Activated
Opto 2 Opto 1
0 0 1
0 1 2
1 0 3
1 1 4

TABLE 11 - SETTING GROUP SELECTION


REMINDER: IF SELECTED IN THE MENU (CHANGEMENT GROUPS BY OPTOS),
OPTO 1 & 2 MUST BE REMOVED FROM THE PSL (THEY ARE
DEDICATED FOR GROUPS SELECTION ONLY)
P44x/EN AP/F65 Application Notes

Page 136/286 MiCOM P441/P442 & P444

4. APPLICATION OF NON-PROTECTION FUNCTIONS


4.1 Event Recorder (“View records” menu)
The relay records and time tags up to 250 events and stores them in non-volatile (battery
backed up – installed behind the plastic cover in front panel of the relay)) memory. This
enables the system operator to establish the sequence of events that occurred within the
relay following a particular power system condition, switching sequence etc. When the
available space is exhausted, the oldest event is automatically overwritten by the new one
(First in first out).
The real time clock within the relay provides the time tag to each event, to a resolution of
1ms.
The event records are available for viewing either via the frontplate LCD or remotely, via the
communications ports or via MiCOM S1 with a PC. connected to the relay (event extracted
from relay & loaded in PC):
1. Established the communication [ Device\open connection\address (always1 by serial
front port\Password (AAAA) ]

2. Select the extraction of events:

3. Events must be listed, identified (file named) & Stored


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 137/286

Local viewing on the LCD is achieved in the menu column entitled ‘VIEW RECORDS’. This
column allows viewing of event, fault and maintenance records and is shown below:-

VIEW RECORDS
LCD Reference Description
Select Event Setting range from 0 to 249.
This selects the required event record from the possible 250 that
may be stored. A value of 0 corresponds to the latest event and so
on.
Time & Date Time & Date Stamp for the event given by the internal Real Time
Clock
Event Text Up to 32 Character description of the Event (refer to following
sections)
Event Value Up to 32 Bit Binary Flag or integer representative of the Event
(refer to following sections)
Select Fault Setting range from 0 to 4.
This selects the required fault record from the possible 5 that may
be stored. A value of 0 corresponds to the latest fault and so on.
The following cells show all the fault flags, protection starts,
protection trips, fault location, measurements etc. associated with
the fault, i.e. the complete fault record.
Select Report Setting range from 0 to 4.
This selects the required maintenance report from the possible 5
that may be stored. A value of 0 corresponds to the latest report
and so on.
Report Text Up to 32 Character description of the occurrence (refer to following
sections)
Report Type These cells are numbers representative of the occurrence. They
form a specific error code which should be quoted in any related
correspondence to AREVA T&D P&C Ltd.
Report Data
Reset Indication Either Yes or No. This serves to reset the trip LED indications
provided that the relevant protection element has reset.

For extraction from a remote source via communications, refer to Chapter P44x/EN CM,
(Commissioning) where the procedure is fully explained.
Note that a full list of all the event types and the meaning of their values is given in chapter
P44x/EN GC (Configurations Mapping).
P44x/EN AP/F65 Application Notes

Page 138/286 MiCOM P441/P442 & P444

Types of Event
An event may be a change of state of a control input or output relay, an alarm condition,
setting change etc. The following sections show the various items that constitute an event:-

FIGURE 68 - FILE\OPEN\EVENTS FILE


4.1.1 Change of state of opto-isolated inputs.
If one or more of the opto (logic) inputs has changed state since the last time that the
protection algorithm ran, the new status is logged as an event. When this event is selected to
be viewed on the LCD, three applicable cells will become visible as shown below.

Time & Date of Event


“LOGIC INPUTS”
“Event Value
0101010101010101”

The Event Value is an 8 or 16 bit word showing the status of the opto inputs, where the least
significant bit (extreme right) corresponds to opto input 1 etc. The same information is
present if the event is extracted and viewed via PC.
4.1.2 Change of state of one or more output relay contacts.
If one or more of the output relay contacts has changed state since the last time that the
protection algorithm ran, then the new status is logged as an event. When this event is
selected to be viewed on the LCD, three applicable cells will become visible as shown below;

Time & Date of Event


“OUTPUT CONTACTS”
“Event Value
010101010101010101010”

The Event Value is a 7, 14 or 21 bit word showing the status of the output contacts, where
the least significant bit (extreme right) corresponds to output contact 1 etc. The same
information is present if the event is extracted and viewed via PC.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 139/286

4.1.3 Relay Alarm conditions.


Any alarm conditions generated by the relays will also be logged as individual events. The
following table shows examples of some of the alarm conditions and how they appear in the
event list:-

Alarm Condition Resulting Event


Event Text Event Value
Battery Fail Battery Fail ON/OFF Number from 0 to 31
Field Voltage Fail Field V Fail ON/OFF Number from 0 to 31
Setting group via opto invalid Setting Grp Invalid ON/OFF Number from 0 to 31
Protection Disabled Prot'n Disabled ON/OFF Number from 0 to 31
Frequency out of range Freq out of Range ON/OFF Number from 0 to 31
VTS Alarm VT Fail Alarm ON/OFF Number from 0 to 31
CB Trip Fail Protection CB Fail ON/OFF Number from 0 to 31

The previous table shows the abbreviated description that is given to the various alarm
conditions and also a corresponding value between 0 and 31. This value is appended to
each alarm event in a similar way as for the input and output events previously described. It
is used by the event extraction software, such as MiCOM S1, to identify the alarm and is
therefore invisible if the event is viewed on the LCD. Either ON or OFF is shown after the
description to signify whether the particular condition has become operated or has reset.
4.1.4 Protection Element Starts and Trips
Any operation of protection elements, (either a start or a trip condition), will be logged as an
event record, consisting of a text string indicating the operated element and an event value.
Again, this value is intended for use by the event extraction software, such as MiCOM S1,
rather than for the user, and is therefore invisible when the event is viewed on the LCD.
4.1.5 General Events
A number of events come under the heading of ‘General Events’ - an example is shown
below:-

Nature of Event Displayed Text in Event Record Displayed Value


Level 1 Password Modified PW1 Edited UI, F or R 0
Either from User Interface,
Front or Rear Port

A complete list of the ‘General Events’ is given in chapter P44x/EN GC.


4.1.6 Fault Records
Each time a fault record is generated, an event is also created. The event simply states that
a fault record was generated, with a corresponding time stamp.
Note that viewing of the actual fault record is carried out in the ‘Select Fault’ cell further down
the ‘VIEW RECORDS’ column, which is selectable from up to 5 records. These records
consist of fault flags, fault location, fault measurements etc. Also note that the time stamp
given in the fault record itself will be more accurate than the corresponding stamp given in
the event record as the event is logged some time after the actual fault record is generated.
P44x/EN AP/F65 Application Notes

Page 140/286 MiCOM P441/P442 & P444

4.1.7 Maintenance Reports


Internal failures detected by the self monitoring circuitry, such as watchdog failure, field
voltage failure etc. are logged into a maintenance report. The Maintenance Report holds up
to 5 such ‘events’ and is accessed from the ‘Select Report’ cell at the bottom of the ‘VIEW
RECORDS’ column.
Each entry consists of a self explanatory text string and a ‘Type’ and ‘Data’ cell, which are
explained in the menu extract at the beginning of this section and in further detail in
Appendix A.
Each time a Maintenance Report is generated, an event is also created. The event simply
states that a report was generated, with a corresponding time stamp.
Error codes are in hexadecimal format and must be recalculated in decimal format to check
with the table in chapter P44x/EN GC.
4.1.8 Setting Changes
Changes to any setting within the relay are logged as an event. Two examples are shown in
the following table:

Type of Setting Change Displayed Text in Event Record Displayed Value


Control/Support Setting C & S Changed 0
Group 1 Change Group 1 Changed 1

NOTE: Control/Support settings are communications, measurement, CT/VT


ratio settings etc, which are not duplicated within the four setting
groups. When any of these settings are changed, the event record is
created simultaneously. However, changes to protection or
disturbance recorder settings will only generate an event once the
settings have been confirmed at the ‘setting trap’.
4.1.9 Resetting of Event / Fault Records
If it is required to delete either the event, fault or maintenance reports, this may be done from
within the ‘RECORD CONTROL’ column.
4.1.10 Viewing Event Records via MiCOM S1 Support Software
When the event records are extracted and viewed on a PC they look slightly different than
when viewed on the LCD. The following shows an example of how various events appear
when displayed using MiCOM S1:-

− Monday 03 November 1998 15:32:49 GMT I>1 Start ON 2147483881


AREVA: MiCOM
Model Number: P441
Address: 001 Column: 00 Row: 23
Event Type: Protection operation

− Monday 03 November 1998 15:32:52 GMT Fault Recorded 0


AREVA: MiCOM
Model Number: P441
Address: 001 Column: 01 Row: 00
Event Type: Fault record
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 141/286

− Monday 03 November 1998 15:33:11 GMT Logic Inputs 00000000


AREVA: MiCOM
Model Number: P441
Address: 001 Column: 00 Row: 20
Event Type: Logic input changed state

− Monday 03 November 1998 15:34:54 GMT Output Contacts 0010000


AREVA: MiCOM
Model Number: P441
Address: 001 Column: 00 Row: 21
Event Type: relay output changed state
As can be seen, the first line gives the description and time stamp for the event, whilst the
additional information that is displayed below may be collapsed via the +/- symbol.
For further information regarding events and their specific meaning, refer to chapter
P44x/EN GC.
P44x/EN AP/F65 Application Notes

Page 142/286 MiCOM P441/P442 & P444

4.2 Circuit breaker condition monitoring (“CB Condition” menu)


Periodic maintenance of circuit breakers is necessary to ensure that the trip circuit and
mechanism operate correctly, and also that the interrupting capability has not been
compromised due to previous fault interruptions. Generally, such maintenance is based on a
fixed time interval, or a fixed number of fault current interruptions. These methods of
monitoring circuit breaker condition give a rough guide only and can lead to excessive
maintenance.
The relays record various statistics related to each circuit breaker trip operation, allowing a
more accurate assessment of the circuit breaker condition to be determined. These
monitoring features are discussed in the following section.
4.2.1 Circuit Breaker Condition Monitoring Features
For each circuit breaker trip operation the relay records statistics as shown in the following
table taken from the relay menu. The menu cells shown are counter values only. The
Min/Max values in this case show the range of the counter values. These cells can not be
set:

Setting range
Menu text Default setting Step size
Min Max
CB CONDITION
CB Operations 0 0 10000 1
{3 pole tripping}
CB A Operations 0 0 10000 1
{1 & 3 pole tripping}
CB B Operations 0 0 10000 1
{1 & 3 pole tripping}
CB C Operations 0 0 10000 1
{1 & 3 pole tripping}
Total IA Broken 0 0 25000In^ 1
Total IB Broken 0 0 25000In^ 1
Total IC Broken 0 0 25000In^ 1In^
CB Operate Time 0 0 0.5s 0.001
Reset All Values No Yes, No

The above counters may be reset to zero, for example, following a maintenance inspection
and overhaul.
The following table, detailing the options available for the CB condition monitoring, is taken
from the relay menu. It includes the setup of the current broken facility and those features
which can be set to raise an alarm or CB lockout.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 143/286

Setting range
Menu text Default setting Step size
Min Max
CB MONITOR SETUP Default Min Max Step
Broken I^ 2 1 2 0.1
I^ Maintenance Alarm Disabled Alarm Disabled, Alarm Enabled
I^ Maintenance 1000In^ 1In^ 25000In^ 1In^
I^ Lockout Alarm Disabled Alarm Disabled, Alarm Enabled
I^ Lockout 2000In^ 1In^ 25000In^ 1In^
N° CB Ops Maint Alarm Disabled Alarm Disabled, Alarm Enabled
N° CB Ops Maint 10 1 10000 1
N° CB Ops Lock Alarm Disabled Alarm Disabled, Alarm Enabled
N° CB Ops Lock 20 1 10000 1
CB Time Maint Alarm Disabled Alarm Disabled, Alarm Enabled
CB Time Maint 0.1s 0.005s 0.5s 0.001s
CB Time Lockout Alarm Disabled Alarm Disabled, Alarm Enabled
CB Time Lockout 0.2s 0.005s 0.5s 0.001s
Fault Freq Lock Alarm Disabled Alarm Disabled, Alarm Enabled
Fault Freq Count 10 0 9999 1
Fault Freq Time 3600s 0 9999s 1s

The circuit breaker condition monitoring counters will be updated every time the relay issues
a trip command.One counter is incremented by phase,.the highest counter value is
compared to two thresholds values settable (value n):

Maintenance Alarm or Lock Out Alarm can be generated.


P44x/EN AP/F65 Application Notes

Page 144/286 MiCOM P441/P442 & P444

A pre-lock out Alarm is generated at value n-1.


All counters can be re-initiated with the command Reset all values (by HMI)
In cases where the breaker is tripped by an external protection device it is also possible to
update the CB condition monitoring. This is achieved by allocating one of the relays opto-
isolated inputs (via the programmable scheme logic) to accept a trigger from an external
device. The signal that is mapped to the opto is called ‘External TripA or B or C’.

Note that when in Commissioning test mode the CB condition monitoring counters will not be
updated.
4.2.2 Setting guidelines

Setting the Σ I^ Thresholds


Where overhead lines are prone to frequent faults and are protected by oil circuit breakers
(OCB’s), oil changes account for a large proportion of the life cycle cost of the switchgear.
Generally, oil changes are performed at a fixed interval of circuit breaker fault operations.
However, this may result in premature maintenance where fault currents tend to be low, and
hence oil degradation is slower than expected. The Σ I^ counter monitors the cumulative
severity of the duty placed on the interrupter allowing a more accurate assessment of the
circuit breaker condition to be made.

For OCB’s, the dielectric withstand of the oil generally decreases as a function of Σ I2t. This
is where ‘I’ is the fault current broken, and ‘t’ is the arcing time within the interrupter tank (not
the interrupting time). As the arcing time cannot be determined accurately, the relay would
normally be set to monitor the sum of the broken current squared, by setting ‘Broken I^’ = 2.
For other types of circuit breaker, especially those operating on higher voltage systems,
practical evidence suggests that the value of ‘Broken I^’ = 2 may be inappropriate. In such
applications ‘Broken I^’ may be set lower, typically 1.4 or 1.5. An alarm in this instance may
be indicative of the need for gas/vacuum interrupter HV pressure testing, for example.
The setting range for ‘Broken I^’ is variable between 1.0 and 2.0 in 0.1 steps. It is
imperative that any maintenance programme must be fully compliant with the switchgear
manufacturer’s instructions.
4.2.3 Setting the Number of Operations Thresholds
Every operation of a circuit breaker results in some degree of wear for its components.
Thus, routine maintenance, such as oiling of mechanisms, may be based upon the number
of operations. Suitable setting of the maintenance threshold will allow an alarm to be raised,
indicating when preventative maintenance is due. Should maintenance not be carried out,
the relay can be set to lockout the autoreclose function on reaching a second operations
threshold. This prevents further reclosure when the circuit breaker has not been maintained
to the standard demanded by the switchgear manufacturer’s maintenance instructions.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 145/286

Certain circuit breakers, such as oil circuit breakers (OCB’s) can only perform a certain
number of fault interruptions before requiring maintenance attention. This is because each
fault interruption causes carbonising of the oil, degrading its dielectric properties. The
maintenance alarm threshold (N° CB Ops Maint) may be set to indicate the requirement for
oil sampling for dielectric testing, or for more comprehensive maintenance. Again, the
lockout threshold (N° CB Ops Lock) may be set to disable autoreclosure when repeated
further fault interruptions could not be guaranteed. This minimises the risk of oil fires or
explosion.
4.2.4 Setting the Operating Time Thresholds
Slow CB operation is also indicative of the need for mechanism maintenance. Therefore,
alarm and lockout thresholds (CB Time Maint / CB Time Lockout) are provided and are
settable in the range of 5 to 500ms. This time is set in relation to the specified interrupting
time of the circuit breaker.
4.2.5 Setting the Excessive Fault Frequency Thresholds
A circuit breaker may be rated to break fault current a set number of times before
maintenance is required. However, successive circuit breaker operations in a short period of
time may result in the need for increased maintenance. For this reason it is possible to set a
frequent operations counter on the relay which allows the number of operations (Fault Freq
Count) over a set time period (Fault Freq Time) to be monitored. A separate alarm and
lockout threshold can be set.
4.2.6 Inputs/Outputs for CB Monitoring logic
4.2.6.1 Inputs

Reset Lock Out


Provides a reset of the CB monitoring lock out (all counters & values are reset)

Reset All Values


Provides a reset of the CB monitoring (all counters & values are reset)
4.2.6.2 Outputs

I^Maint Alarm
An alarm maintenance is issued when the maximum broken current (1st level) calculated by
the CB monitoring function is reached

I^Lock Out Alarm


An alarm Lock Out is issued when the maximum broken current (2nd level) calculated by the
monitoring function is reached

CB Ops Maint
An alarm is issued when the maximum of CB operations is reached [initiated by internal (any
protection function) or external trip (via opto)] (1st level:CB Ops Maint)

CB Ops Lockout
An alarm is issued when the maximum of CB operations is reached [initiated by internal or
external trip] (2nd level:CB Ops Lock)

CB Op Time Maint
An alarm is issued when the operating tripping time on any phase pass over the CB Time
Maint adjusted in MiCOM S1 (slowest pole detection calculated by I< from CB Fail logic)
P44x/EN AP/F65 Application Notes

Page 146/286 MiCOM P441/P442 & P444

CB Op Time Lock
An alarm is issued when the operating tripping time on any phase pass over the CB Time
Lockout adjusted in MiCOM S1 (slowest pole detection calculated by I< from CB Fail logic)

FF Pre Lockout
An alarm is issued at (n-1) value in the counters of Main lock out or Fault frequency

FF Lock
An alarm is issued at (n) value in the counters of Main lock out or Fault frequency

Lockout Alarm
An alarm is issued with: CBC Unhealthy or CBC No check sync or CBC Fail to close or CBC
fail to trip or FF Lock or CB Op Time Lock or CB Ops Lock
4.3 Circuit Breaker Control (“CB Control” menu)
The relay includes the following options for control of a single circuit breaker:

• Local tripping and closing, via the relay menu

• Local tripping and closing, via relay opto-isolated inputs

• Remote tripping and closing, using the relay communications


It is recommended that separate relay output contacts are allocated for remote circuit
breaker control and protection tripping. This enables the control outputs to be selected via a
local/remote selector switch as shown in Figure 69. Where this feature is not required the
same output contact(s) can be used for both protection and remote tripping.

Protection + ve
trip
Remote
control
trip Trip
0
Remote close
control
close

Local
Remote

Trip Close
ve
P3078ENa

FIGURE 69 - REMOTE CONTROL OF CIRCUIT BREAKER


The following table is taken from the relay menu and shows the available settings and
commands associated with circuit breaker control. Depending on the relay model some of
the cells may not be visible:
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 147/286

Setting range
Menu text Default setting Step size
Min Max
CB CONTROL
CB Control by Disabled Disabled, Local, Remote, Local+Remote,
Opto, Opto+local, Opto+Remote,
Opto+Rem+local
Close Pulse Time 0.5s 0.1s 10s 0.01s
Trip Pulse Time 0.5s 0.1s 5s 0.01s
Man Close Delay 10s 0.01s 600s 0.01s
Healthy Window 5s 0.01s 9999s 0.01s
C/S Window 5s 0.01s 9999s 0.01s
A/R Single Pole Disabled Disabled, Enabled
{1&3 pole A/R only} {Refer to Autoreclose notes for further
information}
A/R Three Pole Disabled Disabled, Enabled
{Refer to Autoreclose notes for further
information}

If AR Enable in MiCOM S1 (2 additive lines):

(*) For P442 – P444 only


WARNING: Must be enabled for validating the AR function (if TPAR/SPAR optos are
assigned in the PSL, these inputs have a higher priority from the MiCOM S1
settings).
The AR single and three poles mode could be enabled in the menu "CB
control" via MiCOM S1 or by the front panel.
However, if the DDB signals TPAR/SPAR have been assigned in the PSL,
these both inputs have a higher priority and depending of their status, will
enable/disable the single or three poles AR function independing of the
MiCOM S1 or front LCD settings.
Remark: If TPAR is disable, the Dead Time 2 is not used when SPAR logic
manages only 1PAR.
P44x/EN AP/F65 Application Notes

Page 148/286 MiCOM P441/P442 & P444

SUP_Trip_Loc
&
1
CBC_Local_Control
&
SUP_Close_Loc

SUP_Trip_Rem
&

CBC_Remote_Control
&
SUP_Close_Rem

INP_CB_Trip_Man
&

CBC_Input_Control
1
&
INP_CB_Man

& S CBC_Trip_Pulse
CBA_3P_C
Q CBC_Trip_3P
1
R
t
Pulsed output latched in UI
0 &
CBC_Failed_To_Trip

CBA_3P

CBA_Status_Alarm
& S
Q CBC_Close_In_Progress
AR_Cycle_1P R
1
INP_AR_Cycle_1P t
0
1
AR_Cycle_3P 1 CBC_Delay_Close

INP_AR_Cycle_3P & S
Q
CBA_3P R

CBA_Disc

TRIP_Any
1

INP_AR_Close
Pulsed output latched in UI

AR_Close 1 & CBC_ Fail_To_Close


t
0
R
Q CBC_Recl_3P
S CBC_Close_Pulse

CBA_Any

&
INP_CB_Healthy

CBC_Healthy_Window

t
0 & CBC_UnHeathly

CBC_CS_Window

t
0 & CBC_No_Check_Syn
SYNC

P0529ENa

FIGURE 70 - CB CONTROL LOGIC


A manual trip will be authorised if the circuit breaker has been initially closed. Likewise, a
close command can only be issued if the CB is initially open.
Therefor it will be necessary to use the breaker positions 52a and/or 52b contacts via PSL. If
no CB auxiliary contacts are available no CB control (manual or auto) will be possible. (See
the different solutions proposed in the CBAux logic section 4.6.1)
Once a CB Close command is initiated the output contact can be set to operate following a
user defined time delay (‘Man Close Delay’). This would give personnel time to move away
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 149/286

from the circuit breaker following the close command. This time delay will apply to all manual
CB Close commands.
The length of the trip or close control pulse can be set via the ‘ManualTrip Pulse Time’ and
‘Close Pulse Time’ settings respectively. These should be set long enough to ensure the
breaker has completed its open or close cycle before the pulse has elapsed.
NOTE: The manual close commands for each user interface are found in the
System Data column of the menu.

If an attempt to close the breaker is being made, and a protection trip signal is generated,
the protection trip command overrides the close command.
Where the check synchronism function is set, this can be enabled to supervise manual
circuit breaker close commands. A circuit breaker close output will only be issued if the
check synchronism criteria are satisfied. A user settable time delay is included (‘C/S
Window’) for manual closure with check synchronising. If the checksynch criteria are not
satisfied in this time period following a close command the relay will lockout and alarm.
In addition to a synchronism check before manual reclosure there is also a CB Healthy
check if required. This facility accepts an input to one of the relays opto-isolators to indicate
that the breaker is capable of closing (circuit breaker energy for example). A user settable
time delay is included (‘Healthy Window’) for manual closure with this check. If the CB does
not indicate a healthy condition in this time period following a close command then the relay
will lockout and alarm.
Where auto-reclose is used it may be desirable to block its operation when performing a
manual close. In general, the majority of faults following a manual closure will be permanent
faults and it will be undesirable to auto-reclose. The "man close" input without CB Control
selected OR the "CBClose in progress" with CB control enabled: will initiate the SOTF logic
for which auto-reclose will be disabled following a manual closure of the breaker during
500msec (see SOTF logic in section 2.12.1, Figure 36).
If the CB fails to respond to the control command (indicated by no change in the state of CB
Status inputs) a ‘CB Fail Trip Control’ or ‘CB Fail Close Control’ alarm will be generated
after the relevant trip or close pulses have expired. These alarms can be viewed on the relay
LCD display, remotely via the relay communications, or can be assigned to operate output
contacts for annunciation using the relays programmable scheme logic (PSL).

CBA_3P_C

SUP_Trip OR
INP_CB_Trip_Man
0.1 to 5 Sec
CBC_Trip_3P

CBC_Failed_To_Trip
P0560ENa

FIGURE 71 - STATUS OF CB IS INCORRECT CBA3P C (3 POLES ARE CLOSED) STAYS – AN ALARM


IS GENERATED “CB FAIL TO TRIP”
P44x/EN AP/F65 Application Notes

Page 150/286 MiCOM P441/P442 & P444

CBA_3P

SUP_Close OR
INP_CB_Man

CBC_Close_In_Progress

0 to 60 Sec
0.1 to 10 Sec
CBC_Recl_3P

CBC_ Fail_To_Close

P0561ENa

FIGURE 72 - STATUS OF CB IS INCORRECT CBA3P (3 POLES ARE OPENED) STAYS – AN ALARM IS


GENERATED “CB FAIL TO CLOSE”
Note that the ‘Healthy Window’ timer and ‘C/S Window’ timer set under this menu section are
applicable to manual circuit breaker operations only. These settings are duplicated in the
Auto-reclose menu for Auto-reclose applications.
The ‘Lockout Reset’ and ‘Reset Lockout by’ setting cells in the menu are applicable to CB
Lockouts associated with manual circuit breaker closure, CB Condition monitoring (Number
of circuit breaker operations, for example) and auto-reclose lockouts.
4.4 Disturbance recorder (“Disturb recorder” menu)
The integral disturbance recorder has an area of memory specifically set aside for record
storage. The number of records that may be stored is dependent upon the selected
recording duration but the relays typically have the capability of storing a minimum of 20
records, each of 10.5 second duration.
NOTE: 1. Compressed Disturbance Recorder used for Kbus/Modbus/DNP3
reach that typical size value (10.5 sec duration)
2. Uncompressed Disturbance Recorder used for IEC 60870-5/103
could be limited to 2 or 3 secondes.
Disturbance records continue to be recorded until the available memory is exhausted, at
which time the oldest record(s) are overwritten to make space for the newest one.
The recorder stores actual samples which are taken at a rate of 24 samples per cycle.
Each disturbance record consists of eight analogue data channels and thirty-two digital data
channels. Note that the relevant CT and VT ratios for the analogue channels are also
extracted to enable scaling to primary quantities).
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 151/286

The ‘DISTURBANCE RECORDER’ menu column is shown below (up to version C5.X):

Setting range
Menu text Default setting Step size
Min Max
DISTURB RECORDER
Duration 1.5s 0.1s 10.5s 0.01s
Trigger Position 33.3% 0 100% 0.1%
Trigger Mode Single Single or Extended
Analog Channel 1 VA VA, VB, VC, IA, IB, IC, IN
Analog Channel 2 VB VA, VB, VC, IA, IB, IC, IN
Analog Channel 3 VC VA, VB, VC, IA, IB, IC, IN
Analog Channel 4 VN VA, VB, VC, IA, IB, IC, IN
Analog Channel 5 IA VA, VB, VC, IA, IB, IC, IN
Analog Channel 6 IB VA, VB, VC, IA, IB, IC, IN
Analog Channel 7 IC VA, VB, VC, IA, IB, IC, IN
Analog Channel 8 IN VA, VB, VC, IA, IB, IC, IN
Up to version C5.X
Digital Inputs 1 to 32 Relays 1 to 14/21 According to the model:
and Any of output Contacts
Opto’s 1 to 8/16any or
relay or opto Any of opto Inputs
or
Internal Digital SignalsAny of 14 or 21
O/P Contacts
or
Any of 8 or 16 Opto Inputs
or
Internal Digital Signals
Inputs 1 to 32 Trigger No Trigger except No Trigger, Trigger L/H, Trigger H/L
Dedicated Trip
Relay O/P’s which
are set to Trigger
L/H
Since version C5.X (new default setting)
Digital Input 1 Any Start According to the model:
Any of output Contacts
or
Any of opto Inputs
or
Internal Digital Signals
Input 1 Trigger Trigger L/H No Trigger, Trigger L/H, Trigger H/L
Digital Input 2 Any Trip As Digital input 1
Input 2 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 3 DIST Trip A As Digital input 1
Input 3 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 4 DIST Trip B As Digital input 1
P44x/EN AP/F65 Application Notes

Page 152/286 MiCOM P441/P442 & P444

Setting range
Menu text Default setting Step size
Min Max
Input 4 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 5 DIST Trip C As Digital input 1
Input 5 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 6 DIST Fwd As Digital input 1
Input 6 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 7 DIST Rev As Digital input 1
Input 7 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 8 Z1 As Digital input 1
Input 8 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 9 Z2 As Digital input 1
Input 9 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 10 Z3 As Digital input 1
Input 10 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 11 Z4 As Digital input 1
Input 11 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 12 Any Pole Dead As Digital input 1
Input 12 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 13 All Pole Dead As Digital input 1
Input 13 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 14 SOTF Enable As Digital input 1
Input 14 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 15 SOTF/TOR Trip As Digital input 1
Input 15 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 16 S. Swing Conf As Digital input 1
Input 16 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 17 Out Of Step As Digital input 1
Input 17 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 18 Out Of Step Conf As Digital input 1
Input 18 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 19 Man. Close CB As Digital input 1
Input 19 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 20 I A/R Close As Digital input 1
Input 20 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 21 DIST. Chan Recv As Digital input 1
Input 21 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 22 MCB/VTS Main As Digital input 1
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 153/286

Setting range
Menu text Default setting Step size
Min Max
Input 22 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 23 MCB/VTS Synchro As Digital input 1
Input 23 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 24 DEF. Chan Recv As Digital input 1
Input 24 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 25 DEF Rev As Digital input 1
Input 25 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 26 DEF Fwd As Digital input 1
Input 26 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 27 DEF Start A As Digital input 1
Input 27 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 28 DEF Start B As Digital input 1
Input 28 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 29 DEF Start C As Digital input 1
Input 29 Trigger No trigger No Trigger, Trigger L/H, Trigger H/L
Digital Input 30 Unused
Digital Input 31 Unused
Digital Input 32 Unused

Note
The available analogue and digital signals may differ between relay types and models and
so the individual courier database in Appendix should be referred to when determining
default settings etc.
The pre and post fault recording times are set by a combination of the ‘Duration’ and ‘Trigger
Position’ cells. ‘Duration’ sets the overall recording time and the ‘Trigger Position’ sets the
trigger point as a percentage of the duration. For example, the default settings show that the
overall recording time is set to 1.5s with the trigger point being at 33.3% of this, giving 0.5s
pre-fault and 1s post fault recording times.
If a further trigger occurs whilst a recording is taking place, the recorder will ignore the trigger
if the ‘Trigger Mode’ has been set to ‘Single’. However, if this has been set to ‘Extended’, the
post trigger timer will be reset to zero, thereby extending the recording time.
As can be seen from the menu, each of the analogue channels is selectable from the
available analogue inputs to the relay. The digital channels may be mapped to any of the
opto isolated inputs or output contacts, in addition to a number of internal relay digital
signals, such as protection starts, LED’s etc. The complete list of these signals may be found
by viewing the available settings in the relay menu or via a setting file in MiCOM S1. Any of
the digital channels may be selected to trigger the disturbance recorder on either a low to
high or a high to low transition, via the ‘Input Trigger’ cell. The default trigger settings are that
any dedicated trip output contacts (e.g. relay 3) will trigger the recorder.
P44x/EN AP/F65 Application Notes

Page 154/286 MiCOM P441/P442 & P444

Trigger choices:

(Minimum one trigger condition must be present ; for providing Drec file.)
It is not possible to view the disturbance records locally via the LCD; they must be extracted
using suitable software such as MiCOM S1. This process is fully explained in Chapter 6.

(Events or Disturbances can be extracted)


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 155/286

This message is displayed if the memory is empty (control in that case the trigger condition):

After extraction the Drec file can be displayed by the viewer integrated in MiCOM S1(See
Commissioning test section – chap CT)

Click down to select:


P44x/EN AP/F65 Application Notes

Page 156/286 MiCOM P441/P442 & P444

4.5 HOTKEYS / Control input (“Ctrl I/P config” menu) (since version C2.x)

The two hotkeys in the front panel can perform a direct command if a dedicated PSL has
been previously created using “CONTROL INPUT” cell. In total the MiCOM P440 offers 32
control inputs which can be activated by the Hotkey manually or by the IEC 103 remote
communication (if that option has been flashed with the firmware of the relay, see also cortec
code):

The control input can be linked to any DDB cell as: led, relay , internal logic cell (that can be
useful during test & commissioning) – see also the section 9.9 in chapter AP - Different
condition can be managed for the command as:

And also the text for passing the command can be selected between:
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 157/286

The labels of the control inputs can be fulfilled by the user (text label customised)
P44x/EN AP/F65 Application Notes

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The digits in this table allow to provide filtering on selected DDB cells (changed from 1 to 0),
to avoid the transfer of these special cells to a remote station connected to the relay with IEC
103 protocol. It gives the opportunity to filter the not pertinent data.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 159/286

4.6 InterMiCOM Teleprotection (“InterMiCOM comms” and “InterMiCOM conf” menus)


Since software version C2.x
InterMiCOM is a protection signalling system that is an optional feature of MiCOM Px40
relays and provides a cost-effective alternative to discrete carrier equipment. InterMiCOM
sends eight signals between the two relays in the scheme, with each signal having a
selectable operation mode to provide an optimal combination of speed, security and
dependability in accordance with the application. Once the information is received, it may be
assigned in the Programmable Scheme Logic to any function as specified by the user’s
application.
4.6.1 Protection Signalling
In order to achieve fast fault clearance and correct discrimination for faults anywhere within a
high voltage power network, it is necessary to signal between the points at which protection
relays are connected. Two distinct types of protection signalling can be identified:
4.6.1.1 Unit protection Schemes
In these schemes the signalling channel is used to convey analog data concerning the power
system between relays, typically current magnitude and/or phase. These unit protection
schemes are not covered by InterMiCOM, with the MiCOM P54x range of current differential
and phase comparison relays available.
4.6.1.2 Teleprotection – Channel Aided Schemes
In these schemes the signalling channel is used to convey simple ON/OFF data (from a local
protection device) thereby providing some additional information to a remote device which
can be used to accelerate in-zone fault clearance and/or prevent out-of-zone tripping. This
kind of protection signalling has been discussed earlier in this chapter, and InterMiCOM
provides the ideal means to configure the schemes in the P443 relay.
In each mode, the decision to send a command is made by a local protective relay operation,
and three generic types of InterMiCOM signal are available:
Intertripping In intertripping (direct or transfer tripping applications), the command is
not supervised at the receiving end by any protection relay and simply
causes CB operation. Since no checking of the received signal by
another protection device is performed, it is absolutely essential that any
noise on the signalling channel isn’t seen as being a valid signal. In other
words, an intertripping channel must be very secure.
Permissive In permissive applications, tripping is only permitted when the command
coincides with a protection operation at the receiving end. Since this
applies a second, independent check before tripping, the signalling
channel for permissive schemes do not have to be as secure as for
intertripping channels.
Blocking In blocking applications, tripping is only permitted when no signal is
received but a protection operation has occurred. In other words, when a
command is transmitted, the receiving end device is blocked from
operating even if a protection operation occurs. Since the signal is used
to prevent tripping, it is imperative that a signal is received whenever
possible and as quickly as possible. In other words, a blocking channel
must be fast and dependable.
The requirements for the three channel types are represented pictorially in figure 73.
P44x/EN AP/F65 Application Notes

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Speed

Permissive
faster
Blocking

slower
low

high

Security Direct Dependability


Intertrip P1342ENa

FIGURE 73 - PICTORIAL COMPARISON OF OPERATING MODES


This diagram shows that a blocking signal should be fast and dependable; a direct intertrip
signal should be very secure and a permissive signal is an intermediate compromise of
speed, security and dependability.
4.6.1.3 Communications Media
InterMiCOM is capable of transferring up to 8 commands over one communication channel.
Due to recent expansions in communication networks, most signalling channels are now
digital schemes utilising multiplexed fibre optics and for this reason, InterMiCOM provides a
standard EIA(RS)232 output using digital signalling techniques. This digital signal can then
be converted using suitable devices to any communications media as required.
The EIA(RS)232 output may alternatively be connected to a MODEM link.
Regardless of whether analogue or digital systems are being used, all the requirements of
teleprotection commands are governed by an international standard IEC60834-1:1999 and
InterMiCOM is compliant with the essential requirements of this standard. This standard
governs the speed requirements of the commands as well as the probability of unwanted
commands being received (security) and the probability of missing commands
(dependability).
4.6.1.4 General Features & Implementation
InterMiCOM provides 8 commands over a single communications link, with the mode of
operation of each command being individually selectable within the “IM# Cmd Type” cell.
“Blocking” mode provides the fastest signalling speed (available on commands 1 – 4), “Direct
Intertrip” mode provides the most secure signalling (available on commands 1 – 8) and
“Permissive” mode provides the most dependable signalling (available on commands 5 – 8).
Each command can also be disabled so that it has no effect in the logic of the relay.
Since many applications will involve the commands being sent over a multiplexed
communications channel, it is necessary to ensure that only data from the correct relay is
used. Both relays in the scheme must be programmed with a unique pair of addresses that
correspond with each other in the “Source Address” and “Receive Address” cells. For
example, at the local end relay if we set the “Source Address” to 1, the “Receive Address” at
the remote end relay must also be set to 1. Similarly, if the remote end relay has a “Source
Address” set to 2, the “Receive Address” at the local end must also be set to 2. All four
addresses must not be set identical in any given relay scheme if the possibility of incorrect
signalling is to be avoided.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 161/286

It must be ensured that the presence of noise in the communications channel isn’t
interpreted as valid messages by the relay. For this reason, InterMiCOM uses a combination
of unique pair addressing described above, basic signal format checking and for “Direct
Intertrip” commands an 8-bit Cyclic Redundancy Check (CRC) is also performed. This CRC
calculation is performed at both the sending and receiving end relay for each message and
then compared in order to maximise the security of the “Direct Intertrip” commands.
Most of the time the communications will perform adequately and the presence of the
various checking algorithms in the message structure will ensure that InterMiCOM signals
are processed correctly. However, careful consideration is also required for the periods of
extreme noise pollution or the unlikely situation of total communications failure and how the
relay should react.
During periods of extreme noise, it is possible that the synchronization of the message
structure will be lost and it may become impossible to decode the full message accurately.
During this noisy period, the last good command can be maintained until a new valid
message is received by setting the “IM# FallBackMode” cell to “Latched”. Alternatively, if the
synchronisation is lost for a period of time, a known fallback state can be assigned to the
command by setting the “IM# FallBackMode” cell to “Default”. In this latter case, the time
period will need to be set in the “IM# FrameSynTim” cell and the default value will need to be
set in “IM# DefaultValue” cell. As soon as a full valid message is seen by the relay all the
timer periods are reset and the new valid command states are used. An alarm is provided if
the noise on the channel becomes excessive.
When there is a total communications failure, the relay will use the fallback (failsafe) strategy
as described above. Total failure of the channel is considered when no message data is
received for four power system cycles or if there is a loss of the DCD line.
4.6.1.5 Physical Connections
InterMiCOM on the Px40 relays is implemented using a 9-pin ‘D’ type female connector
(labelled SK5) located at the bottom of the 2nd Rear communication board. This connector
on the Px40 relay is wired in DTE (Data Terminating Equipment) mode, as indicated below:

Pin Acronym InterMiCOM Usage


1 DCD “Data Carrier Detect” is only used when connecting to modems
otherwise this should be tied high by connecting to terminal 4.
2 RxD “Receive Data”
3 TxD “Transmit Data”
4 DTR “Data Terminal Ready” is permanently tied high by the hardware since
InterMiCOM requires a permanently open communication channel.
5 GND “Signal Ground”
6 Not used -
7 RTS “Ready To Send” is permanently tied high by the hardware since
InterMiCOM requires a permanently open communication channel.
8 Not used -
9 Not used -

TABLE 12: INTERMiCOM D9 PORT PIN-OUT CONNECTIONS


Depending upon whether a direct or modem connection between the two relays in the
scheme is being used, the required pin connections are described below.
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4.6.1.6 Direct Connection


The EIA(RS)232 protocol only allows for short transmission distances due to the signalling
levels used and therefore the connection shown below is limited to less than 15m. However,
this may be extended by introducing suitable EIA(RS)232 to fiber optic convertors, such as
the AREVA T&D CILI203. Depending upon the type of convertor and fiber used, direct
communication over a few kilometres can easily be achieved.

Px40 Relay with Px40 Relay with


InterMiCOM InterMiCOM
DCD - 1 1 - DCD
RxD - 2 2 - RxD
TxD - 3 3 - TxD
DTR - 4 4 - DTR
GND - 5 5 - GND
6 6
RTS - 7 7 - RTS
8 8
9 9
P1150ENa

DIRECT CONNECTION WITHIN THE LOCAL SUBSTATION


This type of connection should also be used when connecting to multiplexers which have no
ability to control the DCD line.
4.6.1.7 Modem Connection
For long distance communication, modems may be used in which the case the following
connections should be made.

Px40 Relay with Px40 Relay with


InterMiCOM InterMiCOM
DCD - 1 DCD DCD 1 - DCD
RxD - 2 RxD RxD 2 - RxD
Communication
TxD - 3 TxD Network TxD 3 - TxD
DTR - 4 4 - DTR
GND - 5 GND GND 5 - GND
6 6
RTS - 7 7 - RTS
8 8
9 9
P1341ENa

INTERMiCOM TELEPROTECTION VIA A MODEM LINK


This type of connection should also be used when connecting to multiplexers which have the
ability to control the DCD line.
With this type of connection it should be noted that the maximum distance between the Px40
relay and the modem should be 15m, and that a baud rate suitable for the communications
path used should be selected.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 163/286

4.6.2 Functional Assignment


Even though settings are made on the relay to control the mode of the intertrip signals, it is
necessary to assign interMiCOM input and output signals in the relay Programmable
Scheme Logic (PSL) if InterMiCOM is to be successfully implemented. Two icons are
provided on the PSL editor of MiCOM S1 for “Integral tripping In” and “Integral tripping out”
which can be used to assign the 8 intertripping commands. The example shown below in
figure 2 shows a “Control Input_1” connected to the “Intertrip O/P1” signal which would then
be transmitted to the remote end. At the remote end, the “Intertrip I/P1” signal could then be
assigned within the PSL. In this example, we can see that when intertrip signal 1 is received
from the remote relay, the local end relay would operate an output contact, R1.

EXAMPLE ASSIGNMENT OF SIGNALS WITHIN THE PSL


It should be noted that when an InterMiCOM signal is sent from the local relay, only the
remote end relay will react to this command. The local end relay will only react to
InterMiCOM commands initiated at the remote end.
4.6.3 InterMiCOM Settings
The settings necessary for the implementation of InterMiCOM are contained within two
columns of the relay menu structure. The first column entitled “INTERMICOM COMMS”
contains all the information to configure the communication channel and also contains the
channel statistics and diagnostic facilities. The second column entitled “INTERMICOM
CONF” selects the format of each signal and its fallback operation mode. The following
tables show the relay menus including the available setting ranges and factory defaults.

Setting Range
Menu Text Default Setting Step Size
Min Max
INTERMICOM COMMS
Source Address 1 1 10 1
Receive Address 2 1 10 1
Baud Rate 9600 600 / 1200 / 2400 / 4800 / 9600 / 19200
Ch Statistics Invisible Invisible / Visible
Ch Diagnostics Invisible Invisible / Visible
Loopback Mode Disabled Disabled / Internal / External
Test pattern 11111111 00000000 11111111 -

TABLE 13: INTERMiCOM GENERIC COMMUNICATIONS SET-UP


P44x/EN AP/F65 Application Notes

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Setting Range
Menu Text Default Setting Step Size
Min Max
INTERMICOM CONF
IM Msg Alarm Lvl 25% 0% 100% 1%
IM1 Cmd Type Blocking Disabled/ Blocking/ Direct
IM1 Fallback Mode Default Default/ Latched
IM1 DefaultValue 1 0 1 1
IM1 FrameSyncTim 20ms 10ms 1500ms 10ms
IM2 to IM4 (Cells as for IM1 above)
IM5 Cmd Type Direct Disabled/ Permissive/ Direct
IM5 Fallback Mode Default Default/ Latched
IM5 DefaultValue 0 0 1 1
IM5 FrameSyncTim 10ms 10ms 1500ms 10ms
IM6 to IM8 (Cells as for IM5 above)

TABLE 14: PROGRAMMING THE RESPONSE FOR EACH OF THE 8 INTERMiCOM SIGNALS
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 165/286

4.6.3.1 Setting Guidelines


The settings required for the InterMiCOM signalling are largely dependant upon whether a
direct or indirect (modem/multiplexed) connection between the scheme ends is used.
Direct connections will either be short metallic or dedicated fiber optic based and hence can
be set to have the highest signalling speed of 19200b/s. Due to this high signalling rate, the
difference in operating speed between the direct, permissive and blocking type signals is so
small that the most secure signalling (direct intertrip) can be selected without any significant
loss of speed. In turn, since the direct intertrip signalling requires the full checking of the
message frame structure and CRC checks, it would seem prudent that the “IM# Fallback
Mode” be set to “Default” with a minimal intentional delay by setting “IM# FrameSyncTim” to
10msecs. In other words, whenever two consecutive messages have an invalid structure,
the relay will immediately revert to the default value until a new valid message is received.
For indirect connections, the settings that should be applied will become more application
and communication media dependent. As for the direct connections, it may be appealing to
consider only the fastest baud rate but this will usually increase the cost of the necessary
modem/multiplexer.
In addition, devices operating at these high baud rates may suffer from “data jams” during
periods of interference and in the event of communication interruptions, may require longer
re-synchronization periods.
P44x/EN AP/F65 Application Notes

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Both of these factors will reduce the effective communication speed thereby leading to a
recommended baud rate setting of 9600b/s. It should be noted that as the baud rate
decreases, the communications become more robust with fewer interruptions, but that
overall signalling times will increase.
Since it is likely that slower baud rates will be selected, the choice of signalling mode
becomes significant. However, once the signalling mode has been chosen it is necessary to
consider what should happen during periods of noise when message structure and content
can be lost.
If “Blocking” mode is selected, only a small amount of the total message is actually used to
provide the signal, which means that in a noisy environment there is still a good likelihood of
receiving a valid message. In this case, it is recommended that the “IM# Fallback Mode” is
set to “Default” with a reasonably long “IM# FrameSyncTim”.
If “Direct Intertrip” mode is selected, the whole message structure must be valid and checked
to provide the signal, which means that in a very noisy environment the chances of receiving
a valid message are quite small. In this case, it is recommended that the “IM# Fallback
Mode” is set to “Default” with a minimum “IM# FrameSyncTim” setting i.e. whenever a non-
valid message is received, InterMiCOM will use the set default value.
If “Permissive” mode is selected, the chances of receiving a valid message is between that
of the “Blocking” and “Direct Intertrip” modes. In this case, it is possible that the “IM#
Fallback Mode” is set to “Latched”. The table below highlights the recommended “IM#
FrameSyncTim” settings for the different signalling modes and baud rates:

Minimum Recommended “IM#


Baud FrameSyncTim” Setting Minimum Maximum
Rate Setting Setting
Direct Intertrip Mode Blocking Mode
600 100 250 100 1500
1200 50 130 50 1500
2400 30 70 30 1500
4800 20 40 20 1500
9600 10 20 10 1500
19200 10 10 10 1500

TABLE 15: RECOMMENDED FRAME SYNCHRONISM TIME SETTINGS


NOTA: No recommended setting is given for the Permissive mode since it is
anticipated that “Latched” operation will be selected. However, if
“Default mode” is selected, the “IM# FrameSyncTim” setting should be
set greater than the minimum settings listed above. If the “IM#
FrameSyncTim” setting is set lower than the minimum setting listed
above, there is a danger that the relay will monitor a correct change in
message as a corrupted message.
A setting of 25% is recommended for the communications failure
alarm.
4.6.3.2 InterMiCOM Statistics & Diagnostics
It is possible to hide the channel diagnostics and statistics from view by setting the “Ch
Statistics” and/or “Ch Diagnostics” cells to “Invisible”. All channel statistics are reset when
the relay is powered up, or by user selection using the “Reset Statistics” cell.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 167/286

4.6.4 Testing InterMiCOM Teleprotection


4.6.4.1 InterMiCOM Loopback Testing & Diagnostics
A number of features are included within the InterMiCOM function to assist a user in
commissioning and diagnosing any problems that may exist in the communications link.
“Loopback” test facilities, located within the INTERMICOM COMMS column of the relay
menu, provide a user with the ability to check the software and hardware of the InterMiCOM
signalling. By selecting “Loopback Mode” to “Internal”, only the internal software of the relay
is checked whereas “External” will check both the software and hardware used by
InterMiCOM. In the latter case, it is necessary to connect the transmit and receive pins
together (pins 2 and 3) and ensure that the DCD signal is held high (connect pin 1 and pin 4
together). When the relay is switched into “Loopback Mode” the relay will automatically use
generic addresses and will inhibit the InterMiCOM messages to the PSL by setting all eight
InterMiCOM message states to zero. The loopback mode will be indicated on the relay
frontplate by the amber Alarm LED being illuminated and a LCD alarm message, “IM
Loopback”.

Px40 Relay with


InterMiCOM
DCD - 1
RxD - 2
TxD - 3
DTR - 4
GND - 5
6
RTS - 7
8
9
P1343ENa

Connections for External Loopback mode


Once the relay is switched into either of the Loopback modes, a test pattern can be entered
in the “Test Pattern” cell which is then transmitted through the software and/or hardware.
Providing all connections are correct and the software is working correctly, the “Loopback
Status” cell will display “OK”. An unsuccessful test would be indicated by “FAIL”, whereas a
hardware error will be indicated by “UNAVAILABLE”. Whilst the relay is in loopback test
mode, the “IM Output Status” cell will only show the “Test Pattern” settings, whilst the “IM
Input Status” cell will indicate that all inputs to the PSL have been forced to zero.
Care should be taken to ensure that once the loopback testing is complete, the “Loopback
Mode” is set to “Disabled” thereby switching the InterMiCOM channel back in to service.
With the loopback mode disabled, the “IM Output Status” cell will show the InterMiCOM
messages being sent from the local relay, whilst the “IM Input Status” cell will show the
received InterMiCOM messages (received from the remote end relay) being used by the
PSL.
Once the relay operation has been confirmed using the loopback test facilities, it will be
necessary to ensure that the communications between the two relays in the scheme are
reliable. To facilitate this, a list of channel statistics and diagnostics are available in the
InterMiCOM COMMS column – see section 10.2. It is possible to hide the channel
diagnostics and statistics from view by setting the “Ch Statistics” and/or “Ch Diagnostics”
cells to “Invisible”. All channel statistics are reset when the relay is powered up, or by user
selection using the “Reset Statistics” cell.
Another indication of the amount of noise on the channel is provided by the communications
failure alarm. Within a fixed 1.6 second time period the relay calculates the percentage of
invalid messages received compared to the total number of messages that should have
P44x/EN AP/F65 Application Notes

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been received based upon the “Baud Rate” setting. If this percentage falls below the
threshold set in the “IM Msg Alarm Lvl” cell, a “Message Fail” alarm will be raised.
Settings
The settings available in the INTERMiCOM COMMS menu column are as follows:

Setting Range
Menu Text Default Setting Step Size
Min Max
INTERMICOM COMMS
IM Output Status 00000000
IM Input Status 00000000
Source Address 1 1 10 1
Receive Address 2 1 10 1
Baud Rate 9600 600 / 1200 / 2400 / 4800 / 9600 / 19200
Ch Statistics Invisible Invisible / Visible
Reset Statistics No No / Yes
Ch Diagnostics Invisible Invisible / Visible
Loopback Mode Disabled Disabled / Internal / External
Test pattern 11111111 00000000 11111111 -
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 169/286

4.6.4.2 InterMiCOM Statistics & Diagnostics


Once the relay operation has been confirmed using the loopback test facilities, it will be
necessary to ensure that the communications between the two relays in the scheme are
reliable. To facilitate this, a list of channel statistics and diagnostics are available in the
InterMiCOM COMMS column and are explained below:

Ch Statistics
Rx Direct Count No. of Direct Tripping messages received with the correct message
structure and valid CRC check.
Rx Perm Count No. of Permissive Tripping messages received with the correct
message structure.
Rx Block Count No. of Blocking messages received with the correct message structure.
Rx NewDataCount No. of different messages received.
Rx ErroredCount No. of incomplete or incorrectly formatted messages received.
Lost Messages No. of messages lost within the previous time period set in “Alarm
Window” cell.
Elapsed Time Time in seconds since the InterMiCOM channel statistics were reset.
Ch Diagnostics
Data CD Status Indicates when the DCD OK = DCD is energised
line (pin 1) is energised.
FAIL = DCD is de-energised
Absent = InterMiCOM board is not fitted
Unavailable = hardware error present
FrameSync Status Indicates when the OK = valid message structure and
message structure and synchronisation
synchronisation is valid.
FAIL = synchronisation has been lost
Absent = InterMiCOM board is not fitted
Unavailable = hardware error present
Message Status Indicates when the OK = acceptable ratio of lost messages
percentage of received
FAIL = unacceptable ratio of lost messages
valid messages has
fallen below the Absent = InterMiCOM board is not fitted
“IM Msg Alarm Lvl”
setting within the alarm Unavailable = hardware error present
time period.
Channel Status Indicates the state of the OK = channel healthy
InterMiCOM
FAIL = channel failure
communication channel.
Absent = InterMiCOM board is not fitted
Unavailable = hardware error present
IM H/W Status Indicates the state of the OK = InterMiCOM hardware healthy
InterMiCOM hardware.
Read Error = InterMiCOM hardware failure
Write Error = InterMiCOM hardware failure
Absent = InterMiCOM board is either not
fitted or failed to initialise

It is possible to hide the channel diagnostics and statistics from view by setting the “Ch
Statistics” and/or “Ch Diagnostics” cells to “Invisible”. All channel statistics are reset when
the relay is powered up, or by user selection using the “Reset Statistics” cell.
P44x/EN AP/F65 Application Notes

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4.7 Programmable function keys and tricolour LEDs (“Function key” menu)
Since software version D1.X.
The relay has 10 function keys for integral scheme or operator control functionality such as
circuit breaker control, auto-reclose control etc. via PSL. Each function key has an
associated programmable tri-colour LED that can be programmed to give the desired
indication on function key activation.
These function keys can be used to trigger any function that they are connected to as part of
the PSL. The function key commands can be found in the ‘Function Keys’ menu. In the ‘Fn.
Key Status’ menu cell there is a 10 bit word which represent the 10 function key commands
and their status can be read from this 10 bit word. In the programmable scheme logic editor
10 function key signals, DDB 676 – 685, which can be set to a logic 1 or On state are
available to perform control functions defined by the user.
The “Function Keys” column has ‘Fn. Key n Mode’ cell which allows the user to configure the
function key as either ‘Toggled’ or ‘Normal’. In the ‘Toggle’ mode the function key DDB signal
output will remain in the set state until a reset command is given, by activating the function
key on the next key press. In the ‘Normal’ mode, the function key DDB signal will remain
energized for as long as the function key is pressed and will then reset automatically.
A minimum pulse duration can be programmed for a function key by adding a minimum
pulse timer to the function key DDB output signal. The “Fn. Key n Status” cell is used to
enable/unlock or disable the function key signals in PSL. The ‘Lock’ setting has been
specifically provided to allow the locking of a function key thus preventing further activation
of the key on consequent key presses. This allows function keys that are set to ‘Toggled’
mode and their DDB signal active ‘high’, to be locked in their active state thus preventing any
further key presses from deactivating the associated function. Locking a function key that is
set to the “Normal” mode causes the associated DDB signals to be permanently off. This
safety feature prevents any inadvertent function key presses from activating or deactivating
critical relay functions. The “Fn. Key Labels” cell makes it possible to change the text
associated with each individual function key. This text will be displayed when a function key
is accessed in the function key menu, or it can be displayed in the PSL.
The status of the function keys is stored in battery backed memory. In the event that the
auxiliary supply is interrupted the status of all the function keys will be recorded. Following
the restoration of the auxiliary supply the status of the function keys, prior to supply failure,
will be reinstated. If the battery is missing or flat the function key DDB signals will set to logic
0 once the auxiliary supply is restored. The relay will only recognise a single function key
press at a time and that a minimum key press duration of approximately 200msec. is
required before the key press is recognised in PSL. This deglitching feature avoids
accidental double presses.
4.7.1 Setting guidelines
The lock setting allows a function key output that is set to toggle mode to be locked in its
current active state. In toggle mode a single key press will set/latch the function key output
as high or low in programmable scheme logic. This feature can be used to enable/disable
relay functions. In the normal mode the function key output will remain high as long as the
key is pressed. The Fn. Key label allows the text of the function key to be changed to
something more suitable for the application.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 171/286

Setting range
Menu text Default setting Step size
Min Max
FUNCTION KEYS
Fn Key 1 Unlocked Disabled, Locked, Unlocked
Fn Key 1 Mode Normal Toggled, Normal
Fn Key 1 Label Function Key 1
Fn Key 2 Unlocked Disabled, Locked, Unlocked
Fn Key 2 Mode Normal Toggled, Normal
Fn Key 2 Label Function Key 2
Fn Key 3 Unlocked Disabled, Locked, Unlocked
Fn Key 3 Mode Normal Toggled, Normal
Fn Key 3 Label Function Key 3
Fn Key 4 Unlocked Disabled, Locked, Unlocked
Fn Key 4 Mode Normal Toggled, Normal
Fn Key 4 Label Function Key 4
Fn Key 5 Unlocked Disabled, Locked, Unlocked
Fn Key 5 Mode Normal Toggled, Normal
Fn Key 5 Label Function Key 5
Fn Key 6 Unlocked Disabled, Locked, Unlocked
Fn Key 6 Mode Normal Toggled, Normal
Fn Key 6 Label Function Key 6
Fn Key 7 Unlocked Disabled, Locked, Unlocked
Fn Key 7 Mode Normal Toggled, Normal
Fn Key 7 Label Function Key 7
Fn Key 8 Unlocked Disabled, Locked, Unlocked
Fn Key 8 Mode Normal Toggled, Normal
Fn Key 8 Label Function Key 8
Fn Key 9 Unlocked Disabled, Locked, Unlocked
Fn Key 9 Mode Normal Toggled, Normal
Fn Key 9 Label Function Key 9
Fn Key 10 Unlocked Disabled, Locked, Unlocked
Fn Key 10 Mode Normal Toggled, Normal
Fn Key 10 Label Function Key 10
P44x/EN AP/F65 Application Notes

Page 172/286 MiCOM P441/P442 & P444

FnKey Key 1
The activation of the function key will drive an associated DDB signal and the DDB signal will
remain active depending on the programmed setting i.e. toggled or normal. Toggled mode
means the DDB signal will remain latched or unlatched on key press and normal means the
DDB will only be active for the duration of the key press. For example, function key 1 should
be operated in order to assert DDB #676.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 173/286

FnKey LED 1 Red


Ten programmable tri-colour LEDs associated with each function key are used to indicate
the status of the associated pushbutton’s function. Each LED can be programmed to indicate
red, yellow or green as required. The green LED is configured by driving the green DDB
input. The red LED is configured by driving the red DDB input. The yellow LED is configured
by driving the red and green DDB inputs simultaneously. When the LED is activated the
associated DDB signal will be asserted. For example, if FnKey Led 1 Red is activated, DDB
#656 will be asserted.
FnKey LED 1 Grn
The same explanation as for Fnkey 1 Red applies.
P44x/EN AP/F65 Application Notes

Page 174/286 MiCOM P441/P442 & P444

LED 1 Red
Eight programmable tri-colour LEDs that can be programmed to indicate red, yellow or green
as required. The green LED is configured by driving the green DDB input. The red LED is
configured by driving the red DDB input. The yellow LED is configured by driving the red and
green DDB inputs simultaneously. When the LED is activated the associated DDB signal will
be asserted. For example, if Led 1 Red is activated, DDB #640 will be asserted.
LED 1 Grn
The same explanation as for LED 1 Red applies.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 175/286

4.8 Fault locator (“Distance elements” menu)


The relay has an integral fault locator that uses information from the current and voltage
inputs to provide a distance to fault measurement. The sampled data from the analogue
input circuits is written to a cyclic buffer until a fault condition is detected. The data in the
input buffer is then held to allow the fault calculation to be made. When the fault calculation
is complete the fault location information is available in the relay fault record.
When calculated the fault location can be found in the fault record under the
VIEW RECORDS column in the Fault Location cells. Distance to fault is available in km,
miles, impedance or percentage of line length. The fault locator can store data for up to five
faults. This ensures that fault location can be calculated for all shots on a typical multiple
reclose sequence, whilst also retaining data for at least the previous fault.

FIGURE 74 - FAULT LOCATION INFORMATION INCLUDED IN AN EVENT:


P44x/EN AP/F65 Application Notes

Page 176/286 MiCOM P441/P442 & P444

The following table shows the relay menu for the fault locator, including the available setting
ranges and factory defaults:-

Setting range
Menu text Default setting Step size
Min Max
GROUP 1
DISTANCE ELEMENTS
LINE SETTING
Line Length 1000 km 0.3 km 1000 km 0.015 km
(625 miles) (0.2 mile) (625 miles) (0.005 mile)
Line Impedance 12 / In Ω 0.001 / In Ω 500 / In Ω 0.001 / In Ω
Line Angle 70° –90° +90° 0.1°

FAULT LOCATOR
kZm Mutual Comp 0 0 7 0.01
kZm Angle 0° 0° +360° 1°

4.8.1 Mutual Coupling


When applied to parallel circuits mutual flux coupling can alter the impedance seen by the
fault locator. The coupling will contain positive, negative and zero sequence components. In
practice the positive and negative sequence coupling is insignificant. The effect on the fault
locator of the zero sequence mutual coupling can be eliminated by using the mutual
compensation feature provided. This requires that the residual current on the parallel line is
measured, as shown in Appendix B. It is extremely important that the polarity of connection
for the mutual CT input is correct, as shown.
4.8.2 Setting Guidelines
The system assumed for the distance protection worked example will be used here, refer to
section 3.1. The Green Valley – Blue River line is considered.
Line length: 100Km
CT ratio: 1 200 / 5
VT ratio: 230 000 / 115

Line impedances: Z = 0.089 + j0.476 = 0.484 / 79.4° Ω/km


1

ZM = 0.107 + j0.571 = 0.581 / 79.4° Ω/km (Mutual)


0
1200 / 5
Ratio of secondary to primary impedance = = 0.12
230000 / 115

Line Impedance = 100 x 0.484 / 79.4° x 0.12

= 5.81 / 79.4° Ω secondary.

Relay Line Angle settings 0° to 360° in 1° steps. Therefore, select Line Angle = 80° for
convenience.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 177/286

Therefore set Line Impedance and Line Angle: = 5.81 / 80° Ω (secondary).
No residual compensation needs to be set for the fault locator, as the relay automatically
uses the kZ0 factor applicable to the distance zone which tripped.
Should a CT residual input be available for the parallel line, mutual compensation could be
set as follows:

kZm Mutual Comp, ⏐kZm⏐ = ZM0 / 3.Z1 Ie: As a ratio.

kZm Angle, ∠kZm = ∠ ZM0 / 3.Z1 Set in degrees.


The CT ratio for the mutual compensation may be different from the Line CT ratio. However,
for this example we will assume that they are identical.

kZm = ZM0 / 3.Z1 = 0.581 / 79.4° / (3 x 0.484 / 79.4°)

= 0.40 / 0°
Therefore set kZm Mutual Comp = 0.40

kZm Angle = 0°
4.9 Supervision (“Supervision” menu)
The “Supervision” menu contains 3 sections:

− the Voltage Transformer Supervision (VTS) section, for analog ac voltage inputs
failures supervision,

− the Current Transformer Supervision (CTS) section, for ac phase current inputs
failures supervision,
4.9.1 Voltage transformer supervision (VTS) – Main VT for minZ measurement
4.9.1.1 VTS logic description
The voltage transformer supervision (VTS) feature is used to detect failure of the analog ac
voltage inputs to the relay. This may be caused by internal voltage transformer faults,
overloading, or faults on the interconnecting wiring to relays. This usually results in one or
more VT fuses blowing. Following a failure of the ac voltage input there would be a
misrepresentation of the phase voltages on the power system, as measured by the relay,
which may result in maloperation of the distance element.
The VTS logic in the relay is designed to detect the voltage failure (with internal thresholds or
external opto input), and automatically adjust the configuration of protection elements
(Distance element is blocked but may be unblocked on I1,I2 or I0 conditions in case of fault
during VTS conditions) whose stability would otherwise be compromised (Distance, DEF,
Weak infeed, Directionnal phase current& all directional elements used in the internal logic).
A settable time-delayed alarm output is also available (min1sec to Max 20sec).
The condition of this alarm is given by:

FFUS_Confirmed = (Fuse_Failure And VTS Timer) Or INP_FFUS_Line


P44x/EN AP/F65 Application Notes

Page 178/286 MiCOM P441/P442 & P444

INP_F.Failure_Line
VN >F.Failure

I2 >F.Failure
&
≥1
VTS Time
I0 >F.Failure ≥1 delay

S
I >F.Failure Q FFUS_Confirmed
R

∆I>F.Failure Fuse_Failure

Any_pole_dead S
& R
Q
Healthy network
V<F.Failure
≥1
All Pole Dead

P0530ENa

FIGURE 75 - VTS LOGIC


(SEE ALSO DDB DESCRIPTION IN THE END OF THAT SECTION)

FIGURE 76 - VT SUPERVISION: VTS SETTINGS IN MiCOM S1

• VTS Timer: A settable alarm from 1 to 20s by step of 1s gives the possibility to signal
by an alarm the Failure. This alarm is instantaneous in case of opto energized by
external INP FFU signal (issued from contact of MCB). During no load, the timer
covers the duration of Dead time1 HSAR cycle (Vo&/IO in case of no load) which
could be detected as VT failure 1 pole.

• INP_FFUS Line:The external information given by the MCB to the opto input is secure
and will block instantaneously the distance function and the functions which are use
directional element.

FIGURE 77 - DEFAULT PSL EXTRACTED


Where a miniature circuit breaker (MCB) is used to protect the voltage transformer ac output
circuits, it is common to use MCB auxiliary contacts to indicate a three phase output
disconnection. As previously described, it is possible for the VTS logic to operate correctly
without this input. However, this facility has been provided for compatibility with various
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 179/286

utilities current practices. Energising an opto-isolated input assigned to “MCB Open” on the
relay will therefore provide the necessary block.
Fuse failure conditions are confirmed instantaneously if the opto input "INP_FFus line" is
energised and assigned in PSL, or after elapse of the VTS Time delay in case of 1, 2 or 3
phases Fuse Failure.
The confirmed Fuse Failure blocks all protection functions which use the voltage
measurement (Distance, Weak infeed, Directional overcurrent,…). The directional
overcurrent element may be blocked or set to become non directional with dedicated timer
(Time VTS in MiCOM S1)- I>1 or IN>1.
A non confirmed Fuse Failure will be a detection of an internal fuse failure before the timer is
issued. In that case a fault can be detected by the I2>,I0>,I1>, ∆I> criteria and will force the
unblocking functions:
Distance Protection
DEF Protection
Weak-infeed Protection
I> Directional
U>, U<
4.9.1.2 The internal detection FUSE Failure condition
Is verified by follows (Fuse Failure not confirmed logic)

(Vr AND /I0 AND /l2 Et /I>) OR (FusFus_tri AND /Any_pole_dead AND V< AND /∆Ι )
Vr>_FFUS : The residual voltage is bigger than a fixed threshold:= 0,75Vn
I0>_FFUS : The zero sequence current is bigger than a settable threshold:
From 0.01 to 1.00 In by step of 0.01
I2>_FFUS : The negative sequence current is bigger than a settable threshold
identical to the I0 threshold.
I>_FFUS : The direct current is bigger than a fixed threshold equal to 2,5IN.
V<_FFUS : All the voltages are lower than a settable threshold from 0.05 à 1
Un by step of 0.1

∆Ι>_FFUS : The line currents have a variation bigger than a settable value from
0.01 to 0.5 In by step of 0.01 In
FuseFailure_3P : Parameter in MiCOM S1 which allows the FFU tri pole detection
Any pole dead : Cycle in progress.

• The I0 criteria (zero sequence current threshold) gives the possibility to UNBLOCK the
distance protection in case of phase to ground fault (if the fuse failure has not been yet
confirmed).

• The I2 criteria (negative sequence current threshold) gives the possibility to


UNBLOCK the distance protection in case of insulated phase to phase fault (if the fuse
failure has not been yet confirmed).

• The criteria (V< AND /∆Ι) gives the possibility to detect the 3Poles Fuse Failure(No
more phase voltage and no variation of current) (no specific logic about line
energisation).
P44x/EN AP/F65 Application Notes

Page 180/286 MiCOM P441/P442 & P444

4.9.1.3 Fuse Failure Alarm reset


In case of Fuse Failure confirmed, the condition which manages the Reset are given by:

Fusion_Fusible = 0
And
INP_FFUS_Line = 0
And
/All Pole Dead Or Healthy Network

• All Pole Dead: No current AND no voltage OR CB Opened ((52a) if assigned in PSL)

UN . V0 . I0 . CVMR (convergence) . PSWING

• Healthy Network:
Rated Line voltage AND
No V0 and No I0 AND
No start element AND
No Power Swing
There are three main aspects to consider regarding the failure of the VT supply. These are
defined below:
1. Loss of one or two phase voltages
2. Loss of all three phase voltages under load conditions
3. Absence of three phase voltages upon line energisation
4.9.1.4 Loss of One or Two Phase Voltages
The VTS feature within the relay operates on detection of residual voltage without the
presence of zero and negative phase sequence current, and earth fault current (ΣIph). This
gives operation for the loss of one or two phase voltages. Stability of the VTS function is
assured during system fault conditions, by the presence of I0 and/or I2 current. Also, VTS
operation is blocked (and distance element unblocked) when any phase current exceeds 2.5
x In.
Zero Sequence VTS Element:
The thresholds used by the element are:

• Fixed operate threshold: VN ≥ 0.75 x Vn;

• Blocking current thresholds, I0 = I2 = 0 to 1 x In; settable (defaulted to


0.05In),
and Iph = 2.5 x In.
4.9.1.5 Loss of All Three Phase Voltages Under Load Conditions
Under the loss of all three phase voltages to the relay, there will be no zero phase sequence
quantities present to operate the VTS function. However, under such circumstances, a
collapse of the three phase voltages will occur. If this is detected without a corresponding
change in any of the phase current signals (which would be indicative of a fault), then a VTS
condition will be raised. In practice, the relay detects the presence of superimposed current
signals, which are changes in the current applied to the relay. These signals are generated
by comparison of the present value of the current with that exactly one cycle previously.
Under normal load conditions, the value of superimposed current should therefore be zero.
Under a fault condition a superimposed current signal will be generated which will prevent
operation of the VTS.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 181/286

The phase voltage level detectors is settable (default value is adjusted at 30V / setting
range: min:10V to Max:70V).
The sensitivity of the superimposed current elements is settable and default value is
adjusted at 0.1In (setting range: 0,01In to 5In).

4.9.1.6 Absence of Three Phase Voltages Upon Line Energisation


If a VT were inadvertently left isolated prior to line energisation, incorrect operation of voltage
dependent elements could result. The previous VTS element detected three phase VT
failure by absence of all 3 phase voltages with no corresponding change in current. On line
energisation there will, however, be a change in current (as a result of load or line charging
current for example). An alternative method of detecting 3 phase VT failure is therefore
required on line energisation: in that case the SOTF logic is applied.
4.9.1.7 Menu Settings
The VTS settings are found in the ‘SUPERVISION’ column of the relay menu. The relevant
settings are detailed below.

Menu text Default setting Setting range Step size


Min Max
GROUP 1
SUPERVISION
VT Supervision
VTS Time Delay 5s 1s 20s 1s
VTS I2> & I0> Inhibit 0.05 x In 0 1 x In 0.01 x In
Detect 3P Disabled Enabled
Disabled
Threshold 3P 30V 10V 70V 1V
Delta I> 0.1×In 0.01×In 5×In 0.01×In

The relay responds as follows, on operation of any VTS element:

• VTS alarm indication (delayed by the set Time Delay);

• Instantaneous blocking of distance protection elements (if opto used); and others
protection functions using voltage measurement

• Dedirectionalising of directionalised overcurrent elements with new time delays “I>

VTS”.(if selected)
The VTS block is latched after a user settable time delay ‘VTS Time Delay’. Once the signal
has latched then two methods of resetting are available. (See Reset logic description in
section 4.9.1.3).
P44x/EN AP/F65 Application Notes

Page 182/286 MiCOM P441/P442 & P444

If not blocked the time delay associated can be modified as well (Time VTS):

4.9.1.8 INPUT / OUTPUT used in VTS logic:


4.9.1.8.1 Inputs

MCB/VTS Line
The DDB:MCB/VTS Line if linked to an opto in the PSL and when energized, informs the
P44X about an internal maloperation from the VT used for the impedance measurement
reference. (Line in this case means Main VT ref measurement / even if the main VT is on the
bus side and the Synchro VT is on the line side).

MCB/VTS Bus
The DDB:MCB/VTS Bus if linked to an opto in the PSL and when energized, informs the
P44X about an internal maloperation from the VT used for synchrocheck control (See
CheckSync logic in section 4.9.3).
4.9.1.8.2 Outputs

VTS Fast
Set high for internal FFAilure detection made with internal logic.

VTS Fail Alarm


Set high Set highwhen Opto energised (copy of MCB) OR internal FFAilure confirmed at the
end of VTS timer.

Any Pole Dead


The DDB Any Pole Dead if linked in the PSL, indicates that one or more poles is opened.

All Pole Dead


The DDB All Pole Dead if linked in the PSL, indicates all pole are dead (The 3 poles are
open).
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 183/286

4.9.2 Current Transformer Supervision (CTS)


The current transformer supervision feature is used to detect failure of one or more of the ac
phase current inputs to the relay. Failure of a phase CT or an open circuit of the
interconnecting wiring can result in incorrect operation of any current operated element.
Additionally, interruption in the ac current circuits risks dangerous CT secondary voltages
being generated.
4.9.2.1 The CT Supervision Feature
The CT supervision feature operates on detection of derived zero sequence current, in the
absence of corresponding derived zero sequence voltage that would normally accompany it.
The voltage transformer connection used must be able to refer zero sequence voltages from
the primary to the secondary side. Thus, this element should only be enabled where the VT
is of five limb construction, or comprises three single phase units, and has the primary star
point earthed.
Operation of the element will produce a time-delayed alarm visible on the LCD and event
record (plus DDB 125: CT Fail Alarm), with an instantaneous block for inhibition of protection
elements. Protection elements operating from derived quantities (Broken Conductor, Earth
Fault, Neg Seq O/C) are always blocked on operation of the CT supervision element.
The following table shows the relay menu for the CT Supervision element, including the
available setting ranges and factory defaults:-

Setting range
Menu text Default setting step size
Min max
GROUP 1
SUPERVISION
CT SUPERVISION
CTS Status Disabled Enabled/Disabled
CTS VN< Inhibit 1 0.5 / 2V 22 / 88V 0.5 / 2V
CTS IN> Set 0.1 0.08 x In 4 x In 0.01 x In
CTS Time Delay 5 0s 10s 1s

4.9.2.2 Setting the CT Supervision Element

Ir>

Temporisation
& 0<->10sec

Vr<

Calulation Part Logical Part

P0554ENa

The residual voltage setting, CTS VN< Inhibit and the residual current setting, CTS IN> set,
should be set to avoid unwanted operation during healthy system conditions. For example
CTS VN< Inhibit should be set to 120% of the maximum steady state residual voltage. The
CTS IN> set will typically be set below minimum load current. The time-delayed alarm,
CTS Time Delay, is generally set to 5 seconds.
Where the magnitude of residual voltage during an earth fault is unpredictable, the element
be disabled to prevent a protection elements being blocked during fault conditions.
P44x/EN AP/F65 Application Notes

Page 184/286 MiCOM P441/P442 & P444

4.9.2.2.1 Inputs/outputs in CTS logic:

CT Fail Alarm
The DDB cell indicates a CT Fail detected after timer is issued
4.9.3 Capacitive Voltage Transformers Supervision (CVT) (since version B1.x)
4.9.3.1 Function description
This CVT supervision will detect the degradation of one or several capacitors of voltage
dividers. It is based on permanent detection of residual voltage.
A “CVT fault” signal is sent out, after a time-delay T which can be set at between 0 and 300
seconds, if the conditions are as follows:

• The residual voltage is greater than the setting threshold during a delay greater then T

• The 3 phase-phase voltages have a value greater than 0.4 Un

Vab(t) Vab(t) > 0,8*Vn


S
Q
Vab(t) < 0,4*Vn R

Vbc(t) Vbc(t) > 0,8*Vn


S
Q
Vbc(t) < 0,4*Vn R

Vca(t) Vca(t) > 0,8*Vn


S
&T T
TCTs - Alarm
Q
Vca(t) < 0,4*Vn R

Vr(t) Vr(t) > SVr


P3102ENa

FIGURE 78 - BASIC CVT SUPERVISION DIAGRAM


The table below shows the CVT supervision settings menu, settings range and the default in-
factory settings.

Setting range
Menu text Default setting Step size
Min Max
Group1
SUPERVISION
CVTS Status Activated Activated / Disabled
CVTS VN> 1V 0.5 V 22 V 0.5 V
CVTS Time Delay 100 s 0s 300 s 0.01 s
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 185/286

4.9.3.2 Settings & DDB cells assigned to Capacitive Voltage Transformers Supervision (CVT)
function

FIGURE 79 - FOR ENABLING THE FUNCTION

FIGURE 80 – SETTINGS
DDB cell OUTPUT associated:

The CVT ALARM cell at 1 indicates that the residual voltage is


greater than the threshold adjusted in the settings, during a delay greater than the timer
adjusted in MiCOM S1. That alarm is also included in the general alarm.
4.10 Check synchronisation (“System checks” menu)
The check synchronism option is used to qualify reclosure of the circuit breaker so that it can
only occur when the network conditions on the busbar and line side of the open circuit
breaker are acceptable. If a circuit breaker were closed when the two system voltages were
out of synchronism with one another, i.e. a difference in voltage magnitudes or phase angles
existed, the system would be subjected to an unacceptable ‘shock’, resulting in loss of
stability and possible damage to connected machines.
Check synchronising therefore involves monitoring the voltage on both sides of a circuit
breaker and, if both sides are ‘live’, the relative synchronism between the two supplies. Such
checking may be required to be applied for both automatic and manual reclosing of the
circuit breaker and the system conditions which are acceptable may be different in each
case. For this reason, separate check synchronism settings are included within the relay for
both manual and automatic reclosure of the circuit breaker. With manual closure, the CB
close signal is applied into the logic as a pulse to ensure that an operator cannot simply keep
the close signal applied and wait for the system to come into synchronism. This is often
referred to as guard logic and requires the close signal to be released and then re-applied if
the closure is unsuccessful.
P44x/EN AP/F65 Application Notes

Page 186/286 MiCOM P441/P442 & P444

The check synchronising element provides two ‘output’ signals which feed into the manual
CB control and the auto reclose logic respectively. These signals allow reclosure provided
that the relevant check-synch criteria are fulfilled.

Note that if check-synchronising is disabled, the DDB: signal is


automatically asserted and becomes invariant (logical status always forced at 1).
For an interconnected power system, tripping of one line should not cause a significant shift
in the phase relationship of the busbar and line side voltages. Parallel interconnections will
ensure that the two sides remain in synchronism, and that autoreclosure can proceed safely.
However, if the parallel interconnection(s) is/are lost, the frequencies of the two sections of
the split system will begin to slip with respect to each other during the time that the systems
are disconnected. Hence, a live busbar / live line synchronism check prior to reclosing the
breaker ensures that the resulting phase angle displacement, slip frequency and voltage
difference between the busbar and line voltages are all within acceptable limits for the
system. If they are not, closure of the breaker can be inhibited.
The SYSTEM CHECKS menu contains all of the check synchronism settings for auto (“A/R”)
and manual (“Man”) reclosure and is shown in the table below along with the relevant default
settings:-

Setting range
Menu text Default setting Step size
Min Max
GROUP 1
SYSTEM CHECKS
C/S Check Scheme for A/R 111 Bit 0: Live Bus / Dead Line,
Bit 1: Dead Bus / Live Line,
Bit 2: Live Bus / Live Line.
Dead / Dead made by PSL only (from
version A3.0 model 05)
C/S Check Scheme for Man 111 Bit 0: Live Bus / Dead Line,
CB Bit 1: Dead Bus / Live Line,
Bit 2: Live Bus / Live Line.
Dead / Dead made by PSL only (from
version A3.0 model 05)
V< Dead Line 13V 5V 30V 1V
V> Live Line 32V 30V 120V 1V
V< Dead Bus 13V 5V 30V 1V
V> Live Bus 32V 30V 120V 1V
Diff Voltage 6.5V 0.5V 40V 0.1V
Diff Frequency 0.05Hz 0.02Hz 1Hz 0.01Hz
Diff Phase 20° 5° 90° 2.5°
Bus-Line Delay 0.2s 0.1s 2s 0.1s

KEY: “Diff” denotes the differential between Line VT and Busbar VT measurements.

− At least one condition of c/s scheme must be selected in the 3 bits, to activate the c/s
check logic.

− Man CB, check sync condition is tallen in account, only if a logic of STF has been
enabled by S1.

− If SOTF is disabled in S1, a dedicated PSL must be created using Deb B (live L or live
B/Dead L) – live/live could not be managed – in that case.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 187/286

Note that the combination of the Diff Phase and Bus-Line Delay settings can also be equated
to a differential frequency, as shown below:

• Diff Phase angle set to +/-20°, Bus-Line Delay set to 0.2s.

• The phase angle ‘window’ is therefore 40°, which corresponds to 40/360ths of a


cycle = 0.111 cycle. This equates to a differential frequency of:
0.111 / 0.2 = 0.55 Hz
Thus it is essential that the time delay chosen before an “in synchronism” output can be
given is not too long, otherwise the synchronising conditions will appear more restrictive than
the actual Diff Frequency setting.
The Live Line and Dead Line settings define the thresholds which dictate whether or not the
line or bus is determined as being live or dead by the relay logic. Under conditions where
either the line or bus are dead, check synchronism is not applicable and closure of the
breaker may or may not be acceptable. Hence, setting options are provided which allow for
both manual and auto-reclosure under a variety of live/dead conditions. The following
paragraphs describe where these may be used.
WARNING: THE SETTINGS VOLTAGE IN MiCOM S1 IS ALLWAYS CALCULATED IN
PHASE TO GROUND – EVEN IF PHASE/PHASE REF HAS BEEN
SELECTED.
If the threshold: live line has been set too high – the relay will never detect a healthy network
(as the line voltage is always measured below the voltage threshold). Without live line
condition, the distance protection cannot use the delta algorithms as no prefault detection
has been previously detected.
4.10.1 Dead Busbar and Dead Line
This mode is not integrated in the internal logic, however can be created using a dedicated
PSL:

(This facility with cells (Dead Line/Dead Bus) is available since version A3.0 model 05)
This setting might also be used to allow manual close with specific test conditions on the CB.
4.10.2 Live Busbar and Dead Line
Where a radial feeder is protected, tripping the circuit breaker will isolate the infeed, and the
feeder will be dead. Provided that there is no local generation which can backfeed to
energise the feeder, reclosure for live busbar / dead line conditions is acceptable. This
setting might also be used to allow re-energisation of a faulted feeder in an interconnected
power system, which had been isolated at both line ends. Live busbar / dead line reclosing
allows energising from one end first, which can then be followed by live line / live busbar
reclosure with voltages in synchronism at the remote end.
P44x/EN AP/F65 Application Notes

Page 188/286 MiCOM P441/P442 & P444

4.10.3 Dead Busbar and Live Line


If there was a circuit breaker and busbar at the remote end of the radial feeder mentioned
above, the remote breaker might be reclosed for a dead busbar / live line condition.
4.10.4 Check Synchronism Settings
Depending on the particular system arrangement, the main three phase VT for the relay may
be located on either the busbar or the line. Hence, the relay needs to be programmed with
the location of the main voltage transformer. This is done under the ‘CT & VT RATIOS’
column in the ‘Main VT Location’ cell, which should be programmed as either ‘Line’ or ‘Bus’
to allow the previously described logic to operate correctly. (See DDB description bellow)
Note that the check synch VT input may be driven from either a phase to phase or phase to
neutral voltage. The ‘C/S Input’ cell in the ‘CT & VT RATIOS’ column has the options of A-N,
B-N, C-N, A-B, B-C or C-A, which should therefore be set according to the actual VT
arrangement.
If the VTS feature internal to the relay operates, the check synchronising element is inhibited
from giving an ‘Allow Reclosure’ output. This avoids allowing reclosure in instances where
voltage checks are selected and a VT fuse failure has made voltage checks unreliable.
Measurements of the magnitude angle and delta frequency (slip frequency - since version
A4.0 with model 07) – the rated frequency of network is displayed by default in case of
problem with the delta f calculation: No line voltage or no bus voltage or both of the check-
synch voltage are displayed in the ‘MEASUREMENTS 1’ column.
Individual System Check logic features can be enabled or disabled by means of the C/S
Check Scheme function links. Setting the relevant bit to 1 will enable the logic, setting bits
to 0 will disable that part of the logic. Voltage, frequency, angle and timer thresholds are
shared for both manual and autoreclosure, it is the live/dead line/bus logic which can differ.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 189/286

Enable_SYNC

VTS_Slow

1
INP_Fuse Failure Bus

AR_Force_Sync

INP_AR_Cycle_1P S
Q
INP_AR_Reclaim R

INP_AR_Cycle_Conf
1 CHECK
SYNC
INP_AR_Reclaim_Conf 1
Conditions
0 & verified
Any_Pole_Dead &
t 1
&
All_Pole_Dead 200ms

Dead L/Live B

t
V< Dead Line &
0

V> Live Bus 100ms

Live L/Dead B

t
V> Live L &
0

V< Dead B 100ms

Live L/Live B

V> Live B t
0
&
V> Live L
Bus Line Delay
Diff voltage

Diff frequency

Diff phase
P0492ENa

FIGURE 81 – CHECK SYNC LOGIC DESCRIPTION


P44x/EN AP/F65 Application Notes

Page 190/286 MiCOM P441/P442 & P444

X1 X2

b0 i0

b1 i1

sample

T sample

P0493ENa

FIGURE 82 – CALCUL OF FREQUENCY


Frequency tracking is calculated by: freq=1/((X2-X1+ Nbsamples)* Tsamples)
With X1 = b0 /(b0 – b1) et X2 = I0 /(I0 – I1).
Tsamples is the sampling period.
Nbsamples is the number of samples per period (between b1 & i1 (b1 being excluded))
The Line & Bus frequencies are calculated with the same principle (described here after).
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 191/286

Trailing VLine phase

VLine
VBus
x1 x2

Ta

∆T

y1 y2

Leading VLine phase

VBus
VLine

y2 y3

Ta

∆T

x1 x2

P0494ENa

FIGURE 83 - CALCULATION OF DIFF. PHASE

Phase shift = (∆T/ T) *360

∆T = Ta + (x1-y2)
A phase shift calculation requests a change of sign from both signals.
All the angles will be between 0° and 180°. For a phase shift of 245°,
(360 –245) = 115° will be displayed
P44x/EN AP/F65 Application Notes

Page 192/286 MiCOM P441/P442 & P444

4.10.5 Logic inputs / Outputs from synchrocheck function


4.10.5.1 Logic DDB input from the check sync logic
These following DDB cells:

• MCB/VTS Bus,

• MCB/VTS Line,
are managed dynamically since version C1.1 (regarding where the main VT are located:bus
side or line side – then the Csync ref is assigned to the other VT which is managed as the
Csync ref)
4.10.5.2 Logic DDB outputs issued by the check sync logic

Check Sync OK
Set high when Check Synchro conditions are verified
[Used with AR close in dedicated PSL – "AND" gate: [(AR Close) & (CheckSync OK)]

A/R Force Sync


Simulates the CheckSync control and force the logical DDB output "CheckSync OK" at 1
during a 1 pole or 3 poles high speed AR cycle. Without CheckSync control (See the
explanation in AR description Figure 88 and Figure 118)

V<Dead Line
Set high when the Dead line condition is verified (voltage below the V<Dead Line threshold
value (settable in MiCOM S1) – The measured voltage is always calculated as a single
phase voltage

V>Live Line
Set high when the Live line condition is verified (voltage above the V>Live Line threshold
value (settable in MiCOM S1) - always calculated as a single phase voltage ref

V<Dead Bus
Set high when the Dead Bus condition is verified (voltage below the V<Dead Bus threshold
value (settable in MiCOM S1) - always calculated as a single phase voltage ref

V>Live Bus
Set high when the Live Bus condition is verified (voltage above the V>Live Bus threshold
value (settable in MiCOM S1) - always calculated as a single phase voltage ref

Control No C/S
Set high when the internal Check Sync conditions are not verified

Ext Chk Synch OK


The DDB Ext Chk Synch OK if assigned to an opto input in PSL and when energized,
indicates that Check Sync conditions are verified by an external device – The DDB cell
should be assigned afterwards with an internal AR logic (See also AR description in section
4.11.1).
WARNING: TO ENSURE THAT THE AR CLOSING COMMAND IS CONTROLED BY
THE CHECK SYNC CONDITIONS, THE ABOVE PSL SHOULD BE SET.
(Different schemes can be created with internal AR & external CSync or internal Csync &
external AR)
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 193/286

Synchro Check : Dead Bus / Dead Line

P0537ENa

FIGURE 84 – CHECK SYNC PSL LOGIC

PSL Output
assigned

Check Sync 1 SYNC

AR_Force_Sync

AR_Fail

AReclose AR_Close

AR_Cycle_1P

AR_Cycle_3P

Closing command
& with check sync
1 conditions verified
CB Control CBC_Recl_3P

CBC_No_Check_Sync

P0495ENa

FIGURE 85 – INTERNAL CHECK SYNC AND INTERNAL AR LOGIC

External Check Sync 1


Closing command
& with external C. Sync
conditions verified

Output_AR_force_Sync

Output_closing order
P0496ENa

FIGURE 86 - LOGIC WITH EXTERNAL SYNCHRO CHECK


P44x/EN AP/F65 Application Notes

Page 194/286 MiCOM P441/P442 & P444

Output_Sync

1
Output_AR_force_Sync External closing order
External with internal C. Sync
AR close order &
conditions verified
Output_AR_Close
1

Output_closing order
P0497ENa

FIGURE 87 - LOGIC WITH EXTERNAL AR


4.11 Autorecloser (“autoreclose” menu)
4.11.1 Autorecloser Functional Description
The relay autorecloser provides selectable multishot reclosure of the line circuit breaker.
The standard scheme logic is configured to permit control of one circuit breaker.
Autoreclosure of two circuit breakers in a 1½ circuit breaker or mesh corner scheme is not
supported by the standard logic (Dedicated PSL must be created & tested by user). The
autorecloser can be adjusted to perform a single shot, two shot, three shot or four shot cycle.
Dead times for all shots (reclose attempts) are independently adjustable (in MiCOM S1).
Where the relay is configured for single and three pole tripping, the recloser can perform a
high speed (HSAR) single pole reclose shot, for a single phase to earth fault. This single
pole shot may be followed by up to three delayed (DAR) autoreclose shots, each with three
phase tripping and reclosure. For a three pole trip, up to four reclose shots are available in
the same scheme. Where the relay is configured for three pole tripping only, up to four
reclose shots are available, each performing three phase reclosure.
Since version C2.X, the new features have created some additive bits in the AR lock out
logic.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 195/286

Setting range
Menu text Default setting Step size
Min Max
GROUP 1
AUTORECLOSE
AUTORECLOSE MODE
1P Trip Mode Single Single
Single/Three
Single/Three/Three
Single/Three/Three/Three
3P Trip Mode Three Three
Three/Three
Three/Three/Three
Three/Three/Three/Three
1P - Dead Time 1(HSAR) 1s 0.1s 5s 0.01s
3P - Dead Time 1(HSAR) 1s 0.1s 60s 0.01s
Dead Time 2 (DAR) 60s 1s 3600s 1s
Dead Time 3 (DAR) 180s 1s 3600s 1s
Dead Time 4 (DAR) 180s 1s 3600s 1s
Reclaim Time 180s 1s 600s 1s
Close Pulse Time 0.1s 0.1s 10s 0.1s
A/R Inhibit Wind 5s 1s 3600s 1s
(CB healthy application)
C/S on 3P Rcl DT1 Enabled Enabled, Disabled
(Check Sync with HSAR)
AUTORECLOSE
LOCKOUT
Block A/R (Bit = 1 means Bit 0: Block at tZ2, Bit 1: Block at tZ3,
AR blocked) Bit 2: Block at tZp, Bit 3: Block for LoL Trip,
Bit 4: Block for I2> Trip,
Bit 5: Block for I>1 Trip,
Up to version C2.X Bit 6: Block for I>2 Trip,
1111 1111 Bit 7: Block for V<1 Trip,
1111 1111 Bit 8: Block for V<2 Trip,
Bit 9: Block for V>1 Trip,
Bit 10: Block for V>2 Trip,
Bit 11: Block for IN>2 Trip,
Bit 12: Block for IN>2 Trip,
Bit 13: Block for Aided DEF Trip.
P44x/EN AP/F65 Application Notes

Page 196/286 MiCOM P441/P442 & P444

Setting range
Menu text Default setting Step size
Min Max
Bit 0: Block at tZ2
Bit 1: Block at tZ3,
Bit 2: Block at tZp
Bit 3: Block for LoL Trip,
Bit 4: Block for I2> Trip,
Bit 5: Block for I>1 Trip,
Bit 6: Block for I>2 Trip,
Bit 7: Block for V<1 Trip,
1111 1111 Bit 8: Block for V<2 Trip,
Since version C2.X 1111 1111 Bit 9: Block for V>1 Trip,
111 Bit 0A: Block for V>2 Trip,
Bit 0B: Block for IN>1 Trip,
Bit 0C: Block for IN>2 Trip,
Bit 0D: Block for Aided DEF Trip.
Bit 0E: Block ZSP Trip
Bit 0F: Block IN>3 Trip
Bit 10: Block IN>4 Trip
Bit11: Block PAP Trip
Bit12: Block Therm Overload Trip
Discrim. Time 5s 0.1s 5s 0.01s

Remark: 1 PAR or/and 3 PAR logic must be enable in CB control:


4.11.2 Benefits of Autoreclosure
An analysis of faults on any overhead line network has shown that 80-90% are transient in
nature. Lightning is the most common cause, other possibilities being clashing conductors
and wind blown debris. Such faults can be cleared by the immediate tripping of one or more
circuit breakers to isolate the fault, followed by a reclose cycle for the circuit breakers. As
the faults are generally self clearing ‘non-damage’ faults, a healthy restoration of supply will
result.
The remaining 10 - 20% of faults are either semi-permanent or permanent. A semi-
permanent fault could be caused by a small tree branch falling on the line. The cause of the
fault may not be removed by the immediate tripping of the circuit, but could be burnt
away/thrown clear after several further reclose attempts or “shots”. Thus several time
delayed shots may be required in forest areas.
Permanent faults could be broken conductors, transformer faults or cable faults which must
be located and repaired before the supply can be restored.
In the majority of fault incidents, if the faulty line is immediately tripped out, and time is
allowed for the fault arc to de-ionise, reclosure of the circuit breakers will result in the line
being successfully re-energised, with obvious benefits. The main advantages to be derived
from using autoreclose can be summarised as follows:

• Minimises interruptions in supply to the consumer;

• A high speed trip and reclose cycle clears the fault without threatening system
stability.
When considering feeders which are partly overhead line and partly underground cable, any
decision to install auto-reclosing would be influenced by any data known on the frequency of
transient faults. When a significant proportion of the faults are permanent, the advantages of
auto-reclosing are small, particularly since reclosing on to a faulty cable is likely to aggravate
the damage.
At subtransmission and transmission voltages, utilities often employ single pole tripping for
earth faults, leaving circuit breaker poles on the two unfaulted phases closed. High speed
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 197/286

single phase autoreclosure then follows. The advantages and disadvantages of such single
pole trip/reclose cycles are:

• Synchronising power flows on the unfaulted phases, using the line to maintain
synchronism between remote regions of a relatively weakly interconnected system.

• However, the capacitive current induced from the healthy phases can increase the
time taken to de-ionise fault arcs.
4.11.3 Auto-reclose logic operating sequence
An autoreclose cycle is internally initiated by operation of a protective element (could be
started by an internal trip or external trip), provided the circuit breaker is closed at the instant
of protection operation. The appropriate dead timer for the shot is started (Dead Time 1, 2, 3
or 4; noting that separate dead times are provided for the first high speed shot of single pole
(1P), and three pole (3P), reclosure). At the end of the dead time, a CB close command of
set duration = Close Pulse is given, (See Figure 88 with AR Close logic) provided system
conditions are suitable. The conditions to be met for closing are that the system voltages
satisfy the internal check synchronism criteria (set in the System Checks section of the relay
menu – and in a dedicated PSL (needs to be created by user – see section 0), and that the
circuit breaker closing spring, or other energy source, is fully charged indicated from the
DDB: CB Healthy input (Optional application / See Figure 90 and Figure 94 AR inputs).
When the CB has closed the reclaim time (Reclaim Time) starts (See Figure 88 with AR
Close logic). If the circuit breaker has been not retrip, the autoreclose logic is reset at the
end of the reclaim time. The autorecloser is ready again to restart from the first shot a new
cycle again (for future faults). If the protection retrips during the reclaim time, the relay either
advances to the next shot in the programmed autoreclose cycle, or, if all programmed
reclose attempts have been made, goes to lockout.

Trip_1P or Trip_3P
Dead Time_1P or
Dead Time_3P
Close Pulse

AR_Trip_3ph
Reclaim Time
P0555ENa

FIGURE 88 - AR CYCLE – GENERAL DESCRIPTION

AR_Trip_3ph and Reclaim


Time stop with next Trip

Trip_1P or Trip_3P
Dead Time_1P
Dead Time_3P
Close Pulse

AR_Trip_3ph
Reclaim Time
P0556ENa

FIGURE 89 - SUCCESSIVE AR CYCLE – SECOND TRIP ORDER BEFORE RECLAIM TIME IS ISSUED
P44x/EN AP/F65 Application Notes

Page 198/286 MiCOM P441/P442 & P444

(The reclaim time is reset when the reclaim timer adjusted in MiCOM S1 Timer is issued or if
a new trip order 1P or 3P occurs – see Figure 90)

Any Pole Dead

CHECK SYNC OK
R
Q
End of Dead Time 2 AR_Fail
& S

CHECK SYNC 3P HSAR


1
&
End of 3P Dead Time 1

S
& Q AR_Force_Sync
1 R
End of 1P Dead Time 1

1
& S
Q AR_RECLAIM
R
AR_Enable 0
& t
1 Reclaim Time
Block AR
1

INP_CBHealthy
1 S
Q AR_Close
TRIP_1P
R
1 0
1
t
TRIP_3P
Close pulse Time

P0498ENa

FIGURE 90 - LOGIC FOR RECLAIM TIME /AR CLOSE / AR FAIL AND AR FORCE_SYNC
(AR FAIL is reseted with 3 pole closed)
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 199/286

AR_Enable

Block AR
1

AR lock out

inhibit

CBA_Discrepency
& S & AR_lock out
Q
1
R
0
t
End of 1P Dead Time 1 Reclaim
Time
1
End of 3P Dead Time 1

S
&
Q
TRIP_1P
1 R

TRIP_3P

Reset TRIP 1P
1
Reset TRIP 3P

TPAR enable

AR_Cycle_1P & S
Q
AR_Discrimination R

TRIP_3P

Reset TRIP 3P 1

& S
Q
R

P0499ENa

FIGURE 91 - INTERNAL LOGIC OF AR LOCK OUT


AR lockout logic picks up by: Block AR (see Figure 92) or AR BAR Shots (see Figure 93)
or Inhibit (see Figure 94) or No pole discrepancy detected at the end of dead time1 (see
Figure 95) or Trip order still present at the end of Dead time or Trip3P issued during 1P cycle
after Discrimination Timer or Trip3P issued during 1P cycle with no 3PAR enable.
P44x/EN AP/F65 Application Notes

Page 200/286 MiCOM P441/P442 & P444

S
Q >1
AR 1P in Prog
>1 &
AR 3P in Prog

BAR_Block_T2 Enable
&
T2

BAR_Block_T3 Enable
&
T3

BAR_Block_Tzp Enable
&
Tzp

T4

BAR_Block_LOL Enable
&
LOL_Trip_3P

BAR_Block_I2 > Enable


&
Trip_I2>

BAR_Block_I> Enable
&
TRIP 3P_I>1

BAR_Block_I>2 Enable
&
TRIP 3P_I>2

BAR_Block_V<1 Enable
&
TRIP 3P_V<1
&
BAR_Block_V<2 Enable
&
>1
TRIP 3P_V<2 >1 Block AR

BAR_Block_V>1 Enable
&
TRIP 3P_V>1

BAR_Block_V>2 Enable
&
TRIP 3P_V>2

BAR_Block_IN>1 Enable
&
SBEF_TRIP 3P_IN>1

BAR_Block_IN>2 Enable
&
SBEF_TRIP 3P_IN>2

BAR_Block_DEF Enable
&
DEF_TripA

DEF_TripB >1
DEF_TripC

BRK_Trip 3P

SOTF_Enable
&
SOTF/TOR trip

PHOC_Trip_3P_I>4

CBF1_Trip_3P

CBF2_Trip_3P

INP_BAR
P0500ENa

FIGURE 92 – BLOCK AR LOGIC

− With AR Lock out (Block AR) activated, the AR does not initiate any additional AR
cycle. If AR lock out picks up during a cycle, the AR close is blocked.

− A dedicated PSL can be created, for performing an AR lock out in case of Fuse
Failure confirmed.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 201/286

AR_Enable

SPAR enable
& & S
1 AR lockout_Shots>
Q
R

TRIP_1P
1

Trip counter = &


setting

TRIP_3P

&
TPAR enable

Reset TRIP_1P
1
Reset TRIP_3P
P0501ENa

FIGURE 93 - AR LOCK OUT BY NUMBER OF SHOTS

AR_Enable

End of 1P_Dead Time


1
& S
End of 3P_Dead Time Q t
0 inhibit
R
&
INP_CBHealthy Inhibit Window

P0502ENa

FIGURE 94 - LOGIC OF INHIBIT WINDOW


The inhibit timer is started at the end of dead time if CB healthy is absent

Trip1P
Dead time(1P)

AR_BAR

AR_Trip_3ph
CBA_Discrepency
P0503ENa

FIGURE 95 - POLES DISCREPENCY (CBA-DISC)

Trip1P or Trip 3P
Dead time1 or
Dead time 3P
AR_Close

AR_BAR
P0557ENa

FIGURE 96 - TRIP ORDER STILL PRESENT AT THE END OF DEAD TIME WILL FORCE AR LOCK OUT
(AR _BAR)
P44x/EN AP/F65 Application Notes

Page 202/286 MiCOM P441/P442 & P444

CNF_52b

CNF_52a

&
INP_52a_A &
S
Q
& R
INP_52b_A &
1 CBA_A
&

& & CBA_3P_C

xor

&
INP_52a_B &
S
Q 1 CBA_ANY
& R
INP_52b_B &
1 CBA_B
&

& & CBA_3P

xor

&
INP_52a_C & &
S
Q
& R
INP_52b_C &
1 CBA_C
&

& t
1 CBA_Status_Alarm
0
xor
CBA_Time_Alarm

CBA_Time_Disc

1 t
INP_DISCREPENCY CBA_Disc
0

P0504ENa

FIGURE 97 - LOGICAL CBAUX SCHEME


(CBA_DISC LOGIC FOR AR_BAR (AR LOCK OUT))
CBA TIME DISC=150MSEC FIXED VALUE

Logic of pole dead:

− CBA_A = Pole Dead A

− CBA_3P = All pole Dead

− CBA_3P_C = All pole Live

− CBA_Any = Minimum 1Pole dead


The total number of autoreclosures is shown in the “CB Condition” menu from LCD under
Total Reclosures. Separate counters for single pole and three pole reclosures are available
(See HMI description chapter P44x/EN HI). The counters can be reset to zero with the
Reset Total A/R command; by LCD HMI
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 203/286

4.11.4 Scheme for Three Phase Trips


The relay allows up to four reclose shots. The scheme is selected in the relay menu as
shown in Table 16:

(The first 3P_HSAR cycle can be controlled by the check Sync logic)

Reclosing Mode Number of Three Phase Shots


3 1
3/3 2
3/3/3 3
3/3/3/3 4

TABLE 16 - RECLOSING SCHEME FOR 3 PHASE TRIPS


4.11.5 Scheme for Single Pole Trips
The relay allows up to four reclose shots, ie. one high speed single pole AR shot (HSAR),
plus up to three delayed (DAR) shots. All DAR shots have three pole operation. The
scheme is selected in the relay menu as follows:

Scheme Number of Single Pole HSAR Shots Number of Three Pole DAR Shots
1 1 None
1/3 1 1
1/3/3 1 2
1/3/3/3 1 3

TABLE 17 - RECLOSING SCHEME FOR SINGLE PHASE TRIPS


Should a single phase fault evolve to affect other phases during the single pole dead time,
the recloser will then move to the appropriate three phase cycle.
When a single pole trip is issued by the relay, a 1 pole AR cycle is initiated. The Dead time1
and Discrimination timer (from version A3.0) are started. If the AR logic detects a single pole
or three poles trip (internal or external) during the discrimination timer, the 1P HSAR cycle is
disabled and replaced by a 3P HSAR cycle, if enable. If no AR 3P is enable in MiCOM S1,
the relay trip 3 poles and AR is blocked. (see Figure 98)
P44x/EN AP/F65 Application Notes

Page 204/286 MiCOM P441/P442 & P444

Trip 1P Trip 3P during Discrimination Timer

Trip_1P or Trip_3P

1P_Dead Time

AR_Discrimination Timer
3P_Dead Time

AR_Trip_3ph

AR_BAR
P0505ENa

FIGURE 98 - FAULT DURING A HSAR 1P CYCLE DURING DISCRIMINATION TIMER


If the AR logic detect a 3 poles trip (internal or external) when the Discrimination Timer is
issued, and during the 1P dead time; the single pole AR cycle is stopped and the relay trip 3
phases and block the AR. (see Figure 99)

Trip 1P Trip 3P after Discrim Timer

Trip_1P or Trip_3P

1P_Dead Time

AR_Discrimination Timer

3P_Dead Time

AR_Trip_3ph

AR_BAR
P0506ENa

FIGURE 99 - FAULT DURING A HSAR 1P CYCLE WHEN DISCRIMINATION TIMER IS ISSUED


- Figure 98 - Figure 99: Evolving fault during AR 1P cycle -
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 205/286

4.11.6 Logical Inputs used by the Autoreclose logic


Contacts from external equipment (External protection or external synchrocheck or external
AR) may be used to influence the auto-recloser via opto-isolated inputs. Such functions can
be allocated to any of the opto-isolated inputs on the relay via the programmable scheme
logic (Ensure that optos1&2 are not set for setting group change- Otherwise, these optos
cannot be mapped to functions in the PSL). The inputs can be selected to accept either a
normally open or a normally closed contact, programmable via the PSL editor.

SPAR Enable
The DDB SPAR Enable if assigned to an opto input in the PSL (in default PSL is inverted
and recorded to opto8) and when energized, will enable the 1P AR logic (The priority of that
input is higher than the settings done via MiCOM S1 or by front panel - that means the 1P
AR can be disabled even if activated in MiCOM S1; as the opto input is not energized.
(to be valid opto must be energized >1,2 sec).

SPAR
1 AR SPAR enable
INP_SPAR
P0507ENa

FIGURE 100

TPAR Enable
The DDB TPAR Enable if assigned to an opto input in the PSL (in default PSL is inverted
and recorded to opto8) and when energized, will enable the 3P AR logic (The priority is
higher than the settings done via MiCOM S1 or by front panel - that means the 3P AR can be
disabled even if activated in MiCOM S1; as that opto is not energized.
(to be valid opto must be energized >1,2 sec).

TPAR
1 AR TPAR enable
INP_TPAR
P0508ENa

FIGURE 101
NOTE: After a new PSL loaded in the relay (which includes "TPAR" or
"SPAR" cells); it is necessary to transfer again the settings
configuration (from PC to relay) for adjusting the datas in RAM and
EEPROM (otherwise discrepency could appear in the logic status of
AR enable).

A/R Internal
The DDB A/R Internal if assigned to an opto input in the PSL and when energized, will
enable the internal AR logic. This opto input could be connected to an external condition like
the Wdog of protection Main1 – which activates the internal AR of Main 2 (P44x) in case of
internal failure of the Main1.

AR_Internal

SPAR enable & AR_Enable


1

TPAR enable
P0509ENa

FIGURE 102 - AR ACTIVATED CONDITIONS


P44x/EN AP/F65 Application Notes

Page 206/286 MiCOM P441/P442 & P444

A/R 1p in Prog
The DDB A/R 1P in Prog if assigned to an opto input in the PSL and when energized, will
block the internal DEF as an external single pole AR cycle is in progress.

A/R 3p in Prog
The DDB A/R 3P in Prog if assigned to an opto input in the PSL and when energized, will
inform the P44X about the presence of an external 3P cycle.That data could be used in case
of evolving fault

A/R Close
The DDB A/R Close if assigned to an opto input in the PSL and when energized, could be
linked with the internal check sync condition to control the external CB closing command.

A/R Reclaim
The DDB A/R Reclaim if assigned to an opto input in the PSL and when energized, will
inform the protection about an external reclaim time in progress; and will initiate the internal
TOR logic. (That information extension logic, by using a dedicated PSL could be used also
in Z1x.

BAR
Block Autoreclose (via Opto Input or PSL) – see Figure 92.
The DDB: BAR input will block the autoreclose and lockout the AR if in progress. If a single
pole cycle is in progress a three pole trip and lockout will be issued. It can be used when
protection operation without autoreclose is required. A typical example is on a transformer
feeder, where autoreclosing may be initiated from the feeder protection but blocked from the
transformer protection. Similarly, where a circuit breaker low gas pressure or loss of vacuum
alarm occurs during the dead time, autoreclosure, should be blocked – and BAR can be
used to realise that blocking logic.

Ext Chk Synch OK


External Check Synchroniser Used (via Opto Input) – Dedicated PSL required to be
configured.
If an opto input is assigned in the PSL (DDB: Ext Chk Synch OK), the AR close command
will be controlled by an external check synchronism device. The input is energised when the
Check Sync conditions are verified.

CB Healthy
(via Opto Input)
The majority of circuit breakers are only capable of providing one trip-close-trip cycle. It is
necessary to re-establish sufficient energy in the circuit breaker before the CB can be
reclosed. The DDB: CB Healthy input is used to ensure that there is sufficient energy
available to close and trip the CB before initiating a CB close command. If on completion of
the dead time, sufficient energy is not detected by the relay within a period given by the AR
Inhibit Wind window, lockout will result and the CB will remain open (AR BAR Picks up –
see Figure 91) If the CB energy becomes healthy during the time window, autoreclosure will
occur. This check can be disabled by not allocating an opto input. In this case, the DDB cell
“CB Healthy” is considered invariant for the logic of the relay. This will mean that the signal
is always high within the relay (when the logic required a high level) and at 0, if low level is
requested. It is an invariant status for the firmware (Same logic is applied for every optional
opto – if not linked in the PSL these cells are managed as invariant data for internal logic).
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 207/286

Start of INP_CB_Healthy picks up,


INhWind before issued of INhWind

INhWind
1P Dead Time or
3P Dead Time
INP_CB_Healthly
Close pulse

AR_Trip_3ph

AR_RECLAIM
P0510ENa

FIGURE 103 - CB_HEALTHY IS PRESENT BEFORE INHWIND IS ISSUED

Start of INhWind is
INhWind issued

INhWind
1P_Dead Time or
3P_Dead Time

INP_CB_Healthy

AR_Close

AR_Trip_3ph

AR_BAR
P0511ENa

FIGURE 104 - CB_HEALTHY DID NOT PICKS UP WHEN INHWIND IS ISSUED (AR BAR PICKS UP)
The CB healthy logic is used as a negative logic (due to an inverter in the scheme – see
Figure 94 (logic of inhibit window) but the DDB takes into account the CB healthy as a
positive logic [1=opto energised during inhwind (MiCOM S1 setting) =AR close pulse]

Force 3P Trip
The DDB Force 3P Trip if assigned to an opto input in the PSL and when energized, will
force the internal single phase protection to trip three phases. (external order from Main1 to
Main2 (P44x)) – next Trip will be 3P (Figure 104 & Figure 105)

INP_Trp_3P
1 BAN3
AR_Trip_3Ph

SPAR enable &

AR_internal
P0512ENa

FIGURE 105 – 3P TRIP LOGIC


P44x/EN AP/F65 Application Notes

Page 208/286 MiCOM P441/P442 & P444

Trip_3P_SBEF_IN>1
Trip_3P_SBEF_IN>2
Trip_3P_I2>

TOR_Trip_3P

LOL_Trip_3P

BRK_Trip_3P
Trip_3P_I>1
Trip_3P_I>2 1

Trip_3P_I>3

Trip_3P_I>4
Trip_3P_V<1
Trip_3P_V<2 1
Trip_3P_V>1
Trip_3P_V>2 1 1 TRIP_Any Pole
PW_trip
R
Q
& S Dwell
1 Timer
BAN3
Trip_timer
PDist_Trip_A
Dwell
Weak_Trip_A 1 Trip_A
1
Timer
DEF_Trip_A
80 ms
User_Trip_A

1 TRIP_Any_A
INP_EXTERNAL_ProtA 1

& &
1 TRIP_3Poles

Trip_timer
PDist_Trip_B
Dwell 1
Weak_Trip_B Trip_B
1
Timer
DEF_Trip_B 80 ms
User_Trip_B

1 TRIP_Any_B
1
INP_EXTERNAL_ProtB

& TRIP_1Pole
xor
xor

Trip_timer
PDist_Trip_C
Dwell 1 Trip_C
Weak_Trip_C 1
Timer
DEF_Trip_C
80 ms
User_Trip_C

1 TRIP_Any_C
1
INP_EXTERNAL_ProtC
P0513ENa

FIGURE 106 - GENERAL TRIP LOGIC

Manual Close CB
(via Opto Input, Local or Remote Control)
Manual closure of the circuit breaker will force the autorecloser in a lockout logic, if selected
in the menu (see SOTF logic Figure 36).
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 209/286

Any fault detected within 500ms of a manual closure will cause an instantaneous three pole
tripping, without autoreclosure (See next Figure 92 BAR logic)
With AR Lock out (AR_BAR) activated, the AR does not initiate any additional AR cycle. If
AR lock out picks up during a cycle, the AR close is blocked.
This prevents excessive circuit breaker operations, which could result in increased circuit
breaker and system damage, when closing onto a fault.

Manual Trip CB
The DDB Force Manual Trip CB if assigned to an opto input in the PSL and when
energized, will inform the protection about an external trip command on the CB by the CB
control function (if activated).
P44x/EN AP/F65 Application Notes

Page 210/286 MiCOM P441/P442 & P444

SUP_Trip_Loc
& Manual/Remote/Local Trip
1
CBC_Local_Control
&
SUP_Close_Loc

SUP_Trip_Rem
&

CBC_Remote_Control
&
SUP_Close_Rem

INP_CB_Trip_Man
&

CBC_Input_Control Manual/Remote/Local Close


1
&
INP_CB_Man_Close

TRIP

& S CBC_Trip_Pulse
CBA_3P_C
Q CBC_Trip_3P
1
R
t
Pulsed output latched in UI
0 &
CBC_Failed_To_Trip

CBA_3P

CLOSE
CBA_Status_Alarm
& S
Q CBC_Close_In_Progress
AR_Cycle_1P R
1
INP_AR_Cycle_1P t
0
1
AR_Cycle_3P 1 CBC_Delay_Close

INP_AR_Cycle_3P & S
Q
CBA_3P R

CBA_Disc

TRIP_Any
1

INP_AR_Close
Pulsed output latched in UI

AR_Close 1 & CBC_ Fail_To_Close


t
0
R
Q CBC_Recl_3P
S CBC_Close_Pulse

CBA_Any

&
INP_CB_Healthy

CBC_Healthy_Window

t
0 & CBC_UnHeathly

CBC_CS_Window

t
0 & CBC_No_Check_Syn
SYNC
P0514ENa

FIGURE 107 - GENERAL CB CONTROL LOGIC


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 211/286

CB Discrepancy
The DDB CB Discrepancy if assigned to an opto input in the PSL and when energized, will
inform the protection about a pole Discrepancy status. 1 pole opened and two other poles
closed. Must be Set to high logical level before Dead time 1 is issued (see Figure 95) -can
be generated also internally (see Figure 97 and Figure 121 Cbaux logic).

External TripA
External TripB
External TripC

From External Protection Devices (via Opto Inputs)- see General trip logic Figure 106.
Opto inputs are assigned as External Trip A, External Trip B and External Trip C (external
Trip Order issued by main 2 or in order to initiate the internal AR backup protection).
External trip is integrated in the DDB: Any Trip. No Dwell timer is associated as for an
internal trip (see Figure 106: trip logic).
4.11.7 Logical Outputs generated by the Autoreclose logic
The following DDB signals can be masked to a relay contact in the PSL or assigned to a
Monitor Bit in Commissioning Tests, to provide information about the status of the
autoreclose cycle. These are described below, identified by their DDB signal text.

AR Lockout Shot>
Indicates an unsuccessful autoreclose (definitive trip following the last AR shot). The relay
will be driven to lockout and the autoreclose function will be disabled until the lockout
condition has been reset. An alarm, "AR Lockout Shots>" (along with AR Lockout) will be
raised. – (see Figure 91 and Figure 93)

AR Fail
If the check sync conditions are not meet prior to reclose within the time window, an alarm
"AR Fail" will be raised. (see Figure 90)

AR Close
Initiates the reclosing command pulse for the circuit breaker. This output feeds a signal to
the Reclose Time Delay timer, which maintains the assigned reclose contact closed for a
sufficient time period to ensure reliable CB mechanism operation. This DDB signal may also
be useful during relay commissioning to check the operation of the autoreclose cycle.
Where three single pole circuit breakers are used, the AR Close contact will need to
energise the closing circuits for all three breaker poles (or alternatively assign three CB
Close contacts). (See Figure 90)

AR 1P In Prog.
A single pole autoreclose cycle is in progress. This output will remain activated from the
initiating protection trip, until the circuit breaker is closed successfully, or the AR function is
Locked Out, thus indicating that dead time timeout is in progress. This signal may be useful
during relay commissioning to check the operation of the autoreclose cycle.
P44x/EN AP/F65 Application Notes

Page 212/286 MiCOM P441/P442 & P444

SPAR enable
&

TRIP_1P

AR_Cycle_3P S
& Q AR__1P in prog
CBA_Discrepency
R

BAR t
1
0

TRIP_3P 1P Dead Time 1

S
Q AR_Discrimination
R

1 t
0
Discrimination Time

P0515ENa

FIGURE 108 – AR 1 POLE IN PROGRESS LOGIC

AR 3P In Prog.
A three phase autoreclose cycle is in progress. This output will remain activated from the
initiating protection trip, until the circuit breaker is closed successfully, or the AR function is
Locked Out, thus indicating that dead time timeout is in progress. This signal may be useful
during relay commissioning to check the operation of the autoreclose cycle.

HS_AR_3P

1 AR_3P in prog
DAR_3P
P0516ENa

FIGURE 109 - OUTPUT AR 3 POLES IN PROGRESS

AR_1P in prog

Trip counter = 0 &

TPAR enable
&
1 S
TRIP_3P Q HSAR_3P
R
&
AR_discrimination t
0

Block AR Dead Time1


1

P0517ENa

FIGURE 110 - HSAR 3 POLES (HIGH SPEED AR CYCLE 3 POLES)

3Par
&
& S
TRIP_3P
Q DAR_3P
0 < Trip counter < setting R

Block AR t
1
0
Dead Time 2
P0518ENa

FIGURE 111 - DAR 3 POLES (DELAYED AR CYCLE 3 POLES)


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 213/286

AR 1st in Prog.
DDB: AR 1st in Prog. is used to indicate that the autorecloser is timing out its first dead
time, whether a high speed single pole or three pole shot.

HSAR_3P

1 AR_1st_Cycle
AR_1P in prog
P0519ENa

FIGURE 112 - OUTPUT HSAR (FOR DEAD TIME1)

AR 234 in Prog.
DDB: AR 234 in Prog. is used to indicate that the autorecloser is timing out delayed
autoreclose dead times for shots 2, 3 or 4. Where certain protection elements should not
initiate autoreclosure for DAR shots, the protection element operation is combined with AR
234 in Prog. as a logical AND operation in the Programmable Scheme Logic, and then set to
assert the DDB: BAR input, forcing lockout.

DAR_3P 1 AR_234th_Cycle

P0520ENa

FIGURE 113 - OUTPUT DAR (FOR DEAD TIME 2,3,4)

AR Trip 3 Ph
This is an internal logic signal used to condition any protection trip command to the circuit
breaker(s). Where single pole tripping is enabled, fixed logic converts single phase trips for
faults on autoreclosure to three pole trips.

AR_1P in prog
1
AR_3P in prog

&
TRIP_1P

Block AR 1

AR_RECLAIM

&
inhibit 1 AR_Trip_3Ph

AR_Internal
&

SPAR enable
P0521ENa

FIGURE 114 - -AR LOGIC FOR 3P TRIP DECISION

AR Reclaim
Indicates that the reclaim timer following a particular autoreclose shot is timing out. The
DDB: AR Reclaim output would be energised at the same instant as resetting of any Cycle
outputs. AR Reclaim could be used to block low-set instantaneous protection on
autoreclosure, which had not been time-graded with downstream protection. This technique
is commonly used when the downstream devices are fuses, and fuse saving is implemented.
This avoids fuse blows for transient faults. See Figure 90.
P44x/EN AP/F65 Application Notes

Page 214/286 MiCOM P441/P442 & P444

AR Discrim
Start with the trip order.
When a single pole trip is issued by the relay, a 1 pole AR cycle is initiated. The Dead time1
and Discrimination timer (from version A3.0) are started. If the AR logic detects a single pole
or three poles trip (internal or external) during the discrimination timer, the 1P HSAR cycle is
disabled and replaced by a 3P HSAR cycle, if enable. If no AR 3P is enable in MiCOM S1,
the relay trip 3 poles and AR is blocked. (see Figure 98)
If the AR logic detect a 3 poles trip (internal or external) when the Discrimination Timer is
issued, and during the 1P dead time; the single pole AR cycle is stopped and the relay trip 3
phases and block the AR. (see Figure 99 and Figure 108)

SPAR enable
&

TRIP_1P

AR_3P in prog S
& Q AR_1P in prog
CBA_Discrepency
R

Block AR t
1
0

TRIP_3P 1P Dead Time 1

S
Q AR_Discrimination
R

1 t
0
Discrimination Time

P0522ENa

FIGURE 115 – AR DISCRIMINATION LOGIC


See also Figure 98 & Figure 99
The discrimination timer is used to differentiate an evolving fault to a second fault in the
power system or a long operation of the circuit breaker.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 215/286

If an evolving occurs during the discrimination timer, the first single pole high speed
AR cycle (1P HSAR) is stopped and removed by a 3 pole high speed AR cycle (3P HSAR)

P0523ENa

FIGURE 116 - DEAD TIME 1P=500MSEC / T DISCRIM=100MSEC


If the evolving fault occurs after the discrimination timer, it is considered like a new fault. The
1P cycle is blocked and the CB is kept opened. (No 3P AR cycle is started) (definitive trip –
3 poles are kept opened) – see Figure 117.
P44x/EN AP/F65 Application Notes

Page 216/286 MiCOM P441/P442 & P444

FIGURE 117
To inhibit the discrimination timer logic (fixed logic) ; the value should be equal to the 1P
cycle dead time. (1P Dead Time 1).

AR Enable
Indicates that the autoreclose function is in service. (See Figure 102)

AR SPAR Enable
Single pole AR is enabled. (See Figure 101)

AR TPAR Enable
Three poles AR is enabled. (See Figure 102)

AR Lockout
If protection operates during the reclaim time, following the final reclose attempt, the relay
will be driven to lockout and the autoreclose function will be disabled until the lockout
condition is reset. This will produce an alarm, AR Lockout. Secondly, the DDB: BAR input
will block autoreclose and cause a lockout if autoreclose is in progress. Lockout will also
occur if the CB energy is low and the CB fails to close. Once the autorecloser is locked out,
it will not function until a Reset Lockout or CB Manual Close command is received
(depending on the Reset Lockout method chosen in CB Monitor Setup).

NOTE: Lockout can also be caused by the CB condition monitoring functions


maintenance lockout, excessive fault frequency lockout, broken
current lockout, CB failed to trip and CB failed to close, manual close
no check synchronism and CB unhealthy. (See Figure 91 & Figure
92)
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 217/286

A/R Force Sync


Force the Check Sync conditions to high logical level – used for SPAR or TPAR with SYNC
AR3 fast (Enable by MiCOM S1) - signal is reset with AR reclaim

DEC_3P

AR_Cycle_3P

SYNC

AR_Close

AR_Trip_3ph

RECLAIM
AR_Force_Sync
P0558ENa

FIGURE 118 – CHECK SYNC SIGNAL PICK-UP AT THE END OF THE DEAD TIME (AR CYCLE)

DEC_3P

AR_Cycle_3P

SYNC

AR_Close

AR_Trip_3ph

AR_RECLAIM

AR_Fail

AR_Force_Sync
P0559ENa

FIGURE 119 - THE CHECK SYNC SIGNAL IS FORCED AT THE END OF DEAD TIME
(SEE FIGURE 90)

Ext Chk Synch OK


The DDB Ext Chk Synch OK if linked to an opto in a dedicated PSL and when energized,
indicates that external conditions of Synchro are fullfiled – This can be linked afterwards with
an internal AR logic (See also AR description in Figure 88).

Check Sync;OK
(See Checksync logic description – section 4.10.5.2)

V<Dead Line
(See Checksync logic description – section 4.10.5.2)

V>Live Line
(See Checksync logic description – section 4.10.5.2)

V<Dead Bus
(See Checksync logic description – section 4.10.5.2)
P44x/EN AP/F65 Application Notes

Page 218/286 MiCOM P441/P442 & P444

V>Live Bus
(See Checksync logic description – section 4.10.5.2)

Ctrl Cls In Prog


Manual close in progress-using CB control (timer manual closing delay in progress)

Control Trip
CB Trip command by internal CB control

Control Close
CB close command by internal CB control

4.11.8 Setting Guidelines


Should autoreclosure not be required, the function may be Disabled in the relay
Configuration menu. Disabling the autorecloser does not prevent the use of the internal
check synchronism element to supervise manual circuit breaker closing. If the autoreclose
function is Enabled, the setting guidelines now outlined should be read:
4.11.9 Choice of Protection Elements to Initiate Autoreclosure
In most applications, there will be a requirement to reclose for certain types of faults but not
for others. The logic is partly fixed so that autoreclosure is always blocked for any Switch on
to Fault, Stub Bus Protection, Broken Conductor or Zone 4 trip. Autoreclosure will also be
blocked when relay supervision functions detect a Circuit Breaker Failure or Voltage
Transformer/Fuse Failure. All other protection trips will initiate autoreclosure unless blocking
bits are set in the A/R Block function links. Setting the relevant bit to 1 will block
autoreclose initiation (forcing a three pole lockout), setting bits to zero will allow the set
autoreclose cycle to proceed.
When autoreclosure is not required for multiphase faults, DDB signals 2Ph Fault and 3Ph
Fault can be mapped via the PSL in a logical OR combination onto input DDB: BAR. When
blocking is only required for a three phase fault, the DDB signal 3Ph Fault is mapped to BAR
alone. Three phase faults are more likely to be persistent, so many utilities may not wish to
initiate autoreclose in such instances.
4.11.10 Number of Shots
There are no clear-cut rules for defining the number of shots for any particular application. In
order to determine the required number of shots the following factors must be taken into
account:
An important consideration is the ability of the circuit breaker to perform several trip close
operations in quick succession and the effect of these operations on the maintenance period.
The fact that 80 - 90% of faults are transient highlights the advantage of single shot
schemes. If statistical information for the power system shows that a moderate percentage
of faults are semi-permanent, further DAR shots may be used provided that system stability
is not threatened. Note that DAR shots will always be three pole.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 219/286

4.11.11 Dead Timer Setting


High speed autoreclose may be required to maintain stability on a network with two or more
power sources. For high speed autoreclose the system disturbance time should be
minimised by using fast protection, <50 ms, such as distance or feeder differential protection
and fast circuit breakers <100 ms. For stability between two sources a system dead time of
<300 ms may typically be required. The minimum system dead time considering just the CB
is the trip mechanism reset time plus the CB closing time.
Minimum relay dead time settings are governed primarily by two factors:

• Time taken for de-ionisation of the fault path;

• Circuit breaker characteristics.


Also it is essential that the protection fully resets during the dead time, so that correct time
discrimination will be maintained after reclosure onto a fault. For high speed autoreclose
instantaneous reset of protection is required.
For highly interconnected systems synchronism is unlikely to be lost by the tripping out of a
single line. Here the best policy may be to adopt longer dead times, to allow time for power
swings on the system resulting from the fault to settle.
4.11.12 De-Ionising Time
The de-ionisation time of a fault arc depends on circuit voltage, conductor spacing, fault
current and duration, wind speed and capacitive coupling from adjacent conductors. As
circuit voltage is generally the most significant, minimum de-ionising times can be specified
as in the Table below.
NOTE: For single pole HSAR, the capacitive current induced from the healthy
phases can increase the time taken to de-ionise fault arcs.

Line Voltage (kV) Minimum De-Energisation Time (s)


66 0.1
110 0.15
132 0.17
220 0.28
275 0.3
400 0.5

TABLE 18 - MINIMUM FAULT ARC DE-IONISING TIME (THREE POLE TRIPPING)


P44x/EN AP/F65 Application Notes

Page 220/286 MiCOM P441/P442 & P444

Example Minimum Dead Time Calculation


The following circuit breaker and system characteristics are to be used:

• CB Operating time (Trip coil energised → Arc interruption): 50ms (a);

• CB Opening + Reset time (Trip coil energised → Trip mechanism reset): 200ms (b);

• Protection reset time: < 80ms (c);

• CB Closing time (Close command → Contacts make): 85ms (d).


De-ionising time for 220kV line:

• 280ms (e) for a three phase trip. (560ms for a single pole trip).
The minimum relay dead time setting is the greater of:
(a) + (c) = 50 + 80 = 130ms, to allow protection reset;
(a) + (e) - (d) = 50 + 280 - 85 = 245ms, to allow de-ionising (three pole);
= 50 + 560 - 85 = 525ms, to allow de-ionising (single pole).
In practice a few additional cycles would be added to allow for tolerances, so 3P Rcl - Dead
Time 1 could be chosen as ≥ 300ms, and 1P Rcl - Dead Time 1 could be chosen as ≥
600ms. The overall system dead time is found by adding (d) to the chosen settings, and
then subtracting (a). (This gives 335ms and 635ms respectively here).
4.11.13 Reclaim Timer Setting
A number of factors influence the choice of the reclaim timer, such as;

• Fault incidence/Past experience - Small reclaim times may be required where there
is a high incidence of recurrent lightning strikes to prevent unnecessary lockout for
transient faults.

• Spring charging time - For high speed autoreclose the reclaim time may be set
longer than the spring charging time. A minimum reclaim time of >5s may be needed
to allow the CB time to recover after a trip and close before it can perform another trip-
close-trip cycle. This time will depend on the duty (rating) of the CB. For delayed
autoreclose there is no need as the dead time can be extended by an extra CB
healthy check AR Inhibit Wind window time if there is insufficient energy in the CB.

• Switchgear Maintenance - Excessive operation resulting from short reclaim times can
mean shorter maintenance intervals.

• The Reclaim Time setting is always set greater than the tZ2 distance zone delay.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 221/286

4.12 Circuit breaker state monitoring


An operator at a remote location requires a reliable indication of the state of the switchgear.
Without an indication that each circuit breaker is either open or closed, the operator has
insufficient information to decide on switching operations. The relay incorporates circuit
breaker state monitoring, giving an indication of the position of the circuit breaker, or, if the
state is unknown, an alarm is raised.
4.12.1 Circuit Breaker State Monitoring Features
MiCOM relays can be set to monitor normally open (52a) and normally closed (52b) auxiliary
contacts of the circuit breaker. Under healthy conditions, these contacts will be in opposite
states. Should both sets of contacts be open, this would indicate one of the following
conditions:

• Auxiliary contacts / wiring defective

• Circuit Breaker (CB) is defective

• CB is in isolated position
Should both sets of contacts be closed, only one of the following two conditions would apply:

• Auxiliary contacts / wiring defective

• Circuit Breaker (CB) is defective


If any of the above conditions exist, an alarm will be issued after a 5s time delay. A normally
open / normally closed output contact can be assigned to this function via the programmable
scheme logic (PSL). The time delay is set to avoid unwanted operation during normal
switching duties.
In the PSL CB AUX could be used or not, following the four options:
None
52A (1 or 3 optos if it is a single pole logic)
52B (1 or 3 optos)
Both 52A and 52B (2 optos or 6 optos)
Sol1: One opto used for 52a (3 poles breaker)

Sol2: One opto used for 52b (3 poles breaker)


P44x/EN AP/F65 Application Notes

Page 222/286 MiCOM P441/P442 & P444

Sol3: Two optos used for 52a & 52b (3 poles breaker)

Sol4: Three optos used for 52a (1 pole breaker)

Sol5: Three optos used for 52b (1 pole breaker)

Sol6: Six optos used for 52a &52b (1 pole breaker)

FIGURE 120 – DIFFERENTS OPTOS/CB AUX SCHEMES


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 223/286

Where ‘None’ is selected no CB status will be available. This will directly affect any function
within the relay that requires this signal, for example CB control, auto-reclose, etc. Where
only 52a is used on its own then the relay will assume a 52b signal from the absence of the
52a signal. Circuit breaker status information will be available in this case but no discrepancy
alarm will be available. The above is also true where only a 52b is used. If both 52a and 52b
are used then status information will be available and in addition a discrepancy alarm will be
possible, according to the following table. 52a and 52b inputs are assigned to relay opto-
isolated inputs via the PSL.

Auxiliary Contact Position CB State Detected Action


52a 52b
Open Closed Breaker Open Circuit breaker healthy
Closed Open Breaker Closed Circuit breaker healthy
Closed Closed CB Failure Alarm raised if the condition
persists for greater than 5s
Open Open State Unknown Alarm raised if the condition
persists for greater than 5s

Where single pole tripping is used (available on P442 and P444) then an open breaker
condition will only be given if all three phases indicate and open condition. Similarly for a
closed breaker condition indication that all three phases are closed must be given. For single
pole tripping applications 52a-A, 52a-B and 52a-C and/or 52b-A, 52b-B and 52b-C inputs
should be used.
With 52a&52b both present, the relay memorizes the last valid status of the 2 inputs
(52a=/52b). If no valid status is present (52a=52b) when the Alarm timer is issued
(value=150 msec), CBA_Status Alarm is activated. See Figure 121.
P44x/EN AP/F65 Application Notes

Page 224/286 MiCOM P441/P442 & P444

CNF_52b

CNF_52a

&
INP_52a_A &
S
Q
& R
INP_52b_A &
1 CBA_A
&

& & CBA_3P_C

xor

&
INP_52a_B &
S
Q 1 CBA_ANY
& R
INP_52b_B &
1 CBA_B
&

& & CBA_3P

xor

&
INP_52a_C & &
S
Q
& R
INP_52b_C &
1 CBA_C
&

CBA_Time_Alarm
& t
1 CBA_Status_Alarm
0
xor
150 ms

CBA_Time_Disc

1 t
INP_DISC CBA_Discrepancy
0
150 ms P0524ENa

FIGURE 121 - LOGICAL SCHEME OF CBAUX


CBA_A = Dead PoleA
CBA_B = Dead PoleB
CBA_C = Dead PoleC
CBA_3P_C = All Pole live
CBA_3P = All Pole Dead
CBA_ANY = Any Pole dead
CBA_Disc = Pole Discrepancy detection
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 225/286

INP_52a_A

INP_52a_A

CBA_A

CBA_STATUS_ALARM
P0525ENa

FIGURE 122 - NON COMPLEMENTARY OF 52a/52b NOT LONG ENOUGH FOR GETTING THE ALARM

INP_52a_A

INP_52b_A

CBA_A

CBA_STATUS_ALARM
P0526ENa

FIGURE 123 - COMPLEMENTARY OF 52a/52b IS LONG ENOUGH FOR GETTING THE ALARM

INP_52a_A

CBA_A

CBA_STATUS_ALARM
P0527ENa

FIGURE 124 - WITH ONE OPTO 52a- POLE DEAD LOGIC

INP_52b_A

CBA_A

CBA_STATUS_ALARM
P0528ENa

FIGURE 125 - WITH ONE OPTO 52b – POLE DEAD LOGIC


4.12.2 Inputs / outputs DDB for CB logic:
4.12.2.1 Inputs

External TripA
External TripB
External TripC
From External Protection Devices (via Opto Inputs)- see General trip logic Figure 106.
If these optos inputs are assigned as External Trip A, External Trip B and External Trip C
– their change will update the CB Operation counter.
(External trip is integrated in the DDB: Any Trip.No Dwell timer is associated as for an
internal trip. (see Figure 106: trip logic)
P44x/EN AP/F65 Application Notes

Page 226/286 MiCOM P441/P442 & P444

CB aux A(52a)
CB aux B(52a)
CB aux C(52a)
CB aux A(52b)
CB aux B(52b)
CB aux C(52b)
The DDB CB Aux if assigned to an opto input in the PSL and when energized, will be used
for Any pole dead & All pole dead internal logic & Discrepency logic

CB Discrepancy
Used for internal CBA_Disc issued by external (opto) or internal detection (CB Aux)
4.12.2.2 Outputs

CB Status Alarm
Picks up when CB Discrepancy status is detected after CBA timer issued externally by opto
or internally by CB Aux

CB aux A
CB aux B
CB aux C
Pole A+B+C detected Dead pole by internal logic or CB status

Any Pole Dead


The DDB Any Pole Dead if assigned in the PSL, indicates that one or more poles is open

All Pole Dead


The DDB All Pole Dead if assigned in the PSL, indicates that all pole are dead (All 3 poles
are open)
4.12.2.3 Optos: Dual hysteresis and filter removed or not (“Opto config” menu)
Since version C2.x
The MiCOM P44x is fitted with universal opto isolated logic inputs that can be programmed
for the nominal battery voltage of the circuit of which they are a part i.e. thereby allowing
different voltages for different circuits e.g. signalling, tripping. They can also be programmed
as Standard 60% - 80% or 50% - 70% to satisfy different operating constraints (Dual Opto).
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 227/286

Threshold levels are as follows:

Nominal Standard 60% - 80% 50% - 70%


Battery No Operation (logic Operation (logic 1) No Operation (logic Operation (logic 1)
Voltage (Vdc) 0) Vdc Vdc 0) Vdc Vdc
24 / 27 <16.2 >19.2 <12.0 >16.8
30 / 34 <20.4 >24.0 <15.0 >21.0
48 / 54 <32.4 >38.4 <24.0 >33.6
110 / 125 <75.0 >88.0 <55.0 >77.0
220 / 250 <150.0 >176.0 <110 >154

TABLE 19
This lower value eliminates fleeting pickups that may occur during a battery earth fault, when
stray capacitance may present up to 50% of battery voltage across an input.
Each input also has selectable filtering which can be utilised. This allows use of a pre-set
filter of ½ cycle which renders the input immune to induced noise on the wiring: although this
method is secure it can be slow, particularly for intertripping. This can be improved by
switching off the ½ cycle filter in which case one of the following methods to reduce ac noise
should be considered. The first method is to use double pole switching on the input, the
second is to use screened twisted cable on the input circuit.
P44x/EN AP/F65 Application Notes

Page 228/286 MiCOM P441/P442 & P444

5. PROGRAMMABLE SCHEME LOGIC DEFAULT SETTINGS


The relay includes programmable scheme logic (PSL)- one PSL by Group of settings
enabled (maximum 4 groups of PSLogic can be assigned in the relay)
The purpose of this logic is multi-functional and includes the following:

• Enables the mapping of opto-isolated inputs, relay output contacts and the
programmable LED’s.

• Provides relay output conditioning (delay on pick-up/drop-off, dwell time, latching or


self-reset).

• Fault Recorder start mapping, i.e. which internal signals initiate a fault record.

• Enables customer specific scheme logic to be generated through the use of the PSL
editor inbuilt into the MiCOM S1 support software.
Further information regarding editing and the use of PSL can be found in the MiCOM S1
user manual. The following section details the default settings of the PSL. Note that
changes to these defaults can only be carried out using the PSL editor and not via the relay
front-plate.
5.1 HOW TO USE PSL Editor?
OFF Line method:

− Open first the application free software delivered with the relay: MiCOM S1 (can be
also downloaded from the web)

− Open the PSL Editor part.

− Open a blancking scheme or a default scheme with the good model number
(File\New\Default Scheme or Blanck Scheme)

Selection of type of relay & model number is done in that window (Version software is
displayed for compatibility ) – Italian is available with model ?40X?
ON Line method:

− Communication with the relay can be started


(Device\open connection\address1\pword AAAA) and the PSL activated in the internal
logic of the relay can be extracted, displayed, modified and loaded again in the
protection.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 229/286

− Any group from 1 to 4 can be modified (ref of group must be validated before
resenting the file from PC to relay)

Before creating a dedicated PSL for covering customized application ; please refer to the
DDB description cell by cell (conditions of set & reset) in the table included in the annex A at
the end of that technical guide.
Some additive cells can be present regarding the type of model used by the software
embedded in the relay.

Software Version Model N°


A2.11 04A
A3.3 06A – 06B
A4.8 07A – 07B
B1.6 09C
C1.1 020G – 020H
C2.6 030G – 030H – 030J

The type of model used by the relay in the settings or PSL is displayed in the bottom of your
screen by that line:

and will inform about the:

− Model number used (last 2 digits:???07??)


− PSL activated for the logic of Group1
− Number of timers still available (15 on a total of 16)
− Number of contacts still available (7 on a total of 21 for P442 model)
− Number of leds still available (0 on 8 – if all already assigned in the PSL)
− Memory Capacity still available (decrease with the numbers of cells & logical gates
linked in the dedicated PSL)
(See also the section commissioning for deeper tools explanations)
P44x/EN AP/F65 Application Notes

Page 230/286 MiCOM P441/P442 & P444

5.2 Logic input mapping


The default mappings for each of the opto-isolated inputs are as shown in the following table:

− Version A: Optos are in 48VDC polarised (can be energised with the internal field
voltage offered by the relay (–J7/J9-J8/J10 in a P441)

− Version B: Optos are universal and opto range can be selected in MiCOM S1 by:
Opto A - 48VDC:
The opto inputs are specified to operate between 30 and 60V to ensure there is enough
current flowing through the opto diode to guarantee operation with component tolerances,
temperature and CTR degradation over time.
Between 13-29V is the uncertainty band.
Below 12V, logical status is guaranteed Off
Opto B – Universal opto inputs:

Setting Guaranteed No Operation Guaranteed Operation


24/27 <16,2 >19,2
30/34 <20,4 >24,0
48/54 <32,4 >38,4
110/125 <75,0 >88,0
220/250 <150 >176,0

These margins ensure that ground faults on substation batteries do not create mal-operation
of the opto inputs.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 231/286

Or “Custom” can be selected in the menu to offer the possibility to adjust a different voltage
pick-up for any optos inputs:
P44x/EN AP/F65 Application Notes

Page 232/286 MiCOM P441/P442 & P444

Opto
Input P441 Relay P442 Relay P444 Relay

1 Channel Receive (Distance Channel Receive (Distance Channel Receive (Distance
or DEF) or DEF) or DEF)
2 Channel out of Service Channel out of Service Channel out of Service
(Distance or DEF) (Distance or DEF) (Distance or DEF)
3 MCB/VTS Line MCB/VTS Line MCB/VTS Line
(Z measurement-Dist) (Z measurement-Dist) (Z measurement-Dist)
4 Block Block Block
Autoreclose(LockOut) Autoreclose(LockOut) Autoreclose(LockOut)
5 Circuit Breaker Healthy Circuit Breaker Healthy Circuit Breaker Healthy
6 Circuit breaker Manual Circuit breaker Manual Circuit breaker Manual
Close external order Close external order Close external order
7 Reset Lockout Reset Lockout Reset Lockout
8 Disable Autoreclose (1pole Disable Autoreclose (1- Disable Autoreclose (1-
and 3poles) pole and 3poles) pole and 3poles)
9 Not allocated Not allocated
10 Not allocated Not allocated
11 Not allocated Not allocated
12 Not allocated Not allocated
13 Not allocated Not allocated
14 Not allocated Not allocated
15 Not allocated Not allocated
16 Not allocated Not allocated
17 Not allocated
18 Not allocated
19 Not allocated
20 Not allocated
21 Not allocated
22 Not allocated
23 Not allocated
24 Not allocated
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 233/286

5.3 Relay output contact mapping


The default mappings for each of the relay output contacts are as shown in the following
table (PSL are equivalent for P441/442/444):-

Relay
Contact P441 Relay P442 Relay P444 Relay

1 TripA+B+C & Z1 TripA+B+C & Z1 TripA+B+C & Z1
2 Any Trip Phase A Any Trip Phase A Any Trip Phase A
3 Any Trip Phase B Any Trip Phase B Any Trip Phase B
4 Any Trip Phase C AnyTrip Phase C Any Trip Phase C
5 Signal send (Dist. or DEF) Signal send (Dist. or DEF) Signal send (Dist. or DEF)
6 Any Protection Start Any Protection Start Any Protection Start
7 Any Trip Any Trip Any Trip
8 General Alarm General Alarm General Alarm
9 DEF A+B+C Trip DEF A+B+C Trip DEF A+B+C Trip
+ IN>1Trip + IN>1Trip + IN>1Trip
+ IN>2Trip + IN>2Trip + IN>2Trip
10 Dist. Trip &Any Dist. Trip &Any Dist. Trip &Any
Zone&DistUnb CR Zone&DistUnb CR Zone&DistUnb CR
11 Autoreclose lockout Autoreclose lockout Autoreclose lockout
12 Autoreclose 1P+3P cycle Autoreclose 1P+3P cycle Autoreclose 1P+3P cycle
in progress in progress in progress
13 A/R Close A/R Close A/R Close
14 Power Swing Detected Power Swing Detected Power Swing Detected
15 Not allocated Not allocated
16 Not allocated Not allocated
17 Not allocated Not allocated
18 Not allocated Not allocated
19 Not allocated Not allocated
20 Not allocated Not allocated
21 Not allocated Not allocated
22 Not allocated Not allocated
23 Not allocated
24 Not allocated
25 Not allocated
26 Not allocated
27 Not allocated
28 Not allocated
29 Not allocated
30 Not allocated
31 Not allocated
32 Not allocated

Note that when 3 pole tripping is selected in the relay menu, all trip contacts: Trip A, Trip B,
Trip C, and Any Trip close simultaneously.
P44x/EN AP/F65 Application Notes

Page 234/286 MiCOM P441/P442 & P444

5.4 Relay output conditioning


The default conditioning for each of the relay output contacts are as shown in the following
table:

Relay
Contact P441 Relay P442 Relay P444 Relay

1 Straight Straight Straight
2 Straight Straight Straight
3 Straight Straight Straight
4 Straight Straight Straight
5 Straight Straight Straight
6 Straight Straight Straight
7 Straight Straight Straight
8 Straight Straight Straight
9 Straight Straight Straight
10 Straight Straight Straight
11 Straight Straight Straight
12 Straight Straight Straight
13 Straight Straight Straight
14 Straight Straight Straight
15 Not allocated Not allocated
16 Not allocated Not allocated
17 Not allocated Not allocated
18 Not allocated Not allocated
19 Not allocated Not allocated
20 Not allocated Not allocated
21 Not allocated Not allocated
22 Not allocated Not allocated
23 Not allocated
24 Not allocated
25 Not allocated
26 Not allocated
27 Not allocated
28 Not allocated
29 Not allocated
30 Not allocated
31 Not allocated
32 Not allocated
NOTE: Others conditions of relays logic are available in the relays design by
PSL.
Pulse Timer
Pick UP/Drop Off Timer
Dwell Timer
Pick Up Timer
Drop Off Timer
Latching
Straight (Transparent)
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 235/286

Input
Output Pulse setting
Pulse Timer Input
Output Pulse setting

Input

Pick Up/ Output Tp setting Td setting

Drop Off Timer Input


Output Tp setting Td setting

Input

Output Timer setting

Dwell Timer Input

Output Timer setting

Input
Timer setting
Output
Pick Up Timer Input
Timer setting
Output

Input

Output Timer setting

Drop Off Timer Input


Timer setting
Output

P0562ENa

FIGURE 126 – TIMER DEFINITION IN PSL


P44x/EN AP/F65 Application Notes

Page 236/286 MiCOM P441/P442 & P444

5.5 Programmable LED output mapping


The default mappings for each of the programmable LED’s are as shown in the following
table:-

LED P441 Relay P442 Relay P444 Relay


No.
1 Any Trip A Any Trip A Any Trip A
2 Any Trip B AnyTrip B Any Trip B
3 Any Trip C AnyTrip C Any Trip C
4 Any Start Any Start Any Start
5 Z1+Aided Trip Z1+Aided Trip Z1+Aided Trip
6 Dist FWd Dist Fwd Dist Fwd
7 Dist Rev Dist Rev Dist Rev
8 A/R Enable A/R Enable A/R Enable

NOTE: All the Leds are latched in the default PSL


5.6 Fault recorder trigger
The default PSL trigger which initiates a fault record is as shown in the following table:-

P441 Relay P442 Relay P444 Relay


Any Start Any Start Any Start
Any Trip Any Trip Any Trip

FIGURE 127
If the fault recorder trigger is not assigned in the PSL, no Fault recorder can be initiated and
displayed in the list by the LCD front panel.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 237/286

6. CURRENT TRANSFORMER REQUIREMENTS


Two calculations must be performed – once for the three phase fault current at the zone 1
reach, and once for earth (ground) faults. The highest of the two calculated Vk voltages must
be used:
6.1 CT Knee Point Voltage for Phase Fault Distance Protection

Vk ≥ KRPA x IF Z1 x (1+ X/R) . (RCT + RL)


Where:
Vk = Required CT knee point voltage (volts),
KRPA = Fixed dimensioning factor = always 0.6
IF Z1 = Max. secondary phase fault current at Zone 1 reach point (A),
X/R = Primary system reactance / resistance ratio,
RCT = CT secondary winding resistance (Ω),
RL = Single lead resistance from CT to relay (Ω).
6.2 CT Knee Point Voltage for Earth Fault Distance Protection

Vk ≥ KRPA x IFe Z1 x (1+ Xe/Re) . (RCT + 2RL)


Where:
KRPA = Fixed dimensioning factor = always 0.6
IFe Z1 = Max. secondary earth fault current at Zone 1 reach point (A),
Xe/Re = Primary system reactance / resistance ratio for earth loop.
6.3 Recommended CT classes (British and IEC)
Class X current transformers with a knee point voltage greater or equal than that calculated
can be used.
Class 5P protection CTs can be used, noting that the knee point voltage equivalent these
offer can be approximated from:
Vk = (VA x ALF) / In + (RCT x ALF x In)
Where:
VA = Voltampere burden rating,
ALF = Accuracy Limit Factor,
In = CT nominal secondary current.
6.4 Determining Vk for an IEEE “C" class CT
Where American/IEEE standards are used to specify CTs, the C class voltage rating can be
checked to determine the equivalent Vk (knee point voltage according to IEC). The
equivalence formula is:
Vk = [ (C rating in volts) x 1.05 ] + [ 100 x RCT ]
P44x/EN AP/F65 Application Notes

Page 238/286 MiCOM P441/P442 & P444

7. NEW ADDITIONNAL FUNCTIONS – VERSION C2.X (MODEL 030G/H/J)


7.1 Hardware new features

− Integration of the new CPU board at 150 MHz

− Optional fast static outputs (selected by Cortec code)

− Optional 46 outputs in P444-model 20H/ 30H

− Integration of Dual optos with/without filter

− Integration of InterMiCOM

− Integration of Ethernet board with UCA2 protocol (61850 -8-1 available soon)

NEW FEATURES HARD & SOFT SINCE VERSION C2.X


7.2 Function Improved: Distance

− Addition of a settable time delay to prevent maloperation due to zone evolution from
zone n to zone n-1 by CB operation

− Addition of a tilt characteristic for zone 1 (independent setting for phase-to-ground and
phase-to-phase). Settable between ± 45°
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 239/286

− Addition of a tilt characteristic for zone 2 and zone P (common setting for phase-to-
ground and phase-to-phase/Z2 and Zp). Settable between ± 45°

− New DDB:
7.3 New Function Description: OUT OF STEP & STABLE SWING improved
An out of step function has been integrated in the firmware.That logic manage the start of the
OOS by the monitoring of the sign of the biphase loops:

∆X
Zone C
X lim
Z3 ∆R

Zone A
Zone B +R
-R
Out Of Step +R Stable swing
-R lim R lim
R
Z4 -X lim
+R
P0885ENa

For additive details check the section 4.7 of HW Chapter and 2.13.5 of that AP chapter.
New settings (Delta I) have been created also in Power swing (stable swing) with Delta I as a
criteria for unblocking the Pswing logic in case of 3 phase fault (see 2.13.2 in the AP
chapter).
Phase selection has been improved with exaggerated Deltas current (See 2.13.2 of AP
Chapter).
P44x/EN AP/F65 Application Notes

Page 240/286 MiCOM P441/P442 & P444

− New DDB:
7.4 Function Improved: DEF
Some improvements have been integrated in DEF function (see HW section 4.9 and AP
section 2.18.3)

New settings are:


7.5 New Function Description: SBEF with IN>3 &IN>4
Two new thresholds of IN have been added (see AP section 2.17)

New DDB cells:


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 241/286

7.6 New Function Description: THERMAL OVERLOAD


A new thermal overload (with 2 time constant) function has been created as in the other
transmission protection of the MiCOM Range, which offer alarm & trip (see section 1.2.1)

New DDB cells:

Thermal overload protection can be used to prevent electrical plant from operating at
temperatures in excess of the designed maximum withstand. Prolonged overloading causes
excessive heating, which may result in premature ageing of the insulation, or in extreme
cases, insulation failure.
The relay incorporates a current based thermal replica, using load current to model heating
and cooling of the protected plant. The element can be set with both alarm and trip stages.
The heat generated within an item of plant, such as a cable or a transformer, is the resistive
loss (Ι2R x t). Thus, heating is directly proportional to current squared. The thermal time
characteristic used in the relay is therefore based on current squared, integrated over time.
The relay automatically uses the largest phase current for input to the thermal model.
Equipment is designed to operate continuously at a temperature corresponding to its full load
rating, where heat generated is balanced with heat dissipated by radiation etc. Over
temperature conditions therefore occur when currents in excess of rating are allowed to flow
for a period of time. It can be shown that temperatures during heating follow exponential time
constants and a similar exponential decrease of temperature occurs during cooling.
P44x/EN AP/F65 Application Notes

Page 242/286 MiCOM P441/P442 & P444

7.6.1 Single time constant characteristic


This characteristic is the recommended typical setting for line and cable protection.
The thermal time characteristic is given by:

exp(-t/τ) = (Ι2 - (k.ΙFLC)2) / (Ι2 - ΙP2)


Where:

t = Time to trip, following application of the overload current, Ι;


τ = Heating and cooling time constant of the protected plant;
Ι = Largest phase current;
ΙFLC = Full load current rating (relay setting ‘Thermal Trip’);
k = 1.05 constant, allows continuous operation up to < 1.05 ΙFLC.
ΙP = Steady state pre-loading before application of the overload.
The time to trip varies depending on the load current carried before application of the
overload, i.e. whether the overload was applied from «hot» or «cold».
7.6.2 Dual time constant characteristic (Typically not applied for MiCOMho P443)
This characteristic is used to protect oil-filled transformers with natural air cooling (e.g. type
ONAN). The thermal model is similar to that with the single time constant, except that two
time constants must be set. The thermal curve is defined as:

0.4 exp(-t/τ1) + 0.6 exp(-t/τ2) = (Ι2 - (k.ΙFLC)2) / (Ι2 - ΙP2)


Where:

τ1 = Heating and cooling time constant of the transformer windings;


τ2 = Heating and cooling time constant for the insulating oil.
For marginal overloading, heat will flow from the windings into the bulk of the insulating oil.
Thus, at low current, the replica curve is dominated by the long time constant for the oil.
This provides protection against a general rise in oil temperature.
For severe overloading, heat accumulates in the transformer windings, with little opportunity
for dissipation into the surrounding insulating oil. Thus, at high current, the replica curve is
dominated by the short time constant for the windings. This provides protection against hot
spots developing within the transformer windings.
Overall, the dual time constant characteristic provided within the relay serves to protect the
winding insulation from ageing, and to minimise gas production by overheated oil. Note,
however, that the thermal model does not compensate for the effects of ambient temperature
change.
The following table shows the menu settings for the thermal protection element:

Setting range
Menu text Default setting Step size
Min Max
Thermal Char Single Disabled, Single, Dual
Thermal Trip 1Ιn 0.08Ιn 3.2Ιn 0.01Ιn
Thermal Alarm 70% 50% 100% 1%
Time Constant 1 10 minutes 1 minutes 200 minutes 1 minutes
Time Constant 2 5 minutes 1 minutes 200 minutes 1 minutes
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 243/286

THERMAL PROTECTION MENU SETTINGS


The thermal protection also provides an indication of the thermal state in the measurement
column of the relay. The thermal state can be reset by either an opto input (if assigned to this
function using the programmable scheme logic) or the relay menu, for example to reset after
injection testing. The reset function in the menu is found in the measurement column with the
thermal state.
7.6.3 Setting guidelines
7.6.3.1 Single time constant characteristic
The current setting is calculated as:
Thermal Trip = Permissible continuous loading of the plant item/CT ratio.
Typical time constant values are given in the following table.
The relay setting, ‘Time Constant 1’, is in minutes.

Time constant τ (minutes) Limits


Air-core reactors 40
Capacitor banks 10
Overhead lines 10 Cross section ≥ 100 mm2
Cu or 150mm2 Al
Cables 60 - 90 Typical, at 66kV and above
Busbars 60

TYPICAL PROTECTED PLANT THERMAL TIME CONSTANTS


An alarm can be raised on reaching a thermal state corresponding to a percentage of the trip
threshold. A typical setting might be ‘Thermal Trip’ = 70% of thermal capacity.
7.6.3.2 Dual time constant characteristic
The current setting is calculated as:
Thermal Trip = Permissible continuous loading of the transformer / CT ratio.
Typical time constants:

τ1 (minutes) τ2 (minutes) Limits


Oil-filled transformer 5 120 Rating 400 - 1600 kVA

An alarm can be raised on reaching a thermal state corresponding to a percentage of the trip
threshold. A typical setting might be ‘Thermal Alarm’ = 70% of thermal capacity.
Note that the thermal time constants given in the above tables are typical only. Reference
should always be made to the plant manufacturer for accurate information.
P44x/EN AP/F65 Application Notes

Page 244/286 MiCOM P441/P442 & P444

7.7 New Function Description: PAP (RTE feature)


That new function is based on a RTE specification with a dedicated application equivalent to
a customised weak infeed.
The settings are above:

New Outputs DDB cells:

New Inputs DDB cells:


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 245/286

7.8 New Elements: Miscellaneous features


7.8.1 HOTKEYS / Control input

The 2 Hotkeys in the front panel can perform a direct command if a dedicated PSL has been
previously created using “CONTROL INPUT” cell. In total the MiCOM P440 offers 32 control
inputs which can be activated by the Hotkey manually or by the IEC 103 remote
communication (if that option has been flashed with the firmware of the relay (see also cortec
code)):

The control input can be linked to any DDB cell as: led, relay , internal logic cell (that can be
useful during test & commissioning) - Different condition can be managed for the command
as:

And also the text for passing the command can be selected between:
P44x/EN AP/F65 Application Notes

Page 246/286 MiCOM P441/P442 & P444

The labels of the control inputs can be fulfilled by the user (text label customised)
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 247/286

The digits in this table allow to provide filtering on selected DDB cells (changed from 1 to 0),
to avoid the transfer of these special cells to a remote station connected to the relay with IEC
103 protocol. It gives the opportunity to filter the not pertinent data.
P44x/EN AP/F65 Application Notes

Page 248/286 MiCOM P441/P442 & P444

7.8.2 Optos: Dual hysteresis and filter removed or not


The MiCOM P44x is fitted with universal opto isolated logic inputs that can be programmed
for the nominal battery voltage of the circuit of which they are a part i.e. thereby allowing
different voltages for different circuits e.g. signalling, tripping. They can also be programmed
as Standard 60% - 80% or 50% - 70% to satisfy different operating constraints (Dual Opto).
Threshold levels are as follows:

Nominal Standard 60% - 80% 50% - 70%


Battery No Operation (logic Operation (logic 1) No Operation (logic Operation (logic 1)
Voltage (Vdc) 0) Vdc Vdc 0) Vdc Vdc
24 / 27 <16.2 >19.2 <12.0 >16.8
30 / 34 <20.4 >24.0 <15.0 >21.0
48 / 54 <32.4 >38.4 <24.0 >33.6
110 / 125 <75.0 >88.0 <55.0 >77.0
220 / 250 <150.0 >176.0 <110 >154

TABLE 20
This lower value eliminates fleeting pickups that may occur during a battery earth fault, when
stray capacitance may present up to 50% of battery voltage across an input.
Each input also has selectable filtering which can be utilised. This allows use of a pre-set
filter of ½ cycle which renders the input immune to induced noise on the wiring: although this
method is secure it can be slow, particularly for intertripping. This can be improved by
switching off the ½ cycle filter in which case one of the following methods to reduce ac noise
should be considered. The first method is to use double pole switching on the input, the
second is to use screened twisted cable on the input circuit.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 249/286

7.9 New Elements: PSL features


7.9.1 DDB Cells:
New DDB cells have been added – See the GC chapter
INPUTS DDB:

OUTPUTS DDB:
P44x/EN AP/F65 Application Notes

Page 250/286 MiCOM P441/P442 & P444

7.9.2 New Tools in S1 & PSL: Toolbar and Commands


Standard tools

Blank Scheme

Create a blank scheme based on a relay model.

Default Configuration

Create a default scheme based on a relay model.

Open

Open an existing diagram.

Save

Save the active diagram.

Print

Display the Windows Print dialog, enabling you to print the current diagram.

Undo

Undo the last action.

Redo

Redo the previously undone action.

Redraw

Redraw the diagram.

Number of DDBs

Display the DDB numbers of the links.

Calculate CRC
Calculate unique number based on both the function and layout of the logic.

Compare Files
Compare current file with another stored on disk.

Select

Enable the select function. While this button is active, the mouse pointer is displayed as an
arrow. This is the default mouse pointer. It is sometimes referred to as the selection pointer.
Point to a component and click the left mouse button to select it. Several components may
be selected by clicking the left mouse button on the diagram and dragging the pointer to
create a rectangular selection area.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 251/286

Zoom and pan tools

Zoom In

Increases the Zoom magnification by 25%.

Zoom Out

Decreases the Zoom magnification by 25%.

Zoom

Enable the zoom function. While this button is active, the mouse pointer is displayed as a
magnifying glass. Right-clicking will zoom out and left-clicking will zoom in. Press the ESC
key to return to the selection pointer. Click and drag to zoom in to an area.

Zoom to Fit

Display at the highest magnification that will show all the diagram’s components.

Zoom to Selection

Display at the highest magnification that will show the selected component(s).

Pan

Enable the pan function. While this button is active, the mouse pointer is displayed as a
hand. Hold down the left mouse button and drag the pointer across the diagram to pan.
Press the ESC key to return to the selection pointer.
Logic symbols

This toolbar provides icons to place each type of logic element into the scheme diagram. Not
all elements are available in all devices. Icons will only be displayed for those elements
available in the selected device.

Link

Create a Link between two logic symbols.

Opto Signal

Create an Opto Signal.

Input Signal

Create an Input Signal.

Output Signal

Create an Output Signal.

GOOSE in
Create an input signal to logic to receive a GOOSE message transmitted from another IED.
Used in either UCA2.0 or IEC 61850 GOOSE applications only.
P44x/EN AP/F65 Application Notes

Page 252/286 MiCOM P441/P442 & P444

GOOSE out
Create an output signal from logic to transmit a GOOSE message to another IED. Used in
either UCA2.0 or IEC 61850 GOOSE applications only.

Integral Tripping in
Create an input signal to logic that receives an InterMiCOM message transmitted from
another IED.

Integral Tripping out


Create an output signal from logic that transmits an InterMiCOM message to another IED.

Control in
Create an input signal to logic that can be operated from an external command.

Function Key
Create a Function Key input signal.

Trigger Signal
Create a Fault Record Trigger.

LED Signal or

Create an LED Signal. Icon shown is dependent upon capability of LED’s i.e. mono-colour or
tri-colour.

Contact Signal

Create a Contact Signal.

LED Conditioner or
Create an LED Conditioner. Icon shown is dependent upon capability of LED’s i.e. mono-
colour or tri-colour.

Contact Conditioner

Create a Contact Conditioner.

Timer

Create a Timer.

AND Gate
Create an AND Gate.

OR Gate

Create an OR Gate.

Programmable Gate

Create a Programmable Gate.


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MiCOM P441/P442 & P444 Page 253/286

Alignment tools

Align Top

Align all selected components so the top of each is level with the others.

Align Middle

Align all selected components so the middle of each is level with the others.

Align Bottom

Align all selected components so the bottom of each is level with the others.

Align Left

Align all selected components so the leftmost point of each is level with the others.

Align Centre

Align all selected components so the centre of each is level with the others.

Align Right

Align all selected components so the rightmost point of each is level with the others.
Drawing tools

Rectangle

When selected, move the mouse pointer to where you want one of the corners to be, hold
down the left mouse button and move it to where you want the diagonally opposite corner to
be. Release the button. To draw a square hold down the SHIFT key to ensure height and
width remain the same.

Ellipse

When selected, move the mouse pointer to where you want one of the corners to be, hold
down the left mouse button and move until the ellipse is the size you want it to be. Release
the button. To draw a circle hold down the SHIFT key to ensure height and width remain the
same.

Line

When selected, move the mouse pointer to where you want the line to start, hold down left
mouse, move to the position of the end of the line and release button. To draw horizontal or
vertical lines only hold down the SHIFT key.

Polyline

When selected, move the mouse pointer to where you want the polyline to start and click the
left mouse button. Now move to the next point on the line and click the left button. Double
click to indicate the final point in the polyline.
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Curve

When selected, move the mouse pointer to where you want the polycurve to start and click
the left mouse button. Each time you click the button after this a line will be drawn, each line
bisects its associated curve. Double click to end. The straight lines will disappear leaving the
polycurve. Note: whilst drawing the lines associated with the polycurve, a curve will not be
displayed until either three lines in succession have been drawn or the polycurve line is
complete.

Text

When selected, move the mouse pointer to where you want the text to begin and click the
left mouse button. To change the font, size or colour, or text attributes select Properties from
the right mouse button menu.

Image

When selected, the Open dialog is displayed, enabling you to select a bitmap or icon file.
Click Open, position the mouse pointer where you want the image to be and click the left
mouse button.
Nudge tools

The nudge tool buttons enable you to shift a selected component a single unit in the selected
direction, or five pixels if the SHIFT key is held down.
As well as using the tool buttons, single unit nudge actions on the selected components can
be achieved using the arrow keys on the keyboard.

Nudge Up

Shift the selected component(s) upwards by one unit. Holding down the SHIFT key while
clicking on this button will shift the component five units upwards.

Nudge Down

Shift the selected component(s) downwards by one unit. Holding down the SHIFT key while
clicking on this button will shift the component five units downwards.

Nudge Left

Shift the selected component(s) to the left by one unit. Holding down the SHIFT key while
clicking on this button will shift the component five units to the left.

Nudge Right

Shift the selected component(s) to the right by one unit. Holding down the SHIFT key while
clicking on this button will shift the component five units to the right.
Rotation tools

Free Rotate

Enable the rotation function. While rotation is active components may be rotated as required.
Press the ESC key or click on the diagram to disable the function.

Rotate Left

Rotate the selected component 90 degrees to the left.


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 255/286

Rotate Right

Rotate the selected component 90 degrees to the right.

Flip Horizontal

Flip the component horizontally.

Flip Vertical

Flip the component vertically.


Structure tools

The structure toolbar enables you to change the stacking order of components.

Bring to Front

Bring the selected components in front of all other components.

Send to Back

Bring the selected components behind all other components.

Bring Forward

Bring the selected component forward one layer.

Send Backward

Send the selected component backwards one layer.


7.9.3 MiCOM Px40 GOOSE editor

To access to Px40 GOOSE Editor menu click on


The implementation of UCA2.0 Generic Object Orientated Substation Events (GOOSE) sets
the way for cheaper and faster inter-relay communications. UCA2.0 GOOSE is based upon
the principle of reporting the state of a selection of binary (i.e. ON or OFF) signals to other
devices. In the case of Px40 relays, these binary signals are derived from the Programmable
Scheme Logic Digital Data Bus signals. UCA2.0 GOOSE messages are event-driven. When
a monitored point changes state, e.g. from logic 0 to logic 1, a new message is sent.
GOOSE Editor enables you to connect to any UCA 2.0 MiCOM Px40 device via the Courier
front port, retrieve and edit its GOOSE settings and send the modified file back to a MiCOM
Px40 device.
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Menu and Toolbar


The menu functions
The main functions available within the Px40 GOOSE Editor menu are:

• File

• Edit

• View

• Device
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 257/286

File menu

Open…
Displays the Open file dialogue box, enabling you to locate and open an existing GOOSE
configuration file.
Save
Save the current file.
Save As…
Save the current file with a new name or in a new location.
Print…
Print the current GOOSE configuration file.
Print Preview
Preview the hardcopy output with the current print setup.
Print Setup…
Display the Windows Print Setup dialogue box allowing modification of the printer settings.
Exit
Quit the application.
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Edit menu

Rename…
Rename the selected IED.
New Enrolled IED…
Add a new IED to the GOOSE configuration.
New Virtual Input…
Add a new Virtual Input to the GOOSE In mapping configuration.
New Mapping…
Add a new bit-pair to the Virtual Input logic.
Delete Enrolled IED
Remove an existing IED from the GOOSE configuration.
Delete Virtual Input
Delete the selected Virtual Input from the GOOSE In mapping configuration.
Delete Mapping
Remove a mapped bit-pair from the Virtual Input logic.
Reset Bitpair
Remove current configuration from selected bit-pair.
Delete All
Delete all mappings, enrolled IED’s and Virtual Inputs from the current GOOSE configuration
file.
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View menu

Toolbar
Show/hide the toolbar.
Status Bar
Show/hide the status bar.
Properties…
Show associated properties for the selected item.
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Device menu

Open Connection
Display the Establish Connection dialog, enabling you to send and receive data from the
connected relay.
Close Connection
Closes active connection to a relay.
Send to Relay
Send the open GOOSE configuration file to the connected relay.
Receive from Relay
Extract the current GOOSE configuration from the connected relay.
Communications Setup
Displays the Local Communication Settings dialogue box, enabling you to select or configure
the communication settings.
The toolbar

Open
Opens an existing GOOSE configuration file.

Save
Save the active document.

Print
Display the Print Options dialog, enabling you to print the current configuration.

View Properties
Show associated properties for the selected item.
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MiCOM P441/P442 & P444 Page 261/286

How to Use the GOOSE Editor


The main functions available within the GOOSE Editor module are:

• Retrieve GOOSE configuration settings from an IED

• Configure GOOSE settings

• Send GOOSE configuration settings to an IED

• Save IED GOOSE setting files

• Print IED GOOSE setting files


Retrieve GOOSE configuration settings from an IED
Open a connection to the required device by selecting Open Connection from the Device
menu. Refer to Section 2.1.1.6 & 2.1.1.7 for details on configuring the IED communication
settings.
Enter the device address in the Establish Connection dialogue box.
Enter the relay password.
Extract the current GOOSE configuration settings from the device by selecting Receive from
Relay from the Device menu.
7.9.3.1 Configure GOOSE settings
The GOOSE Scheme Logic editor is used to enrol devices and also to provide support for
mapping the Digital Data Bus signals (from the Programmable Scheme Logic) onto the
UCA2.0 GOOSE bit-pairs.
If the relay is interested in data from other UCA2.0 GOOSE devices, their "Sending IED"
names are added as ’enrolled’ devices within the GOOSE Scheme Logic. The GOOSE
Scheme Logic editor then allows the mapping of incoming UCA2.0 GOOSE message bit-
pairs onto Digital Data Bus signals for use within the Programmable Scheme Logic.
UCA2.0 GOOSE is normally disabled in the MiCOM Px40 products and is enabled by
downloading a GOOSE Scheme Logic file that is customised.
7.9.3.2 Device naming
Each UCA2.0 GOOSE enabled device on the network transmits messages using a unique
"Sending IED" name.
Select Rename from the Edit menu to assign the "Sending IED" name to the device.
7.9.3.3 Enrolling IED’s
Enrolling a UCA2.0 GOOSE device is done through the Px40s GOOSE Scheme Logic. If a
relay is interested in receiving data from a device, the "Sending IED" name is simply added
to the relays list of ’interested devices’.
Select New Enrolled IED from the Edit menu and enter the GOOSE IED name (or "Sending
IED" name) of the new device.
Enrolled IED’s have GOOSE In settings containing DNA (Dynamic Network Announcement)
and User Status bit-pairs. These input signals can be configured to be passed directly
through to the Virtual Input gates or be set to a forced or default state before processing by
the Virtual Input logic.
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The signals in the GOOSE In settings of enrolled IED’s are mapped to Virtual Inputs by
selecting New Mapping from the Edit menu. Refer to section below for use of these signals
in logic.
7.9.3.4 GOOSE In settings
Virtual inputs
The GOOSE Scheme Logic interfaces with the Programmable Scheme Logic by means of
32 Virtual Inputs. The Virtual Inputs are then used in much the same way as the Opto Input
signals.
The logic that drives each of the Virtual Inputs is contained within the relay’s GOOSE
Scheme Logic file. It is possible to map any number of bit-pairs, from any enrolled device,
using logic gates onto a Virtual Input.

The following gate types are supported within the GOOSE Scheme Logic:

Gate Type Operation


The GOOSE Virtual Input will only be logic 1 (i.e. ON) when all bit-
AND
pairs match the desired state.
The GOOSE Virtual Input will be logic 1 (i.e. ON) when any bit-pair
OR
matches its desired state.
The GOOSE Virtual Input will only be logic 1 (i.e. ON) when the
PROGRAMMABLE
majority of the bit-pairs match their desired state.

To add a Virtual Input to the GOOSE logic configuration, select New Virtual Input from the
Edit menu and configure the input number. If required, the gate type can be changed once
input mapping to the Virtual Input has been made.
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MiCOM P441/P442 & P444 Page 263/286

Mapping
GOOSE In signals from enrolled IED’s are mapped to logic gates by selection of the required
bit-pair from either the DNA or User Status section of the inputs.

The value required for a logic 1 or ON state is specified in the State box. The input can be
inverted by checking Input Inversion (equivalent to a NOT input to the logic gate).
GOOSE Out settings
The structure of information transmitted via UCA2.0 GOOSE is defined by the ’Protection
Action’ (PACT) common class template, defined by GOMFSE (Generic Object Models for
Substation and Feeder Equipment).
A UCA2.0 GOOSE message transmitted by a Px40 relay can carry up to 96 Digital Data Bus
signals, where the monitored signals are characterised by a two-bit status value, or "bit-pair".
The value transmitted in the bit-pair is customisable although GOMFSE recommends the
following assignments:

Bit-Pair Value Represents


00 A transitional or unknown state
01 A logical 0 or OFF state
10 A logical 1 or ON state
11 An invalid state

The PACT common class splits the contents of a UCA2.0 GOOSE message into two main
parts; 32 DNA bit-pairs and 64 User Status bit-pairs.
The DNA bit-pairs are intended to carry GOMSFE defined protection scheme information,
where supported by the device. MiCOM Px40 implementation provides full end-user
flexibility, as it is possible to assign any Digital Data Bus signal to any of the 32 DNA bit-
pairs. The User Status bit pairs are intended to carry all ‘user-defined’ state and control
information. As with the DNA, it is possible to assign any Digital Data Bus signal to these bit-
pairs.
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To ensure full compatibility with third party UCA2.0 GOOSE enabled products, it is
recommended that the DNA bit-pair assignments are as per the definition given in GOMFSE.
Send GOOSE configuration settings to an IED
1. Open a connection to the required device by selecting Open Connection from the
Device menu. Refer to Section 2.1.1.6 & 2.1.1.7 for details on configuring the IED
communication settings.
2. Enter the device address in the Establish Connection dialogue box.
3. Enter the relay password.
4. Send the current GOOSE configuration settings to the device by selecting Send to
Relay from the Device menu.
Save IED GOOSE setting files
Select Save or Save As from the File menu.
Print IED GOOSE setting files
1. Select Print from the File menu.
2. The Print Options dialogue is displayed allowing formatting of the printed file to be
configured.
3. Click OK after making required selections.
Application Notes P44x/EN AP/F65

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7.10 New Function: Inter MiCOM features


7.10.1 InterMiCOM Teleprotection
InterMiCOM is a protection signalling system that is an optional feature of MiCOM Px40
relays and provides a cost-effective alternative to discrete carrier equipment. InterMiCOM
sends eight signals between the two relays in the scheme, with each signal having a
selectable operation mode to provide an optimal combination of speed, security and
dependability in accordance with the application. Once the information is received, it may be
assigned in the Programmable Scheme Logic to any function as specified by the user’s
application.

7.10.2 Protection Signalling


In order to achieve fast fault clearance and correct discrimination for faults anywhere within a
high voltage power network, it is necessary to signal between the points at which protection
relays are connected. Two distinct types of protection signalling can be identified:
7.10.2.1 Unit protection Schemes
In these schemes the signalling channel is used to convey analog data concerning the power
system between relays, typically current magnitude and/or phase. These unit protection
schemes are not covered by InterMiCOM, with the MiCOM P54x range of current differential
and phase comparison relays available.
7.10.2.2 Teleprotection – Channel Aided Schemes
In these schemes the signalling channel is used to convey simple ON/OFF data (from a local
protection device) thereby providing some additional information to a remote device which
can be used to accelerate in-zone fault clearance and/or prevent out-of-zone tripping. This
kind of protection signalling has been discussed earlier in this chapter, and InterMiCOM
provides the ideal means to configure the schemes in the P443 relay.
In each mode, the decision to send a command is made by a local protective relay operation,
and three generic types of InterMiCOM signal are available:
Intertripping In intertripping (direct or transfer tripping applications), the command is
not supervised at the receiving end by any protection relay and simply
causes CB operation. Since no checking of the received signal by
another protection device is performed, it is absolutely essential that any
noise on the signalling channel isn’t seen as being a valid signal. In other
words, an intertripping channel must be very secure.
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Permissive In permissive applications, tripping is only permitted when the command


coincides with a protection operation at the receiving end. Since this
applies a second, independent check before tripping, the signalling
channel for permissive schemes do not have to be as secure as for
intertripping channels.
Blocking In blocking applications, tripping is only permitted when no signal is
received but a protection operation has occurred. In other words, when a
command is transmitted, the receiving end device is blocked from
operating even if a protection operation occurs. Since the signal is used
to prevent tripping, it is imperative that a signal is received whenever
possible and as quickly as possible. In other words, a blocking channel
must be fast and dependable.
The requirements for the three channel types are represented pictorially in figure 19.

Speed

Permissive
faster
Blocking

slower
low

high

Security Direct Dependability


Intertrip P1342ENa

FIGURE 128 - PICTORIAL COMPARISON OF OPERATING MODES


This diagram shows that a blocking signal should be fast and dependable; a direct intertrip
signal should be very secure and a permissive signal is an intermediate compromise of
speed, security and dependability.
7.10.2.3 Communications Media
InterMiCOM is capable of transferring up to 8 commands over one communication channel.
Due to recent expansions in communication networks, most signalling channels are now
digital schemes utilising multiplexed fibre optics and for this reason, InterMiCOM provides a
standard EIA(RS)232 output using digital signalling techniques. This digital signal can then
be converted using suitable devices to any communications media as required.
The EIA(RS)232 output may alternatively be connected to a MODEM link.
Regardless of whether analogue or digital systems are being used, all the requirements of
teleprotection commands are governed by an international standard IEC60834-1:1999 and
InterMiCOM is compliant with the essential requirements of this standard. This standard
governs the speed requirements of the commands as well as the probability of unwanted
commands being received (security) and the probability of missing commands
(dependability).
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 267/286

7.10.2.4 General Features & Implementation


InterMiCOM provides 8 commands over a single communications link, with the mode of
operation of each command being individually selectable within the “IM# Cmd Type” cell.
“Blocking” mode provides the fastest signalling speed (available on commands 1 – 4), “Direct
Intertrip” mode provides the most secure signalling (available on commands 1 – 8) and
“Permissive” mode provides the most dependable signalling (available on commands 5 – 8).
Each command can also be disabled so that it has no effect in the logic of the relay.
Since many applications will involve the commands being sent over a multiplexed
communications channel, it is necessary to ensure that only data from the correct relay is
used. Both relays in the scheme must be programmed with a unique pair of addresses that
correspond with each other in the “Source Address” and “Receive Address” cells. For
example, at the local end relay if we set the “Source Address” to 1, the “Receive Address” at
the remote end relay must also be set to 1. Similarly, if the remote end relay has a “Source
Address” set to 2, the “Receive Address” at the local end must also be set to 2. All four
addresses must not be set identical in any given relay scheme if the possibility of incorrect
signalling is to be avoided.
It must be ensured that the presence of noise in the communications channel isn’t
interpreted as valid messages by the relay. For this reason, InterMiCOM uses a combination
of unique pair addressing described above, basic signal format checking and for “Direct
Intertrip” commands an 8-bit Cyclic Redundancy Check (CRC) is also performed. This CRC
calculation is performed at both the sending and receiving end relay for each message and
then compared in order to maximise the security of the “Direct Intertrip” commands.
Most of the time the communications will perform adequately and the presence of the
various checking algorithms in the message structure will ensure that InterMiCOM signals
are processed correctly. However, careful consideration is also required for the periods of
extreme noise pollution or the unlikely situation of total communications failure and how the
relay should react.
During periods of extreme noise, it is possible that the synchronization of the message
structure will be lost and it may become impossible to decode the full message accurately.
During this noisy period, the last good command can be maintained until a new valid
message is received by setting the “IM# FallBackMode” cell to “Latched”. Alternatively, if the
synchronisation is lost for a period of time, a known fallback state can be assigned to the
command by setting the “IM# FallBackMode” cell to “Default”. In this latter case, the time
period will need to be set in the “IM# FrameSynTim” cell and the default value will need to be
set in “IM# DefaultValue” cell. As soon as a full valid message is seen by the relay all the
timer periods are reset and the new valid command states are used. An alarm is provided if
the noise on the channel becomes excessive.
When there is a total communications failure, the relay will use the fallback (failsafe) strategy
as described above. Total failure of the channel is considered when no message data is
received for four power system cycles or if there is a loss of the DCD line (see section
7.10.2.5).
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7.10.2.5 Physical Connections


InterMiCOM on the Px40 relays is implemented using a 9-pin ‘D’ type female connector
(labelled SK5) located at the bottom of the 2nd Rear communication board. This connector
on the Px40 relay is wired in DTE (Data Terminating Equipment) mode, as indicated below:

Pin Acronym InterMiCOM Usage


1 DCD “Data Carrier Detect” is only used when connecting to modems
otherwise this should be tied high by connecting to terminal 4.
2 RxD “Receive Data”
3 TxD “Transmit Data”
4 DTR “Data Terminal Ready” is permanently tied high by the hardware since
InterMiCOM requires a permanently open communication channel.
5 GND “Signal Ground”
6 Not used -
7 RTS “Ready To Send” is permanently tied high by the hardware since
InterMiCOM requires a permanently open communication channel.
8 Not used -
9 Not used -

TABLE 21: INTERMiCOM D9 PORT PIN-OUT CONNECTIONS


Depending upon whether a direct or modem connection between the two relays in the
scheme is being used, the required pin connections are described below.
7.10.2.6 Direct Connection
The EIA(RS)232 protocol only allows for short transmission distances due to the signalling
levels used and therefore the connection shown below is limited to less than 15m. However,
this may be extended by introducing suitable EIA(RS)232 to fiber optic convertors, such as
the AREVA T&D CILI203. Depending upon the type of convertor and fiber used, direct
communication over a few kilometres can easily be achieved.

Px40 Relay with Px40 Relay with


InterMiCOM InterMiCOM
DCD - 1 1 - DCD
RxD - 2 2 - RxD
TxD - 3 3 - TxD
DTR - 4 4 - DTR
GND - 5 5 - GND
6 6
RTS - 7 7 - RTS
8 8
9 9
P1150ENa

FIGURE 129 -DIRECT CONNECTION WITHIN THE LOCAL SUBSTATION


This type of connection should also be used when connecting to multiplexers which have no
ability to control the DCD line.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 269/286

7.10.2.7 Modem Connection


For long distance communication, modems may be used in which the case the following
connections should be made.

Px40 Relay with Px40 Relay with


InterMiCOM InterMiCOM
DCD - 1 DCD DCD 1 - DCD
RxD - 2 RxD RxD 2 - RxD
Communication
TxD - 3 TxD Network TxD 3 - TxD
DTR - 4 4 - DTR
GND - 5 GND GND 5 - GND
6 6
RTS - 7 7 - RTS
8 8
9 9
P1341ENa

FIGURE 130 - INTERMiCOM TELEPROTECTION VIA A MODEM LINK


This type of connection should also be used when connecting to multiplexers which have the
ability to control the DCD line.
With this type of connection it should be noted that the maximum distance between the Px40
relay and the modem should be 15m, and that a baud rate suitable for the communications
path used should be selected.
7.10.3 Functional Assignment
Even though settings are made on the relay to control the mode of the intertrip signals, it is
necessary to assign interMiCOM input and output signals in the relay Programmable
Scheme Logic (PSL) if InterMiCOM is to be successfully implemented. Two icons are
provided on the PSL editor of MiCOM S1 for “Integral tripping In” and “Integral tripping out”
which can be used to assign the 8 intertripping commands. The example shown below in
figure 2 shows a “Control Input_1” connected to the “Intertrip O/P1” signal which would then
be transmitted to the remote end. At the remote end, the “Intertrip I/P1” signal could then be
assigned within the PSL. In this example, we can see that when intertrip signal 1 is received
from the remote relay, the local end relay would operate an output contact, R1.

EXAMPLE ASSIGNMENT OF SIGNALS WITHIN THE PSL


It should be noted that when an InterMiCOM signal is sent from the local relay, only the
remote end relay will react to this command. The local end relay will only react to
InterMiCOM commands initiated at the remote end.
P44x/EN AP/F65 Application Notes

Page 270/286 MiCOM P441/P442 & P444

7.10.4 InterMiCOM Settings


The settings necessary for the implementation of InterMiCOM are contained within two
columns of the relay menu structure. The first column entitled “INTERMICOM COMMS”
contains all the information to configure the communication channel and also contains the
channel statistics and diagnostic facilities. The second column entitled “INTERMICOM
CONF” selects the format of each signal and its fallback operation mode. The following
tables show the relay menus including the available setting ranges and factory defaults.

Menu Text Default Setting Setting Range Step Size


Min Max
INTERMICOM COMMS
Source Address 1 1 10 1
Receive Address 2 1 10 1
Baud Rate 9600 600 / 1200 / 2400 / 4800 / 9600 / 19200
Ch Statistics Invisible Invisible / Visible
Ch Diagnostics Invisible Invisible / Visible
Loopback Mode Disabled Disabled / Internal / External
Test pattern 11111111 00000000 11111111 -

TABLE 22: INTERMiCOM GENERIC COMMUNICATIONS SET-UP


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 271/286

Menu Text Default Setting Setting Range Step Size


Min Max
INTERMICOM CONF
IM Msg Alarm Lvl 25% 0% 100% 1%
IM1 Cmd Type Blocking Disabled/ Blocking/ Direct
IM1 Fallback Mode Default Default/ Latched
IM1 DefaultValue 1 0 1 1
IM1 FrameSyncTim 20ms 10ms 1500ms 10ms
IM2 to IM4 (Cells as for IM1 above)
IM5 Cmd Type Direct Disabled/ Permissive/ Direct
IM5 Fallback Mode Default Default/ Latched
IM5 DefaultValue 0 0 1 1
IM5 FrameSyncTim 10ms 10ms 1500ms 10ms
IM6 to IM8 (Cells as for IM5 above)

TABLE 23: PROGRAMMING THE RESPONSE FOR EACH OF THE 8 INTERMiCOM SIGNALS
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7.10.4.1 Setting Guidelines


The settings required for the InterMiCOM signalling are largely dependant upon whether a
direct or indirect (modem/multiplexed) connection between the scheme ends is used.
Direct connections will either be short metallic or dedicated fiber optic based and hence can
be set to have the highest signalling speed of 19200b/s. Due to this high signalling rate, the
difference in operating speed between the direct, permissive and blocking type signals is so
small that the most secure signalling (direct intertrip) can be selected without any significant
loss of speed. In turn, since the direct intertrip signalling requires the full checking of the
message frame structure and CRC checks, it would seem prudent that the “IM# Fallback
Mode” be set to “Default” with a minimal intentional delay by setting “IM# FrameSyncTim” to
10msecs. In other words, whenever two consecutive messages have an invalid structure,
the relay will immediately revert to the default value until a new valid message is received.
For indirect connections, the settings that should be applied will become more application
and communication media dependent. As for the direct connections, it may be appealing to
consider only the fastest baud rate but this will usually increase the cost of the necessary
modem/multiplexer.
In addition, devices operating at these high baud rates may suffer from “data jams” during
periods of interference and in the event of communication interruptions, may require longer
re-synchronization periods.
Both of these factors will reduce the effective communication speed thereby leading to a
recommended baud rate setting of 9600b/s. It should be noted that as the baud rate
decreases, the communications become more robust with fewer interruptions, but that
overall signalling times will increase.
Since it is likely that slower baud rates will be selected, the choice of signalling mode
becomes significant. However, once the signalling mode has been chosen it is necessary to
consider what should happen during periods of noise when message structure and content
can be lost.
If “Blocking” mode is selected, only a small amount of the total message is actually used to
provide the signal, which means that in a noisy environment there is still a good likelihood of
receiving a valid message. In this case, it is recommended that the “IM# Fallback Mode” is
set to “Default” with a reasonably long “IM# FrameSyncTim”.
If “Direct Intertrip” mode is selected, the whole message structure must be valid and checked
to provide the signal, which means that in a very noisy environment the chances of receiving
a valid message are quite small. In this case, it is recommended that the “IM# Fallback
Mode” is set to “Default” with a minimum “IM# FrameSyncTim” setting i.e. whenever a non-
valid message is received, InterMiCOM will use the set default value.
If “Permissive” mode is selected, the chances of receiving a valid message is between that
of the “Blocking” and “Direct Intertrip” modes. In this case, it is possible that the “IM#
Fallback Mode” is set to “Latched”. The table below highlights the recommended “IM#
FrameSyncTim” settings for the different signalling modes and baud rates:

Minimum Recommended “IM# FrameSyncTim”


Baud Setting Minimum Maximum
Rate Setting Setting
Direct Intertrip Mode Blocking Mode
600 100 250 100 1500
1200 50 130 50 1500
2400 30 70 30 1500
4800 20 40 20 1500
9600 10 20 10 1500
19200 10 10 10 1500

TABLE 24: RECOMMENDED FRAME SYNCHRONISM TIME SETTINGS


Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 273/286

NOTA: No recommended setting is given for the Permissive mode since it is


anticipated that “Latched” operation will be selected. However, if
“Default mode” is selected, the “IM# FrameSyncTim” setting should be
set greater than the minimum settings listed above. If the “IM#
FrameSyncTim” setting is set lower than the minimum setting listed
above, there is a danger that the relay will monitor a correct change in
message as a corrupted message.
A setting of 25% is recommended for the communications failure
alarm.
7.10.4.2 InterMiCOM Statistics & Diagnostics
It is possible to hide the channel diagnostics and statistics from view by setting the “Ch
Statistics” and/or “Ch Diagnostics” cells to “Invisible”. All channel statistics are reset when
the relay is powered up, or by user selection using the “Reset Statistics” cell.
7.10.5 TESTING InterMiCOM Teleprotection
7.10.5.1 InterMiCOM Loopback Testing & Diagnostics
A number of features are included within the InterMiCOM function to assist a user in
commissioning and diagnosing any problems that may exist in the communications link.
“Loopback” test facilities, located within the INTERMICOM COMMS column of the relay
menu, provide a user with the ability to check the software and hardware of the InterMiCOM
signalling. By selecting “Loopback Mode” to “Internal”, only the internal software of the relay
is checked whereas “External” will check both the software and hardware used by
InterMiCOM. In the latter case, it is necessary to connect the transmit and receive pins
together (pins 2 and 3) and ensure that the DCD signal is held high (connect pin 1 and pin 4
together). When the relay is switched into “Loopback Mode” the relay will automatically use
generic addresses and will inhibit the InterMiCOM messages to the PSL by setting all eight
InterMiCOM message states to zero. The loopback mode will be indicated on the relay
frontplate by the amber Alarm LED being illuminated and a LCD alarm message, “IM
Loopback”.

Px40 Relay with


InterMiCOM
DCD - 1
RxD - 2
TxD - 3
DTR - 4
GND - 5
6
RTS - 7
8
9
P1343ENa

Connections for External Loopback mode


Once the relay is switched into either of the Loopback modes, a test pattern can be entered
in the “Test Pattern” cell which is then transmitted through the software and/or hardware.
Providing all connections are correct and the software is working correctly, the “Loopback
Status” cell will display “OK”. An unsuccessful test would be indicated by “FAIL”, whereas a
hardware error will be indicated by “UNAVAILABLE”. Whilst the relay is in loopback test
mode, the “IM Output Status” cell will only show the “Test Pattern” settings, whilst the “IM
Input Status” cell will indicate that all inputs to the PSL have been forced to zero.
Care should be taken to ensure that once the loopback testing is complete, the “Loopback
Mode” is set to “Disabled” thereby switching the InterMiCOM channel back in to service.
With the loopback mode disabled, the “IM Output Status” cell will show the InterMiCOM
messages being sent from the local relay, whilst the “IM Input Status” cell will show the
P44x/EN AP/F65 Application Notes

Page 274/286 MiCOM P441/P442 & P444

received InterMiCOM messages (received from the remote end relay) being used by the
PSL.
Once the relay operation has been confirmed using the loopback test facilities, it will be
necessary to ensure that the communications between the two relays in the scheme are
reliable. To facilitate this, a list of channel statistics and diagnostics are available in the
InterMiCOM COMMS column – see section 10.2. It is possible to hide the channel
diagnostics and statistics from view by setting the “Ch Statistics” and/or “Ch Diagnostics”
cells to “Invisible”. All channel statistics are reset when the relay is powered up, or by user
selection using the “Reset Statistics” cell.
Another indication of the amount of noise on the channel is provided by the communications
failure alarm. Within a fixed 1.6 second time period the relay calculates the percentage of
invalid messages received compared to the total number of messages that should have
been received based upon the “Baud Rate” setting. If this percentage falls below the
threshold set in the “IM Msg Alarm Lvl” cell, a “Message Fail” alarm will be raised.
Settings
The settings available in the INTERMiCOM COMMS menu column are as follows:

Menu Text Default Setting Setting Range Step Size


Min Max
INTERMICOM COMMS
IM Output Status 00000000
IM Input Status 00000000
Source Address 1 1 10 1
Receive Address 2 1 10 1
Baud Rate 9600 600 / 1200 / 2400 / 4800 / 9600 / 19200
Ch Statistics Invisible Invisible / Visible
Reset Statistics No No / Yes
Ch Diagnostics Invisible Invisible / Visible
Loopback Mode Disabled Disabled / Internal / External
Test pattern 11111111 00000000 11111111 -

TABLE 25
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 275/286

7.10.5.2 InterMiCOM Statistics & Diagnostics


Once the relay operation has been confirmed using the loopback test facilities, it will be
necessary to ensure that the communications between the two relays in the scheme are
reliable. To facilitate this, a list of channel statistics and diagnostics are available in the
InterMiCOM COMMS column and are explained below:

Ch Statistics
Rx Direct Count No. of Direct Tripping messages received with the correct message
structure and valid CRC check.
Rx Perm Count No. of Permissive Tripping messages received with the correct
message structure.
Rx Block Count No. of Blocking messages received with the correct message structure.
Rx NewDataCount No. of different messages received.
Rx ErroredCount No. of incomplete or incorrectly formatted messages received.
Lost Messages No. of messages lost within the previous time period set in “Alarm
Window” cell.
Elapsed Time Time in seconds since the InterMiCOM channel statistics were reset.
Ch Diagnostics
Data CD Status Indicates when the DCD OK = DCD is energised
line (pin 1) is energised. FAIL = DCD is de-energised
Absent = InterMiCOM board is not fitted
Unavailable = hardware error present
FrameSync Status Indicates when the OK = valid message structure and
message structure and synchronisation
synchronisation is valid. FAIL = synchronisation has been lost
Absent = InterMiCOM board is not fitted
Unavailable = hardware error present
Message Status Indicates when the OK = acceptable ratio of lost messages
percentage of received FAIL = unacceptable ratio of lost messages
valid messages has
fallen below the Absent = InterMiCOM board is not fitted
“IM Msg Alarm Lvl” Unavailable = hardware error present
setting within the alarm
time period.
Channel Status Indicates the state of the OK = channel healthy
InterMiCOM FAIL = channel failure
communication channel.
Absent = InterMiCOM board is not fitted
Unavailable = hardware error present
IM H/W Status Indicates the state of the OK = InterMiCOM hardware healthy
InterMiCOM hardware. Read Error = InterMiCOM hardware failure
Write Error = InterMiCOM hardware failure
Absent = InterMiCOM board is either not
fitted or failed to initialise
TABLE 26
It is possible to hide the channel diagnostics and statistics from view by setting the “Ch
Statistics” and/or “Ch Diagnostics” cells to “Invisible”. All channel statistics are reset when
the relay is powered up, or by user selection using the “Reset Statistics” cell.
P44x/EN AP/F65 Application Notes

Page 276/286 MiCOM P441/P442 & P444

8. NEW ADDITIONAL FUNCTIONS – VERSION C4.X (MODEL 0350J)


8.1 New DDB signals
DDB signals for first stage undervoltage elements:
V<1 Start A is an input signal. This signal is set when an undervoltage condition on phase A
is detected by the first stage undervoltage element.
V<1 Start B is an input signal. This signal is set when an undervoltage condition on phase B
is detected by the first stage undervoltage element.
V<1 Start C is an input signal. This signal is set when an undervoltage condition on phase C
is detected by the first stage undervoltage element.

DDB signals for second stage undervoltage elements:


V<2 Start A is an input signal. This signal is set when an undervoltage condition on phase A
is detected by the second stage undervoltage element.
V<2 Start B is an input signal. This signal is set when an undervoltage condition on phase B
is detected by the second stage undervoltage element.
V<2 Start C is an input signal. This signal is set when an undervoltage condition on phase C
is detected by the second stage undervoltage element.

DDB signals for the first stage overvoltage elements:


V>1 Start A is an input signal. This signal is set when an overvoltage condition on phase A is
detected by the first stage overvoltage element.
V>1 Start B is an input signal. This signal is set when an overvoltage condition on phase B is
detected by the first stage overvoltage element.
V>1 Start C is an input signal. This signal is set when an overvoltage condition on phase C is
detected by the first stage overvoltage element.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 277/286

DDB signals for the second stage overvoltage elements:


V>2 Start A is an input signal. This signal is set when an overvoltage condition on phase A is
detected by the second stage overvoltage element.
V>2 Start B is an input signal. This signal is set when an overvoltage condition on phase B is
detected by the second stage overvoltage element.
V>2 Start C is an input signal. This signal is set when an overvoltage condition on phase C is
detected by the second stage overvoltage element.

DDB signal for NCIT selection:


Select CS(NCIT) is an output signal to select BUS1 or BUS2 voltage for Check
Synchronization function. This function is only available for the NCIT acquisition module.

DDB signals for independent timer blocking:


T1 Timer Block is an output signal. The activation of this signal blocks zone 1 timer.
T2 Timer Block is an output signal. The activation of this signal blocks zone 2 timer.
T3 Timer Block is an output signal. The activation of this signal blocks zone 3 timer.
T4 Timer Block is an output signal. The activation of this signal blocks zone 4 timer.
TZp Timer Block is an output signal. The activation of this signal blocks zone p timer.
P44x/EN AP/F65 Application Notes

Page 278/286 MiCOM P441/P442 & P444

9. NEW ADDITIONAL FUNCTIONS – VERSION D1.X (MODEL 0400K)


9.1 Programmable function keys and tricolour LEDs
The relay has 10 function keys for integral scheme or operator control functionality such as
circuit breaker control, auto-reclose control etc. via PSL. Each function key has an
associated programmable tri-colour LED that can be programmed to give the desired
indication on function key activation.
These function keys can be used to trigger any function that they are connected to as part of
the PSL. The function key commands can be found in the ‘Function Keys’ menu. In the ‘Fn.
Key Status’ menu cell there is a 10 bit word which represent the 10 function key commands
and their status can be read from this 10 bit word. In the programmable scheme logic editor
10 function key signals, DDB 676 – 685, which can be set to a logic 1 or On state are
available to perform control functions defined by the user.
The “Function Keys” column has ‘Fn. Key n Mode’ cell which allows the user to configure the
function key as either ‘Toggled’ or ‘Normal’. In the ‘Toggle’ mode the function key DDB signal
output will remain in the set state until a reset command is given, by activating the function
key on the next key press. In the ‘Normal’ mode, the function key DDB signal will remain
energized for as long as the function key is pressed and will then reset automatically.
A minimum pulse duration can be programmed for a function key by adding a minimum
pulse timer to the function key DDB output signal. The “Fn. Key n Status” cell is used to
enable/unlock or disable the function key signals in PSL. The ‘Lock’ setting has been
specifically provided to allow the locking of a function key thus preventing further activation
of the key on consequent key presses. This allows function keys that are set to ‘Toggled’
mode and their DDB signal active ‘high’, to be locked in their active state thus preventing any
further key presses from deactivating the associated function. Locking a function key that is
set to the “Normal” mode causes the associated DDB signals to be permanently off. This
safety feature prevents any inadvertent function key presses from activating or deactivating
critical relay functions. The “Fn. Key Labels” cell makes it possible to change the text
associated with each individual function key. This text will be displayed when a function key
is accessed in the function key menu, or it can be displayed in the PSL.
The status of the function keys is stored in battery backed memory. In the event that the
auxiliary supply is interrupted the status of all the function keys will be recorded. Following
the restoration of the auxiliary supply the status of the function keys, prior to supply failure,
will be reinstated. If the battery is missing or flat the function key DDB signals will set to logic
0 once the auxiliary supply is restored. The relay will only recognise a single function key
press at a time and that a minimum key press duration of approximately 200msec. is
required before the key press is recognised in PSL. This deglitching feature avoids
accidental double presses.
9.2 Setting guidelines
The lock setting allows a function key output that is set to toggle mode to be locked in its
current active state. In toggle mode a single key press will set/latch the function key output
as high or low in programmable scheme logic. This feature can be used to enable/disable
relay functions. In the normal mode the function key output will remain high as long as the
key is pressed. The Fn. Key label allows the text of the function key to be changed to
something more suitable for the application.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 279/286

Setting range
Menu text Default setting Step size
Min Max
Fn Key 11 Unlocked Disabled, Locked, Unlocked
Fn Key 11 Mode Normal Toggled, Normal
Fn Key 11 Label Function Key 11
Fn Key 12 Unlocked Disabled, Locked, Unlocked
Fn Key 12 Mode Normal Toggled, Normal
Fn Key 12 Label Function Key 12
Fn Key 13 Unlocked Disabled, Locked, Unlocked
Fn Key 13 Mode Normal Toggled, Normal
Fn Key 13 Label Function Key 13
Fn Key 14 Unlocked Disabled, Locked, Unlocked
Fn Key 14 Mode Normal Toggled, Normal
Fn Key 14 Label Function Key 14
Fn Key 15 Unlocked Disabled, Locked, Unlocked
Fn Key 15 Mode Normal Toggled, Normal
Fn Key 15 Label Function Key 15
Fn Key 16 Unlocked Disabled, Locked, Unlocked
Fn Key 16 Mode Normal Toggled, Normal
Fn Key 16 Label Function Key 16
Fn Key 17 Unlocked Disabled, Locked, Unlocked
Fn Key 17 Mode Normal Toggled, Normal
Fn Key 17 Label Function Key 17
Fn Key 18 Unlocked Disabled, Locked, Unlocked
Fn Key 18 Mode Normal Toggled, Normal
Fn Key 18 Label Function Key 18
Fn Key 19 Unlocked Disabled, Locked, Unlocked
Fn Key 19 Mode Normal Toggled, Normal
Fn Key 19 Label Function Key 19
Fn Key 20 Unlocked Disabled, Locked, Unlocked
Fn Key 20 Mode Normal Toggled, Normal
Fn Key 20 Label Function Key 20
P44x/EN AP/F65 Application Notes

Page 280/286 MiCOM P441/P442 & P444

Fn Key 1
The activation of the function key will drive an associated DDB signal and the DDB signal will
remain active depending on the programmed setting i.e. toggled or normal. Toggled mode
means the DDB signal will remain latched or unlatched on key press and normal means the
DDB will only be active for the duration of the key press. For example, function key 1 should
be operated in order to assert DDB #676.

FnKey LED 1 Red


Ten programmable tri-colour LEDs associated with each function key are used to indicate
the status of the associated pushbutton’s function. Each LED can be programmed to indicate
red, yellow or green as required. The green LED is configured by driving the green DDB
input. The red LED is configured by driving the red DDB input. The yellow LED is configured
by driving the red and green DDB inputs simultaneously. When the LED is activated the
associated DDB signal will be asserted. For example, if FnKey Led 1 Red is activated, DDB
#656 will be asserted.
FnKey LED 1 Grn
The same explanation as for Fnkey 1 Red applies.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 281/286

LED 1 Red
Eight programmable tri-colour LEDs that can be programmed to indicate red, yellow or green
as required. The green LED is configured by driving the green DDB input. The red LED is
configured by driving the red DDB input. The yellow LED is configured by driving the red and
green DDB inputs simultaneously. When the LED is activated the associated DDB signal will
be asserted. For example, if Led 1 Red is activated, DDB #640 will be asserted.
LED 1 Grn
The same explanation as for LED 1 Red applies.
P44x/EN AP/F65 Application Notes

Page 282/286 MiCOM P441/P442 & P444

10. NEW ADDITIONAL FUNCTIONS – VERSION C5.X (MODEL 0360J)


10.1 New DDB signals
DDB signals for internal trip
Any Int. Trip is an input signal. It is on when any internal protection element trips single-pole
or three-pole.
Any Int. Trip A is an input signal. It is on when any internal protection element trips A phase.
Any Int. Trip B is an input signal. It is on when any internal protection element trips B phase.
Any Int. Trip C is an input signal. It is on when any internal protection element trips C phase.

DDB signal for trip LED


Trip Led DDB signal is an output signal. Any signal can be configured to trigger the trip LED.

Zone q signals
Zq input signal is activated when zone q starts.
TZq input signal is activated when the timer has elapsed.
TZq Timer block is an output signal. Its activation blocks the timer.

Residual overvoltage (NVD) signals


VN>1 start is an input signal. It is on when a residual overvoltage is detected by the NVD
first stage element. Upon this starting, the NVD first stage timer gets triggered.
VN>2 start is an input signal. It is on when a residual overvoltage is detected by the NVD
second stage element. Upon this starting, the NVD second stage timer gets triggered.
VN>1 trip is an input signal. It is triggered when the NVD first stage timer expires; as a result,
a three pole trip order is performed.
VN>2 trip is an input signal. It is triggered when the NVD second stage timer expires; as a
result, a three pole trip order is performed.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 283/286

VN>1 timer block is an output signal. If it is on, the first stage residual overvoltage timer is
blocked.
VN>2 timer block is an output signal. If it is on, the second stage residual overvoltage timer
is blocked.

Negative sequence overcurrent signals


I2>2 start is an input signal. It is on when a negative sequence current is detected by the
NPS second stage element and the direction condition is met. Upon this starting, the NPS
second stage timer gets triggered.
I2>3 start is an input signal. It is on when a negative sequence current is detected by the
NPS third stage element and the direction condition is met. Upon this starting, the NPS third
stage timer gets triggered.
I2>4 start is an input signal. It is on when a negative sequence current is detected by the
NPS fourth stage element and the direction condition is met. Upon this starting, the NPS
fourth stage timer gets triggered.
I2>2 trip signal is an input signal. It is triggered when the NPS second stage timer expires;
as a result, a three pole trip order is performed.
I2>3 trip signal is an input signal. It is triggered when the NPS third stage timer expires; as a
result, a three pole trip order is performed.
I2>4 trip signal is an input signal. It is triggered when the NPS fourth stage timer expires; as
a result, a three pole trip order is performed.
I2>2 timer block is an output signal. If it is on, the second stage NPS timer is blocked. If the
timer is blocked, I2>2 may start but will not perform any trip command.
I2>3 timer block is an output signal. If it is on, the third stage NPS timer is blocked. If the
timer is blocked, I2>3 may start but will not perform any trip command.
I2>4 timer block is an output signal. If it is on, the fourth stage NPS timer is blocked. If the
timer is blocked, I2>4 may start but will not perform any trip command.
P44x/EN AP/F65 Application Notes

Page 284/286 MiCOM P441/P442 & P444

10.2 Residual overvoltage (neutral displacement) protection


On a healthy three phase power system, the summation of all three phase to earth voltages
is normally zero, as it is the vector addition of three balanced vectors at 120° to one another.
However, when an earth (ground) fault occurs on the primary system this balance is upset
and a ‘residual’ voltage is produced.
NOTE: This condition causes a rise in the neutral voltage with respect to earth
which is commonly referred to as “neutral voltage displacement” or
NVD.
The following figures show the residual voltages that are produced during earth fault
conditions occurring on a solid and impedance earthed power system respectively.

S R F
E
ZS ZL

A-G

VAG
VAG

VCG V BG VCG V BG VCG V BG

VAG VRES
VAG VRES
V BG V BG V BG

VCG VCG VCG

Residual voltage at R (relay point) is dependant upon ZS /ZL ratio.


Z S0
VRES = x3E
2Z S1 + Z S0 + 2Z L1 + Z L0
P0117ENb

FIGURE 131 - RESIDUAL VOLTAGE, SOLIDLY EARTHED SYSTEM


As can be seen in the previous figure, the residual voltage measured by a relay for an earth
fault on a solidly earthed system is solely depending on the ratio of source impedance
behind the relay to line impedance in front of the relay, up to the point of fault. For a remote
fault, the ZS/ZL ratio will be small, resulting in a correspondingly small residual voltage. As
such, depending upon the relay setting, such a relay would only operate for faults up to a
certain distance along the system. The value of residual voltage generated for an earth fault
condition is given by the general formula shown.
Application Notes P44x/EN AP/F65

MiCOM P441/P442 & P444 Page 285/286

E S R F
ZS ZL
N

ZE A-G

VAG
S VAG
G,F R G,F
G,F
VCG VCG
VCG
VBG VBG VBG

VRES VRES VRES


VBG VBG VBG
VAG VAG

VCG VCG VCG

Z S0 + 3Z E
VRES = x3E
2Z S1 + Z S0 + 2Z L1 + Z L0 + 3Z E
P0118ENb

FIGURE 132 - RESIDUAL VOLTAGE, RESISTANCE EARTHED SYSTEM

As shown in the figure above, a resistance earthed system will always generate a relatively
large degree of residual voltage, as the zero sequence source impedance now includes the
earthing impedance. It follows then, that the residual voltage generated by an earth fault on
an insulated system will be the highest possible value (3 x phase-neutral voltage), as the
zero sequence source impedance is infinite.
From the above information it can be seen that the detection of a residual overvoltage
condition is an alternative means of earth fault detection, which does not require any
measurement of zero sequence current. This may be particularly advantageous at a tee
terminal where the infeed is from a delta winding of a transformer (and the delta acts as a
zero sequence current trap).
It must be noted that where residual overvoltage protection is applied, such a voltage will be
generated for a fault occurring anywhere on that section of the system and hence the NVD
protection must co-ordinate with other earth/ground fault protection.
P44x/EN AP/F65 Application Notes

Page 286/286 MiCOM P441/P442 & P444

10.2.1 Setting guidelines


The voltage setting applied to the elements is dependent upon the magnitude of residual
voltage that is expected to occur during the earth fault condition. This in turn is dependent
upon the method of system earthing employed and may be calculated by using the
formulae’s previously given in the above figures. It must also be ensured that the relay is set
above any standing level of residual voltage that is present on the healthy system.
NOTE: IDMT characteristics are selectable on the first stage of NVD and a
time delay setting is available on the second stage of NVD in order
that elements located at various points on the system may be time
graded with one another.

Setting range
Menu text Default setting Step size
Min Max
VN>1 Function DT Disabled, DT, IDMT
VN>1 Voltage Set 5V 1V 80 V 1V
VN>1 Time Delay 5.00 s 0s 100.0 s 0.01 s
VN>1 TMS 1.0 0.5 100.0 0.5
VN>1 tReset 0s 0s 100.0 s 0.5 s
VN>2 Status Disabled Enabled, Disabled
VN>2 Voltage Set 10 V 1V 80 V 1V
VN>2 Time Delay 10.00 s 0s 100.0 s 0.01 s

10.3 CT polarity setting


CT polarity setting is included. It allows adjusting the current measurement to the actual
plant CT grounding without swapping connections at the relays terminals.

Setting range
Menu text Default setting Step size
Min Max
CT polarity Standard Standard, Inverted
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444

TECHNICAL DATA
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 1/34

CONTENT

1. RATINGS 5
1.1 Currents 5
1.2 Voltages 5
1.3 Auxiliary Voltage 6
1.4 Frequency 6
1.5 Logic inputs 6
1.6 Output Relay Contacts 7
1.7 Field Voltage 7
1.8 Loop through connections 7
1.9 Wiring requirements 7
1.10 Terminals 7

2. BURDENS 8
2.1 Current Circuit 8
2.2 Voltage Circuit 8
2.3 Auxiliary Supply 8
2.4 Optically-Isolated Inputs 8

3. ACCURACY 9
3.1 Reference Conditions 9
3.2 Measurement Accuracy 9
3.3 Protection accuracy 10
3.4 Thermal Overload Accuracy 12
3.5 Influencing Quantities 12
3.6 High Voltage Withstand IEC60255-5:1977 12
3.6.1 Dielectric Withstand 12
3.6.2 Impulse 13
3.6.3 Insulation Resistance 13

4. ENVIRONMENTAL COMPLIANCE 14
4.1 Electrical Environment 14
4.1.1 DC Supply Interruptions IEC60255-11:1979 14
4.1.2 AC Ripple on DC Supply IEC60255-11:1979 14
4.1.3 Disturbances on AC Supply - EN61000-4-11:1994 14
4.1.4 High Frequency Disturbance IEC60255-22-1:1988 14
4.1.5 Fast Transient IEC60255-22-4:1992 14
4.1.6 Electrostatic Discharge IEC60255-22-2:1996 14
4.1.7 Conducted Emissions EN 55011:1991 14
4.1.8 Radiated Emissions EN 55011:1991 14
P44x/EN TD/F65 Technical Data

Page 2/34 MiCOM P441/P442 & P444

4.1.9 Radiated Immunity IEC60255-22-3:1989 15


4.1.10 Conducted Immunity IEC61000-4-6:1996 15
4.1.11 Surge Immunity IEC61000-4-5:1995 15
4.1.12 EMC Compliance 15
4.1.13 Power Frequency Interference - Electricity Association (UK) 15
4.2 Atmospheric Environment 15
4.2.1 Temperature IEC60255-6:1988 15
4.2.2 Humidity IEC60068-2-3:1969 15
4.2.3 Enclosure Protection IEC60529:1989 15
4.2.4 Pollution degree IEC61010-1:1990/A2:1995 15
4.3 Mechanical Environment 16
4.3.1 Vibration IEC60255-21-1:1988 16
4.3.2 Shock and Bump IEC60255-21-2:1988 16
4.3.3 Seismic IEC60255-21-3:1993 16

5. ANSI TEST REQUIREMENTS 17


5.1 ANSI / IEEE C37.90.1989 17
5.2 ANSI / IEEE C37.90.1: 1989 17
5.3 ANSI / IEEE C37.90.2: 1995 17

6. PROTECTION SETTING RANGES 18


6.1 Distance Protection 18
6.1.1 Line Settings 18
6.1.2 Zone settings 18
6.1.3 Power-swing settings 19
6.2 Distance protection schemes 19
6.2.1 Programmable distance schemes 20
6.2.2 Distance schemes settings 20
6.2.3 Weak infeed settings 20
6.2.4 Protection Antenne Passive (RTE Feature) 21
6.2.5 Loss of load settings 21
6.3 Back-up Overcurrent Protection 21
6.3.1 Threshold Settings 21
6.3.2 Time Delay Settings 21
6.3.3 Inverse Time (IDMT) Characteristic 21
6.4 Negative sequence overcurrent protection 23
6.5 Broken Conductor Protection 24
6.6 Earth Fault Overcurrent Protection 24
6.6.1 Threshold Settings 24
6.6.2 Polarising Quantities For Earth Fault Measuring Elements 24
6.6.3 Time Delay Characteristics 25
6.7 Residual overvoltage 25
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 3/34

6.8 Zero sequence Power Protection (since B1.0) 25


6.9 Channel Aided Directional Earth Fault Protection 25
6.9.1 Threshold Settings 25
6.10 Under Voltage Protection 26
6.10.1 Threshold Settings 26
6.10.2 Under Voltage Protection Time Delay Characteristics 26
6.11 Over Voltage Protection 26
6.11.1 Threshold Settings 26
6.11.2 Time Delay Characteristics 26
6.12 Voltage Transformer Supervision 27
6.13 Capacitive Voltage Transformer Supervision (since B1.0) 27
6.14 Current Transformer Supervision 27
6.15 Undercurrent Element 27
6.16 Breaker Fail Timers (TBF1 and TBF2) 28

7. MEASUREMENT SETTINGS 29
7.1 Disturbance Recorder Settings 29
7.2 Fault Locator Settings 29

8. CONTROL FUNCTION SETTINGS 30


8.1 Communications Settings 30
8.2 Auto-Reclose 30
8.2.1 Options 30
8.2.2 Auto-recloser settings 30
8.3 Circuit Breaker State Monitoring 31
8.4 Circuit Breaker Control 32
8.5 Circuit Breaker Condition Monitoring 32
8.5.1 Maintenance alarm settings 32
8.5.2 Lockout Alarm Settings 32
8.6 Programmable Logic 33
8.7 CT and VT Ratio Settings 33
P44x/EN TD/F65 Technical Data

Page 4/34 MiCOM P441/P442 & P444

BLANK PAGE
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 5/34

1. RATINGS
1.1 Currents

In = 1A or 5A ac rms (dual rated).


Separate terminals are provided for the 1A and 5A windings, with the neutral input of each
winding sharing one terminal.

CT Type Operating range


Standard 0 to 64 In
Sensitive 0 to 2 In

All current inputs will withstand the following, with any current function setting:

Withstand Duration
4 Ιn Continuous rating
4.5 Ιn 10 minutes
5 Ιn 5 minutes
6 Ιn 3 minutes
7 Ιn 2 minutes
30 Ιn 10 seconds
50 Ιn 3 seconds
100 Ιn 1 second

Pass Criteria Winding temperatures <105° C


Dielectric withstand and insulation
resistance not impaired

1.2 Voltages

Nominal Voltage Operating range


100/120 Vph - ph rms 0 to 200 Vph - ph rms

Duration Withstand
(Vn = 100/120V)
Continuous rating (2 Vn) 240 Vph - ph rms
10 seconds (2.6 Vn) 312 Vph - ph rms
P44x/EN TD/F65 Technical Data

Page 6/34 MiCOM P441/P442 & P444

1.3 Auxiliary Voltage


The relay is available in three auxiliary voltage versions, these are specified in the table
below:

Nominal Ranges Operative dc range Operative ac range


24-48 V dc 19 - 65 V Not available
48-110 V dc (30 / 100 V ac rms) ** 37 - 150 V 24 - 110 V
110-250 V dc (100 / 240 V ac rms) ** 87 - 300 V 80 - 265 V

** rated for AC or DC operation.

Pass Criteria All functions operate as specified


within the operative ranges
All power supplies operate
continuously over their operative
ranges, and environmental
conditions

1.4 Frequency
The nominal frequency (fn) is dual rated 50/60 Hz, the operating range is 45 Hz to 65 Hz.
1.5 Logic inputs
All the logic inputs are independent and isolated, relay type P441 provides 8 inputs, 16
inputs are provided by the P442.

Rating Range
Logical “off” 0 V dc 0 - 12 V dc
Logical “on” 50 V dc 30 - 60 V dc

Higher voltages can be used in conjunction with an external resistor, value of the resistor is
determined by the following equation:

Resistor = (Required Input Level - 50) x 200Ω.


Hardware ref P441/442B or C or P444A or C (Universal Opto) :
All the logic inputs are independent and isolated, relay types P441 provide 8 inputs, 16
inputs are provided by the P442 and 24 inputs for P444.

Battery Voltage (V dc) Logical “off” (V dc) Logical “on” (V dc)


24/27 <16.2 >19.2
30/34 <20.4 >24
48/54 <32.4 >38.4
110/125 <75 >88
220/250 <150 >176

REMARK: Control the version compatibility in P44x/EN VC chapter


Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 7/34

1.6 Output Relay Contacts

Make & Carry 30A for 3s


Carry 250A for 30ms
10A continuous
Break DC: 50W resistive
DC: 62.5W inductive (L/R = 50ms)
AC: 2500VA resistive (cos φ = 1)
AC: 2500VA inductive (cos φ = 0.7)
Maxima 10 A and 300 V
Loaded contact 10,000 operations minimum
Unloaded contact 100,000 operations minimum

Watchdog Contact
Break DC: 30 W resistive
DC: 15 W inductive (L/R = 40ms)
AC: 275 W inductive (cos φ = 0.7)

The maximum number of output relays that should be configured to be permanently


energized is 50% of those available (minimum 4).
1.7 Field Voltage
The field voltage provided by the relay is nominally 48 V dc with a current limit of 112 mA.
The operating range shall be 40 V to 60 V with an alarm raised at <35 V.
1.8 Loop through connections
Terminals D17-D18 and F17-F18 are internally connected together for convenience when
wiring, maxima 5 A and 300 V.
1.9 Wiring requirements
The requirements for the wiring of the relay and cable specifications are detailed in the
installation section of the Operation Guide (Chapter P44x/EN IN).
1.10 Terminals
Optional Rear IRIG-B Interface

• BNC socket

• Isolation to SELV level

• 50 ohm coaxial cable


Optional Rear Fiber Connection for SCADA/DCS

• BFOC 2.5-(ST®)-interface for glass fiber, as per IEC874-10

• 850nm short-haul fibers, one Tx and one Rx

• For Courier IEC870-5-103, DNP3 or MODBUS protocol


Optional Rear Ethernet Connection for IEC 61850

• 10/100 Mbit/s Copper Ethernet (RJ45 connector) and 100 Mbit/s Fibre Optic Ethernet
(SC connector for glass fibre).

• Fibre Optic Ethernet compatible with 850nm multi-mode glass fiber.”


P44x/EN TD/F65 Technical Data

Page 8/34 MiCOM P441/P442 & P444

2. BURDENS
2.1 Current Circuit

CT burden (at nominal current)


1A <0.04 VA
5A <0.4 VA

2.2 Voltage Circuit

Reference voltage (Vn)


Vn = 100/120 V <0.03 VA

2.3 Auxiliary Supply

Case Size Nominal* Maximum**


Size 8 15 W dc 16 W ac 20 W dc 20 W ac
Size 12 18 W dc 19 W ac 26 W dc 26 W ac

* Nominal is with 50% of the optos energised and one relay per board energised
** Maximum is with all optos and all relays energised.
For each energised Opto powered from the Field Voltage or each energised Output Relay:

Each additional energised opto input 0.09 W


(24/27, 30/34, 48/54 V)
Each additional energised opto input 0.12 W (110/125 V)
Each additional energised opto input 0.19 W (220/250 V)
Each additional energised output relay 0.13 W

2.4 Optically-Isolated Inputs


DC Supply 5 mA burden per input (current drawn at rated voltage).
2.5 mA at minimum voltage (30 V)
Maximum input voltage 300 V dc (any setting).
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 9/34

3. ACCURACY
For all accuracies specified, the repeatability is ±2.5% unless otherwise specified.
If no range is specified for the validity of the accuracy, then the specified accuracy shall be
valid over the full setting range.
3.1 Reference Conditions

Quantity Reference conditions Test tolerance


General
Ambient temperature 20 °C ±2°C
Atmospheric pressure 86kPa to 106kPa -
Relative humidity 45 to 75 % -

Input energising quantity


Current In ±5%
Voltage Vn ±5%
Frequency 50 or 60 Hz ±0.5%
Auxiliary supply 48 or 110 V dc ±5%
63.5 or 110 V ac

3.2 Measurement Accuracy

Quantity Range Accuracy


Current 0.1 to 64 In 10 mA or ±1%
Voltage 1.0 Vn ±1%
Frequency 45 to 65 Hz ±0.025 Hz
Phase 0 - 360° ±2°
P44x/EN TD/F65 Technical Data

Page 10/34 MiCOM P441/P442 & P444

3.3 Protection accuracy

Element Range Trigger Reset Timer Accuracy


Distance elements: Zone 1 Accuracy: ±5% ±2ms
Resistance 0 to 400/In Ω
Impedance 0.001/In Ω to 500/In Ω
Distance elements: Other zones Accuracy: ±10% ±2ms
Resistance 0 to 400/In Ω
Impedance 0.001/In Ω to 500/In Ω
Phase Overcurrent elements (I>1, I>2, I>3, I>4) 2 to 20 Is [1] DT: Is±5% 0.95Is±2% greater of ±2% or 20ms
IDMT: 1.05Is±5% 0.95Is±5% greater of ±5% or 40ms
Relay characteristic angle -95° to +95° Accuracy: ±2° 1°
Earth fault measuring elements (IN>1 IN>2 IN>3 IN>4) 2 to 20 Is [2] DT: Is±5% 0.95Is±5% greater of ±2% or 20ms
IDMT: 1.05Is±5% greater of 5% or 40ms
Zero sequence voltage polarisation (Vop>) Accuracy:
Vn = 100/120 V 0.5 - 25V ±10% at RCA ±90° - -
Negative sequence Polarisation: Voltage threshold (V2p>) Accuracy: ±5%
Vn = 100/120 V 0.5 - 25V - -
Negative sequence Polarisation: Current threshold (I2p>) 0.08 - 1.0In Accuracy: ±5% 0.95Is±5% -

Negative Sequence Overcurrent (I2>) 2 to 20 Is [1] Is±5% 0.95Is±5% greater of ±5% or 40ms
Under Current element (I<) 0.2 - 1.2 In Accuracy: ±10% ±5% Above setting: 10ms or less
Below setting: 15ms or less
Under Voltage elements (V<) DT: Vs±5% greater of 2% or 20ms
Vn = 100/120 V 10 - 120V IDMT: 0.95Vs±5% 1.05Vs±5% greater of 5% or 40ms
Over Voltage elements (V>&V>>) DT: Vs±5% greater of 2% or 20ms
Vn = 100/120 V 60 - 185V IDMT: 1.05Vs±5% 0.95Vs±5% greater of 5% or 40ms
Directional Operating Boundary 0 - 360° Accuracy: ±2° - greater of 2% or 20ms
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 11/34

Element Range Trigger Reset Timer Accuracy

⎛ I 2⎞ ⎛ I 2⎞ ⎛ I 2⎞
Broken conductor protection ⎜ ⎟ 0.2 to 1.0 ⎜ ⎟ ±5% 0.95 ⎜ ⎟ ±5% greater of ±2% or 20ms
⎝ I1⎠ ⎝ I1⎠ ⎝ I1⎠
Transient Overreach 2 to 20 Is <5% (for a system - --
X/R of up to 90)
Relay overshoot 2 to 20 Is <50ms - -
Breaker fail timers 0 to 10s - - greater of ±2% or 20ms
P44x/EN TD/F65 Technical Data

Page 12/34 MiCOM P441/P442 & P444

3.4 Thermal Overload Accuracy

Pick-up Thermal alarm Calculated trip time ±10%*


Thermal overload Calculated trip time ±10%*
Cooling time accuracy ±15% of theoretical
Repeatability <5%

* Operating time measured with applied current of 20% above thermal setting.
3.5 Influencing Quantities
No additional errors will be incurred for any of the following influencing quantities:

Quantity Operative range (typical only)


Environmental
Temperature -25°C to +55°C
Mechanical (Vibration, Shock, Bump, According to
Seismic) IEC 60255-21-1:1988
IEC 60255-21-2:1988
IEC 60255-21-3:1995

Quantity Operative range


Electrical
Frequency 45 Hz to 65 Hz
Harmonics (single) 5% over the range 2nd to 17th
Auxiliary voltage range 0.8 LV to 1.2 HV (dc)
0.8 LV to 1.1 HV (ac)
Aux. supply ripple 12% Vn with a frequency of 2.fn
Point on wave of fault waveform 0 - 360°
DC offset of fault waveform No offset to fully offset
Phase angle -90° to + 90°
Magnetising inrush No operation with OC elements set to 35% of
peak anticipated inrush level.

3.6 High Voltage Withstand IEC60255-5:1977


3.6.1 Dielectric Withstand
2.0 kVrms for one minute between all terminals and case earth.
2.0 kVrms for one minute between all terminals of each independent circuit grouped together
and all other terminals. This includes the output contacts and loop through connections
D17/D18 and E17/E18.
1.5 kVrms for one minute across dedicated normally open contacts of output relays.
1.0 kVrms for 1 minute across normally open contacts of changeover pairs and watchdog
outputs.
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 13/34

3.6.2 Impulse

The product will withstand without damage impulses of 5 kV peak, 1.2/50 µs, 0.5 J across:
Each independent circuit and the case with the terminals of each independent circuit
connected together.
Independent circuits with the terminals of each independent circuit connected together.
Terminals of the same circuit except normally open metallic contacts.
3.6.3 Insulation Resistance

The insulation resistance is greater than 100 MΩ at 500 Vdc.


P44x/EN TD/F65 Technical Data

Page 14/34 MiCOM P441/P442 & P444

4. ENVIRONMENTAL COMPLIANCE
The product complies with the following specifications:
4.1 Electrical Environment
4.1.1 DC Supply Interruptions IEC60255-11:1979
The product will withstand a 20 ms interruption in the auxiliary voltage in its quiescent
condition.
4.1.2 AC Ripple on DC Supply IEC60255-11:1979
The product will operate with 12% AC ripple on the DC auxiliary supply without any
additional measurement errors.
4.1.3 Disturbances on AC Supply - EN61000-4-11:1994
The products satisfies the requirements of EN61000-4-11 for voltage dips and short
interruptions.
4.1.4 High Frequency Disturbance IEC60255-22-1:1988
The product complies with Class III 2.5 kV common mode and 1 kV differential mode for 2
seconds at 1 MHz with 200 Ω source impedance, without any mal-operations or additional
measurement errors.
4.1.5 Fast Transient IEC60255-22-4:1992
The product complies with all classes up to and including class IV / 4 kV without any mal-
operations or additional measurement errors.

Fast transient disturbances on power supply 4 kV, 5 ns rise time, 50 ns decay time, 5 kHz
(common mode only) repetition frequency, 15 ms burst, repeated
every 300 ms for 1 min in each polarity, with
a 50 Ω source impedance.
Fast transient disturbances on I/O signal, 4 kV, 5 ns rise time, 50 ns decay time, 5 kHz
data and control lines (common mode only) repetition frequency, 15 ms burst, repeated
every 300 ms for 1 min in each polarity, with
a 50 Ω source impedance.

4.1.6 Electrostatic Discharge IEC60255-22-2:1996


The product will withstand application of all discharge levels up to the following without mal-
operation:
Class IV– 15 kV discharge in air to the user interface, display and exposed metal work.
Class III– 8 kV discharge in air to all communication ports, 6 kV point contact discharge to
any part of the front of the product.
4.1.7 Conducted Emissions EN 55011:1991
Group 1 Class A limits.

0.15 - 0.5 MHz, 79 dBµV (quasi peak) 66 dBµV (average).

0.5 – 30 MHz, 73 dBµV (quasi peak) 60 dBµV (average).


4.1.8 Radiated Emissions EN 55011:1991
Group 1 Class A limits.

30 – 230 MHz, 40 dBµV/m at 10 m measurement distance.

230 – 1000 MHz, 47 dBµV/m at 10 m measurement distance.


Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 15/34

4.1.9 Radiated Immunity IEC60255-22-3:1989


Class/Level III/3 – 10 V/m at 1 kHz 80% am., 20 MHz to 1 GHz.
4.1.10 Conducted Immunity IEC61000-4-6:1996
Level 3 – 10 Vrms at 1 kHz 80% am.- 0.15 to 80 MHz.
4.1.11 Surge Immunity IEC61000-4-5:1995
Level 4 – 4 kV peak, 1.2/50 µs between all groups and case earth
2 kV peak, 1.2/50 µs between terminals of each group.
4.1.12 EMC Compliance
Compliance to the European Community Directive 89/336/EEC on EMC is claimed via the
Technical Construction File route.
Generic Standards EN 50081-2 :1994 and EN 50082-2 :1995 are used to establish
conformity.
4.1.13 Power Frequency Interference - Electricity Association (UK)
EA PAP Document, Environmental Test Requirements for Protection Relays and Systems
Issue I, Draft 4.2.1 1995.

Class Length of comms Unbalanced Balanced Comms Balanced Comms


circuit Comms Vrms (Unbalance 1%) (Unbalance 0.1%)
Vrms Vrms
1 1 to 10 m 0.5 0.005 0.0005
2 10 to 100 m 5 0.05 0.005
3 100 to 1000 m 50 0.5 0.05
4 >1000 m 500 5 0.5

4.2 Atmospheric Environment


4.2.1 Temperature IEC60255-6:1988
Storage and transit –25°C to +70°C.
Operating –25°C to +55°C.
IEC60068-2-1:1990 Cold
IEC60068-2-2:1974 Dry heat
4.2.2 Humidity IEC60068-2-3:1969
56 days at 93% relative humidity and 40°C.
4.2.3 Enclosure Protection IEC60529:1989
IP52 Protection (front panel) against dust and dripping water.
4.2.4 Pollution degree IEC61010-1:1990/A2:1995
Normally only non conductive pollution occurs. Occasionally a temporary conductivity
caused by condensation must be expected.
P44x/EN TD/F65 Technical Data

Page 16/34 MiCOM P441/P442 & P444

4.3 Mechanical Environment


4.3.1 Vibration IEC60255-21-1:1988
Vibration Response Class 2 - 1g
Vibration Endurance Class 2 - 2g.
4.3.2 Shock and Bump IEC60255-21-2:1988
Shock response Class 2 - 10g
Shock withstand Class 1 - 15g
Bump Class 1 - 10g
4.3.3 Seismic IEC60255-21-3:1993
Class 2.
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 17/34

5. ANSI TEST REQUIREMENTS


The products shall meet the ANSI / IEEE requirements as follows:-
5.1 ANSI / IEEE C37.90.1989
Standards for relays and relay systems associated with electric power apparatus.
5.2 ANSI / IEEE C37.90.1: 1989
Surge withstand capability (SWC) tests for protective relays and relay systems:-
Oscillatory test – 1 MHz to 1.5 MHz, 2.5 kV to 3.0 kV,
Fast transient test 4 kV to 5 kV
5.3 ANSI / IEEE C37.90.2: 1995
Standard for withstand capability of relay systems to radiated electromagnetic interference
from transceivers: 35 V/m, 25 to 1000 MHz.
P44x/EN TD/F65 Technical Data

Page 18/34 MiCOM P441/P442 & P444

6. PROTECTION SETTING RANGES


6.1 Distance Protection
6.1.1 Line Settings

Setting Range Step size


Length of line (Ln) 0.3 - 1000 km 0.010 km
0.2 - 625 miles 0.005 miles
Positive sequence angle (ϑ1) –90° - 90° 0.1°

In = 1 A In = 5 A
Setting Range Step size Range Step size
Positive sequence impedance (Z1) 0.001 - 500 Ω 0.001 Ω 0.0002 - 100,0 Ω 0.0002 Ω

6.1.2 Zone settings

Setting In = 1 A In = 5 A
Range Step size Range Step size
Impedance reaches 0.001 - 500 Ω 0.001 Ω 0.0002 - 100 Ω 0.0002 Ω
(Zones 1, 2, 3, P, Q, 4)
Resistive reaches for phase - 0 - 400 Ω 0.01 Ω 0 - 80 Ω 0.002 Ω
earth faults
(Zones 1, 2, 3, P, Q, 4)
Resistive reaches for phase - 0 - 400 Ω 0.01 Ω 0 - 80 Ω 0.002 Ω
earth faults
(Zones 1, 2, 3, P, Q, 4)

Setting Range Step size


Residual compensation angles –180-180° 0.1°
(Zones 1, 2, 3&4, P, Q)
Residual compensation factors 0-7 0.001
(Zones 1, 2, 3&4, P, Q)
Timer for zone 1/1X 0 - 10s 0.002 s
Timers for Zones 2, 3, P, Q, 4 0 - 10s 0.01 s
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 19/34

6.1.3 Power-swing settings

In = 1 A In = 5 A
Setting Range Step size Range Step size
Powerswing detection boundaries:
Delta R 0 - 400 Ω 0.01 Ω 0 - 80 Ω 0.002 Ω
Delta X 0 - 400 Ω 0.01 Ω 0 - 80 Ω 0.002 Ω

Setting Range Step size


Imax line In - 20 In 0.01 In
IN threshold 10 - 100 % Imax 1% Imax
IN> (% Imax) 10-100% 1%
I2 threshold 10 - 100 % Imax 1% Imax
I2> (% Imax) 10-100% 1%
Imax line > Status Disabled or Enabled -
I max line > 1 x In – 20 x In 0.01 x In
Delta I Status Disabled or Enabled -
Trip mode Single/Three pole -
Unblocking time delay 0 - 30s 0.1 s
Power-swing detection boundary 0 - 25 Ω 0.01 Ω
Block zones Bit 0: Z1&Z1X-Block, Bit 1: Z2 block, Bit 2: Zp Block,
Bit 3: Zq Block, Bit 4: Z3 Block, Z5: Z4 Block
Out of Step 1 - 255 1
Stable swing 1 - 255 1

6.2 Distance protection schemes


Basic scheme functions: Instantaneous zone 1 tripping
Time delayed tripping for all zones
Directional earth fault protection
Zero sequence Power protection (since B1.0)
Switch on to fault logic
Trip on reclose logic
Loss of load logic
Conversion to three pole tripping
Channel-aided distance schemes: Permissive Overreach Protection with Overreaching
Zone 1 (POP Z1)
Permissive Overreach Protection with Overreaching
Zone 2 (POP Z2)
Permissive Underreach Protection, Accelerating
Zone 2 (PUP Z2)
Permissive Underreach Protection Tripping via
Forward Start (PUP Fwd)
Blocking Overreach Protection with Overreaching
Zone 1 (BOP Z1)
P44x/EN TD/F65 Technical Data

Page 20/34 MiCOM P441/P442 & P444

Blocking Overreach Protection with Overreaching


Zone 2 (BOP Z2)
Permissive Scheme Unblocking Logic
Permissive Overreach Schemes Weak Infeed
Features
Permissive Overreach Schemes Current Reversal
Guard
Blocking Scheme Current Reversal Guard
6.2.1 Programmable distance schemes

Setting Range
Signal Send Zone No Signal Send/ Signal send on Z1/ Signal send on Z2/
Signal send on Z4
Type of Scheme on signal None/ None+Z1X/ Aided scheme for Z1 faults/ Aided
Receive scheme for Z2 faults/ Aided scheme for forward faults/
Blocking scheme for Z1 faults/ Blocking scheme for Z2
faults

6.2.2 Distance schemes settings

Setting Range Step size


Fault Type/Signal Send Zone Phase-to-Ground Fault Enabled/ -
Phase-to-Phase Fault Enabled/ Both
Enabled
Trip mode for the distance Force 3 Pole Trip for all zones/ -
protection 1 Pole Trip for zone Z1/
1 Pole trip for zones Z1 and Z2
Signal Receive Time-Delay for 0–1s 0,002 s
Blocking Schemes (Tp)
Time Delay for Reversal Guard 0 - 0,15 s 0,002 s
Unblocking Logic/ Type of TAC None (no control of Signal Receive)/ -
Receive Loss of carrier/
Loss of Guard (HF Presence)
SOTF Delay 10 – 3600 s 1.000 s
TOR-SOTF Mode TOR: -
Z1 enable/ Z2 enable/ Z3 enable/
All zones enable/
Distance scheme enable
SOTF:
AllZones/ Lev.Detect./ Z1 enable/ Z2
enable/ Z3 enable/ Z1+Rev en/
Z2+Rev en/ Dist Scheme/ Disable
SOTF Delay 10-3600s 110s

6.2.3 Weak infeed settings

Setting Range Step size


WI :Mode Status Disabled/ Echo/ Trip&Echo/PAP -
WI : Single Pole Trip Disabled/ Enabled -
WI: Single pole Disabled/Enabled -
WI : V< Thres. 10 – 70 V 5V
WI : Trip Time Delay 0–1s 0,00 2s
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 21/34

6.2.4 Protection Antenne Passive (RTE Feature)

Setting Range Step size


PAP : Del Trip En Disabled/Enabled -
PAP P1 (or P2 or P3) Disabled/Enabled -
PAP: 1P / 2P / 3P Time Del 0.1 – 1500 s 0.1
PAP: IN Thres 0.1 – 1 A 0.01 A
PAP: K (%Vn) 500e-3 - 1 500e-3

6.2.5 Loss of load settings

Setting Range Step Size


Mode status Disabled or enabled
Chan. Fail Disabled or enabled
I< 0.05 - 1 In 0.05 In
Window 0.01s - 0.1 s 0.01 s

NOTE: For detailed information on distance schemes, please refer to Chapter


P44x/EN AP - Application notes.
6.3 Back-up Overcurrent Protection
6.3.1 Threshold Settings

Setting Stage Range Step size


I>1 Current Set 1st Stage 0.08 - 4.0 In 0.01 In
I>2 Current Set 2nd Stage 0.08 - 4.0 In 0.01 In
I>3 Current Set TOR/SOTF protection 0.08 - 32 In 0.01 In
I>4 Current Set Stub bus protection 0.08 - 32 In 0.01 In

6.3.2 Time Delay Settings


Each overcurrent element has an independent time setting and each time delay can be
blocked by an optically isolated input:

Element Time delay type


1st Stage Definite Time (DT) or
IDMT(IEC/UK/IEEE/US curves)
2nd Stage DT or IDMT
3rd Stage DT
4th Stage DT

6.3.3 Inverse Time (IDMT) Characteristic


IDMT characteristics are selectable from a choice of four IEC/UK and five IEEE/US curves
as shown in the table below.
The IEC/UK IDMT curves conform to the following formula:
K
t = TMS ×
(I/Is)α–1
P44x/EN TD/F65 Technical Data

Page 22/34 MiCOM P441/P442 & P444

The IEEE/US IDMT curves conform to the following formula:

TD ⎛ K ⎞
t= × ⎜ + L ⎟
7 ⎜ (I/I ) − 1 ⎟
α
⎝ S ⎠
Where
t = operation time
K = constant
I = measured current
IS = current threshold setting

α = constant
L = ANSI/IEEE constant (zero for IEC/UK curves)
TMS = Time Multiplier Setting for IEC/UK curves
TD = Time Dial Setting for IEEE/US curves

IDMT Curve description Standard K Constant α Constant L Constant


Standard Inverse IEC 0.14 0.02
Very Inverse IEC 13.5 1
Extremely Inverse IEC 80 2
Long Time Inverse UK 120 1
Moderately Inverse IEEE 0.0515 0.02 0.114
Very Inverse IEEE 19.61 2 0.491
Extremely Inverse IEEE 28.2 2 0.1217
Inverse US-C08 5.95 2 0.18
Short Time Inverse US-C02 0.02394 0.02 0.01694

IDMT Characteristics

Name Range Step Size


TMS 0.025 to 1.2 0.025

Time Multiplier Settings for IEC/UK curves

Name Range Step Size


TD 0.5 to 15 0.1

Time Dial Settings for IEEE/US curves


6.3.3.1 Definite Time Characteristic

Element Range Step Size


All stages 0 to 100 s 10 ms

6.3.3.2 Reset Characteristics


Reset options for IDMT stages:

Curve type Reset time delay


IEC / UK curves DT only
All other IDMT or DT
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 23/34

The Inverse Reset characteristics are dependent upon the selected IEEE/US IDMT curve as
shown in the table below. Thus if IDMT reset is selected the curve selection and Time Dial
setting will apply to both operate and reset.
All inverse reset curves conform to the following formula:

⎛ TD ⎞ ⎛⎜ tr ⎞

t Re set = ⎜ ⎟ ×⎜ α ⎟
⎝ 7 ⎠ ⎝ 1− (I I ) ⎠
S

Where
tReset = reset time
tr = constant
I = measured current
IS = current threshold setting
α = constant
TD = Time Dial Setting (Same setting as that employed by IDMT curve)

IEEE/US IDMT Curve description Standard tr Constant α Constant


Moderately Inverse IEEE 0.0515 0.02
Very Inverse IEEE 19.61 2
Extremely Inverse IEEE 28.2 2
Inverse US-C08 5.95 2
Short Time Inverse US-C02 0.02394 0.02

Inverse Reset Characteristics


6.4 Negative sequence overcurrent protection

Setting Range Step size


I2> Current Set 0.08 - 4.0In 0.01 In
I2> time Delay 0 - 100s 0.01 s
Directional None/ Fwd/ Rev
I2> Char Angle –95° - +95° 1°
I2>1 Function Disabled, DT, IEC S Inverse, IEC V Inverse, IEC E
Inverse, UK LT Inverse, IEEE M Inverse, IEEE V
Inverse, IEEE E Inverse, US Inverse, US ST Inverse
I2>1 Directional Non-directional, Directional FWD, Directional REV
I2>1 VTS Block Block, Non-directional -
I2>1 Current Set 80mA – 10 A 10 mA
I2>1 Time Delay 0 – 100 s 10 ms
I2>1 Time VTS 0 – 100 e-3 0.01 e-3
I2>1 TMS 0.025 – 1.200 0.01
I2>1 Time Dial 0.01 – 100 0.01
I2>1 Reset Char DT or inverse -
I2>1 tReset 0 – 100 s 0.01 s
I2>2 Function Disabled, DT, IEC S Inverse, IEC V Inverse, IEC E
Inverse, UK LT Inverse, IEEE M Inverse, IEEE V
Inverse, IEEE E Inverse, US Inverse, US ST Inverse
P44x/EN TD/F65 Technical Data

Page 24/34 MiCOM P441/P442 & P444

Setting Range Step size


I2>2 Directional Non-directional, Directional FWD, Directional REV
I2>2 VTS Block Block, Non-directional -
I2>2 Current Set 80mA – 10 A 10 mA
I2>2 Time Delay 0 – 100 s 10 ms
I2>2 Time VTS 0 – 100 e-3 0.01 e-3
I2>2 TMS 0.025 – 1.200 0.01
I2>2 Time Dial 0.01 – 100 0.01
I2>2 Reset Char DT or inverse -
I2>2 tReset 0 – 100 s 0.01 s
I2>3 Status Disabled or Enabled -
I2>3 Directional Non-directional, Directional FWD, Directional REV
I2>3 VTS Block Block, Non-directional -
I2>3 Current Set 80mA – 10 A 10 mA
I2>3 Time Delay 0 – 100 s 10 ms
I2>3 Time VTS 0 – 100 e-3 200 e-3
I2>4 Status Disabled or Enabled -
I2>4 Directional Non-directional, Directional FWD, Directional REV
I2>4 VTS Block Block, Non-directional -
I2>4 Current Set 80 mA – 32 A 10 mA
I2>4 Time Delay 0 – 100 s 10 s

6.5 Broken Conductor Protection

Settings Range Step size


I2/I1 Setting 0.2 - 1.0 0.01
I2/I1 Time Delay 0 - 100s 0.1 s
I2/I1 Trip Enabled / Disabled

6.6 Earth Fault Overcurrent Protection


6.6.1 Threshold Settings

Setting Range Step Size


IN>1 Current Set 80 mA – 10 A 10 mA
IN>2 Current Set 80 mA – 10 A 10 mA

6.6.2 Polarising Quantities For Earth Fault Measuring Elements


The polarising quantity for earth fault elements can be either zero sequence or negative
sequence values.

Setting Range Step Size


IN> Char angle –95° to +95° 1°
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 25/34

6.6.3 Time Delay Characteristics


The time delay options for the two earth fault elements are identical, stage 1 may be
selected to be either IDMT or definite time. Stage 2 will provide a definite time delay. The
settings and IDMT characteristics are identical to those specified for the phase overcurrent
elements. The setting range for the definite time delayed element is as specified below:
Definite Time Characteristic

Element Range Step Size


All stages 0 to 200 s 0.01 s

6.7 Residual overvoltage

Setting Range Step Size


VN>1 Function DT/Enabled/Disabled. -
VN>1 Voltage Set 1 – 80V 1V
VN>1 Time Delay 0 – 100s 0.01s
VN>1 TMS 0.5 – 100s 0.5s
VN>1 tReset 0 -100 0.5
VN>2 Status Enabled/Disabled -
VN>2 Voltage Set 1 – 80V 1V
VN>2 Time Delay 0 – 100s 0.01s

6.8 Zero sequence Power Protection (since B1.0)


Threshold Settings

Setting Range Step Size


Po Status Enabled/Disabled. -
Time Delay Fact. 0–2s 0.200 s
Fix Time Delay 0 – 10 s 0.010 s
IN current set 0.05 - 4 In 0.01 In
P0 Threshold 0.05 - 1INn 0.1 INn
Residual power

6.9 Channel Aided Directional Earth Fault Protection


6.9.1 Threshold Settings

Setting Range Step Size


Polarisation Zero seq. / Neg. seq. -
V> Voltage Set 0.500 - 20 V 0.010 V
(Vn = 100/120 V)
IN Forward 0.05 - 4 In 0.01 In
Teleprotection Time delay 0 - 10 s 0.1 s
Scheme logic Shared / Blocking / Permissive
Tripping Any Phase / Three Phases
Tp 0 – 1s 2ms
IN Rev Factor 0 – 10e-3 0.1e-3
P44x/EN TD/F65 Technical Data

Page 26/34 MiCOM P441/P442 & P444

6.10 Under Voltage Protection


6.10.1 Threshold Settings

Setting Range Step Size


V<1 Voltage Set 10 - 120 V 1V
(Vn = 100/120V)
V<2 Voltage Set 10 - 120 V 1V
(Vn = 100/120V)

6.10.2 Under Voltage Protection Time Delay Characteristics


The Under voltage measuring elements are followed by an independently selectable time
delay. The first stage has a time delay characteristics selectable as either Inverse Time or
Definite Time. The second stage has an associated Definite Time delay setting.
Each measuring element time delay can be blocked by the operation of a user defined logic
(optical isolated) input.
The inverse characteristic is defined by the following formula :

K
t=
(1 − M )
Where
K = Time Multiplier Setting
T = Operating time in seconds
M = Applied input voltage / Relay setting voltage (Vs)

Setting Range Step Size


DT setting 0 - 100 s 0.01 s
TMS Setting (K) 0.5 - 100 0.5

Definite time and TMS setting ranges


6.11 Over Voltage Protection
6.11.1 Threshold Settings

Setting Range Step Size


V>1 Voltage Set 60 - 185 V 1V
(Vn = 100/120V)
V>2 Voltage Set 60 - 185 V 1V
(Vn = 100/120V)

6.11.2 Time Delay Characteristics


The Overvoltage measuring elements are followed by an independently selectable time
delay. The first stage has a time delay characteristics selectable as either Inverse Time or
Definite Time. The second stage has an associated Definite Time delay setting.
Each measuring element time delay can be blocked by the operation of a user defined logic
(optical isolated) input.
The inverse characteristic is defined by the following formula :

K
t=
( M − 1)
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 27/34

Where
K = Time Multiplier Setting
T = Operating time in seconds
M = Applied input voltage / Relay setting voltage (Vs)

Setting Range Step Size


DT setting 0 - 100 s 0.01 s
TMS Setting (K) 0.5 - 100 s 0.5

Definite time and TMS setting ranges


6.12 Voltage Transformer Supervision

Setting Range Step Size


VTS Time Delay 1.0 - 20 s 1s
3 phase undervoltage threshold 10 - 70 V 1V
VTS I2> & I0> Inhibit 0 - 1 In 0.01 In
Superimposed current Delta I> 0.01 - 5 A 0.01 A

6.13 Capacitive Voltage Transformer Supervision (since B1.0)

Setting Range Step Size


CVTS status Enabled / Disabled
CVTS VN> 0.500 - 22 V 0.500 V
CVTS Time Delay 0 – 300 s 1s

6.14 Current Transformer Supervision

Setting Range Step size


CTS VN< Inhibit 0.5 - 22 V (for Vn = 100/120V) 0.5 V
CTS IN> Set 0.08 - 4 In 0.01 In
CTS Time Delay 0 - 10 s 1s

6.15 Undercurrent Element


This element is used by the breaker fail and circuit breaker monitoring functions of the relay.

Name Range Step size


I< Current Set 0.05 – 3.2 In 0.050 In
P44x/EN TD/F65 Technical Data

Page 28/34 MiCOM P441/P442 & P444

6.16 Breaker Fail Timers (TBF1 and TBF2)


There are two stages of breaker fail that can be used to re-trip the breaker and back trip in
the case of a circuit breaker fail. The timers are reset if the breaker opens, this is generally
detected by the undercurrent elements. Other methods of detection can be employed for
certain types of trip (see Application notes Volume 1 Chapter 2).

Timer Setting range Step


tBF1 0 - 10 s 0.005 s
tBF2 0 - 10 s 0.005 s
CBF non Current reset I<Only/ CB open&I</ Prot
Reset&I</ Disable/ Prot Reset Or I<
CBF Ext reset I<Only/ CB open&I</ Prot
Reset&I</ Disable/ Prot Reset Or I<
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 29/34

7. MEASUREMENT SETTINGS
7.1 Disturbance Recorder Settings

Setting Range Step


Record Length 0 - 10.5 s 0.1 s
Trigger position 0 - 100% 0.1%
Trigger mode Single / Extended
Sample Rate 12 Samples/Cycle Fixed
Digital Signals Selectable from logic inputs and outputs and internal
signals
Trigger Logic Each of the digital inputs can be selected to trigger a
record

7.2 Fault Locator Settings

Setting Range Step size


Mutual compensation factor 0 to 7.000 0.001
Mutual compensation angle 0 to 360° 1°
P44x/EN TD/F65 Technical Data

Page 30/34 MiCOM P441/P442 & P444

8. CONTROL FUNCTION SETTINGS


8.1 Communications Settings

Front port Communication Parameters (Fixed)


Protocol Courier
Address 1
Message format IEC60870FT1.2
Baud rate 19200 bits/s

Rear port settings Setting options Setting available for:


Physical link RS485 or Fibre optic IEC only
Remote address 0 - 255 (step 1) IEC / Courier
Modbus address 1 - 247 (step 1) Modbus only
Baud rate 9 600 or 19 200 bits/s IEC only
Baud rate 9 600, 19 200 or 38 400 bits/s Modbus only
Inactivity timer 1 - 30 minutes (step 1) All
Parity “Odd”, “Even” or “None” Modbus only
Measurement period 1 - 60 minutes (step 1) IEC only

8.2 Auto-Reclose
8.2.1 Options
The Auto-recloser in the distance protection allows either single* or three pole for the first
shot. The following shots are three pole only. Due to the complexity of the logic the
Application notes should be referred to.
NOTE: *P442 and P444 only
8.2.2 Auto-recloser settings

Setting Range Step Size


AUTORECLOSE ENABLE/DISABLE
(Configuration Setting)
Number of Shots 1, 1/3, 1/3/3, 1/3/3/3 1
3, 3/3, 3/3/3, 3/3/3/3
1P Dead Time 0.1 - 5 s 0.01 s
3P Dead Time 0. 1 - 60 s 0.01 s
Dead Time 2 1 - 3600 s 1s
Dead Time 3 1 - 3600 s 1s
Dead Time 4 1 - 3600 s 1s
Healthy Window 0.01 - 9999 s 0.01 s (in CB control)
Reclaim Time 1 - 600 s 1s
Discrimination time 0.1 - 5 s 0.01 s
A/R Inhibit Window 1 - 3600 s 1s
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 31/34

Setting Range Step Size


Block auto-recloser At T2
At T3
At Tzp
LoL Trip
I2> Trip
I>1 Trip
I>2 Trip
V<1 Trip
V<2 Trip
V>1 Trip
V>2 trip
IN>1 Trip
IN>2 Trip
Aided DEF Trip
AR Close pulse length 0.1 to 10 s 0.1 s

Check synchronic settings

Setting Range Step Size


C/S Check Scheme for A/R Bit 0: Live Bus/Dead Line,
Bit 1: Dead Bus/Live Line
Bit 2: Live Bus/Live Line.
Dead Bus/Dead Line with special PSL
C/S Check Scheme for Man Bit 0: Live Bus/Dead Line,
CB Bit 1: Dead Bus/Live Line
Bit 2: Live Bus/Live Line.
Dead Bus/Dead Line with special PSL
V< Dead Line 5 - 30 V 1V
V> Live Line 30 - 120 V 1V
V< Dead Bus 5 - 30 V 1V
V> Live Bus 30 - 120 V 1V
Diff Voltage 0.5 - 40 V 0.1 V
Diff Frequency 0.02 - 1 Hz 0.01 Hz
Diff Phase 5° - 90° 2.5°
Bus-Line Delay 0.1 - 2s 0.1 s

8.3 Circuit Breaker State Monitoring


The relay can monitor the state of the circuit breaker using either a 52a or 52b signal, it is
possible to select which of these is being used on the relay menu. If the menu is used to
select the ‘Both 52a and 52b’ option is selected then a discrepancy alarm can be detected. If
these contacts remain simultaneously open or simultaneously closed for >5s, then the CB
Status alarm will be indicated.
P44x/EN TD/F65 Technical Data

Page 32/34 MiCOM P441/P442 & P444

8.4 Circuit Breaker Control

Name Range Step size


CB Control by Disabled/
Local/
Remote/
Local+Remote/
Opto/
Opto+local/
Opto+Remote/
Opto+Rem+local
Manual close pulse time 0.1 - 10 s 0.01 s
Trip pulse time 0.1 - 5 s 0.01 s
Man Close Delay 0.01 - 600 s 0.01 s
Healthy Windows 0.01 - 9999 0.01
C/S Window 0.01 - 9999 0.01
AR single pole Disabled/Enabled -
AR three pole Disabled/Enabled -

8.5 Circuit Breaker Condition Monitoring


8.5.1 Maintenance alarm settings

Name Range Step size


I^ Maintenance 1 to 25000 A 1A Summated
broken current
No. of CB Ops Maint 1- 10000 1
CB Time Maint 5 – 500 ms 1 ms Circuit breaker
opening time

8.5.2 Lockout Alarm Settings

Name Range Step size


I^ threshold 1 - 25000 1
No. of CB Ops Lock 1- 10000 1
CB Time Lockout 5 - 500 ms 1 ms
Fault Freq Count 0 - 9999 1
Fault Freq Time 0 - 9999 s 1s
Lockout reset by CB close, User Interface
Manual close reset delay 0.01 - 600 s 0.01 s
Technical Data P44x/EN TD/F65

MiCOM P441/P442 & P444 Page 33/34

8.6 Programmable Logic


The programmable logic is not editable from the relay menu, a dedicated support package is
provided as part of the MiCOM S1 support software. This is a graphical editor for the
programmable logic. The features of the programmable logic are more fully described within
the application section of the user manual. As part of the logic each output contact has a
programmable conditioner/timer, there are also eight general purpose timers for use in the
logic.
The output conditioners and the general-purpose timers have the following setting range:

Time Range Step size


t1 to t8 0 to 4 hours 0.001 s

8.7 CT and VT Ratio Settings


The primary and secondary rating can be independently set for each set of CT or VT inputs,
for example the earth fault CT ratio can be different to that used for the phase currents.

Primary range Secondary range


Current transformer 1 - 30000 A 1 or 5 A
step size 1 A
Voltage transformer 100 V - 1000 kV 80 - 140 V
step size 1 V step size 1 V
P44x/EN TD/F65 Technical Data

Page 34/34 MiCOM P441/P442 & P444

BLANK PAGE
Installation P44x/EN IN/F65

MiCOM P441/P442 & P444

INSTALLATION
Installation P44x/EN IN/F65

MiCOM P441/P442 & P444 Page 1/10

CONTENT

1. RECEIPT OF RELAYS 3

2. STORAGE 3

3. UNPACKING 3

4. RELAY MOUNTING 4
4.1 Rack mounting 5
4.2 Panel mounting 6

5. RELAY WIRING 8
5.1 Medium and heavy duty terminal block connections 8
5.2 RS485 port 8
5.3 IRIG-B connections (if applicable) 9
5.4 RS232 port 9
5.5 Download/monitor port 9
5.6 Earth connection 9
P44x/EN IN/F65 Installation

Page 2/10 MiCOM P441/P442 & P444

BLANK PAGE
Installation P44x/EN IN/F65

MiCOM P441/P442 & P444 Page 3/10

1. RECEIPT OF RELAYS
Protective relays, although generally of robust construction, require careful treatment prior to
installation on site. Upon receipt, relays should be examined immediately to ensure no
external damage has been sustained in transit.
If damage has been sustained, a claim should be made to the transport contractor and
AREVA T&D Protection & Control should be promptly notified.
Relays that are supplied unmounted and not intended for immediate installation should be
returned to their protective polythene bags and delivery carton.
Section 3 of this chapter gives more information about the storage of relays.

2. STORAGE
If relays are not to be installed immediately upon receipt, they should be stored in a place
free from dust and moisture in their original cartons. Where de-humidifier bags have been
included in the packing they should be retained. The action of the de-humidifier crystals will
be impaired if the bag is exposed to ambient conditions and may be restored by gently
heating the bag for about an hour prior to replacing it in the carton.
To prevent battery drain during transportation and storage a battery isolation strip is fitted
during manufacture. With the lower access cover open, presence of the battery isolation strip
can be checked by a red tab protruding from the positive side.
Care should be taken on subsequent unpacking that any dust which has collected on the
carton does not fall inside. In locations of high humidity the carton and packing may become
impregnated with moisture and the de-humidifier crystals will lose their efficiency.
Prior to installation, relays should be stored at a temperature of between –25˚C to +70˚C.

3. UNPACKING
Care must be taken when unpacking and installing the relays so that none of the parts are
damaged and additional components are not accidentally left in the packing or lost.
NOTE: With the lower access cover open, the red tab of the battery isolation
strip will be seen protruding from the positive side of the battery
compartment. Do not remove this strip because it prevents battery
drain during transportation and storage and will be removed as part of
the commissioning tests.
Relays must only be handled by skilled persons.
The site should be well lit to facilitate inspection, clean, dry and reasonably free from dust
and excessive vibration. This particularly applies to installations which are being carried out
at the same time as construction work.
P44x/EN IN/F65 Installation

Page 4/10 MiCOM P441/P442 & P444

4. RELAY MOUNTING
MiCOM relays are dispatched either individually or as part of a panel/rack assembly.
Individual relays are normally supplied with an outline diagram showing the dimensions for
panel cut-outs and hole centres. This information can also be found in the product
publication.
Secondary front covers can also be supplied as an option item to prevent unauthorised
changing of settings and alarm status. They are available in sizes 40TE (GN0037 001) and
60TE (GN0038 001). Note that the 60TE cover also fits the 80TE case size of the relay.
The design of the relay is such that the fixing holes in the mounting flanges are only
accessible when the access covers are open and hidden from sight when the covers are
closed.
If a P991 or MMLG test block is to be included, it is recommended that, when viewed from
the front, it is positioned on the right-hand side of the relay (or relays) with which it is
associated. This minimises the wiring between the relay and test block, and allows the
correct test block to be easily identified during commissioning and maintenance tests.

P0146XXa

FIGURE 1 - LOCATION OF BATTERY ISOLATION STRIP


If it is necessary to test correct relay operation during the installation, the battery isolation
strip can be removed but should be replaced if commissioning of the scheme is not
imminent. This will prevent unnecessary battery drain during transportation to site and
installation. The red tab of the isolation strip can be seen protruding from the positive side of
the battery compartment when the lower access cover is open. To remove the isolation strip,
pull the red tab whilst lightly pressing the battery to prevent it falling out of the compartment.
When replacing the battery isolation strip, ensure that the strip is refitted as shown in figure
1, ie. with the strip behind the battery with the red tab protruding.
Installation P44x/EN IN/F65

MiCOM P441/P442 & P444 Page 5/10

4.1 Rack mounting


MiCOM relays may be rack mounted using single tier rack frames (our part number FX0021
001), as illustrated in figure 2. These frames have been designed to have dimensions in
accordance with IEC60297 and are supplied pre-assembled ready to use. On a standard
483mm (19”) rack system this enables combinations of widths of case up to a total
equivalent of size 80TE to be mounted side by side.
P545 and P546 relays in 80TE cases are also available as direct 19” rack mounting ordering
variants, having mounted flanges similar to those shown in figure 2.
The two horizontal rails of the rack frame have holes drilled at approximately 26mm intervals
and the relays are attached via their mounting flanges using M4 Taptite self-tapping screws
with captive 3mm thick washers (also known as a SEMS unit). These fastenings are
available in packs of 5 (our part number ZA0005 104).
NOTE: Conventional self-tapping screws, including those supplied for
mounting MIDOS relays, have marginally larger heads which can
damage the front cover moulding if used.
Once the tier is complete, the frames are fastened into the racks using mounting angles at
each end of the tier.

P0147XXa

FIGURE 2 - RACK MOUNTING OF RELAYS


Relays can be mechanically grouped into single tier (4U) or multi-tier arrangements by
means of the rack frame. This enables schemes using products from the MiCOM and
MiDOS product ranges to be pre-wired together prior to mounting.
Where the case size summation is less than 80TE on any tier, or space is to be left for
installation of future relays, blanking plates may be used. These plates can also be used to
mount ancillary components. Table 1 shows the sizes that can be ordered.
P44x/EN IN/F65 Installation

Page 6/10 MiCOM P441/P442 & P444

Further details on mounting MiDOS relays can be found in publication R7012, “MiDOS Parts
Catalogue and Assembly Instructions”.

Case size summation Blanking plate part number


5TE GJ2028 001
10TE GJ2028 002
15TE GJ2028 003
20TE GJ2028 004
25TE GJ2028 005
30TE GJ2028 006
35TE GJ2028 007
40TE GJ2028 008

TABLE 1 - BLANKING PLATES


4.2 Panel mounting
The relays can be flush mounted into panels using M4 SEMS Taptite self-tapping screws
with captive 3mm thick washers (also known as a SEMS unit).
These fastenings are available in packs of 5 (our part number ZA0005 104).
NOTE: Conventional self-tapping screws, including those supplied for
mounting MIDOS relays, have marginally larger heads which can
damage the front cover moulding if used.
Alternatively tapped holes can be used if the panel has a minimum thickness of 2.5mm.
For applications where relays need to be semi-projection or projection mounted, a range of
collars are available.
Where several relays are to mounted in a single cut-out in the panel, it is advised that they
are mechanically grouped together horizontally and/or vertically to form rigid assemblies
prior to mounting in the panel.
NOTE: It is not advised that MiCOM relays are fastened using pop rivets as
this will not allow the relay to be easily removed from the panel in the
future if repair is necessary.
If it is required to mount a relay assembly on a panel complying to BS EN60529 IP52, it will
be necessary to fit a metallic sealing strip between adjoining relays (Part no GN2044 001)
and a sealing ring selected from Table 2 around the complete assembly.
Installation P44x/EN IN/F65

MiCOM P441/P442 & P444 Page 7/10

Width Single tier Double tier


10TE GJ9018 002 GJ9018 018
15TE GJ9018 003 GJ9018 019
20TE GJ9018 004 GJ9018 020
25TE GJ9018 005 GJ9018 021
30TE GJ9018 006 GJ9018 022
35TE GJ9018 007 GJ9018 023
40TE GJ9018 008 GJ9018 024
45TE GJ9018 009 GJ9018 025
50TE GJ9018 010 GJ9018 026
55TE GJ9018 011 GJ9018 027
60TE GJ9018 012 GJ9018 028
65TE GJ9018 013 GJ9018 029
70TE GJ9018 014 GJ9018 030
75TE GJ9018 015 GJ9018 031
80TE GJ9018 016 GJ9018 032

TABLE 2 - IP52 SEALING RINGS


Further details on mounting MiDOS relays can be found in publication R7012, “MiDOS Parts
Catalogue and Assembly Instructions”.
P44x/EN IN/F65 Installation

Page 8/10 MiCOM P441/P442 & P444

5. RELAY WIRING
This section serves as a guide to selecting the appropriate cable and connector type for
each terminal on the MiCOM relay.
5.1 Medium and heavy duty terminal block connections
Loose relays are supplied with sufficient M4 screws for making connections to the rear
mounted terminal blocks using ring terminals, with a recommended maximum of two ring
terminals per relay terminal.
If required, AREVA T&D Protection & Control can supply M4 90° crimp ring terminals in three
different sizes depending on wire size (see Table 3). Each type is available in bags of 100.

Part number Wire size Insulation colour


ZB9124 901 0.25 – 1.65mm2 (22 – 16AWG) Red
ZB9124 900 1.04 – 2.63mm2 (16 – 14AWG) Blue
ZB9124 904 2.53 – 6.64mm2 (12 – 10AWG) Uninsulated*

TABLE 3 - M4 90° CRIMP RING TERMINALS


* To maintain the terminal block insulation requirements for safety, an insulating sleeve
should be fitted over the ring terminal after crimping.
The following minimum wire sizes are recommended:

Current Transformers 2.5mm2

Auxiliary Supply, Vx 1.5mm2


RS485 Port See separate section

Other circuits 1.0mm2


Due to the limitations of the ring terminal, the maximum wire size that can be used for any of
the medium or heavy duty terminals is 6.0mm2 using ring terminals that are not pre-
insulated. Where it required to only use pre-insulated ring terminals, the maximum wire size
that can be used is reduced to 2.63mm2 per ring terminal. If a larger wire size is required,
two wires should be used in parallel, each terminated in a separate ring terminal at the relay.
The wire used for all connections to the medium and heavy duty terminal blocks, except the
RS485 port, should have a minimum voltage rating of 300Vrms.
It is recommended that the auxiliary supply wiring should be protected by a 16A high rupture
capacity (HRC) fuse of type NIT or TIA. For safety reasons, current transformer circuits must
never be fused. Other circuits should be appropriately fused to protect the wire used.
5.2 RS485 port
Connections to the RS485 port are made using ring terminals. It is recommended that a 2
core screened cable is used with a maximum total length of 1000m or 200nF total cable
capacitance. A typical cable specification would be:
Each core: 16/0.2mm copper conductors
PVC insulated

Nominal conductor area: 0.5mm2 per core


Screen: Overall braid, PVC sheathed
Installation P44x/EN IN/F65

MiCOM P441/P442 & P444 Page 9/10

5.3 IRIG-B connections (if applicable)

The IRIG-B input and BNC connector have a characteristic impedance of 50Ω. It is
recommended that connections between the IRIG-B equipment and the relay are made
using coaxial cable of type RG59LSF with a halogen free, fire retardant sheath.
5.4 RS232 port
Short term connections to the RS232 port, located behind the bottom access cover, can be
made using a screened multi-core communication cable up to 15m long, or a total
capacitance of 2500pF. The cable should be terminated at the relay end with a 9-way, metal
shelled, D-type male plug. Chapter 2, Section 3.7 of this manual details the pin allocations.
5.5 Download/monitor port
Short term connections to the download/monitor port, located behind the bottom access
cover, can be made using a screened 25-core communication cable up to 4m long. The
cable should be terminated at the relay end with a 25-way, metal shelled, D-type male plug.
Chapter 2, Section 3.7 of this manual details the pin allocations.
5.6 Earth connection
Every relay must be connected to the local earth bar using the M4 earth studs in the bottom
left hand corner of the relay case. The minimum recommended wire size is 2.5mm2 and
should have a ring terminal at the relay end. Due to the limitations of the ring terminal, the
maximum wire size that can be used for any of the medium or heavy duty terminals is
6.0mm2 per wire. If a greater cross-sectional area is required, two parallel connected wires,
each terminated in a separate ring terminal at the relay, or a metal earth bar could be used.
NOTE: To prevent any possibility of electrolytic action between brass or
copper earth conductors and the rear panel of the relay, precautions
should be taken to isolate them from one another. This could be
achieved in a number of ways, including placing a nickel-plated or
insulating washer between the conductor and the relay case, or using
tinned ring terminals.
Before carrying out any work on the equipment, the user should be familiar with the
contents of the Safety and Technical Data sections and the ratings on the equipment's
rating label
P44x/EN IN/F65 Installation

Page 10/10 MiCOM P441/P442 & P444

BLANK PAGE
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444

COMMISSIONING
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 1/54

CONTENT

1. INTRODUCTION 3

2. SETTING FAMILIARISATION 4

3. EQUIPMENT REQUIRED FOR COMMISSIONING 5


3.1 Minimum Equipment Required 5
3.2 Optional Equipment 5

4. PRODUCT CHECKS 6
4.1 With the Relay De-energised 6
4.1.1 Visual Inspection 7
4.1.2 Current Transformer Shorting Contacts 8
4.1.3 External Wiring 9
4.1.4 Insulation 9
4.1.5 Watchdog Contacts 10
4.1.6 Auxiliary Supply 10
4.2 With the Relay Energised 10
4.2.1 Watchdog Contacts 10
4.2.2 Date and Time 10
4.2.3 With an IRIG-B signal (models P442 or P444 only) 11
4.2.4 Without an IRIG-B signal 11
4.2.5 Light Emitting Diodes (LEDs) 11
4.2.6 Field Voltage Supply 12
4.2.7 Input Opto-isolators 12
4.2.8 Output Relays 13
4.2.9 Rear Communications Port 15
4.2.10 Current Inputs 16
4.2.11 Voltage Inputs 16

5. SETTING CHECKS 18
5.1 Apply Application-Specific Settings 18
5.2 Check Application-Specific Settings 18
5.3 Demonstrate Correct Distance Function Operation 19
5.3.1 Functional Tests: Start control & Distance characteristic limits 19
5.3.2 Distance scheme test (if validated in S1 & PSL) 34
5.3.3 Loss of guard/loss of carrier TEST 35
5.3.4 Weak infeed mode test 35
5.3.5 Protection function during fuse failure 36
P44x/EN CM/F65 Commissioning

Page 2/54 MiCOM P441/P442 & P444

5.4 Demonstrate Correct Overcurrent Function Operation 37


5.4.1 Connect the Test Circuit 37
5.4.2 Perform the Test 38
5.4.3 Check the Operating Time 38
5.5 Check Trip and Auto-reclose Cycle 39

6. ON-LOAD CHECKS 40
6.1 Voltage Connections 40
6.2 Current Connections 41

7. FINAL CHECKS 42

8. MAINTENANCE 43
8.1 Maintenance Period 43
8.2 Maintenance Checks 43
8.2.1 Alarms 43
8.2.2 Opto-isolators 43
8.2.3 Output Relays 43
8.2.4 Measurement accuracy 43
8.3 Method of Repair 44
8.3.1 Replacing the Complete Relay 44
8.3.2 Replacing a PCB 45
8.4 Recalibration 52
8.5 Changing the battery 52
8.5.1 Instructions for Replacing The Battery 52
8.5.2 Post Modification Tests 53
8.5.3 Battery Disposal 53
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 3/54

1. INTRODUCTION
The MiCOM P440 distance protection relays are fully numerical in their design, implementing
all protection and non-protection functions in software. The relays employ a high degree of
self-checking and, in the unlikely event of a failure, will give an alarm. As a result of this, the
commissioning tests do not need to be as extensive as with non-numeric electronic or
electro-mechanical relays.
To commission numeric relays, it is only necessary to verify that the hardware is functioning
correctly and the application-specific software settings have been applied to the relay. It is
considered unnecessary to test every function of the relay if the settings have been verified
by one of the following methods:
Extracting the settings applied to the relay using appropriate setting software (Preferred
method)
Via the operator interface.
To confirm that the product is operating correctly once the application-specific settings have
been applied, a test should be performed on a single protection element.
Unless previously agreed to the contrary, the customer will be responsible for determining
the application-specific settings to be applied to the relay and for testing of any scheme logic
applied by external wiring and/or configuration of the relay’s internal programmable scheme
logic.
Blank commissioning test and setting records are provided at the end of this chapter for
completion as required.
As the relay’s menu language is user-selectable, it is acceptable for the Commissioning
Engineer to change it to allow accurate testing as long as the menu is restored to the
customer’s preferred language on completion.
To simplify the specifying of menu cell locations in these Commissioning Instructions, they
will be given in the form [courier reference: COLUMN HEADING, Cell Text]. For example,
the cell for selecting the menu language (first cell under the column heading) is located in the
System Data column (column 00) so it would be given as [0001: SYSTEM DATA,
Language].
Before carrying out any work on the equipment, the user should be familiar with the contents
of the ‘safety section’ and chapter P44x/EN IN, ‘installation’, of this manual.
P44x/EN CM/F65 Commissioning

Page 4/54 MiCOM P441/P442 & P444

2. SETTING FAMILIARISATION
When commissioning a MiCOM P440 relay for the first time, sufficient time should be
allowed to become familiar with the method by which the settings are applied.
Chapter P44x/EN IT contains a detailed description of the menu structure of the relays.
With the secondary front cover in place all keys except the [Enter] key are accessible. All
menu cells can be read. LEDs and alarms can be reset. However, no protection or
configuration settings can be changed, or fault and event records cleared.
Removing the secondary front cover allows access to all keys so that settings can be
changed, LEDs and alarms reset, and fault and event records cleared. However, menu cells
that have access levels higher than the default level will require the appropriate password to
be entered before changes can be made.
Alternatively, if a portable PC is available together with suitable setting software (such as
MiCOM S1), the menu can be viewed a page at a time to display a full column of data and
text. This PC software also allows settings to be entered more easily, saved to a file on disk
for future reference or printed to produce a setting record. Refer to the PC software user
manual for details. If the software is being used for the first time, allow sufficient time to
become familiar with its operation.
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 5/54

3. EQUIPMENT REQUIRED FOR COMMISSIONING


3.1 Minimum Equipment Required
Overcurrent test set with interval timer
110V ac voltage supply (if stage 1 of the overcurrent function is set directional)
Multimeter with suitable ac current range, and ac and dc voltage ranges of 0-440V and 0-
250V respectively
Continuity tester (if not included in multimeter)
Phase angle meter
Phase rotation meter
NOTE: Modern test equipment may contain many of the above features in
one unit.
3.2 Optional Equipment
Multi-finger test plug type MMLB01 (if test block type MMLG installed)
An electronic or brushless insulation tester with a dc output not exceeding 500V (For
insulation resistance testing when required).
A portable PC, with appropriate software (This enables the rear communications port to be
tested if this is to be used and will also save considerable time during commissioning).
KITZ K-Bus to RS232 protocol converter (if RS485 K-Bus port is being tested and one is not
already installed).
RS485 to RS232 converter (if RS485 Modbus port is being tested).
A printer (for printing a setting record from the portable PC).
P44x/EN CM/F65 Commissioning

Page 6/54 MiCOM P441/P442 & P444

4. PRODUCT CHECKS
These product checks cover all aspects of the relay that need to be checked to ensure that it
has not been physically damaged prior to commissioning, is functioning correctly and all
input quantity measurements are within the stated tolerances.
If the application-specific settings have been applied to the relay prior to commissioning, it is
advisable to make a copy of the settings so as to allow their restoration later. This could be
done by:

• Obtaining a setting file on a diskette from the customer (This requires a portable PC
with appropriate setting software for transferring the settings from the PC to the relay)

• Extracting the settings from the relay itself (This again requires a portable PC with
appropriate setting software)

• Manually creating a setting record. This could be done using a copy of the setting
record located at the end of this chapter to record the settings as the relay’s menu is
sequentially stepped through via the front panel user interface.
If password protection is enabled and the customer has changed password 2 that prevents
unauthorised changes to some of the settings, either the revised password 2 should be
provided, or the customer should restore the original password prior to commencement of
testing.
NOTE: In the event that the password has been lost, a recovery password
can be obtained from AREVA by quoting the serial number of the
relay. The recovery password is unique to that relay and will not work
on any other relay.
4.1 With the Relay De-energised
The following group of tests should be carried out without the auxiliary supply being applied
to the relay and with the trip circuit isolated.
The current and voltage transformer connections must be isolated from the relay for these
checks. If an MMLG test block is provided, the required isolation can easily be achieved by
inserting test plug type MMLB01 which effectively open-circuits all wiring routed through the
test block.
Before inserting the test plug, reference should be made to the scheme (wiring) diagram to
ensure that this will not potentially cause damage or a safety hazard. For example, the test
block may also be associated with protection current transformer circuits. It is essential that
the sockets in the test plug which correspond to the current transformer secondary windings
are linked before the test plug is inserted into the test block.
DANGER: NEVER OPEN CIRCUIT THE SECONDARY CIRCUIT OF A CURRENT
TRANSFORMER SINCE THE HIGH VOLTAGE PRODUCED MAY BE
LETHAL AND COULD DAMAGE INSULATION.
If a test block is not provided, the voltage transformer supply to the relay should be isolated
by means of the panel links or connecting blocks. The line current transformers should be
short-circuited and disconnected from the relay terminals. Where means of isolating the
auxiliary supply and trip circuit (e.g. isolation links, fuses, MCB, etc.) are provided, these
should be used. If this is not possible, the wiring to these circuits will have to be
disconnected and the exposed ends suitably terminated to prevent them from being a safety
hazard.
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 7/54

4.1.1 Visual Inspection


Carefully examine the relay to see that no physical damage has occurred since installation.
The rating information given under the top access cover on the front of the relay should be
checked to ensure it is correct for the particular installation.
Ensure that the case earthing connections, bottom left-hand corner at the rear of the relay
case, are used to connect the relay to a local earth bar using an adequate conductor.

A B C D E F

P3001ENa

FIGURE 1A - REAR TERMINAL BLOCKS ON SIZE 40TE CASE (P441)

A B C D E F G H J

IRIG-B

TX
RX

P3002ENa

FIGURE 1B - REAR TERMINAL BLOCKS ON SIZE 60TE CASE (P442)


P44x/EN CM/F65 Commissioning

Page 8/54 MiCOM P441/P442 & P444

A B C D E F G H J K L M N

1
1

1
1 2 3 19

2
2

3
3

3
4 5 6 20

4
4

5
5

5
IRIG-B

6
6

6
7 8 9 21

7
7

8
8

9
9

9
10 11 12 22

10
10

10

10

10

10

10

10
11
11

11

11

11

11

11

11

12
12

12

12

12

12

12

12
13 14 15 23

13
13

13

13

13

13

13

13
TX
RX

14
14

14

14

14

14

14

14
15
15

15

15

15

15

15

15
16 17 18 24

16
16

16

16

16

16

16

16
17
17

17

17

17

17

17

17

18
18

18

18

18

18

18

18
P3003ENa

FIGURE 1C - REAR TERMINAL BLOCKS ON SIZE 80TE CASE (P444)


4.1.2 Current Transformer Shorting Contacts
If required, the current transformer shorting contacts can be checked to ensure that they
close when the heavy duty terminal block (block reference C in figure 1) is disconnected
from the current input PCB.
The heavy duty terminal block is fastened to the rear panel using four crosshead screws.
These are located top and bottom between the first and second, and third and fourth,
columns of terminals.
NOTE: The use of a magnetic bladed screwdriver is recommended to
minimize the risk of the screws being left in the terminal block or lost.
Pull the terminal block away from the rear of the case and check that all the shorting
switches being used are closed with a continuity tester. table 1 shows the terminals between
which shorting contacts are fitted.
19
1

2
3
20
4

4
5

6
21
7

8
9
10

11

12

22

10
11

12
13

14

15

23

13

14
16

17

18

24

15

16
17

18

Heavy duty terminal block Medium duty terminal block


P3004ENa

FIGURE 2 - LOCATION OF SECURING SCREWS FOR TERMINAL BLOCKS


Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 9/54

Current Input Shorting contact between terminals


1A CT’s 5A CT’s
IA C3-C2 C1-C2
IB C6-C5 C4-C5
IC C9-C8 C7-C8
IM C12-C11 C10-C11

TABLE 1 - CURRENT TRANSFORMER SHORTING CONTACT LOCATIONS


4.1.3 External Wiring
Check that the external wiring is correct to the relevant relay diagram or scheme diagram.
The relay diagram number appears on the rating label under the top access cover on the
front of the relay. The corresponding connection diagram will have been supplied with the
AREVA order acknowledgement for the relay.
If an MMLG test block is provided, the connections should be checked against the scheme
(wiring) diagram. It is recommended that the supply connections are to the live side of the
test block (coloured orange with the odd numbered terminals (1, 3, 5, 7 etc.)). The auxiliary
supply is normally routed via terminals 13 (supply positive) and 15 (supply negative), with
terminals 14 and 16 connected to the relay’s positive and negative auxiliary supply terminals
respectively. However, check the wiring against the schematic diagram for the installation to
ensure compliance with the customer’s normal practice.
4.1.4 Insulation
Insulation resistance tests only need to be done during commissioning if it is required for
them to be done and they haven’t been performed during installation.
Isolate all wiring from the earth and test the insulation with an electronic or brushless
insulation tester at a dc voltage not exceeding 500V. Terminals of the same circuits should
be temporarily connected together.
The main groups of relay terminals are:
a) Voltage transformer circuits.
b) Current transformer circuits
c) Auxiliary voltage supply.
d) Field voltage output and opto-isolated control inputs.
e) Relay contacts.
f) S485 communication port.
g) Case earth.

The insulation resistance should be greater than 100MΩ at 500V.


On completion of the insulation resistance tests, ensure all external wiring is correctly
reconnected to the unit.
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Page 10/54 MiCOM P441/P442 & P444

4.1.5 Watchdog Contacts


Using a continuity tester, check that the normally closed watchdog contacts are in the states
given in table 2 for a de-energised relay.

Terminals Contact State


Relay De-energised Relay Energised
F11-F12 (P441) Closed Open
J11-J12 (P442)
N11-N12 (P444)
F13-F14 (P441) Open Closed
J13-J14 (P442)
N13-N14 (P444)

TABLE 2 - WATCHDOG CONTACT STATUS


4.1.6 Auxiliary Supply
The relay can be operated from either a dc only or an ac/dc auxiliary supply depending on
the relay’s nominal supply rating. The incoming voltage must be within the operating range
specified in table 3.
Without energising the relay, measure the auxiliary supply to ensure it is within the operating
range.

Nominal Supply Rating DC Operating Range AC Operating Range


DC [AC rms]
24/54V [-] 19 - 65V -
48/110V [30/100V] 37 - 150V 24 - 110V
110/250V [100/240V] 87 - 300V 80 - 265V

TABLE 3 - OPERATIONAL RANGE OF AUXILIARY SUPPLY


It should be noted that the relay can withstand an ac ripple of up to 12% of the upper rated
voltage on the dc auxiliary supply.
DO NOT ENERGISE THE RELAY USING THE BATTERY CHARGER WITH THE BATTERY
DISCONNECTED AS THIS CAN IRREPARABLY DAMAGE THE RELAY’S POWER
SUPPLY CIRCUITRY.
Energise the relay if the auxiliary supply is within the operating range. If an MMLG test block
is provided, it may be necessary to link across the front of the test plug to connect the
auxiliary supply to the relay.
4.2 With the Relay Energised
The following group of tests verify that the relay hardware and software is functioning
correctly and should be carried out with the auxiliary supply applied to the relay.
The current and voltage transformer connections must remain isolated from the relay for
these checks.
4.2.1 Watchdog Contacts
Using a continuity tester, check the watchdog contacts are in the states given in table 3 for
an energized relay.
4.2.2 Date and Time
The date and time should now be set to the correct values. The method of setting will
depend on whether accuracy is being maintained via the optional Inter-Range
Instrumentation Group standard B (IRIG-B) port on the rear of the relay.
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 11/54

4.2.3 With an IRIG-B signal (models P442 or P444 only)


If a satellite time clock signal conforming to IRIG-B is provided and the relay has the optional
IRIG-B port fitted, the satellite clock equipment should be energised.
To allow the relay’s time and date to be maintained from an external IRIG-B source cell
[0804: DATE and TIME, IRIG-B Sync] must be set to ‘Enabled’.
Ensure the relay is receiving the IRIG-B signal by checking that cell [0805: DATE and TIME,
IRIG-B Status] reads ‘Active’.
Once the IRIG-B signal is active, adjust the time offset of the universal co-ordinated time
(satellite clock time) on the satellite clock equipment so that local time is displayed.
Check the time, date and month are correct in cell [0801: DATE and TIME, Date/Time]. The
IRIG-B signal does not contain the current year so it will need to be set manually in this cell.
In the event of the auxiliary supply failing, with a battery fitted in the compartment behind the
bottom access cover, the time and date will be maintained. Therefore, when the auxiliary
supply is restored, the time and date will be correct and not need to be set again.
To test this, remove the IRIG-B signal, then remove the auxiliary supply from the relay.
Leave the relay de-energized for approximately 30 seconds. On re-energisation, the time in
cell [0801: DATE and TIME, Date/Time] should be correct.
Reconnect the IRIG-B signal.
4.2.4 Without an IRIG-B signal
If the time and date is not being maintained by an IRIG-B signal, ensure that cell [0804:
DATE and TIME, IRIG-B Sync] is set to ‘Disabled’.
Set the date and time to the correct local time and date using cell [0801: DATE and TIME,
Date/Time].
In the event of the auxiliary supply failing, with a battery fitted in the compartment behind the
bottom access cover, the time and date will be maintained. Therefore when the auxiliary
supply is restored the time and date will be correct and not need to be set again.
To test this, remove the auxiliary supply from the relay for approximately 30 seconds. On re-
energisation, the time in cell [0801: DATE and TIME, Date/Time] should be correct.
4.2.5 Light Emitting Diodes (LEDs)
On power up the green LED should have illuminated and stayed on indicating that the relay
is healthy. The relay has non-volatile memory which remembers the state (on or off) of the
alarm, trip and, if configured to latch, user-programmable LED indicators when the relay was
last energised from an auxiliary supply. Therefore these indicators may also illuminate when
the auxiliary supply is applied.
Control the PSL activated in the internal logic.
If any of these LEDs are on then they should be reset before proceeding with further testing.
If the LEDs successfully reset (the LED goes out), there is no testing required for that LED
because it is known to be operational.
Testing the alarm and out of service leds
The alarm and out of service LEDs can be tested using the COMMISSIONING TESTS menu
column. Set cell [0F0D: COMMISSIONING TESTS, Test Mode] to ‘Enabled’. Check that the
alarm and out of service LEDs illuminate.
It is not necessary to return cell [0F0D: COMMISSIONING TESTS, Test Mode] to ‘Disabled’
at this stage because test mode will be required for later tests.
Testing the trip led
The trip LED can be tested by initiating a manual circuit breaker trip from the relay.
However, the trip LED will operate during the setting checks performed later. Therefore no
further testing of the trip LED is required at this stage.
P44x/EN CM/F65 Commissioning

Page 12/54 MiCOM P441/P442 & P444

Testing the user-programmable leds


To test the user-programmable LEDs set cell [0F10: COMMISSIONING TESTS, Test LEDs]
to ‘Apply Test’. Check that all 8 LEDs on the right-hand side of the relay illuminate.
4.2.6 Field Voltage Supply
The relay generates a field voltage of nominally 48V that should be used to energise the
opto-isolated inputs.
Measure the field voltage across the terminals given in table 4. Check that the field voltage
is present at each positive and negative terminal and that the polarity is correct.
Repeat for terminals 8 and 10.

Supply rail Terminals


P441 P442 P444
+48 Vdc F7 & F8 J7 & J8 N7 & N8
–48 Vdc F9 & F10 J9 & J10 N9 & N10

TABLE 4 - FIELD VOLTAGE TERMINALS


4.2.7 Input Opto-isolators
This test checks that all the opto-isolated inputs are functioning correctly. The P441 relays
have 8 opto-isolated inputs while P442 relays have 16 opto-isolated inputs and P444 relays
have 24 opto-isolated inputs.
The opto-isolated inputs should be energised one at a time. Ensuring correct polarity,
connect the field supply voltage to the appropriate terminals for the input being tested. The
opto-isolated input terminal allocations are given in table 5.
See hysteresis and settings about universal optos in chapter AP section 5.
NOTE: The opto-isolated inputs may be energised from an external 50V
battery in some installations. Check that this is not the case before
connecting the field voltage otherwise damage to the relay may result.
The status of each opto-isolated input can be viewed using cell [0020: SYSTEM DATA,
Opto I/P Status], a ‘1’ indicating an energised input and a ‘0’ indicating a de-energised input.
When each opto-isolated input is energised one of the characters on the bottom line of the
display will change to the value shown in table 5 to indicate the new state of the inputs.

Apply field voltage to terminals


P441 P442 P444
-ve +ve -ve +ve -ve +ve
Opto input 1 D1 D2 D1 D2 D1 D2
Opto input 2 D3 D4 D3 D4 D3 D4
Opto input 3 D5 D6 D5 D6 D5 D6
Opto input 4 D7 D8 D7 D8 D7 D8
Opto input 5 D9 D10 D9 D10 D9 D10
Opto input 6 D11 D12 D11 D12 D11 D12
Opto input 7 D13 D14 D13 D14 D13 D14
Opto input 8 D15 D16 D15 D16 D15 D16
Opto input 9 E1 E2 E1 E2
Opto input 10 E3 E4 E3 E4
Opto input 11 E5 E6 E5 E6
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 13/54

Apply field voltage to terminals


P441 P442 P444
-ve +ve -ve +ve -ve +ve
Opto input 12 E7 E8 E7 E8
Opto input 13 E9 E10 E9 E10
Opto input 14 E11 E12 E11 E12
Opto input 15 (P442 only) E13 E14 E13 E14
Opto input 16 (P442 only) E15 E16 E15 E16
Opto input 17 F1 F2
Opto input 18 F3 F4
Opto input 19 F5 F6
Opto input 20 F7 F8
Opto input 21 F9 F10
Opto input 22 F11 F12
Opto input 23 F13 F14
Opto input 24 F15 F16

TABLE 5 - OPTO-ISOLATED INPUT TERMINALS


4.2.8 Output Relays
This test checks that all the output relays are functioning correctly. The P441 relays have 14
output relays , the P442 relays have 21 output relays and the P444 relays have 32 output
relays.
Ensure that the relay is still in test mode by viewing cell [0F0D: COMMISSIONING TESTS,
Test Mode].
The output relays should be energised one at a time. To select output relay 1 for testing, set
cell [0F0E: COMMISSIONING TESTS, Test Pattern] as shown in table 6.
Connect an continuity tester across the terminals corresponding to output relay 1 given in
table 6.
To operate the output relay set cell [0F0F: COMMISSIONING TESTS, Contact Test] to
‘Apply Test’. Operation will be confirmed by the continuity tester operating for a normally
open contact and ceasing to operate for a normally closed contact.
Reset the output relay by setting cell [0F0F: COMMISSIONING TESTS, Contact Test] to
‘Remove Test’.
NOTE: It should be ensured that thermal ratings of anything connected to the
output relays during the contact test procedure is not exceeded by the
associated output relay being operated for too long. It is therefore
advised that the time between application and removal of contact test
is kept to the minimum.
Repeat the test for relays 2 to 14 for P441 relays or relays 2 to 21 for P442 relays or relays 2
to 32 for P444 relays.
P44x/EN CM/F65 Commissioning

Page 14/54 MiCOM P441/P442 & P444

Output Monitor terminals


P441 P442 P444
N/C N/O N/C N/C N/O N/O
Relay 1 - E1-E2 - H1-H2 M1-M2
Relay 2 - E3-E4 - H3-H4 M3-M4
Relay 3 - E5-E6 - H5-H6 M5-M6
Relay 4 E7-E9 E8-E9 H7-H9 H8-H9 M7-M8
Relay 5 E10-E12 E11-E12 H10-H12 H11-H12 M9-M10
Relay 6 E13-E15 E14-E15 H13-H15 H14-H15 M11-M12
Relay 7 E16-E18 E17-E18 H16-H18 H17-H18 M13-M15 M14-M15
Relay 8 - B1-B2 - G1-G2 M16-M18 M17-M18
Relay 9 - B3-B4 - G3-G4 L1-L2
Relay 10 - B5-B6 - G5-G6 L3-L4
Relay 11 B7-B9 B8-B9 G7-G9 G8-G9 L5-L6
Relay 12 B10-B12 B11-B12 G10-G12 G11-G12 L7-L8
Relay 13 B13-B15 B14-B15 G13-G15 G14-G15 L9-L10
Relay 14 B16-B18 B17-B18 G16-G18 G17-G18 L11-L12
Relay 15 - F1-F2 L13-L15 L14-L15
Relay 16 - F3-F4 L16-L18 L17-L18
Relay 17 - F5-F6 K1-K2
Relay 18 F7-F9 F8-F9 K3-K4
Relay 19 F10-F12 F11-F12 K5-K6
Relay 20 F13-F15 F14-F15 K7-K8
Relay 21 F16-F18 F17-F18 K9-K10
Relay 22 K11-K12
Relay 23 K13-K15 K14-K15
Relay 24 K16-K18 K17-K18
Relay 25 J1-J2
Relay 26 J3-J4
Relay 27 J5-J6
Relay 28 J7-J8
Relay 29 J9-J10
Relay 30 J11-J12
Relay 31 J13-J15 J14-J15
Relay 32 J16-J18 J17-J18

TABLE 6 - RELAY OUTPUT TERMINALS AND TEST PATTERN SETTINGS


Return the relay to service by setting cell [0F0D: COMMISSIONING TESTS, Test Mode] to
‘Disabled’.
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 15/54

4.2.9 Rear Communications Port


This test should only be performed where the relay is to be accessed from a remote location
and will vary depending on the communications standard being adopted.
It is not the intention of the test to verify the operation of the complete system from the relay
to the remote location, just the relay’s rear communications port and any protocol converter
necessary.
4.2.9.1 Courier Communications
If a K-Bus to RS232 KITZ protocol converter is installed, connect a portable PC running the
appropriate software to the incoming (remote from relay) side of the protocol converter.
If a KITZ protocol converter is not installed, it may not be possible to connect the PC to the
type installed. In this case a KITZ protocol converter and portable PC running appropriate
software should be temporarily connected to the relay’s K-Bus port. The terminal numbers
for the relay’s K-Bus port are given in table 7. However, as the installed protocol converter is
not being used in the test, only the correct operation of the relay’s K-Bus port will be
confirmed.

Connection Terminal
K-Bus Modbus or VDEW P441 P442 P444
Screen Screen F16 J16 N16
1 +ve F17 J17 N17
2 –ve F18 J18 N18

TABLE 7 - RS485 TERMINALS


Ensure that the communications baud rate and parity settings in the application software are
set the same as those on the protocol converter (usually a KITZ but could be a SCADA
RTU). The relay’s Courier address in cell [0E02: COMMUNICATIONS, Remote Address]
must be set to a value between 0 and 255.
Check that communications can be established with this relay using the portable PC.
4.2.9.2 Modbus Communications
Connect a portable PC running the appropriate Modbus Master Station software to the
relay’s RS485 port via a RS485 to RS232 interface converter. The terminal numbers for the
relay’s RS485 port are given in table 7.
Ensure that the relay address, baud rate and parity settings in the application software are
set the same as those in cells [0E03: COMMUNICATIONS, Remote Address], [0E06:
COMMUNICATIONS, Baud Rate] and [0E07: COMMUNICATIONS, Parity] of the relay.
Check that communications with this relay can be established.
4.2.9.3 IEC60870-5-103 (VDEW) Communications
If the relay has the optional fibre optic communications port fitted, the port to be used should
be selected by setting cell [0E09: COMMUNICATIONS, Physical Link] to ‘Fibre Optic’ or
‘RS485’.
IEC60870-5-103/VDEW communication systems are designed to have a local Master Station
and this should be used to verify that the relay’s fibre optic or RS485 port, as appropriate, is
working.
Ensure that the relay address and baud rate settings in the application software are set the
same as those in cells [0E03: COMMUNICATIONS, Remote Address] and [0E06:
COMMUNICATIONS, Baud Rate] of the relay.
Check that, using the Master Station, communications with the relay can be established.
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4.2.10 Current Inputs


This test verifies that the accuracy of current measurement is within the acceptable
tolerances.
All relays will leave the factory set for operation at a system frequency of 50Hz. If operation
at 60Hz is required then this must be set in cell [0009: SYSTEM DATA, Frequency].
Apply current equal to the line current transformer secondary winding rating to the each
current transformer input of the corresponding rating in turn, checking its magnitude using a
multimeter. Refer to table 8 for the corresponding reading in the relay’s MEASUREMENTS
1 column and record the value displayed.

Cell in MEASUREMENTS 1 column (02) Apply current to


1A line CT 5A line CT
[0201: IA Magnitude] C3-C2 C1-C2
[0203: IB Magnitude] C6-C5 C4-C5
[0205: IC Magnitude] C9-C8 C7-C8
[0207: IM Magnitude] C12-C11 C10-C11

TABLE 8 - CURRENT INPUT TERMINALS


The measured current values on the relay will either be in primary or secondary Amperes. If
cell [0D02: MEASURE’T SETUP, Local Values] is set to ‘Primary’, the values displayed on
the relay should be equal to the applied current multiplied by the corresponding current
transformer ratio set in the ‘VT and CT RATIOS’ menu column (see table 9). If cell [0D02:
MEASURE’T SETUP, Local Values] is set to ‘Secondary’, the value displayed should be
equal to the applied current.
The measurement accuracy of the relay is ±1%. However, an additional allowance must be
made for the accuracy of the test equipment being used.

Cell in MEASUREMENTS 1 column (02) Corresponding CT Ratio


(in ‘VT and CT RATIO column (0A) of menu)
[0201: IA Magnitude] [0A07:Phase CT Primary]
[0203: IB Magnitude] [0A08:Phase CT Sec'y]
[0205: IC Magnitude]
[022F: IM Mutual Current Mag] [0A0B:MComp/CT Primary]
[0A0C: MComp/CT Sec'y]

TABLE 9 - CT RATIO SETTINGS


4.2.11 Voltage Inputs
This test verifies the accuracy of voltage measurement is within the acceptable tolerances.
Apply rated voltage to each voltage transformer input in turn, checking its magnitude using a
multimeter. Refer to table 8 for the corresponding reading in the relay’s MEASUREMENTS
1 column and record the value displayed.

Cell in MEASUREMENTS 1 column (02) Voltage applied To


[021A: VAN Magnitude] C19-C22
[021C: VBN Magnitude] C20-C22
[021E: VCN Magnitude] C21-C22
[022B: C/S Voltage Mag] ∗ C23-C24

TABLE 10 - VOLTAGE INPUT TERMINALS

∗ Voltage reference for synchrocheck


Can be PGnd or PP reference with VT bus side or VT line
(see setting description in chapter AP section 4.4)
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MiCOM P441/P442 & P444 Page 17/54

The measured voltage values on the relay will either be in primary or secondary volts. If cell
[0D02: MEASURE’T SETUP, Local Values] is set to ‘Primary’, the values displayed on the
relay should be equal to the applied voltage multiplied by the corresponding voltage
transformer ratio set in the ‘VT and CT RATIOS’ menu column (see table 11). If cell [0D02:
MEASURE’T SETUP, Local Values] is set to ‘Secondary’, the value displayed should be
equal to the applied voltage.
The measurement accuracy of the relay is ±2%. However, an additional allowance must be
made for the accuracy of the test equipment being used.

Cell in MEASUREMENTS 1 column (02) Corresponding VT Ratio


(in ‘VT and CT RATIO column (0A) of menu)
[021A: VAN Magnitude] [0A01:Main VT Primary]
[021C: VBN Magnitude] [0A02:Main VT Sec'y]
[021E: VCN Magnitude]
[022B: C/S Voltage Mag] [0A03:C/SVT Primary]
[0A04: C/SVT Sec'y]

TABLE 11 - VT RATIO SETTINGS


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5. SETTING CHECKS
The setting checks ensure that all of the application-specific relay settings (i.e. both the
relay’s function and programmable scheme logic settings) for the particular installation have
been correctly applied to the relay.
If the application-specific settings are not available, ignore sections 5.1 and 5.2.
5.1 Apply Application-Specific Settings
There are two methods of applying the settings:

• Transferring them from a pre-prepared setting file to the relay using a portable PC
running the appropriate software (see compatibility with S1 version in chapter VC) via
the relay’s front RS232 port, located under the bottom access cover, or rear
communications port (with a KITZ protocol converter connected). This method is the
preferred for transferring function settings as it is much faster and there is less margin
for error. If programmable scheme logic other than the default settings with which the
relay is supplied are to be used then this is the only way of changing the settings.
If a setting file has been created for the particular application and provided on a
diskette, this will further reduce the commissioning time and should always be the
case where programmable scheme logic changes are to be applied to the relay.

• Enter them manually via the relay’s operator interface. This method is not suitable for
changing the programmable scheme logic.

5.2 Check Application-Specific Settings


The settings applied should be carefully checked against the required application-specific
settings to ensure they have been entered correctly. However, this is not considered
essential if a customer-prepared setting file has been transferred to the relay using a
portable PC.
There are two methods of checking the settings:

• Extract the settings from the relay using a portable PC running the appropriate
software via the front RS232 port, located under the bottom access cover, or rear
communications port (with a KITZ protocol converter connected). Compare the
settings transferred from the relay with the original written application-specific setting
record. (For cases where the customer has only provided a printed copy of the
required settings but a portable PC is available).

• Step through the settings using the relay’s operator interface and compare them with
the original application-specific setting record.
Unless previously agreed to the contrary, the application-specific programmable scheme
logic will not be checked as part of the commissioning tests.
Due to the versatility and possible complexity of the programmable scheme logic, it is
beyond the scope of these commissioning instructions to detail suitable test procedures.
Therefore, when programmable scheme logic tests must be performed, written tests which
will satisfactorily demonstrate the correct operation of the application-specific scheme logic
should be devised by the Engineer who created it. These should be provided to the
Commissioning Engineer together with the diskette containing the programmable scheme
logic setting file.
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 19/54

5.3 Demonstrate Correct Distance Function Operation


5.3.1 Functional Tests: Start control & Distance characteristic limits
Despite of working in 100% numeric technology some tests could be performed in order to
control the good feature of the relay; regarding the different choices in the functions and
settings (settings of protection (with S1/settings & records) and logical schemes (with
S1/PSL Editor)) .
Subsection 5.3.2. explains point by point the steps to follow for providing a complet control of
every distance protection functions of the relay (with the factory’s settings & PSL: "P&C by
default").
In case of relay’s or application’s failure:
WARNING: COME BACK TO THE BASIC CONFIGURATION (SETTINGS & PSL)
THEN VALID THE TESTS FOLLOWING THE ENCLOSED DESCRIPTION
(this manipulation can be achieved by lcd in front face (configuration/restore
defaults/all settings+valid))
see chapter ap section 4.9/4.10 & 5 as well "test tools" for a diagnosis help
in case of failing (method/event/disturbance records/zgraph)
Default Password if requested for validation of settings is:

AAAA

NOTE: Every action managed by a laptop, could be done as well by the LCD
front panel (only PSL and Text Editor use a computer)

5.3.1.1 Measurements’ control


Before starting tests, perform the following injections on secondary side of the relay:

IA 0,2 IN 0°
Currents IB 0,4 IN - 120°
IC 0,8 IN + 120°
TEST 1
VAN 30 V 0°
Voltages VBN 40 V - 120°
VCN 50 V + 120°

− Control the displayed values in the relay’s front face (LCD): "system/meas1"

− Secondary values in amplitude and phase

− Or primary values (control of ratios VT & CT) – If selected in MiCOM S1 – See Fig 3.
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Control of ratios VT & CT

Control the measurement reference


W0001ENa

FIGURE 3
NB1: Control the measurement reference (ref. angle of phase shift) in:
"Measurt set up/Measurement ref." (VA by default).
The monitoring can be selected also in MiCOM S1 for providing a polling of the network
parameters (I/U/P/Q/f…)
NB2: In LCD: IN=3I0
After this step the mistakes on phases orders, ratios of CT, VT and
wiring (Analogic input only) will be detected.
NB3: See connections drawing in P44x/EN CO
NB4: See LCD structure in test tools
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 21/54

FIGURE 4 - MEASUREMENT 1/LCD MENU


(see complete description of menu in chapter HI)
Control of the polarisation of the protection: inject a three-phase symmetrical charge
according to the following table:

IA IN 20°
Currents IB IN -100°
IC IN +140°
TEST 2
VAN 57 V 0°
Voltages VBN 57 V -120°
VCN 57 V +120°

− If one phase is missing the output Fuse Failure alarm will pick up & the led general
alarm in the front panel will light up (see FFU description P44x /EN AP)

− According to the measurement mode chosen we will get


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(S1/Measurement setup/Measurement mode):

Measurement mode 0 1 2 3
P + - + -
Q - - + +
Selected in S1 by:

W0002ENa

FIGURE 5

Mode 0 Mode 1 Mode 2 Mode 3

P P P P
i u u i u u i u u i u u
i i i i

Q Q Q Q
i u u i u u i u u i u u
i i i i P3014ENa

FIGURE 6

− Control the signs of values P,Q to LCD ("Measurements 2 ") – settable with LCD (see
figure 5)
NOTE: The primary side orientation remains to be achieved (repeat
previously points with a primary injection)
See LCD Structure in chapter HI
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MiCOM P441/P442 & P444 Page 23/54

MEASURE'T SETUP

Default Display Default Display Measurement Ref


Description Description VB

Default Display Measurement Ref Measurement Ref


Date and Time VA VA

Default Display Measurement Ref


P-P IA

Default Display Measurement Ref


U - I Freq IB

Default Display
Plant Reference

Local Values Local Values Measurt Mode Measurt Mode


Secondary Secondary 0 0

Local Values Measurt Mode


Primary 1

Remote Values Remote Values Demand Interval Demand Interval


Secondary Secondary 30.00 mins 30.00 mins

Remote Values Demand Interval


Primary 29.00 mins

P3016ENa

FIGURE 7 - MEASUREMENT SETUP/LCD MENU


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Page 24/54 MiCOM P441/P442 & P444

5.3.1.2 Default simulation principle


To simulate a single-phase fault
The distance protection detects a single-phase default in E if the impedance and phase of
this point place it inside the characteristic. The relation of impedance and phase with the
voltage and current injected is as follows:

− Fault Impedance Z = Vphase/Iphase ;

− Fault Phase • = phase-shift(Vphase, Iphase) ;

− The Vphase voltage has to remain lower than the rated voltage value
Test of the impedance for zone 1:
I1 = 1A

ϕ1 = line angle = 76°


V1
= Zfault = Zd (1 + k0) + Rfault
I1

Rfault = R loop

Distance X

Xlim

E
Z

-Rlim ϕ Resistance R
Rlim

P3017ENa

FIGURE 8 - CHARACTERISTIC’S POINT DETERMINATION


(RLIM BIPHASE & SINGLEPHASE CAN BE DIFFERENT)
The angle of Characteristic is:

• For phase to phase: Argument of the positive impedance of the line (Z1)

• For phase to ground: Argument of 2Z1+Z0


Characteristic of the relay can be created and displayed with Zgraph (MiCOM Zgraph
software is a tool delivered with the protection – available in the CD-ROM "MiCOM P440
User " ) – see the "test tools"
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MiCOM P441/P442 & P444 Page 25/54

W0003ENa

FIGURE 9 - EXAMPLE OF ZGRAPH SCREEN


(RIO FORMAT CAN BE CREATED AS WELL)

W0004ENa

FIGURE 10 - EVOLVING IMPEDANCE FROM THE LOAD AREA TO THE FINAL FAULT IMPEDANCE
IN ZONE1
To simulate a default in a zone, it’s necessary to vary progressively the current to move the
point from the load area inside the desired zone.
A single-phase starting characteristic with different values of K0 can be created:
(K0x = (Zx0 - Z1) /(3 Z1) (See P44x /EN AP).
(In S1 there are up to four possibilities KZ1 & KZ2, KZp, KZ3/4)
This solution is carried in case of the underground cable/overhead line section (KZ1
different from KZ2 = KZp = KZ3/4) where arguments between Z01 & Z02 can be very
different (HV Line at 80° and cable at 45°).
Nevertheless the most common injection devices don’t offer the possibility to manage
several values of K0 (the same for ZGraph) ; so it will be necessary for an accurate control of
zones limits,to generate several characteristics files (as much Rio file as KZ values – ref to
ZGraph user ).
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W0005ENa

FIGURE 11 - SINGLE CHARACTERISTIC WITH P FORWARD ZONE


Z1, Z2, Z3, Zp, Z4 : limits of zone 1, 2, 3, p, 4
R1G, R2G, R3G, RpG : limits in resistance of zone 1, 2, 3, p, 4 for single-phase fault.
K01, K02, K03, K0p : ground compensation coefficient of zone 1, 2, 3, p
Zone 1, 2, 3 & P can have different limit in resistance (see section 2.2 of P44x/EN AP
chapter for Rlim and Zlim explanations) and ground coefficient. Zones 3 et 4 (Starting zone)
have the same resistance sensitivity and ground compensation coefficient. The ground
compensation coefficient depends of the line’s characteristic on each zone.
2x Z1+Zx0
Line angle: ϕpg = Arg where Zx0 is the zero sequence impedance for zone x
3
and Z1 is the positive impedance.
Cover of zones
Different lines angles for each single-phase characteristic zone can be defined. And,
following the configuration of each zone, some intersections between zone could occur.

W0006ENa

FIGURE 12
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MiCOM P441/P442 & P444 Page 27/54

In the characteristic above, the marked parts A, B et C are intersections between several
zones.

• The surface A is considered as being in zone 1.

• The surface B is not a part of the characteristic (no start element).

• The surface C is not a part of the starting characteristic.(New logic will be


implemented in next version A4.0 for keeping fwd Z1 detection in the surface C (even
with a negative fault reactance value bigger than the reverse limit X4) ).
Coherency:
To have a homogeneous characteristic, it’s necessary that the characteristic’s different
parameters respect the equations as follows: (No blocking coherency test is provided by the
internal logic control of the relay)

− if zone P is a forward zone:

− Z1 < Z1ext < Z2 < Zp < Z3

− tZ1 < tZ2 < tZp < tZ3

− R1G ≤ R2G ≤ RpG ≤ R3G

− R1Ph ≤ R2Ph ≤ RpPh ≤ R3Ph

− if zone P is a reverse zone:

− Z1 < Z1ext < Z2 < Z3

− Zp < Z4

− tZ1 < tZ2 < tZ3

− tZp < tZ4

− R1G ≤ R2G ≤ R3G

− RpG ≤ R4G

− R1Ph ≤ R2Ph ≤ R3Ph

− RpPh ≤ R4Ph

− The Z minimum value measured by the relay is: 60 mohms (Z1mini adjusted in S1, is
1ohm with CT 1Amp & 200 mohms with CT 5Amp)

− There is no limit for the R/X ratio, because a floating point processor is used for the R
calculation & X calculation (separated dynamic range for each calculation). In
consequence the limit will be given by the angle error of the CT.
For example in PUR with CT accuracy angle at 1° (for IN) it gives a R/X = 5,7 – for keeping
10% of error in the X1 measurement.

• Limit of R: min 0 /Max 80 ohms (CT 5Amp) – min 0/Max400 ohms (CT 1Amp)

• Limit of X: min0,2/100 ohms (CT 5Amp) – min1/Max 500 ohms (CT 1Amp)
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To simulate a two-phase fault


The two-phase fault simulation principle is the same as the one used to simulate a single-
phase fault but:

− the voltage reference is the line to line voltage between phases, Uab for example;

− the reference current is the difference between the phases current, Ia - Ib for example;

− The fault impedance Z = (Uphase-phase/(Iphase1 - Iphase2)).

− the R1M point (single phase) is replaced by the R1ph point.(Biphase)


Two-phase characteristic with reverse zone P:

W0007ENa

Uαβ
Fault simulation = 2 x Zd + Rfault
I1

With:
Uαβ : fault voltage phase-to-phase
I1 : fault current
ϕ1 : fault angle
Rfault = R loop
see section 2.2 of P44x/EN AP chapter for Rlim and Zlim explanations
For a triphase fault:
V1 Rfault
Fault simulation = Zd +
I1 2

With:
V1 : fault voltage phase-to-phase
I1 : fault current
ϕ1 : fault angle
Remark: With z graph’s help a Rio format characteristic can be created. This
Rio file can be loaded in a numeric injector which accept this kind of
files. The active settings (distance elements) can be modified by
Zgraph and relay can be upgraded with new distance parameters
For more precision refer to item: Test tools: "Z graph user "
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 29/54

5.3.1.3 Control & Test of starting characteristics


IN THIS PART – TESTS ARE DESCRIBED WITH THE DEFAULT
PARAMETERS (AREVA T&D EAI )
Open the file corresponding to the MiCOM characteristic. (see item:test tools/S1 user) If
none change have been achieved, we get those values (Zgraph screen):

W0008ENa

FIGURE 13
Control of single-phase fault characteristic’
CAUTION: IF DIFFERENT K0 ARE USED – SEE § 5.3.1.2
1. Energise MiCOM P440 with a healthy 3phase network (without unbalanced condition)
with load (during a minimum time of 500 msec). This is for:
– Enabling the use of deltas algorithms
– Avoiding the start of SOTF logic (see SOTF logic description in P44x /EN AP)
2. Reduce the current value to obtain a relation between V et I following the attached
table (For Rlim – phase-shift at 0°, for Z limit – phase-shift corresponding to Z1 (in
multiphase default) or corresponding to 2Z1+Z0 (in single fault).
3. Check that the tripping order (DDB: Any trip / Any Trip A/ Any Trip B/ Any Trip C – see
in the chapter AP section 6.3 ”output contact mapping”, the description of DDB for
models 01 to 06) is transmitted when the concerned zone time delay is issued.(For
distance scheme with transmission and all distance trip logic see in P44x /EN AP).
NOTE: The DDB signal any Trip A is a OR gate between
Ext Trip A
Int Trip A
4. See as well the test report model provided in chapter RS Test tools.
5. Control also in the PSL (programmable scheme logic) the tripping orders addressing
(Any Trip is linked by default to the relay 7).
By default: see the wiring diagram in chapter CO (for assignment of inputs/outputs).
Usefultip: - For controlling the logic level of internal datas (DDB cells), all or part of the 8 red
led in the front panel could be assigned using the PSL.
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LED 8
Z1
Z1 Latching
DDB #191 DDB #069

Z2
LED 7
Z2 Latching DDB #070
DDB #193

Non- LED 8
T2
T2
DDB #198 Latching DDB #071

P3018ENa

FIGURE 14
If Led are latched, the reset latch could be activated by a dedicated PSL, to avoid useless
keyboard access: during the tests:

Any Start Reset Latches


DDB #253 DDB #118

P3019ENa

FIGURE 15
Usefultip: - For controlling the logic level of internal datas (DDB cells), monitor bit control can
be used in "commissioning Test/Opto/Relay/Test port status/Led status/Monitor bit1 to bit
8".Any cells from the DDB can be assigned and then displayed as 1 of the 8 bits.(See User
Tools )
NB1: See LCD structure in chapter HI

COMMISSION TESTS

Opto I/P Status


0000000000100

Monitor Bit 1
Relay O/P Status 64
0000000000100
Monitor Bit 1 Monitor Bit 1
64 64

Test port Status Monitor Bit 1


00000000 64

Monitor Bit 2 Monitor Bit 2


65 65

LED Status
00000000

Monitor Bit 8 Monitor Bit 8


71 71

P3020ENa

FIGURE 16 - LCD MENU FOR A CONTROL OF INPUT/OUTPUT/ & MONITOR BITS CONTROL
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 31/54

Test point I,V phase shift


Tripping time
B:Bi M:mono (I is behind V)
R1 B 0° T1
R1 M 0° T1
R2 B 0° T2
R2 M 0° T2
Rp B 0° Tp
Rp M 0° Tp
R3 B 0° T3
R3 M 0° T3
- R Lim = -R3 0° T4
Z1 B Arg Zd T1
Z1 M Arg (2Zd+Z0) T1
Z2 B Arg Zd T2
Z2 M Arg (2Zd+Z0) T2
Zp B Arg Zd Tp
Zp M Arg (2Zd+Z0) Tp
Z3 B Arg Zd T3
Z3 M Arg (2Zd+Z0) T3
Z4 B Arg Zd T4
Z4 M Arg (2Zd+Z0) T4

TABLE 12 - PARAMETERS OF ZONE TO TEST


(ZP CAN BE REVERSE OR FORWARD / EACH ZONES CAN BE ENABLE OR DISABLE – Z IS ALWAYS
ACTIVATED)
NOTE: R3 represents the starting limit on R axis (detection sensitivity of
resistive defaults – The starting element for phase/ground can be
superior to the phase/phase). If the reverse zone has been
deactivated (Z4), it still exists a no-tripping zone (up to version A3.2 &
2.10) in the 4th quadrant below the R axis.

Zone has been deactivated (Z4)

W0009ENa
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W0010ENa

If Z3 is deactivated, the resistance limits R3-R4 are not more visible in S1.
NOTE: All other characteristic point can be tested after having calculated the
impedance and the phase shift between U et I.
NOTE: All these examples use the default settings.

W0011ENa

FIGURE 17 - EXAMPLE: AN- LIM Z1

VAN/IA = Zf =Z1(1+K01) 40V/2A (phase shift of –70°) =20Ω = Z1(1+1)

Lim Z1=10Ω (si KO1=1)

W0012ENa

FIGURE 18 - EXAMPLE: AB - LIMR2


VAB = 2 sin 34,72° * 35,12=40v / IAB=2A

UAB/IA (in phase) =Rf=20Ω=LimR2


LimR2 (R2 value in MiCOM S1 in ohms loop).
Commissioning P44x/EN CM/F65

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W0013ENa

FIGURE 19 - EXAMPLE: ABC-LIMZ4 (REVERSE)

VAN/IAN = Zf=Rf=20V/0,500mA=40Ω=Lim Z4 with angle(VAN/IAN)=70°-180°=-110°


NOTE: The simulator use generating transients superior to 0,2 In on currents
when fault condition generation can induce mistake about the
directional calculation with algorithms "Deltas". This mistake is du to
simulator boxes which not always reflect the real conditions of fault
appearance during the transient condition. To avoid this trouble during
the starting zones checking we advice you to inhibit algorithms
"Deltas" during the characteristics path by setting T1 at 50ms (beyond
40ms, algorithms "Deltas" are no more valid). It is the case about
numeric injection boxes.
NOTE: Control in the injection device, if any possibility of DC component
could be chosen to force the start of the faulty current at 0 (If not -
model network could be not realistic)

Z3

Z2

Z1

- Rlim R1 R2 R3

-Zp

W0014ENa

FIGURE 20 - POINTS LIMIT OF THE CHARACTERISTIC TO BE TESTED


(WITH ZP SELECTED AS A REVERSE ZONE)
P44x/EN CM/F65 Commissioning

Page 34/54 MiCOM P441/P442 & P444

5.3.2 Distance scheme test (if validated in S1 & PSL)


5.3.2.1 Control

• The type of distance scheme enable in S1

• The DDB cells assigned for distance scheme

• Ref to the description feature in P44x /EN AP item 2.4 & 2.5:

⇒ Settings in S1

⇒ DDB cells

⇒ Internal logic in A2.10 & A3.2


REMINDER: General equation to the tripping in distance protection since
A2.9/A3.1 – From A2.10/A3.2 could be found in the Chap EN AP –
item 2.5
NOTE: Before tests, control the input presence /Output in PSL (See chapter
AP section 6.2 & 6.3) linked to the selected teleaction scheme (DDB:
DistCR/Dist CS/).Control as well the I/O condition change (on LCD in
FAV in "system ")
Input:(PSL by default "P&C ") Output: (PSL by default "P&C ")
WARNING: TAKE CARE ABOUT THE CHANGEMENT OF GROUP BY OPTOS
– IF SELECTED IN S1 (OPTO 1 & 2 IN THAT CASE SWITCHING GROUPS
BY OPTOS)
– IF USED FOR SWITCHING GROUP (OPTO 1 & 2 MUST BE ABSENT
FROM THE PSL)

Opto Label 01 DEF. Chan Recv


DDB #032 DDB #097

Opto Label 01 DEF. Chan Recv


DDB #032 DDB #096
Signal Send (Dist + DEF)

Opto Label 02 DIST. COS DIST Sig Send


DDB #033 DDB #099 DDB #178 0
Relay Label 05
DIST Sig Send
1 Pick-Up DDB #004
Opto Label 02 DIST. COS 0
DDB #033 DDB #207
DDB #098
P3021ENa

1. From MiCOM S1, select a one of the mode in the table 5.6 in P44x /EN AP (last
column).
2. Implement the indicated default in the panel first column , The carrier signal input
being activated (with TAC).
3. Check the tripping contact have been energised at the issue of the indicated time
delay indicated in the same column (With TAC).
4. Repeat step 2 and 3 but without teleaction input and by checking the indicated time
delay in the panel’s 2nd column (Without TAC).
Repeat step 2 and 4 for the others zones defaults by checking, whatever the teleaction input
condition, the associated time delays to every zones are not modified (according to the 4th
column equations)
NOTE: – TAC can be simulated by inverting the opto.
– TAC transmissions can also be checked by generating
defaults according to the 3rd column.
– To make easy the relay I/O control condition, the LEDs
affectation in PSL can be modified. Another possibility is in S1 –
See Testing tools (monitor bit control).
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 35/54

5.3.3 Loss of guard/loss of carrier TEST


If this function have been validated in S1 (See chap P44x /EN AP):

TEST: Follow the truth table in P44x /EN AP item 2.6.4


NOTE: In case of TAC loss the scheme Z1X(out fail) will be applied if selected
in S1.
5.3.4 Weak infeed mode test
From MiCOM S1
(If Permissive schemes validated in S1:4 possible choices):fig winf1

FIG WINF2
P44x/EN CM/F65 Commissioning

Page 36/54 MiCOM P441/P442 & P444

Put into service the weak infeed mode (Possibility of Single pole except for P441) ;
1. Inhibit tripping authorisation and phase selection.
2. Activate the teleaction input.
3. Check:
- the teleaction transmission signal is activated;
- the tripping contact is not activated.
From MiCOM S1, validate the three-phase authorisation.

FIGURE 21
1. Activate the teleaction input.
2. Check:
- the teleaction signal is activated ;
- the tripping contacts closing.
From MiCOM S1, validate the minimum voltage phase selection, set under voltage
threshold to 0,4 Vn, put VB = -VC = Vn, validate the single phase tripping
authorisation.
1. Activate the teleaction input.
2. Check:
- the teleaction transmission signal is activated;
- the protection trips the phase A single phase.
5.3.5 Protection function during fuse failure
See internal logic description in P44x /EN AP – item 4.2
Relay locking (1 or 2 phases loss)
1. Supply MiCOM P440 with a "healthy" network with charge:
2. Take off the A phase supply .((V0) & (/I0) creation)
3. Check:
- the fuse failure sign is activated at the end of the time delay sign;
- The protection starting and tripping sign are not activated.
Relay unlocking
1. Keep the A phase supply cut and make a fault (Single or two) of which the fault
current (IR>3I0) is superior to the programmed threshold.(I2 or I0)
2. Check the tripping contact is activated.
Relay locking (3 phases loss)
1. Repeat the 1 then open the 3 voltages channels without creating delta I. Check as in 3
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 37/54

Outside sign:
1. Polarised the input: and check the outputs change condition:
Sign repercussions :
The sign (VT fail alarm) fall if:

MCB/VTS Line VTS Fast


DDB #101 DDB #263

MCB/VTS Bus VT Fail Alarm


DDB #100 DDB #132
P3022ENa

Fuse_Failure = 0
and
INP_FFUS_Line = 0
and
(All Pole Dead Or healthy network)
All Pole Dead:
No current And no voltage on the line or open circuit-breaker
Healthy network:
Rated voltage on the line And

− No zero sequence voltage and current And

− No starting And

− No pumping
5.4 Demonstrate Correct Overcurrent Function Operation
This test, performed on stage 1 of the overcurrent protection function in setting group 1,
demonstrates that the relay is operating correctly at the application-specific settings.
It is not considered necessary to check the boundaries of operation where cell [3502:
GROUP 1 OVERCURRENT, I>1 Direction] is set to ‘Directional Fwd’ or ‘Directional Rev’ as
the test detailed already confirms the correct functionality between current and voltage
inputs, processor and outputs and earlier checks confirmed the measurement accuracy is
within the stated tolerance.
5.4.1 Connect the Test Circuit
Determine which output relay has been selected to operate when an I>1 trip occurs by
viewing the relay’s programmable scheme logic.
The programmable scheme logic can only be changed using the appropriate software. If this
software has not been available then the default output relay allocations will still be
applicable.
If the trip outputs are phase-segregated (i.e. a different output relay allocated for each
phase), the relay assigned for tripping on ‘A’ phase faults should be used.
If stage 1 is not mapped directly to an output relay in the programmable scheme logic, output
relay 3 should be used for the test as it operates for any trip condition.
The associated terminal numbers can be found either from the external connection diagram
(P44x/EN CO) or table 5.
Connect the output relay so that its operation will trip the test set and stop the timer.
Connect the current output of the test set to the ‘A’ phase current transformer input of the
relay (terminals C3 and C2 where 1A current transformers are being used and terminals C1
and C2 for 5A current transformers).
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If [3502: GROUP 1 OVERCURRENT, I>1 Direction] is set to ‘Directional Fwd’, the current
should flow out of terminal C2 but into C2 if set to ‘Directional Rev’.
If cell [351D: GROUP 1 OVERCURRENT, VCO Status] is set to ‘Enabled’ (overcurrent
function configured for voltage controlled overcurrent operation) or [3502: GROUP 1
OVERCURRENT, I>1 Direction] has been set to ‘Directional Fwd’ or ‘Directional Rev’ then
rated voltage should be applied to terminals C19 and C22.
Ensure that the timer will start when the current is applied to the relay.
NOTE: If the timer does not start when the current is applied and stage 1 has
been set for directional operation, the connections may be incorrect
for the direction of operation set. Try again with the current
connections reversed.
5.4.2 Perform the Test
Ensure that the timer is reset.
Apply a current of twice the setting in cell [3503: GROUP 1 OVERCURRENT, I>1 Current
Set] to the relay and note the time displayed when the timer stops.
5.4.3 Check the Operating Time
Check that the operating time recorded by the timer is within the range shown in table 13.
NOTE: Except for the definite time characteristic, the operating times given in
table 13 are for a time multiplier or time dial setting of 1. Therefore, to
obtain the operating time at other time multiplier or time dial settings,
the time given in table 13 must be multiplied by the setting of cell
[3505: GROUP 1 OVERCURRENT, I>1 TMS] for IEC and UK
characteristics or cell [3506: GROUP 1 OVERCURRENT, Time Dial]
for IEEE and US characteristics.
In addition, for definite time and inverse characteristics there is an
additional delay of up to 0.02 second and 0.08 second respectively
that may need to be added to the relay’s acceptable range of
operating times.
For all characteristics, allowance must be made for the accuracy of
the test equipment being used.

Characteristic Operating Time at twice current setting and time


multiplier/time dial setting of 1.0
Nominal Range
(Seconds) (Seconds)
DT [3504: I>1 Time Delay] Setting ±2%
setting
IEC S Inverse 10.03 9.53 - 10.53
IEC V Inverse 13.50 12.83 - 14.18
IEC E Inverse 26.67 24.67 - 28.67
UK LT Inverse 120.00 114.00 - 126.00
IEEE M Inverse 0.64 0.61 - 0.67
IEEE V Inverse 1.42 1.35 - 1.50
IEEE E Inverse 1.46 1.39 - 1.54
US Inverse 0.46 0.44 - 0.49
US ST Inverse 0.26 0.25 - 0.28

TABLE 13 - CHARACTERISTIC OPERATING TIMES FOR I>1


Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 39/54

5.5 Check Trip and Auto-reclose Cycle


If the autoreclose function is being used, the circuit breaker trip and autoreclose cycle can be
tested automatically at the application-specific settings.
To test the first autoreclose cycle, set cell [0F11: COMMISSIONING TESTS, Test
Autoreclose] to “3 Pole Test”. The relay will perform a trip/reclose cycle. Repeat this
operation to test the subsequent autoreclose cycles.
Check all output relays used for circuit breaker tripping and closing, blocking other devices,
etc. operate at the correct times during the trip/close cycle.
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6. ON-LOAD CHECKS
Remove all test leads, temporary shorting leads, etc. and replace any external wiring that
has been removed to allow testing.
If it has been necessary to disconnect any of the external wiring from the relay in order to
perform any of the foregoing tests, it should be ensured that all connections are replaced in
accordance with the relevant external connection or scheme diagram.
The following on-load measuring checks ensure the external wiring to the current and
voltage inputs is correct but can only be carried out if there are no restrictions preventing the
energisation of the plant being protected.
6.1 Voltage Connections
Using a multimeter measure the voltage transformer secondary voltages to ensure they are
correctly rated. Check that the system phase rotation is correct using a phase rotation
meter.
Compare the values of the secondary phase voltages with the relay’s measured values,
which can be found in the MEASUREMENTS 1 menu column.
If cell [0D02: MEASURE’T SETUP, Local Values] is set to ‘Secondary’, the values displayed
on the relay should be equal to the applied secondary voltage. The relay values should be
within 1% of the applied secondary voltages. However, an additional allowance must be
made for the accuracy of the test equipment being used.
If cell [0D02: MEASURE’T SETUP, Local Values] is set to ‘Primary’, the values displayed on
the relay should be equal to the applied secondary voltage multiplied the corresponding
voltage transformer ratio set in the ‘VT & CT RATIOS’ menu column (see table 14). Again
the relay values should be within 1% of the expected value, plus an additional allowance for
the accuracy of the test equipment being used.

Voltage Cell in MEASUREMENTS 1 Corresponding VT Ratio (in ‘VT and


column (02) CT RATIO column (0A) of menu)
VAB [0214: VAB Magnitude] [0A01: Main VT Primary]
[0A02: Main VT Sec'y]
VBC [0216: VBC Magnitude]
VCA [0218: VCA Magnitude]
VAN [021A: VAN Magnitude]
VBN [021C: VBN Magnitude]
VCN [021E: VCN Magnitude]
VCHECKSYNC [022B: C/S Voltage Mag] [0A03: C/S VT Primary]
[0A04: C/S VT Sec'y]

TABLE 14 - MEASURED VOLTAGES AND VT RATIO SETTINGS


Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 41/54

6.2 Current Connections


Measure the current transformer secondary values for each using a multimeter connected in
series with corresponding relay current input.
Check that the current transformer polarities are correct by measuring the phase angle
between the current and voltage, either against a phase meter already installed on site and
known to be correct or by determining the direction of power flow by contacting the system
control centre.
Ensure the current flowing in the neutral circuit of the current transformers is negligible.
Compare the values of the secondary phase currents and phase angle with the relay’s
measured values, which can be found in the MEASUREMENTS 1 menu column.
NOTE: Under normal load conditions the earth fault function will measure
little, if any, current. It is therefore necessary to simulate a phase to
neutral fault. This can be achieved by temporarily disconnecting one
or two of the line current transformer connections to the relay and
shorting the terminals of these current transformer secondary
windings.
If cell [0D02: MEASURE’T SETUP, Local Values] is set to ‘Secondary’, the currents
displayed on the relay should be equal to the applied secondary current. The relay values
should be within 1% of the applied secondary currents. However, an additional allowance
must be made for the accuracy of the test equipment being used.
If cell [0D02: MEASURE’T SETUP, Local Values] is set to ‘Secondary’, the currents
displayed on the relay should be equal to the applied secondary current multiplied by the
corresponding current transformer ratio set in ‘VT & CT RATIOS’ menu column. Again the
relay values should be within 1% of the expected value, plus an additional allowance for the
accuracy of the test equipment being used.
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Page 42/54 MiCOM P441/P442 & P444

7. FINAL CHECKS
The tests are now complete.
Remove all test or temporary shorting leads, etc. If it has been necessary to disconnect any
of the external wiring from the relay in order to perform the wiring verification tests, it should
be ensured that all connections are replaced in accordance with the relevant external
connection or scheme diagram.
Ensure that the relay has been restored to service by checking that cell [0F0D:
COMMISSIONING TESTS, Test Mode] is set to ‘Disabled’.
If the relay is in a new installation or the circuit breaker has just been maintained, the circuit
breaker maintenance and current counters should be zero. These counters can be reset
using cell [0608: CB CONDITION, Reset All Values]. If the required access level is not
active, the relay will prompt for a password to be entered so that the setting change can be
made.
If a MMLG test block is installed, remove the MMLB01 test plug and replace the MMLG
cover so that the protection is put into service.
Ensure that all event records, fault records, disturbance records, alarms and LEDs have
been reset before leaving the relay.
If applicable, replace the secondary front cover on the relay.
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 43/54

8. MAINTENANCE
8.1 Maintenance Period
It is recommended that products supplied by AREVA T&D Protection & Control receive
regular monitoring after installation. As with all products some deterioration with time is
inevitable. In view of the critical nature of protective relays and their infrequent operation, it
is desirable to confirm that they are operating correctly at regular intervals.
AREVA protective relays are designed for a life in excess of 20 years.
MiCOM P440 distance relays are self-supervising and so require less maintenance than
earlier designs of relay. Most problems will result in an alarm so that remedial action can be
taken. However, some periodic tests should be done to ensure that the relay is functioning
correctly and the external wiring is intact.
If a Preventative Maintenance Policy exists within the customer’s organisation then the
recommended product checks should be included in the regular program. Maintenance
periods will depend on many factors, such as:

• the operating environment

• the accessibility of the site

• the amount of available manpower

• the importance of the installation in the power system

• the consequences of failure


8.2 Maintenance Checks
Although some functionality checks can be performed from a remote location by utilising the
communications ability of the relays, these are predominantly restricted to checking that the
relay is measuring the applied currents and voltages accurately, and checking the circuit
breaker maintenance counters. Therefore it is recommended that maintenance checks are
performed locally (i.e. at the substation itself).
BEFORE CARRYING OUT ANY WORK ON THE EQUIPMENT, THE USER SHOULD BE
FAMILIAR WITH THE ‘SAFETY SECTION’ AND CHAPTER P44x/EN IN, ‘INSTALLATION’,
OF THIS MANUAL.
8.2.1 Alarms
The alarm status LED should first be checked to identify if any alarm conditions exist. If so,
press the read key c repeatedly to step the alarms. Clear the alarms to extinguish the
LED.
8.2.2 Opto-isolators
The opto-isolated inputs can be checked to ensure that the relay responds to their
energisation by repeating the commissioning test detailed in Section 4.2.5 of this chapter.
8.2.3 Output Relays
The output relays can be checked to ensure that they operate by repeating the
commissioning test detailed in Section 4.2.6 of this chapter.
8.2.4 Measurement accuracy
If the power system is energised, the values measured by the relay can be compared with
known system values to check that they are in the approximate range that is expected. If
they are then the analogue/digital conversion and calculations are being performed correctly
by the relay. Suitable test methods can be found in Sections 6.1 and 6.2 of this chapter.
Alternatively, the values measured by the relay can be checked against known values
injected into the relay via the test block, if fitted, or injected directly into the relay terminals.
Suitable test methods can be found in Sections 4.2.8 and 4.2.9 of this chapter. These tests
will prove the calibration accuracy is being maintained.
P44x/EN CM/F65 Commissioning

Page 44/54 MiCOM P441/P442 & P444

8.3 Method of Repair


If the relay should develop a fault whilst in service, depending on the nature of the fault, the
watchdog contacts will change state and an alarm condition will be flagged. Due to the
extensive use of surface-mount components faulty PCBs should be replaced as it is not
possible to perform repairs on damaged circuits. Thus either the complete relay or just the
faulty PCB, identified by the in-built diagnostic software, can be replaced. Advice about
identifying the faulty PCB can be found in Chapter P44x/EN PR, ‘Problem Analysis’.
The preferred method is to replace the complete relay as it ensures that the internal circuitry
is protected against electrostatic discharge and physical damage at all times and overcomes
the possibility of incompatibility between replacement PCBs. However, it may be difficult to
remove an installed relay due to limited access in the back of the cubicle and rigidity of the
scheme wiring.
Replacing PCBs can reduce transport costs but requires clean, dry conditions on site and
higher skills from the person performing the repair. However, if the repair is not performed
by an approved service centre, the warranty will be invalidated.
BEFORE CARRYING OUT ANY WORK ON THE EQUIPMENT, THE USER SHOULD BE
FAMILIAR WITH THE ‘SAFETY SECTION’ AND CHAPTER P44x/EN IN, ‘INSTALLATION’,
OF THIS MANUAL. THIS SHOULD ENSURE THAT NO DAMAGE IS CAUSED BY
INCORRECT HANDLING OF THE ELECTRONIC COMPONENTS.
8.3.1 Replacing the Complete Relay
The case and rear terminal blocks have been designed to facilitate removal of the complete
relay should replacement or repair become necessary without having to disconnect the
scheme wiring.
Before working at the rear of the relay, isolate all voltage and current supplies to the relay.
NOTE: The MiCOM range of relays have integral current transformer shorting
switches which will close when the heavy duty terminal block is
removed.
Disconnect the relay earth connection from the rear of the relay.
There are two types of terminal block used on the relay, medium and heavy duty, which are
fastened to the rear panel using crosshead screws.
NOTE: The use of a magnetic bladed screwdriver is recommended to
minimise the risk of the screws being left in the terminal block or lost.
Without exerting excessive force or damaging the scheme wiring, pull the terminal blocks
away from their internal connectors.
Remove the screws used to fasten the relay to the panel, rack, etc. These are the screws
with the larger diameter heads that are accessible when the access covers fitted and open.
IF THE TOP AND BOTTOM ACCESS COVERS HAVE BEEN REMOVED, DO NOT
REMOVE THE SCREWS WITH THE SMALLER DIAMETER HEADS WHICH ARE
ACCESSIBLE. THESE SCREWS HOLD THE FRONT PANEL ON THE RELAY.
Withdraw the relay from the panel, rack, etc. carefully because it will be heavy due to the
internal transformers.
To reinstall the repaired or replacement relay follow the above instructions in reverse,
ensuring that each terminal block is relocated in the correct position and the case earth,
IRIG-B and fibre optic connections are replaced.
Once reinstallation is complete the relay should be recommissioned using the instructions in
sections 1 to 7 inclusive of this chapter.
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 45/54

8.3.2 Replacing a PCB


If the relay fails to operate correctly refer to Chapter P44x/EN PR, ‘Problem Analysis’, to help
determine which PCB has become faulty.
To replace any of the relay’s PCBs it is necessary to first remove the front panel.
Before removing the front panel to replace a PCB the auxiliary supply must be
removed. It is also strongly recommended that the voltage and current transformer
connections and trip circuit are isolated.
Open the top and bottom access covers. With size 60TE cases the access covers have two
hinge-assistance T-pieces which clear the front panel moulding when the access covers are
opened by more than 90°, thus allowing their removal.
If fitted, remove the transparent secondary front cover. A description of how to do this is
given in Chapter P44x/EN IT, ‘Introduction’.
By slightly bending the access covers at one end, the end pivot can be removed from its
socket and the access cover removed to give access to the screws that fasten the front
panel to the case.
The size 40TE case has four crosshead screws fastening the front panel to the case, one in
each corner, in recessed holes. The size 60TE case has an additional two screws, one
midway along each of the top and bottom edges of the front plate. Undo and remove the
screws.
DO NOT REMOVE THE SCREWS WITH THE LARGER DIAMETER HEADS WHICH ARE
ACCESSIBLE WHEN THE ACCESS COVERS ARE FITTED AND OPEN. THESE
SCREWS HOLD THE RELAY IN ITS MOUNTING (PANEL OR CUBICLE).
When the screws have been removed, the complete front panel can be pulled forward and
separated from the metal case. Caution should be observed at this stage because the front
panel is connected to the rest of the relay circuitry by a 64-way ribbon cable.
The ribbon cable is fastened to the front panel using an IDC connector; a socket on the cable
itself and a plug with locking latches on the front panel. Gently push the two locking latches
outwards which will eject the connector socket slightly. Remove the socket from the plug to
disconnect the front panel.

F E D C B A

Power supply
Relay board Input board Transformer board Not used IRIG-B board
board

Power supply module Input module


P0150ENa

FIGURE 22 - P441 PCB/MODULE LOCATIONS (VIEWED FROM FRONT)


P44x/EN CM/F65 Commissioning

Page 46/54 MiCOM P441/P442 & P444

J H G F E D C B A

Power supply
Relay board Relay board Opto board Not used Input board Transformer board Not used IRIG-B board
board

Power supply module Input module P0151ENa

FIGURE 23 - P442 PCB/MODULE LOCATIONS (VIEWED FROM FRONT)


The PCBs within the relay are now accessible. figure 22 and figure 23 show the PCB
locations for the distance relays in size 40TE (P441) and size 60TE (P442) cases
respectively.
The 64-way ribbon cable to the front panel also provides the electrical connections between
PCBs with the connections being via IDC connectors.
The slots inside the case to hold the PCBs securely in place each correspond to a rear
terminal block. Looking from the front of the relay these terminal blocks are labelled from
right to left.
NOTE: To ensure compatibility, always replace a faulty PCB with one of an
identical part number. table 15 lists the part numbers of each PCB
type.

PCB Part Number


Power Supply Board (24/54V dc) ZN0001 001
(48/125V dc) ZN0001 002
(110/250V dc) ZN0001 003

Relay ETOpto Board ZN0002 001


Input ETOpto Board ZN0005 001
Opto Board ZN0005 002
IRIG-B Board (IRIG-B input only) ZN0007 001
(Fibre optic port only) ZN0007 002
(Both) ZN0007 003

Co-processor board ZN0003 003

TABLE 15 - PCB PART NUMBERS


Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 47/54

8.3.2.1 Replacement of the main processor board


The main processor board is located in the front panel, not within the case as with all the
other PCBs.
Place the front panel with the user interface face-down and remove the six screws from the
metallic screen, as shown in figure 24. Remove the metal plate.
There are two further screws, one each side of the rear of the battery compartment
moulding, that hold the main processor PCB in position. Remove these screws.
The user interface keypad is connected to the main processor board via a flex-strip ribbon
cable. Carefully disconnect the ribbon cable at the PCB-mounted connector as it could
easily be damaged by excessive twisting.

P3007XXa

FIGURE 24 - FRONT PANEL ASSEMBLY


The front panel can then be re-assembled with a replacement PCB using the reverse
procedure, ensuring that the ribbon cable is reconnected to the main processor board and all
eight screws are re-fitted.
Refit the front panel using the reverse procedure to that given in section 8.3.2. After refitting
and closing the access covers on case sizes 60TE, press at the location of the hinge-
assistance T-pieces so that they click back into the front panel moulding.
After replacement of the main processor board, all the settings required for the application
will need to be re-entered. Therefore, it is useful if an electronic copy of the application-
specific settings is available on disk. Although this is not essential, it can reduce the time
taken to re-enter the settings and hence the time the protection is out of service.
Once the relay has been reassembled after repair, it should be recommissioned in
accordance with the instructions in sections 1 to 7 inclusive of this chapter.
P44x/EN CM/F65 Commissioning

Page 48/54 MiCOM P441/P442 & P444

8.3.2.2 Replacement of the IRIG-B board


Depending on the model number of the relay, the IRIG-B board may have connections for
IRIG-B signals, IEC60870-5-103 (VDEW) communications, both or not be present at all.
To replace a faulty board, disconnect all IRIG-B and/or IEC60870-5-103 connections at the
rear of the relay.
The module is secured in the case by two screws accessible from the rear of the relay, one
at the top and another at the bottom, as shown in figure 25. Remove these screws carefully
as they are not captive in the rear panel of the relay.

A B C D E F G H J

IRIG-B

TX
RX

P3008XXa

FIGURE 25 - LOCATION OF SECURING SCREWS FOR IRIG-B BOARD


Gently pull the IRIG-B board forward and out of the case.
To help identify that the correct board has been removed, figure 26 illustrates the layout of
the IRIG-B board with both IRIG-B and IEC60870-5-103 options fitted (ZN0007 003). The
other versions (ZN0007 001 and ZN0007 002) use the same PCB layout but with less
components fitted.

ZN0007 C

SERIAL No.

P3009XXa

FIGURE 26 - TYPICAL IRIG-B BOARD


The replacement PCB should be carefully slotted into the appropriate slot, ensuring that it is
pushed fully back on to the rear terminal blocks and the securing screws are re-fitted.
Reconnect all IRIG-B and/or IEC60870-5-103 connections at the rear of the relay.
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 49/54

Refit the front panel using the reverse procedure to that given in section 8.3.2. After refitting
and closing the access covers on case sizes 60TE, press at the location of the hinge-
assistance T-pieces so that they click back into the front panel moulding.
Once the relay has been reassembled after repair, it should be recommissioned in
accordance with the instructions in sections 1 to 7 inclusive of this chapter.
8.3.2.3 Replacement of the input module
The input module comprises of two boards fastened together, the transformer board and the
input board.
The module is secured in the case by two screws on its right-hand side, accessible from the
front of the relay, as shown in figure 27. Remove these screws carefully as they are not
captive in the front plate of the module.

Input module

Handle

P3010ENa

FIGURE 27 - LOCATION OF SECURING SCREWS FOR INPUT MODULE


On the right-hand side of the analogue input module there is a small metal tab which brings
out a handle. Grasping this handle firmly, pull the module forward, away from the rear
terminal blocks. A reasonable amount of force will be required to achieve this due to the
friction between the contacts of two terminal blocks, one medium duty and one heavy duty.
NOTE: Care should be taken when withdrawing the input module as it will
suddenly come loose once the friction of the terminal blocks has been
overcome. This is particularly important with loose relays as the metal
case will need to be held firmly whilst the module is withdrawn.
Remove the module from the case, taking care as it is heavy because it contains all the
relay’s input voltage and current transformers.
The replacement module can be slotted in using the reverse procedure, ensuring that it is
pushed fully back on to the rear terminal blocks and the securing screws are re-fitted.
NOTE: The transformer and input boards within the module are calibrated
together with the calibration data being stored on the input board.
Therefore it is recommended that the complete module is replaced to
avoid on-site recalibration having to be performed.
Refit the front panel using the reverse procedure to that given in section 8.3.2. After refitting
and closing the access covers on case sizes 60TE, press at the location of the hinge-
assistance T-pieces so that they click back into the front panel moulding.
Once the relay has been reassembled after repair, it should be recommissioned in
accordance with the instructions in sections 1 to 7 inclusive of this chapter.
P44x/EN CM/F65 Commissioning

Page 50/54 MiCOM P441/P442 & P444

8.3.2.4 Replacement of the power supply board


The power supply board is fastened to a relay board to form the power supply module and is
located on the extreme left-hand side of all MiCOM distance relays.
Pull the power supply module forward, away from the rear terminal blocks and out of the
case. A reasonable amount of force will be required to achieve this due to the friction
between the contacts of the two medium duty terminal blocks.
The two boards are held together with push-fit nylon pillars and can be separated by pulling
them apart. Care should be taken when separating the boards to avoid damaging the inter-
board connectors located near the lower edge of the PCBs towards the front of the power
supply module.
The power supply board is the one with two large electrolytic capacitors on it that protrude
through the other board that forms the power supply module. To help identify that the
correct board has been removed, figure 28 illustrates the layout of the power supply board
for all voltage ratings.

SERIAL No. ZN0001 D

P3011XXa

FIGURE 28 - TYPICAL POWER SUPPLY BOARD


Re-assemble the module with a replacement board ensuring the inter-board connectors are
firmly pushed together and the four push-fit nylon pillars are securely located in their
respective holes in each PCB.
Slot the power supply module back into the relay case, ensuring that it is pushed fully back
on to the rear terminal blocks.
Refit the front panel using the reverse procedure to that given in section 8.3.2. After refitting
and closing the access covers on case sizes 60TE, press at the location of the hinge-
assistance T-pieces so that they click back into the front panel moulding.
Once the relay has been reassembled after repair, it should be recommissioned in
accordance with the instructions in sections 1 to 7 inclusive of this chapter.
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 51/54

8.3.2.5 Replacement of the relay board in the power supply module


Remove and replace the relay board in the power supply module as described in 8.3.2.4
above.
The relay board is the one with the board with holes cut in it to allow the transformer and two
large electrolytic capacitors to protrude through. To help identify that the correct board has
been removed, figure 29 illustrates the layout of the relay board.

1
2 PL2
3 ZN0002 D
4

SERIAL No.

P3012XXa

FIGURE 29 - TYPICAL RELAY BOARD


Ensure the setting of the link (located above IDC connector) on the replacement relay board
is the same as the one being replaced before replacing the module in the relay case.
Once the relay has been reassembled after repair, it should be recommissioned in
accordance with the instructions in sections 1 to 7 inclusive of this chapter.
8.3.2.6 Replacement of the extra relay board (P442 1 P444 only)
The P442 distance relay has two additional boards to the P441 and the P444 four additional
boards to the P441. Some of these boards provides extra output relays and optically-
isolated inputs.
To remove it, gently pull the faulty PCB forward and out of the case.
If the relay board is being replaced, ensure the setting of the link (located above IDC
connector) on the replacement relay board is the same as the one being replaced. To help
identify that the correct board has been removed, figure 29 and figure 30 illustrate the layout
of the relay and Opto boards respectively.
The replacement PCB should be carefully slotted into the appropriate slot, ensuring that it is
pushed fully back on to the rear terminal blocks.
Refit the front panel using the reverse procedure to that given in section 8.3.2. After refitting
and closing the access covers on case sizes 60TE, press at the location of the hinge-
assistance T-pieces so that they click back into the front panel moulding.
P44x/EN CM/F65 Commissioning

Page 52/54 MiCOM P441/P442 & P444

P3013XXa

FIGURE 30 - TYPICALOPTO BOARD


Once the relay has been reassembled after repair, it should be recommissioned in
accordance with the instructions in sections 1 to 7 inclusive of this chapter.
8.4 Recalibration
Recalibration is not usually required when a PCB is replaced unless it happens to be one of
the two boards in the input module, the replacement of which directly affect the calibration.
Although it is possible to carry out recalibration on site, this requires test equipment with
suitable accuracy and a special calibration program to run on a PC. It is therefore
recommended that the work is carried out by the manufacturer, or entrusted to an approved
service centre.
8.5 Changing the battery
Each relay has a battery to maintain status data and the correct time when the auxiliary
supply voltage fails. The data maintained include event, fault and disturbance records and
the thermal state at the time of failure.
This battery will periodically need changing, although an alarm will be given as part of the
relay’s continuous self-monitoring in the event of a low battery condition.
If the battery-backed facilities are not required to be maintained during an interruption of the
auxiliary supply, the steps below can be followed to remove the battery, but do not replace
with a new battery.
8.5.1 Instructions for Replacing The Battery
Open the bottom access cover on the front of the relay.
Gently extract the battery from its socket. If necessary, use a small screwdriver to prize the
battery free.
Ensure that the metal terminals in the battery socket are free from corrosion, grease and
dust.
The replacement battery should be removed from its packaging and placed into the battery
holder, taking care to ensure that the polarity markings on the battery agree with those
adjacent to the socket.
NOTE: Only use a type ½AA Lithium battery with a nominal voltage of 3.6V.
Ensure that the battery is securely held in its socket and that the battery terminals are
making good contact with the metal terminals of the socket.
Close the bottom access cover.
Commissioning P44x/EN CM/F65

MiCOM P441/P442 & P444 Page 53/54

8.5.2 Post Modification Tests


To ensure that the replacement battery will maintain the time and status data if the auxiliary
supply fails, check cell [0806: DATE and TIME, Battery Status] reads ‘Healthy’.
8.5.3 Battery Disposal
The battery that has been removed should be disposed of in accordance with the disposal
procedure for Lithium batteries in the country in which the relay is installed.
P44x/EN CM/F65 Commissioning

Page 54/54 MiCOM P441/P442 & P444

BLANK PAGE
Commissioning Test & Record P44x/EN RS/F65
Sheets

MiCOM P441/P442 & P444

COMMISSIONING TEST
& RECORD SHEETS
Commissioning Test & Record P44x/EN RS/F65
Sheets

MiCOM P441/P442 & P444 Page 1/12

CONTENT

1. COMMISSIONING TEST RECORD 3


1.1 Product Checks 3
1.1.1 With the Relay De-energised 3
1.1.2 With the Relay Energised 4
1.2 Setting Checks 10
1.2.1 Application-specific function settings applied? 10
1.2.2 Application-specific function settings verified? 10
1.2.3 Application-specific programmable scheme logic tested? 10
1.2.4 Protection Function Timing Tested? 10
1.2.5 Trip and Auto-Reclose Cycle Checked 10
1.3 On-load Checks 10
1.3.1 VT wiring checked? 10
1.3.2 CT wiring checked ? 11
1.4 Final Checks 11
P44x/EN RS/F65 Commissioning Test & Record
Sheets

Page 2/12 MiCOM P441/P442 & P444

BLANK PAGE
Commissioning Test & Record P44x/EN RS/F65
Sheets

MiCOM P441/P442 & P444 Page 3/12

1. COMMISSIONING TEST RECORD


Date Engineer

Station Circuit

System Frequency

Front Plate Information

Distance protection relay P441/P442/P444*


Model number
Serial number
Rated Current In
Rated Voltage Vn
Auxiliary Voltage Vx

*Delete as appropriate

Have all relevant safety instructions been followed? Yes/No*

1.1 Product Checks


1.1.1 With the Relay De-energised
1.1.1.1 Visual Inspection

Relay damaged? Yes/No*


Rating information correct for installation? Yes/No*
Case earth installed? Yes/No*
1.1.1.2 Current transformer shorting contacts close? Yes/No/Not checked*

1.1.1.3 External Wiring

Wiring checked against diagram? Yes/No*


Test block connections checked? Yes/No/na*
1.1.1.4 Insulation resistance >100MΩ at 500V dc Yes/No/Not tested*
P44x/EN RS/F65 Commissioning Test & Record
Sheets

Page 4/12 MiCOM P441/P442 & P444

1.1.1.5 Watchdog Contacts (auxiliary supply off)

Terminals 11 and 12 Contact closed? Yes/No*


Contact resistance ___Ω/Not measured*
Terminals 13 and 14 Contact open? Yes/No*
1.1.1.6 Measured Auxiliary Supply ______V ac/dc*

1.1.2 With the Relay Energised


1.1.2.1 Watchdog Contacts (auxiliary supply on)

Terminals 11 and 12 Contact open? Open/Closed*


Terminals 13 and 14 Contact closed? Open/Closed*
Contact resistance ____Ω/Not measured*

1.1.2.2 Date and Time

Clock set to local time? Yes/No*


Time maintained when auxiliary supply removed? Yes/No*

1.1.2.3 Light Emitting Diodes

Relay healthy (green) LED working? Yes/No*


Alarm (yellow) LED working? Yes/No*
Out of service (yellow) LED working? Yes/No*
Trip (red) LED working? Yes/No*
All 8 programmable LEDs working? Yes/No*

1.1.2.4 Field supply voltage

Value measured between terminals 7 and 9 ______V dc


Value measured between terminals 8 and 10 ______V dc
Commissioning Test & Record P44x/EN RS/F65
Sheets

MiCOM P441/P442 & P444 Page 5/12

1.1.2.5 Input Opto-isolators

Opto input 1 working? Yes/No*


Opto input 2 working? Yes/No*
Opto input 3 working? Yes/No*
Opto input 4 working? Yes/No*
Opto input 5 working? Yes/No*
Opto input 6 working? Yes/No*
Opto input 7 working? Yes/No*
Opto input 8 working? Yes/No*
Opto input 9 working? Yes/No/na*
Opto input 10 working? Yes/No/na*
Opto input 11 working? Yes/No/na*
Opto input 12 working? Yes/No/na*
Opto input 13 working? Yes/No/na*
Opto input 14 working? Yes/No/na*
Opto input 15 working? Yes/No/na*
Opto input 16 working? Yes/No/na*
Opto input 17 working? Yes/No/na*
Opto input 18 working? Yes/No/na*
Opto input 19 working? Yes/No/na*
Opto input 20 working? Yes/No/na*
Opto input 21 working? Yes/No/na*
Opto input 22 working? Yes/No/na*
Opto input 23 working? Yes/No/na*
Opto input 24 working? Yes/No/na*

1.1.2.6 Output Relays

Relay 1 Working? Yes/No*


Contact resistance ____Ω/Not measured*
Relay 2 Working? Yes/No*
Contact resistance ____Ω/Not measured*
Relay 3 Working? Yes/No*
Contact resistance ____Ω/Not measured*
Relay 4 Working? Yes/No*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 5 Working? Yes/No*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
P44x/EN RS/F65 Commissioning Test & Record
Sheets

Page 6/12 MiCOM P441/P442 & P444

Relay 6 Working? Yes/No*


Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 7 Working? Yes/No*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 8 Working? Yes/No*
Contact resistance ____Ω/Not measured*
Relay 9 Working? Yes/No*
Contact resistance ____Ω/Not measured*
Relay 10 Working? Yes/No*
Contact resistance ____Ω/Not measured*
Relay 11 Working? Yes/No*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 12 Working? Yes/No*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 13 Working? Yes/No*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 14 Working? Yes/No*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 15 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 16 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 17 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 18 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 19 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Commissioning Test & Record P44x/EN RS/F65
Sheets

MiCOM P441/P442 & P444 Page 7/12

Relay 20 Working? Yes/No/na*


Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 21 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 22 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 23 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 24 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 25 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 26 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 27 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 28 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 29 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 30 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 31 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 32 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
P44x/EN RS/F65 Commissioning Test & Record
Sheets

Page 8/12 MiCOM P441/P442 & P444

Relay 33 Working? Yes/No/na*


Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 34 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 35 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 36 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 37 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 38 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 39 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 40 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 41 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 42 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 43 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 44 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Relay 45 Working? Yes/No/na*
Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Commissioning Test & Record P44x/EN RS/F65
Sheets

MiCOM P441/P442 & P444 Page 9/12

Relay 46 Working? Yes/No/na*


Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*

1.1.2.7 Rear Communications Port

Communication standard K-Bus/Modbus/ IEC60870-


5-103*
Communications established? Yes/No*
Protocol converter tested? Yes/No/na*

1.1.2.8 Current Inputs

Displayed Current Primary/Secondary*

⎛ [ Phase CT Primary] ⎞
⎜ ⎟ _______A/na*
Phase CT Ratio ⎝ [ Phase CT Sec' y] ⎠
⎛ [ Mutual CT Primary] ⎞
⎜⎜ ⎟⎟ _______A/na*
Mutual CT Ratio ⎝ [ Mutual CT Sec' y] ⎠

Input CT Applied value Displayed value


IA _______A _______A
IB _______A _______A
IC _______A _______A
IM _______A _______A

1.1.2.9 Voltage Inputs

Displayed Voltage Primary/Secondary*

⎛ [ Main VT Primary] ⎞
⎜⎜ ⎟⎟ _______V/na*
Main VT Ratio ⎝ [ Main VT Sec' y] ⎠

⎛ [ C/S VT Primary] ⎞
⎜⎜ ⎟⎟ _______V/na*
C/S VT Ratio ⎝ [ C/S VT Secondary] ⎠

Input VT Applied value Displayed value


Va _______V _______V
Vb _______V _______V
Vc _______V _______V
C/S Voltage _______V/na* _______V
P44x/EN RS/F65 Commissioning Test & Record
Sheets

Page 10/12 MiCOM P441/P442 & P444

1.2 Setting Checks

1.2.1 Application-specific function settings applied? Yes/No*


Application-specific programmable scheme logic settings applied? Yes/No/na*
If settings applied using a portable computer and software, which __________________
software and version was used?

1.2.2 Application-specific function settings verified? Yes/No/na*

1.2.3 Application-specific programmable scheme logic tested? Yes/No/na*

1.2.4 Protection Function Timing Tested? Yes/No*

Overcurrent type (cell [3502 I>1 Direction]) Directional


/Non-directional*
Applied voltage _________V/na*
Applied current _________A
Expected operating time _________s
Measured operating time _________s

1.2.5 Trip and Auto-Reclose Cycle Checked Yes/No/na*

1.3 On-load Checks

Test wiring removed? Yes/No/na*


Disturbed customer wiring re-checked? Yes/No/na*
On-load test performed? Yes/No*

1.3.1 VT wiring checked? Yes/No/na*

Phase rotation correct? Yes/No*


Displayed Voltage Primary/Secondary*

⎛ [Main VT Primary] ⎞
⎜⎜ ⎟⎟ _______V/na*
Main VT Ratio ⎝ [Main VT Sec' y] ⎠

⎛ [C/S VT Primary] ⎞
⎜⎜ ⎟⎟ _______V/na*
C/S VT Ratio ⎝ [C/S VT Secondary] ⎠

Voltages Applied value Displayed value


Va _______V _______V
Vb _______V _______V
Vc _______V _______V
C/S Voltage _______V/na* _______V
Commissioning Test & Record P44x/EN RS/F65
Sheets

MiCOM P441/P442 & P444 Page 11/12

1.3.2 CT wiring checked ? Yes/No/na*

CT polarities correct ? Yes/No*


Displayed Current Primary/Secondary*

⎛ [Phase CT Primary] ⎞
⎜⎜ ⎟⎟ _______A/na*
Phase CT Ratio ⎝ [Phase CT Sec' y] ⎠

⎛ [Mutual CT Primary] ⎞
⎜⎜ ⎟⎟ _______A/na*
Mutual CT Ratio ⎝ [Mutual CT Sec' y] ⎠

Currents Applied value Displayed value


IA _______A _______A
IB _______A _______A
IC _______A _______A
IM _______A _______A

1.4 Final Checks

Test wiring removed ? Yes/No/na*


Disturbed customer wiring re-checked ? Yes/No/na*
Circuit breaker operations counter reset ? Yes/No/na*
Current counters reset ? Yes/No/na*
Event records reset ? Yes/No*
Fault records reset ? Yes/No*
Disturbance records reset ? Yes/No*
Alarms reset ? Yes/No*
LEDs reset ? Yes/No*
P44x/EN RS/F65 Commissioning Test & Record
Sheets

Page 12/12 MiCOM P441/P442 & P444

Comments

Commissioning Engineer Customer Witness

Date Date
Connection Diagrams P44x/EN CO/F65

MiCOM P441/P442 & P444

CONNECTION DIAGRAMS
Connection Diagrams P44x/EN CO/F65

MiCOM P441/P442 & P444 Page 1/14

CONTENT

1. MiCOM P441 – HARDWARE DESCRIPTION 3

2. MiCOM P441 – WIRING DIAGRAM (1/2) 4

3. MiCOM P441 – WIRING DIAGRAM (2/2) 5

4. MiCOM P442 – HARDWARE DESCRIPTION 6

5. MiCOM P442 – WIRING DIAGRAM (1/3) 7

6. MiCOM P442 – WIRING DIAGRAM (2/3) 8

7. MiCOM P442 – WIRING DIAGRAM (3/3) 9

8. MiCOM P444 – HARDWARE DESCRIPTION 10

9. MiCOM P444 – WIRING DIAGRAM (1/3) 11

10. MiCOM P444 – WIRING DIAGRAM (2/3) 12

11. MiCOM P444 – WIRING DIAGRAM (3/3) 13

NOTE: NCIT connection diagrams are not presented in this chapter.


P44x/EN CO/F65 Connection Diagrams

Page 2/14 MiCOM P441/P442 & P444

BLANK PAGE
1.

3 TERMINAL BLOCK DETAIL


8 OFF HOLES Æ 3.4
1 2
23.3 155.4 1 19
HEAVY DUTY MEDIUM DUTY
4

FLUSH MOUNTING PANEL


159.0 168.0 CUT-OUT DETAIL EACH TERMINATION ACCEPTS:-
2 x M4 RING TERMINALS
Connection Diagrams

18
10.35 181.3 4.5 16 24
202.0 17 18
MiCOM P441/P442 & P444

200.0

MOUNTING SCREWS : M4 x 12 SEM UNIT STEEL THREAD FORMING SCREW.

TERMINAL SCREWS : M4 x 6 STEEL COMBINATION PAN HEAD MACHINE SCREW.

TYPE OF FIBRE OPTIC CONNECTOR : ST


MiCOM P441 – HARDWARE DESCRIPTION

SECONDARY COVER (WHEN FITTED)

240.0 INCL. WIRING


FRONT VIEW REAR VIEW
MiCOM A B C D E F TERMINAL BLOCKS -
SEE DETAIL
TRIP

IRIG-B
ALARM

OUT OF SERVICE

HEALTHY

= CLEAR

= READ
177.0 157.5 MAX.
= ENTER
TX
RX
THE TERMINATION POSITIONS
SHOWN ARE TYPICAL ONLY

SIDE VIEW
206.0 30.0
P44x/EN CO/F65

Page 3/14
2.
A
DIRECTION OF FORWARD CURRENT FLOW
P2 P1
A
S2 S1
B
C B
C PHASE ROTATION
Page 4/14

MiCOM P441 (PART)


C1 5A
IA
D1
MiCOM P441 (PART)
A B C C2 -
1A D2 OPTO 1
NOTE 4. C3 + F11
WATCHDOG
P44x/EN CO/F65

C4 5A D3 NOTE 5 F12
- CONTACT
N
IB D4 OPTO 2 F13
+ WATCHDOG
n C5 F14 CONTACT
D5
- E1
1A OPTO 3
C6 D6 RELAY 1
+ E2
a b c C7 5A COMMS
D7 E3
- NOTE 6.
IC OPTO 4 E4 RELAY 2
D8
C8 +
E5
D9 RELAY 3
1A - E6
C9 OPTO 5
D10 E7
C10 5A +
D11 E8 RELAY 4
IM - F17
OPTO 6 - E9
C11 D12
SEE NOTE 2. + EIA485/ SEE DRAWING E10
1A D13 KBUS 10Px4001.
C12 - F18 E11
DIRECTION OF FORWARD CURRENT FLOW OPTO 7 PORT + RELAY 5
D14 E12
+
A F16
P2 P1 D15 SCN E13
A -
OPTO 8 E14 RELAY 6
S2 S1 D16
B + E15
D17 E16
C C B COMMON
PHASE ROTATION D18 CONNECTION E17 RELAY 7
E18
PARALLEL LINE
PROTECTION B1
F1 *
- B2 RELAY 8
AC OR DC
Vx AUX SUPPLY +
F2 B3
VA RELAY 9
C19 B4
MiCOM P441 – WIRING DIAGRAM (1/2)

F7 B5
+
B6 RELAY 10
F8
+
48V DC FIELD B7
VOLTAGE OUT F9
- B8
VB RELAY 11
C20 F10
- B9
B10
B11 RELAY 12
B12
VC C21 B13
B14 RELAY 13
B15
CASE B16
VN C22 EARTH B17 RELAY 14
C23 B18

V BUSBAR
(SEE NOTE 3.)
C24
NOTES 1.
C.T. SHORTING LINKS POWER SUPPLY VERSION 24-48V (NOMINAL) D.C. ONLY
(a) *

4. C.T. CONNECTIONS ARE SHOWN 1A CONNECTED AND ARE TYPICAL ONLY.


(b) PIN TERMINAL (P.C.B. TYPE)
5. OPTO INPUTS 1 & 2 MUST BE USED FOR SETTING GROUP CHANGES
2. I INPUT
M IS FOR OPTIONAL MUTUAL COMPENSATION OF FAULT LOCATOR. IF THIS OPTION IS SELECTED IN THE RELAY MENU.

3. V BUSBAR ONLY REQUIRED IF CHECK SYNCHRONISM FUNCTION ENABLED. 6. FOR COMMS OPTIONS SEE DRAWING 10Px4001.

P3942ENb
MiCOM P441/P442 & P444
Connection Diagrams
3.

STANDARD INPUT MODULE GN0010 013(110V)

F F F F F F F F F E E E E E E E E E D D D D D D D D D C C C C C C C C C
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 20 22 24
F F F F F F F F F E E E E E E E E E D D D D D D D D D C C C C C C C C C
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 19 21 23

PL1 PL3 PL2 PL1

ANALOGUE & OPTO TRANSFORMER ASSY


Connection Diagrams

POWER SUPPLY PCB RELAY PCB INPUT PCB GN0014 013


CIRCUIT DIAG. SK1 SK1 CIRCUIT DIAG. CIRCUIT DIAG. SK1 SK1
01 ZN0001 01 01 ZN0002 01 01 ZN0005 01
MiCOM P441/P442 & P444

PL1 PL1
* * * *

64-WAY RIBBON CABLE


MiCOM P441 – WIRING DIAGRAM (2/2)

* PL1 PL1 PL1

MAIN PROCESSOR & RELAY PCB CO-PROCESSOR


USER INTERFACE PCB CIRCUIT DIAG. CIRCUIT DIAG. 01 ZN0003 03
CIRCUIT DIAG. 01 ZN0006 01 01 ZN0002 01

SK2 SK1
PL3
BATTERY SERIAL TEST/DOWNLOAD

B B B B B B B B B
1 3 5 7 9 11 13 15 17
B B B B B B B B B
2 4 6 8 10 12 14 16 18

BOARD CONTAINS SAFETY CRITICAL COMPONENTS.


P44x/EN CO/F65

Page 5/14
12 OFF HOLES Æ 3.4 3 TERMINAL BLOCK DETAIL
4.
23.25 116.55 142.45 1 2
1 19
Page 6/14

HEAVY DUTY MEDIUM DUTY


4
FLUSH MOUNTING PANEL
CUT-OUT DETAIL
159.0 168.0
P44x/EN CO/F65

EACH TERMINATION ACCEPTS:-


2 x M4 RING TERMINALS

18
10.3 155.4 129.5 4.5
16 24
305.5 17 18

303.5

MOUNTING SCREWS : M4 x 12 SEM UNIT STEEL THREAD FORMING SCREW.

TERMINAL SCREWS : M4 x 6 STEEL COMBINATION PAN HEAD MACHINE SCREW.

TYPE OF FIBRE OPTIC CONNECTOR : ST


MiCOM P442 – HARDWARE DESCRIPTION

SECONDARY COVER (WHEN FITTED)

240.0 INCL. WIRING


FRONT VIEW REAR VIEW
MiCOM A B C D E F G H J

TRIP

IRIG-B
ALARM

OUT OF SERVICE

HEALTHY

= CLEAR 177.0
= READ
157.5 MAX.
= ENTER
TX
RX

TERMINAL BLOCKS -
309.6 30.0 SIDE VIEW SEE DETAIL
THE TERMINATION POSITIONS
SHOWN ARE TYPICAL ONLY
MiCOM P441/P442 & P444
Connection Diagrams
5.
A
DIRECTION OF FORWARD CURRENT FLOW
P2 P1
A
S2 S1
B
C B
C PHASE ROTATION

MiCOM P442 PART) MiCOM P442 PART)


C1 5A J11
WATCHDOG
IA CONTACT J12
D1
- J13 G1
A B C C2 OPTO 1 WATCHDOG
D2 CONTACT J14 G2 RELAY 8
1A + **
NOTE 4. C3 NOTE 5
D3 G3
C4 5A - H1
OPTO 2 G4 RELAY 9 **
N D4 RELAY 1 H2
IB +
G5
D5 H3
n C5 - G6 RELAY 10 **
OPTO 3 RELAY 2 H4
D6
Connection Diagrams

1A + G7
C6 H5
C7 5A D7 RELAY 3 G8
a b c - H6 RELAY 11
OPTO 4 G9
IC D8 H7
+ G10
C8 D9 RELAY 4 H8
G11
MiCOM P441/P442 & P444

- RELAY 12
1A OPTO 5 H9
C9 D10 G12
+ H10
C10 5A D11 G13
- RELAY 5 H11
IM OPTO 6 G14
D12 H12 RELAY 13
+ G15
C11 H13
SEE NOTE 2. D13
1A - G16
C12 OPTO 7 RELAY 6 H14
DIRECTION OF FORWARD CURRENT FLOW D14 G17
+ H15 RELAY 14
D15 G18
A - H16
P2 P1
A D16 OPTO 8 H17
+ RELAY 7
S2 S1 H18 F1
B D17
COMMON F2 RELAY 15 **
C C B D18 CONNECTION
PHASE ROTATION F3
COMMS F4 RELAY 16 **
PARALLEL LINE E1 NOTE 6.
- F5
PROTECTION OPTO 9
E2 F6 RELAY 17 **
+
E3 F7
- J17 F8
MiCOM P442 – WIRING DIAGRAM (1/3)

VA E4 OPTO 10 - RELAY 18
C19 + F9
EIA485/ SEE DRAWING
E5 F10
- KBUS 10Px4001.
OPTO 11 J18
E6 PORT + F11
+ RELAY 19
E7 J16 F12
- SCN
VB C20 OPTO 12 F13
E8
+ F14 RELAY 20
E9 F15
-
E10 OPTO 13 J1 * F16
+ -
AC OR DC
E11 Vx J2 F17 RELAY 21
AUX SUPPLY +
VC C21 - F18
E12 OPTO 14
+ J7
E13 +
-
OPTO 15 J8
E14 +
VN C22 + 48V DC FIELD
VOLTAGE OUT J9
E15 -
C23 -
OPTO 16 J10
E16 - CASE
+ EARTH
V BUSBAR
(SEE NOTE 3.) E17
NOTES 1. COMMON
C24
E18 CONNECTION
(a) C.T. SHORTING LINKS
* POWER SUPPLY VERSION 24-48V (NOMINAL) D.C. ONLY
** FAST TRIP RELAY (OPTIONAL)

(b) PIN TERMINAL (P.C.B. TYPE)


4. C.T. CONNECTIONS ARE SHOWN 1A CONNECTED AND ARE TYPICAL ONLY.
5. OPTO INPUTS 1 AND 2 MUST BE USED FOR SETTING GROUP CHANGES
2. I INPUT
M IS FOR OPTIONAL MUTUAL COMPENSATION OF FAULT LOCATOR. IF THIS OPTION IS SELECTED IN THE RELAY MENU.
3. V BUSBAR ONLY REQUIRED IF CHECK SYNCHRONISM FUNCTION ENABLED. 6. FOR COMMS OPTIONS SEE DRAWING 10Px4001.

P3909ENb
P44x/EN CO/F65

Page 7/14
6.
DIRECTION OF FORWARD CURRENT FLOW A

P2 P1
A
S2 S1
B
C B
C PHASE ROTATION
Page 8/14

MiCOM P442 PART)


C1 5A MiCOM P442 PART)
D1
IA -
D2 OPTO 1
A B C C2 + J11
NOTE 5 WATCHDOG
1A D3 CONTACT J12
NOTE 4 C3 -
P44x/EN CO/F65

D4 OPTO 2 J13 G1
C4 5A + WATCHDOG
N CONTACT J14 G2 RELAY 8
IB D5
- G3
n C5 D6 OPTO 3 H1
+ G4 RELAY 9
RELAY 1 H2
1A D7 G5
C6 - H3
C7 5A OPTO 4 G6 RELAY 10
a b c D8 RELAY 2 H4
+
IC G7
D9 H5
- G8
C8 OPTO 5 RELAY 3 H6 RELAY 11
D10 G9
1A +
C9 H7
D11 G10
- H8
C10 5A OPTO 6 RELAY 4 G11
D12 H9 RELAY 12
+
IM G12
D13 H10
NOTE 2 C11 - G13
OPTO 7 RELAY 5 H11
1A D14 G14
C12 + H12 RELAY 13
DIRECTION OF FORWARD CURRENT FLOW D15 G15
- H13
OPTO 8 G16
P2 P1 A D16 H14
+ RELAY 6 G17
A H15 RELAY 14
D17
S2 S1 COMMON G18
B H16
D18 CONNECTION
C B RELAY 7 H17
C
PHASE ROTATION H18
E1 F3
- -
PARALLEL LINE E2 OPTO 9
PROTECTION + RELAY 15
E3 F4
COMMS +
-
E4 OPTO 10 NOTE 6 F7 -
MiCOM P442 – WIRING DIAGRAM (2/3)

+
VA RELAY 16
C19 E5
- F8
OPTO 11 + HIGH BREAK
E6 J17
+ - F11 CONTACTS
-
E7 SEE DRAWING NOTE 7
- EIA485/ RELAY 17
E8 OPTO 12 KBUS 10Px4001. F12
VB + J18 +
C20 PORT +
E9 F15 -
- J16
E10 OPTO 13 SCN RELAY 18
+ F16
+
E11
-
VC E12 OPTO 14
C21 + J1 *
-
E13 AC OR DC
- Vx AUX SUPPLY J2
OPTO 15 +
E14
+
VN C22 E15 J7
- +
C23 E16 OPTO 16 J8
+ +
48V DC FIELD
NOTES E17 J9 CASE
V BUSBAR VOLTAGE OUT - EARTH
COMMON
1. NOTE 3 E18 CONNECTION J10
C24 -
(a) C.T. SHORTING LINKS

POWER SUPPLY VERSION 24-48V (NOMINAL) D.C. ONLY


(b) PIN TERMINAL (P.C.B. TYPE) *
5. OPTO INPUTS 1 AND 2 MUST BE USED FOR SETTING GROUP CHANGES
IF THIS OPTION IS SELECTED IN THE RELAY MENU.
2.I M INPUT IS FOR OPTIONAL MUTUAL COMPENSATION OF FAULT LOCATOR.
6. FOR COMMS OPTIONS SEE DRAWING 10Px4001.
3. V BUSBAR ONLY REQUIRED IF CHECK SYNCHRONISM FUNCTION ENABLED.

P3943ENa
7. TO OBTAIN HIGH BREAK DUTY, CONTACTS MUST BE
4. C.T. CONNECTIONS ARE SHOWN 1A CONNECTED AND ARE TYPICAL ONLY. CONNECTED WITH THE CORRECT POLARITY.
MiCOM P441/P442 & P444
Connection Diagrams
7.
STANDARD INPUT MODULE GN0010 013 (110V)

J J J J J J J J J H H H H H H H H H F F F F F F F F F D D D D D D D D D C C C C C C C C C
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 20 22 24
J J J J J J J J J H H H H H H H H H F F F F F F F F F D D D D D D D D D C C C C C C C C C
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 19 21 23

RELAY PCB RELAY PCB ANALOGUE & OPTO TRANSFORMER ASSY


POWER SUPPLY PCB ZN0002 001 ou ZN0002 001 ou INPUT PCB GN0014 013
CIRCUIT DIAG. SK1 SK1 ZN0005 001 ou SK1 SK1
ZN0031 001 ZN0031 001
01 ZN0001 01 ZN0017 001
PL1 PL1 PL1
* * * * *
Connection Diagrams

MiCOM P441/P442 & P444

64-WAY RIBBON CABLE

* PL1 * PL1 * PL1 PL1 PL1

MAIN PROCESSOR & OPTO PCB IRIG-B PCB CO-PROCESSOR


USER INTERLACE PCB RELAY PCB ZN0005 002 ou CIRCUIT DIAG CIRCUIT DIAG
CIRCUIT DIAG. 01 ZN0006 01 ZN0002 001 ou ZN0017 002 (UI) 01 ZN0007 01 01 ZN0003 03
ZN0031 001
SK2 SK1 Rx1 Tx1
BATTERY SERIAL TEST/DOWNLOAD
MiCOM P442 – WIRING DIAGRAM (3/3)

G G G G G G G G G E E E E E E E E E
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17
G G G G G G G G G E E E E E E E E E BNC FIBRE OPTIC
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 TRANSDUCERS

Optical fiber +
RearCom2 + IRIGB (optional) RearCom2 (optional) IRIG-B PCB IRIG-B PCB
01 ZN0025001 01 ZN0025002 01 ZN0007 001 01 ZN0007 002

Rx1 Tx1
SK4 SK5 (unused) SK4 SK5 (unused)
1 3 5 7 9 1 3 5 7 9 1 3 5 7 9 1 3 5 7 9
2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8

BNC D-type D-type D-type D-type BNC FIBRE OPTIC


TRANSDUCERS

P442
BOARD CONTAINS SALETY CRITICAL COMPONENTS.
* P3911ENa
P44x/EN CO/F65

Page 9/14
8.
74.9 116.55 142.45 12 OFF HOLES Dia. 3.4 TERMINAL BLOCK DETAIL
3
1
Page 10/14

19 2
1
HEAVY DUTY MEDIUM DUTY
4
P44x/EN CO/F65

159.0 168.0

4.5 EACH TERMINATION ACCEPTS:-


2 x M4 RING TERMINALS

18
62.0 155.4 129.5 FLUSH MOUNTING
PANEL CUT-OUT 16 24
DETAIL. 17 18
408.9

406.9

MOUNTING SCREWS : M4 x 12 SEM UNIT STEEL THREAD FORMING SCREW.

TERMINAL SCREWS : M4 x 7 BRASS CHEESE HEAD SCREWS WITH LOCK WASHERS PROVIDED.

TYPE OF FIBRE OPTIC CONNECTOR : ST


MiCOM P444 – HARDWARE DESCRIPTION

SECONDARY COVER (WHEN FITTED)

240.0 INCL. WIRING REAR VIEW


FRONT VIEW
MiCOM

TRIP IRIG-B

ALARM

OUT OF SERVICE

HEALTHY

CLEAR
= 177.0 157.5 MAX.
= READ TX
RX
ENTER
=
16

TERMINAL BLOCKS -
SIDE VIEW SEE DETAIL
413.2 30.0
THE TERMINATION POSITIONS
SHOWN ARE TYPICAL ONLY
MiCOM P441/P442 & P444
Connection Diagrams
A
9.
DIRECTION OF FORWARD CURRENT FLOW
P2 P1 MiCOM P444 (PART) MiCOM P444 (PART)
A N11 J1
WATCHDOG
S2 S1 CONTACT N12 J2 RELAY 25
B D1
C B - N13 J3
C PHASE ROTATION D2 OPTO 1 WATCHDOG RELAY 26
+ CONTACT N14 J4
D3 NOTE 5 J5
- M1
J6 RELAY 27
D4 OPTO 2 RELAY 1 M2
+ J7
D5 M3
- J8 RELAY 28
RELAY 2 M4
C1 5A D6 OPTO 3 J9
A B C + M5
IA D7 J10 RELAY 29
RELAY 3 M6
-
C2 OPTO 4 J11
D8 M7
1A + J12 RELAY 30
N NOTE 4. C3 D9 RELAY 4 M8
- J13
C4 5A M9
D10 OPTO 5 J14
n + RELAY 5 M10 RELAY 31
IB
D11 J15
C5 - M11
OPTO 6 RELAY 6 J16
1A D12 M12
a b c C6 + J17
M13 RELAY 32
D13 J18
C7 5A
Connection Diagrams

- M14
D14 OPTO 7 RELAY 7
IC + M15 H1
C8 D15 M16 H2 RELAY 33
-
1A D16 OPTO 8 M17 H3
C9 RELAY 8
+ RELAY 34
C10 5A M18 H4
MiCOM P441/P442 & P444

D17
COMMON H5
IM D18 L1
CONNECTION H6 RELAY 35
C11 ** RELAY 9 L2
SEE NOTE 2. E1 H7
1A - L3
C12 E2 OPTO 9 RELAY 10 H8
DIRECTION OF FORWARD CURRENT FLOW ** L4 RELAY 36
+ H9
E3 L5
P2 P1 A - H10
** RELAY 11 L6
A E4 OPTO 10
+ H11 RELAY 37
S2 S1 L7
B E5 RELAY 12 H12
- ** L8
C B E6 OPTO 11 H13
C L9
PHASE ROTATION + H14
E7 RELAY 13 L10 RELAY 38
- H15
PARALLEL LINE L11
E8 OPTO 12 H16
PROTECTION + RELAY 14 L12
E9 H17 RELAY 39
- L13
OPTO 13 H18
E10 L14 OPTIONAL
+ RELAY 15
E11 L15 G1 DEPENDANT ON
VA
C19 - RELAY 40 MODEL VERSION
L16 G2
E12 OPTO 14
+ L17 G3
RELAY 16
E13 L18 RELAY 41
- G4
MiCOM P444 – WIRING DIAGRAM (1/3)

E14 OPTO 15 G5
+ K1
VB G6 RELAY 42
C20 E15 ** RELAY 17 K2
- G7
E16 OPTO 16 K3
+ RELAY 18 G8 RELAY 43
** K4
E17 G9
COMMON K5
E18 CONNECTION RELAY 19 G10
VC ** K6
C21 G11
F1 K7 RELAY 44
- RELAY 20 G12
F2 OPTO 17 ** K8
+ G13
K9
VN C22 F3 RELAY 21 G14
- K10 RELAY 45
F4 OPTO 18 G15

P3910ENc
C23 + K11
RELAY 22 G16
F5 K12
- G17 RELAY 46
V BUSBAR OPTO 19 K13
F6 G18
(SEE NOTE 3.) + K14
C24 F7 RELAY 23
- K15
F8 OPTO 20 K16
+ * N1
(a) C.T. SHORTING LINKS K17 -
F9 RELAY 24 AC OR DC
- K18 N2 Vx
F10 OPTO 21 + AUX SUPPLY
+
(b) F11 N7
PIN TERMINAL (P.C.B. TYPE) - COMMS +
F12 OPTO 22 NOTE 6.
+ N8
2. I INPUT IS FOR OPTIONAL MUTUAL COMPENSATION OF FAULT LOCATOR. +
M F13 48V DC FIELD
- N9 VOLTAGE OUT
3. V BUSBAR ONLY REQUIRED IF CHECK SYNCHRONISM FUNCTION ENABLED. N17 -
F14 OPTO 23 -
+ N10
4. C.T. CONNECTIONS ARE SHOWN 1A CONNECTED AND ARE TYPICAL ONLY. SEE DRAWING -
F15 EIA485/
- KBUS 10Px4001.
5. OPTO INPUTS 1 AND 2 MUST BE USED FOR SETTING GROUP CHANGES F16 OPTO 24 N18
PORT +
+ CASE
IF THIS OPTION IS SELECTED IN THE RELAY MENU.
F17 N16 EARTH
COMMON SCN
6. FOR COMMS OPTIONS SEE DRAWING 10Px4001. F18 CONNECTION

* POWER SUPPLY VERSION 24-48V (NOMINAL) D.C. ONLY


FAST TRIP RELAY (OPTIONAL)
Page 11/14
P44x/EN CO/F65
DIRECTION OF FORWARD CURRENT FLOW A

10.
P2 P1
A D1
-
S2 S1 OPTO 1
B D2 MiCOM P444 (PART)
+
C B NOTE 5
C D3 N11 J3 -
PHASE ROTATION - WATCHDOG
D4 OPTO 2 CONTACT N12 RELAY 17
+ J4
N13 +
D5 WATCHDOG
- N14 J7
OPTO 3 CONTACT -
D6
+
Page 12/14

C1 5A M1 RELAY 18
D7 J8 HIGH BREAK
A B C - RELAY 1 M2 +
IA OPTO 4
D8 J11 CONTACTS
C2 + M3 - NOTE 7
D9 RELAY 2 M4 RELAY 19
NOTE 4 1A -
N C3 J12
D10 OPTO 5 M5 +
C4 5A + RELAY 3 M6 J15
P44x/EN CO/F65

n D11 -
IB - M7
OPTO 6 RELAY 20
C5 D12 RELAY 4 M8 J16
+ +
a b c 1A D13 M9
C6 -
OPTO 7 RELAY 5 M10
C7 5A D14 + H1
M11
IC D15 RELAY 6 H2 RELAY 21
- M12
C8 OPTO 8 H3
D16 M13
+ RELAY 22
1A H4
C9 D17 M14
RELAY 7
C10 5A COMMON H5
M15
D18 CONNECTION H6 RELAY 23
IM M16
E1 H7
C11 - RELAY 8 M17
NOTE 2 OPTO 9 H8
E2 M18 RELAY 24
1A +
C12 H9
DIRECTION OF FORWARD CURRENT FLOW E3
- H10
OPTO 10 - L3
P2 P1 A E4 H11
+ RELAY 25
A RELAY 9 H12
E5 L4
S2 S1 - +
B OPTO 11 H13
E6 L7
+ - H14
C C B RELAY 26
PHASE ROTATION
E7 RELAY 10 H15
-
OPTO 12 HIGH BREAK L8
PARALLEL LINE E8 + + H16
CONTACTS L11 H17
PROTECTION E9 - RELAY 27
- NOTE 7
OPTO 13 RELAY 11 H18
E10
+ L12
+ G1
E11
- L15 G2 RELAY 28
VA OPTO 14 -
C19 E12
+ RELAY 12 G3
E13 L16 G4 RELAY 29
- +
OPTO 15 G5
MiCOM P444 – WIRING DIAGRAM (2/3)

E14 +
G6 RELAY 30
E15 - K3
VB - G7
C20 OPTO 16 RELAY 13
E16 G8
+ K4 RELAY 31
+
E17 G9
COMMON - K7
E18 CONNECTION G10
RELAY 14 G11
F1 HIGH BREAK K8 RELAY 32
VC C21 - + G12
OPTO 17 CONTACTS K11
F2 NOTE 7 - G13
+

P3944ENa
F3 RELAY 15 G14
- K12 RELAY 33
OPTO 18 + G15
VN C22 F4
+ K15 G16
-
C23 F5
- RELAY 16 G17 RELAY 34
NOTES F6 OPTO 19 K16 G18
V BUSBAR + +
1. NOTE 3 F7
-
C24 OPTO 20
F8 +
(a) C.T. SHORTING LINKS * N1
COMMS -
F9 AC OR DC
- NOTE 6 N2 Vx
OPTO 21 + AUX SUPPLY
F10
+
(b) PIN TERMINAL (P.C.B. TYPE)
F11 N7
- +
F12 OPTO 22
2.I M INPUT IS FOR OPTIONAL MUTUAL COMPENSATION OF FAULT LOCATOR. + N17 N8
- +
48V DC FIELD
3. V BUSBAR ONLY REQUIRED IF CHECK SYNCHRONISM FUNCTION ENABLED. F13 SEE DRAWING N9
- EIA485/ - VOLTAGE OUT
F14 OPTO 23 KBUS 10Px4001.
4. C.T. CONNECTIONS ARE SHOWN 1A CONNECTED AND ARE TYPICAL ONLY. + N18 N10
PORT + -
F15
5. OPTO INPUTS 1 AND 2 MUST BE USED FOR SETTING GROUP CHANGES - N16
IF THIS OPTION IS SELECTED IN THE RELAY MENU. F16 OPTO 24 SCN
+ CASE
F17 EARTH
6. FOR COMMS OPTIONS SEE DRAWING 10Px4001.
COMMON
F18 CONNECTION
7. TO OBTAIN HIGH BREAK DUTY, CONTACTS MUST BE
CONNECTED WITH THE CORRECT POLARITY. MiCOM P444 (PART) POWER SUPPLY VERSION 24-48V (NOMINAL) D.C. ONLY
*
MiCOM P441/P442 & P444
Connection Diagrams
11.

N N N N N N N N N M M M M M M M M M L L L L L L L L L D D D D D D D D D C C C C C C C C C
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 20 22 24
N N N N N N N N N M M M M M M M M M L L L L L L L L L D D D D D D D D D C C C C C C C C C
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 19 21 23

UNIVERSAL OPTO TRANSFORMER ASSY


POWER SUPPLY PCB RELAY PCB RELAY PCB INPUT PCB GN0014 013
CIRCUIT DIAG. SK1 SK1 CIRCUIT DIAG. CIRCUIT DIAG. CIRCUIT DIAG. SK1 SK1
01 ZN0001 01 01 Zn0019 01 01 Zn0019 01 01 Zn0017 01

* * * * *
Connection Diagrams

64-WAY RIBBON CABLE


MiCOM P441/P442 & P444

* * * * *
MAIN PROCESSOR & RELAY PCB UNIVERSEL OPTO UNIVERSEL OPTO
RELAY PCB INPUT PCB INPUT PCB
USER INTERLACE PCB CIRCUIT DIAG. CIRCUIT DIAG.
CIRCUIT DIAG. 01 ZN0006 01 01 Zn0019 01 CIRCUIT DIAG. CIRCUIT DIAG.
01 Zn0019 01 01 Zn0017 02 01 ZN0017 02
SK2 SK1
BATTERY SERIAL TEST/DOWNLOAD

J J J J J J J J J K K K K K K K K K F F F F F F F F F E E E E E E E E E
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17
J J J J J J J J J K K K K K E K K K F F F F F F F F F E E E E E E E E E
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18
MiCOM P444 – WIRING DIAGRAM (3/3)

IRIG-B PCB CO-PROCESSOR Optical fiber +


CIRCUIT DIAG CIRCUIT DIAG
01 ZN0007 03 01 ZN0003 03 RearCom2 + IRIGB (optional) RearCom2 (optional) IRIG-B PCB IRIG-B PCB
01 ZN0025001 01 ZN0025002 01 ZN0007 001 01 ZN0007 002
Rx1 Tx1
Rx1 Tx1
SK4 SK5 (unused) SK4 SK5 (unused)
1 3 5 7 9 1 3 5 7 9 1 3 5 7 9 1 3 5 7 9
2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8
BNC FIBRE OPTIC
TRANSDUCERS BNC D-type D-type D-type D-type BNC FIBRE OPTIC
TRANSDUCERS

P444
BOARD CONTAINS SALETY CRITICAL COMPONENTS.

EXAMPLE FOR: P444114A3A????A


P3912ENa
Page 13/14
P44x/EN CO/F65
P44x/EN CO/F65 Connection Diagrams

Page 14/14 MiCOM P441/P442 & P444

BLANK PAGE
Courrier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444

CONFIGURATION /
MAPPING
P44x/EN GC/F65 Courrier Data Base

MiCOM P441, P442 & P444


Courrier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 1/2

The following configuration / Mapping is specific to the software D2.0.

CONFIGURATION / MAPPING
This Chapter is split into several sections, these are as follows:

Part A: Menu database


This database defines the structure of the relay menu for the Courier interface and the front
panel user interface. This includes all the relay settings and measurements. Indexed
strings for Courier and the user interface are cross referenced to the Menu Datatype
Definition section (using a G Number). For all settable cells the setting limits and default
value are also defined within this database.
NOTE: The following labels are used within the database
Label Description Value
V1 Main VT Rating 1 (100/110V)
V2 Checksync VT Rating 1 (100/110V)

I1 Phase CT Rating 1 or 5 (Setting 0A08)

I4 Mutual CT Rating 1 or 5 (Setting 0A0E)

Part B: Menu datatype definition for Modbus


This table defines the datatypes used for Modbus (the datatypes for the Courier and user
interface are defined within the Menu Database itself using the standard Courier
Datatypes). This section also defines the indexed string setting options for all interfaces.
The datatypes defined within this section are cross reference to from the Menu Database
using a G number.
Part C: Internal digital signals (DDB)
This table defines all of the relay internal digital signals (opto inputs, output contacts and
protection inputs and outputs). A relay may have up to 512 internal signals each reference
by a numeric index as shown in this table. This numeric index is used to select a signal for
the commissioning monitor port. It is also used to explicitly define protection events
produced by the relay.
Part D: Menu Database for MODBUS
This database defines the structure of the menu for the Modbus interface. This includes all
the relay settings and measurements.
Part E: IEC60870-5-103 Interoperability Guide
This table fully defines the operation of the IEC60870-5-103 (VDEW) interface for the relay
it should be read in conjunction with the relevant section of the Communications Chapter of
this Manual (P44x/EN CT).
Part F: DNP3.0 Database
This database defines the structure of the menu for the DNP3.0 interface. This includes all
the relay settings and measurements.
Part G: Maintenance records
This section of the Appendix specifies all the maintenance information that can be
produced by the relay.
P44x/EN GC/F65 Courier Data Base

Page 2/2 MiCOM P441, P442 & P444

DEFAULT PROGRAMMABLE SCHEME LOGIC (PSL)

References
Chapter IT: Introduction : User Interface operation and connections to relay
Courier User Guide R6512
Modicon Modbus Protocol Reference Guide PI-MBUS-300 Rev. E
IEC60870-5-103 Telecontrol Equipment and Systems - Transmission Protocols –
Companion
Standard for the informative interface of Protection Equipment
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Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
00 00 SYSTEM DATA * * * *

00 1 Language Indexed String G19 G19 1 English Setting 0 3 1 2 * * * *

00 2 Password ASCII Password(4 bytes) 40001 40002 G20 G20 2 AAAA Setting 65 90 1 0 * * * *

00 3 Unused 1 * * * *

00 4 Description ASCII Text(16 bytes) 40004 40011 G3 8 MiCOM Setting 32 163 1 2 * * * *

00 5 Plant Reference ASCII Text(16 bytes) 40012 40019 G3 8 AREVA Setting 32 163 1 2 * * * *

00 6 Model Number ASCII Text(32 bytes) 30020 30035 G3 16 Model Number Data * * * *

00 7 Unused * * * *

00 8 Serial Number ASCII Text(7 bytes) 30044 30051 G3 8 Serial Number Data * * * *

00 9 Frequency Unsigned Integer(1 byte) 40020 40020 G1 1 50 Setting 50 60 10 2 * * * *

00 0A Comms Level Unsigned Integer(2 bytes) 2 Data * * * *

00 0B Relay Address Unsigned Integer(2 bytes) G1 255 Setting 0 255 1 1 * * * *

00 0C Plant Status Binary Flags(16 bits) 30002 30002 G4 1 Data * * * *

00 0D Control Status Binary Flags(16 or 32 bits) 30004 30004 G5 1 Data * * * *

00 0E Active Group Unsigned Integer(2 bytes) 30006 30006 G1 G1 1 Data * * * *

00 0F Unused * * * *

00 10 CB Trip/Close Indexed String(2) G55 No Operation Command 0 2 1 1 * * * * 0701

00 10 CB Trip/Close Indexed String(2) 40021 40021 G55 G55 1 No Operation Command 0 2 1 0 * * * * 0702

00 11 Software Ref. 1 ASCII Text(16 characters) 30052 30059 G3 8 Data * * * *

00 12 Software Ref. 2 ASCII Text(16 characters) Data * * * *

00 13 Unused ASCII Text(16 characters) Data * * * *

00 14 Unused ASCII Text(16 characters) Data * * * *

00 15-1F Unused

00 20 Opto I/P Status Binary Flag(32 bits) 30727 30728 G27 2 Data * * * *
Indexed String
00 21 Relay O/P Status Binary Flag(32 bits) G9 2 Data * * * *
Indexed String
00 22 Alarm Status 1 Binary Flag(32 bits) G96 2 Data * * * *
Indexed String
00 23 Unused

00 40 Relay O/P Status 1 Binary Flag(32 bits) 30007 30008 G9 2 Data * * * *


Indexed String
00 41 Relay O/P Status 2 Binary Flag(32 bits) 30009 30010 G304 2 Data
Indexed String
00 50 Alarm Status 1 Binary Flag(32 bits) 30011 30012 G96 2 Data * * * *
Indexed String
00 51 Alarm Status 2 Binary Flag(32 bits) 30013 30014 G111 2 Data * * * *
Indexed String
00 52 Alarm Status 3 Binary Flag(32 bits) 30015 30016 G303 2 Data * * * *
Indexed String
00 D0 Access Level Unsigned Integer(2 bytes) 30017 30017 G1 G1 1 Data * * * *
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Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
00 D1 Password Control Unsigned Integer(2 bytes) 40022 40022 G22 G22 1 2 Setting 0 2 1 2 * * * *

00 D2 Password Level 1 ASCII Password(4 characters) 40023 40024 G20 G20 2 AAAA Setting 65 90 1 1 * * * *

00 D3 Password Level 2 ASCII Password(4 characters) 40025 40026 G20 G20 2 AAAA Setting 65 90 1 2 * * * *

00 D4-D8 Reserved for levels > 2

01 00 VIEW RECORDS * * * *

01 1 Select Event Unsigned Integer(2) 40100 40100 G1 1 0 Setting 0 249 1 0 * * * *

01 2 Menu Cell Ref Cell Reference (From Record) Data * * * *

01 3 Time & Date IEC870 Time & Date 30103 30106 G12 4 (From Record) Data * * * *

01 4 Event Text Ascii String(32) Data * * * *

01 5 Event Value Binary Flag(32)/UINT32 30108 30109 G27 2 Data * * * *

01 6 Select Fault Unsigned Integer 40101 40101 G1 1 0 Setting 0 4 1 0 * * * *

01 7 Active Group Unsigned Integer 30113 30113 G1 1 0 Data * * * *

N/A Distance Data * * * * DistanceProtection Trip


Trip Z# aided
N/A Started Phase Data * * * * Anystart
ABCN
N/A Tripped Phase Data * * * * AnyTrip
ABCN
N/A Overcurrent Data * * * * I> Start
Start I> 1 2 3 4
N/A Overcurrent Data * * * * I> Trip
Trip I> 1 2 3 4
N/A Neg Seq O/C Data * * * * I2> Start
Start I2> 1 2 3 4
N/A Neg Seq O/C Data * * * * I2> Trip
Trip I2> 1 2 3 4
N/A Broken Conductor Data * * * * Broken Conductor Trip
Trip
N/A Earth Fault Data * * * * IN> Start
Start IN> 1 2 3 4
N/A Earth Fault Data * * * * IN> Trip
Trip IN> 1 2 3 4
N/A Aided D.E.F Data * * * * DEF> Start
Start
N/A Aided D.E.F Data * * * * DEF> Trip
Trip
N/A Undervoltage Data * * * * V< Start
Start V< 1 2
N/A Undervoltage Data * * * * V< Trip
Trip V< 1 2
N/A Overvoltage Data * * * * V> Start
Start V> 1 2
N/A Overvoltage Data * * * * V> Trip
Trip V> 1 2
N/A Res. Overvoltage Data * * * * VN> Start
Start VN> 1 2
N/A Res. Overvoltage Data * * * * VN> Trip
Trip VN> 1 2
N/A Breaker Fail Data * * * * CB Fail
CB Fail 1 2
N/A Supervision Data * * * * AlarmVTS or AlarmCTS
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Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
VTS CTS CVTS
N/A LOL Data * * * * LOL Trip
Trip
N/A SOTF/TOR Data * * * * SOTF/TOR Trip
Trip
N/A TOC Data * * * * TOC Start
Start
N/A TOC Data * * * * TOC Trip
Trip
N/A Weak Infeed Data * * * * Weak Infeed Trip
Trip
N/A ZSP Data * * * * ZSP Start
Start
N/A ZSP Data * * * * ZSP Trip
Trip
N/A PAP Data * * * * PAP Start
Start
N/A PAP Data * * * * PAP Trip
Trip
N/A USER Data * * * * USER Trip
Trip
01 8 Faulted Phase Binary Flags (8 Bits) N/A 30114 30114 G16 G16 1 Data * * * *

01 9 Start Elements Binary Flags (32 Bits) N/A 30115 30116 G84 G84 2 Data * * * *

01 0A Trip Elements Binary Flags (32 Bits) N/A 30117 30118 G85 G85 2 Data * * * *

01 0B Validities Binary Flags (8 Bits) N/A 30119 30119 G130 G130 1 Data * * * *

01 0C Time Stamp IEC870 Time & Date 30120 30123 G12 G12 4 Data * * * *

01 0D Fault Alarms Binary Flags (32 Bits) 30124 30125 G87 G87 2 Data * * * *

01 0E System Frequency Courier Number (frequency) 30126 30126 G25 1 Data * * * *

01 0F Fault Duration Courier Number (time) 30127 30128 G24 2 Data * * * *

01 10 Relay Trip Time Courier Number (time) 30129 30130 G24 2 Data * * * *

01 11 Fault Location Courier Number (Metres) 30131 30132 G125 2 Data * * * * SMF

01 12 Fault Location Courier Number (Miles) 30133 30134 G125 2 Data * * * * SMF

01 13 Fault Location Courier Number (ohms) 30135 30136 G125 2 Data * * * * SMF

01 14 Fault Location Courier Number(% ) 30137 30138 G125 2 Data * * * * SMF

01 15 IA Courier Number (current) 30139 30140 G24 2 Data * * * *

01 16 IB Courier Number (current) 30141 30142 G24 2 Data * * * *

01 17 IC Courier Number (current) 30143 30144 G24 2 Data * * * *

01 1B VAN Courier Number(voltage) 30145 30146 G24 2 Data * * * *

01 1C VBN Courier Number(voltage) 30147 30148 G24 2 Data * * * *

01 1D VCN Courier Number(voltage) 30149 30150 G24 2 Data * * * *

01 1E Fault Resistance Courier Number (Ohms) 30151 30152 G125 2 Data * * * *

01 1F Fault in Zone Indexed string 30153 30153 G110 1 Data * * * *

01 20 Trip Elements 2 Binary Flags (32 Bits) N/A 30154 30155 G86 G86 2 Data * * * *

01 F0 Select Report Unsigned Integer 40102 40102 G1 1 Manual override to s Setting 0 4 1 2 * * * *


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Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

01 F1 Report Text Ascii String(32) Data * * * *

01 F2 Maint Type UINT32 30036 30037 G27 2 Data * * * *

01 F3 Maint Data UINT32 30038 30039 G27 2 Data * * * *

01 FF Reset Indication Indexed String G11 No Command 0 1 1 1 * * * *

02 00 MEASUREMENTS 1 * * * *

02 1 IA Magnitude Courier Number (current) 311003 311002 G24 2 Data * * * *


30702 30703 G24 2 Data * * * *
02 2 IA Phase Angle Courier Number (angle) 30202 30202 G30 1 Data * * * *

02 3 IB Magnitude Courier Number (current) 30203 311004 G24 2 Data * * * *


30704 30705 G24 2 Data * * * *
02 4 IB Phase Angle Courier Number (angle) 30205 30205 G30 1 Data * * * *

02 5 IC Magnitude Courier Number (current) 311007 311006 G24 2 Data * * * *


30706 30707 G24 2 Data * * * *
02 6 IC Phase Angle Courier Number (angle) 30208 30208 G30 1 Data * * * *

02 7 UNUSED * * * *

02 8 UNUSED * * * *

02 9 IN Derived Mag Courier Number (current) 30212 30213 G24 2 Data * * * *

02 0A IN Derived Angle Courier Number (current) 30214 30214 G30 1 Data * * * *

02 0B UNUSED * * * *

02 0C UNUSED * * * *

02 0D I1 Magnitude Courier Number (current) 30218 30219 G24 2 Data * * * *

02 0E I2 Magnitude Courier Number (current) 30220 30221 G24 2 Data * * * *

02 0F I0 Magnitude Courier Number (current) 30222 30223 G24 2 Data * * * *

02 10 UNUSED

02 11 UNUSED

02 12 UNUSED

02 13 UNUSED

02 14 VAB Magnitude Courier Number (voltage) 30230 30231 G24 2 Data * * * *


311009 311008 G24 2 Data * * * *
02 15 VAB Phase Angle Courier Number (angle) 30232 30232 G30 1 Data * * * *

02 16 VBC Magnitude Courier Number (voltage) 30233 30234 G24 2 Data * * * *


311011 311010 G24 2 Data * * * *
02 17 VBC Phase Angle Courier Number (angle) 30235 30235 G30 1 Data * * * *

02 18 VCA Magnitude Courier Number (voltage) 30236 30237 G24 2 Data * * * *


311013 311012 G24 2 Data * * * *
02 19 VCA Phase Angle Courier Number (angle) 30238 30238 G30 1 Data * * * *

02 1A VAN Magnitude Courier Number (voltage) 30239 30240 G24 2 Data * * * *


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Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
02 1B VAN Phase Angle Courier Number (angle) 30241 30241 G30 1 Data * * * *

02 1C VBN Magnitude Courier Number (voltage) 30242 30243 G24 2 Data * * * *

02 1D VBN Phase Angle Courier Number (angle) 30244 30244 G30 1 Data * * * *

02 1E VCN Magnitude Courier Number (voltage) 30245 30246 G24 2 Data * * * *

02 1F VCN Phase Angle Courier Number (angle) 30247 30247 G30 1 Data * * * *

02 20 UNUSED

02 21 UNUSED

02 22 VN Derived Mag Courier Number (voltage) 30248 30249 G24 2 Data * * * *

02 23 VN Derived Ang Courier Number (angle) 30250 30250 G30 1 Data * * * *

02 24 V1 Magnitude Courier Number (voltage) 30251 30252 G24 2 Data * * * *

02 25 V2 Magnitude Courier Number (voltage) 30253 30254 G24 2 Data * * * *

02 26 V0 Magnitude Courier Number (voltage) 30255 30256 G24 2 Data * * * *

02 27 UNUSED

02 28 UNUSED

02 29 UNUSED

02 2A Frequency Courier Number (frequency) 30263 30263 G30 1 Data * * * *


311021 311021 G30 1 * * * *
02 2B C/S Voltage Mag Courier Number (voltage) 30264 30265 G24 2 Data * * * *

02 2C C/S Voltage Ang Courier Number (angle) 30266 30266 G30 1 Data * * * *

02 2D

02 2E

02 2F IM Magnitude Courier Number (current) 30267 30268 G24 2 Data * * * *

02 30 IM Angle Courier Number (angle) 30269 30269 G30 1 Data * * * *

02 31 Slip Frequency Courier Number (frequency) 30270 30270 G30 1 Data * * * 0919

* * * *

03 00 MEASUREMENTS 2 * * * *

03 1 A Phase Watts Courier Number (Power) 30300 30302 G29 3 * * * *

03 2 B Phase Watts Courier Number (Power) 30303 30305 G29 3 Data * * * *

03 3 C Phase Watts Courier Number (Power) 30306 30308 G29 3 Data * * * *

03 4 A Phase VArs Courier Number (VAr) 30309 30311 G29 3 Data * * * *

03 5 B Phase VArs Courier Number (VAr) 30312 30314 G29 3 Data * * * *

03 6 C Phase VArs Courier Number (VAr) 30315 30317 G29 3 Data * * * *

03 7 A Phase VA Courier Number (VA) 30318 30320 G29 3 Data * * * *

03 8 B Phase VA Courier Number (VA) 30321 30323 G29 3 Data * * * *


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Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

03 9 C Phase VA Courier Number (VA) 30324 30326 G29 3 Data * * * *

03 0A 3 Phase Watts Courier Number (Power) 30327 30329 G29 3 Data * * * *


311014 311016 G29 3 Data * * * *
03 0B 3 Phase VArs Courier Number (VAr) 30330 30332 G29 3 Data * * * *
311017 311019 G29 3 Data * * * *
03 0C 3 Phase VA Courier Number (VA) 30333 30335 G29 3 Data * * * *

03 0D Zero Seq Power Courier Number (VA) 30336 30338 G29 3 Data * * * *

03 0E 3Ph Power Factor Courier Number (decimal) 30339 30339 G30 1 Data * * * *
311020 311020 G30 1 Data * * * *
03 0F APh Power Factor Courier Number (decimal) 30340 30340 G30 1 Data * * * *

03 10 BPh Power Factor Courier Number (decimal) 30341 30341 G30 1 Data * * * *

03 11 CPh Power Factor Courier Number (decimal) 30342 30342 G30 1 Data * * * *

03 12 UNUSED

03 13 UNUSED

03 14 UNUSED

03 15 UNUSED

03 16 3Ph W Fix Demand 30343 30345 G29 3 Data * * * *

03 17 3Ph VArs Fix Dem 30346 30348 G29 3 Data * * * *

03 18 UNUSED

03 19 UNUSED

03 1A UNUSED

03 1B UNUSED

03 1C UNUSED

03 1D UNUSED

03 1E UNUSED

03 1F UNUSED

03 20 3Ph W Peak Demand 30349 30351 G29 3 Data * * * *

03 21 3Ph VArs Peak Demand Courier Number (decimal) 30352 30354 G29 3 Data * * * *

03 25 Reset Demand Courier Number (decimal) 40103 40103 G1 1 0 Command 0 1 1 * * * *

04 00 MEASUREMENTS 3 * * * *

04 02 Thermal State Courier Number (percentage) 30434 30434 G30 1 Data * * * * *

04 03 Reset Thermal Indexed String 40104 40104 G11 G11 1 Command 0 1 1 1 * * * * *

06 00 CB CONDITION * * * *

06 1 CB A Operations Unsigned Integer 30600 30600 G1 1 Data * * * *

06 2 CB B Operations Unsigned Integer 30601 30601 G1 1 Data * * * *

06 3 CB C Operations Unsigned Integer 30602 30602 G1 1 Data * * * *


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Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

06 4 Total IA Broken Courier Number (current) 30603 30604 G125 2 Data * * * *

06 5 Total IB Broken Courier Number (current) 30605 30606 G125 2 Data * * * *

06 6 Total IC Broken Courier Number (current) 30607 30608 G125 2 Data * * * *

06 7 CB Operate Time Courier Number (time) 30609 30609 G25 1 Data * * * *

06 8 Reset CB Data Indexed String 40140 40140 G11 G11 1 No Command 0 1 1 1 * * * *

06 9 Total 1P Reclosures Unsigned Integer (16 bits) 30611 30611 G1 1 Data * * * * 0924

06 0A Total 3P Reclosures Unsigned Integer (16 bits) 30612 30612 G1 1 Data * * * * 0924

06 0B Reset Total A/R Indexed String 40141 40141 G11 G11 1 No Command 0 1 1 1 * * * * 0924

07 00 CB CONTROL * * * *

07 1 CB Control by Indexed String 40200 40200 G99 G99 1 Disabled Setting 0 7 1 2 * * * *

07 2 Manual Close Pulse Time Courier Number (Time) 40201 40201 G2 1 0.5 Setting 0.1 10 0.01 2 * * * * 0701

07 3 Trip Pulse Time Courier Number (Time) 40202 40202 G2 1 0.5 Setting 0.1 5 0.01 2 * * * * 0701

07 4 Man Close Delay Courier Number (Time) 40203 40203 G2 1 10 Setting 0.01 600 0.01 2 * * * * 0701

07 5 Healthy Window Courier Number (Time) 40206 40207 G35 2 5 Setting 0.01 9999 0.01 2 * * * * 0701

07 6 C/S Window Courier Number (Time) 40208 40209 G35 2 5 Setting 0.01 9999 0.01 2 * * * * 0701

07 7 A/R Single Pole Indexed String 40204 40204 G37 G37 1 Disabled Setting 0 1 1 2 * * 0924

07 8 A/R Three Pole Indexed String 40205 40205 G37 G37 1 Disabled Setting 0 1 1 2 * * * * 0924

08 00 DATE and TIME * * * *

08 1 Date/Time IEC870 Time & Date N/A 40300 40303 G12 4 Setting 0 * * * *
42049 42052 G12 4 Setting 0 * * * *
N/A Date
12-janv-98
N/A Time
12:00
08 4 IRIG-B Sync Indexed String 40304 40304 G37 G37 1 Disabled Setting 0 1 1 2 * * IRIG-B Fitted

08 5 IRIG-B Status ASCII String 30090 30090 G17 G17 1 Data * * 0804

08 6 Battery Status Indexed String 30091 30091 G59 G59 1 Data * * * *

08 07 Battery Alarm Indexed String 40305 40305 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

08 13 SNTP Status Indexed String G247 Data * * * Build = IEC61850

08 20 LocalTime Enable Indexed String G254 Fixed Setting 0 2 1 2 * * *

08 21 LocalTime Offset Indexed String 0 Setting -720 720 15 2 * * * 0820

08 22 DST Enable Indexed String G37 Enabled Setting 0 1 1 2 * * * 0820

08 23 DST Offset Indexed String 60 Setting 30 60 30 2 * * * 0822

08 24 DST Start Indexed String G252 Last Setting 0 4 1 2 * * * 0822


Courrier Data Base P44x/EN GC /F65

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Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

08 25 DST Start Day Indexed String G250 Sunday Setting 0 6 1 2 * * * 0822

08 26 DST Start Month Indexed String G251 March Setting 0 11 1 2 * * * 0822

08 27 DST Start Mins Indexed String 60 Setting 0 1425 15 2 * * * 0822

08 28 DST End Indexed String G252 Last Setting 0 4 1 2 * * * 0822

08 29 DST End Day Indexed String G250 Sunday Setting 0 6 1 2 * * * 0822

08 2A DST End Month Indexed String G251 October Setting 0 11 1 2 * * * 0822

08 2B DST End Mins Indexed String 60 Setting 0 1425 15 2 * * * 0822

08 30 RP1 Time Zone Indexed String G253 Local Setting 0 1 1 2 * * * 0820

08 31 RP2 Time Zone Indexed String G253 Local Setting 0 1 1 2 * * * 0820

08 32 DNPOE Time Zone Indexed String G253 Local Setting 0 1 1 2 * * * 0820

08 33 Tunnel Time Zone Indexed String G253 Local Setting 0 1 1 2 * * * 0820

N/A IEC870 date & Time 4x02049 4x02052 G12 4 Setting 0 * * * *

09 00 CONFIGURATION * * * *

09 1 Restore Defaults Indexed String 40402 40402 G53 G53 1 No Operation Command 0 5 1 2 * * * *

09 2 Setting Group Indexed String 40403 40403 G61 G61 1 Select via Menu Setting 0 1 1 2 * * * *

09 3 Active Settings Indexed String 40404 40404 G90 G90 1 Group 1 Setting 0 3 1 1 * * * * 0902

09 4 Save Changes Indexed String 40405 40405 G62 G62 1 No Operation Command 0 2 1 2 * * * *

09 5 Copy From Indexed String 40406 40406 G90 G90 1 Group 1 Setting 0 3 1 2 * * * *

09 6 Copy to Indexed String 40407 40407 G98 G98 1 No Operation Command 0 3 1 2 * * * *

09 7 Setting Group 1 Indexed String 40408 40408 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

09 8 Setting Group 2 Indexed String 40409 40409 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

09 9 Setting Group 3 Indexed String 40410 40410 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

09 0A Setting Group 4 Indexed String 40411 40411 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

09 0D Dist. Protection Indexed String 40412 40412 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

09 10 Power-Swing Indexed String 40413 40413 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

09 11 Back-Up I> Indexed String 40414 40414 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

09 12 Neg Sequence O/C Indexed String 40415 40415 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

09 13 Broken Conductor Indexed String 40416 40416 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

09 14 Earth Fault Prot Indexed String 40417 40417 G131 G131 1 Disabled Setting 0 2 1 2 * * * *

09 15 Aided D.E.F Indexed String 40418 40418 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

09 16 Volt Protection Indexed String 40419 40419 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

09 17 CB Fail & I< Indexed String 40420 40420 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

09 18 Supervision Indexed String 40421 40421 G37 G37 1 Enabled Setting 0 1 1 2 * * * *


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Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

09 19 System Checks Indexed String 40422 40422 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

09 1A Thermal Overload Indexed String 40423 40423 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

09 1D Residual O/V NVD Indexed String 40425 40425 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

09 24 Internal A/R Indexed String 40424 40424 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

09 25 Input Labels Indexed String G80 Visible Setting 0 1 1 1 * * * *

09 26 Output Labels Indexed String G80 Visible Setting 0 1 1 1 * * * *

09 28 CT & VT Ratios Indexed String G80 Visible Setting 0 1 1 1 * * * *

09 29 Event Recorder Indexed String G80 Invisible Setting 0 1 1 1 * * * *

09 2A Disturb Recorder Indexed String G80 Invisible Setting 0 1 1 1 * * * *

09 2B Measure't Setup Indexed String G80 Invisible Setting 0 1 1 1 * * * *

09 2C Comms Settings Indexed String G80 Visible Setting 0 1 1 1 * * * *

09 2D Commission Tests Indexed String G80 Invisible Setting 0 1 1 1 * * * *

09 2E Setting Values Indexed String G54 Secondary Setting 0 1 1 1 * * * *

09 2F Control Input Indexed String G80 Visible Setting 0 1 1 1 * * * *

09 35 Ctrl I/P Config Indexed String G80 G80 1 Invisible Setting 0 1 1 1 * * * *

09 36 Ctrl I/P Labels Indexed String G80 1 unvisible Setting 0 1 1 1 * * * *

09 39 Direct Acces Indexed String G231 1 Disabled Setting 0 1 1 1 * * * *

09 40 InterMicom Indexed String 40440 G37 1 Disabled Setting 0 1 1 * * * InterMiCOM Option Fitted

09 48 Ethernet NCIT Indexed String G80 1 Visible Setting 0 1 1 1 * * * *

09 50 Function Key Indexed String 40442 G80 1 Visible Setting 0 1 1 1 * * * *

09 FF LCD Contrast Unsigned Integer (16 bits) 11 Setting 0 31 1 1 * * * *

0A 00 CT AND VT RATIOS * * * * 0928

0A 1 Main VT Primary Courier Number (Voltage) 40500 40501 G35 2 110 Setting 100 1000000 1 2 * * * *

0A 2 Main VT Sec'y Courier Number (Voltage) 40502 40502 G2 1 110 Setting 80*V1 140*V1 1*V1 2 * * * *

0A 3 C/S VT Primary Courier Number (Voltage) 40503 40504 G35 2 110 Setting 100 1000000 1 2 * * * *

0A 4 C/S VT Secondary Courier Number (Voltage) 40505 40505 G2 1 110 Setting 80*V2 140*V2 1*V2 2 * * * *

0A 7 Phase CT Primary Courier Number (Current) 40506 40506 G2 1 1 Setting 1 30000 1 2 * * * *

0A 8 Phase CT Sec'y Courier Number (Current) 40507 40507 G2 1 1 Setting 1 5 4 2 * * * *

0A 0D Mcomp CT Primary Courier Number (current) 40508 40508 G2 1 1 Setting 1 30000 1 2 * * * *

0A 0E Mcomp CT Sec'y Courier Number (current) 40509 40509 G2 1 1 Setting 1 5 4 2 * * * *

0A 0F C/S Input Indexed String 40510 40510 G302 G302 1 A-N Setting 0 3 1 2 * * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 10

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
0A 10 Main VT Location Indexed String 40511 40511 G89 G89 1 Line Setting 0 1 1 2 * * * *

0A 11 CT Polarity Indexed String 40512 40512 G305 G305 1 Line Setting 0 1 1 2 * * * *

0B 00 RECORD CONTROL * * * * 0929

0B 1 Clear Events Indexed String G11 No Command 0 1 1 1 * * * *

0B 2 Clear Faults Indexed String G11 No Command 0 1 1 1 * * * *

0B 3 Clear Maint Indexed String G11 No Command 0 1 1 1 * * * *

0B 4 Alarm Event Indexed String 410400 G11 G37 1 No Command 0 1 1 1 * * * *

0B 5 Relay O/P Event Indexed String 410401 G11 G37 1 No Command 0 1 1 1 * * * *

0B 6 Opto Input Event Indexed String 410402 G11 G37 1 No Command 0 1 1 1 * * * *

0B 7 System Event Indexed String 410403 G11 G37 1 No Command 0 1 1 1 * * * *

0B 8 Fault Rec Event Indexed String 410404 G11 G37 1 No Command 0 1 1 1 * * * *

0B 9 Maint Rec Event Indexed String 410405 G11 G37 1 No Command 0 1 1 1 * * * *

0B 0A Protection Event Indexed String 410406 G11 G37 1 No Command 0 1 1 1 * * * *

0B 30 Clear Dist Recs Indexed String G11 No Command 0 1 1 1 * * * *

0B 40 DDB element 31 - 0 Binary Flag (32 bits) 410407 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 41 DDB element 63 - 32 Binary Flag (32 bits) 410409 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 42 DDB element 95 - 64 Binary Flag (32 bits) 410411 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 43 DDB element 127 - 96 Binary Flag (32 bits) 410413 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 44 DDB element 159 - 128 Binary Flag (32 bits) 410415 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 45 DDB element 191 - 160 Binary Flag (32 bits) 410417 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 46 DDB element 223 - 192 Binary Flag (32 bits) 410419 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 47 DDB element 255 - 224 Binary Flag (32 bits) 410421 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 48 DDB element 287 - 256 Binary Flag (32 bits) 410423 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 49 DDB element 319 - 288 Binary Flag (32 bits) 410425 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 4A DDB element 351 - 320 Binary Flag (32 bits) 410427 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 4B DDB element 383 - 352 Binary Flag (32 bits) 410429 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 4C DDB element 415 - 384 Binary Flag (32 bits) 410431 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 4D DDB element 447 - 415 Binary Flag (32 bits) 410433 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 4E DDB element 479 - 448 Binary Flag (32 bits) 410435 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 4F DDB element 511 - 480 Binary Flag (32 bits) 410437 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 50 DDB element 543 - 512 Binary Flag (32 bits) 410439 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 51 DDB element 575 - 544 Binary Flag (32 bits) 410441 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 11

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

0B 52 DDB element 607 - 575 Binary Flag (32 bits) 410443 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 53 DDB element 639 - 608 Binary Flag (32 bits) 410445 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 54 DDB element 671 - 640 Binary Flag (32 bits) 410447 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 55 DDB element 703 - 672 Binary Flag (32 bits) 410449 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 56 DDB element 735 - 704 Binary Flag (32 bits) 410451 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 57 DDB element 767 - 736 Binary Flag (32 bits) 410453 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 58 DDB element 799 - 768 Binary Flag (32 bits) 410455 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 59 DDB element 831 - 800 Binary Flag (32 bits) 410457 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 5A DDB element 863 - 832 Binary Flag (32 bits) 410459 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 5B DDB element 895 - 864 Binary Flag (32 bits) 410461 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 5C DDB element 927 - 896 Binary Flag (32 bits) 410163 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 5D DDB element 959 - 928 Binary Flag (32 bits) 410465 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 5E DDB element 991 - 960 Binary Flag (32 bits) 410467 G27 2 0xFFFFFFFF Setting 0 1 32 1 * * * * 0B0A

0B 5F DDB element 1023 - 992 Binary Flag (31 bits) 410469 G27 2 0x7FFFFFFF Setting 0 1 32 1 * * * * 0B0A

0C 00 DISTURB RECORDER * * * * 092A

0C 1 Duration Courier Number (time) 40600 40600 G2 1 1.5 Setting 0.1 10.5 0.01 2 * * * *

0C 2 Trigger Position Courier Number (percentage) 40601 40601 G2 1 33.3 Setting 0 100 0.1 2 * * * *

0C 3 Trigger Mode Indexed String 40602 40602 G34 G34 1 Single 0 1 1 2 * * * *

0C 4 Analog Channel 1 Indexed String 40603 40603 G31 G31 1 VA Setting 0 10 1 2 * * * *

0C 5 Analog Channel 2 Indexed String 40604 40604 G31 G31 1 VB Setting 0 10 1 2 * * * *

0C 6 Analog Channel 3 Indexed String 40605 40605 G31 G31 1 VC Setting 0 10 1 2 * * * *

0C 7 Analog Channel 4 Indexed String 40606 40606 G31 G31 1 VN Setting 0 10 1 2 * * * *

0C 8 Analog Channel 5 Indexed String 40607 40607 G31 G31 1 IA Setting 0 10 1 2 * * * *

0C 9 Analog Channel 6 Indexed String 40608 40608 G31 G31 1 IB Setting 0 10 1 2 * * * *

0C 0A Analog Channel 7 Indexed String 40609 40609 G31 G31 1 IC Setting 0 10 1 2 * * * *

0C 0B Analog Channel 8 Indexed String 40610 40610 G31 G31 1 IN Setting 0 10 1 2 * * * *

0C 0C Digital Input 1 Indexed String 40611 40611 G32 G32 1 Relay 1 Setting 0 DDB Size 1 2 * * * *

0C 0D Input 1 Trigger Indexed String 40612 40612 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C0C

0C 0E Digital Input 2 Indexed String 40613 40613 G32 G32 1 Relay 2 Setting 0 DDB Size 1 2 * * * *

0C 0F Input 2 Trigger Indexed String 40614 40614 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C0E

0C 10 Digital Input 3 Indexed String 40615 40615 G32 G32 1 Relay 3 Setting 0 DDB Size 1 2 * * * *

0C 11 Input 3 Trigger Indexed String 40616 40616 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C10
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 12

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

0C 12 Digital Input 4 Indexed String 40617 40617 G32 G32 1 Relay 4 Setting 0 DDB Size 1 2 * * * *

0C 13 Input 4 Trigger Indexed String 40618 40618 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C12

0C 14 Digital Input 5 Indexed String 40619 40619 G32 G32 1 Relay 5 Setting 0 DDB Size 1 2 * * * *

0C 15 Input 5 Trigger Indexed String 40620 40620 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C14

0C 16 Digital Input 6 Indexed String 40621 40621 G32 G32 1 Relay 6 Setting 0 DDB Size 1 2 * * * *

0C 17 Input 6 Trigger Indexed String 40622 40622 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C16

0C 18 Digital Input 7 Indexed String 40623 40623 G32 G32 1 Relay 7 Setting 0 DDB Size 1 2 * * * *

0C 19 Input 7 Trigger Indexed String 40624 40624 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C18

0C 1A Digital Input 8 Indexed String 40625 40625 G32 G32 1 Relay 8 Setting 0 DDB Size 1 2 * * * *

0C 1B Input 8 Trigger Indexed String 40626 40626 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C1A

0C 1C Digital Input 9 Indexed String 40627 40627 G32 G32 1 Relay 9 Setting 0 DDB Size 1 2 * * * *

0C 1D Input 9 Trigger Indexed String 40628 40628 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C1C

0C 1E Digital Input 10 Indexed String 40629 40629 G32 G32 1 Relay 10 Setting 0 DDB Size 1 2 * * * *

0C 1F Input 10 Trigger Indexed String 40630 40630 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C1E

0C 20 Digital Input 11 Indexed String 40631 40631 G32 G32 1 Relay 11 Setting 0 DDB Size 1 2 * * * *

0C 21 Input 11 Trigger Indexed String 40632 40632 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C20

0C 22 Digital Input 12 Indexed String 40633 40633 G32 G32 1 Relay 12 Setting 0 DDB Size 1 2 * * * *

0C 23 Input 12 Trigger Indexed String 40634 40634 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C22

0C 24 Digital Input 13 Indexed String 40635 40635 G32 G32 1 Relay 13 Setting 0 DDB Size 1 2 * * * *

0C 25 Input 13 Trigger Indexed String 40636 40636 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C24

0C 26 Digital Input 14 Indexed String 40637 40637 G32 G32 1 Relay 14 Setting 0 DDB Size 1 2 * * * *

0C 27 Input 14 Trigger Indexed String 40638 40638 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C26

0C 28 Digital Input 15 Indexed String 40639 40639 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 29 Input 15 Trigger Indexed String 40640 40640 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C28

0C 2A Digital Input 16 Indexed String 40641 40641 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 2B Input 16 Trigger Indexed String 40642 40642 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C2A

0C 2C Digital Input 17 Indexed String 40643 40643 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 2D Input 17 Trigger Indexed String 40644 40644 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C2C

0C 2E Digital Input 18 Indexed String 40645 40645 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 2F Input 18 Trigger Indexed String 40646 40646 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C2E

0C 30 Digital Input 19 Indexed String 40647 40647 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 31 Input 19 Trigger Indexed String 40648 40648 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C30

0C 32 Digital Input 20 Indexed String 40649 40649 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 13

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

0C 33 Input 20 Trigger Indexed String 40650 40650 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C32

0C 34 Digital Input 21 Indexed String 40651 40651 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 35 Input 21 Trigger Indexed String 40652 40652 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C34

0C 36 Digital Input 22 Indexed String 40653 40653 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 37 Input 22 Trigger Indexed String 40654 40654 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C36

0C 38 Digital Input 23 Indexed String 40655 40655 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 39 Input 23 Trigger Indexed String 40656 40656 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C38

0C 3A Digital Input 24 Indexed String 40657 40657 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 3B Input 24 Trigger Indexed String 40658 40658 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C3A

0C 3C Digital Input 25 Indexed String 40659 40659 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 3D Input 25 Trigger Indexed String 40660 40660 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C3C

0C 3E Digital Input 26 Indexed String 40661 40661 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 3F Input 26 Trigger Indexed String 40662 40662 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C3E

0C 40 Digital Input 27 Indexed String 40663 40663 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 41 Input 27 Trigger Indexed String 40664 40664 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C40

0C 42 Digital Input 28 Indexed String 40665 40665 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 43 Input 28 Trigger Indexed String 40666 40666 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C42

0C 44 Digital Input 29 Indexed String 40667 40667 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 45 Input 29 Trigger Indexed String 40668 40668 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C44

0C 46 Digital Input 30 Indexed String 40669 40669 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 47 Input 30 Trigger Indexed String 40670 40670 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C46

0C 48 Digital Input 31 Indexed String 40671 40671 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 49 Input 31 Trigger Indexed String 40672 40672 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C48

0C 4A Digital Input 32 Indexed String 40673 40673 G32 G32 1 Not Used Setting 0 DDB Size 1 2 * * * *

0C 4B Input 32 Trigger Indexed String 40674 40674 G66 G66 1 No Trigger Setting 0 2 1 2 * * * * 0C4A

0D 00 MEASURE'T SETUP * * * * 092B

0D 1 Default Display Indexed String 40700 40700 G52 G52 1 Description Setting 0 6 1 2 * * * *

0D 2 Local Values Indexed String 40701 40701 G54 G54 1 Secondary Setting 0 1 1 2 * * * *

0D 3 Remote Values Indexed String 40702 40702 G54 G54 1 Primary Setting 0 1 1 2 * * * *

0D 4 Measurement Ref Indexed String 40703 40703 G56 G56 1 VA Setting 0 5 1 1 * * * *

0D 5 Measurement Mode Unsigned Integer 40704 40704 G1 G1 1 0 Setting 0 3 1 2 * * * *


Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 14

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
0D 6 Demand Interval Courier Number (Time - Minutes) 40705 40705 G2 G2 1 30 Setting 1 99 1 2 * * * *

0D 7 Distance Unit Indexed String 40706 40706 G97 G97 1 Kilometres Setting 0 1 1 2 * * * * 090D

0D 8 Fault Location Indexed String 40707 40707 G51 G51 1 Distance Setting 0 2 1 2 * * * * 090D

0E 00 COMMUNICATIONS * * * * 092C

0E 1 RP1 Protocol Indexed String G71 Data * * * *

0E 2 RP1 Address Unsigned integer 255 Setting 0 255 1 1 * * * *

0E 2 RP1 Address Unsigned integer 40800 40800 G1 1 1 Setting 0 247 1 1 * * * *

0E 2 RP1 Address Unsigned integer 1 Setting 0 255 1 1 * * * *

0E 2 RP1 Address Unsigned integer 1 Setting 0 65534 1 1 * * * *

0E 3 RP1 InactivTimer Courier Number (Time-minutes) 40801 40801 G2 1 15 Setting 1 30 1 2 * * * *

0E 4 Baud Rate Indexed String G38v 19200 bits/s Setting 0 2 1 2 * * * *

0E 4 Baud Rate Indexed String 40802 40802 G38m G38 1 19200 bits/s Setting 0 1 1 2 * * * *

0E 4 Baud Rate Indexed String G38d 1 19200 bits/s Setting 0 1 1 2 * * * *

0E 5 Parity Indexed String 40803 40803 G39 G39 1 None Setting 0 2 1 2 * * * *

0E 5 Parity Indexed String G39 None Setting 0 2 1 2 * * * *

0E 6 Measure't Period Courier Number (Time) 10 Setting 1 60 1 2 * * * *

0E 7 Physical Link Indexed String G21 RS485 Setting 0 1 1 1 * * * *

0E 8 Time Sync Indexed String G37 Disabled Setting 0 1 1 2 * * * *

0E 9 Date/Time Format Indexed String G37 Disabled Setting 0 1 1 2 * * * * Build = Modbus

0E A CS103 Blocking Indexed String G210 G1 Disabled Setting 0 2 1 2 * * * *

0E 0B RP1 Status Indexed String G208 G1 1 Data * * * *

0E 0C RP1 Port Config Indexed String G207 G1 1 K Bus Setting 0 1 1 2 * * * * 0E0B

0E 0D RP1 Comms Mode Indexed String G206 G1 1 IEC60870 FT1.2 Setting 0 1 1 2 * * * * 0E0B

0E 0E RP1 Baud Rate Indexed String G38m G1 1 19200 bits/s Setting 0 2 1 2 * * * * 0E0B

0E 0F Scale Value Indexed String G235 IEC61850 Data 0 2 1 * * * Build = DNPEV

0E 10 Message Gap (ms) Courier Number (Time) 0 Setting 0 50 1 * * * Build = DNP ( Interframe GAP)

0E 1F NIC Protocol Indexed String G235 IEC61850 Data 0 2 1 * * * Build = IEC61850

0E 22 NIC MAC Address ASCII Text Data * Build = IEC61850

0E 64 NIC Tunl Timeout Courier Number (time-minutes) 5.00 min Setting 1 30 1 2 * * * Build = IEC61850

0E 6A NIC Link Report Indexed String G226 Alarm Setting 0 2 1 2 * * * Build = IEC61850
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 15

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
0E 6B NIC Link Timeout Courier Number (time) 60.00s Setting 0,1 60 0,1 2 * Build = IEC61850

0E 80 REAR PORT2 (RP2) (Sub Heading) * * *

0E 81 RP2 Protocol Indexed String G71 G71 G1 Courier Data * * *

0E 84 RP2 Card Status Indexed String G204 G204 G1 Data * * *

0E 88 RP2 Port Config Indexed String G205 G205 G1 EIA232 (RS232) Setting 0 1 1 2 * * *

0E 8A RP2 Comms Mode Indexed String G206 G206 G1 IEC60870 FT1.2 Setting 0 1 1 2 * * *

0E 90 RP2 Address Unsigned Integer (16 bits) G1 255 Setting 0 255 1 1 * * *

0E 92 RP2 InactivTimer Courier Number (time-minutes) G2 15 Setting 1 30 1 2 * * *

0E 94 RP2 Baud Rate Indexed String G38 G38m G1 19200 bits/s Setting 0 1 1 2 * * *

0E A0 NIC Protocol Indexed String G235 DNP3 Data * * *

0E A1 IP Address ASCII Text(16 bytes) 0.0.0.0 Data * * *

0E A2 Subnet mask ASCII Text(16 bytes) 0.0.0.0 Data * * *

0E A3 NIC MAC Address ASCII Text(17 bytes) Ethernet MAC AddreData * * *

0E A4 Gateway ASCII Text(16 bytes) 0.0.0.0 Data * * *

0E A5 DNP Time Sync Indexed String Disabled Setting 0 1 1 2 * * *

0E A6 DNP Meas scaling Indexed String G249 Primary Setting 0 2 1 2 * * *

0E A7 NIC Tunl Timeout Courier Number (time-minutes) 5min Setting 1 30 1 2 * * *

0E A8 NIC Link Report Indexed String G226 Alarm Setting 0 2 1 2 * * *

0E A9 Link Check Timeout Courier Number (Time) 60s Setting 0,1 60 0,1 2 * * *

0E AA SNTP PARAMETERS (Sub Heading) * * *

0E AB SNTP Server 1 ASCII Text(16 bytes) 0.0.0.0 Data * * *

0E AC SNTP Server 2 ASCII Text(16 bytes) 0.0.0.0 Data * * *

0E AD SNTP Poll Rate ASCII Text(16 bytes) 64 Data * * *

0F 00 COMMISSION TESTS * * * * 092D

0F 1 Opto I/P Status Binary Flag(32 bits) G27 1 Data * * * *


Indexed String
0F 2 Relay Status 1 Binary Flag(32 bits) G27 2 Data * * * *
Indexed String
0F 3 Relay Status 2 Binary Flag(32 bits) G27 2 Data
Indexed String
0F 4 Test Port Status Binary Flags(8 bits) 311022 311022 G124 1 Data * * * *
Indexed String
0F 5 LED Status Binary Flags(8 bits) 1 Data * * * *

0F 6 Monitor Bit 1 Unsigned Integer 40849 40849 G32 G32 1 Relay 1 Setting 0 DDB Size 1 2 * * * *

0F 7 Monitor Bit 2 Unsigned Integer 40851 40850 G32 G32 1 Relay 2 Setting 0 DDB Size 1 2 * * * *

0F 8 Monitor Bit 3 Unsigned Integer 40852 40851 G32 G32 1 Relay 3 Setting 0 DDB Size 1 2 * * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 16

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

0F 9 Monitor Bit 4 Unsigned Integer 40853 40852 G32 G32 1 Relay 4 Setting 0 DDB Size 1 2 * * * *

0F 0A Monitor Bit 5 Unsigned Integer 40854 40853 G32 G32 1 Relay 5 Setting 0 DDB Size 1 2 * * * *

0F 0B Monitor Bit 6 Unsigned Integer 40855 40854 G32 G32 1 Relay 6 Setting 0 DDB Size 1 2 * * * *

0F 0C Monitor Bit 7 Unsigned Integer 40856 40855 G32 G32 1 Relay 7 Setting 0 DDB Size 1 2 * * * *

0F 0D Monitor Bit 8 Unsigned Integer 40857 40856 G32 G32 1 Relay 8 Setting 0 DDB Size 1 2 * * * *

0F 0E Test Mode Indexed String 40858 40858 G204 G204 1 Disabled Setting 0 2 1 2 * * * *

0F 0F Test Pattern 1 Binary Flags (32bits) 40859 40860 G9 G9 2 0 Setting 0 4,295E+09 1 2 * * * * 0F0E
Indexed String
0F 10 Test Pattern 2 Binary Flags (32bits) 40861 40862 G9 G9 2 0 Setting 0 16383 1 2 0F0E
Indexed String
0F 11 Contact Test Indexed String 40863 40863 G93 G93 1 No Operation Command 0 2 1 2 * * * * 0F0E

0F 12 Test LEDs Binary Flags (8bits) 40864 40864 G94 G94 1 No Operation Command 0 1 1 2 * * * *
Indexed String
0F 13 Autoreclose Test Indexed String 40865 40865 G36 G36 1 No Operation Command 0 4 1 2 * * * * SMF

0F 16 Red LED Status Binary Flags(18 bits) 1 Data * * * *

0F 17 Green LED Status Binary Flags(18 bits) 1 Data * * * *

0F 20 DDB element 31 - 0 Binary Flag (32 bits) N/A 311023 311024 G27 2 Data * * * *

0F 21 DDB element 63 - 32 Binary Flag (32 bits) N/A 311025 311026 G27 2 Data * * * *

0F 22 DDB element 95 - 64 Binary Flag (32 bits) N/A 311027 311028 G27 2 Data * * * *

0F 23 DDB element 127 - 96 Binary Flag (32 bits) N/A 311029 311030 G27 2 Data * * * *

0F 24 DDB element 159 - 128 Binary Flag (32 bits) N/A 311031 311032 G27 2 Data * * * *

0F 25 DDB element 191 - 160 Binary Flag (32 bits) N/A 311033 311034 G27 2 Data * * * *

0F 26 DDB element 223 - 192 Binary Flag (32 bits) N/A 311035 311036 G27 2 Data * * * *

0F 27 DDB element 255 - 224 Binary Flag (32 bits) N/A 311037 311038 G27 2 Data * * * *

0F 28 DDB element 287 - 256 Binary Flag (32 bits) N/A 311039 311040 G27 2 Data * * * *

0F 29 DDB element 319 - 288 Binary Flag (32 bits) N/A 311041 311042 G27 2 Data * * * *

0F 2A DDB element 351 - 320 Binary Flag (32 bits) N/A 311043 311044 G27 2 Data * * * *

0F 2B DDB element 383 - 352 Binary Flag (32 bits) N/A 311045 311046 G27 2 Data * * * *

0F 2C DDB element 415 - 384 Binary Flag (32 bits) N/A 311047 311048 G27 2 Data * * * *

0F 2D DDB element 447 - 415 Binary Flag (32 bits) N/A 311049 311050 G27 2 Data * * * *

0F 2E DDB element 479 - 448 Binary Flag (32 bits) N/A 311051 311052 G27 2 Data * * * *

0F 2F DDB element 511 - 480 Binary Flag (32 bits) N/A 311053 311054 G27 2 Data * * * *

0F 30 DDB element 543 - 512 Binary Flag (32 bits) N/A 311055 311056 G27 2 Data * * * *

0F 31 DDB element 575 - 544 Binary Flag (32 bits) N/A 311057 311058 G27 2 Data * * * *

0F 32 DDB element 607 - 575 Binary Flag (32 bits) N/A 311059 311060 G27 2 Data * * * *

0F 33 DDB element 639 - 608 Binary Flag (32 bits) N/A 311061 311062 G27 2 Data * * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 17

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

0F 34 DDB element 671 - 640 Binary Flag (32 bits) N/A 311063 311064 G27 2 Data * * * *

0F 35 DDB element 703 - 672 Binary Flag (32 bits) N/A 311065 311066 G27 2 Data * * * *

0F 36 DDB element 735 - 704 Binary Flag (32 bits) N/A 311067 311068 G27 2 Data * * * *

0F 37 DDB element 767 - 736 Binary Flag (32 bits) N/A 311069 311070 G27 2 Data * * * *

0F 38 DDB element 799 - 768 Binary Flag (32 bits) N/A 311071 311072 G27 2 Data * * * *

0F 39 DDB element 831 - 800 Binary Flag (32 bits) N/A 311073 311074 G27 2 Data * * * *

0F 3A DDB element 863 - 832 Binary Flag (32 bits) N/A 311075 311076 G27 2 Data * * * *

0F 3B DDB element 895 - 864 Binary Flag (32 bits) N/A 311077 311078 G27 2 Data * * * *

0F 3C DDB element 927 - 896 Binary Flag (32 bits) N/A 311079 311080 G27 2 Data * * * *

0F 3D DDB element 959 - 928 Binary Flag (32 bits) N/A 311081 311082 G27 2 Data * * * *

0F 3E DDB element 991 - 960 Binary Flag (32 bits) N/A 311083 311084 G27 2 Data * * * *

0F 3F DDB element 1023 - 992 Binary Flag (31 bits) N/A 311085 311086 G27 2 Data * * * *

10 00 CB MONITOR SETUP * * * *

10 1 Broken I^ Courier Number (Decimal) 40151 40151 G2 10 1 2 Setting 1 2 0,1 2 * * * *

10 2 I^ Maintenance Indexed String 40152 40152 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *

10 3 I^ Maintenance Courier Number (Current) 40153 40154 G35 24999 2 1000 Setting 1*NM1 25000*NM1 1*NM1 2 * * * * 1002

10 4 I^ Lockout Indexed String 40155 40155 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *

10 5 I^ Lockout Courier Number (Current) 40156 40157 G35 24999 2 2000 Setting 1*NM1 25000*NM1 1*NM1 2 * * * * 1004

10 6 N° CB Ops Maint Indexed String 40158 40158 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *

10 7 N° CB Ops Maint Unsigned Integer 40159 40159 G1 9999 1 10 Setting 1 10000 1 2 * * * * 1006

10 8 N° CB Ops Lock Indexed String 40160 40160 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *

10 9 N° CB Ops Lock Unsigned Integer 40161 40161 G1 9999 1 20 Setting 1 10000 1 2 * * * * 1008

10 0A CB Time Maint Indexed String 40162 40162 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *

10 0B CB Time Maint Courier Number (Time) 40163 40164 G35 495 2 0,1 Setting 0,005 0,5 0,001 2 * * * * 100A

10 0C CB Time Lockout Indexed String 40165 40165 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *

10 0D CB Time Lockout Courier Number (Time) 40166 40167 G35 495 2 0,2 Setting 0,005 0,5 0,001 2 * * * * 100C

10 0E Fault Freq Lock Indexed String 40168 40168 G88 G88 1 Alarm Disabled Setting 0 1 1 2 * * * *

10 0F Fault Freq Count Unsigned Integer 40169 40169 G1 9999 1 10 Setting 0 9999 1 2 * * * * 100E

10 10 Fault Freq Time Courier Number (time) 40170 40171 G35 2 3600 Setting 0 9999 1 2 * * * * 100E

10 11 Lockout Reset Indexed String 40172 40172 G11 G11 1 No Command 0 1 1 2 * * * *

10 12 Reset Lockout by Indexed String 40173 40173 G81 G81 1 CB Close Setting 0 1 1 2 * * * *
Courrier Data Base P44x/EN GC /F65

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Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
10 13 Man Close RstDly Courier Number (time) 40174 40174 G2 1 5 Setting 0.01 600 0.01 2 * * * * 0701

11 00 UNIVERSAL INPUTS * * * * 930

11 01 Global threshold Indexed String 40900 40900 G200 G200 1 24-27V Setting 0 5 1 2 * * * *

11 02 Opto Input 1 Indexed String 40901 40901 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101

11 03 Opto Input 2 Indexed String 40902 40902 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101

11 04 Opto Input 3 Indexed String 40903 40903 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101

11 05 Opto Input 4 Indexed String 40904 40904 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101

11 06 Opto Input 5 Indexed String 40905 40905 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101

11 07 Opto Input 6 Indexed String 40906 40906 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101

11 08 Opto Input 7 Indexed String 40907 40907 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101

11 09 Opto Input 8 Indexed String 40908 40908 G201 G201 1 24-27V Setting 0 4 1 2 * * * * 1101

11 0A Opto Input 9 Indexed String 40909 40909 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101

11 0B Opto Input 10 Indexed String 40910 40910 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101

11 0C Opto Input 11 Indexed String 40911 40911 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101

11 0D Opto Input 12 Indexed String 40912 40912 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101

11 0E Opto Input 13 Indexed String 40913 40913 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101

11 0F Opto Input 14 Indexed String 40914 40914 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101

11 10 Opto Input 15 Indexed String 40915 40915 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101

11 11 Opto Input 16 Indexed String 40916 40916 G201 G201 1 24-27V Setting 0 4 1 2 * * * 1101

11 12 Opto Input 17 Indexed String 40917 40917 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101

11 13 Opto Input 18 Indexed String 40918 40918 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101

11 14 Opto Input 19 Indexed String 40919 40919 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101

11 15 Opto Input 20 Indexed String 40920 40920 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101

11 16 Opto Input 21 Indexed String 40921 40921 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101

11 17 Opto Input 22 Indexed String 40922 40922 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101

11 18 Opto Input 23 Indexed String 40923 40923 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101

11 19 Opto Input 24 Indexed String 40924 40924 G201 G201 1 24-27V Setting 0 4 1 2 * * 1101

11 1A Opto Input 25 Indexed String 40925 40925 G201 G201 1 24-27V Setting 0 4 1 2 1101

11 1B Opto Input 26 Indexed String 40926 40926 G201 G201 1 24-27V Setting 0 4 1 2 1101

11 1C Opto Input 27 Indexed String 40927 40927 G201 G201 1 24-27V Setting 0 4 1 2 1101

11 1D Opto Input 28 Indexed String 40928 40928 G201 G201 1 24-27V Setting 0 4 1 2 1101

11 1E Opto Input 29 Indexed String 40929 40929 G201 G201 1 24-27V Setting 0 4 1 2 1101
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Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

11 1F Opto Input 30 Indexed String 40930 40930 G201 G201 1 24-27V Setting 0 4 1 2 1101

11 20 Opto Input 31 Indexed String 40931 40931 G201 G201 1 24-27V Setting 0 4 1 2 1101

11 21 Opto Input 32 Indexed String 40932 40932 G201 G201 1 24-27V Setting 0 4 1 2 1101

11 50 Opto Filter Cntl Binary Flag 40933 40934 G8 G8 2 0xFFFFFFFF Setting 0 FFFFFFFF 1 2 * * * *
(32 bits)
11 80 Characteristic Indexed String 40935 40935 G237 G1 1 PLAT_OPTO_CHARSetting 0 1 1 2 * * * * smf

12 00 CONTROL INPUTS * * * * 092F

12 01 Ctrl I/P Status Binary Flag (32 bits) 40950 40951 G202 G202 2 0x00000000 Setting 0x00000000 32 1 2 * * * *
Indexed String
12 02 Control Input 1 Indexed String 40952 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 03 Control Input 2 Indexed String 40953 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 04 Control Input 3 Indexed String 40954 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 05 Control Input 4 Indexed String 40955 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 06 Control Input 5 Indexed String 40956 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 07 Control Input 6 Indexed String 40957 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 08 Control Input 7 Indexed String 40958 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 09 Control Input 8 Indexed String 40959 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 0A Control Input 9 Indexed String 40960 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 0B Control Input 10 Indexed String 40961 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 0C Control Input 11 Indexed String 40962 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 0D Control Input 12 Indexed String 40963 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 0E Control Input 13 Indexed String 40964 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 0F Control Input 14 Indexed String 40965 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 10 Control Input 15 Indexed String 40966 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 11 Control Input 16 Indexed String 40967 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 12 Control Input 17 Indexed String 40968 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 13 Control Input 18 Indexed String 40969 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 14 Control Input 19 Indexed String 40970 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 15 Control Input 20 Indexed String 40971 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 16 Control Input 21 Indexed String 40972 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 17 Control Input 22 Indexed String 40973 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 18 Control Input 23 Indexed String 40974 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 19 Control Input 24 Indexed String 40975 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 1A Control Input 25 Indexed String 40976 G203 G203 1 No operation Command 0 2 1 2 * * * *


Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 20

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
12 1B Control Input 26 Indexed String 40977 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 1C Control Input 27 Indexed String 40978 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 1D Control Input 28 Indexed String 40979 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 1E Control Input 29 Indexed String 40980 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 1F Control Input 30 Indexed String 40981 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 20 Control Input 31 Indexed String 40982 G203 G203 1 No operation Command 0 2 1 2 * * * *

12 21 Control Input 32 Indexed String 40983 G203 G203 1 No operation Command 0 2 1 2 * * * *

13 00 CTRL I/P CONFIG * * * * 0935

13 01 Hotkey Enabled Binary Flag (32 bits) G233 0xFFFFFFFF Setting 0xFFFFFFFF 32 1 2 * * * * 0939
Indexed String
13 10 Control Input 1 Indexed String 410 002 G234 G234 Latched Setting 0 1 1 2 * * * *

13 11 Ctrl Command 1 Indexed String 410 003 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 14 Control Input 2 Indexed String 410 004 G234 G234 Latched Setting 0 1 1 2 * * * *

13 15 Ctrl Command 2 Indexed String 410 005 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 18 Control Input 3 Indexed String 410 006 G234 G234 Latched Setting 0 1 1 2 * * * *

13 19 Ctrl Command 3 Indexed String 410 007 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 1C Control Input 4 Indexed String 410 008 G234 G234 Latched Setting 0 1 1 2 * * * *

13 1D Ctrl Command 4 Indexed String 410 009 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 20 Control Input 5 Indexed String 410 010 G234 G234 Latched Setting 0 1 1 2 * * * *

13 21 Ctrl Command 5 Indexed String 410 011 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 24 Control Input 6 Indexed String 410 012 G234 G234 Latched Setting 0 1 1 2 * * * *

13 25 Ctrl Command 6 Indexed String 410 013 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 28 Control Input 7 Indexed String 410 014 G234 G234 Latched Setting 0 1 1 2 * * * *

13 29 Ctrl Command 7 Indexed String 410 015 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 2C Control Input 8 Indexed String 410 016 G234 G234 Latched Setting 0 1 1 2 * * * *

13 2D Ctrl Command 8 Indexed String 410 017 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 30 Control Input 9 Indexed String 410 018 G234 G234 Latched Setting 0 1 1 2 * * * *

13 31 Ctrl Command 9 Indexed String 410 019 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 34 Control Input 10 Indexed String 410 020 G234 G234 Latched Setting 0 1 1 2 * * * *

13 35 Ctrl Command 10 Indexed String 410 021 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 38 Control Input 11 Indexed String 410 022 G234 G234 Latched Setting 0 1 1 2 * * * *

13 39 Ctrl Command 11 Indexed String 410 023 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 3C Control Input 12 Indexed String 410 024 G234 G234 Latched Setting 0 1 1 2 * * * *

13 3D Ctrl Command 12 Indexed String 410 025 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 21

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
13 40 Control Input 13 Indexed String 410 026 G234 G234 Latched Setting 0 1 1 2 * * * *

13 41 Ctrl Command 13 Indexed String 410 027 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 44 Control Input 14 Indexed String 410 028 G234 G234 Latched Setting 0 1 1 2 * * * *

13 45 Ctrl Command 14 Indexed String 410 029 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 48 Control Input 15 Indexed String 410 030 G234 G234 Latched Setting 0 1 1 2 * * * *

13 49 Ctrl Command 15 Indexed String 410 031 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 4C Control Input 16 Indexed String 410 032 G234 G234 Latched Setting 0 1 1 2 * * * *

13 4D Ctrl Command 16 Indexed String 410 033 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 50 Control Input 17 Indexed String 410 034 G234 G234 Latched Setting 0 1 1 2 * * * *

13 51 Ctrl Command 17 Indexed String 410 035 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 54 Control Input 18 Indexed String 410 036 G234 G234 Latched Setting 0 1 1 2 * * * *

13 55 Ctrl Command 18 Indexed String 410 037 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 58 Control Input 19 Indexed String 410 038 G234 G234 Latched Setting 0 1 1 2 * * * *

13 59 Ctrl Command 19 Indexed String 410 039 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 5C Control Input 20 Indexed String 410 040 G234 G234 Latched Setting 0 1 1 2 * * * *

13 5D Ctrl Command 20 Indexed String 410 041 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 60 Control Input 21 Indexed String 410 042 G234 G234 Latched Setting 0 1 1 2 * * * *

13 61 Ctrl Command 21 Indexed String 410 043 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 64 Control Input 22 Indexed String 410 044 G234 G234 Latched Setting 0 1 1 2 * * * *

13 65 Ctrl Command 22 Indexed String 410 045 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 68 Control Input 23 Indexed String 410 046 G234 G234 Latched Setting 0 1 1 2 * * * *

13 69 Ctrl Command 23 Indexed String 410 047 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 6C Control Input 24 Indexed String 410 048 G234 G234 Latched Setting 0 1 1 2 * * * *

13 6D Ctrl Command 24 Indexed String 410 049 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 70 Control Input 25 Indexed String 410 050 G234 G234 Latched Setting 0 1 1 2 * * * *

13 71 Ctrl Command 25 Indexed String 410 051 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 74 Control Input 26 Indexed String 410 052 G234 G234 Latched Setting 0 1 1 2 * * * *

13 75 Ctrl Command 26 Indexed String 410 053 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 78 Control Input 27 Indexed String 410 054 G234 G234 Latched Setting 0 1 1 2 * * * *

13 79 Ctrl Command 27 Indexed String 410 055 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 7C Control Input 28 Indexed String 410 056 G234 G234 Latched Setting 0 1 1 2 * * * *

13 7D Ctrl Command 28 Indexed String 410 057 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 80 Control Input 29 Indexed String 410 058 G234 G234 Latched Setting 0 1 1 2 * * * *

13 81 Ctrl Command 29 Indexed String 410 059 G232 G232 SET/RESET Setting 0 3 1 2 * * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 22

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
13 84 Control Input 30 Indexed String 410 060 G234 G234 Latched Setting 0 1 1 2 * * * *

13 85 Ctrl Command 30 Indexed String 410 061 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 88 Control Input 31 Indexed String 410 062 G234 G234 Latched Setting 0 1 1 2 * * * *

13 89 Ctrl Command 31 Indexed String 410 063 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

13 8C Control Input 32 Indexed String 410 064 G234 G234 Latched Setting 0 1 1 2 * * * *

13 8D Ctrl Command 32 Indexed String 410 065 G232 G232 SET/RESET Setting 0 3 1 2 * * * *

15 00 INTERMICOM COMMS * * * 0940

15 01 IM Input Status Binary Flags (8 bits) 310000 310000 G27 Data * * *

15 02 IM Output Status Binary Flags (8 bits) 310001 310001 G27 Data * * *

15 10 Source Address Unsigned Integer(16 bit) 410500 410500 G1 1 Setting 0 10 1 2 * * *

15 11 Received Address Unsigned Integer(16 bit) 410501 410501 G1 2 Setting 0 10 1 2 * * *

15 12 Baud Rate Indexed Strings 410502 410502 G213 G1 9600 Setting 0 4 1 2 * * *

15 13 Remote Device Indexed Strings 410503 410503 G218 G1 PX30 Setting 0 1 1 2 * * *

15 20 Ch Statistics Indexed Strings 410504 410504 G1 Invisible Setting 0 1 1 2 * * *

15 21 Rx Direct Count Unsigned Integer(32 bit) 310002 310003 G27 Data * * * 1520

15 22 Rx Perm Count Unsigned Integer(32 bit) 310004 310005 G27 Data * * * 1520

15 23 Rx Block Count Unsigned Integer(32 bit) 310006 310007 G27 Data * * * 1520

15 24 Rx NewDataCount Unsigned Integer(32 bit) 310008 310009 G27 Data * * * 1520

15 25 Rx ErroredCount Unsigned Integer(32 bit) 310010 310011 G27 Data * * * 1520

15 26 Lost Messages Float 310012 310013 G10 Data * * * 1520

15 30 Elapsed Time Unsigned Integer(32 bit) 310014 310015 G27 Data * * * 1520

15 31 Reset Statistics Indexed Strings 410505 410505 G1 No Setting 0 1 1 2 * * * 1520

15 40 Ch Diagnostics Indexed Strings 410506 410506 G1 Invisible Setting 0 1 1 2 * * *

15 41 Data CD Status Indexed Strings 310016 310016 G217 G1 Data * * * 1540

15 42 FrameSync Status Indexed Strings 310017 310017 G217 G1 Data * * * 1540

15 43 Message Status Indexed Strings 310018 310018 G217 G1 Data * * * 1540

15 44 Channel Status Indexed Strings 310019 310019 G217 G1 Data * * * 1540

15 45 IM H/W Status Indexed Strings 310020 310020 G216 G1 Data * * * 1540

15 50 Loopback Mode Indexed Strings 410507 410507 G214 G1 Disabled Setting 0 1 2 2 * * *

15 51 Test Pattern Binary Flags (8 bits) 410508 410508 G1 256 Setting 0 8 1 2 * * * 1550
Indexed String
15 52 Loopback Status Indexed Strings 310021 310021 G217 G1 Data * * * 1550

16 00 INTERMICOM CONF 0940

16 01 IM Msg Alarm Lvl Float 410520 410521 G35 25 Setting 0 100 0,1 2 * * *
Courrier Data Base P44x/EN GC /F65

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Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
16 10 IM1 Cmd Type Indexed Strings 410522 410522 G211 G1 Direct Setting 0 2 1 2 * * *

16 11 IM1 FallBackMode Indexed Strings 410523 410523 G215 G1 Default Setting 0 1 1 2 * * * 1610

16 12 IM1 DefaultValue Unsigned Integer(16 bit) 410524 410524 G1 0 Setting 0 1 1 2 * * * 1611

16 13 IM1 FrameSyncTim Float 410525 410526 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1611

16 18 IM2 Cmd Type Indexed Strings 410527 410527 G211 G1 Direct Setting 0 2 1 2 * * *

16 19 IM2 FallBackMode Indexed Strings 410528 410528 G215 G1 Default Setting 0 1 1 2 * * * 1618

16 1A IM2 DefaultValue Unsigned Integer(16 bit) 410529 410529 G1 0 Setting 0 1 1 2 * * * 1619

16 1B IM2 FrameSyncTim Float 410530 410531 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1619

16 20 IM3 Cmd Type Indexed Strings 410532 410532 G211 G1 Direct Setting 0 2 1 2 * * *

16 21 IM3 FallBackMode Indexed Strings 410533 410533 G215 G1 Default Setting 0 1 1 2 * * * 1620

16 22 IM3 DefaultValue Unsigned Integer(16 bit) 410534 410534 G1 0 Setting 0 1 1 2 * * * 1621

16 23 IM3 FrameSyncTim Float 410535 410536 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1621

16 28 IM4 Cmd Type Indexed Strings 410537 410537 G211 G1 Direct Setting 0 2 1 2 * * *

16 29 IM4 FallBackMode Indexed Strings 410538 410538 G215 G1 Default Setting 0 1 1 2 * * * 1628

16 2A IM4 DefaultValue Unsigned Integer(16 bit) 410539 410539 G1 0 Setting 0 1 1 2 * * * 1629

16 2B IM4 FrameSyncTim Float 410540 410541 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1629

16 30 IM5 Cmd Type Indexed Strings 410542 410542 G212 G1 Direct Setting 0 2 1 2 * * *

16 31 IM5 FallBackMode Indexed Strings 410543 410543 G215 G1 Default Setting 0 1 1 2 * * * 1630

16 32 IM5 DefaultValue Unsigned Integer(16 bit) 410544 410544 G1 0 Setting 0 1 1 2 * * * 1631

16 33 IM5 FrameSyncTim Float 410545 410546 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1631

16 38 IM6 Cmd Type Indexed Strings 410547 410547 G212 G1 Direct Setting 0 2 1 2 * * *

16 39 IM6 FallBackMode Indexed Strings 410548 410548 G215 G1 Default Setting 0 1 1 2 * * * 1638

16 3A IM6 DefaultValue Unsigned Integer(16 bit) 410549 410549 G1 0 Setting 0 1 1 2 * * * 1639

16 2B IM6 FrameSyncTim Float 410550 410551 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1639

16 40 IM7 Cmd Type Indexed Strings 410552 410552 G212 G1 Direct Setting 0 2 1 2 * * *

16 41 IM7 FallBackMode Indexed Strings 410553 410553 G215 G1 Default Setting 0 1 1 2 * * * 1640

16 42 IM7 DefaultValue Unsigned Integer(16 bit) 410554 410554 G1 0 Setting 0 1 1 2 * * * 1641

16 43 IM7 FrameSyncTim Float 410555 410556 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1641

16 48 IM8 Cmd Type Indexed Strings 410557 410557 G212 G1 Direct Setting 0 2 1 2 * * *

16 49 IM8 FallBackMode Indexed Strings 410558 410558 G215 G1 Default Setting 0 1 1 2 * * * 1648

16 4A IM8 DefaultVa+C358ue Unsigned Integer(16 bit) 410559 410559 G1 0 Setting 0 1 1 2 * * * 1649

16 4B IM8 FrameSyncTim Float 410560 410561 G35 1,5 Setting 0,01 1,5 0,01 2 * * * 1649

17 00 FUNCTION KEYS

17 01 Fn Key Status Binary Flag (10 bits) Data * * *


Indexed String
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 24

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
17 02 Fn Key 1 Indexed String 410775 410775 G242 Unlocked Setting 0 2 1 2 * * *

17 03 Fn Key 1 Mode Indexed String 410776 410776 G243 Toggled Setting 0 1 1 2 * * *

17 04 Fn Key 1 Label ASCII Text(16 characters) 410777 410784 G3 Function Key 1 Setting 32 163 1 2 * * *

17 05 Fn Key 2 Indexed String 410785 410785 G242 Unlocked Setting 0 2 1 2 * * *

17 06 Fn Key 2 Mode Indexed String 410786 410786 G243 Toggled Setting 0 1 1 2 * * *

17 07 Fn Key 2 Label ASCII Text(16 characters) 410787 410794 G3 Function Key 1 Setting 32 163 1 2 * * *

17 08 Fn Key 3 Indexed String 410795 410795 G242 Unlocked Setting 0 2 1 2 * * *

17 09 Fn Key 3 Mode Indexed String 410796 410796 G243 Toggled Setting 0 1 1 2 * * *

17 0A Fn Key 3 Label ASCII Text(16 characters) 410797 410804 G3 Function Key 1 Setting 32 163 1 2 * * *

17 0B Fn Key 4 Indexed String 410805 410805 G242 Unlocked Setting 0 2 1 2 * * *

17 0C Fn Key 4 Mode Indexed String 410806 410806 G243 Toggled Setting 0 1 1 2 * * *

17 0D Fn Key 4 Label ASCII Text(16 characters) 410807 410814 G3 Function Key 1 Setting 32 163 1 2 * * *

17 0E Fn Key 5 Indexed String 410815 410815 G242 Unlocked Setting 0 2 1 2 * * *

17 0F Fn Key 5 Mode Indexed String 410816 410816 G243 Toggled Setting 0 1 1 2 * * *

17 10 Fn Key 5 Label ASCII Text(16 characters) 410817 410824 G3 Function Key 1 Setting 32 163 1 2 * * *

17 11 Fn Key 6 Indexed String 410825 410825 G242 Unlocked Setting 0 2 1 2 * * *

17 12 Fn Key 6 Mode Indexed String 410826 410826 G243 Toggled Setting 0 1 1 2 * * *

17 13 Fn Key 6 Label ASCII Text(16 characters) 410827 410834 G3 Function Key 1 Setting 32 163 1 2 * * *

17 14 Fn Key 7 Indexed String 410835 410835 G242 Unlocked Setting 0 2 1 2 * * *

17 15 Fn Key 7 Mode Indexed String 410836 410836 G243 Toggled Setting 0 1 1 2 * * *

17 16 Fn Key 7 Label ASCII Text(16 characters) 410837 410844 G3 Function Key 1 Setting 32 163 1 2 * * *

17 17 Fn Key 8 Indexed String 410845 410845 G242 Unlocked Setting 0 2 1 2 * * *

17 18 Fn Key 8 Mode Indexed String 410846 410846 G243 Toggled Setting 0 1 1 2 * * *

17 19 Fn Key 8 Label ASCII Text(16 characters) 410847 410854 G3 Function Key 1 Setting 32 163 1 2 * * *

17 1A Fn Key 9 Indexed String 410855 410855 G242 Unlocked Setting 0 2 1 2 * * *

17 1B Fn Key 9 Mode Indexed String 410856 410856 G243 Toggled Setting 0 1 1 2 * * *

17 1C Fn Key 9 Label ASCII Text(16 characters) 410857 410864 G3 Function Key 1 Setting 32 163 1 2 * * *

17 1D Fn Key 10 Indexed String 410865 410865 G242 Unlocked Setting 0 2 1 2 * * *

17 1E Fn Key 10 Mode Indexed String 410866 410866 G243 Toggled Setting 0 1 1 2 * * *

17 1F Fn Key 10 Label ASCII Text(16 characters) 410867 410874 G3 Function Key 1 Setting 32 163 1 2 * * *

18 00 ETHERNET NCIT SMF

18 01 Physical Link Indexed String G300 Electrical Setting 1 2 1 2 * * * *

18 02 AntiAlaising Fil Indexed String G37 Disabled Setting 0 1 1 2 * * * *

18 03 Merge Unit Delay Courier Number(Time) G37 0 Setting 0 0,003 0,00025 2 * * * *


Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 25

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

18 04 L.N. Arrangement Indexed String G240 LN 1 Setting 0 10 1 2 * * * *

18 20 Logical Node 1 ASCII Text(34 characters) G3 Logical Node 1 Setting 65 90 1 2 * * * *

18 21 Logical Node 1B ASCII Text(34 characters) G3 Logical Node 3 Setting 65 90 1 2 * * * * SMF

18 22 Logical Node 2 ASCII Text(34 characters) G3 Logical Node 2 Setting 65 90 1 2 * * * * SMF

18 23 Logical Node 2B ASCII Text(34 characters) G3 Logical Node 4 Setting 65 90 1 2 * * * * SMF

18 30 Synchro Alarm Binary Flag(8 bits) Gxxx 0 Setting 0 3 1 2 * * * *

19 00 IED CONFIGURATOR * * * Build=IEC61850

19 05 Switch Conf.Bank Indexed String G248 No Action Control 0 1 1 2 * * * Build = IEC61850

19 10 Active Conf.Name ASCII Text (16 chars) Data * * * Build = IEC61850

19 11 Active Conf.Rev ASCII Text (16 chars) Data * * * Build = IEC61850

19 20 Inact.Conf.Name ASCII Text (16 chars) Data * * * Build = IEC61850

19 21 Inact.Conf.Rev ASCII Text (16 chars) Data * * * Build = IEC61850

19 30 IP PARAMETERS ASCII Text (16 chars) Data * * * Build = IEC61850

19 31 IP address ASCII Text (16 chars) Data * * * Build = IEC61850

19 32 Subnet mask ASCII Text (16 chars) Data * * * Build = IEC61850

19 33 Gateway ASCII Text (16 chars) Data * * * Build = IEC61850

19 40 SNTP PARAMETERS ASCII Text (16 chars) Data * * * Build = IEC61850

19 41 SNTP Server 1 ASCII Text (16 chars) Data * * * Build = IEC61850

19 42 SNTP Server 2 ASCII Text (16 chars) Data * * * Build = IEC61850

19 50 IEC61850 SCL ASCII Text (16 chars) Data * * * Build = IEC61850

19 51 IED Name ASCII Text (16 chars) Data * * * Build = IEC61850

19 60 IEC61850 GOOSE ASCII Text (16 chars) Data * * * Build = IEC61850

19 61 GoID ASCII Text (16 chars) Data * * * Build = IEC61850

19 70 GoEna Indexed String G37 Disabled Setting 0 1 1 2 * * * Build=IEC61850

19 71 Test Mode Indexed String G246 Disabled Setting 0 2 1 2 * * * Build=IEC61850

19 72 VOP Test Pattern Binary Flag (32 bits) 0x00000000 Setting 0xFFFFFFFF 32 1 2 * * * Build=IEC61850
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 26

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
Indexed String
19 73 Ignore Test Flag Indexed String G11 No Setting 0 1 1 2 * * * Build=IEC61850

29 00 CTRL I/P LABELS * * * * 0936

29 01 Control Input 1 ASCII Text (16 chars) 410 100 410 107 G3 8 Control Input 1 Setting 32 163 1 2 * * * *

29 02 Control Input 2 ASCII Text (16 chars) 410 108 410 115 G3 8 Control Input 2 Setting 32 163 1 2 * * * *

29 03 Control Input 3 ASCII Text (16 chars) 410 116 410 123 G3 8 Control Input 3 Setting 32 163 1 2 * * * *

29 04 Control Input 4 ASCII Text (16 chars) 410 124 410 131 G3 8 Control Input 4 Setting 32 163 1 2 * * * *

29 05 Control Input 5 ASCII Text (16 chars) 410 132 410 139 G3 8 Control Input 5 Setting 32 163 1 2 * * * *

29 06 Control Input 6 ASCII Text (16 chars) 410 140 410 147 G3 8 Control Input 6 Setting 32 163 1 2 * * * *

29 07 Control Input 7 ASCII Text (16 chars) 410 148 410 155 G3 8 Control Input 7 Setting 32 163 1 2 * * * *

29 08 Control Input 8 ASCII Text (16 chars) 410 156 410 163 G3 8 Control Input 8 Setting 32 163 1 2 * * * *

29 09 Control Input 9 ASCII Text (16 chars) 410 164 410 171 G3 8 Control Input 9 Setting 32 163 1 2 * * * *

29 0A Control Input 10 ASCII Text (16 chars) 410 172 410 179 G3 8 Control Input 10 Setting 32 163 1 2 * * * *

29 0B Control Input 11 ASCII Text (16 chars) 410 180 410 187 G3 8 Control Input 11 Setting 32 163 1 2 * * * *

29 0C Control Input 12 ASCII Text (16 chars) 410 188 410 195 G3 8 Control Input 12 Setting 32 163 1 2 * * * *

29 0D Control Input 13 ASCII Text (16 chars) 410 196 410 203 G3 8 Control Input 13 Setting 32 163 1 2 * * * *

29 0E Control Input 14 ASCII Text (16 chars) 410 204 410 211 G3 8 Control Input 14 Setting 32 163 1 2 * * * *

29 0F Control Input 15 ASCII Text (16 chars) 410 212 410 219 G3 8 Control Input 15 Setting 32 163 1 2 * * * *

29 10 Control Input 16 ASCII Text (16 chars) 410 220 410 227 G3 8 Control Input 16 Setting 32 163 1 2 * * * *

29 11 Control Input 17 ASCII Text (16 chars) 410 228 410 235 G3 8 Control Input 17 Setting 32 163 1 2 * * * *

29 12 Control Input 18 ASCII Text (16 chars) 410 236 410 243 G3 8 Control Input 18 Setting 32 163 1 2 * * * *

29 13 Control Input 19 ASCII Text (16 chars) 410 244 410 251 G3 8 Control Input 19 Setting 32 163 1 2 * * * *

29 14 Control Input 20 ASCII Text (16 chars) 410 252 410 259 G3 8 Control Input 20 Setting 32 163 1 2 * * * *

29 15 Control Input 21 ASCII Text (16 chars) 410 260 410 267 G3 8 Control Input 21 Setting 32 163 1 2 * * * *

29 16 Control Input 22 ASCII Text (16 chars) 410 268 410 275 G3 8 Control Input 22 Setting 32 163 1 2 * * * *

29 17 Control Input 23 ASCII Text (16 chars) 410 276 410 283 G3 8 Control Input 23 Setting 32 163 1 2 * * * *

29 18 Control Input 24 ASCII Text (16 chars) 410 284 410 291 G3 8 Control Input 24 Setting 32 163 1 2 * * * *

29 19 Control Input 25 ASCII Text (16 chars) 410 292 410 299 G3 8 Control Input 25 Setting 32 163 1 2 * * * *

29 1A Control Input 26 ASCII Text (16 chars) 410 300 410 307 G3 8 Control Input 26 Setting 32 163 1 2 * * * *

29 1B Control Input 27 ASCII Text (16 chars) 410 308 410 315 G3 8 Control Input 27 Setting 32 163 1 2 * * * *

29 1C Control Input 28 ASCII Text (16 chars) 410 316 410 323 G3 8 Control Input 28 Setting 32 163 1 2 * * * *

29 1D Control Input 29 ASCII Text (16 chars) 410 324 410 331 G3 8 Control Input 29 Setting 32 163 1 2 * * * *

29 1E Control Input 30 ASCII Text (16 chars) 410 332 410 339 G3 8 Control Input 30 Setting 32 163 1 2 * * * *

29 1F Control Input 31 ASCII Text (16 chars) 410 340 410 347 G3 8 Control Input 31 Setting 32 163 1 2 * * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 27

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

29 20 Control Input 32 ASCII Text (16 chars) 410 348 410 355 G3 8 Control Input 32 Setting 32 163 1 2 * * * *

GROUP 1 visible if 0907=1


PROTECTION SETTINGS
30 00 GROUP 1 * * * * 090D
DISTANCE ELEMENTS
30 1 Line Setting (Sub Heading) * * * *

30 2 Line Length Courier Number (metres) 41000 41001 G35 2 100000 Setting 300 1000000 10 2 * * * * 0D07

30 3 Line Length Courier Number (miles) 41002 41003 G35 2 62 Setting 0.2 625 0.005 2 * * * * 0D07

30 4 Line Impedance Courier Number(Ohms) 41004 41005 G35 2 12 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * *

30 5 Line Angle Courier Number (Angle) 41006 41006 G2 1 70 Setting -90 90 0.1 2 * * * *

30 6 Zone Setting (Sub Heading) * * * *

30 7 Zone Status Binary Flag G120 G120 000110110 Setting 0 63 1 2 * * * *


(8 bits)
30 8 kZ1 Res Comp Courier Number 41007 41007 G2 1 1 Setting 0 7 0.001 2 * * * *

30 9 kZ1 Angle Courier Number (Angle) 41008 41008 G2 1 0 Setting -180 180 0.1 2 * * * *

30 0A Z1 Courier Number(Ohm) 41009 41010 G35 2 10 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * *

30 0B Z1X Courier Number(Ohms) 41011 41012 G35 2 15 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * * SMF

30 0C R1G Courier Number(Ohms) 41013 41013 G2 1 10 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * *

30 0D R1Ph Courier Number(Ohms) 41014 41014 G2 1 10 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * *

30 0E tZ1 Courier Number(Time) 41015 41015 G2 1 0 Setting 0 10 0.002 2 * * * *

30 0F kZ2 Res Comp Courier Number 41016 41016 G2 1 1 Setting 0 7 0.001 2 * * * * SMF

30 10 kZ2 Angle Courier Number (Angle) 41017 41017 G2 1 0 Setting -180 180 0.1 2 * * * * SMF

30 11 Z2 Courier Number(Ohms) 41018 41019 G35 2 20 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * * SMF

30 12 R2G Courier Number(Ohms) 41020 41020 G2 1 20 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * * SMF

30 13 R2Ph Courier Number(Ohms) 41021 41021 G2 1 20 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * * SMF

30 14 tZ2 Courier Number(Time) 41022 41022 G2 1 0.2 Setting 0 10 0.01 2 * * * * SMF

30 15 kZ3/4 Res Comp Courier Number 41023 41023 G2 1 1 Setting 0 7 0.001 2 * * * * SMF

30 16 kZ3/4 Angle Courier Number (Angle) 41024 41024 G2 1 0 Setting -180 180 0.1 2 * * * * SMF

30 17 Z3 Courier Number(Ohms) 41025 41026 G35 2 30 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * * SMF

30 18 R3G - R4G Courier Number(Ohms) 41027 41027 G2 1 30 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * * SMF

30 19 R3Ph - R4Ph Courier Number(Ohms) 41028 41028 G2 1 30 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * * SMF

30 1A tZ3 Courier Number(Time) 41029 41029 G2 1 0.6 Setting 0 10 0.01 2 * * * * SMF

30 1B Z4 Courier Number(Ohms) 41030 41031 G35 2 40 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * * SMF

30 1C tZ4 Courier Number(Time) 41032 41032 G2 1 1 Setting 0 10 0.01 2 * * * * SMF

30 1D Zone P - Direct. Indexed String 41033 41033 G123 1 Directional Fwd Setting 0 1 1 2 * * * * SMF
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 28

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

30 1E kZp Res Comp Courier Number 41034 41034 G2 1 1 Setting 0 7 0.001 2 * * * * SMF

30 1F kZp Angle Courier Number (Angle) 41035 41035 G2 1 0 Setting -180 180 0.1 2 * * * * SMF

30 20 Zp Courier Number(Ohms) 41036 41037 G35 2 25 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * * SMF

30 21 RpG Courier Number(Ohms) 41038 41038 G2 1 25 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * * SMF

30 22 RpPh Courier Number(Ohms) 41039 41039 G2 1 25 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * * SMF

30 23 tZp Courier Number(Time) 41040 41040 G2 1 0.4 Setting 0 10 0.01 2 * * * * SMF

30 24 Zone Q - Direct. Indexed String 41041 41041 G123 1 Directional Fwd Setting 0 1 1 2 * * * * SMF

30 25 kZq Res Comp Courier Number 41042 41042 G2 1 1 Setting 0 7 0.001 2 * * * * SMF

30 26 kZq Angle Courier Number (Angle) 41043 41043 G2 1 0 Setting -180 180 0.1 2 * * * * SMF

30 27 Zq Courier Number(Ohms) 41044 41045 G35 2 27 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1 2 * * * * SMF

30 28 RqG Courier Number(Ohms) 41046 41046 G2 1 27 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * * SMF

30 29 RqPh Courier Number(Ohms) 41047 41047 G2 1 27 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * * SMF

30 2A tZq Courier Number(Time) 41048 41048 G2 1 0,5 Setting 0 10 0.01 2 * * * * SMF

30 2B Other parameters (Sub Heading) * * * *

30 2C Serial Comp Line Indexed String 41049 41049 G37 1 Disableb Setting 0 1 1 2 * * * *

30 2D Zone Overlap Mode Indexed String 41050 41050 G37 1 Disableb Setting 0 1 1 2 * * * *

30 2E Z1m Tilt Angle Courier Number (Angle) 41051 41051 G2 1 0 Setting -45 45 1 2 * * * * SMF

30 2F Z1p Tilt Angle Courier Number (Angle) 41052 41052 G2 1 0 Setting -45 45 1 2 * * * * SMF

30 30 Z2/Zp/Zq Tilt Angle Courier Number (Angle) 41053 41053 G2 1 0 Setting -45 45 1 2 * * * * SMF

30 31 Fwd Zone Chg Del Courier Number(Time) 41054 41054 G2 1 0,03 Setting 0 0,1 0,01 2 * * * * SMF

30 32 Umem Validity Courier Number(Time) 41055 41055 G2 1 10 Setting 0 10 0,01 2 * * * *

30 33 Earth I Detect Courier Number(Time) 41056 41056 G2 1 0.05*I1 Setting 0*I1 0.1*I1 0.01*I1 2 * * * *

30 34 Fault Locator (Sub Heading) * * * *

30 35 kZm Mutual Comp Courier Number 41057 41057 G2 1 0 Setting 0 7 0,01 2 * * * *

30 36 kZm Angle Courier Number (Angle) 41058 41058 G2 1 0 Setting -180 180 0.1 2 * * * *

DISTANCE ELEMENTS
31 00 GROUP 1 * * * *
DISTANCE SCHEMES
31 1 Program Mode Indexed String 41060 41060 G106 G106 1 Standard Scheme Setting 0 1 1 2 * * * *

31 2 Standard Mode Indexed String 41061 41061 G107 G107 1 Basic + Z1X Setting 0 6 1 2 * * * * 3101

31 3 Fault Type Indexed String 41062 41062 G115 G115 1 Both Enabled Setting 0 2 1 2 * * * *

31 4 Trip Mode Indexed String 41063 41063 G114 G114 1 Force 3 Poles Trip Setting 0 2 1 2 * * *

31 5 Sig. Send Zone Indexed String 41064 41064 G108 G108 1 None Setting 0 3 1 2 * * * * 3101

31 6 DistCR Indexed String 41065 41065 G109 G109 1 None Setting 0 5 1 2 * * * * 3101
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 29

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

31 7 Tp Courier Number(Time) 41066 41066 G2 1 0.02 Setting 0 1 0.002 2 * * * * SMF

31 8 tReversal Guard Courier Number(Time) 41067 41067 G2 1 0.02 Setting 0 0.15 0.002 2 * * * *

31 9 Unblocking Logic Indexed String 41068 41068 G113 G113 1 None Setting 0 2 1 * * * *

31 0A TOR-SOTF Mode Binary Flags (16bits) 41069 41069 G118 G118 1 48 Setting 0 32767 1 2 * * * *

31 0B SOFT Delay Courier Number(Time) 41070 41070 G2 1 110 Setting 10 3600 1 2 * * * *

31 0C Z1Ext On Chan.Fail Indexed String 41071 41071 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

31 0D Weak Infeed (Sub Heading) * * * *

31 0E WI :Mode Status Indexed String 41072 41072 G116 G116 1 Disabled Setting 0 3 1 2 * * * *

31 0F WI : Single Pole Trip Indexed String 41073 41073 G37 G37 1 Disabled Setting 0 1 1 2 * * * 310E

31 10 WI : V< Thres. Courier Number (Voltage) 41074 41074 G2 1 45 Setting 10 70 5 2 * * * * 310E

31 11 WI : Trip Time Delay Courier Number (Time) 41075 41075 G2 1 0.06 Setting 0 1 0.002 2 * * * * 310E

31 12 PAP : TeleTrip Enable Indexed String 41076 41076 G37 G37 1 Disabled Setting 0 1 1 2 * * * * 310E

31 13 PAP : Trip Delayed Enable Indexed String 41077 41077 G37 G37 1 Disabled Setting 0 1 1 2 * * * * 310E

31 14 PAP : P1 Indexed String 41078 41078 G37 G37 1 Disabled Setting 0 1 1 2 * * * 3113

31 15 PAP : 1P Trip Time Delay Courier Number (Time) 41079 41079 G2 1 0,5 Setting 0,1 1,5 0,1 2 * * * 3114

31 16 PAP : P2 Indexed String 41080 41080 G37 G37 1 Disabled Setting 0 1 1 2 * * * * 3113

31 17 PAP : P3 Indexed String 41081 41081 G37 G37 1 Disabled Setting 0 1 1 2 * * * * 3113

31 18 PAP : 3P Trip Delay Courier Number (Time) 41082 41082 G2 1 2 Setting 1 12 0,1 2 * * * * 3113

31 19 PAP : Residual Current Courier Number (Current) 41083 41083 G2 1 0.5*I1 Setting 0.1*I1 1*I1 0.01*I1 2 * * * * SMF

31 1A PAP : K Courier Number 41084 41084 G2 1 0,5 Setting 0,5 1 0,05 2 * * * * SMF

31 1B Loss Of Load (Sub Heading) * * * * 3104

31 1C LoL: Mode Status Indexed String 41085 41085 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

31 1D LoL. Chan. Fail Indexed String 41086 41086 G37 G37 1 Disabled Setting 0 1 1 2 * * * * 311C

31 1E LoL: I< Courier Number (Current) 41087 41087 G2 1 0.5 Setting 0.05*I1 1*I1 0.05*I1 2 * * * * 311C

31 1F LoL: Window Courier Number (Time) 41088 41088 G2 1 0.04 Setting 0.01 0.1 0.01 2 * * * * 311C

DISTANCE SCHEMES
32 00 GROUP 1 * * * * 0910
POWER-SWING
32 1 ∆Ρ Courier Number (Ohms) 41150 41150 G2 1 0.5 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * *

32 2 ∆Ξ Courier Number (Ohms) 41151 41151 G2 1 0.5 Setting 0 400*V1/I1 0.01*V1/I1 2 * * * *

32 3 IN > Status Indexed String 41152 41152 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

32 4 IN > (% Imax) Courier Number (%) 41153 41153 G2 1 40 Setting 10 100 1 2 * * * * 3203

32 5 I2 > Status Indexed String 41154 41154 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

32 6 I2 > (% Imax) Courier Number (%) 41155 41155 G2 1 30 Setting 10 100 1 2 * * * * 3205
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 30

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

32 7 Imax Line > Status Indexed String 41156 41156 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

32 8 Imax Line > Courier Number (Current) 41157 41157 G2 1 3 Setting 1*I1 20*I1 0.01*I1 2 * * * * 3207

32 9 Delta I Status Indexed String 41158 41158 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

32 0A Unblocking Time-Delay Courier Number (Time) 41159 41159 G2 1 30 Setting 0 30 0.1 2 * * * *

32 0B Blocking Zones Binary Flag(8 bits) 41160 41160 G119 G119 1 0 Setting 0 63 1 2 * * * *
Indexed String
32 0C Out of Step Unisgned Integer (16 bits) 41161 41161 1 Setting 1 255 1 2 * * * *

32 0D Stable Swing Unisgned Integer (16 bits) 41162 41162 1 Setting 1 255 1 2 * * * *

POWER-SWING
35 00 GROUP 1 * * * * 0911
BACK-UP I>
35 1 I>1 Function Indexed String 41250 41250 G43 G43 1 DT Setting 0 10 1 2 * * * *

35 2 I>1 Directional Indexed String 41251 41251 G44 G44 1 Directional Fwd Setting 0 2 1 2 * * * * 3501

35 3 I>1 VTS Block Indexed String 41252 41252 G45 G45 1 Non-Directional Setting 0 1 1 2 * * * * 3502

35 4 I>1 Current Set Courier Number (Current) 41253 41253 G2 1 1.5 Setting 0.08*I1 10.0*I1 0.01*I1 2 * * * * 3501

35 5 I>1 Time Delay Courier Number (Time) 41254 41254 G2 1 1 Setting 0 100 0.01 2 * * * * 3501

35 6 I>1 Time Delay VTS Courier Number (Time) 41255 41255 G2 1 0.2 Setting 0 100 0.01 2 * * * * SMF

35 7 I>1 TMS Courier Number (Decimal) 41256 41256 G2 1 1 Setting 0.025 1.2 0,005 2 * * * * SMF

35 8 I>1 Time Dial Courier Number (Decimal) 41257 41257 G2 1 7 Setting 0.5 15 0.1 2 * * * * 3501

35 9 I>1 Reset Char Indexed String 41258 41258 G60 G60 1 DT Setting 0 1 1 2 * * * * 3501

35 0A I>1 tRESET Courier Number (Time) 41259 41259 G2 1 0 Setting 0 100 0.01 2 * * * * SMF

35 0B I>2 Function Indexed String 41260 41260 G43 G43 1 DT Setting 0 10 1 2 * * * *

35 0C I>2 Directional Indexed String 41261 41261 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 350B

35 0D I>2 VTS Block Indexed String 41262 41262 G45 G45 1 Non-Directional Setting 0 1 1 2 * * * * 350C

35 0E I>2 Current Set Courier Number (Current) 41263 41263 G2 1 2 Setting 0.08*I1 10.0*I1 0.01*I1 2 * * * * 350B

35 0F I>2 Time Delay Courier Number (Time) 41264 41264 G2 1 2 Setting 0 100 0.01 2 * * * * 350B

35 10 I>2 Time Delay VTS Courier Number (Time) 41265 41265 G2 1 2 Setting 0 100 0.01 2 * * * * SMF

35 11 I>2 TMS Courier Number (Decimal) 41266 41266 G2 1 1 Setting 0.025 1.2 0,005 2 * * * * SMF

35 12 I>2 Time Dial Courier Number (Decimal) 41267 41267 G2 1 7 Setting 0.5 15 0.1 2 * * * * 350B

35 13 I>2 Reset Char Indexed String 41268 41268 G60 G60 1 DT Setting 0 1 1 2 * * * * 350B

35 14 I>2 tRESET Courier Number (Time) 41269 41269 G2 1 0 Setting 0 100 0.01 2 * * * * SMF

35 15 I>3 Status Indexed String 41270 41270 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

35 16 I>3 Current Set Courier Number (Current) 41271 41271 G2 1 3 Setting 0.08*I1 32*I1 0.01*I1 2 * * * * 3515

35 17 I>3 Time Delay Courier Number (Time) 41272 41272 G2 1 3 Setting 0 100 0.01 2 * * * * 3515

35 18 I>4 Status Indexed String 41273 41273 G37 G37 1 Disabled Setting 0 1 1 2 * * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 31

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
35 19 I>4 Current Set Courier Number (Current) 41274 41274 G2 1 4 Setting 0.08*I1 32*I1 0.01*I1 2 * * * * 3518

35 1A I>4 Time Delay Courier Number (Time) 41275 41275 G2 1 4 Setting 0 100 0.01 2 * * * * 3518

BACK-UP I>
36 00 GROUP 1 * * * * 0912
NEG SEQUENCE O/C
36 1 I2>1 Function Indexed String 41300 41300 G43 G43 1 DT Setting 0 10 1 2 * * * *

36 2 I2>1 Directional Indexed String 41301 41301 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 3601

36 3 I2>1 VTS Block Indexed String 41302 41302 G45 G45 1 Block Setting 0 1 1 2 * * * * 3602

36 4 I2>1 Current Set Courier Number (Current) 41303 41303 G2 1 0.2 Setting 0.08*I1 4*I1 0.01*I1 2 * * * * 3601

36 5 I2>1 Time Delay Courier Number (Time) 41304 41304 G2 1 10 Setting 0 100 0.01 2 * * * * 3601

36 6 I2>1 Time Delay VTS Courier Number (Time) 41305 41305 G2 1 0.2 Setting 0 100 0.01 2 * * * * SMF

36 7 I2>1 TMS Courier Number (Decimal) 41306 41306 G2 1 1 Setting 0.025 1.2 0,005 2 * * * * SMF

36 8 I2>1 Time Dial Courier Number (Decimal) 41307 41307 G2 1 1 Setting 0,01 100 0,01 2 * * * * 3601

36 9 I2>1 Reset Char Indexed String 41308 41308 G60 G60 1 DT Setting 0 1 1 2 * * * * 3601

36 0A I2>1 tRESET Courier Number (Time) 41309 41309 G2 1 0 Setting 0 100 0.01 2 * * * * SMF

36 0B I2>2 Function Indexed String 41310 41310 G43 G43 1 DT Setting 0 10 1 2 * * * *

36 0C I2>2 Directional Indexed String 41311 41311 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 360B

36 0D I2>2 VTS Block Indexed String 41312 41312 G45 G45 1 Block Setting 0 1 1 2 * * * * 360C

36 0E I2>2 Current Set Courier Number (Current) 41313 41313 G2 1 0.2 Setting 0.08*I1 4*I1 0.01*I1 2 * * * * 360B

36 0F I2>2 Time Delay Courier Number (Time) 41314 41314 G2 1 10 Setting 0 100 0.01 2 * * * * 360B

36 10 I2>2 Time Delay VTS Courier Number (Time) 41315 41315 G2 1 0.2 Setting 0 100 0.01 2 * * * * SMF

36 11 I2>2 TMS Courier Number (Decimal) 41316 41316 G2 1 1 Setting 0.025 1.2 0,005 2 * * * * SMF

36 12 I2>2 Time Dial Courier Number (Decimal) 41317 41317 G2 1 1 Setting 0,01 100 0,01 2 * * * * 360B

36 13 I2>2 Reset Char Indexed String 41318 41318 G60 G60 1 DT Setting 0 1 1 2 * * * * 360B

36 14 I2>2 tRESET Courier Number (Time) 41319 41319 G2 1 0 Setting 0 100 0.01 2 * * * * SMF

36 15 I2>3 Status Indexed String 41320 41320 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

36 16 I2>3 Directional Indexed String 41321 41321 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 3615

36 17 I2>3 VTS Block Indexed String 41322 41322 G45 G45 1 Block Setting 0 1 1 2 * * * * 3616

36 18 I2>3 Current Set Courier Number (Current) 41323 41323 G2 1 0.2 Setting 0.08*I1 32*I1 0.01*I1 2 * * * * 3615

36 19 I2>3 Time Delay Courier Number (Time) 41324 41324 G2 1 10 Setting 0 100 0.01 2 * * * * 3615

36 1A I2>3 Time Delay VTS Courier Number (Time) 41325 41325 G2 1 0.2 Setting 0 100 0.01 2 * * * * SMF

36 1B I2>4 Status Indexed String 41326 41326 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

36 1C I2>4 Directional Indexed String 41327 41327 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 361C

36 1D I2>4 VTS Block Indexed String 41328 41328 G45 G45 1 Block Setting 0 1 1 2 * * * * 361D
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 32

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
36 1E I2>4 Current Set Courier Number (Current) 41329 41329 G2 1 0.2 Setting 0.08*I1 32*I1 0.01*I1 2 * * * * 361C

36 1F I2>4 Time Delay Courier Number (Time) 41330 41330 G2 1 10 Setting 0 100 0.01 2 * * * * 361C

36 20 I2>4 Time Delay VTS Courier Number (Time) 41331 41331 G2 1 0.2 Setting 0 100 0.01 2 * * * * SMF

36 21 I2> Char Angle Courier Number (Angle) 41332 41332 G2 1 -45 Setting -95 95 1 2 * * * * SMF

NEG SEQUENCE O/C


37 00 GROUP 1 * * * * 0913
BROKEN CONDUCTOR
37 1 Broken Conductor Indexed String 41350 41350 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

37 2 I2/I1 Setting Courier Number (Decimal) 41351 41351 G2 1 0.2 Setting 0.2 1 0.01 2 * * * * 3701

37 3 I2/I1 Time Delay Courier Number (Time) 41352 41352 G2 1 60 Setting 0 100 0.1 2 * * * * 3701

37 4 I2/I1 Trip Indexed String 41353 G37 1 Disabled Setting 0 1 1 2 * * * * 3701

BROKEN CONDUCTOR
38 00 GROUP 1 * * * * 0914
EARTH FAULT O/C
38 1 IN>1 Function Indexed String 41400 41400 G43 G43 1 DT Setting 0 10 1 2 * * * *

38 2 IN>1 Directional Indexed String 41401 41401 G44 G44 1 Directional Fwd Setting 0 2 1 2 * * * * 3801

38 3 IN>1 VTS Block Indexed String 41402 41402 G45 G45 1 Non-Directional Setting 0 1 1 2 * * * * 3802

38 4 IN>1 Current Set Courier Number (Current) 41403 41403 G2 1 0.2 Setting 0.08*I1 10.0*I1 0.01*I1 2 * * * * 3801

38 5 IN>1 Time Delay Courier Number (Time) 41404 41404 G2 1 1 Setting 0 200 0.01 2 * * * * 3801

38 6 IN>1 Time Delay VTS Courier Number (Time) 41405 41405 G2 1 0.2 Setting 0 200 0.01 2 * * * * SMF

38 7 IN>1 TMS Courier Number (Decimal) 41406 41406 G2 1 1 Setting 0.025 1.2 0,005 2 * * * * SMF

38 8 IN>1 Time Dial Courier Number (Decimal) 41407 41407 G2 1 7 Setting 0.5 15 0.1 2 * * * * 3801

38 9 IN>1 Reset Char Indexed String 41408 41408 G60 G60 1 DT Setting 0 1 1 2 * * * * 3801

38 0A IN>1 tRESET Courier Number (Time) 41409 41409 G2 1 0 Setting 0 100 0.01 2 * * * * SMF

38 0B IN>2 Function Indexed String 41410 41410 G43 G43 1 DT Setting 0 10 1 2 * * * *

38 0C IN>2 Directional Indexed String 41411 41411 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 380B

38 0D IN>2 VTS Block Indexed String 41412 41412 G45 G45 1 Non-Directional Setting 0 1 1 2 * * * * 380C

38 0E IN>2 Current Set Courier Number (Current) 41413 41413 G2 1 0.3 Setting 0.08*I1 10.0*I1 0.01*I1 2 * * * * 380B

38 0F IN>2 Time Delay Courier Number (Time) 41414 41414 G2 1 2 Setting 0 200 0.01 2 * * * * 380B

38 10 IN>2 Time Delay VTS Courier Number (Time) 41415 41415 G2 1 2 Setting 0 200 0.01 2 * * * * SMF

38 11 IN>2 TMS Courier Number (Decimal) 41416 41416 G2 1 1 Setting 0.025 1.2 0,005 2 * * * * SMF

38 12 IN>2 Time Dial Courier Number (Decimal) 41417 41417 G2 1 7 Setting 0.5 15 0.1 2 * * * * 380B

38 13 IN>2 Reset Char Indexed String 41418 41418 G60 G60 1 DT Setting 0 1 1 2 * * * * 380B

38 14 IN>2 tRESET Courier Number (Time) 41419 41419 G2 1 0 Setting 0 100 0.01 2 * * * * SMF

38 15 IN>3 Status Indexed String 41420 41420 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

38 16 IN>3 Directional Indexed String 41421 41421 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 3815
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 33

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

38 17 IN>3 VTS Block Indexed String 41422 41422 G45 G45 1 Non-Directional Setting 0 1 1 2 * * * * 3816

38 18 IN>3 Current Set Courier Number (Current) 41423 41423 G2 1 0.3 Setting 0.08*I1 32*I1 0.01*I1 2 * * * * 3815

38 19 IN>3 Time Delay Courier Number (Time) 41424 41424 G2 1 2 Setting 0 200 0.01 2 * * * * 3815

38 1A IN>3 Time Delay VTS Courier Number (Time) 41425 41425 G2 1 2 Setting 0 200 0.01 2 * * * * SMF

38 1B IN>4 Status Indexed String 41426 41426 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

38 1C IN>4 Directional Indexed String 41427 41427 G44 G44 1 Non-Directional Setting 0 2 1 2 * * * * 381B

38 1D IN>4 VTS Block Indexed String 41428 41428 G45 G45 1 Non-Directional Setting 0 1 1 2 * * * * 381C

38 1E IN>4 Current Set Courier Number (Current) 41429 41429 G2 1 0.3 Setting 0.08*I1 32*I1 0.01*I1 2 * * * * 381B

38 1F IN>4 Time Delay Courier Number (Time) 41430 41430 G2 1 2 Setting 0 200 0.01 2 * * * * 381B

38 20 IN>4 Time Delay VTS Courier Number (Time) 41431 41431 G2 1 2 Setting 0 200 0.01 2 * * * * SMF

38 21 IN> Directional (Sub Heading) 2 SMF

38 22 IN> Char Angle Courier Number(Angle) 41432 41432 G2 1 -45 Setting -95 95 1 2 * * * * SMF

38 23 Polarisation Indexed String 41433 41433 G46 G46 1 Zero Sequence Setting 0 1 1 2 * * * * SMF

EARTH FAULT O/C


39 00 GROUP 1
AIDED DEF * * * * 0915
39 1 Channel Aided DEF Status Indexed String 41450 41450 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

39 2 Polarisation Indexed String 41451 41451 G46 G46 1 Zero Sequence Setting 0 1 1 2 * * * * 3901

39 3 V> Voltage Set Courier Number (Voltage) 41452 41452 G2 1 1 Setting 0.5 20 0.01 2 * * * * 3901

39 4 IN Forward Courier Number (Current) 41453 41453 G2 1 0.1 Setting 0.05*I1 4*I1 0.01*I1 2 * * * * 3901

39 5 Time Delay Courier Number (Time) 41454 41454 G2 1 0 Setting 0 10 0,002 2 * * * * 3901

39 6 Scheme Logic Indexed String 41455 41455 G112 1 Shared Setting 0 2 1 2 * * * * 3901

39 7 Tripping Indexed String 41456 41456 G48 1 Three Phase Setting 0 1 1 2 * * * 3901

39 8 Tp Courier Number(Time) 41457 41457 G2 1 0.02 Setting 0 1 0.002 2 * * * * 3906

39 9 IN Rev Factor Courier Number() 41458 41458 G2 1 0,6 Setting 0,1 1 0,1 2 * * * * 3901

AIDED DEF
3A 00 GROUP 1 * * * * 091A
THERMAL OVERLOAD
3A 01 Characteristic Indexed String 41500 G67 G67 1 Single Setting 0 1 2 2 * * * *

3A 02 Thermal Trip Courier Number (current) 41501 41501 G2 1 1 Setting 0.08*I1 3.2*I1 0.01*I1 2 * * * * 3A01

3A 03 Thermal Alarm Courier Number (percentage) 41502 41502 G2 1 70 Setting 50 100 1 2 * * * * 3A01

3A 04 Time Constant 1 Courier Number (time-minutes) 41503 41503 G2 1 10 Setting 1 200 1 2 * * * * 3A01

3A 05 Time Constant 2 Courier Number (time-minutes) 41504 41504 G2 1 5 Setting 1 200 1 2 * * * * 3A01

THERMAL OVERLOAD
3B 00 GROUP 1 * * * * 091D
RESIDUAL OVERVOLTAGE
3B 01 VN>1 Function Indexed String 41550 41550 G23 G23 1 DT Setting 0 2 1 2 * * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 34

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
3B 02 VN>1 Voltage Set Courier Number (Voltage) 41551 41551 G2 1 5 Setting 1 80 1 2 * * * * 3B01

3B 03 VN>1 Time Delay Courier Number (Time) 41552 41552 G2 1 5 Setting 0 100 0.01 2 * * * * 3B01

3B 04 VN>1 TMS Courier Number (Decimal) 41553 41553 G2 1 1 Setting 0.5 100 0.5 2 * * * * 3B01

3B 05 VN>1 tRESET Courier Number (Time) 41554 41554 G2 1 0 Setting 0 100 0.01 2 * * * * SMF

3B 06 VN>2 Status Indexed String 41555 41555 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

3B 07 VN>2 Voltage Set Courier Number (Voltage) 41556 41556 G2 1 10 Setting 1 80 1 2 * * * * 3B06

3B 08 VN>2 Time Delay Courier Number (Time) 41557 41557 G2 1 10 Setting 0 100 0.01 2 * * * * 3B06

RESIDUAL OVERVOLTAGE
3C 00 GROUP 1 * * * * 0914
ZERO SEQ. POWER
1 Zero Seq. Power Status Indexed String 41600 41600 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

2 K Time Delay Factor Courier Number (Time) 41601 41601 G2 1 0 Setting 0 2 0,2 2 * * * * 3C01

3 Basis Time Delay Courier Number (Time) 41602 41602 G2 1 1 Setting 0 10 0,01 2 * * * * 3C01

4 Residual Current Courier Number (Current) 41603 41603 G2 1 0,1 Setting 0.05*I1 1*I1 0,01 2 * * * * 3C01

5 Residual Power Courier Number (Power) 41604 41604 G2 1 0,5 Setting 0.3*I1*V1 6*I1*V1 0.01*I1*V1 2 * * * * * 3C01

ZERO SEQ. POWER


42 00 GROUP1 * * * *
VOLT PROTECTION
42 1 V< & V> MODE Binary Flags (8bits) 41949 41949 G121 G121 1 0 Setting 0 15 1 2 * * * * SMF

42 2 UNDER VOLTAGE (Sub Heading)

42 3 V< Measur't Mode Indexed String 41950 41950 G47 G47 1 Phase-Neutral Setting 0 1 1 2 * * * *

42 4 V<1 Function Indexed String 41951 41951 G23 G23 1 DT Setting 0 2 1 2 * * * *

42 5 V<1 Voltage Set Courier Number (Voltage) 41952 41952 G2 1 50 Setting 10 120 1 2 * * * * 4204

42 6 V<1 Time Delay Courier Number (Time) 41953 41953 G2 1 10 Setting 0 100 0.01 2 * * * * 4204

42 7 V<1 TMS Courier Number (Decimal) 41954 41954 G2 1 1 Setting 0.5 100 0.5 2 * * * * 4204

42 8 V<2 Status Indexed String 41955 41955 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

42 9 V<2 Voltage Set Courier Number (Voltage) 41956 41956 G2 1 38 Setting 10 120 1 2 * * * * 4208

42 0A V<2 Time Delay Courier Number (Time) 41957 41957 G2 1 5 Setting 0 100 0.01 2 * * * * 4208

42 0B OVERVOLTAGE (Sub Heading)

42 0C V> Measur't Mode Indexed String 41958 41958 G47 G47 1 Phase-Neutral Setting 0 1 1 2 * * * *

42 0D V>1 Function Indexed String 41959 41959 G23 G23 1 DT Setting 0 2 1 2 * * * *

42 0E V>1 Voltage Set Courier Number (Voltage) 41960 41960 G2 1 75 Setting 60 185 1 2 * * * * 420D

42 0F V>1 Time Delay Courier Number (Time) 41961 41961 G2 1 10 Setting 0 100 0.01 2 * * * * 420D

42 10 V>1 TMS Courier Number (Decimal) 41962 41962 G2 1 1 Setting 0.5 100 0.5 2 * * * * 420D

42 11 V>2 Status Indexed String 41963 41963 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

42 12 V>2 Voltage Set Courier Number (Voltage) 41964 41964 G2 1 90 Setting 60 185 1 2 * * * * 4211
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 35

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

42 13 V>2 Time Delay Courier Number (Time) 41965 41965 G2 1 0.5 Setting 0 100 0.01 2 * * * * 4211

VOLT PROTECTION
45 00 GROUP 1 * * * *
CB FAIL & I<
45 1 BREAKER FAIL (Sub Heading) * * * * 0917

45 2 CB Fail 1 Status Indexed String 42100 42100 G37 G37 1 Enabled Setting 0 1 1 2 * * * *

45 3 CB Fail 1 Timer Courier Number (Time) 42101 42101 G2 G2 1 0.2 Setting 0 10 0.005 2 * * * * 4502

45 4 CB Fail 2 Status Indexed String 42102 42102 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

45 5 CB Fail 2 Timer Courier Number (Time) 42103 42103 G2 G2 1 0.4 Setting 0 10 0.005 2 * * * * 4504

45 6 CBF Non I Reset Indexed String 42104 42104 G205 G205 1 1 Setting 0 4 1 2 * * * * 4502

45 7 CBF Ext Reset Indexed String 42105 42105 G205 G205 1 1 Setting 0 4 1 2 * * * * 4502

45 8 UNDER CURRENT (Sub Heading) * * * *

45 9 I < Current Set Courier Number (Current) 42106 42106 G2 G2 1 0.05*I1 Setting 0.05*I1 3.2*I1 0.1*I1 2 * * * *

CB FAIL & I<


46 00 GROUP 1 * * * * 0918
SUPERVISION
46 1 VT SUPERVISION (Sub Heading) * * * *

46 2 VTS Time Delay Courier Number (Time s) 42150 42150 G2 1 5 Setting 1 20 1 2 * * * *

46 3 VTS I2> & I0> Inhibit Courier Number (Current) 42151 42151 G2 1 0.05 Setting 0 1.0*I1 0.01*I1 2 * * * *

46 4 Detect 3P Indexed String G37 G37 Disabled Setting 0 1 1 2 * * * *

46 5 Threshold 3P Courier Number (Voltage) G2 1 30 Setting 10 70 1 2 * * * * 4604

46 6 Delta I> Courier Number (Current) G2 1 0.1*I1 Setting 0.01*I1 5*I1 0.01*I1 2 * * * * 4604

46 7 CT SUPERVISION (Sub Heading)

46 8 CTS Status Indexed String 42152 42152 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

46 9 CTS VN< Inhibit Courier Number (Voltage) 42153 42153 G2 1 1 Setting 0.5 22 0.5 2 * * * * 4608

46 0A CTS IN> Set Courier Number (Current) 42154 42154 G2 1 0.1 Setting 0.08*I1 4*I1 0.01*I1 2 * * * * 4608

46 0B CTS Time Delay Courier Number (Time s) 42155 42155 G2 1 5 Setting 0 10 1 2 * * * * 4608

46 0C CVT SUPERVISION (Sub Heading)

46 0D CVTS Status Indexed String 42156 42156 G37 G37 1 Disabled Setting 0 1 1 2 * * * *

46 0E CVTS VN> Courier Number (Voltage) 42157 42157 G2 1 1 Setting 0,5 22 0,5 2 * * * * 460D

46 0F CVTS Time Delay Courier Number (Time s) 42158 42158 G2 1 100 Setting 0 300 1 2 * * * * 460D

SUPERVISION
48 00 GROUP 1 * * * * 0919
SYSTEM CHECKS
48 1 C/S Check Schem. for A/R Binary Flags (8bits) 42250 42250 G103 G103 1 7 Setting 0 7 1 2 * * * *

48 2 C/S Check Schem. for Man CB Binary Flags (8bits) 42251 42251 G103 G103 1 7 Setting 0 7 1 2 * * * *

48 3 V< Dead Line Courier Number (Voltage) 42252 42252 G2 1 13 Setting 5 30 1 2 * * * * SMF
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 36

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

48 4 V> Live Line Courier Number (Voltage) 42253 42253 G2 1 32 Setting 30 120 1 2 * * * * SMF

48 5 V< Dead Bus Courier Number (Voltage) 42254 42254 G2 1 13 Setting 5 30 1 2 * * * * SMF

48 6 V> Live Bus Courier Number (Voltage) 42255 42255 G2 1 32 Setting 30 120 1 2 * * * * SMF

48 7 Diff Voltage Courier Number (Voltage) 42256 42256 G2 1 6.5 Setting 0.5 40 0.1 2 * * * * SMF

48 8 Diff Frequency Courier Number (Frequency) 42257 42257 G2 1 0.05 Setting 0.02 1 0.01 2 * * * * SMF

48 9 Diff Phase Courier Number(Degre) 42258 42258 G2 1 20 Setting 5 90 2.5 2 * * * * SMF

48 0A Bus-Line Delay Courier Number (Time) 42259 42259 G2 1 0.2 Setting 0.1 2 0.1 2 * * * * SMF

SYSTEM CHECKS
49 00 GROUP 1 * * * *
AUTORECLOSE
49 1 AUTORECLOSE MODE (Sub Heading) * * * * 0924

49 2 1P Trip Mode Indexed String 42300 42300 G101 G101 1 1 Setting 0 3 1 2 * * 0707

49 3 3P Trip Mode Indexed String 42301 42301 G102 G102 1 1 Setting 0 3 1 2 * * * * 0708

49 4 1P Rcl - Dead Time 1 Courier Number (Time) 42302 42302 G2 G2 1 1 Setting 0.1 5 0.01 2 * * * 0707

49 5 3P Rcl - Dead Time 1 Courier Number (Time) 42303 42303 G2 G2 1 1 Setting 0.1 60 0.01 2 * * * * 0708

49 6 Dead Time 2 Courier Number (Time) 42304 42304 G2 G2 1 60 Setting 1 3600 1 2 * * * * SMF

49 7 Dead Time 3 Courier Number (Time) 42305 42305 G2 G2 1 180 Setting 1 3600 1 2 * * * * SMF

49 8 Dead Time 4 Courier Number (Time) 42306 42306 G2 G2 1 180 Setting 1 3600 1 2 * * * * SMF

49 9 Reclaim Time Courier Number (Time) 42307 42307 G2 G2 1 180 Setting 1 600 1 2 * * * *

49 0A Reclose Time Delay Courier Number (Time) 42308 42308 G2 G2 1 0.1 Setting 0.1 10 0.1 2 * * * *

49 0B Discrimination Time Courier Number (Time) 42309 42309 G2 G2 1 5 Setting 0,1 5 0,01 2 * * * * 0707

49 0C A/R Inhbit Wind Courier Number (Time) 42310 42310 G2 G2 1 5 Setting 1 3600 1 2 * * * *

49 0D C/S on 3P Rcl DT1 Indexed String 42311 42311 G37 G37 1 Enabled Setting 0 1 1 2 * * * * 0708

49 0E AUTORECLOSE LOCKOUT (Sub Heading)

49 0F Block A/R Binary Flag (32 bits) 42312 41313 G117 G117 2 33554431 Setting 0 33554431 1 2 * * * *

AUTORECLOSE
4A 00 GROUP 1 * * * * 0925
INPUT LABELS
4A 1 Opto Input 1 ASCII Text (16 chars) 42400 42407 G3 8 Opto Label 01 Setting 32 163 1 2 * * * *
1
4A 2 Opto Input 2 ASCII Text (16 chars) 42408 42415 G3 8 Opto Label 02 Setting 32 163 1 2 * * * *

4A 3 Opto Input 3 ASCII Text (16 chars) 42416 42423 G3 8 Opto Label 03 Setting 32 163 1 2 * * * *

4A 4 Opto Input 4 ASCII Text (16 chars) 42424 42431 G3 8 Opto Label 04 Setting 32 163 1 2 * * * *

4A 5 Opto Input 5 ASCII Text (16 chars) 42432 42439 G3 8 Opto Label 05 Setting 32 163 1 2 * * * *

4A 6 Opto Input 6 ASCII Text (16 chars) 42440 42447 G3 8 Opto Label 06 Setting 32 163 1 2 * * * *

4A 7 Opto Input 7 ASCII Text (16 chars) 42448 42455 G3 8 Opto Label 07 Setting 32 163 1 2 * * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 37

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
4A 8 Opto Input 8 ASCII Text (16 chars) 42456 42463 G3 8 Opto Label 08 Setting 32 163 1 2 * * * *

4A 9 Opto Input 9 ASCII Text (16 chars) 42464 42471 G3 8 Opto Label 09 Setting 32 163 1 2 * * *

4A 0A Opto Input 10 ASCII Text (16 chars) 42472 42479 G3 8 Opto Label 10 Setting 32 163 1 2 * * *

4A 0B Opto Input 11 ASCII Text (16 chars) 42480 42487 G3 8 Opto Label 11 Setting 32 163 1 2 * * *

4A 0C Opto Input 12 ASCII Text (16 chars) 42488 42495 G3 8 Opto Label 12 Setting 32 163 1 2 * * *

4A 0D Opto Input 13 ASCII Text (16 chars) 42496 42503 G3 8 Opto Label 13 Setting 32 163 1 2 * * *

4A 0E Opto Input 14 ASCII Text (16 chars) 42504 42511 G3 8 Opto Label 14 Setting 32 163 1 2 * * *

4A 0F Opto Input 15 ASCII Text (16 chars) 42512 42519 G3 8 Opto Label 15 Setting 32 163 1 2 * * *

4A 10 Opto Input 16 ASCII Text (16 chars) 42520 42527 G3 8 Opto Label 16 Setting 32 163 1 2 * * *

4A 11 Opto Input 17 ASCII Text (16 chars) 42528 42535 G3 8 Opto Label 17 Setting 32 163 1 2 * *

4A 12 Opto Input 18 ASCII Text (16 chars) 42536 42543 G3 8 Opto Label 18 Setting 32 163 1 2 * *

4A 13 Opto Input 19 ASCII Text (16 chars) 42544 42551 G3 8 Opto Label 19 Setting 32 163 1 2 * *

4A 14 Opto Input 20 ASCII Text (16 chars) 42552 42559 G3 8 Opto Label 20 Setting 32 163 1 2 * *

4A 15 Opto Input 21 ASCII Text (16 chars) 42560 42567 G3 8 Opto Label 21 Setting 32 163 1 2 * *

4A 16 Opto Input 22 ASCII Text (16 chars) 42568 42575 G3 8 Opto Label 22 Setting 32 163 1 2 * *

4A 17 Opto Input 23 ASCII Text (16 chars) 42576 42583 G3 8 Opto Label 23 Setting 32 163 1 2 * *

4A 18 Opto Input 24 ASCII Text (16 chars) 42584 42591 G3 8 Opto Label 24 Setting 32 163 1 2 * *

INPUT LABELS
4B 00 GROUP 1 * * * * 0926
OUTPUT LABELS
4B 1 Relay 1 ASCII Text (16 chars) 42600 42607 G3 8 Relay Label 01 Setting 32 163 1 2 * * * *

4B 2 Relay 2 ASCII Text (16 chars) 42608 42615 G3 8 Relay Label 02 Setting 32 163 1 2 * * * *

4B 3 Relay 3 ASCII Text (16 chars) 42616 42623 G3 8 Relay Label 03 Setting 32 163 1 2 * * * *

4B 4 Relay 4 ASCII Text (16 chars) 42624 42631 G3 8 Relay Label 04 Setting 32 163 1 2 * * * *

4B 5 Relay 5 ASCII Text (16 chars) 42632 42639 G3 8 Relay Label 05 Setting 32 163 1 2 * * * *

4B 6 Relay 6 ASCII Text (16 chars) 42640 42647 G3 8 Relay Label 06 Setting 32 163 1 2 * * * *

4B 7 Relay 7 ASCII Text (16 chars) 42648 42655 G3 8 Relay Label 07 Setting 32 163 1 2 * * * *

4B 8 Relay 8 ASCII Text (16 chars) 42656 42663 G3 8 Relay Label 08 Setting 32 163 1 2 * * * *

4B 9 Relay 9 ASCII Text (16 chars) 42664 42671 G3 8 Relay Label 09 Setting 32 163 1 2 * * * *

4B 0A Relay 10 ASCII Text (16 chars) 42672 42679 G3 8 Relay Label 10 Setting 32 163 1 2 * * * *

4B 0B Relay 11 ASCII Text (16 chars) 42680 42687 G3 8 Relay Label 11 Setting 32 163 1 2 * * * *

4B 0C Relay 12 ASCII Text (16 chars) 42688 42695 G3 8 Relay Label 12 Setting 32 163 1 2 * * * *

4B 0D Relay 13 ASCII Text (16 chars) 42696 42703 G3 8 Relay Label 13 Setting 32 163 1 2 * * * *

4B 0E Relay 14 ASCII Text (16 chars) 42704 42711 G3 8 Relay Label 14 Setting 32 163 1 2 * * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 38

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
4B 0F Relay 15 ASCII Text (16 chars) 42712 42719 G3 8 Relay Label 15 Setting 32 163 1 2 * * * *

4B 10 Relay 16 ASCII Text (16 chars) 42720 42727 G3 8 Relay Label 16 Setting 32 163 1 2 * * * *

4B 11 Relay 17 ASCII Text (16 chars) 42728 42735 G3 8 Relay Label 17 Setting 32 163 1 2 * * * *

4B 12 Relay 18 ASCII Text (16 chars) 42736 42743 G3 8 Relay Label 18 Setting 32 163 1 2 * * * *

4B 13 Relay 19 ASCII Text (16 chars) 42744 42751 G3 8 Relay Label 19 Setting 32 163 1 2 * * * *

4B 14 Relay 20 ASCII Text (16 chars) 42752 42759 G3 8 Relay Label 20 Setting 32 163 1 2 * * * *

4B 15 Relay 21 ASCII Text (16 chars) 42760 42767 G3 8 Relay Label 21 Setting 32 163 1 2 * * * *

4B 16 Relay 22 ASCII Text (16 chars) 42768 42775 G3 8 Relay Label 22 Setting 32 163 1 2 * * * *

4B 17 Relay 23 ASCII Text (16 chars) 42776 42783 G3 8 Relay Label 23 Setting 32 163 1 2 * * * *

4B 18 Relay 24 ASCII Text (16 chars) 42784 42791 G3 8 Relay Label 24 Setting 32 163 1 2 * * * *

4B 19 Relay 25 ASCII Text (16 chars) 42792 42799 G3 8 Relay Label 25 Setting 32 163 1 2 * *

4B 1A Relay 26 ASCII Text (16 chars) 42800 42807 G3 8 Relay Label 26 Setting 32 163 1 2 * *

4B 1B Relay 27 ASCII Text (16 chars) 42808 42815 G3 8 Relay Label 27 Setting 32 163 1 2 * *

4B 1C Relay 28 ASCII Text (16 chars) 42816 42823 G3 8 Relay Label 28 Setting 32 163 1 2 * *

4B 1D Relay 29 ASCII Text (16 chars) 42824 42831 G3 8 Relay Label 29 Setting 32 163 1 2 * *

4B 1E Relay 30 ASCII Text (16 chars) 42832 42839 G3 8 Relay Label 30 Setting 32 163 1 2 * *

4B 1F Relay 31 ASCII Text (16 chars) 42840 42847 G3 8 Relay Label 31 Setting 32 163 1 2 * *

4B 20 Relay 32 ASCII Text (16 chars) 42848 42855 G3 8 Relay Label 32 Setting 32 163 1 2 * *

4B 21 Relay 33 ASCII Text (16 chars) 42856 42863 G3 8 Relay Label 33 Setting 32 163 1 2 *

4B 22 Relay 34 ASCII Text (16 chars) 42864 42871 G3 8 Relay Label 34 Setting 32 163 1 2 *

4B 23 Relay 35 ASCII Text (16 chars) 42872 42879 G3 8 Relay Label 35 Setting 32 163 1 2 *

4B 24 Relay 36 ASCII Text (16 chars) 42880 42887 G3 8 Relay Label 36 Setting 32 163 1 2 *

4B 25 Relay 37 ASCII Text (16 chars) 42888 42895 G3 8 Relay Label 37 Setting 32 163 1 2 *

4B 26 Relay 38 ASCII Text (16 chars) 42896 42903 G3 8 Relay Label 38 Setting 32 163 1 2 *

4B 27 Relay 39 ASCII Text (16 chars) 42904 42911 G3 8 Relay Label 39 Setting 32 163 1 2 *

4B 28 Relay 40 ASCII Text (16 chars) 42912 42919 G3 8 Relay Label 40 Setting 32 163 1 2 *

4B 29 Relay 41 ASCII Text (16 chars) 42920 42927 G3 8 Relay Label 41 Setting 32 163 1 2 *

4B 2A Relay 42 ASCII Text (16 chars) 42928 42935 G3 8 Relay Label 42 Setting 32 163 1 2 *

4B 2B Relay 43 ASCII Text (16 chars) 42936 42943 G3 8 Relay Label 43 Setting 32 163 1 2 *

4B 2C Relay 44 ASCII Text (16 chars) 42944 42951 G3 8 Relay Label 44 Setting 32 163 1 2 *

4B 2D Relay 45 ASCII Text (16 chars) 42952 42959 G3 8 Relay Label 45 Setting 32 163 1 2 *

4B 2E Relay 46 ASCII Text (16 chars) 42960 42967 G3 8 Relay Label 46 Setting 32 163 1 2 *

OUTPUT LABEL
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 39

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
GROUP 2
PROTECTION SETTINGS
50 00 Repeat of Group 1 columns/rows 43000 44999

GROUP 3
PROTECTION SETTINGS
70 00 Repeat of Group 1 columns/rows 45000 46999

GROUP 4
PROTECTION SETTINGS
90 00 Repeat of Group 1 columns/rows 47000 48999

This is an invisible column for auto extraction of event records, do not redefine any of its rows but keep it consistent with column [01]
B0 00 (No Header) Auto extraction Event Record ColumN/A * * * *
B0 1 Select Event Unsigned Integer(2) Setting 0 65535 1 * * * *
B0 2 Time & Date IEC870 Time & Date (From Record) Data * * * *
B0 3 Record Type Ascii String(32) Data * * * *
B0 4 Faulted Phases Binary Flag (8 bits) Indexed String Data * * * *
B0 5 Active Setting Group Unsigned Integer Data * * * *
B0 6 Time Stamp * * * *
B0 7 UNUSED
B0 8 Started Elements (1) Binary Flags (32 Bits)Indexed String 0..31 0..31 1 bit per elementLSBData * * * *
B0 9 Tripped Elements (1) Binary Flags (32 Bits)Indexed String 0..31 0..31 1 bit per elementLSBData * * * *
B0 0A UNUSED
B0 0B System Frequency Courier Number (frequency) Data * * * *
B0 0C Fault Duration Courier Number (time) Data * * * *
B0 0D CB Operate Time Courier Number (time) Data * * * *
B0 0E Relay Trip Time Courier Number (time) Data * * * *
B0 0F Fault Location Courier Number(metres) Data * * * *
B0 10 Fault Location Courier Number(miles) Data * * * *
B0 11 Fault Location Courier Number(ohms) Data * * * *
B0 12 Fault Location Courier Number(%) Data * * * *
B0 13 IA Courier Number (current) Data * * * *
B0 14 IB Courier Number (current) Data * * * *
B0 15 IC Courier Number (current) Data * * * *
B0 16 UNUSED
B0 17 UNUSED
B0 18 Tripped Elements 2 (1) Binary Flags (32 Bits)Indexed String 0..31 0..31 1 bit per elementLSBData * * * *
B0 19 VAN Courier Number (Voltage) Data * * * *
B0 1A VBN Courier Number (Voltage) Data * * * *
B0 1B VCN Courier Number (Voltage) Data * * * *
B0 1C Fault Resistor Courier Number (ohms) Data * * * *
B0 1D Fault in Zone Indexed String Data * * * *

This is an invisible column for auto extraction of event records, do not redefine any of its rows but keep it consistent with column [01]
B1 00 No Header N/A
B1 1 Select Record UINT16 Setting 0 65535 1 * * * *
B1 2 Time and Date IEC Date and Time Data * * * *
B1 3 Record Text ASCII Text Data * * * *
B1 4 Error No1 UINT32 Data * * * *
B1 5 Error No2 UINT32 Data * * * *

B2 00 DATA TRANSFER (No Header) N/A


B2 4 Domain Indexed String G57 PSL Settings Setting 0 1 1 2 * * * *
B2 8 Sub-Domain Indexed String G90 Group 1 Setting 0 3 1 2 * * * *
B2 0C Version Unsigned Integer (2 Bytes) 256 Setting 0 65535 1 2 * * * *
B2 18 Reference Not Used * * * *
B2 1C Transfer Mode Unsigned Integer Indexed Strings G76 G76 6 Setting 0 7 1 2 * * * *
B2 20 Data Transfer Repeated groups of Unsigned Integers Setting * * * *

B3 00 RECORDER CONTROL (No Header) N/A


B3 1 UNUSED
B3 2 Recorder Source Indexed String 0 0 Samples Data
B3 03-1F Reserved for future use
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 40

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

B4 00 RECORDER EXTRACTION COLUMN (No Header) N/A


B4 1 Select Record Number - n Unsigned Integer 0 Setting -199 199 1 0 * * * *
B4 2 Trigger Time IEC870 Time & Date Data * * * *
B4 03 Active Channels Binary Flag(32 Bits) N/A Data * * * *
B4 04 Channel Types Binary Flag(32 Bits) N/A Data * * * *
B4 05 Channel Offsets Repeated Group of Courier Number(No N/A Data * * * *
B4 06 Channel Scaling Repeated Group of Courier Number N/A Data * * * *
B4 07 Channel SkewVal Repeated Group of Integer(16-bit) N/A Data * * * *
B4 08 Channel MinVal Repeated Group of Integer(16-bit) N/A Data * * * *
B4 09 Channel MaxVal Repeated Group of Integer(16-bit) N/A Data * * * *
B4 10 No. Of Samples Unsigned integer (16-bit) N/A Data * * * *
B4 11 Trig Position Integer (16-bit) N/A Data * * * *
B4 12 Time Base Courier Number(Seconds) N/A Data * * * *
B4 14 Sample Times Repeated Group of Unsigned Integer(16N/A Data * * * *
B4 20 Dist. Channel 1 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 21 Dist. Channel 2 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 22 Dist. Channel 3 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 23 Dist. Channel 4 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 24 Dist. Channel 5 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 25 Dist. Channel 6 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 26 Dist. Channel 7 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 27 Dist. Channel 8 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 28 Dist. Channel 9 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 29 Dist. Channel 10 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 2A Dist. Channel 11 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 2B Dist. Channel 12 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 2C Dist. Channel 13 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 2D Dist. Channel 14 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 2E Dist. Channel 15 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 2F Dist. Channel 16 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 30 Dist. Channel 17 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 31 Dist. Channel 18 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 32 Dist. Channel 19 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 33 Dist. Channel 20 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 34 Dist. Channel 21 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 35 Dist. Channel 22 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 36 Dist. Channel 23 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 37 Dist. Channel 24 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 38 Dist. Channel 25 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 39 Dist. Channel 26 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 3A Dist. Channel 27 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 3B Dist. Channel 28 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 3C Dist. Channel 29 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 3D Dist. Channel 30 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 3E Dist. Channel 31 Repeated Group of Unsigned Integer/In N/A Data * * * *
B4 3F Dist. Channel 32 Repeated Group of Unsigned Integer/In N/A Data * * * *

B5 00 Calibration Coefficients (Hidden) (Note No Text) N/A


B5 1 Cal Software Version ASCII text 16 chars * * * *
B5 2 Cal Date and Time IEC Date and time * * * *
B5 3 Channel Types Repeated Group 16 * Binary Flag 8 bits * * * *
B5 4 Cal Coeffs Block transfer Repeated Group of UINT32 (4 coeffs voltage channel, 8 coeffs current channel) * * * *

B6 00 Comms Diagnostics (Hidden) Note: No text in column text N/A


B6 1 Bus Comms Err Count Front UINT32 * * * *
B6 2 Bus Message Count Front UINT32 * * * *
B6 3 Protocol Err Count Front UINT32 * * * *
B6 4 Busy Count Front UINT32 * * * *
B6 5 Reset front count (Reset Menu Cell cmd only) * * * *
B6 6 Bus Comms Err Count Rear UINT32 * * * *
B6 7 Bus Message Count Rear UINT32 * * * *
B6 8 Protocol Err Count Rear UINT32 * * * *
B6 9 Busy Count Rear UINT32 * * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 41

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
B6 0A Reset rear count (Reset Menu Cell cmd only) * * * *

B7 00 PSL Data
B7 01 Grp1 PSL Ref ASCII Text (32 chars) 31000 31015 G3 16 Default PSL "model number" * * * *
B7 02 Date/Time IEC870 Date & Time 31016 31019 G12 4 * * * *
B7 03 PSL unique ID Unsigned Integer (32 bits) 31020 31021 G27 2 0 * * * *
B7 11 Grp2 PSL Ref ASCII Text (32 chars) 31022 31037 G3 16 Default PSL "model number" * * * *
B7 12 Date/Time IEC870 Date & Time 31038 31041 G12 4 * * * *
B7 13 PSL unique ID Unsigned Integer (32 bits) 31042 31043 G27 2 0 * * * *
B7 21 Grp3 PSL Ref ASCII Text (32 chars) 31044 31059 G3 16 Default PSL "model number" * * * *
B7 22 Date/Time IEC870 Date & Time 31060 31063 G12 4 * * * *
B7 23 PSL unique ID Unsigned Integer (32 bits) 31064 31065 G27 2 0 * * * *
B7 31 Grp3 PSL Ref ASCII Text (32 chars) 31066 31079 G3 16 Default PSL "model number" * * * *
B7 32 Date/Time IEC870 Date & Time 31082 31085 G12 4 * * * *
B7 33 PSL unique ID Unsigned Integer (32 bits) 31086 31087 G27 2 0 * * * *

BF 00 COMMS SYS DATA N/A


BF 1 Dist Record Cntrl Ref Menu Cell(2) B300 Data * * * *
BF 2 Dist Record Extract Ref Menu Cell(2) B400 Data * * * *
BF 3 Setting Transfer Unsigned Integer Setting * * * *
BF 5 UNUSED * * * *
BF 6 Block Transfer Ref Menu Cell(2) B200 Data * * * *
BF F0 Reset Password Indexed String G11 Command 0 BF03
* * * *
F0 00 ETHERNET STATUS N/A 3
F0 01 Status Selector Unsigned Integer Setting 0 239 1 1 * * *
F0 03 Ethernet status value Unsigned Integer Data * * *
F0 04 Ethernet fatal error value Unsigned Integer Data * * *
* * *
FE 00 UCA 2 Only Data Cells

FE 01 CheckSync Bus Volts (Note: No Text) UCA 2 Only

FE 02 CheckSync Line Volts (Note: No Text) UCA 2 Only

FE 03 YN> Set Special cell that points to the correct PU setting cell - E/F Pu or SEF Pu.

FE 04 GN> Set Special cell that points to the correct PU setting cell - E/F Pu or SEF Pu.

FE 05 BN> Set Special cell that points to the correct PU setting cell - E/F Pu or SEF Pu.

FE 06 Control Input 1 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 07 Control Input 2 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 08 Control Input 3 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 09 Control Input 4 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 0A Control Input 5 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 0B Control Input 6 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 0C Control Input 7 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 0D Control Input 8 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 0E Control Input 9 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 0F Control Input 10 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 10 Control Input 11 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 11 Control Input 12 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 12 Control Input 13 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 42

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d

FE 13 Control Input 14 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 14 Control Input 15 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 15 Control Input 16 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 16 Control Input 17 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 17 Control Input 18 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 18 Control Input 19 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 19 Control Input 20 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 1A Control Input 21 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 1B Control Input 22 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 1C Control Input 23 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 1D Control Input 24 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 1E Control Input 25 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 1F Control Input 26 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 20 Control Input 27 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 21 Control Input 28 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 22 Control Input 29 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 23 Control Input 30 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 24 Control Input 31 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 25 Control Input 32 Config (Note: No Text) - Returns "0" for latched configuration, Returns "10" for pulsed configuration * * *

FE 26 Num Unextracted DR (Note: No Text) - Returns the number of unextracted Disturbance Records * * *

FE 27 Fault Locator Line Length Special cell that references [47 01] / [47 02] depending upon the selected distance unit (miles or metres) * * *

FF 01 Modbus Status Register Binary Flags (16bits) N/A 30001 30001 G26 1 Data * * * * *
FF 01 Modbus Status Register Binary Flags(16 bits) N/A 311001 311001 G26 1
FF 02 Number of Event records stored 30100 G1 1 * * * *
FF 03 Number of Fault records stored 30101 G1 1 * * * *
FF 04 Number of Maint records stored 30102 G1 1 * * * *
FF 05 Additionnal data present Unsigned Integer N/A 30112 30112 G1 1 Data * * * *
FF 6 Number of disturbance records. 30800 G1 1 Data * * * *
FF 7 Oldest stored disturbance record. 30801 G1 1 Data * * * *
FF 8 Number registers in current page. 30802 G1 1 Data * * * *
FF 09-87 Disturbance record data [1-127] 30803 30929 G1 127 Data * * * *
FF 88 Disturbance record time stamp. 30930 30933 G1 4 Data * * * *
FF 89 SelectDisturbance record. 40250 G1 1 Setting 1 65535 1 2 * * * *
FF 8A Record Selection Command Register N/A 40400 40400 G18 1 0 Command 0 24 1 2 * * * *
FF 8B Record Control Command Register N/A 40401 40401 G6 1 0 Command 0 4 1 2 * * * *
FF 8C Event Type Cell Reference N/A 30107 30107 G13 1 (From Record) Data * *
FF 8D Modbus Adress Unsigned Integer N/A 30110 30110 G1 1 Data * * * * *
FF 8E Event Index Unsigned Integer N/A 30111 30111 G1 1 Data * * * *
FF 8F Disturbance recorder status N/A 30934 30934 G1 1 Data
FF 90 FileFormat N/A 40250 40251 G1 1 Setting
FF 91 IEC Time Format N/A 40306 40306 G37 1 Setting 0 1 1 2 * * * *
FF EF A Phase Watts 30360 30361 G125 2 * * * *
FF F0 B Phase Watts 30362 30363 G125 2 * * * *
Courrier Data Base P44x/EN GC /F65

MiCOM P441, P442 & P444 Page 43

Part A: Menu database


CourierRef
Col Row Courier Text Courier Data Type LCD Modbus Address Data Gro Data Group Default Setting Cell Type Min Max Step Password Model Comment
Start End Courier Modbus Level 1 2 3 4c 4d
FF F1 C Phase Watts 30364 30365 G125 2 * * * *
FF F2 A Phase VArs 30366 30367 G125 2 * * * *
FF F3 B Phase VArs 30368 30369 G125 2 * * * *
FF F4 C Phase VArs 30370 30371 G125 2 * * * *
FF F5 A Phase VA 30372 30373 G125 2 * * * *
FF F6 B Phase VA 30374 30375 G125 2 * * * *
FF F7 C Phase VA 30376 30377 G125 2 * * * *
FF F8 3 Phase Watts 30378 30379 G125 2 * * * *
FF F9 3 Phase VArs 30380 30381 G125 2 * * * *
FF FA 3 Phase VA 30382 30383 G125 2 * * * *
FF FB Zero Seq Power 30384 30385 G125 2 * * * *
FF FC 3Ph W Fix Demand 30386 30387 G125 2 * * * *
FF FD 3Ph VArs Fix Dem 30388 30389 G125 2 * * * *
FF FE 3Ph W Peak Demand 30390 30391 G125 2 * * * *
FF FF 3Ph VArs Peak Demand 30392 30393 G125 2 * * * *
Courrier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 44

Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION

G1 UNSIGNED INTEGER
eg. 5678 stored as 5678

G2 NUMERIC SETTING
See 50300.3110.004

G3 ASCII TEXT CHARACTERS


0x00FF Second character
0xFF00 First character

G4 PLANT STATUS (1 REGISTER)


Reg
0x0001 Plant Status 1 (0 = Off, 1 = On)
0x0002 Plant Status 2 (0 = Off, 1 = On)
0x0004 Plant Status 3 (0 = Off, 1 = On)
0x0008 Plant Status 4 (0 = Off, 1 = On)
0x0010 Plant Status 5 (0 = Off, 1 = On)
0x0020 Plant Status 6 (0 = Off, 1 = On)
0x0040 Plant Status 7 (0 = Off, 1 = On)
0x0080 Plant Status 8 (0 = Off, 1 = On)
0x0100 Plant Status 9 (0 = Off, 1 = On)
0x0200 Plant Status 10 (0 = Off, 1 = On)
0x0400 Plant Status 11 (0 = Off, 1 = On)
0x0800 Plant Status 12 (0 = Off, 1 = On)
0x1000 Plant Status 13 (0 = Off, 1 = On)
0x2000 Plant Status 14 (0 = Off, 1 = On)
0x4000 Plant Status 15 (0 = Off, 1 = On)
0x8000 Plant Status 16 (0 = Off, 1 = On)

G5 CONTROL STATUS (1 REGISTER)

0x0001 Control Status 1 (0 = Off, 1 = On)


0x0002 Control Status 2 (0 = Off, 1 = On)
0x0004 Control Status 3 (0 = Off, 1 = On)
0x0008 Control Status 4 (0 = Off, 1 = On)
0x0010 Control Status 5 (0 = Off, 1 = On)
0x0020 Control Status 6 (0 = Off, 1 = On)
0x0040 Control Status 7 (0 = Off, 1 = On)
0x0080 Control Status 8 (0 = Off, 1 = On)
0x0100 Control Status 9 (0 = Off, 1 = On)
0x0200 Control Status 10 (0 = Off, 1 = On)
0x0400 Control Status 11 (0 = Off, 1 = On)
0x0800 Control Status 12 (0 = Off, 1 = On)
0x1000 Control Status 13 (0 = Off, 1 = On)
0x2000 Control Status 14 (0 = Off, 1 = On)
0x4000 Control Status 15 (0 = Off, 1 = On)
0x8000 Control Status 16 (0 = Off, 1 = On)

G6 Record Control Command Register


0 No Operation
1 Clear event Records
2 Clear Fault Record
3 Clear Maitenance Records
4 Reset Indications

G7 VTS Indicate/Block
Courrier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 45

Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


0 Blocking
1 Indication

G8 LOGIC INPUT STATUS


(Second reg, First Reg)
0x0000,0x0001 Opto 1 Input State (0=Off, 1=Energised)
0x0000,0x0002 Opto 2 Input State (0=Off, 1=Energised)
0x0000,0x0004 Opto 3 Input State (0=Off, 1=Energised)
0x0000,0x0008 Opto 4 Input State (0=Off, 1=Energised)
0x0000,0x0010 Opto 5 Input State (0=Off, 1=Energised)
0x0000,0x0020 Opto 6 Input State (0=Off, 1=Energised)
0x0000,0x0040 Opto 7 Input State (0=Off, 1=Energised)
0x0000,0x0080 Opto 8 Input State (0=Off, 1=Energised)
0x0000,0x0100 Opto 9 Input State (0=Off, 1=Energised)
0x0000,0x0200 Opto 10 Input State (0=Off, 1=Energised)
0x0000,0x0400 Opto 11 Input State (0=Off, 1=Energised)
0x0000,0x0800 Opto 12 Input State (0=Off, 1=Energised)
0x0000,0x1000 Opto 13 Input State (0=Off, 1=Energised)
0x0000,0x2000 Opto 14 Input State (0=Off, 1=Energised)
0x0000,0x4000 Opto 15 Input State (0=Off, 1=Energised)
0x0000,0x8000 Opto 16 Input State (0=Off, 1=Energised)
0x0001,0x0000 Opto 17 Input State (0=Off, 1=Energised)
0x0002,0x0000 Opto 18 Input State (0=Off, 1=Energised)
0x0004,0x0000 Opto 19 Input State (0=Off, 1=Energised)
0x0008,0x0000 Opto 20 Input State (0=Off, 1=Energised)
0x0010,0x0000 Opto 21 Input State (0=Off, 1=Energised)
0x0020,0x0000 Opto 22 Input State (0=Off, 1=Energised)
0x0040,0x0000 Opto 23 Input State (0=Off, 1=Energised)
0x0080,0x0000 Opto 24 Input State (0=Off, 1=Energised)

G9 RELAY OUTPUT STATUS


(Second reg, First Reg)
0x0000,0x0001 Relay 1 (0=Not Operated, 1=Operated)
0x0000,0x0002 Relay 2 (0=Not Operated, 1=Operated)
0x0000,0x0004 Relay 3 (0=Not Operated, 1=Operated)
0x0000,0x0008 Relay 4 (0=Not Operated, 1=Operated)
0x0000,0x0010 Relay 5 (0=Not Operated, 1=Operated)
0x0000,0x0020 Relay 6 (0=Not Operated, 1=Operated)
0x0000,0x0040 Relay 7 (0=Not Operated, 1=Operated)
0x0000,0x0080 Relay 8 (0=Not Operated, 1=Operated)
0x0000,0x0100 Relay 9 (0=Not Operated, 1=Operated)
0x0000,0x0200 Relay 10 (0=Not Operated, 1=Operated)
0x0000,0x0400 Relay 11 (0=Not Operated, 1=Operated)
0x0000,0x0800 Relay 12 (0=Not Operated, 1=Operated)
0x0000,0x1000 Relay 13 (0=Not Operated, 1=Operated)
0x0000,0x2000 Relay 14 (0=Not Operated, 1=Operated)
0x0000,0x4000 Relay 15 (0=Not Operated, 1=Operated)
0x0000,0x8000 Relay 16 (0=Not Operated, 1=Operated)
0x0001,0x0000 Relay 17 (0=Not Operated, 1=Operated)
0x0002,0x0000 Relay 18 (0=Not Operated, 1=Operated)
0x0004,0x0000 Relay 19 (0=Not Operated, 1=Operated)
0x0008,0x0000 Relay 20 (0=Not Operated, 1=Operated)
0x0010,0x0000 Relay 21 (0=Not Operated, 1=Operated)
0x0020,0x0000 Relay 22 (0=Not Operated, 1=Operated)
0x0040,0x0000 Relay 23 (0=Not Operated, 1=Operated)
0x0080,0x0000 Relay 24 (0=Not Operated, 1=Operated)
0x0100,0x0000 Relay 25 (0=Not Operated, 1=Operated)
0x0200,0x0000 Relay 26 (0=Not Operated, 1=Operated)
0x0400,0x0000 Relay 27 (0=Not Operated, 1=Operated)
0x0800,0x0000 Relay 28 (0=Not Operated, 1=Operated)
0x1000,0x0000 Relay 29 (0=Not Operated, 1=Operated)
0x2000,0x0000 Relay 30 (0=Not Operated, 1=Operated)
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


0x4000,0x0000 Relay 31 (0=Not Operated, 1=Operated)
0x8000,0x0000 Relay 32 (0=Not Operated, 1=Operated)

G10 PASSWORD LEVEL (May not be needed see modbus)


0 Level 0
1 Level 1
2 Level 2

G11 YES/NO
0 No
1 Yes

G12 TIME AND DATE (4 REGISTERS)


This will take the IEC 870 format as shown in ref [J] section 5.1.16
0x007F First register - Years
0x0FFF Second register - Month of year / Day of month / Day of week
0x9FBF Third Register - Summertime and hours / Validity and minutes
0xFFFF Fourth Register - Milli-seconds

G13 EVENT RECORD TYPE


0 Latched alarm active
1 Latched alarm inactive
2 Self reset alarm active
3 Self reset alarm inactive
4 Relay event
5 Opto event
6 Protection event
7 Platform event
8 Fault logged event
9 Maintenance Record logged event

G14 PAS UTILISE I> Function Link


Bit 0 I>1 VTS Block
Bit 1 I>1 VTS Block Non-Directionnal
Bit 2 I>2 VTS Block
Bit 3 I>2 VTS Block Non-Directionnal
Bit 4 I>3 VTS Block
Bit 5 I>4 VTS Block
Bit 6 Not Used
Bit 7 Not Used

G15 DISTURBANCE RECORD INDEX STATUS


0 No Record
1 Un-extracted
2 Extracted

G16 FAULTED PHASE


0x0001 Start A
0x0002 Start B
0x0004 Start C
0x0008 Start N
0x0010 Trip A
0x0020 Trip B
0x0040 Trip C
0x0080 Trip N

G17 ACTIVE/INACTIVE
0 Card not fitted
1 Card failed
2 Signal healthy
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


3 No Signal

G18 Record Selection Command Register


0x0000 No Operation
0x0001 Select next event
0x0002 Accept Event
0x0004 Select next Disturbance Record
0x0008 Accept disturbance record
0x0010 Select Next Disturbance record page

G19 LANGUAGE
0 English
1 Francais
2 Deutsch
3 Espanol

G20 (Second reg, First Reg) PASSWORD (2 REGISTERS)


0x0000, 0x00FF First password character
0x0000, 0xFF00 Second password character
0x00FF, 0x0000 Third password character
0xFF00, 0x0000 Fourth password character
NOTE THAT WHEN REGISTERS OF THIS TYPE ARE READ THE SLAVE WILL
ALWAYS INDICATE AN "*" IN EACH CHARACTER POSITION TO PRESERVE
THE PASSWORD SECURITY.

G21 IEC870 Interface


0 RS485
1 Fibre Optic

G22 PASSWORD CONTROL ACCESS LEVEL


0 Level 0 - Passwords required for levels 1 & 2.
1 Level 1 - Password required for level 2.
2 Level 2 - No passwords required.

G23 Voltage Curve selection


0 Disabled
1 DT
2 IDMT

G24 2 REGISTERS UNSIGNED LONG VALUE, 3 DECIMAL PLACES

High order word of long stored in 1st register


Low order word of long stored in 2nd register
Example 123456.789 stored as 123456789

G25 1 REGISTER UNSIGNED VALUE, 3 DECIMAL PLACES

Example 50.050 stored as 50050

G26 Modbus Status Register


VALUE/BIT MASK RELAY STATUS
0x0001 In Service Status (1 = In Service / 0= Out Of Service)
0x0002 Minor Self Test Failure (1 = Failure / 0 = No failure)
0x0004 New autoextraction event available (1 = Available / 0 = Not Available)
Time Synchronisation (=1 after Modbus time synch. Resets to 0 after 5 minutes
0x0008 unless it is time synched again. Other time sources do not affect this bit).
0x0010 New auto extraction disturbance record available (1 = Available / 0 = Not available)
0x0020 Fault (Not used - always 0).
0x0040 Trip LED status (1 = LED on, 0 = LED off).
0x0080 Alarm status summary (logical OR of all alarm status bits).
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


0x0100 Unused
0x0200 Unused
0x0400 Unused
0x0800 Unused
0x1000 Unused
0x2000 Unused
0x4000 Unused
0x8000 Unused

G27 2 REGISTERS UNSIGNED LONG VALUE


High order word of long stored in 1st register
Low order word of long stored in 2nd register
Example 123456 stored as 123456

G28 1 REGISTER SIGNED VALUE POWER & WATT-HOURS


Power = (Secondary power/CT secondary) * (100/VT secondary)

G29 3 REGISTER POWER MULTIPLER


All power measurments use a signed value of type G28 and a
2 register unsigned long multiplier of type G27
Value = Real Value*110/(CTsecondary*VTsecondary)
For Primary Power Multipler = CTprimary * VTprimary/110
For Secondary Power Multipler = CTsecondary * VTsecondary/110

G30 1 REGISTER SIGNED VALUE, 2 DECIMAL PLACES

G31 ANALOGUE CHANNEL ASSIGNMENT SELECTOR (Product Dependent)


0 VA
1 VB
2 VC
3 VN
4 IA
5 IB
6 IC
7 IN
8 IM
9 V Checksync1
10 unassigned
11 V Checksync 2

G32 Digital channel assignment this mapping depend of the model (P441 P442 P444)
0 8/16/24 Optos These are example values. Need one to be unassigned
to 14/21/32/46 Relays
8 Feedback
1024 72 - 1024 Internal Signals

G33 RECORDER TRIGGERING (2 REGISTERS, 32 BINARY FLAGS)


(Second reg, First Reg)
0x0000,0x0001 Digital Channel 1 Bit 0 (0 = No Trigger, 1= Trigger)
0x0000,0x0002 Digital Channel 1 Bit 1 (0 = No Trigger, 1= Trigger)
0x0000,0x0004 Digital Channel 1 Bit 2 (0 = No Trigger, 1= Trigger)
0x0000,0x0008 Digital Channel 1 Bit 3 (0 = No Trigger, 1= Trigger)
0x0000,0x0010 Digital Channel 1 Bit 4 (0 = No Trigger, 1= Trigger)
0x0000,0x0020 Digital Channel 1 Bit 5 (0 = No Trigger, 1= Trigger)
0x0000,0x0040 Digital Channel 1 Bit 6 (0 = No Trigger, 1= Trigger)
0x0000,0x0080 Digital Channel 1 Bit 7 (0 = No Trigger, 1= Trigger)
0x0000,0x0100 Digital Channel 1 Bit 8 (0 = No Trigger, 1= Trigger)
0x0000,0x0200 Digital Channel 1 Bit 9 (0 = No Trigger, 1= Trigger)
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


0x0000,0x0400 Digital Channel 1 Bit 10 (0 = No Trigger, 1= Trigger)
0x0000,0x0800 Digital Channel 1 Bit 11 (0 = No Trigger, 1= Trigger)
0x0000,0x1000 Digital Channel 1 Bit 12 (0 = No Trigger, 1= Trigger)
0x0000,0x2000 Digital Channel 1 Bit 13 (0 = No Trigger, 1= Trigger)
0x0000,0x4000 Digital Channel 1 Bit 14 (0 = No Trigger, 1= Trigger)
0x0000,0x8000 Digital Channel 1 Bit 15 (0 = No Trigger, 1= Trigger)
0x0001,0x0000 Digital Channel 2 Bit 0 (0 = No Trigger, 1= Trigger)
0x0002,0x0000 Digital Channel 2 Bit 1 (0 = No Trigger, 1= Trigger)
0x0004,0x0000 Digital Channel 2 Bit 2 (0 = No Trigger, 1= Trigger)
0x0008,0x0000 Digital Channel 2 Bit 3 (0 = No Trigger, 1= Trigger)
0x0010,0x0000 Digital Channel 2 Bit 4 (0 = No Trigger, 1= Trigger)
0x0020,0x0000 Digital Channel 2 Bit 5 (0 = No Trigger, 1= Trigger)
0x0040,0x0000 Digital Channel 2 Bit 6 (0 = No Trigger, 1= Trigger)
0x0080,0x0000 Digital Channel 2 Bit 7 (0 = No Trigger, 1= Trigger)
0x0100,0x0000 Digital Channel 2 Bit 8 (0 = No Trigger, 1= Trigger)
0x0200,0x0000 Digital Channel 2 Bit 9 (0 = No Trigger, 1= Trigger)
0x0400,0x0000 Digital Channel 2 Bit 10 (0 = No Trigger, 1= Trigger)
0x0800,0x0000 Digital Channel 2 Bit 11 (0 = No Trigger, 1= Trigger)
0x1000,0x0000 Digital Channel 2 Bit 12 (0 = No Trigger, 1= Trigger)
0x2000,0x0000 Digital Channel 2 Bit 13 (0 = No Trigger, 1= Trigger)
0x4000,0x0000 Digital Channel 2 Bit 14 (0 = No Trigger, 1= Trigger)
0x8000,0x0000 Digital Channel 2 Bit 15 (0 = No Trigger, 1= Trigger)

G34 TRIGGER MODE


0 Single
1 Extended

G35 Numeric Setting (as G2 but 2 registers)


Number of steps from minimum value
expressed as 2 register 32 bit unsigned int

G36 Test Mode


0 No Operation
1 3 Pole Test
2 Pole A Test
3 Pole B Test
4 Pole C Test

G37 ENABLED / DISABLED


0 Disabled
1 Enabled

G38c COMMUNICATION BAUD RATE (Courier - EIA485)


0 9600 bits/s
1 19200 bits/s
2 38400 bits/s

G38m COMMUNICATION BAUD RATE (MODBUS)


0 9600 bits/s
1 19200 bits/s
2 38400 bits/s

G38v COMMUNICATION BAUD RATE (IEC 60870)


0 9600 bits/s
2 19200 bits/s

G38d COMMUNICATION BAUD RATE (IEC 60870)


0 1200 bits/s
1 2400 bits/s
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


2 4800 bits/s
3 9600 bits/s
4 19200 bits/s
5 38400 bits/s

G39 COMMUNICATIONS PARITY


0 Odd
1 Even
2 None

G40 CHECK SYNC INPUT SELECTION


0 A-N
1 B-N
2 C-N
3 A-B
4 B-C
5 C-A

G41 CHECK SYNC VOLTAGE BLOCKING


0 None
1 Undervoltage
2 Differential
3 Both

G42 CHECK SYNC SLIP CONTROL


0 None
1 Timer
2 Frequency
3 Both

G43 IDMT CURVE TYPE


0 Disabled
1 DT
2 IEC S Invervse
3 IEC V Inverse
4 IEC E Inverse
5 UK LT Inverse
6 IEEE M Inverse
7 IEEE V Inverse
8 IEEE E Inverse
9 US Inverse
10 US ST Inverse

G44 DIRECTION
0 Non-Directional
1 Directional Fwd
2 Directional Rev

G45 VTS BLOCK


0 Block
1 Non-Directional

G46 POLARISATION
0 Zero Sequence
1 Neg Sequence

G47 MEASURING MODE


0 Phase-Phase
1 Phase-Neutral

G48 OPERATION MODE


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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


0 Any Phase
1 Three Phase

G49 V0 INPUT
0 Measured
1 Derived

G50 RTD SELECT


0x0001 RTD Input #1
0x0002 RTD Input #2
0x0004 RTD Input #3
0x0008 RTD Input #4
0x0010 RTD Input #5
0x0020 RTD Input #6
0x0040 RTD Input #7
0x0080 RTD Input #8
0x0100 RTD Input #9
0x0200 RTD Input #10

G51 FAULT LOCATION


0 Distance
1 Ohms
2 % of Line

G52 DEFAULT DISPLAY


0 Date & Time
1 Description
2 Plant Reference
3 U, I, Freq
4 Freq, P, Q

G53 SELECT FACTORY DEFAULTS


0 No Operation
1 All Settings
2 Setting Group 1
3 Setting Group 2
4 Setting Group 3
5 Setting Group 4

G54 SELECT PRIMARY SECONDARY MEASUREMENTS


0 Primary
1 Secondary

G55 CIRCUIT BREAKER CONTROL


0 No Operation
1 Trip
2 Close

G56 PHASE MEASUREMENT REFERENCE


0 VA
1 VB
2 VC
3 IA
4 IB
5 IC

G57 Data Transfer Domain


0 PSL Settings
1 PSL Configuration

G58 SEF SELECTION


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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


0 SEF Enabled
1 Wattmetric SEF
2 REF Enabled

G59 BATTERY STATUS


0 Dead
1 Healthy

G60 IDMT CURVE TYPE


0 DT
1 Inverse

G61 ACTIVE GROUP CONTROL


0 Select via Menu
1 Select via Optos

G62 SAVE AS
0 No Operation
1 Save
2 Abort

G64 ISEF> Func Link


Bit 0 ISEF>1 VTS Block
Bit 1 ISEF>2 VTS Block
Bit 2 ISEF>3 VTS Block
Bit 3 ISEF>4 VTS Block
Bit 4 ISEF>3 Block A/R
Bit 5 ISEF>4 Block A/R
Bit 6 Not Used
Bit 7 Not Used

G65 F< Function Link


Bit 0 F<1 U/V Block
Bit 1 F<2 U/V Block
Bit 2 F<3 U/V Block
Bit 3 F<4 U/V Block
Bit 4 Not Used
Bit 5 Not Used
Bit 6 Not Used
Bit 7 Not Used

G66 MESSAGE FORMAT


0 No Trigger
1 Trigger L/H
2 Trigger H/L

G67 THERMAL OVERLOAD


0 Disabled
1 Single
2 Dual

G68 CB Fail Reset Options


0 I< Only
1 CB Open & I<
2 Prot Reset & I<

G69 VTS RESET MODE


0 Manual
1 Auto
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


G70 AUTORECLOSE MODE
0 Opto Set
1 Auto
2 User Set
3 Pulse Set

G71 PROTOCOL
0 Courier
1 IEC60870-5-103
2 Modbus
3 DNP 3.0

G72 START DEAD TIME


0 Protection Reset
1 CB Trips

G73 RECLAIM TIME if PROTECTION START


0 Suspend
1 Continue

G74 RESET LOCKOUT


0 User Interface
1 Select NonAuto

G75 Auto-Reclose after Control Close


0 Enabled
1 Inhibited

G76 TRANSFER MODE


0 Prepare Rx
1 Complete Rx
2 Prepare Tx
3 Complete Tx
4 Rx Prepared
5 Tx Prepared
6 OK
7 Error

G77 Auto-Reclose
0 Out of Service
1 In Service

G78 A/R Telecontrol


0 No Operation
1 Auto
2 Non-auto

G79 Custom Settings


0 Disabled
1 Basic
2 Complete

G80 Visible/Invisible
0 Invisible
1 Visible

G81 Reset Lockout by


0 User Interface
1 CB Close
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION

G82 A/R Protection blocking


0 No Block
1 Block Inst Prot

G83 A/R Status


0 Auto Mode
1 Non-auto Mode
2 Live Line

G84 Modbus value+bit pos Started Elements(Product Specific)


(Second reg, First Reg)
0x0000,0x0001 General Start
0x0000,0x0002 Start I>1
0x0000,0x0004 Start I>2
0x0000,0x0008 Start I>3
0x0000,0x0010 Start I>4
0x0000,0x0020 Start I2>1
0x0000,0x0040 Start IN>1
0x0000,0x0080 Start IN>2
0x0000,0x0100 Start IN>3
0x0000,0x0200 Start IN>4
0x0000,0x0400 Start DEF
0x0000,0x0800 Start V<1
0x0000,0x1000 Start V<2
0x0000,0x2000 Start V>1
0x0000,0x4000 Start V>2
0x0000,0x8000 Start Broken Cond
0x0001,0x0000 Start LOL
0x0002,0x0000 Start Distance
0x0004,0x0000 Start TOC
0x0008,0x0000 Start Zero Seq. Pow.
0x0010,0x0000 Start PAP
0x0020,0x0000 Thermal Alarm
0x0040,0x0000 Start I2>2
0x0080,0x0000 Start I2>3
0x0100,0x0000 Start I2>4
0x0200,0x0000 Start VN>1
0x0400,0x0000 Start VN>1

G85 Modbus value+bit pos Tripped Elements(1)(Product Specific)


(Second reg, First Reg)
0x0000, 0x0001 Any Trip
0x0000, 0x0002 Trip I>1
0x0000, 0x0004 Trip I>2
0x0000, 0x0008 Trip I>3
0x0000, 0x0010 Trip I>4
0x0000, 0x0020 Trip I2>1
0x0000, 0x0040 Trip IN>1
0x0000, 0x0080 Trip IN>2
0x0000, 0x0100 Trip IN>3
0x0000, 0x0200 Trip IN>4
0x0000, 0x0400 Trip DEF
0x0000, 0x0800 Trip V<1
0x0000, 0x1000 Trip V<2
0x0000, 0x2000 Trip V>1
0x0000, 0x4000 Trip V>2
0x0000, 0x8000 Trip Broken line
0x0001, 0x0000 Trip Z1
0x0002, 0x0000 Trip Z2
0x0004, 0x0000 Trip Z3
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


0x0008, 0x0000 Trip Zp
0x0010, 0x0000 Trip Z4
0x0020, 0x0000 Trip Z2 Aided
0x0040, 0x0000 Trip LOL
0x0080, 0x0000 Trip Soft Tor
0x0100, 0x0000 Trip WI
0x0200, 0x0000 Trip CB Fail1
0x0400, 0x0000 Trip CB Fail2
0x0800, 0x0000 Trip Zero Seq. Pow.
0x1000, 0x0000 Trip PAP
0x2000, 0x0000 Trip Thermal
0x4000, 0x0000
0x8000,0x0000 Trip User

G86 Bit Description Tripped Elements(2) (Product Specific)


(Second reg, First Reg)(Courier and IEC870 Bit Position)
0x0000,0x0001 Trip I2>2
0x0000,0x0002 Trip I2>3
0x0000,0x0004 Trip I2>4
0x0000,0x0008 Trip VN>1
0x0000,0x0010 Trip VN>2
0x0000,0x0020 Trip Zq
0x0000,0x0040
0x0000,0x0080
0x0000,0x0100
0x0000,0x0200
0x0000,0x0400
0x0000,0x0800
0x0000,0x1000
0x0000,0x2000
0x0000,0x4000
0x0000,0x8000
0x0001,0x0000
0x0002,0x0000
0x0004,0x0000
0x0008,0x0000
0x0010,0x0000
0x0020,0x0000
0x0040,0x0000
0x0080,0x0000
0x0100,0x0000
0x0200,0x0000
0x0400,0x0000
0x0800,0x0000
0x1000,0x0000
0x2000,0x0000
0x4000,0x0000
0x8000,0x0000

G87 Bit Description Fault Alarms (Product Specific)


(Second reg, First Reg)(Courier and IEC870 Bit Position)
0x0000,0x0001 VT Fail Alarm
0x0000,0x0002 CT Fail Alarm
0x0000,0x0004 CB Status Alarm
0x0000,0x0008 AR Lockout Shot >
0x0000,0x0010 V<1 Alarm
0x0000,0x0020 V<2 Alarm
0x0000,0x0040 V>1 Alarm
0x0000,0x0080 V>2 Alarm
0x0000,0x0100 COS Alarm
0x0000,0x0200 CVT Fail Alarm
0x0000,0x0400
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


0x0000,0x0800
0x0000,0x1000
0x0000,0x2000
0x0000,0x4000
0x0000,0x8000
0x0001,0x0000
0x0002,0x0000
0x0004,0x0000
0x0008,0x0000
0x0010,0x0000
0x0020,0x0000
0x0040,0x0000
0x0080,0x0000
0x0100,0x0000
0x0200,0x0000
0x0400,0x0000
0x0800,0x0000
0x1000,0x0000
0x2000,0x0000
0x4000,0x0000
0x8000,0x0000

G88 Alarms
0 Alarm Disabled
1 Alarm Enabled

G89 Main VT Location


0 Line
1 Bus

G90 Group Selection


0 Group 1
1 Group 2
2 Group 3
3 Group 4

G91 A/R Protection Blocking


0 Allow Tripping
1 Block Tripping

G92 Lockout
0 No Lockout
1 Lockout

G93 Commission Test


0 No Operation
1 Apply Test
2 Remove Test

G94 Commission Test


0 No Operation
1 Apply Test

G95 System Fn Links(Not used in common)

G96 Bit Position Alarm 1 Indexed Strings


0
1
2 General Alarm
3 Prot'n Disabled
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


4 f out of Range
5 VT Fail Alarm
6 CT Fail Alarm
7 CB Fail Alarm
8 I^ Maint Alarm
9 I^ Lockout Alarm
10 CB Ops Maint
11 CB Ops Lockout
12 CB Op Time Maint
13 CB Op Time Lockout
14 F.F. Pre Lockout
15 F.F. Lock
16 Lockout Alarm
17 CB Status Alarm
18 Man CB Trip Fail
19 Man CB Cls Fail
20 Man CB Unhealthy
21 Control No C/S
22 AR Lockout Shot >
23 SG-Opto Invalid
24 A/R Fail
25 V<1 Alarm
26 V<2 Alarm
27 V>1 Alarm
28 V>2 Alarm
29 COS Alarm
30 Broken Cond. Alarm
31 CVT Fail Alarm

G97 Distance Unit


0 Kilometres
1 Miles

G98 Copy to
0 No Operation
1 Group 1
2 Group 2
3 Group 3
4 Group 4

G99 CB Control
0 Disabled
1 Local
2 Remote
3 Local+Remote
4 Opto
5 Opto+local
6 Opto+Remote
7 Opto+Rem+local

G100 ADD PRODUCT SPECIFIC DATA GROUPS HERE


to
G500

G101 Reclosing Mode on Single Phase tripping


0 1
1 1/3
2 1/3/3
3 1/3/3/3
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


G102 Reclosing Mode on Three Phase tripping
0 3
1 3/3
2 3/3/3
3 3/3/3/3

G103 Synchro Check Mode


Bit 0 Live Bus / Dead Line
Bit 1 Dead Bus / Live Line
Bit 2 Live Bus / Live Line

G105 Blocking type


0 None
1 Zone 1 unblocking
2 Zones 1 and 2 unblocking
3 Zones 1, 2 and 3 unblocking
4 Blocking all zones
5 Zone 1 blocking
6 Zones 1 and 2 blocking
7 Zones 1, 2 and 3 blocking

G106 Program Mode


0 Standard Scheme
1 Open Scheme

G107 Standard Scheme


0 Basic + Z1X
1 P.O.P. Z1
2 P.O.P. Z2
3 P.U.P. Z2
4 P.U.P. Fwd
5 B.O.P. Z1
6 B.O.P. Z2

G108 Signal Send Zone


0 None
1 CsZ1
2 CsZ2
3 CsZ4

G109 Type of Scheme


0 None
1 PermZ1
2 PermZ2
3 PermFwd
4 BlkZ1
5 BlkZ2

G110 Zone in Fault


0 None
1 Zone 1
2 Zone 2
3 Zone P
4 Zone Q
5 Zone 3
6 Zone 4

G111 Bit Position Alarm 2 Indexed Strings


0 Alarm No Presents Datas Acq
1 Alarm Validity Failure Acq
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


2 Alarm Mode Test Acq
3 Alarm Not Synchro Datas Acq
4 Alarm user 1
5 Alarm user 2
6 Alarm user 3
7 Alarm user 4
8 Alarm user 5
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

G112 Type of Scheme Logic on Aided DEF


0 Shared
1 Blocking
2 Permissive

G113 Unblocking Mode


0 None
1 Loss of Guard
2 Loss of Carrier

G114 Trip Mode for the distance protection


0 Force 3 Poles Trip
1 1 Pole Trip before T2
2 1 Pole Trip before T3

G115 Fault Type


0 Phase-to-ground Fault Enabled
1 Phase-to-phase Fault Enabled
2 Both Enabled

G116 Weak-infeed Mode


0 Disabled
1 PAP
2 Echo
3 WI Trip & Echo

G117 Block A/R


Bit 0 At T2
Bit 1 At T3
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


Bit 2 At Tzp
Bit 3 LoL Trip
Bit 4 I2> Trip
Bit 5 I>1 Trip
Bit 6 I>2 Trip
Bit 7 V<1 Trip
Bit 8 V<2 Trip
Bit 9 V>1 Trip
Bit 10 V>2 trip
Bit 11 IN>1 Trip
Bit 12 IN>2 Trip
Bit 13 Aided D.E.F Trip
Bit 14 Zero. Seq. Power Trip
Bit 15 IN>3 Trip
Bit 16 IN>4 Trip
Bit 17 PAP Trip
Bit 18 Thermal Trip
Bit 19 I2>2 Trip
Bit 20 I2>3 Trip
Bit 21 I2>4 Trip
Bit 22 VN>1 Trip
Bit 23 VN>2 Trip
Bit 24 At Tzq

G118 TOR SOTF Mode


Bit 0 TOR Z1 Enabled
Bit 1 TOR Z2 Enabled
Bit 2 TOR Z3 Enabled
Bit 3 TOR All Zones Enabled
Bit 4 TOR Dist. Scheme Enabled
Bit 5 SOTF All Zones
Bit 6 SOTF Level Detectors
Bit 7 SOTF Z1 Enabled
Bit 8 SOTF Z2 Enabled
Bit 9 SOTF Z3 Enabled
Bit 10 SOTF Z1 + Rev Enabled
Bit 11 SOTF Z2 + Rev Enabled
Bit 12 SOTF Dist. Scheme Enabled
Bit 13 SOTF Disable
Bit 14 SOTF I>3 Enabled
Bit 15 Not Used

G119 Power-Swing Zone Blocking


Bit 0 Z1&Z1x blocking
Bit 1 Z2 Blocking
Bit 2 Zp Blocking
Bit 3 Zq Blocking
Bit 4 Z3 Blocking
Bit 5 Z4 Blocking
Bit 6 Not Used
Bit 7 Not Used

G120 Zone Status


Bit 0 Z1x Enabled
Bit 1 Z2 Enabled
Bit 2 Zp Enabled
Bit 3 Zq Enabled
Bit 4 Z3 Enabled
Bit 5 Z4 Enabled
Bit 6 Not Used
Bit 7 Not Used
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION

G121 V<&V> MODE


Bit 0 V<1 Trip
Bit 1 V<2 Trip
Bit 2 V>1 Trip
Bit 3 V>2 Trip
Bit 4 Not Used
Bit 5 Not Used
Bit 6 Not Used
Bit 7 Not Used

G122 Plant Status


Bit 0 All Poles Open
Bit 1 Any Poles Closed
Bit x Not used

G123 DIRECTION
0 Directional Fwd
1 Directional Rev

G124 TEST PORT STATUS (1 REGISTER)


(Second reg, First Reg)
0x0001 Test Port Status 1 (0 = Off, 1 = On)
0x0002 Test Port Status 2 (0 = Off, 1 = On)
0x0004 Test Port Status 3 (0 = Off, 1 = On)
0x0008 Test Port Status 4 (0 = Off, 1 = On)
0x0010 Test Port Status 5 (0 = Off, 1 = On)
0x0020 Test Port Status 6 (0 = Off, 1 = On)
0x0040 Test Port Status 7 (0 = Off, 1 = On)
0x0080 Test Port Status 8 (0 = Off, 1 = On)

G125 2 REGISTER Measurements in IEEE floating point format

G130 1REGISTER Measurements


Bit 0 Measurements and Location are not valid
Bit 1 Measurements is valid
Bit 2 Location is valid

G131 ENABLED / DISABLED


0 Disabled
1 Earth Fault O/C
2 Zero Seq. Power

G140 TEST MODE


0 Disabled
1 Test Mode
2 Blocked

G141 CB Fail Reset Options


0 I< Only
1 CB Open & I<
2 Prot Reset & I<
3 Disable
4 Prot Reset Or I<

G200 Treshold Voltages


0 24-27V
1 30-34V
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


2 48-54V
3 110-125V
4 220-250V
5 Custom

G201 Treshold Voltages


0 24-27V
1 30-34V
2 48-54V
3 110-125V
4 220-250V

G202 Controll Input Status (2 REGISTERS)


(2nd Reg, 1st Reg)
0x0000,0x0001 Control Input 1 (0 = Reset, 1 = Set)
0x0000,0x0002 Control Input 2 (0 = Reset, 1 = Set)
0x0000,0x0004 Control Input 3 (0 = Reset, 1 = Set)
0x0000,0x0008 Control Input 4 (0 = Reset, 1 = Set)
0x0000,0x0010 Control Input 5 (0 = Reset, 1 = Set)
0x0000,0x0020 Control Input 6 (0 = Reset, 1 = Set)
0x0000,0x0040 Control Input 7 (0 = Reset, 1 = Set)
0x0000,0x0080 Control Input 8 (0 = Reset, 1 = Set)
0x0000,0x0100 Control Input 9 (0 = Reset, 1 = Set)
0x0000,0x0200 Control Input 10 (0 = Reset, 1 = Set)
0x0000,0x0400 Control Input 11 (0 = Reset, 1 = Set)
0x0000,0x0800 Control Input 12 (0 = Reset, 1 = Set)
0x0000,0x1000 Control Input 13 (0 = Reset, 1 = Set)
0x0000,0x2000 Control Input 14 (0 = Reset, 1 = Set)
0x0000,0x4000 Control Input 15 (0 = Reset, 1 = Set)
0x0000,0x8000 Control Input 16 (0 = Reset, 1 = Set)
0x0001,0x0000 Control Input 17 (0 = Reset, 1 = Set)
0x0002,0x0000 Control Input 18 (0 = Reset, 1 = Set)
0x0004,0x0000 Control Input 19 (0 = Reset, 1 = Set)
0x0008,0x0000 Control Input 20 (0 = Reset, 1 = Set)
0x0010,0x0000 Control Input 21 (0 = Reset, 1 = Set)
0x0020,0x0000 Control Input 22 (0 = Reset, 1 = Set)
0x0040,0x0000 Control Input 23 (0 = Reset, 1 = Set)
0x0080,0x0000 Control Input 24 (0 = Reset, 1 = Set)
0x0100,0x0000 Control Input 25 (0 = Reset, 1 = Set)
0x0200,0x0000 Control Input 26 (0 = Reset, 1 = Set)
0x0400,0x0000 Control Input 27 (0 = Reset, 1 = Set)
0x0800,0x0000 Control Input 28 (0 = Reset, 1 = Set)
0x1000,0x0000 Control Input 29 (0 = Reset, 1 = Set)
0x2000,0x0000 Control Input 30 (0 = Reset, 1 = Set)
0x4000,0x0000 Control Input 31 (0 = Reset, 1 = Set)
0x8000,0x0000 Control Input 32 (0 = Reset, 1 = Set)

G203 Virtual Input


0 No Operation
1 Set
2 Reset

G204 TEST MODE


0 Unsupported
1 Card Not Fitted
2 EIA232 OK
3 EIA485 OK
4 K-Bus OK

G205 Second rear courier rear port


0 EIA RS232
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MiCOM P441, P442 & P444 Page 63

Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


1 EIA RS485
2 K Bus

G206 COMMS MODE (RCUR1)


0 IEC60870 FT1.2
1 10-bit

G207 PORT CONFIG (RCUR1)


0 K Bus
1 EIA485 (RS485)

G208 STATUS (RCUR1)


0 K Bus OK
1 EIA485 OK
2 Fibre Optic

G211 Blocking Command


0 Blk_Disable
1 Blk_Direct
2 Blk_Blocking

G212 Trip Command


0 Trip_Disable
1 Trip_Permissive
2 Trip_Direct

G213 Baud rate


0 600
1 1200
2 2400
3 4800
4 9600
5 19200

G215 Trip
0 Default
1 Latched

G218 Remote device type


0 Remote_PX40
1 Remote PX30

G226 Link Status Report


0 Alarm
0 Event
1 None

G231 DIRECT ACCESS KEYS


0 Disabled
1 Enabled

G232 CONTROL INPUT COMMAND TEXT


0 ON/OFF
1 SET/RESET
2 IN/OUT
3 ENABLED/DISABLED

G233 HOTKEY ENABLED CONTROL INPUTS


0x00000001 Control Input 1
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


0x00000002 Control Input 2
0x00000004 Control Input 3
0x00000008 Control Input 4
0x00000010 Control Input 5
0x00000020 Control Input 6
0x00000040 Control Input 7
0x00000080 Control Input 8
0x00000100 Control Input 9
0x00000200 Control Input 10
0x00000400 Control Input 11
0x00000800 Control Input 12
0x00001000 Control Input 13
0x00002000 Control Input 14
0x00004000 Control Input 15
0x00008000 Control Input 16
0x00010000 Control Input 17
0x00020000 Control Input 18
0x00040000 Control Input 19
0x00080000 Control Input 20
0x00100000 Control Input 21
0x00200000 Control Input 22
0x00400000 Control Input 23
0x00800000 Control Input 24
0x01000000 Control Input 25
0x02000000 Control Input 26
0x04000000 Control Input 27
0x08000000 Control Input 28
0x10000000 Control Input 29
0x20000000 Control Input 30
0x40000000 Control Input 31
0x80000000 Control Input 32

G234 CONTROL INPUT SIGNAL TYPE


0 Latched
1 Pulsed

G235 ETHERNET PROTOCOL


0 UCA 2.0
1 UCA 2.0 GOOSE
2 IEC61850

G237 Characteristic
0 Standard 60%-80%
1 50% - 70 %

G239 IEC61850-9.2LE
0 Electrical
1 Fibre Optic

G240 Logical Node Arrangement


0 PLAT_LN_ARRANGEMENT_0
1 PLAT_LN_ARRANGEMENT_1
2 PLAT_LN_ARRANGEMENT_2
3 PLAT_LN_ARRANGEMENT_3
4 PLAT_LN_ARRANGEMENT_4
5 PLAT_LN_ARRANGEMENT_5
6 PLAT_LN_ARRANGEMENT_6
7 PLAT_LN_ARRANGEMENT_7
8 PLAT_LN_ARRANGEMENT_8
9 PLAT_LN_ARRANGEMENT_9
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


10 PLAT_LN_ARRANGEMENT_10
11 PLAT_LN_ARRANGEMENT_11
12 PLAT_LN_ARRANGEMENT_12
13 PLAT_LN_ARRANGEMENT_13

G245 IEC61850 DATA TYPES


0 NONE
1 BSTR2
2 BOOL
3 INT8
4 INT16
5 INT32
6 UINT8
7 UINT16
8 UINT32
9 SPS
10 DPS
11 INS

G246 IEC61850 TEST MODE


0 Disabled
1 Pass Through
2 Forced

G247 SNTP Status


0 Disabled
1 Trying Server 1
2 Trying Server 2
3 Server 1 OK
4 Server 2 OK
5 No response
6 No valid clock

G248 Switch IED Config Bank


0 No action
1 Switch Banks

G250 Days of the week


0 Sunday
1 Monday
2 Tuesday
3 Wednesday
4 Thursday
5 Friday
6 Saturday

G251 Days of the week


0 January
1 February
2 March
3 April
4 May
5 June
6 July
7 August
8 September
9 October
10 November
11 December

G252 Week Number


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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


0 First
1 Second
2 Third
3 Fourth
4 Last

G253 Time type


0 UTC
1 Local

G254 Local Time


0 Disabled
1 Fixed
2 Flexible

G303 Alarm Status 3


0 Battery fail
1 Field Volt Fail
2 Rear Comms fail
3 GOOSE IED Absent
4 NIC Not Fitted
5 NIC No Response
6 NIC Fatal Error
7 NIC Soft. Reload
8 Bad TCP/IP Cfg.
9 Bad OSI Config.
10 NIC Link Fail
11 NIC SW Mis-Match
12 IP Addr Conflict
13 Reserved for InterMiCOM and other platform alarms

G304 RELAY OUTPUT STATUS


(Second reg, First Reg)
0x0000,0x0001 Relay 33 (0=Not Operated, 1=Operated)
0x0000,0x0002 Relay 34 (0=Not Operated, 1=Operated)
0x0000,0x0004 Relay 35 (0=Not Operated, 1=Operated)
0x0000,0x0008 Relay 36 (0=Not Operated, 1=Operated)
0x0000,0x0010 Relay 37 (0=Not Operated, 1=Operated)
0x0000,0x0020 Relay 38 (0=Not Operated, 1=Operated)
0x0000,0x0040 Relay 39 (0=Not Operated, 1=Operated)
0x0000,0x0080 Relay 40 (0=Not Operated, 1=Operated)
0x0000,0x0100 Relay 41 (0=Not Operated, 1=Operated)
0x0000,0x0200 Relay 42 (0=Not Operated, 1=Operated)
0x0000,0x0400 Relay 43 (0=Not Operated, 1=Operated)
0x0000,0x0800 Relay 44 (0=Not Operated, 1=Operated)
0x0000,0x1000 Relay 45 (0=Not Operated, 1=Operated)
0x0000,0x2000 Relay 46 (0=Not Operated, 1=Operated)
0x0000,0x4000 Unused
0x0000,0x8000 Unused
0x0001,0x0000 Unused
0x0002,0x0000 Unused
0x0004,0x0000 Unused
0x0008,0x0000 Unused
0x0010,0x0000 Unused
0x0020,0x0000 Unused
0x0040,0x0000 Unused
0x0080,0x0000 Unused
0x0100,0x0000 Unused
0x0200,0x0000 Unused
0x0400,0x0000 Unused
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Part B: Menu datatype definition for Modbus

TYPE VALUE/BIT MASK DESCRIPTION


0x0800,0x0000 Unused
0x1000,0x0000 Unused
0x2000,0x0000 Unused
0x4000,0x0000 Unused
0x8000,0x0000 Unused

G302 CHECK SYNC INPUT SELECTION


0 A-N
1 B-N
2 C-N
3 A-B
4 B-C
5 C-A

G305 TYPE OF CT CONNECTION


0 Standard
1 Inverted
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Part C: Internal Digital Signals - DDB Element


DDB Element Name Ordinal English Text Description Source
DDB_ENTRY (DDB_OUTPUT_RELAY_1 0 Relay Label 01 OUTPUT RELAY 1 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_2 1 Relay Label 02 OUTPUT RELAY 2 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_3 2 Relay Label 03 OUTPUT RELAY 3 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_4 3 Relay Label 04 OUTPUT RELAY 4 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_5 4 Relay Label 05 OUTPUT RELAY 5 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_6 5 Relay Label 06 OUTPUT RELAY 6 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_7 6 Relay Label 07 OUTPUT RELAY 7 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_8 7 Relay Label 08 OUTPUT RELAY 8 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_9 8 Relay Label 09 OUTPUT RELAY 9 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_10 9 Relay Label 10 OUTPUT RELAY 10 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_11 10 Relay Label 11 OUTPUT RELAY 11 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_12 11 Relay Label 12 OUTPUT RELAY 12 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_13 12 Relay Label 13 OUTPUT RELAY 13 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_14 13 Relay Label 14 OUTPUT RELAY 14 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_15 14 Relay Label 15 OUTPUT RELAY 15 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_16 15 Relay Label 16 OUTPUT RELAY 16 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_17 16 Relay Label 17 OUTPUT RELAY 17 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_18 17 Relay Label 18 OUTPUT RELAY 18 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_19 18 Relay Label 19 OUTPUT RELAY 19 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_20 19 Relay Label 20 OUTPUT RELAY 20 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_21 20 Relay Label 21 OUTPUT RELAY 21 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_22 21 Relay Label 22 OUTPUT RELAY 22 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_23 22 Relay Label 23 OUTPUT RELAY 23 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_24 23 Relay Label 24 OUTPUT RELAY 24 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_25 24 Relay Label 25 OUTPUT RELAY 25 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_26 25 Relay Label 26 OUTPUT RELAY 26 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_27 26 Relay Label 27 OUTPUT RELAY 27 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_28 27 Relay Label 28 OUTPUT RELAY 28 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_29 28 Relay Label 29 OUTPUT RELAY 29 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_30 29 Relay Label 30 OUTPUT RELAY 30 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_31 30 Relay Label 31 OUTPUT RELAY 31 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_32 31 Relay Label 32 OUTPUT RELAY 32 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_33 32 Relay Label 33 OUTPUT RELAY 33 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_34 33 Relay Label 34 OUTPUT RELAY 34 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_35 34 Relay Label 35 OUTPUT RELAY 35 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_36 35 Relay Label 36 OUTPUT RELAY 36 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_37 36 Relay Label 37 OUTPUT RELAY 37 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_38 37 Relay Label 38 OUTPUT RELAY 38 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_39 38 Relay Label 39 OUTPUT RELAY 39 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_40 39 Relay Label 40 OUTPUT RELAY 40 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_41 40 Relay Label 41 OUTPUT RELAY 41 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_42 41 Relay Label 42 OUTPUT RELAY 42 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_43 42 Relay Label 43 OUTPUT RELAY 43 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_44 43 Relay Label 44 OUTPUT RELAY 44 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_45 44 Relay Label 45 OUTPUT RELAY 45 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_46 45 Relay Label 46 OUTPUT RELAY 46 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_47 46 Relay Label 47 OUTPUT RELAY 47 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_48 47 Relay Label 48 OUTPUT RELAY 48 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_49 48 Relay Label 49 OUTPUT RELAY 49 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_50 49 Relay Label 50 OUTPUT RELAY 50 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_51 50 Relay Label 51 OUTPUT RELAY 51 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_52 51 Relay Label 52 OUTPUT RELAY 52 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_53 52 Relay Label 53 OUTPUT RELAY 53 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_54 53 Relay Label 54 OUTPUT RELAY 54 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_55 54 Relay Label 55 OUTPUT RELAY 55 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_56 55 Relay Label 56 OUTPUT RELAY 56 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_57 56 Relay Label 57 OUTPUT RELAY 57 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_58 57 Relay Label 58 OUTPUT RELAY 58 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_59 58 Relay Label 59 OUTPUT RELAY 59 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_60 59 Relay Label 60 OUTPUT RELAY 60 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_61 60 Relay Label 61 OUTPUT RELAY 61 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_62 61 Relay Label 62 OUTPUT RELAY 62 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_63 62 Relay Label 63 OUTPUT RELAY 63 RELAY
DDB_ENTRY (DDB_OUTPUT_RELAY_64 63 Relay Label 64 OUTPUT RELAY 64 RELAY
DDB_ENTRY (DDB_OPTO_ISOLATOR_1 64 Opto Label 01 OPTO ISOLATOR 1 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_2 65 Opto Label 02 OPTO ISOLATOR 2 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_3 66 Opto Label 03 OPTO ISOLATOR 3 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_4 67 Opto Label 04 OPTO ISOLATOR 4 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_5 68 Opto Label 05 OPTO ISOLATOR 5 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_6 69 Opto Label 06 OPTO ISOLATOR 6 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_7 70 Opto Label 07 OPTO ISOLATOR 7 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_8 71 Opto Label 08 OPTO ISOLATOR 8 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_9 72 Opto Label 09 OPTO ISOLATOR 9 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_10 73 Opto Label 10 OPTO ISOLATOR 10 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_11 74 Opto Label 11 OPTO ISOLATOR 11 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_12 75 Opto Label 12 OPTO ISOLATOR 12 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_13 76 Opto Label 13 OPTO ISOLATOR 13 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_14 77 Opto Label 14 OPTO ISOLATOR 14 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_15 78 Opto Label 15 OPTO ISOLATOR 15 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_16 79 Opto Label 16 OPTO ISOLATOR 16 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_17 80 Opto Label 17 OPTO ISOLATOR 17 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_18 81 Opto Label 18 OPTO ISOLATOR 18 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_19 82 Opto Label 19 OPTO ISOLATOR 19 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_20 83 Opto Label 20 OPTO ISOLATOR 20 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_21 84 Opto Label 21 OPTO ISOLATOR 21 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_22 85 Opto Label 22 OPTO ISOLATOR 22 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_23 86 Opto Label 23 OPTO ISOLATOR 23 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_24 87 Opto Label 24 OPTO ISOLATOR 24 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_25 88 Opto Label 25 OPTO ISOLATOR 25 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_26 89 Opto Label 26 OPTO ISOLATOR 26 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_27 90 Opto Label 27 OPTO ISOLATOR 27 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_28 91 Opto Label 28 OPTO ISOLATOR 28 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_29 92 Opto Label 29 OPTO ISOLATOR 29 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_30 93 Opto Label 30 OPTO ISOLATOR 30 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_31 94 Opto Label 31 OPTO ISOLATOR 31 OPTO
DDB_ENTRY (DDB_OPTO_ISOLATOR_32 95 Opto Label 32 OPTO ISOLATOR 32 OPTO
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Part C: Internal Digital Signals - DDB Element


DDB Element Name Ordinal English Text Description Source
DDB_ENTRY (UNUSED_96) 96 -- Unused
DDB_ENTRY (UNUSED_97) 97 -- Unused
DDB_ENTRY (UNUSED_98) 98 -- Unused
DDB_ENTRY (UNUSED_99) 99 -- Unused
DDB_ENTRY (DDB_INP_TRIP_LED 100 Trip LED Trip LED PSL (IN)
DDB_ENTRY (DDB_INP_TZQ_TIMER_BLOCK 101 TZq Timer Block PSL (IN)
DDB_ENTRY (DDB_INP_OVEU0_TIMER_BLOCK_1 102 VN>1 Timer Block Block 1 phase neutral overvoltage stage 1 time delay PSL (IN)
DDB_ENTRY (DDB_INP_OVEU0_TIMER_BLOCK_2 103 VN>2 Timer Block Block 1 phase neutral overvoltage stage 2 time delay PSL (IN)
DDB_ENTRY (DDB_INP_52A_A 104 CB Aux A (52-A) Circuit breaker pole A closed/Status input from CB PSL (IN) CB STATUS
DDB_ENTRY (DDB_INP_52B_A 105 CB Aux A (52-B) Circuit breaker pole A closed/Status input from CB PSL (IN) CB STATUS
DDB_ENTRY (DDB_INP_52A_B 106 CB Aux B (52-A) Circuit breaker pole A closed/Status input from CB PSL (IN) CB STATUS
DDB_ENTRY (DDB_INP_52B_B 107 CB Aux B (52-B) Circuit breaker pole A closed/Status input from CB PSL (IN) CB STATUS
DDB_ENTRY (DDB_INP_52A_C 108 CB Aux C (52-A) Circuit breaker pole A closed/Status input from CB PSL (IN) CB STATUS
DDB_ENTRY (DDB_INP_52B_C 109 CB Aux C (52-B) Circuit breaker pole A closed/Status input from CB PSL (IN) CB STATUS
DDB_ENTRY (DDB_INP_SPAR 110 SPAR Enable Enable internal single pole autorecloser PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_TPAR 111 TPAR Enable Enable internal three pole autorecloser PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_AR_INTERNAL 112 A/R Internal Give internal autorecloser present (visible) PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_AR_CYCLE_1P 113 A/R 1p In Prog. One-pole external autoreclose cycle in progress PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_AR_CYCLE_3P 114 A/R 3p In Prog. Three-pole external autoreclose cycle in progress PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_AR_CLOSING 115 A/R Close Circuit Breaker closing order from external autoreclose PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_RECLAIM 116 A/R Reclaim External autorecloser in reclaim PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_BAR 117 BAR Block internal autoreclose PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_CTL_CHECK_SYNCH 118 Ext Chk Synch OK Autorisation signal from external check Synchroniser for reclosing PSL (IN) Autorecloser
with internal A/R
DDB_ENTRY (DDB_INP_CB_HEALTHY 119 CB Healthy Circuit breaker operational (gas pressure, mechanical state) PSL (IN) CB STATUS
DDB_ENTRY (DDB_INP_BLK_PROTECTION 120 BLK Protection Block all protection functions (21/67N/50/51/…) PSL (IN) All protection

DDB_ENTRY (DDB_INP_TRP_3P 121 Force 3P Trip Three pole tripping only PSL (IN)
DDB_ENTRY (DDB_INP_CB_MAN 122 Man. Close CB Circuit breaker manual close - order received PSL (IN) CB Status
DDB_ENTRY (DDB_INP_CB_TRIP_MAN 123 Man. Trip CB Circuit breaker manual trip - order received PSL (IN) CB Status
DDB_ENTRY (DDB_INP_DISC 124 CB Discrepancy CB Discrepancy (one pole open) PSL (IN) CB Status
DDB_ENTRY (DDB_INP_PROTA 125 External Trip A Phase A trip by external protection relay PSL (IN)
DDB_ENTRY (DDB_INP_PROTB 126 External Trip B Phase B trip by external protection relay PSL (IN)
DDB_ENTRY (DDB_INP_PROTC 127 External Trip C Phase C trip by external protection relay PSL (IN)
DDB_ENTRY (DDB_INP_CR 128 DIST. Chan Recv Signal receive on main channel (Distance) PSL (IN) Un-blocking logic
DDB_ENTRY (DDB_INP_CR_DEF 129 DEF. Chan Recv Signal receive on DEF channel PSL (IN) Un-blocking logic
DDB_ENTRY (DDB_INP_COS 130 DIST. COS Distance scheme channel out of service / Loss of Guard (Carrier out PSL (IN) Un-blocking logic
of service)
DDB_ENTRY (DDB_INP_COS_DEF 131 DEF. COS DEF scheme channel out of service / Loss of Guard PSL (IN) Un-blocking logic
DDB_ENTRY (DDB_INP_Z1X_EXT 132 Z1X Extension Zone 1 Extension Input PSL (IN)
DDB_ENTRY (DDB_INP_MCB_VTS_BUS 133 MCB/VTS Bus Fuse failure on busbar VT or MCB open (blocks voltage dependant PSL (IN) VTS
functions)
DDB_ENTRY (DDB_INP_MCB_VTS_LINE 134 MCB/VTS Line Fuse failure on line VT or MCB open (blocks voltage dependant PSL (IN) VTS
functions)
DDB_ENTRY (DDB_INP_SBEF_TIMER_BLOCK_1 135 IN>1 Timer Block Block earth fault stage 1 time delay PSL (IN) Earth Fault
DDB_ENTRY (DDB_INP_SBEF_TIMER_BLOCK_2 136 IN>2 Timer Block Block earth fault stage 2 time delay PSL (IN) Earth Fault
DDB_ENTRY (DDB_INP_DEF_TIMER_BLOCK 137 DEF Timer Block Block aided DEF time delay PSL (IN) DEF
DDB_ENTRY (DDB_INP_PHOC_TIMER_BLOCK_1 138 I>1 Timer Block Block phase overcurrent stage 1 time delay PSL (IN) I>1
DDB_ENTRY (DDB_INP_PHOC_TIMER_BLOCK_2 139 I>2 Timer Block Block phase overcurrent stage 2 time delay PSL (IN) I>2
DDB_ENTRY (DDB_INP_PHOC_TIMER_BLOCK_3 140 I>3 Timer Block Block phase overcurrent stage 3 time delay PSL (IN) I>3
DDB_ENTRY (DDB_INP_PHOC_TIMER_BLOCK_4 141 I>4 Timer Block Block phase overcurrent stage 4 time delay PSL (IN) I>4
DDB_ENTRY (DDB_INP_NPS_TIMER_BLOCK_1 142 I2> Timer Block Block negative sequence overcurrent time delay PSL (IN) I>4
DDB_ENTRY (DDB_INP_UNDU_TIMER_BLOCK_1 143 V<1 Timer Block Block phase undervoltage stage 1 time delay PSL (IN) V<1
DDB_ENTRY (DDB_INP_UNDU_TIMER_BLOCK_2 144 V<2 Timer Block Block phase undervoltage stage 2 time delay PSL (IN) V<2
DDB_ENTRY (DDB_INP_OVEU_TIMER_BLOCK_1 145 V>1 Timer Block Block phase overvoltage stage 1 time delay PSL (IN) V>1
DDB_ENTRY (DDB_INP_OVEU_TIMER_BLOCK_2 146 V>2 Timer Block Block phase overvoltage stage 2 time delay PSL (IN) V>2
DDB_ENTRY (DDB_INP_DISTANCE_TIMER_BLOCK 147 DIST. Tim. Block Block distance element time delay PSL (IN) Distance
DDB_ENTRY (DDB_INP_CB_RESET_LOCKOUT 148 Reset Lockout CB monitoring lockout reset PSL (IN) CB Monitoring
DDB_ENTRY (DDB_INP_CB_RESET_ALL_VALUES 149 Reset All values Reset all values of CB monitoring PSL (IN) CB Monitoring
DDB_ENTRY (DDB_INP_RESET_RELAYS_LEDS 150 Reset Latches Reset all permanent alarms + led and relay lached PSl (IN)
DDB_ENTRY (DDB_INP_STUB_BUS 151 Stub Bus Enable Enable I>4 Element for stub bus protection (isolator of HV line open - PSL (IN)
status isolator must be connected to an opto input)
DDB_ENTRY (DDB_INP_TRIP_A_USER 152 User Trip A Internal input for trip logic A PSL (IN) Trip Logic
DDB_ENTRY (DDB_INP_TRIP_B_USER 153 User Trip B Internal input for trip logic B PSL (IN) Trip Logic
DDB_ENTRY (DDB_INP_TRIP_C_USER 154 User Trip C Internal input for trip logic C PSL (IN) Trip Logic
DDB_ENTRY (DDB_INP_ZSP_TIMER_BLOCK 155 ZSP Timer Block Zero Sequence Power - Timer Block PSL (IN) ZSP
DDB_ENTRY (DDB_INP_PAP_TELETRIP_REC 156 PAP Tele Trip CR PAP Carrier Receive for teletransmission PSL(IN)
DDB_ENTRY (DDB_INP_PAP_TELETRIP_HEALT 157 PAP Tele Trip Hea PAP Carrier Out of Service (DT trip decision) PSL(IN)
DDB_ENTRY (DDB_INP_PAP_TIMER_BLOCK 158 PAP Timer Block Timer Block for frosen every timer initiated with PAP function PSL(IN)
DDB_ENTRY (DDB_INP_SBEF_TIMER_BLOCK_3 159 IN>3 Timer Block Timer Block for frosen timer initiated with IN>3 function PSL(IN)
DDB_ENTRY (DDB_INP_SBEF_TIMER_BLOCK_4 160 IN>4 Timer Block Timer Block for frosen timer initiated with IN>4 function PSL(IN)
DDB_ENTRY (DDB_INP_RESET_THERMAL 161 Reset Thermal Reset Thermal Overload Protection PSL(IN)
DDB_ENTRY (DDB_INP_TIMESYNC 162 Time Synchro External time synchronisation input PSL(IN)
DDB_ENTRY (DDB_UNUSED163 163 -- Unused
DDB_ENTRY (DDB_UNUSED164 164 -- Unused
DDB_ENTRY (DDB_UNUSED165 165 -- Unused
DDB_ENTRY (DDB_UNUSED166 166 -- Unused
DDB_ENTRY (DDB_UNUSED167 167 -- Unused
DDB_ENTRY (DDB_UNUSED168 168 -- Unused
DDB_ENTRY (DDB_INP_NPS_TIMER_BLOCK_2 169 I2>2 Timer Block Block negative sequence 2nd stage overcurrent time delay
DDB_ENTRY (DDB_INP_NPS_TIMER_BLOCK_3 170 I2>3 Timer Block Block negative sequence 3rd stage overcurrent time delay
DDB_ENTRY (DDB_INP_NPS_TIMER_BLOCK_4 171 I2>4 Timer Block Block negative sequence 4th stage overcurrent time delay
DDB_ENTRY (DDB_UNUSED172 172 -- Unused
DDB_ENTRY (DDB_ALARM_UNUSED0 173 -- Unused
DDB_ENTRY (DDB_INP_SELECT_CS_NCIT 163 Select CS(NCIT) Select Check synchro for NCIT PSL
DDB_ENTRY (DDB_INP_T1_TIMER_BLOCK 164 T1 Timer Block Timer block T1 input PSL
DDB_ENTRY (DDB_INP_T2_TIMER_BLOCK 165 T2 Timer Block Timer block T2 input PSL
DDB_ENTRY (DDB_INP_TZP_TIMER_BLOCK 166 TZp Timer Block Timer block TZp input PSL
DDB_ENTRY (DDB_INP_T3_TIMER_BLOCK 167 T3 Timer Block Timer block T3 input PSL
DDB_ENTRY (DDB_INP_T4_TIMER_BLOCK 168 T4 Timer Block Timer block T4 input PSL
DDB_ENTRY (DDB_ALARM_GENERAL 174 General Alarm Groupment of all alarms PSL (OUT)
DDB_ENTRY (DDB_ALARM_PROT_DISABLED 175 Prot'n Disabled Test mode enabled every protection out of order PSL (OUT)
DDB_ENTRY (DDB_ALARM_F_OUT_OF_RANGE 176 F out of Range Frequency tracking not working correctly PSL (OUT)
DDB_ENTRY (DDB_ALARM_VTS_SLOW 177 VT Fail Alarm Fuse failure indication (VT alarm) PSL (OUT) VT Supervision
DDB_ENTRY (DDB_ALARM_CTS 178 CT Fail Alarm Current transformers supervision indication PSL (OUT) CT Supervision
DDB_ENTRY (DDB_ALARM_BREAKER_FAIL 179 CB Fail Alarm Circuit breaker failure on any trip PSL (OUT) Breaker Fail
DDB_ENTRY (DDB_ALARM_I_BROK_MAINT 180 I^ Maint Alarm Broken current maintenance alarm (1st level) PSL (OUT) CB monitoring
DDB_ENTRY (DDB_ALARM_I_BROK_LOCKOUT 181 I^ Lockout Alarm Broken current lockout alarm (2nd level) PSL (OUT) CB monitoring
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Part C: Internal Digital Signals - DDB Element


DDB Element Name Ordinal English Text Description Source
DDB_ENTRY (DDB_ALARM_CB_OPS_MAINT 182 CB Ops Maint Alarm on number of circuit breaker operations PSL (OUT) CB monitoring
DDB_ENTRY (DDB_ALARM_CB_OPS_LOCKOUT 183 CB Ops Lockout Lockout on number of circuit breaker operations PSL (OUT) CB monitoring
DDB_ENTRY (DDB_ALARM_CB_OP_TIME_MAINT 184 CB Op Time Maint Alarm on CB excessive operating time PSL (OUT) CB monitoring
DDB_ENTRY (DDB_ALARM_CB_OP_TIME_LOCKOUT 185 CB Op Time Lock CB locked out due to excessive operating time PSL (OUT) CB monitoring
DDB_ENTRY (DDB_ALARM_PRE_LOCKOUT 186 F.F. Pre Lockout Excessive Fault Frequency CB Trip lockout Alarm (number of fault PSL (OUT) CB monitoring
maxi)
DDB_ENTRY (DDB_ALARM_EFF_LOCKOUT 187 F.F. Lock Excessive Fault Frequency CB Trip pre lockout Alarm (number of PSL (OUT) CB monitoring
fault maxi)
DDB_ENTRY (DDB_LOCKOUT_ALARM 188 Lockout Alarm Lockout alarm PSL (OUT)
DDB_ENTRY (DDB_ALARM_CB_STATUS 189 CB Status Alam Alarm Circuit Breaker PSL (OUT)
DDB_ENTRY (DDB_ALARM_CB_FAIL_TRIP 190 Man CB Trip Fail Alarm CB Fail for manual trip command PSL (OUT)
DDB_ENTRY (DDB_ALARM_CB_FAIL_CLOSE 191 Man CB Cls Fail Alarm CB fail for manual closing command PSL (OUT)
DDB_ENTRY (DDB_ALARM_CB_CONTROL_UNHEALTHLY 192 Man CB Unhealthty Alarm CB performed by unhealthy condition PSL (OUT)
DDB_ENTRY (DDB_ALARM_NO_CHECK_SYNC_CONTROL 193 Control No C/S Autoreclosed works without checksynchronism PSL (OUT)
DDB_ENTRY (DDB_ALARM_AR_LOCKOUT_MAX_SHOTS 194 AR Lockout Shot> Autoreclose lockout following final programmed attempt PSL (OUT) Autorecloser
DDB_ENTRY (DDB_ALARM_SG_OPTO_INVALID 195 SG-opto Invalid Setting group selected via opto (1 & 2 only) input invalid PSL (OUT)
DDB_ENTRY (DDB_ALARM_CB_FAIL_AR 196 A/R Fail No check sync / autorecloser failed PSL (OUT) Autorecloser
DDB_ENTRY (DDB_ALARM_UNDER_V_1 197 V<1 Alarm 1st stage undervoltage alarm PSL (OUT) V<1
DDB_ENTRY (DDB_ALARM_UNDER_V_2 198 V<2 Alarm 2nd stage undervoltage alarm PSL (OUT) V<2
DDB_ENTRY (DDB_ALARM_OVER_V_1 199 V>1 Alarm 1st stage overvoltage alarm PSL (OUT) V>1
DDB_ENTRY (DDB_ALARM_OVER_V_2 200 V>2 Alarm 2nd stage overvoltage alarm PSL (OUT) V>2
DDB_ENTRY (DDB_ALARM_COS 201 COS Alarm HF carrier anomaly alarm PSL(OUT) Unblocking logic
DDB_ENTRY (DDB_ALARM_BROKEN_COND 202 Brok. Cond. Alarm broken Conductor Alarm PSL(OUT) Broken conductor
DDB_ENTRY (DDB_ALARM_CVTS 203 CVT Alarm Alarm for capacitive voltage transformer PSL (OUT)
DDB_ENTRY (DDB_ALARM_NOPRESENTS_DATAS_ACQ 204 Analog In Alarm Alarm NCIT - Frame from Merge Units missing PSL (OUT)
DDB_ENTRY (DDB_ALARM_VALIDITY_FAILURE_ACQ 205 Val/Fail Acq Al. Alarm NCIT - Frame from Merge Units failed PSL (OUT)
DDB_ENTRY (DDB_ALARM_MODE_TEST_ACQ 206 Test Mode Acq Alarm NCIT - Merge Units in test mode PSL (OUT)
DDB_ENTRY (DDB_ALARM_NOTSYNCHRO_DATAS_ACQ 207 Synchro Acq Al. Alarm NCIT - frames not syncho PSL (OUT)
DDB_ENTRY (DDB_ALARM_USER1 208 alarm user 1 Alarm user for dedicated PSL PSL(IN)
DDB_ENTRY (DDB_ALARM_USER2 209 alarm user 2 Alarm user for dedicated PSL PSL(IN)
DDB_ENTRY (DDB_ALARM_USER3 210 alarm user 3 Alarm user for dedicated PSL PSL(IN)
DDB_ENTRY (DDB_ALARM_USER4 211 alarm user 4 Alarm user for dedicated PSL PSL(IN)
DDB_ENTRY (DDB_ALARM_USER5 212 alarm user 5 Alarm user for dedicated PSL PSL(IN)
DDB_ENTRY (DDB_ALARM_UNUSED213 213 -- Unused
DDB_ENTRY (DDB_ALARM_UNUSED214 214 -- Unused
DDB_ENTRY (DDB_ALARM_UNUSED215 215 -- Unused
DDB_ENTRY (DDB_ALARM_UNUSED216 216 -- Unused
DDB_ENTRY (DDB_ALARM_UNUSED217 217 -- Unused
DDB_ENTRY (DDB_ALARM_UNUSED218 218 -- Unused
DDB_ENTRY (DDB_ALARM_UNUSED219 219 -- Unused
DDB_ENTRY (DDB_ALARM_UNUSED220 220 -- Unused
DDB_ENTRY (DDB_ALARM_UNUSED221 221 -- Unused
DDB_ENTRY (DDB_ALARM_UNUSED222 222 -- Unused
DDB_ENTRY (DDB_PRT_AR_CLOSE 223 A/R Close Autorecloser Close command to CB PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_1POLE_IN_PROG 224 A/R 1P In Prog One-pole autoreclose cycle in progress PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_3POLE_IN_PROG 225 A/R 3P In Prog Three-pole autoreclose cycle in progress PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_1ST_CYCLE_IN_PROG 226 A/R 1st In Prog First high speed autoreclose cycle in progress PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_234TH_CYCLE_IN_PROG 227 A/R 234 In Prog Further autoreclose cycles in progress PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_TRIP_3PH 228 A/R Trip 3P Autorecloser signal to force all trips to be 3 Ph PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_RECLAIM 229 A/R Reclaim Reclaim timer timeout in progress PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_DISCRIM 230 AR Discrim. Discrim. Time window in progress PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_ENABLE 231 A/R Enable Autorecloser enabled / in service PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_1PAR_ENABLE 232 A/R SPAR Enable Single pole autorecloser activated PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_3PAR_ENABLE 233 A/R TPAR Enable Three pole autorecloser activated PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_LOCKOUT 234 A/R Lockout Autorecloser locked-out (no autoreclosure possible until reset) PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_FORCE_SYNC 235 A/R Force Sync. Force synchronism check to be made PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_SYNC 236 Check Synch. OK Check Synchronism conditions satisfied PSL (OUT) Synchro Check
DDB_ENTRY (DDB_PRT_DEAD_LINE 237 V< Dead Line Check Synch. Dead Line PSL (OUT) Synchro Check
DDB_ENTRY (DDB_PRT_LIVE_LINE 238 V> Live Line Check Synch. Live Line PSL (OUT) Synchro Check
DDB_ENTRY (DDB_PRT_DEAD_BUS 239 V< Dead Bus Check Synch. Dead Bus PSL (OUT) Synchro Check
DDB_ENTRY (DDB_PRT_LIVE_BUS 240 V> Live Bus Check Synch. Live Bus PSL (OUT) Synchro Check
DDB_ENTRY (DDB_PRT_CONTROL_CLOSE_IN_PROG 241 Ctrl Cls In Prog Manual (control) close in progress PSL (OUT) CB Control
DDB_ENTRY (DDB_PRT_CARRIER_SEND 242 DIST Sig. Send Distance protection schemes - Signal Send PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_UNB_CR 243 DIST UNB CR Unblock main channel received PSL(OUT) Unblocking Logic
DDB_ENTRY (DDB_PRT_DIST_FWD 244 DIST Fwd Distance protection: Forward fault detected PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_REV 245 DIST Rev Distance protection: Reverse fault detected PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_TRIP_A 246 DIST Trip A Distance protection: Phase A trip PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_TRIP_B 247 DIST Trip B Distance protection: Phase B trip PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_TRIP_C 248 DIST Trip C Distance protection: Phase C trip PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_START_A 249 DIST Start A Distance protection started on phase A PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_START_B 250 DIST Start B Distance protection started on phase B PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_START_C 251 DIST Start C Distance protection started on phase C PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_CR_ACC 252 DIST Sch. Accel. Distance scheme Accelerating PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_CR_PERM 253 DIST Sch. Perm. Distance scheme Permissive PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_CR_BLOCK 254 DIST Sch. Block. Distance scheme Blocking PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_Z1 255 Z1 Fault in zone 1 PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_Z1X 256 Z1X Fault in zone 1 extended PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_Z2 257 Z2 Fault in zone 2 PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_Z3 258 Z3 Fault in zone 3 PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_Z4 259 Z4 Fault in zone 4 PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_Zp 260 Zp Fault in zone P PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_T1 261 T1 Timer in zone 1 elapsed (at 1 = end of timer) PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_T2 262 T2 Timer in zone 2 elapsed (at 1 = end of timer) PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_T3 263 T3 Timer in zone 3 elapsed (at 1 = end of timer) PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_T4 264 T4 Timer in zone 4 elapsed (at 1 = end of timer) PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_TZP 265 Tzp Timer in zone p elapsed (at 1 = end of timer) PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_WI_TRIP_A 266 WI Trip A Phase A trip on weak infeed PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_WI_TRIP_B 267 WI Trip B Phase B trip on weak infeed PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_WI_TRIP_C 268 WI Trip C Phase C trip on weak infeed PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_POWER_SWING 269 Power Swing Power swing detected PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_REVERSAL_GUARD 270 Reversal Guard Current reversal guard logic in action PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DEF_CARRIER_SEND 271 DEF Sig. Send DEF protection schemes - Signal Send PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_UNB_CR_DEF 272 DEF UNB CR Unblock DEF channel PSL (OUT) Unblocking logic
DDB_ENTRY (DDB_PRT_DEF_REV 273 DEF Rev Channel Aided DEF: reverse fault PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_DEF_FWD 274 DEF Fwd Channel Aided DEF: forward fault PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_DEF_START_AN 275 DEF Start A Channel Aided DEF: start phase A PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_DEF_START_BN 276 DEF Start B Channel Aided DEF: start phase B PSL (OUT) Aided DEF
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Part C: Internal Digital Signals - DDB Element


DDB Element Name Ordinal English Text Description Source
DDB_ENTRY (DDB_PRT_DEF_START_CN 277 DEF Start C Channel Aided DEF: start phase C PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_DEF_TRIP_A 278 DEF Trip A Channel Aided DEF: trip phase A PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_DEF_TRIP_B 279 DEF Trip B Channel Aided DEF: trip phase B PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_DEF_TRIP_C 280 DEF Trip C Channel Aided DEF: trip phase C PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_IN_SUP_1_TRIP 281 IN>1 Trip Earth fault stage 1 trip PSL (OUT) Earth Fault 1
DDB_ENTRY (DDB_PRT_IN_SUP_2_TRIP 282 IN>2 Trip Earth fault stage 2 trip PSL (OUT) Earth Fault 2
DDB_ENTRY (DDB_PRT_IN_SUP_1_PICK_UP 283 IN>1 Start Earth fault stage 1 start PSL (OUT) Earth Fault 1
DDB_ENTRY (DDB_PRT_IN_SUP_2_PICK_UP 284 IN>2 Start Earth fault stage 2 start PSL (OUT) Earth Fault 2
DDB_ENTRY (DDB_PRT_UNDER_V_ANY_PICK_UP_A 285 V< Start Any A Any undervoltage start detected on phase A PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_UNDER_V_ANY_PICK_UP_B 286 V< Start Any B Any undervoltage start detected on phase B PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_UNDER_V_ANY_PICK_UP_C 287 V< Start Any C Any undervoltage start detected on phase C PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_UNDER_V_1_PICK_UP 288 V<1 Start Undervoltage stage 1 start PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_UNDER_V_2_PICK_UP 289 V<2 Start Undervoltage stage 2 start PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_UNDER_V_1_TRIP 290 V<1 Trip Undervoltage stage 1 trip PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_UNDER_V_2_TRIP 291 V<2 Trip Undervoltage stage 2 trip PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_OVER_V_ANY_PICK_UP_A 292 V> Start Any A Any overvoltage start detected on phase A PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_OVER_V_ANY_PICK_UP_B 293 V> Start Any B Any overvoltage start detected on phase B PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_OVER_V_ANY_PICK_UP_C 294 V> Start Any C Any overvoltage start detected on phase C PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_OVER_V_1_PICK_UP 295 V>1 Start Overvoltage stage 1 start PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_OVER_V_2_PICK_UP 296 V>2 Start Overvoltage stage 2 start PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_OVER_V_1_TRIP 297 V>1 Trip Overvoltage stage 1 trip PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_OVER_V_2_TRIP 298 V>2 Trip Overvoltage stage 2 trip PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_I2_SUP_PICK_UP_1 299 I2> Start Negative Sequence Current Start PSL (OUT) Neg Seq. O/C
DDB_ENTRY (DDB_PRT_I2_SUP_TRIP_1 300 I2> Trip Negative Sequence Current Trip PSL (OUT) Neg Seq. O/C
DDB_ENTRY (DDB_PRT_I_SUP_ANY_PICK_UP_A 301 I> Start Any A Any overcurrent start for phase A PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_ANY_PICK_UP_B 302 I> Start Any B Any overcurrent start for phase B PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_ANY_PICK_UP_C 303 I> Start Any C Any overcurrent start for phase C PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_1_PICK_UP 304 I>1 Start Overcurrent stage 1 start PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_2_PICK_UP 305 I>2 Start Overcurrent stage 2 start PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_3_PICK_UP 306 I>3 Start Overcurrent stage 3 start PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_4_PICK_UP 307 I>4 Start Overcurrent stage 4 start PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_1_TRIP 308 I>1 Trip Overcurrent stage 1 trip PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_2_TRIP 309 I>2 Trip Overcurrent stage 2 trip PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_3_TRIP 310 I>3 Trip Overcurrent stage 3 trip PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_4_TRIP 311 I>4 Trip Overcurrent stage 4 trip PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_SOTF_ENABLE 312 SOTF Enable Switch On To Fault enable PSL (OUT) SOTF
DDB_ENTRY (DDB_PRT_I_TOR_ENABLE 313 TOR Enable Trip On Reclose enable PSL (OUT) TOR
DDB_ENTRY (DDB_PRT_TOC_START_A 314 TOC Start A Trip on Close start on phase A PSL (OUT) SOTF
DDB_ENTRY (DDB_PRT_TOC_START_B 315 TOC Start B Trip on Close start on phase B PSL (OUT) SOTF
DDB_ENTRY (DDB_PRT_TOC_START_C 316 TOC Start C Trip on Close start on phase C PSL (OUT) SOTF
DDB_ENTRY (DDB_PRT_ANY_START 317 Any start Any protection start PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_1PH 318 1ph Fault Single phase fault PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_2PH 319 2ph Fault Two phase fault PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_3PH 320 3ph Fault Three phase fault PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_ANY_TRIP 321 Any Trip Single or three pole trip or external protection trip PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_ANY_INTERNAL_TRIP_A 322 Any Int. Trip A Any internal protection A phase trip PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_ANY_INTERNAL_TRIP_B 323 Any Int. Trip B Any internal protection B phase trip PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_ANY_INTERNAL_TRIP_C 324 Any Int. Trip C Any internal protection C phase trip PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_ANY_TRIP_A 325 Any Trip A Any trip A (internal or external protection) PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_ANY_TRIP_B 326 Any Trip B Any trip B (internal or external protection) PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_ANY_TRIP_C 327 Any Trip C Any trip C (internal or external protection) PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_1P_TRIP 328 1P Trip Single pole trip (internal or external) PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_3P_TRIP 329 3P Trip Three pole trip (internal or external) PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_BROKEN_CONDUCTOR_TRIP 330 Brk.Conduct.Trip Broken conductor trip PSL (OUT) Broken Cond.
DDB_ENTRY (DDB_PRT_LOSS_OF_LOAD_TRIP 331 Loss. Load Trip Loss of load trip PSL (OUT) Loss of load
DDB_ENTRY (DDB_PRT_SOTF_TOR_TRIP 332 SOTF/TOR Trip Switch on to fault trip or trip on reclose PSL (OUT) SOTF
DDB_ENTRY (DDB_PRT_TBF1_TRIP_3PH 333 tBF1 Trip Breaker fail trip from tBF1 PSL (OUT) Breaker failure
DDB_ENTRY (DDB_PRT_TBF2_TRIP_3PH 334 tBF2 Trip Breaker fail trip from tBF2 PSL (OUT) Breaker failure
DDB_ENTRY (DDB_PRT_CONTROL_TRIP 335 Control Trip Control trip command from user PSL (OUT) CB control
DDB_ENTRY (DDB_PRT_CONTROL_CLOSE 336 Control Close Control close command from user PSL (OUT) CB control
DDB_ENTRY (DDB_PRT_VTS_FAST 337 VTS Fast Unstantaneous unconfirmed fuse failure internal detection PSL (OUT) VTS
DDB_ENTRY (DDB_PRT_CB_AUX_A 338 CB Aux A CB Phase A status PSL (OUT) CB status
DDB_ENTRY (DDB_PRT_CB_AUX_B 339 CB Aux B CB Phase B status PSL (OUT) CB status
DDB_ENTRY (DDB_PRT_CB_AUX_C 340 CB Aux C CB Phase C status PSL (OUT) CB status
DDB_ENTRY (DDB_PRT_ANY_POLE_DEAD 341 Any Pole Dead Any circuit breaker pole dead (one or more poles open) PSL (OUT) Poledead
DDB_ENTRY (DDB_PRT_ALL_POLE_DEAD 342 All Pole Dead All circuit breaker poles dead (breaker open 3 phase) PSL (OUT) Poledead
DDB_ENTRY (DDB_PRT_DIR_AV_WIT_FILT 343 DIST Fwd No Filt Distance protection: Forward fault detected not filted PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIR_AM_WIT_FILT 344 DIST Rev No Filt Distance protection: Reverse fault detected not filted PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_CVMR 345 DIST Convergency Distance protection: Internal characteristic PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_CROSS_COUNTRY 346 Cross Count. Flt Cross Country Fault PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_ZSP_START 347 ZSP Start Zero Sequence Power - Start PSL (OUT) ZSP
DDB_ENTRY (DDB_PRT_ZSP_TRIP 348 ZSP Trip Zero Sequence Power - Trip PSL (OUT) ZSP
DDB_ENTRY (DDB_PRT_Z1_WIT_FILT 349 Z1 Not Filtrated Z1 decision not filtered by phase selection PSL (OUT)
DDB_ENTRY (DDB_PRT_OUT_OF_STEP 350 Out Of Step Start of an Out of Step Detection (1st cycle) PSL (OUT)
DDB_ENTRY (DDB_PRT_STABLE_SWING 351 S. Swing Start of Stable Swing (1st cycle) PSL (OUT)
DDB_ENTRY (DDB_PRT_OUT_OF_STEP_CONF 352 Out Of Step Conf Out of Step Confirmed (number of cycles reached) PSL (OUT)
DDB_ENTRY (DDB_PRT_STABLE_SWING_CONF 353 S. Swing Conf Stable Swing confirmed (number of cycles reached) PSL (OUT)
DDB_ENTRY (DDB_PRT_DIST_START_N 354 Dist Start N Start of distance protection for phase to ground fault PSL (OUT)
DDB_ENTRY (DDB_PRT_IN_SUP_3_TRIP 355 IN>3 Trip Trip decision from IN>3 function (timer issued) PSL (OUT)
DDB_ENTRY (DDB_PRT_IN_SUP_4_TRIP 356 IN>4 Trip Trip decision from IN>4 function (timer issued) PSL (OUT)
DDB_ENTRY (DDB_PRT_IN_SUP_3_PICK_UP 357 IN>3 Start Start of IN>3 fucntion (timer initiated) PSL (OUT)
DDB_ENTRY (DDB_PRT_IN_SUP_4_PICK_UP 358 IN>4 Start Start of IN>4 fucntion (timer initiated) PSL (OUT)
DDB_ENTRY (DDB_PRT_PAP_TRIP_A 359 PAP Trip A Trip A Phase decision from PAP function PSL (OUT)
DDB_ENTRY (DDB_PRT_PAP_TRIP_B 360 PAP Trip B Trip B Phase decision from PAP function PSL (OUT)
DDB_ENTRY (DDB_PRT_PAP_TRIP_C 361 PAP Trip C Trip C Phase decision from PAP function PSL (OUT)
DDB_ENTRY (DDB_PRT_PAP_TRIP_IN 362 PAP Trip IN Trip decision from PAP function (Ground Fault detected) PSL (OUT)
DDB_ENTRY (DDB_PRT_PAP_START_A 363 PAP Start A Phase A Start with PAP function PSL (OUT)
DDB_ENTRY (DDB_PRT_PAP_START_B 364 PAP Start B Phase B Start with PAP function PSL (OUT)
DDB_ENTRY (DDB_PRT_PAP_START_C 365 PAP Start C Phase C Start with PAP function PSL (OUT)
DDB_ENTRY (DDB_PRT_PAP_PRES_IN 366 PAP Pres IN Residual current detected by PAP function PSL (OUT)
DDB_ENTRY (DDB_PRT_PAP_PRE_START 367 PAP Pre Start PAP Picks up by voltage detectors (timer initiated) PSL (OUT)
DDB_ENTRY (DDB_PRT_TRACE_TRIG_OK 368 Trace Trig OK Triggering trace has operated correctly PSL (OUT)
DDB_ENTRY (DDB_PRT_THERMAL_OVERL_ALARM 369 Thermal Alarm Alarm from Thermal Overload function picks up PSL (OUT)
DDB_ENTRY (DDB_PRT_THERMAL_OVERL_TRIP 370 Trip Thermal Trip with Thermal Overload fucntion (timer issued) PSL (OUT)
DDB_ENTRY (DDB_PRT_UNDER_V1_PICK_UP_A 371 V<1 Start A Undervoltage stage 1 pick up on phase A PSL
DDB_ENTRY (DDB_PRT_UNDER_V1_PICK_UP_B 372 V<1 Start B Undervoltage stage 1 pick up on phase B PSL
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Part C: Internal Digital Signals - DDB Element


DDB Element Name Ordinal English Text Description Source
DDB_ENTRY (DDB_PRT_UNDER_V1_PICK_UP_C 373 V<1 Start C Undervoltage stage 1 pick up on phase C PSL
DDB_ENTRY (DDB_PRT_UNDER_V2_PICK_UP_A 374 V<2 Start A Undervoltage stage 2 pick up on phase A PSL
DDB_ENTRY (DDB_PRT_UNDER_V2_PICK_UP_B 375 V<2 Start B Undervoltage stage 2 pick up on phase B PSL
DDB_ENTRY (DDB_PRT_UNDER_V2_PICK_UP_C 376 V<2 Start C Undervoltage stage 2 pick up on phase C PSL
DDB_ENTRY (DDB_PRT_OVER_V1_PICK_UP_A 377 V>1 Start A Overvoltage stage 1 pick up on phase A PSL
DDB_ENTRY (DDB_PRT_OVER_V1_PICK_UP_B 378 V>1 Start B Overvoltage stage 1 pick up on phase B PSL
DDB_ENTRY (DDB_PRT_OVER_V1_PICK_UP_C 379 V>1 Start C Overvoltage stage 1 pick up on phase C PSL
DDB_ENTRY (DDB_PRT_OVER_V2_PICK_UP_A 380 V>2 Start A Overvoltage stage 2 pick up on phase A PSL
DDB_ENTRY (DDB_PRT_OVER_V2_PICK_UP_B 381 V>2 Start B Overvoltage stage 2 pick up on phase B PSL
DDB_ENTRY (DDB_PRT_OVER_V2_PICK_UP_C 382 V>2 Start C Overvoltage stage 2 pick up on phase C PSL
DDB_ENTRY (DDB_PRT_I2_SUP_PICK_UP_2 383 I2>2 Start Negative overcurrent stage 2 pick-up PSL
DDB_ENTRY (DDB_PRT_I2_SUP_PICK_UP_3 384 I2>3 Start Negative overcurrent stage 3 pick-up PSL
DDB_ENTRY (DDB_PRT_I2_SUP_PICK_UP_4 385 I2>4 Start Negative overcurrent stage 4 pick-up PSL
DDB_ENTRY (DDB_PRT_I2_SUP_TRIP_2 386 I2>2 Trip Negative overcurrent stage 2 trip PSL
DDB_ENTRY (DDB_PRT_I2_SUP_TRIP_3 387 I2>3 Trip Negative overcurrent stage 3 trip PSL
DDB_ENTRY (DDB_PRT_I2_SUP_TRIP_4 388 I2>4 Trip Negative overcurrent stage 4 trip PSL
DDB_ENTRY (DDB_PRT_OVER_V0_1_PICK_UP 389 VN>1 Start Neutral overvoltage stage 1 pick up PSL
DDB_ENTRY (DDB_PRT_OVER_V0_2_PICK_UP 390 VN>2 Start Neutral overvoltage stage 2 pick up PSL
DDB_ENTRY (DDB_PRT_OVER_V0_1_TRIP 391 VN>1 Trip Neutral overvoltage stage 1 trip PSL
DDB_ENTRY (DDB_PRT_OVER_V0_2_TRIP 392 VN>2 Trip Neutral overvoltage stage 2 trip PSL
DDB_ENTRY (DDB_PRT_ANY_INTERNAL_TRIP 393 Any Int. Trip Internal trip PSL
DDB_ENTRY (DDB_PRT_ZQ 394 Zq Fault in zone Q PSL
DDB_ENTRY (DDB_PRT_TZQ 395 Tzq Timer in zone Q elapsed (at 1 = end of timer) PSL
DDB_ENTRY (DDB_UNUSED396 396 -- Unused PSL
DDB_ENTRY (DDB_UNUSED397 397 -- Unused PSL
DDB_ENTRY (DDB_UNUSED398 398 -- Unused PSL
DDB_ENTRY (DDB_UNUSED399 399 -- Unused PSL
DDB_ENTRY (DDB_UNUSED400 400 -- Unused PSL
DDB_ENTRY (DDB_UNUSED401 401 -- Unused PSL
DDB_ENTRY (DDB_UNUSED402 402 -- Unused PSL
DDB_ENTRY (DDB_UNUSED403 403 -- Unused PSL
DDB_ENTRY (DDB_UNUSED404 404 -- Unused PSL
DDB_ENTRY (DDB_UNUSED405 405 -- Unused PSL
DDB_ENTRY (DDB_UNUSED406 406 -- Unused PSL
DDB_ENTRY (DDB_UNUSED407 407 -- Unused PSL
DDB_ENTRY (DDB_UNUSED408 408 -- Unused PSL
DDB_ENTRY (DDB_UNUSED409 409 -- Unused PSL
DDB_ENTRY (DDB_UNUSED410 410 -- Unused PSL
DDB_ENTRY (DDB_UNUSED411 411 -- Unused PSL
DDB_ENTRY (DDB_UNUSED412 412 -- Unused PSL
DDB_ENTRY (DDB_UNUSED413 413 -- Unused PSL
DDB_ENTRY (DDB_UNUSED414 414 -- Unused PSL
DDB_ENTRY (DDB_UNUSED415 415 -- Unused PSL
DDB_ENTRY (DDB_UNUSED416 416 -- Unused PSL
DDB_ENTRY (DDB_UNUSED417 417 -- Unused PSL
DDB_ENTRY (DDB_UNUSED418 418 -- Unused PSL
DDB_ENTRY (DDB_UNUSED419 419 -- Unused PSL
DDB_ENTRY (DDB_UNUSED420 420 -- Unused PSL
DDB_ENTRY (DDB_UNUSED421 421 -- Unused PSL
DDB_ENTRY (DDB_UNUSED422 422 -- Unused PSL
DDB_ENTRY (DDB_UNUSED423 423 -- Unused PSL
DDB_ENTRY (DDB_UNUSED424 424 -- Unused PSL
DDB_ENTRY (DDB_UNUSED425 425 -- Unused PSL
DDB_ENTRY (DDB_UNUSED426 426 -- Unused PSL
DDB_ENTRY (DDB_UNUSED427 427 -- Unused PSL
DDB_ENTRY (DDB_UNUSED428 428 -- Unused PSL
DDB_ENTRY (DDB_UNUSED429 429 -- Unused PSL
DDB_ENTRY (DDB_UNUSED430 430 -- Unused PSL
DDB_ENTRY (DDB_UNUSED431 431 -- Unused PSL
DDB_ENTRY (DDB_UNUSED432 432 -- Unused PSL
DDB_ENTRY (DDB_UNUSED433 433 -- Unused PSL
DDB_ENTRY (DDB_UNUSED434 434 -- Unused PSL
DDB_ENTRY (DDB_UNUSED435 435 -- Unused PSL
DDB_ENTRY (DDB_TIMERIN_1 436 Timer in 1 PSL Input from Auxiliary Timer 1 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_2 437 Timer in 2 PSL Input from Auxiliary Timer 2 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_3 438 Timer in 3 PSL Input from Auxiliary Timer 3 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_4 439 Timer in 4 PSL Input from Auxiliary Timer 4 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_5 440 Timer in 5 PSL Input from Auxiliary Timer 5 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_6 441 Timer in 6 PSL Input from Auxiliary Timer 6 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_7 442 Timer in 7 PSL Input from Auxiliary Timer 7 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_8 443 Timer in 8 PSL Input from Auxiliary Timer 8 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_9 444 Timer in 9 PSL Input from Auxiliary Timer 9 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_10 445 Timer in 10 PSL Input from Auxiliary Timer 10 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_11 446 Timer in 11 PSL Input from Auxiliary Timer 11 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_12 447 Timer in 12 PSL Input from Auxiliary Timer 12 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_13 448 Timer in 13 PSL Input from Auxiliary Timer 13 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_14 449 Timer in 14 PSL Input from Auxiliary Timer 14 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_15 450 Timer in 15 PSL Input from Auxiliary Timer 15 Auxiliary Timer
DDB_ENTRY (DDB_TIMERIN_16 451 Timer in 16 PSL Input from Auxiliary Timer 16 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_1 452 Timer out 1 PSL Ouput from Auxiliary Timer 1 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_2 453 Timer out 2 PSL Ouput from Auxiliary Timer 2 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_3 454 Timer out 3 PSL Ouput from Auxiliary Timer 3 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_4 455 Timer out 4 PSL Ouput from Auxiliary Timer 4 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_5 456 Timer out 5 PSL Ouput from Auxiliary Timer 5 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_6 457 Timer out 6 PSL Ouput from Auxiliary Timer 6 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_7 458 Timer out 7 PSL Ouput from Auxiliary Timer 7 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_8 459 Timer out 8 PSL Ouput from Auxiliary Timer 8 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_9 460 Timer out 9 PSL Ouput from Auxiliary Timer 9 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_10 461 Timer out 10 PSL Ouput from Auxiliary Timer 10 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_11 462 Timer out 11 PSL Ouput from Auxiliary Timer 11 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_12 463 Timer out 12 PSL Ouput from Auxiliary Timer 12 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_13 464 Timer out 13 PSL Ouput from Auxiliary Timer 13 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_14 465 Timer out 14 PSL Ouput from Auxiliary Timer 14 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_15 466 Timer out 15 PSL Ouput from Auxiliary Timer 15 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_16 467 Timer out 16 PSL Ouput from Auxiliary Timer 16 Auxiliary Timer
DDB_ENTRY (DDB_FAULT_RECORD_TRIG 468 Fault_REC_TRIG Trigger for Fault Recorder FRT
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Part C: Internal Digital Signals - DDB Element


DDB Element Name Ordinal English Text Description Source
DDB_ENTRY (DDB_PLAT_BATTERY_FAIL_ALARM 469 Battery Fail Alarm battery fail PSL(OUT)
DDB_ENTRY (DDB_PLAT_FIELD_VOLT_FAIL_ALARM 470 Field Volt Fail Alarm field voltage PSL(OUT)
DDB_ENTRY (DDB_REAR_COMMS_FAIL_ALARM_66 471 Comm2 H/W FAIL Alarm second rear port PSL(OUT)
DDB_ENTRY (DDB_GOOSE_IED_MISSING_ALARM_67 472 GOOSE IED Absent Absence of GOOSE message from dedicated IED PSL(OUT)
DDB_ENTRY (DDB_ECARD_NOT_FITTED_ALARM_68 473 NIC Not Fitted Alarm Ethernet (board not fitted) PSL(OUT)
DDB_ENTRY (DDB_NIC_NOT_RESPONDING_69 474 NIC No Response Alarm no response from Ethernet Board PSL(OUT)
DDB_ENTRY (DDB_NIC_FATAL_ERROR_70 475 NIC Fatal Error Alarm Fatal Error from Ethernet Board PSL(OUT)
DDB_ENTRY (DDB_NIC_SOFTWARE_RELOAD_71 476 NIC Soft. Reload Alarm Ethernet Board (Configuraiton in progress) PSL(OUT)
DDB_ENTRY (DDB_INVALID_NIC_TCP_IP_CONFIG_72 477 Bad TCP/IP Cfg. Alarm bad configuration TCP/IP Address PSL(OUT)
DDB_ENTRY (DDB_INVALID_NIC_OSI_CONFIG_73 478 Bad OSI Config. Alarm Ethernet PSL(OUT)
DDB_ENTRY (DDB_NIC_LINK_FAIL_74 479 NIC Link Fail Alarm Ethernet Link Fail PSL(OUT)
DDB_ENTRY (DDB_SOFTWARE_MISMATCH_ALARM_75 480 NIC SW Mis-Match Alarm Ethernet version not compatible PSL(OUT)
DDB_ENTRY (DDB_NIC_IP_ADDRESS_CONFLICT_76 481 IP Addr Conflict Alam Ethernet IP Adress Conflict PSL(OUT)
DDB_ENTRY (DDB_INTERMICOM_LOOPBACK_ALARM_77 482 IM Loopback InterMiCOM indication that loopback testing is in progress PSL(OUT)
DDB_ENTRY (DDB_INTERMICOM_MESSAGE_ALARM_78 483 IM Message Fail InterMiCOM message failure alarm PSL(OUT)
DDB_ENTRY (DDB_INTERMICOM_DCD_ALARM_79 484 IM Data CD Fail InterMiCOM data channel detect fail PSL(OUT)
DDB_ENTRY (DDB_INTERMICOM_CHANNEL_ALARM_80 485 IM Chanel Fail InterMiCOM message channel fail PSL(OUT)
DDB_ENTRY (DDB_BACKUP_SETTING_ALARM_81 486 Back Up Setting Back up setting alarm PSL(OUT)
DDB_ENTRY (DDB_ALARM_UNUSED_487 487 -- Unused PSL
DDB_ENTRY (DDB_ALARM_UNUSED_488 488 -- Unused PSL
DDB_ENTRY (DDB_ALARM_UNUSED_489 489 -- Unused PSL
DDB_ENTRY (DDB_ALARM_UNUSED_490 490 -- Unused PSL
DDB_ENTRY (DDB_ALARM_UNUSED_491 491 -- Unused PSL
DDB_ENTRY (DDB_ALARM_UNUSED_492 492 -- Unused PSL
DDB_ENTRY (DDB_ALARM_UNUSED_493 493 -- Unused PSL
DDB_ENTRY (DDB_ALARM_UNUSED_494 494 -- Unused PSL
DDB_ENTRY (DDB_ALARM_UNUSED_495 495 -- Unused PSL
DDB_ENTRY (DDB_ALARM_UNUSED_496 496 -- Unused PSL
DDB_ENTRY (DDB_ALARM_UNUSED_497 497 -- Unused PSL
DDB_ENTRY (DDB_ALARM_UNUSED_498 498 -- Unused PSL
DDB_ENTRY (DDB_ALARM_UNUSED_499 499 -- Unused PSL
DDB_ENTRY (DDB_ALARM_UNUSED_500 500 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_501 501 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_502 502 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_503 503 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_504 504 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_505 505 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_506 506 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_507 507 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_508 508 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_509 509 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_510 510 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_511 511 -- Unused PSL
DDB_ENTRY (DDB_GOOSEOUT_1 512 GOOSE OUT 1 Goose output n° 1 - Allows user to control a binary signal which can PSL
be mapped via SCADA protocol output to other devices

DDB_ENTRY (DDB_GOOSEOUT_2 513 GOOSE OUT 2 Goose output n° 2 PSL


DDB_ENTRY (DDB_GOOSEOUT_3 514 GOOSE OUT 3 Goose output n° 3 PSL
DDB_ENTRY (DDB_GOOSEOUT_4 515 GOOSE OUT 4 Goose output n° 4 PSL
DDB_ENTRY (DDB_GOOSEOUT_5 516 GOOSE OUT 5 Goose output n° 5 PSL
DDB_ENTRY (DDB_GOOSEOUT_6 517 GOOSE OUT 6 Goose output n° 6 PSL
DDB_ENTRY (DDB_GOOSEOUT_7 518 GOOSE OUT 7 Goose output n° 7 PSL
DDB_ENTRY (DDB_GOOSEOUT_8 519 GOOSE OUT 8 Goose output n° 8 PSL
DDB_ENTRY (DDB_GOOSEOUT_9 520 GOOSE OUT 9 Goose output n° 9 PSL
DDB_ENTRY (DDB_GOOSEOUT_10 521 GOOSE OUT 10 Goose output n° 10 PSL
DDB_ENTRY (DDB_GOOSEOUT_11 522 GOOSE OUT 11 Goose output n° 11 PSL
DDB_ENTRY (DDB_GOOSEOUT_12 523 GOOSE OUT 12 Goose output n° 12 PSL
DDB_ENTRY (DDB_GOOSEOUT_13 524 GOOSE OUT 13 Goose output n° 13 PSL
DDB_ENTRY (DDB_GOOSEOUT_14 525 GOOSE OUT 14 Goose output n° 14 PSL
DDB_ENTRY (DDB_GOOSEOUT_15 526 GOOSE OUT 15 Goose output n° 15 PSL
DDB_ENTRY (DDB_GOOSEOUT_16 527 GOOSE OUT 16 Goose output n° 16 PSL
DDB_ENTRY (DDB_GOOSEOUT_17 528 GOOSE OUT 17 Goose output n° 17 PSL
DDB_ENTRY (DDB_GOOSEOUT_18 529 GOOSE OUT 18 Goose output n° 18 PSL
DDB_ENTRY (DDB_GOOSEOUT_19 530 GOOSE OUT 19 Goose output n° 19 PSL
DDB_ENTRY (DDB_GOOSEOUT_20 531 GOOSE OUT 20 Goose output n° 20 PSL
DDB_ENTRY (DDB_GOOSEOUT_21 532 GOOSE OUT 21 Goose output n° 21 PSL
DDB_ENTRY (DDB_GOOSEOUT_22 533 GOOSE OUT 22 Goose output n° 22 PSL
DDB_ENTRY (DDB_GOOSEOUT_23 534 GOOSE OUT 23 Goose output n° 23 PSL
DDB_ENTRY (DDB_GOOSEOUT_24 535 GOOSE OUT 24 Goose output n° 24 PSL
DDB_ENTRY (DDB_GOOSEOUT_25 536 GOOSE OUT 25 Goose output n° 25 PSL
DDB_ENTRY (DDB_GOOSEOUT_26 537 GOOSE OUT 26 Goose output n° 26 PSL
DDB_ENTRY (DDB_GOOSEOUT_27 538 GOOSE OUT 27 Goose output n° 27 PSL
DDB_ENTRY (DDB_GOOSEOUT_28 539 GOOSE OUT 28 Goose output n° 28 PSL
DDB_ENTRY (DDB_GOOSEOUT_29 540 GOOSE OUT 29 Goose output n° 29 PSL
DDB_ENTRY (DDB_GOOSEOUT_30 541 GOOSE OUT 30 Goose output n° 30 PSL
DDB_ENTRY (DDB_GOOSEOUT_31 542 GOOSE OUT 31 Goose output n° 31 PSL
DDB_ENTRY (DDB_GOOSEOUT_32 543 GOOSE OUT 32 Goose output n° 32 PSL
DDB_ENTRY (DDB_GOOSEIN_1 544 GOOSE VIP 1 Goose input n° 1 - Allows binary signals that are mapped to virtual SW
inputs to interface into PSL
DDB_ENTRY (DDB_GOOSEIN_2 545 GOOSE VIP 2 Goose input n° 2 SW
DDB_ENTRY (DDB_GOOSEIN_3 546 GOOSE VIP 3 Goose input n° 3 SW
DDB_ENTRY (DDB_GOOSEIN_4 547 GOOSE VIP 4 Goose input n° 4 SW
DDB_ENTRY (DDB_GOOSEIN_5 548 GOOSE VIP 5 Goose input n° 5 SW
DDB_ENTRY (DDB_GOOSEIN_6 549 GOOSE VIP 6 Goose input n° 6 SW
DDB_ENTRY (DDB_GOOSEIN_7 550 GOOSE VIP 7 Goose input n° 7 SW
DDB_ENTRY (DDB_GOOSEIN_8 551 GOOSE VIP 8 Goose input n° 8 SW
DDB_ENTRY (DDB_GOOSEIN_9 552 GOOSE VIP 9 Goose input n° 9 SW
DDB_ENTRY (DDB_GOOSEIN_10 553 GOOSE VIP 10 Goose input n° 10 SW
DDB_ENTRY (DDB_GOOSEIN_11 554 GOOSE VIP 11 Goose input n° 11 SW
DDB_ENTRY (DDB_GOOSEIN_12 555 GOOSE VIP 12 Goose input n° 12 SW
DDB_ENTRY (DDB_GOOSEIN_13 556 GOOSE VIP 13 Goose input n° 13 SW
DDB_ENTRY (DDB_GOOSEIN_14 557 GOOSE VIP 14 Goose input n° 14 SW
DDB_ENTRY (DDB_GOOSEIN_15 558 GOOSE VIP 15 Goose input n° 15 SW
DDB_ENTRY (DDB_GOOSEIN_16 559 GOOSE VIP 16 Goose input n° 16 SW
DDB_ENTRY (DDB_GOOSEIN_17 560 GOOSE VIP 17 Goose input n° 17 SW
DDB_ENTRY (DDB_GOOSEIN_18 561 GOOSE VIP 18 Goose input n° 18 SW
DDB_ENTRY (DDB_GOOSEIN_19 562 GOOSE VIP 19 Goose input n° 19 SW
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Part C: Internal Digital Signals - DDB Element


DDB Element Name Ordinal English Text Description Source
DDB_ENTRY (DDB_GOOSEIN_20 563 GOOSE VIP 20 Goose input n° 20 SW
DDB_ENTRY (DDB_GOOSEIN_21 564 GOOSE VIP 21 Goose input n° 21 SW
DDB_ENTRY (DDB_GOOSEIN_22 565 GOOSE VIP 22 Goose input n° 22 SW
DDB_ENTRY (DDB_GOOSEIN_23 566 GOOSE VIP 23 Goose input n° 23 SW
DDB_ENTRY (DDB_GOOSEIN_24 567 GOOSE VIP 24 Goose input n° 24 SW
DDB_ENTRY (DDB_GOOSEIN_25 568 GOOSE VIP 25 Goose input n° 25 SW
DDB_ENTRY (DDB_GOOSEIN_26 569 GOOSE VIP 26 Goose input n° 26 SW
DDB_ENTRY (DDB_GOOSEIN_27 570 GOOSE VIP 27 Goose input n° 27 SW
DDB_ENTRY (DDB_GOOSEIN_28 571 GOOSE VIP 28 Goose input n° 28 SW
DDB_ENTRY (DDB_GOOSEIN_29 572 GOOSE VIP 29 Goose input n° 29 SW
DDB_ENTRY (DDB_GOOSEIN_30 573 GOOSE VIP 30 Goose input n° 30 SW
DDB_ENTRY (DDB_GOOSEIN_31 574 GOOSE VIP 31 Goose input n° 31 SW
DDB_ENTRY (DDB_GOOSEIN_32 575 GOOSE VIP 32 Goose input n° 32 SW
DDB_ENTRY (DDB_INTERIN_1 576 InterMiCOM in 1 InterMiCOM IM1 Signal Input - is driven by a message from the SW
remote line end
DDB_ENTRY (DDB_INTERIN_2 577 InterMiCOM in 2 InterMiCOM IM2 Signal Input SW
DDB_ENTRY (DDB_INTERIN_3 578 InterMiCOM in 3 InterMiCOM IM3 Signal Input SW
DDB_ENTRY (DDB_INTERIN_4 579 InterMiCOM in 4 InterMiCOM IM4 Signal Input SW
DDB_ENTRY (DDB_INTERIN_5 580 InterMiCOM in 5 InterMiCOM IM5 Signal Input SW
DDB_ENTRY (DDB_INTERIN_6 581 InterMiCOM in 6 InterMiCOM IM6 Signal Input SW
DDB_ENTRY (DDB_INTERIN_7 582 InterMiCOM in 7 InterMiCOM IM7 Signal Input SW
DDB_ENTRY (DDB_INTERIN_8 583 InterMiCOM in 8 InterMiCOM IM8 Signal Input SW
DDB_ENTRY (DDB_INTEROUT_1 584 InterMiCOM out 1 InterMiCOM IM1 Signal output - mapping what will be sent to the PSL
remote line end
DDB_ENTRY (DDB_INTEROUT_2 585 InterMiCOM out 2 InterMiCOM IM2 Signal output PSL
DDB_ENTRY (DDB_INTEROUT_3 586 InterMiCOM out 3 InterMiCOM IM3 Signal output PSL
DDB_ENTRY (DDB_INTEROUT_4 587 InterMiCOM out 4 InterMiCOM IM4 Signal output PSL
DDB_ENTRY (DDB_INTEROUT_5 588 InterMiCOM out 5 InterMiCOM IM5 Signal output PSL
DDB_ENTRY (DDB_INTEROUT_6 589 InterMiCOM out 6 InterMiCOM IM6 Signal output PSL
DDB_ENTRY (DDB_INTEROUT_7 590 InterMiCOM out 7 InterMiCOM IM7 Signal output PSL
DDB_ENTRY (DDB_INTEROUT_8 591 InterMiCOM out 8 InterMiCOM IM8 Signal output PSL
DDB_ENTRY (DDB_UNUSED_592 592 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_593 593 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_594 594 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_595 595 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_596 596 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_597 597 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_598 598 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_599 599 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_600 600 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_601 601 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_602 602 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_603 603 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_604 604 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_605 605 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_606 606 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_607 607 -- Unused PSL
DDB_ENTRY (DDB_CTRL_IP_1 608 Control input 1 Control Input 1 - for SCADA and menu commands into PSL SW
DDB_ENTRY (DDB_CTRL_IP_2 609 Control input 2 Control input 2 SW
DDB_ENTRY (DDB_CTRL_IP_3 610 Control input 3 Control input 3 SW
DDB_ENTRY (DDB_CTRL_IP_4 611 Control input 4 Control input 4 SW
DDB_ENTRY (DDB_CTRL_IP_5 612 Control input 5 Control input 5 SW
DDB_ENTRY (DDB_CTRL_IP_6 613 Control input 6 Control input 6 SW
DDB_ENTRY (DDB_CTRL_IP_7 614 Control input 7 Control input 7 SW
DDB_ENTRY (DDB_CTRL_IP_8 615 Control input 8 Control input 8 SW
DDB_ENTRY (DDB_CTRL_IP_9 616 Control input 9 Control input 9 SW
DDB_ENTRY (DDB_CTRL_IP_10 617 Control input 10 Control input 10 SW
DDB_ENTRY (DDB_CTRL_IP_11 618 Control input 11 Control input 11 SW
DDB_ENTRY (DDB_CTRL_IP_12 619 Control input 12 Control input 12 SW
DDB_ENTRY (DDB_CTRL_IP_13 620 Control input 13 Control input 13 SW
DDB_ENTRY (DDB_CTRL_IP_14 621 Control input 14 Control input 14 SW
DDB_ENTRY (DDB_CTRL_IP_15 622 Control input 15 Control input 15 SW
DDB_ENTRY (DDB_CTRL_IP_16 623 Control input 16 Control input 16 SW
DDB_ENTRY (DDB_CTRL_IP_17 624 Control input 17 Control input 17 SW
DDB_ENTRY (DDB_CTRL_IP_18 625 Control input 18 Control input 18 SW
DDB_ENTRY (DDB_CTRL_IP_19 626 Control input 19 Control input 19 SW
DDB_ENTRY (DDB_CTRL_IP_20 627 Control input 20 Control input 20 SW
DDB_ENTRY (DDB_CTRL_IP_21 628 Control input 21 Control input 21 SW
DDB_ENTRY (DDB_CTRL_IP_22 629 Control input 22 Control input 22 SW
DDB_ENTRY (DDB_CTRL_IP_23 630 Control input 23 Control input 23 SW
DDB_ENTRY (DDB_CTRL_IP_24 631 Control input 24 Control input 24 SW
DDB_ENTRY (DDB_CTRL_IP_25 632 Control input 25 Control input 25 SW
DDB_ENTRY (DDB_CTRL_IP_26 633 Control input 26 Control input 26 SW
DDB_ENTRY (DDB_CTRL_IP_27 634 Control input 27 Control input 27 SW
DDB_ENTRY (DDB_CTRL_IP_28 635 Control input 28 Control input 28 SW
DDB_ENTRY (DDB_CTRL_IP_29 636 Control input 29 Control input 29 SW
DDB_ENTRY (DDB_CTRL_IP_30 637 Control input 30 Control input 30 SW
DDB_ENTRY (DDB_CTRL_IP_31 638 Control input 31 Control input 31 SW
DDB_ENTRY (DDB_CTRL_IP_32 639 Control input 32 Control input 32 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_1_RED 640 LED 1 Red Programmable Red LED n° 1 is energized SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_1_GRN 641 LED 1 Grn Programmable Green LED n° 1 is energized SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_2_RED 642 LED 2 Red Programmable Red LED n° 2 is energized SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_2_GRN 643 LED 2 Grn Programmable Green LED n° 2 is energized SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_3_RED 644 LED 3 Red Programmable Red LED n° 3 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_3_GRN 645 LED 3 Grn Programmable Green LED n° 3 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_4_RED 646 LED 4 Red Programmable Red LED n° 4 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_4_GRN 647 LED 4 Grn Programmable Green LED n° 4 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_5_RED 648 LED 5 Red Programmable Red LED n° 5 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_5_GRN 649 LED 5 Grn Programmable Green LED n° 5 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_6_RED 650 LED 6 Red Programmable Red LED n° 6 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_6_GRN 651 LED 6 Grn Programmable Green LED n° 6 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_7_RED 652 LED 7 Red Programmable Red LED n° 7 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_7_GRN 653 LED 7 Grn Programmable Green LED n° 7 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_8_RED 654 LED 8 Red Programmable Red LED n° 8 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_8_GRN 655 LED 8 Grn Programmable Green LED n° 8 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_9_RED 656 LED 9 Red Programmable Red LED n° 9 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_9_GRN 657 LED 9 Grn Programmable Green LED n° 9 SW
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Part C: Internal Digital Signals - DDB Element


DDB Element Name Ordinal English Text Description Source
DDB_ENTRY (DDB_OUTPUT_TRI_LED_10_RED 658 LED 10 Red Programmable Red LED n° 10 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_10_GRN 659 LED 10 Grn Programmable Green LED n° 10 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_11_RED 660 LED 11 Red Programmable Red LED n° 11 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_11_GRN 661 LED 11 Grn Programmable Green LED n° 11 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_12_RED 662 LED 12 Red Programmable Red LED n° 12 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_12_GRN 663 LED 12 Grn Programmable Green LED n° 12 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_13_RED 664 LED 13 Red Programmable Red LED n° 13 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_13_GRN 665 LED 13 Grn Programmable Green LED n° 13 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_14_RED 666 LED 14 Red Programmable Red LED n° 14 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_14_GRN 667 LED 14 Grn Programmable Green LED n° 14 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_15_RED 668 LED 15 Red Programmable Red LED n° 15 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_15_GRN 669 LED 15 Grn Programmable Green LED n° 15 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_16_RED 670 LED 16 Red Programmable Red LED n° 16 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_16_GRN 671 LED 16 Grn Programmable Green LED n° 16 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_17_RED 672 LED 17 Red Programmable Red LED n° 17 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_17_GRN 673 LED 17 Grn Programmable Green LED n° 17 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_18_RED 674 LED 18 Red Programmable Red LED n° 18 SW
DDB_ENTRY (DDB_OUTPUT_TRI_LED_18_GRN 675 LED 18 Grn Programmable Green LED n° 18 SW
DDB_ENTRY (DDB_FN_KEY_1 676 Function Key 1 Programmable Function key n° 1. In ‘Normal’ mode it is high on key SW
press and in ‘Toggle’ mode remains high/low on single key press

DDB_ENTRY (DDB_FN_KEY_2 677 Function Key 2 Function key n° 2 SW


DDB_ENTRY (DDB_FN_KEY_3 678 Function Key 3 Function key n° 3 SW
DDB_ENTRY (DDB_FN_KEY_4 679 Function Key 4 Function key n° 4 SW
DDB_ENTRY (DDB_FN_KEY_5 680 Function Key 5 Function key n° 5 SW
DDB_ENTRY (DDB_FN_KEY_6 681 Function Key 6 Function key n° 6 SW
DDB_ENTRY (DDB_FN_KEY_7 682 Function Key 7 Function key n° 7 SW
DDB_ENTRY (DDB_FN_KEY_8 683 Function Key 8 Function key n° 8 SW
DDB_ENTRY (DDB_FN_KEY_9 684 Function Key 9 Function key n° 9 SW
DDB_ENTRY (DDB_FN_KEY_10 685 Function Key 10 Function key n° 10 SW
DDB_ENTRY (DDB_UNUSED_686 686 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_687 687 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_688 688 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_689 689 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_690 690 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_691 691 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_692 692 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_693 693 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_694 694 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_695 695 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_696 696 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_697 697 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_698 698 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_699 699 -- Unused PSL
DDB_ENTRY (DDB_OUTPUT_CON_1 700 Output cond. 1 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_2 701 Output cond. 2 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_3 702 Output cond. 3 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_4 703 Output cond. 4 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_5 704 Output cond. 5 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_6 705 Output cond. 6 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_7 706 Output cond. 7 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_8 707 Output cond. 8 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_9 708 Output cond. 9 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_10 709 Output cond. 10 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_11 710 Output cond. 11 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_12 711 Output cond. 12 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_13 712 Output cond. 13 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_14 713 Output cond. 14 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_15 714 Output cond. 15 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_16 715 Output cond. 16 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_17 716 Output cond. 17 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_18 717 Output cond. 18 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_19 718 Output cond. 19 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_20 719 Output cond. 20 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_21 720 Output cond. 21 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_22 721 Output cond. 22 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_23 722 Output cond. 23 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_24 723 Output cond. 24 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_25 724 Output cond. 25 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_26 725 Output cond. 26 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_27 726 Output cond. 27 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_28 727 Output cond. 28 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_29 728 Output cond. 29 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_30 729 Output cond. 30 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_31 730 Output cond. 31 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_32 731 Output cond. 32 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_33 732 Output cond. 33 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_34 733 Output cond. 34 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_35 734 Output cond. 35 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_36 735 Output cond. 36 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_37 736 Output cond. 37 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_38 737 Output cond. 38 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_39 738 Output cond. 39 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_40 739 Output cond. 40 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_41 740 Output cond. 41 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_42 741 Output cond. 42 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_43 742 Output cond. 43 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_44 743 Output cond. 44 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_45 744 Output cond. 45 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_46 745 Output cond. 46 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_47 746 Output cond. 47 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_48 747 Output cond. 48 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_49 748 Output cond. 49 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_50 749 Output cond. 50 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_51 750 Output cond. 51 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_52 751 Output cond. 52 Input to Relay Output Conditioner PSL
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Part C: Internal Digital Signals - DDB Element


DDB Element Name Ordinal English Text Description Source
DDB_ENTRY (DDB_OUTPUT_CON_53 752 Output cond. 53 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_54 753 Output cond. 54 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_55 754 Output cond. 55 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_56 755 Output cond. 56 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_57 756 Output cond. 57 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_58 757 Output cond. 58 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_59 758 Output cond. 59 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_60 759 Output cond. 60 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_61 760 Output cond. 61 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_62 761 Output cond. 62 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_63 762 Output cond. 63 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_OUTPUT_CON_64 763 Output cond. 64 Input to Relay Output Conditioner PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_1 764 LED 1 Red Condit Assignment of signal to drive output LED 1 red - To drive LED1 PSL
Yellow DDB 764 and DDB 765 must be driven at the same time

DDB_ENTRY (DDB_TRI_LED_GRN_CON_1 765 LED 1 Grn Condit Assignment of signal to drive output LED 1 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_2 766 LED 2 Red Condit Assignment of signal to drive output LED 2 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_2 767 LED 2 Grn Condit Assignment of signal to drive output LED 2 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_3 768 LED 3 Red Condit Assignment of signal to drive output LED 3 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_3 769 LED 3 Grn Condit Assignment of signal to drive output LED 3 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_4 770 LED 4 Red Condit Assignment of signal to drive output LED 4 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_4 771 LED 4 Grn Condit Assignment of signal to drive output LED 4 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_5 772 LED 5 Red Condit Assignment of signal to drive output LED 5 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_5 773 LED 5 Grn Condit Assignment of signal to drive output LED 5 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_6 774 LED 6 Red Condit Assignment of signal to drive output LED 6 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_6 775 LED 6 Grn Condit Assignment of signal to drive output LED 6 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_7 776 LED 7 Red Condit Assignment of signal to drive output LED 7 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_7 777 LED 7 Grn Condit Assignment of signal to drive output LED 7 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_8 778 LED 8 Red Condit Assignment of signal to drive output LED 8 red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_8 779 LED 8 Grn Condit Assignment of signal to drive output LED 8 green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_9 780 FnKey LED 1 Red Assignment of signal to drive output Function Key LED 1 Red - This PSL
LED is associated with Function Key 1
DDB_ENTRY (DDB_TRI_LED_GRN_CON_9 781 FnKey LED 1 Grn Assignment of signal to drive output Function Key LED 1 Green - PSL
This LED is associated with Function Key 1 - To drive function key
LED, yellow DDB 780 and DDB 782 must be active at the same time

DDB_ENTRY (DDB_TRI_LED_RED_CON_10 782 FnKey LED 2 Red Assignment of signal to drive output Function Key LED 2 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_10 783 FnKey LED 2 Grn Assignment of signal to drive output Function Key LED 2 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_11 784 FnKey LED 3 Red Assignment of signal to drive output Function Key LED 3 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_11 785 FnKey LED 3 Grn Assignment of signal to drive output Function Key LED 3 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_12 786 FnKey LED 4 Red Assignment of signal to drive output Function Key LED 4 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_12 787 FnKey LED 4 Grn Assignment of signal to drive output Function Key LED 4 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_13 788 FnKey LED 5 Red Assignment of signal to drive output Function Key LED 5 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_13 789 FnKey LED 5 Grn Assignment of signal to drive output Function Key LED 5 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_14 790 FnKey LED 6 Red Assignment of signal to drive output Function Key LED 6 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_14 791 FnKey LED 6 Grn Assignment of signal to drive output Function Key LED 6 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_15 792 FnKey LED 7 Red Assignment of signal to drive output Function Key LED 7 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_15 793 FnKey LED 7 Grn Assignment of signal to drive output Function Key LED 7 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_16 794 FnKey LED 8 Red Assignment of signal to drive output Function Key LED 8 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_16 795 FnKey LED 8 Grn Assignment of signal to drive output Function Key LED 8 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_17 796 FnKey LED 9 Red Assignment of signal to drive output Function Key LED 9 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_17 797 FnKey LED 9 Grn Assignment of signal to drive output Function Key LED 9 Green PSL
DDB_ENTRY (DDB_TRI_LED_RED_CON_18 798 FnKey LED 10 Red Assignment of signal to drive output Function Key LED 10 Red PSL
DDB_ENTRY (DDB_TRI_LED_GRN_CON_18 799 FnKey LED 10 Grn Assignment of signal to drive output Function Key LED 10 Green PSL

DDB_ENTRY (DDB_UNUSED_800 800 -- Unused PSL


DDB_ENTRY (DDB_UNUSED_801 801 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_802 802 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_803 803 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_804 804 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_805 805 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_806 806 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_807 807 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_808 808 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_809 809 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_810 810 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_811 811 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_812 812 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_813 813 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_814 814 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_815 815 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_816 816 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_817 817 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_818 818 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_819 819 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_820 820 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_821 821 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_822 822 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_823 823 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_824 824 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_825 825 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_826 826 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_827 827 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_828 828 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_829 829 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_830 830 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_831 831 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_832 832 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_833 833 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_834 834 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_835 835 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_836 836 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_837 837 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_838 838 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_839 839 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_840 840 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_841 841 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_842 842 -- Unused PSL
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Part C: Internal Digital Signals - DDB Element


DDB Element Name Ordinal English Text Description Source
DDB_ENTRY (DDB_UNUSED_843 843 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_844 844 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_845 845 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_846 846 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_847 847 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_848 848 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_849 849 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_850 850 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_851 851 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_852 852 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_853 853 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_854 854 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_855 855 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_856 856 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_857 857 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_858 858 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_859 859 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_860 860 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_861 861 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_862 862 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_863 863 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_864 864 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_865 865 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_866 866 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_867 867 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_868 868 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_869 869 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_870 870 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_871 871 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_872 872 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_873 873 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_874 874 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_875 875 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_876 876 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_877 877 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_878 878 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_879 879 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_880 880 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_881 881 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_882 882 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_883 883 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_884 884 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_885 885 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_886 886 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_887 887 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_888 888 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_889 889 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_890 890 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_891 891 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_892 892 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_893 893 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_894 894 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_895 895 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_896 896 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_897 897 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_898 898 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_899 899 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_900 900 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_901 901 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_902 902 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_903 903 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_904 904 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_905 905 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_906 906 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_907 907 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_908 908 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_909 909 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_910 910 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_911 911 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_912 912 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_913 913 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_914 914 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_915 915 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_916 916 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_917 917 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_918 918 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_919 919 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_920 920 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_921 921 -- Unused PSL
DDB_ENTRY (DDB_UNUSED_922 922 -- Unused PSL
DDB_ENTRY (DDB_PSLINT_1 923 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_2 924 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_3 925 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_4 926 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_5 927 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_6 928 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_7 929 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_8 930 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_9 931 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_10 932 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_11 933 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_12 934 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_13 935 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_14 936 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_15 937 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_16 938 Can be created automatically by the PSL PSL
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 78

Part C: Internal Digital Signals - DDB Element


DDB Element Name Ordinal English Text Description Source
DDB_ENTRY (DDB_PSLINT_17 939 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_18 940 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_19 941 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_20 942 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_21 943 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_22 944 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_23 945 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_24 946 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_25 947 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_26 948 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_27 949 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_28 950 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_29 951 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_30 952 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_31 953 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_32 954 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_33 955 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_34 956 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_35 957 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_36 958 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_37 959 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_38 960 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_39 961 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_40 962 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_41 963 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_42 964 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_43 965 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_44 966 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_45 967 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_46 968 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_47 969 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_48 970 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_49 971 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_50 972 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_51 973 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_52 974 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_53 975 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_54 976 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_55 977 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_56 978 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_57 979 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_58 980 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_59 981 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_60 982 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_61 983 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_62 984 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_63 985 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_64 986 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_65 987 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_66 988 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_67 989 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_68 990 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_69 991 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_70 992 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_71 993 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_72 994 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_73 995 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_74 996 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_75 997 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_76 998 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_77 999 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_78 1000 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_79 1001 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_80 1002 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_81 1003 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_82 1004 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_83 1005 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_84 1006 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_85 1007 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_86 1008 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_87 1009 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_88 1010 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_89 1011 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_90 1012 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_91 1013 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_92 1014 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_93 1015 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_94 1016 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_95 1017 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_96 1018 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_97 1019 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_98 1020 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_99 1021 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_100 1022 Can be created automatically by the PSL PSL
DDB_ENTRY (DDB_PSLINT_101 1023 Can be created automatically by the PSL PSL
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 79

Part D: Menu Database for MODBUS


Modbus Address Col Row Group Cell Min Max Step
Start End Modbus P441AG P441BG P442AG P442BG P444AG P444BG P444AH P444BH type
Read and write access of Output Relays
1 Contact -1. FF A0 GB 14 14 21 21 32 32 46 46
2 Contact -2. FF A1 GB 13 13 20 20 31 31 45 45
3 Contact -3. FF A2 GB 12 12 19 19 30 30 44 44
4 Contact - 4. FF A3 GB 11 11 18 18 29 29 43 43
5 Contact - 5. FF A4 GB 10 10 17 17 28 28 42 42
6 Contact - 6. FF A5 GB 9 9 16 16 27 27 41 41
7 Contact - 7. FF A6 GB 8 8 15 15 26 26 40 40
8 Contact -8. FF A7 GB 7 7 14 14 25 25 39 39
9 Contact - 9. FF A8 GB 6 6 13 13 24 24 38 38
10 Contact -10. FF A9 GB 5 5 12 12 23 23 37 37
11 Contact -11. FF AA GB 4 4 11 11 22 22 36 36
12 Contact -12. FF AB GB 3 3 10 10 21 21 35 35
13 Contact -13. FF AC GB 2 2 9 9 20 20 34 34
14 Contact -14. FF AD GB 1 1 8 8 19 19 33 33
15 Contact -15. FF AE GB 7 7 18 18 32 32
16 Contact -16. FF AF GB 6 6 17 17 31 31
17 Contact -17. FF B0 GB 5 5 16 16 30 30
18 Contact -18. FF B1 GB 4 4 15 15 29 29
19 Contact -19. FF B2 GB 3 3 14 14 28 28
20 Contact -20. FF B3 GB 2 2 13 13 27 27
21 Contact -21. FF B4 GB 1 1 12 12 26 26
22 Contact -22. FF B5 GB 11 11 25 25
23 Contact -23. FF B6 GB 10 10 24 24
24 Contact -24. FF B7 GB 9 9 23 23
25 Contact - 25. FF B8 GB 8 8 22 22
26 Contact - 26. FF B9 GB 7 7 21 21
27 Contact - 27. FF BA GB 6 6 20 20
28 Contact - 28. FF BB GB 5 5 19 19
29 Contact - 29. FF BC GB 4 4 18 18
30 Contact -30. FF BD GB 3 3 17 17
31 Contact -31. FF BE GB 2 2 16 16
32 Contact -32. FF BF GB 1 1 15 15
33 Contact -33. FF C0 GB 14 14
34 Contact -34. FF C1 GB 13 13
35 Contact -35. FF C2 GB 12 12
36 Contact -36. FF C3 GB 11 11
37 Contact -37. FF C4 GB 10 10
38 Contact -38. FF C5 GB 9 9
39 Contact -39. FF C6 GB 8 8
40 Contact -40. FF C7 GB 7 7
41 Contact -41. FF C8 GB 6 6
42 Contact -42. FF C9 GB 5 5
43 Contact -43. FF CA GB 4 4
44 Contact -44. FF CB GB 3 3
45 Contact -45. FF CC GB 2 2
46 Contact -46. FF CD GB 1 1
Read only access of the Opto-Isolators
10001 Input -1 FF D0 GB 8 8 16 16 24 24 24 24
10002 Input -2 FF D1 GB 7 7 15 15 23 23 23 23
10003 Input -3 FF D2 GB 6 6 14 14 22 22 22 22
10004 Input -4 FF D3 GB 5 5 13 13 21 21 21 21
10005 Input -5 FF D4 GB 4 4 12 12 20 20 20 20
10006 Input -6 FF D5 GB 3 3 11 11 19 19 19 19
10007 Input -7 FF D6 GB 2 2 10 10 18 18 18 18
10008 Input -8 FF D7 GB 1 1 9 9 17 17 17 17
10009 Input -9 FF D8 GB 8 8 16 16 16 16
10010 Input -10 FF D9 GB 7 7 15 15 15 15
10011 Input -11 FF DA GB 6 6 14 14 14 14
10012 Input -12 FF DB GB 5 5 13 13 13 13
10013 Input -13 FF DC GB 4 4 12 12 12 12
10014 Input -14 FF DD GB 3 3 11 11 11 11
10015 Input -15 FF DE GB 2 2 10 10 10 10
10016 Input -16 FF DF GB 1 1 9 9 9 9
10017 Input -17 FF E0 GB 8 8 8 8
10018 Input -18 FF E1 GB 7 7 7 7
10019 Input -19 FF E2 GB 6 6 6 6
10020 Input -20 FF E3 GB 5 5 5 5
10021 Input -21 FF E4 GB 4 4 4 4
10022 Input -22 FF E5 GB 3 3 3 3
10023 Input -23 FF E6 GB 2 2 2 2
10024 Input -24 FF E7 GB 1 1 1 1
Read only access of Data
30001 30001 Modbus Status Register FF 01 G26 1 1 1 1 1 1 1 1 Data
30002 30002 Plant Status 0 0C G4 1 1 1 1 1 1 1 1 Data
30004 30004 Control Status 0 0D G5 1 1 1 1 1 1 1 1 Data
30006 30006 Active Group 0 0E G1 1 1 1 1 1 1 1 1 Data
30007 30008 Relay O/P Status 1 0 40 G9 2 2 2 2 2 2 2 2 Data
30009 30010 Relay O/P Status 2 0 41 G9 2 2 Data
30011 30012 Alarm Status 1 0 50 G96 2 2 2 2 2 2 2 2 Data
30013 30014 Alarm Status 2 0 51 G96 2 2 2 2 2 2 2 2 Data
30015 30016 Alarm Status 3 0 52 G96 2 2 2 2 2 2 2 2 Data
30017 30017 Access Level 0 D0 G1 1 1 1 1 1 1 1 1 Data
30020 30035 Model Number 0 6 G3 16 16 16 16 16 16 16 16 Data
30036 30037 Maint Type 1 F2 G27 2 2 2 2 2 2 2 2 Data
30038 30039 Maint Data 1 F3 G27 2 2 2 2 2 2 2 2 Data
30044 30051 Serial Number 0 8 G3 8 8 8 8 8 8 8 8 Data
30052 30059 Software Ref. 1 0 11 G3 8 8 8 8 8 8 8 8 Data
30090 30090 IRIG-B Status 8 5 G17 1 1 1 1 1 1 Data
30091 30091 Battery Status 8 6 G59 1 1 1 1 1 1 1 1 Data
30100 30100 Number of Event records stored FF 02 G1 1 1 1 1 1 1 1 1 Data
30101 30101 Number of Fault records stored FF 03 G1 1 1 1 1 1 1 1 1 Data
30102 30102 Number of Maint records stored FF 04 G1 1 1 1 1 1 1 1 1 Data
30103 30106 Time & Date 1 3 G12 4 4 4 4 4 4 4 4 Data
30107 30107 Event Type FF 8C G13 1 1 1 1 1 1 1 1 Data
30108 30109 Event Value 1 5 G27 2 2 2 2 2 2 2 2 Data
30110 30110 Modbus Adress FF 8D G1 1 1 1 1 1 1 1 1 Data
30111 30111 Event Index FF 8E G1 1 1 1 1 1 1 1 1 Data
30112 30112 Additionnal data present FF 05 G1 1 1 1 1 1 1 1 1 Data
30113 30113 Active Group 1 7 G1 1 1 1 1 1 1 1 1 Data
30114 30114 Faulted Phase 1 8 G16 1 1 1 1 1 1 1 1 Data
30115 30116 Start Elements 1 9 G84 2 2 2 2 2 2 2 2 Data
30117 30118 Trip Elements 1 0A G85 2 2 2 2 2 2 2 2 Data
30119 30119 Validities 1 0B G130 1 1 1 1 1 1 1 1 Data
30120 30123 Time Stamp 1 0C G12 4 4 4 4 4 4 4 4 Data
30124 30125 Fault Alarms 1 0D G87 2 2 2 2 2 2 2 2 Data
30126 30126 System Frequency 1 0E G25 1 1 1 1 1 1 1 1 Data
30127 30128 Fault Duration 1 0F G24 2 2 2 2 2 2 2 2 Data
30129 30130 Relay Trip Time 1 10 G24 2 2 2 2 2 2 2 2 Data
30131 30132 Fault Location 1 11 G24 2 2 2 2 2 2 2 2 Data
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 80

Modbus Address Col Row Group Cell Min Max Step


Start End Modbus P441AG P441BG P442AG P442BG P444AG P444BG P444AH P444BH type
30133 30134 Fault Location 1 12 G24 2 2 2 2 2 2 2 2 Data
30135 30136 Fault Location 1 13 G24 2 2 2 2 2 2 2 2 Data
30137 30138 Fault Location 1 14 G24 2 2 2 2 2 2 2 2 Data
30139 30140 IA 1 15 G24 2 2 2 2 2 2 2 2 Data
30141 30142 IB 1 16 G24 2 2 2 2 2 2 2 2 Data
30143 30144 IC 1 17 G24 2 2 2 2 2 2 2 2 Data
30145 30146 VAN 1 1B G24 2 2 2 2 2 2 2 2 Data
30147 30148 VBN 1 1C G24 2 2 2 2 2 2 2 2 Data
30149 30150 VCN 1 1D G24 2 2 2 2 2 2 2 2 Data
30151 30152 Fault Resistance 1 1E G24 2 2 2 2 2 2 2 2 Data
30153 30153 Fault in Zone 1 1F G110 1 1 1 1 1 1 1 1 Data
30154 30155 Trip Elements 2 1 20 G86 2 2 2 2 2 2 2 2 Data
30200 30201 IA Magnitude 2 1 G24 2 2 2 2 2 2 2 2 Data
30202 30202 IA Phase Angle 2 2 G30 1 1 1 1 1 1 1 1 Data
30203 30204 IB Magnitude 2 3 G24 2 2 2 2 2 2 2 2 Data
30205 30205 IB Phase Angle 2 4 G30 1 1 1 1 1 1 1 1 Data
30206 30207 IC Magnitude 2 5 G24 2 2 2 2 2 2 2 2 Data
30208 30208 IC Phase Angle 2 6 G30 1 1 1 1 1 1 1 1 Data
30212 30213 IN Derived Mag 2 9 G24 2 2 2 2 2 2 2 2 Data
30214 30214 IN Derived Angle 2 0A G30 1 1 1 1 1 1 1 1 Data
30218 30219 I1 Magnitude 2 0D G24 2 2 2 2 2 2 2 2 Data
30220 30221 I2 Magnitude 2 0E G24 2 2 2 2 2 2 2 2 Data
30222 30223 I0 Magnitude 2 0F G24 2 2 2 2 2 2 2 2 Data
30230 30231 VAB Magnitude 2 14 G24 2 2 2 2 2 2 2 2 Data
30232 30232 VAB Phase Angle 2 15 G30 1 1 1 1 1 1 1 1 Data
30233 30234 VBC Magnitude 2 16 G24 2 2 2 2 2 2 2 2 Data
30235 30235 VBC Phase Angle 2 17 G30 1 1 1 1 1 1 1 1 Data
30236 30237 VCA Magnitude 2 18 G24 2 2 2 2 2 2 2 2 Data
30238 30238 VCA Phase Angle 2 19 G30 1 1 1 1 1 1 1 1 Data
30239 30240 VAN Magnitude 2 1A G24 2 2 2 2 2 2 2 2 Data
30241 30241 VAN Phase Angle 2 1B G30 1 1 1 1 1 1 1 1 Data
30242 30243 VBN Magnitude 2 1C G24 2 2 2 2 2 2 2 2 Data
30244 30244 VBN Phase Angle 2 1D G30 1 1 1 1 1 1 1 1 Data
30245 30246 VCN Magnitude 2 1E G24 2 2 2 2 2 2 2 2 Data
30247 30247 VCN Phase Angle 2 1F G30 1 1 1 1 1 1 1 1 Data
30248 30249 VN Derived Mag 2 22 G24 2 2 2 2 2 2 2 2 Data
30250 30250 VN Derived Ang 2 23 G30 1 1 1 1 1 1 1 1 Data
30251 30252 V1 Magnitude 2 24 G24 2 2 2 2 2 2 2 2 Data
30253 30254 V2 Magnitude 2 25 G24 2 2 2 2 2 2 2 2 Data
30255 30256 V0 Magnitude 2 26 G24 2 2 2 2 2 2 2 2 Data
30263 30263 Frequency 2 2A G30 1 1 1 1 1 1 1 1 Data
30264 30265 C/S Voltage Mag 2 2B G24 2 2 2 2 2 2 2 2 Data
30266 30266 C/S Voltage Ang 2 2C G30 1 1 1 1 1 1 1 1 Data
30267 30268 IM Magnitude 2 2F G24 2 2 2 2 2 2 2 2 Data
30269 30269 IM Angle 2 30 G30 1 1 1 1 1 1 1 1 Data
30270 30270 Slip Frequency 2 31 G30 1 1 1 1 1 1 1 1 Data
30271 30272 C/S Voltage Mag 2 2B G24 2 2 2 2 2 2 2 2 Data
30273 30273 C/S Voltage Ang 2 2C G30 1 1 1 1 1 1 1 1 Data
30300 30302 A Phase Watts 3 1 G29 3 3 3 3 3 3 3 3 Data
30303 30305 B Phase Watts 3 2 G29 3 3 3 3 3 3 3 3 Data
30306 30308 C Phase Watts 3 3 G29 3 3 3 3 3 3 3 3 Data
30309 30311 A Phase VArs 3 4 G29 3 3 3 3 3 3 3 3 Data
30312 30314 B Phase VArs 3 5 G29 3 3 3 3 3 3 3 3 Data
30315 30317 C Phase VArs 3 6 G29 3 3 3 3 3 3 3 3 Data
30318 30320 A Phase VA 3 7 G29 3 3 3 3 3 3 3 3 Data
30321 30323 B Phase VA 3 8 G29 3 3 3 3 3 3 3 3 Data
30324 30326 C Phase VA 3 9 G29 3 3 3 3 3 3 3 3 Data
30327 30329 3 Phase Watts 3 0A G29 3 3 3 3 3 3 3 3 Data
30330 30332 3 Phase VArs 3 0B G29 3 3 3 3 3 3 3 3 Data
30333 30335 3 Phase VA 3 0C G29 3 3 3 3 3 3 3 3 Data
30336 30338 Zero Seq Power 3 0D G29 3 3 3 3 3 3 3 3 Data
30339 30339 3Ph Power Factor 3 0E G30 1 1 1 1 1 1 1 1 Data
30340 30340 APh Power Factor 3 0F G30 1 1 1 1 1 1 1 1 Data
30341 30341 BPh Power Factor 3 10 G30 1 1 1 1 1 1 1 1 Data
30342 30342 CPh Power Factor 3 11 G30 1 1 1 1 1 1 1 1 Data
30343 30345 3Ph W Fix Demand 3 16 G29 3 3 3 3 3 3 3 3 Data
30346 30348 3Ph VArs Fix Dem 3 17 G29 3 3 3 3 3 3 3 3 Data
30349 30351 3Ph W Peak Demand 3 20 G29 3 3 3 3 3 3 3 3 Data
30352 30354 3Ph VArs Peak Demand 3 21 G29 3 3 3 3 3 3 3 3 Data
30360 30361 A Phase Watts FF EF G125 2 2 2 2 2 2 2 2 Data
30362 30363 B Phase Watts FF F0 G125 2 2 2 2 2 2 2 2 Data
30364 30365 C Phase Watts FF F1 G125 2 2 2 2 2 2 2 2 Data
30366 30367 A Phase VArs FF F2 G125 2 2 2 2 2 2 2 2 Data
30368 30369 B Phase VArs FF F3 G125 2 2 2 2 2 2 2 2 Data
30370 30371 C Phase VArs FF F4 G125 2 2 2 2 2 2 2 2 Data
30372 30373 A Phase VA FF F5 G125 2 2 2 2 2 2 2 2 Data
30374 30375 B Phase VA FF F6 G125 2 2 2 2 2 2 2 2 Data
30376 30377 C Phase VA FF F7 G125 2 2 2 2 2 2 2 2 Data
30378 30379 3 Phase Watts FF F8 G125 2 2 2 2 2 2 2 2 Data
30380 30381 3 Phase VArs FF F9 G125 2 2 2 2 2 2 2 2 Data
30382 30383 3 Phase VA FF FA G125 2 2 2 2 2 2 2 2 Data
30384 30385 Zero Seq Power FF FB G125 2 2 2 2 2 2 2 2 Data
30386 30387 3Ph W Fix Demand FF FC G125 2 2 2 2 2 2 2 2 Data
30388 30389 3Ph VArs Fix Dem FF FD G125 2 2 2 2 2 2 2 2 Data
30390 30391 3Ph W Peak Demand FF FE G125 2 2 2 2 2 2 2 2 Data
30392 30393 3Ph VArs Peak Demand FF FF G125 2 2 2 2 2 2 2 2 Data
30434 30434 Thermal State 4 2 G30 1 1 1 1 1 1 1 1 Data
30600 30600 CB A Operations 6 1 G1 1 1 1 1 1 1 1 1 Data
30601 30601 CB B Operations 6 2 G1 1 1 1 1 1 1 1 1 Data
30602 30602 CB C Operations 6 3 G1 1 1 1 1 1 1 1 1 Data
30603 30604 Total IA Broken 6 4 G125 2 2 2 2 2 2 2 2 Data
30605 30606 Total IB Broken 6 5 G125 2 2 2 2 2 2 2 2 Data
30607 30608 Total IC Broken 6 6 G125 2 2 2 2 2 2 2 2 Data
30609 30609 CB Operate Time 6 7 G25 1 1 1 1 1 1 1 1 Data
30611 30611 Total 1P Reclosures 6 9 G1 1 1 1 1 1 1 1 1 Data
30612 30612 Total 3P Reclosures 6 0A G1 1 1 1 1 1 1 1 1 Data
311001 311001 Modbus Status Register FF 01 G26 1 1 1 1 1 1 1 1 Data
311002 311003 Measurements1 - IA Magnitude 2 G24 2 2 2 2 2 2 2 2 Data
311004 311005 Measurements1 - IB Magnitude 2 G24 2 2 2 2 2 2 2 2 Data
311006 311007 Measurements1 - IC Magnitude 2 G24 2 2 2 2 2 2 2 2 Data
311008 311009 Measurements1 - VAB Magnitude 2 G24 2 2 2 2 2 2 2 2 Data
311010 311011 Measurements1 - VBC Magnitude 2 G24 2 2 2 2 2 2 2 2 Data
311012 311013 Measurements1 - VCA Magnitude 2 G24 2 2 2 2 2 2 2 2 Data
311014 311016 Measurements2 -3 phase Watts 3 G29 3 3 3 3 3 3 3 3 Data
311017 311019 Measurements2 -3 phase Vars 3 G29 3 3 3 3 3 3 3 3 Data
311020 311020 Measurements2 -3 phase powerFactor 3 G30 1 1 1 1 1 1 1 1 Data
311021 311021 Measurements1 -Frequency 2 G30 1 1 1 1 1 1 1 1 Data
311022 311022 Test Port Status 0F 4 G124 1 1 1 1 1 1 1 1 Data
311023 311024 DDB element 31 - 0 0F 20 G27 2 2 2 2 2 2 2 2 Data
311025 311026 DDB element 63 - 32 0F 21 G27 2 2 2 2 2 2 2 2 Data
311027 311028 DDB element 95 - 64 0F 22 G27 2 2 2 2 2 2 2 2 Data
311029 311030 DDB element 127 - 96 0F 23 G27 2 2 2 2 2 2 2 2 Data
311031 311032 DDB element 159 - 128 0F 24 G27 2 2 2 2 2 2 2 2 Data
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 81

Modbus Address Col Row Group Cell Min Max Step


Start End Modbus P441AG P441BG P442AG P442BG P444AG P444BG P444AH P444BH type
311033 311034 DDB element 191 - 160 0F 25 G27 2 2 2 2 2 2 2 2 Data
311035 311036 DDB element 223 - 192 0F 26 G27 2 2 2 2 2 2 2 2 Data
311037 311038 DDB element 255 - 224 0F 27 G27 2 2 2 2 2 2 2 2 Data
311039 311040 DDB element 287 - 256 0F 28 G27 2 2 2 2 2 2 2 2 Data
311041 311042 DDB element 319 - 288 0F 29 G27 2 2 2 2 2 2 2 2 Data
311043 311044 DDB element 351 - 320 0F 2A G27 2 2 2 2 2 2 2 2 Data
311045 311046 DDB element 383 - 352 0F 2B G27 2 2 2 2 2 2 2 2 Data
311047 311048 DDB element 415 - 384 0F 2C G27 2 2 2 2 2 2 2 2 Data
311049 311050 DDB element 447 - 415 0F 2D G27 2 2 2 2 2 2 2 2 Data
311051 311052 DDB element 479 - 448 0F 2E G27 2 2 2 2 2 2 2 2 Data
311053 311054 DDB element 511 - 480 0F 2F G27 2 2 2 2 2 2 2 2 Data
311055 311056 DDB element 543 - 512 0F 30 G27 2 2 2 2 2 2 2 2 Data
311057 311058 DDB element 575 - 544 0F 31 G27 2 2 2 2 2 2 2 2 Data
311059 311060 DDB element 607 - 575 0F 32 G27 2 2 2 2 2 2 2 2 Data
311061 311062 DDB element 639 - 608 0F 33 G27 2 2 2 2 2 2 2 2 Data
311063 311064 DDB element 671 - 640 0F 34 G27 2 2 2 2 2 2 2 2 Data
311065 311066 DDB element 703 - 672 0F 35 G27 2 2 2 2 2 2 2 2 Data
311067 311068 DDB element 735 - 704 0F 36 G27 2 2 2 2 2 2 2 2 Data
311069 311070 DDB element 767 - 736 0F 37 G27 2 2 2 2 2 2 2 2 Data
311071 311072 DDB element 799 - 768 0F 38 G27 2 2 2 2 2 2 2 2 Data
311073 311074 DDB element 831 - 800 0F 39 G27 2 2 2 2 2 2 2 2 Data
311075 311076 DDB element 863 - 832 0F 3A G27 2 2 2 2 2 2 2 2 Data
311077 311078 DDB element 895 - 864 0F 3B G27 2 2 2 2 2 2 2 2 Data
311079 311080 DDB element 927 - 896 0F 3C G27 2 2 2 2 2 2 2 2 Data
311081 311082 DDB element 959 - 928 0F 3D G27 2 2 2 2 2 2 2 2 Data
311083 311084 DDB element 991 - 960 0F 3E G27 2 2 2 2 2 2 2 2 Data
311085 311086 DDB element 1023 - 992 0F 3F G27 2 2 2 2 2 2 2 2 Data
30800 30800 Number of disturbance records. FF 6 G1 1 1 1 1 1 1 1 1 Data
30801 30801 Oldest stored disturbance record. FF 7 G1 1 1 1 1 1 1 1 1 Data
30802 30802 Number registers in current page. FF 8 G1 1 1 1 1 1 1 1 1 Data
30803 30929 Disturbance record data [1-127] FF 09-87 G1 127 127 127 127 127 127 127 127 Data
30930 30933 Disturbance record time stamp. FF 88 G1 4 4 4 4 4 4 4 4 Data
30934 30934 Disturbance recorder status FF 8F G1 1 1 1 1 1 1 1 1 Data
31000 31015 Grp1 PSL Ref B7 01 G3 16 16 16 16 16 16 16 16 Data
31016 31019 Date/Time B7 02 G12 4 4 4 4 4 4 4 4 Data
31020 31021 PSL unique ID B7 03 G27 2 2 2 2 2 2 2 2 Data
31022 31037 Grp2 PSL Ref B7 04 G3 16 16 16 16 16 16 16 16 Data
31038 31041 Date/Time B7 05 G12 4 4 4 4 4 4 4 4 Data
31042 31043 PSL unique ID B7 06 G27 2 2 2 2 2 2 2 2 Data
31044 31059 Grp3 PSL Ref B7 07 G3 16 16 16 16 16 16 16 16 Data
31060 31063 Date/Time B7 08 G12 4 4 4 4 4 4 4 4 Data
31064 31065 PSL unique ID B7 09 G27 2 2 2 2 2 2 2 2 Data
31066 31079 Grp3 PSL Ref B7 0A G3 16 16 16 16 16 16 16 16 Data
31082 31085 Date/Time B7 0B G12 4 4 4 4 4 4 4 4 Data
31086 31087 PSL unique ID B7 0C G27 2 2 2 2 2 2 2 2 Data
310000 310000 IM Input Status 15 1 G27 1 1 1 1 1 1 1 1 Data
310001 310001 IM Output Status 15 2 G27 1 1 1 1 1 1 1 1 Data
310002 310003 Rx Direct Count 15 21 G27 2 2 2 2 2 2 2 2 Data
310004 310005 Rx Perm Count 15 22 G27 2 2 2 2 2 2 2 2 Data
310006 310007 Rx Block Count 15 23 G27 2 2 2 2 2 2 2 2 Data
310008 310009 Rx NewDataCount 15 24 G27 2 2 2 2 2 2 2 2 Data
310010 310011 Rx ErroredCount 15 25 G27 2 2 2 2 2 2 2 2 Data
310012 310013 Lost Messages 15 26 G10 2 2 2 2 2 2 2 2 Data
310014 310015 Elapsed Time 15 30 G27 2 2 2 2 2 2 2 2 Data
310016 310016 Data CD Status 15 41 G1 1 1 1 1 1 1 1 1 Data
310017 310017 FrameSync Status 15 42 G1 1 1 1 1 1 1 1 1 Data
310018 310018 Message Status 15 43 G1 1 1 1 1 1 1 1 1 Data
310019 310019 Channel Status 15 44 G1 1 1 1 1 1 1 1 1 Data
310020 310020 IM H/W Status 15 45 G1 1 1 1 1 1 1 1 1 Data
310021 310021 Loopback Status 15 52 G1 1 1 1 1 1 1 1 1 Data

Read and write access of Settings


40001 40002 Password 0 2 G20 2 2 2 2 2 2 2 2 Setting 65 90 1
40004 40011 Description 0 4 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
40012 40019 Plant Reference 0 5 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
40020 40020 Frequency 0 9 G1 1 1 1 1 1 1 1 1 Setting 50 60 10
40021 40021 CB Trip/Close 0 10 G55 1 1 1 1 1 1 1 1 Command 0 2 1
40022 40022 Password Control 0 D1 G22 1 1 1 1 1 1 1 1 Setting 0 2 1
40023 40024 Password Level 1 0 D2 G20 2 2 2 2 2 2 2 2 Setting 65 90 1
40025 40026 Password Level 2 0 D3 G20 2 2 2 2 2 2 2 2 Setting 65 90 1
40100 40100 Select Event 1 1 G1 1 1 1 1 1 1 1 1 Setting 0 249 1
40101 40101 Select Fault 1 6 G1 1 1 1 1 1 1 1 1 Setting 0 4 1
40102 40102 Select Report 1 F0 G1 1 1 1 1 1 1 1 1 Setting 0 4 1
40103 40103 Reset Demand 3 25 G1 1 1 1 1 1 1 1 1 Command 0 1 1
40104 40104 Reset Thermal 4 3 G1 1 1 1 1 1 1 1 1 Command 0 1 1
40140 40140 Reset CB Data 6 8 G11 1 1 1 1 1 1 1 1 Command 0 1 1
40141 40141 Reset Total A/R 6 0B G11 1 1 1 1 1 1 1 1 Command 0 1 1
40151 40151 Broken I^ 10 1 G2 1 1 1 1 1 1 1 1 Setting 1 2 0,1
40152 40152 I^ Maintenance 10 2 G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40153 40154 I^ Maintenance 10 3 G35 2 2 2 2 2 2 2 2 Setting 1*NM125000*NM 1*NM1
40155 40155 I^ Lockout 10 4 G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40156 40157 I^ Lockout 10 5 G35 2 2 2 2 2 2 2 2 Setting 1*NM125000*NM 1*NM1
40158 40158 N° CB Ops Maint 10 6 G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40159 40159 N° CB Ops Maint 10 7 G1 1 1 1 1 1 1 1 1 Setting 1 10000 1
40160 40160 N° CB Ops Lock 10 8 G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40161 40161 N° CB Ops Lock 10 9 G1 1 1 1 1 1 1 1 1 Setting 1 10000 1
40162 40162 CB Time Maint 10 0A G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40163 40164 CB Time Maint 10 0B G35 2 2 2 2 2 2 2 2 Setting 0,005 0,5 0,001
40165 40165 CB Time Lockout 10 0C G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40166 40167 CB Time Lockout 10 0D G35 2 2 2 2 2 2 2 2 Setting 0,005 0,5 0,001
40168 40168 Fault Freq Lock 10 0E G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40169 40169 Fault Freq Count 10 0F G1 1 1 1 1 1 1 1 1 Setting 0 9999 1
40170 40171 Fault Freq Time 10 10 G35 2 2 2 2 2 2 2 2 Setting 0 9999 1
40172 40172 Lockout Reset 10 11 G11 1 1 1 1 1 1 1 1 Command 0 1 1
40173 40173 Reset Lockout by 10 12 G81 1 1 1 1 1 1 1 1 Setting 0 1 1
40174 40174 Man Close RstDly 10 13 G2 1 1 1 1 1 1 1 1 Setting 0.01 600 0.01
40200 40200 CB Control by 7 1 G99 1 1 1 1 1 1 1 1 Setting 0 7 1
40201 40201 Manual Close Pulse Time 7 2 G2 1 1 1 1 1 1 1 1 Setting 0.1 10 0.01
40202 40202 Trip Pulse Time 7 3 G2 1 1 1 1 1 1 1 1 Setting 0.1 5 0.01
40203 40203 Man Close Delay 7 4 G2 1 1 1 1 1 1 1 1 Setting 0.01 600 0.01
40204 40204 A/R Single Pole 7 7 G37 1 1 1 1 1 1 Setting 0 1 1
40205 40205 A/R Three Pole 7 8 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40206 40207 Healthy Window 7 5 G35 2 2 2 2 2 2 2 2 Setting 0.01 9999 0.01
40208 40209 C/S Window 7 6 G35 2 2 2 2 2 2 2 2 Setting 0.01 9999 0.01
40250 40250 SelectDisturbance record. FF 89 G1 1 1 1 1 1 1 1 1 Setting 1 65535 1
40251 40251 Select dist data format FF 90 G1 1 1 1 1 1 1 1 1 Setting
40300 40303 Date/Time 8 1 G12 4 4 4 4 4 4 4 4 Setting
40304 40304 IRIG-B Sync 8 4 G37 1 1 1 1 1 1 Setting 0 1 1
40305 40305 Battery Alarm 8 7 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40306 40306 IEC Time Format FF 91 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40400 40400 Record Selection Command Register FF 8A G18 1 1 1 1 1 1 1 1 Command 0 24 1
40401 40401 Record Control Command Register FF 8B G6 1 1 1 1 1 1 1 1 Command 0 4 1
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 82

Modbus Address Col Row Group Cell Min Max Step


Start End Modbus P441AG P441BG P442AG P442BG P444AG P444BG P444AH P444BH type
40402 40402 Restore Defaults 9 1 G53 1 1 1 1 1 1 1 1 Command 0 5 1
40403 40403 Setting Group 9 2 G61 1 1 1 1 1 1 1 1 Setting 0 1 1
40404 40404 Active Settings 9 3 G90 1 1 1 1 1 1 1 1 Setting 0 3 1
40405 40405 Save Changes 9 4 G62 1 1 1 1 1 1 1 1 Command 0 2 1
40406 40406 Copy From 9 5 G90 1 1 1 1 1 1 1 1 Setting 0 3 1
40407 40407 Copy to 9 6 G98 1 1 1 1 1 1 1 1 Command 0 3 1
40408 40408 Setting Group 1 9 7 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40409 40409 Setting Group 2 9 8 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40410 40410 Setting Group 3 9 9 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40411 40411 Setting Group 4 9 0A G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40412 40412 Dist. Protection 9 0D G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40413 40413 Power-Swing 9 10 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40414 40414 Back-Up I> 9 11 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40415 40415 Neg Sequence O/C 9 12 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40416 40416 Broken Conductor 9 13 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40417 40417 Earth Fault Prot 9 14 G131 1 1 1 1 1 1 1 1 Setting 0 1 1
40418 40418 Aided D.E.F 9 15 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40419 40419 Volt Protection 9 16 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40420 40420 CB Fail & I< 9 17 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40421 40421 Supervision 9 18 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40422 40422 System Checks 9 19 G37 1 1 1 1 Setting 0 1 1
40423 40423 Thermal Overload 9 1A G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40424 40424 Internal A/R 9 24 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40425 40425 Residual O/V NVD 9 1D G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40440 40440 InterMiCOM 9 40 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40500 40501 Main VT Primary 0A 1 G35 2 2 2 2 2 2 2 2 Setting 100 1000000 1
40502 40502 Main VT Sec'y 0A 2 G2 1 1 1 1 1 1 1 1 Setting 80*V1 140*V1 1*V1
40503 40504 C/S VT Primary 0A 3 G35 2 2 2 2 2 2 2 2 Setting 100 1000000 1
40505 40505 C/S VT Secondary 0A 4 G2 1 1 1 1 1 1 1 1 Setting 80*V2 140*V2 1*V2
40506 40506 Phase CT Primary 0A 7 G2 1 1 1 1 1 1 1 1 Setting 1 30000 1
40507 40507 Phase CT Sec'y 0A 8 G2 1 1 1 1 1 1 1 1 Setting 1 5 4
40508 40508 Mcomp CT Primary 0A 0D G2 1 1 1 1 1 1 1 1 Setting 1 30000 1
40509 40509 Mcomp CT Sec'y 0A 0E G2 1 1 1 1 1 1 1 1 Setting 1 5 4
40510 40510 C/S Input 0A 0F G40 1 1 1 1 1 1 1 1 Setting 0 3 1
40511 40511 Main VT Location 0A 10 G89 1 1 1 1 1 1 1 1 Setting 0 1 1
410400 410400 Alarm Event 0B 4 G37 1 1 1 1 1 1 1 1 Command 0 1 1
410401 410401 Relay O/P Event 0B 5 G37 1 1 1 1 1 1 1 1 Command 0 1 1
410402 410402 Opto Input Event 0B 6 G37 1 1 1 1 1 1 1 1 Command 0 1 1
410403 410403 System Event 0B 7 G37 1 1 1 1 1 1 1 1 Command 0 1 1
410404 410404 Fault Rec Event 0B 8 G37 1 1 1 1 1 1 1 1 Command 0 1 1
410405 410405 Maint Rec Event 0B 9 G37 1 1 1 1 1 1 1 1 Command 0 1 1
410406 410406 Protection Event 0B 0A G37 1 1 1 1 1 1 1 1 Command 0 1 1
410407 410408 DDB element 31 - 0 0B 40 G27 2 2 2 2 2 2 2 2 Setting 0 1 32
410409 410410 DDB element 63 - 32 0B 41 G28 2 2 2 2 2 2 2 2 Setting 0 1 32
410411 410412 DDB element 95 - 64 0B 42 G29 2 2 2 2 2 2 2 2 Setting 0 1 32
410413 410414 DDB element 127 - 96 0B 43 G30 2 2 2 2 2 2 2 2 Setting 0 1 32
410415 410416 DDB element 159 - 128 0B 44 G31 2 2 2 2 2 2 2 2 Setting 0 1 32
410417 410418 DDB element 191 - 160 0B 45 G32 2 2 2 2 2 2 2 2 Setting 0 1 32
410419 410420 DDB element 223 - 192 0B 46 G33 2 2 2 2 2 2 2 2 Setting 0 1 32
410421 410422 DDB element 255 - 224 0B 47 G34 2 2 2 2 2 2 2 2 Setting 0 1 32
410423 410424 DDB element 287 - 256 0B 48 G35 2 2 2 2 2 2 2 2 Setting 0 1 32
410425 410426 DDB element 319 - 288 0B 49 G36 2 2 2 2 2 2 2 2 Setting 0 1 32
410427 410428 DDB element 351 - 320 0B 4A G37 2 2 2 2 2 2 2 2 Setting 0 1 32
410429 410430 DDB element 383 - 352 0B 4B G38 2 2 2 2 2 2 2 2 Setting 0 1 32
410431 410432 DDB element 415 - 384 0B 4C G39 2 2 2 2 2 2 2 2 Setting 0 1 32
410433 410434 DDB element 447 - 415 0B 4D G40 2 2 2 2 2 2 2 2 Setting 0 1 32
410435 410436 DDB element 479 - 448 0B 4E G41 2 2 2 2 2 2 2 2 Setting 0 1 32
410437 410438 DDB element 511 - 480 0B 4F G42 2 2 2 2 2 2 2 2 Setting 0 1 32
410439 410440 DDB element 543 - 512 0B 50 G43 2 2 2 2 2 2 2 2 Setting 0 1 32
410441 410442 DDB element 575 - 544 0B 51 G44 2 2 2 2 2 2 2 2 Setting 0 1 32
410443 410444 DDB element 607 - 575 0B 52 G45 2 2 2 2 2 2 2 2 Setting 0 1 32
410445 410446 DDB element 639 - 608 0B 53 G46 2 2 2 2 2 2 2 2 Setting 0 1 32
410447 410448 DDB element 671 - 640 0B 54 G47 2 2 2 2 2 2 2 2 Setting 0 1 32
410449 410450 DDB element 703 - 672 0B 55 G48 2 2 2 2 2 2 2 2 Setting 0 1 32
410451 410452 DDB element 735 - 704 0B 56 G49 2 2 2 2 2 2 2 2 Setting 0 1 32
410453 410454 DDB element 767 - 736 0B 57 G50 2 2 2 2 2 2 2 2 Setting 0 1 32
410455 410456 DDB element 799 - 768 0B 58 G51 2 2 2 2 2 2 2 2 Setting 0 1 32
410457 410458 DDB element 831 - 800 0B 59 G52 2 2 2 2 2 2 2 2 Setting 0 1 32
410459 410460 DDB element 863 - 832 0B 5A G53 2 2 2 2 2 2 2 2 Setting 0 1 32
410461 410462 DDB element 895 - 864 0B 5B G54 2 2 2 2 2 2 2 2 Setting 0 1 32
410463 410464 DDB element 927 - 896 0B 5C G55 2 2 2 2 2 2 2 2 Setting 0 1 32
410465 420466 DDB element 959 - 928 0B 5D G56 2 2 2 2 2 2 2 2 Setting 0 1 32
410467 410468 DDB element 991 - 960 0B 5E G57 2 2 2 2 2 2 2 2 Setting 0 1 32
410469 410470 DDB element 1023 - 992 0B 5F G58 2 2 2 2 2 2 2 2 Setting 0 1 31
40600 40600 Duration 0C 1 G2 1 1 1 1 1 1 1 1 Setting 0.1 10.5 0.01
40601 40601 Trigger Position 0C 2 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.1
40602 40602 Trigger Mode 0C 3 G34 1 1 1 1 1 1 1 1 Setting 0 1 1
40603 40603 Analog Channel 1 0C 4 G31 1 1 1 1 1 1 1 1 Setting 0 10 1
40604 40604 Analog Channel 2 0C 5 G31 1 1 1 1 1 1 1 1 Setting 0 10 1
40605 40605 Analog Channel 3 0C 6 G31 1 1 1 1 1 1 1 1 Setting 0 10 1
40606 40606 Analog Channel 4 0C 7 G31 1 1 1 1 1 1 1 1 Setting 0 10 1
40607 40607 Analog Channel 5 0C 8 G31 1 1 1 1 1 1 1 1 Setting 0 10 1
40608 40608 Analog Channel 6 0C 9 G31 1 1 1 1 1 1 1 1 Setting 0 10 1
40609 40609 Analog Channel 7 0C 0A G31 1 1 1 1 1 1 1 1 Setting 0 10 1
40610 40610 Analog Channel 8 0C 0B G31 1 1 1 1 1 1 1 1 Setting 0 10 1
40611 40611 Digital Input 1 0C 0C G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40612 40612 Input 1 Trigger 0C 0D G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40613 40613 Digital Input 2 0C 0E G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40614 40614 Input 2 Trigger 0C 0F G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40615 40615 Digital Input 3 0C 10 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40616 40616 Input 3 Trigger 0C 11 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40617 40617 Digital Input 4 0C 12 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40618 40618 Input 4 Trigger 0C 13 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40619 40619 Digital Input 5 0C 14 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40620 40620 Input 5 Trigger 0C 15 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40621 40621 Digital Input 6 0C 16 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40622 40622 Input 6 Trigger 0C 17 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40623 40623 Digital Input 7 0C 18 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40624 40624 Input 7 Trigger 0C 19 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40625 40625 Digital Input 8 0C 1A G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40626 40626 Input 8 Trigger 0C 1B G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40627 40627 Digital Input 9 0C 1C G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40628 40628 Input 9 Trigger 0C 1D G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40629 40629 Digital Input 10 0C 1E G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40630 40630 Input 10 Trigger 0C 1F G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40631 40631 Digital Input 11 0C 20 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40632 40632 Input 11 Trigger 0C 21 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40633 40633 Digital Input 12 0C 22 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40634 40634 Input 12 Trigger 0C 23 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40635 40635 Digital Input 13 0C 24 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40636 40636 Input 13 Trigger 0C 25 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40637 40637 Digital Input 14 0C 26 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40638 40638 Input 14 Trigger 0C 27 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 83

Modbus Address Col Row Group Cell Min Max Step


Start End Modbus P441AG P441BG P442AG P442BG P444AG P444BG P444AH P444BH type
40639 40639 Digital Input 15 0C 28 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40640 40640 Input 15 Trigger 0C 29 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40641 40641 Digital Input 16 0C 2A G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40642 40642 Input 16 Trigger 0C 2B G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40643 40643 Digital Input 17 0C 2C G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40644 40644 Input 17 Trigger 0C 2D G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40645 40645 Digital Input 18 0C 2E G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40646 40646 Input 18 Trigger 0C 2F G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40647 40647 Digital Input 19 0C 30 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40648 40648 Input 19 Trigger 0C 31 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40649 40649 Digital Input 20 0C 32 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40650 40650 Input 20 Trigger 0C 33 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40651 40651 Digital Input 21 0C 34 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40652 40652 Input 21 Trigger 0C 35 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40653 40653 Digital Input 22 0C 36 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40654 40654 Input 22 Trigger 0C 37 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40655 40655 Digital Input 23 0C 38 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40656 40656 Input 23 Trigger 0C 39 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40657 40657 Digital Input 24 0C 3A G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40658 40658 Input 24 Trigger 0C 3B G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40659 40659 Digital Input 25 0C 3C G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40660 40660 Input 25 Trigger 0C 3D G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40661 40661 Digital Input 26 0C 3E G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40662 40662 Input 26 Trigger 0C 3F G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40663 40663 Digital Input 27 0C 40 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40664 40664 Input 27 Trigger 0C 41 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40665 40665 Digital Input 28 0C 42 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40666 40666 Input 28 Trigger 0C 43 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40667 40667 Digital Input 29 0C 44 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40668 40668 Input 29 Trigger 0C 45 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40669 40669 Digital Input 30 0C 46 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40670 40670 Input 30 Trigger 0C 47 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40671 40671 Digital Input 31 0C 48 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40672 40672 Input 31 Trigger 0C 49 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40673 40673 Digital Input 32 0C 4A G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40674 40674 Input 32 Trigger 0C 4B G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40700 40700 Default Display 0D 1 G52 1 1 1 1 1 1 1 1 Setting 0 6 1
40701 40701 Local Values 0D 2 G54 1 1 1 1 1 1 1 1 Setting 0 1 1
40702 40702 Remote Values 0D 3 G54 1 1 1 1 1 1 1 1 Setting 0 1 1
40703 40703 Measurement Ref 0D 4 G56 1 1 1 1 1 1 1 1 Setting 0 5 1
40704 40704 Measurement Mode 0D 5 G1 1 1 1 1 1 1 1 1 Setting 0 3 1
40705 40705 Demand Interval 0D 6 G2 1 1 1 1 1 1 1 1 Setting 1 99 1
40706 40706 Distance Unit 0D 7 G97 1 1 1 1 1 1 1 1 Setting 0 1 1
40707 40707 Fault Location 0D 8 G51 1 1 1 1 1 1 1 1 Setting 0 2 1
40800 40800 Remote Address 0E 2 G1 1 1 1 1 1 1 1 1 Setting 0 247 1
40801 40801 Inactivity Timer 0E 3 G2 1 1 1 1 1 1 1 1 Setting 1 30 1
40802 40802 Baud Rate 0E 4 G38 1 1 1 1 1 1 1 1 Setting 0 1 1
40802 40802 Baud Rate 0E 4 G38 1 1 1 1 1 1 1 1 Setting 0 1 1
40803 40803 Parity 0E 5 G39 1 1 1 1 1 1 1 1 Setting 0 2 1
40803 40803 Parity 0E 5 G39 1 1 1 1 1 1 1 1 Setting 0 2 1
40850 40850 Monitor Bit 1 0F 6 G1 1 1 1 1 1 1 1 1 Setting 0 511 1
40851 40851 Monitor Bit 2 0F 7 G1 1 1 1 1 1 1 1 1 Setting 0 511 1
40852 40852 Monitor Bit 3 0F 8 G1 1 1 1 1 1 1 1 1 Setting 0 511 1
40853 40853 Monitor Bit 4 0F 9 G1 1 1 1 1 1 1 1 1 Setting 0 511 1
40854 40854 Monitor Bit 5 0F A G1 1 1 1 1 1 1 1 1 Setting 0 511 1
40855 40855 Monitor Bit 6 0F B G1 1 1 1 1 1 1 1 1 Setting 0 511 1
40856 40856 Monitor Bit 7 0F C G1 1 1 1 1 1 1 1 1 Setting 0 511 1
40857 40857 Monitor Bit 8 0F D G1 1 1 1 1 1 1 1 1 Setting 0 511 1
40858 40858 Test Mode 0F E G204 1 1 1 1 1 1 1 1 Setting 0 1 1
40859 40860 Test Pattern 1 0F F G9 2 2 2 2 2 2 2 2 Setting 0 4,3E+09 1
40861 40862 Test Pattern 2 0F 10 G9 2 2 Setting 0 16383 1
40863 40863 Contact Test 0F 11 G93 1 1 1 1 1 1 1 1 Command 0 2 1
40864 40864 Test LEDs 0F 12 G94 1 1 1 1 1 1 1 1 Command 0 1 1
40865 40865 Autoreclose Test 0F 13 G36 1 1 1 1 1 1 1 1 Command 0 4 1
40900 40900 Global threshold 11 1 G200 1 1 1 1 1 1 1 1 Setting 0 5 1
40901 40901 Opto Input 1 11 2 G201 1 1 1 1 1 1 1 1 Setting 0 2 1
40902 40902 Opto Input 2 11 3 G201 1 1 1 1 1 1 1 1 Setting 0 2 1
40903 40903 Opto Input 3 11 4 G201 1 1 1 1 1 1 1 1 Setting 0 2 1
40904 40904 Opto Input 4 11 5 G201 1 1 1 1 1 1 1 1 Setting 0 2 1
40905 40905 Opto Input 5 11 6 G201 1 1 1 1 1 1 1 1 Setting 0 2 1
40906 40906 Opto Input 6 11 7 G201 1 1 1 1 1 1 1 1 Setting 0 2 1
40907 40907 Opto Input 7 11 8 G201 1 1 1 1 1 1 1 1 Setting 0 2 1
40908 40908 Opto Input 8 11 9 G201 1 1 1 1 1 1 1 1 Setting 0 2 1
40909 40909 Opto Input 9 11 0A G201 1 1 1 1 1 1 Setting 0 2 1
40910 40910 Opto Input 10 11 0B G201 1 1 1 1 1 1 Setting 0 2 1
40911 40911 Opto Input 11 11 0C G201 1 1 1 1 1 1 Setting 0 2 1
40912 40912 Opto Input 12 11 0D G201 1 1 1 1 1 1 Setting 0 2 1
40913 40913 Opto Input 13 11 0E G201 1 1 1 1 1 1 Setting 0 2 1
40914 40914 Opto Input 14 11 0F G201 1 1 1 1 1 1 Setting 0 2 1
40915 40915 Opto Input 15 11 10 G201 1 1 1 1 1 1 Setting 0 2 1
40916 40916 Opto Input 16 11 11 G201 1 1 1 1 1 1 Setting 0 2 1
40917 40917 Opto Input 17 11 12 G201 1 1 1 1 Setting 0 2 1
40918 40918 Opto Input 18 11 13 G201 1 1 1 1 Setting 0 2 1
40919 40919 Opto Input 19 11 14 G201 1 1 1 1 Setting 0 2 1
40920 40920 Opto Input 20 11 15 G201 1 1 1 1 Setting 0 2 1
40921 40921 Opto Input 21 11 16 G201 1 1 1 1 Setting 0 2 1
40922 40922 Opto Input 22 11 17 G201 1 1 1 1 Setting 0 2 1
40923 40923 Opto Input 23 11 18 G201 1 1 1 1 Setting 0 2 1
40924 40924 Opto Input 24 11 19 G201 1 1 1 1 Setting 0 2 1
40925 40925 Opto Input 25 11 1A G201 Setting 0 2 1
40926 40926 Opto Input 26 11 1B G201 Setting 0 2 1
40927 40927 Opto Input 27 11 1C G201 Setting 0 2 1
40928 40928 Opto Input 28 11 1D G201 Setting 0 2 1
40929 40929 Opto Input 29 11 1E G201 Setting 0 2 1
40930 40930 Opto Input 30 11 1F G201 Setting 0 2 1
40931 40931 Opto Input 31 11 20 G201 Setting 0 2 1
40932 40932 Opto Input 32 11 21 G201 Setting 0 2 1
40933 40934 Opto Filter Cntl 11 50 G8 2 2 2 2 2 2 2 2 Setting 0 4,3E+09 1
40935 40935 Characteristic 11 80 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
40950 40951 Ctrl I/P Status 12 1 G202 1 1 1 1 1 1 1 1 Setting x0000000 32 1
40952 40952 Control Input 1 12 2 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40953 40953 Control Input 2 12 3 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40954 40954 Control Input 3 12 4 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40955 40955 Control Input 4 12 5 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40956 40956 Control Input 5 12 6 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40957 40957 Control Input 6 12 7 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40958 40958 Control Input 7 12 8 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40959 40959 Control Input 8 12 9 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40960 40960 Control Input 9 12 0A G203 1 1 1 1 1 1 1 1 Command 0 2 1
40961 40961 Control Input 10 12 0B G203 1 1 1 1 1 1 1 1 Command 0 2 1
40962 40962 Control Input 11 12 0C G203 1 1 1 1 1 1 1 1 Command 0 2 1
40963 40963 Control Input 12 12 0D G203 1 1 1 1 1 1 1 1 Command 0 2 1
40964 40964 Control Input 13 12 0E G203 1 1 1 1 1 1 1 1 Command 0 2 1
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 84

Modbus Address Col Row Group Cell Min Max Step


Start End Modbus P441AG P441BG P442AG P442BG P444AG P444BG P444AH P444BH type
40965 40965 Control Input 14 12 0F G203 1 1 1 1 1 1 1 1 Command 0 2 1
40966 40966 Control Input 15 12 10 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40967 40967 Control Input 16 12 11 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40968 40968 Control Input 17 12 12 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40969 40969 Control Input 18 12 13 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40970 40970 Control Input 19 12 14 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40971 40971 Control Input 20 12 15 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40972 40972 Control Input 21 12 16 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40973 40973 Control Input 22 12 17 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40974 40974 Control Input 23 12 18 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40975 40975 Control Input 24 12 19 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40976 40976 Control Input 25 12 1A G203 1 1 1 1 1 1 1 1 Command 0 2 1
40977 40977 Control Input 26 12 1B G203 1 1 1 1 1 1 1 1 Command 0 2 1
40978 40978 Control Input 27 12 1C G203 1 1 1 1 1 1 1 1 Command 0 2 1
40979 40979 Control Input 28 12 1D G203 1 1 1 1 1 1 1 1 Command 0 2 1
40980 40980 Control Input 29 12 1E G203 1 1 1 1 1 1 1 1 Command 0 2 1
40981 40981 Control Input 30 12 1F G203 1 1 1 1 1 1 1 1 Command 0 2 1
40982 40982 Control Input 31 12 20 G203 1 1 1 1 1 1 1 1 Command 0 2 1
40983 40983 Control Input 32 12 21 G203 1 1 1 1 1 1 1 1 Command 0 2 1
410002 410002 Control Input 1 13 10 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410003 410003 Ctrl Command 1 13 11 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410004 410004 Control Input 2 13 14 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410005 410005 Ctrl Command 2 13 15 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410006 410006 Control Input 3 13 18 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410007 410007 Ctrl Command 3 13 19 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410008 410008 Control Input 4 13 1C G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410009 410009 Ctrl Command 4 13 1D G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410010 410010 Control Input 5 13 20 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410011 410011 Ctrl Command 5 13 21 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410012 410012 Control Input 6 13 24 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410013 410013 Ctrl Command 6 13 25 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410014 410014 Control Input 7 13 28 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410015 410015 Ctrl Command 7 13 29 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410016 410016 Control Input 8 13 2C G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410017 410017 Ctrl Command 8 13 2D G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410018 410018 Control Input 9 13 30 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410019 410019 Ctrl Command 9 13 31 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410020 410020 Control Input 10 13 34 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410021 410021 Ctrl Command 10 13 35 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410022 410022 Control Input 11 13 38 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410023 410023 Ctrl Command 11 13 39 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410024 410024 Control Input 12 13 3C G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410025 410025 Ctrl Command 12 13 3D G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410026 410026 Control Input 13 13 40 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410027 410027 Ctrl Command 13 13 41 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410028 410028 Control Input 14 13 44 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410029 410029 Ctrl Command 14 13 45 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410030 410030 Control Input 15 13 48 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410031 410031 Ctrl Command 15 13 49 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410032 410032 Control Input 16 13 4C G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410033 410033 Ctrl Command 16 13 4D G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410034 410034 Control Input 17 13 50 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410035 410035 Ctrl Command 17 13 51 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410036 410036 Control Input 18 13 54 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410037 410037 Ctrl Command 18 13 55 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410038 410038 Control Input 19 13 58 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410039 410039 Ctrl Command 19 13 59 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410040 410040 Control Input 20 13 5C G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410041 410041 Ctrl Command 20 13 5D G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410042 410042 Control Input 21 13 60 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410043 410043 Ctrl Command 21 13 61 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410044 410044 Control Input 22 13 64 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410045 410045 Ctrl Command 22 13 65 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410046 410046 Control Input 23 13 68 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410047 410047 Ctrl Command 23 13 69 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410048 410048 Control Input 24 13 6C G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410049 410049 Ctrl Command 24 13 6D G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410050 410050 Control Input 25 13 70 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410051 410051 Ctrl Command 25 13 71 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410052 410052 Control Input 26 13 74 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410053 410053 Ctrl Command 26 13 75 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410054 410054 Control Input 27 13 78 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410055 410055 Ctrl Command 27 13 79 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410056 410056 Control Input 28 13 7C G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410057 410057 Ctrl Command 28 13 7D G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410058 410058 Control Input 29 13 80 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410059 410059 Ctrl Command 29 13 81 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410060 410060 Control Input 30 13 84 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410061 410061 Ctrl Command 30 13 85 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410062 410062 Control Input 31 13 88 G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410063 410063 Ctrl Command 31 13 89 G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410064 410064 Control Input 32 13 8C G234 1 1 1 1 1 1 1 1 Setting 0 1 1
410065 410065 Ctrl Command 32 13 8D G232 1 1 1 1 1 1 1 1 Setting 0 3 1
410100 410107 Control Input 1 29 1 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410108 410115 Control Input 2 29 2 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410116 410123 Control Input 3 29 3 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410124 410131 Control Input 4 29 4 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410132 410139 Control Input 5 29 5 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410140 410147 Control Input 6 29 6 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410148 410155 Control Input 7 29 7 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410156 410163 Control Input 8 29 8 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410164 410171 Control Input 9 29 9 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410172 410179 Control Input 10 29 0A G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410180 410187 Control Input 11 29 0B G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410188 410195 Control Input 12 29 0C G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410196 410203 Control Input 13 29 0D G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410204 410211 Control Input 14 29 0E G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410212 410219 Control Input 15 29 0F G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410220 410227 Control Input 16 29 10 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410228 410235 Control Input 17 29 11 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410236 410243 Control Input 18 29 12 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410244 410251 Control Input 19 29 13 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410252 410259 Control Input 20 29 14 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410260 410267 Control Input 21 29 15 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410268 410275 Control Input 22 29 16 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410276 410283 Control Input 23 29 17 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410284 410291 Control Input 24 29 18 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410292 410299 Control Input 25 29 19 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410300 410307 Control Input 26 29 1A G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410308 410315 Control Input 27 29 1B G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410316 410323 Control Input 28 29 1C G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410324 410331 Control Input 29 29 1D G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410332 410339 Control Input 30 29 1E G3 1 1 1 1 1 1 1 1 Setting 32 163 1
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 85

Modbus Address Col Row Group Cell Min Max Step


Start End Modbus P441AG P441BG P442AG P442BG P444AG P444BG P444AH P444BH type
410340 410347 Control Input 31 29 1F G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410348 410355 Control Input 32 29 20 G3 1 1 1 1 1 1 1 1 Setting 32 163 1
410500 410500 Source Address 15 10 G1 1 1 1 1 1 1 1 1 Setting 0 10 1
410501 410501 Received Address 15 11 G1 1 1 1 1 1 1 1 1 Setting 0 10 1
410502 410502 Baud Rate 15 12 G1 1 1 1 1 1 1 1 1 Setting 0 4 1
410503 410503 Remote Device 1 1 1 1 1 1 1 1 Setting 0 1 1
410504 410504 Ch Statistics 15 20 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410505 410505 Reset Statistics 15 31 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410506 410506 Ch Diagnostics 15 40 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410507 410507 Loopback Mode 15 50 G1 1 1 1 1 1 1 1 1 Setting 0 1 2
410508 410508 Test Pattern 15 51 G1 1 1 1 1 1 1 1 1 Setting 0 8 1
410520 410521 IM Msg Alarm Lvl 16 1 G35 1 1 1 1 1 1 1 1 Setting 0 100 0,1
410522 410522 IM1 Cmd Type 16 10 G1 1 1 1 1 1 1 1 1 Setting 0 2 1
410523 410523 IM1 FallBackMode 16 11 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410524 410524 IM1 DefaultValue 16 12 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410525 410526 IM1 FrameSyncTim 16 13 G35 2 2 2 2 2 2 2 2 Setting 0,01 1,5 0,01
410527 410527 IM2 Cmd Type 16 18 G1 1 1 1 1 1 1 1 1 Setting 0 2 1
410528 410528 IM2 FallBackMode 16 19 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410529 410529 IM2 DefaultValue 16 1A G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410530 410531 IM2 FrameSyncTim 16 1B G35 2 2 2 2 2 2 2 2 Setting 0,01 1,5 0,01
410532 410532 IM3 Cmd Type 16 20 G1 1 1 1 1 1 1 1 1 Setting 0 2 1
410533 410533 IM3 FallBackMode 16 21 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410534 410534 IM3 DefaultValue 16 22 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410535 410536 IM3 FrameSyncTim 16 23 G35 2 2 2 2 2 2 2 2 Setting 0,01 1,5 0,01
410537 410537 IM4 Cmd Type 16 28 G1 1 1 1 1 1 1 1 1 Setting 0 2 1
410538 410538 IM4 FallBackMode 16 29 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410539 410539 IM4 DefaultValue 16 2A G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410540 410541 IM4 FrameSyncTim 16 2B G35 2 2 2 2 2 2 2 2 Setting 0,01 1,5 0,01
410542 410542 IM5 Cmd Type 16 30 G1 1 1 1 1 1 1 1 1 Setting 0 2 1
410543 410543 IM5 FallBackMode 16 31 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410544 410544 IM5 DefaultValue 16 32 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410545 410546 IM5 FrameSyncTim 16 33 G35 2 2 2 2 2 2 2 2 Setting 0,01 1,5 0,01
410547 410547 IM6 Cmd Type 16 38 G1 1 1 1 1 1 1 1 1 Setting 0 2 1
410548 410548 IM6 FallBackMode 16 39 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410549 410549 IM6 DefaultValue 16 3A G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410550 410551 IM6 FrameSyncTim 16 2B G35 2 2 2 2 2 2 2 2 Setting 0,01 1,5 0,01
410552 410552 IM7 Cmd Type 16 40 G1 1 1 1 1 1 1 1 1 Setting 0 2 1
410553 410553 IM7 FallBackMode 16 41 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410554 410554 IM7 DefaultValue 16 42 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410555 410556 IM7 FrameSyncTim 16 43 G35 2 2 2 2 2 2 2 2 Setting 0,01 1,5 0,01
410557 410557 IM8 Cmd Type 16 48 G1 1 1 1 1 1 1 1 1 Setting 0 2 1
410558 410558 IM8 FallBackMode 16 49 G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410559 410559 IM8 DefaultVa+C358ue 16 4A G1 1 1 1 1 1 1 1 1 Setting 0 1 1
410560 410561 IM8 FrameSyncTim 16 4B G35 2 2 2 2 2 2 2 2 Setting 0,01 1,5 0,01
410775 410775 Fn Key 1 17 2 G1 1 1 1 1 1 1 Setting 0 2 1
410776 410776 Fn Key 1 Mode 17 3 G1 1 1 1 1 1 1 Setting 0 1 1
410777 410784 Fn Key 1 Label 17 4 G3 8 8 8 8 8 8 Setting 32 163 1
410785 410785 Fn Key 2 17 5 G1 1 1 1 1 1 1 Setting 0 2 1
410786 410786 Fn Key 2 Mode 17 6 G1 1 1 1 1 1 1 Setting 0 1 1
410787 410794 Fn Key 2 Label 17 7 G3 8 8 8 8 8 8 Setting 32 163 1
410795 410795 Fn Key 3 17 8 G1 1 1 1 1 1 1 Setting 0 2 1
410796 410796 Fn Key 3 Mode 17 9 G1 1 1 1 1 1 1 Setting 0 1 1
410797 410804 Fn Key 3 Label 17 0A G3 8 8 8 8 8 8 Setting 32 163 1
410805 410805 Fn Key 4 17 0B G1 1 1 1 1 1 1 Setting 0 2 1
410806 410806 Fn Key 4 Mode 17 0C G1 1 1 1 1 1 1 Setting 0 1 1
410807 410814 Fn Key 4 Label 17 0D G3 8 8 8 8 8 8 Setting 32 163 1
410815 410815 Fn Key 5 17 0E G1 1 1 1 1 1 1 Setting 0 2 1
410816 410816 Fn Key 5 Mode 17 0F G1 1 1 1 1 1 1 Setting 0 1 1
410817 410824 Fn Key 5 Label 17 10 G3 8 8 8 8 8 8 Setting 32 163 1
410825 410825 Fn Key 6 17 11 G1 1 1 1 1 1 1 Setting 0 2 1
410826 410826 Fn Key 6 Mode 17 12 G1 1 1 1 1 1 1 Setting 0 1 1
410827 410834 Fn Key 6 Label 17 13 G3 8 8 8 8 8 8 Setting 32 163 1
410835 410835 Fn Key 7 17 14 G1 1 1 1 1 1 1 Setting 0 2 1
410836 410836 Fn Key 7 Mode 17 15 G1 1 1 1 1 1 1 Setting 0 1 1
410837 410844 Fn Key 7 Label 17 16 G3 8 8 8 8 8 8 Setting 32 163 1
410845 410845 Fn Key 8 17 17 G1 1 1 1 1 1 1 Setting 0 2 1
410846 410846 Fn Key 8 Mode 17 18 G1 1 1 1 1 1 1 Setting 0 1 1
410847 410854 Fn Key 8 Label 17 19 G3 8 8 8 8 8 8 Setting 32 163 1
410855 410855 Fn Key 9 17 1A G1 1 1 1 1 1 1 Setting 0 2 1
410856 410856 Fn Key 9 Mode 17 1B G1 1 1 1 1 1 1 Setting 0 1 1
410857 410864 Fn Key 9 Label 17 1C G3 8 8 8 8 8 8 Setting 32 163 1
410865 410865 Fn Key 10 17 1D G1 1 1 1 1 1 1 Setting 0 2 1
410866 410866 Fn Key 10 Mode 17 1E G1 1 1 1 1 1 1 Setting 0 1 1
410867 410874 Fn Key 10 Label 17 1F G3 8 8 8 8 8 8 Setting 32 163 1

Group 1
41000 41001 Line Length 30 2 G35 2 2 2 2 2 2 2 2 Setting 300 1000000 10
41002 41003 Line Length 30 3 G35 2 2 2 2 2 2 2 2 Setting 0.2 625 0.005
41004 41005 Line Impedance 30 4 G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41006 41006 Line Angle 30 5 G2 1 1 1 1 1 1 1 1 Setting -90 90 0.1
41007 41007 kZ1 Res Comp 30 8 G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41008 41008 kZ1 Angle 30 9 G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41009 41010 Z1 30 0A G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41011 41012 Z1X 30 0B G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41013 41013 R1G 30 0C G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41014 41014 R1Ph 30 0D G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41015 41015 tZ1 30 0E G2 1 1 1 1 1 1 1 1 Setting 0 10 0.002
41016 41016 kZ2 Res Comp 30 0F G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41017 41017 kZ2 Angle 30 10 G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41018 41019 Z2 30 11 G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41020 41020 R2G 30 12 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41021 41021 R2Ph 30 13 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41022 41022 tZ2 30 14 G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41023 41023 kZ3/4 Res Comp 30 15 G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41024 41024 kZ3/4 Angle 30 16 G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41025 41026 Z3 30 17 G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41027 41027 R3G - R4G 30 18 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41028 41028 R3Ph - R4Ph 30 19 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41029 41029 tZ3 30 1A G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41030 41031 Z4 30 1B G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41032 41032 tZ4 30 1C G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41033 41033 Zone P - Direct. 30 1D G123 1 1 1 1 1 1 1 1 Setting 0 1 1
41034 41034 kZp Res Comp 30 1E G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41035 41035 kZp Angle 30 1F G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41036 41037 Zp 30 20 G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41038 41038 RpG 30 21 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41039 41039 RpPh 30 22 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41040 41040 tZp 30 23 G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41041 41041 Zone Q - Direct. 30 24 G123 1 1 1 1 1 1 1 1 Setting 0 1 1
41042 41042 kZq Res Comp 30 25 G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41043 41043 kZq Angle 30 26 G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41044 41045 Zq 30 27 G35 2 2 2 2 2 2 2 2 Setting .001*V1/ 500*V1/I1001*V1/
41046 41046 RqG 30 28 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 86

Modbus Address Col Row Group Cell Min Max Step


Start End Modbus P441AG P441BG P442AG P442BG P444AG P444BG P444AH P444BH type
41047 41047 RqPh 30 29 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41048 41048 tZq 30 2A G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41049 41049 Serial Comp line 30 2C G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41050 41050 Zone Overlap mode 30 2D G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41051 41051 Z1m Tilt Angle 30 2E G2 1 1 1 1 1 1 1 1 Setting -45 45 1
41052 41052 Z1p Tilt Angle 30 2F G2 1 1 1 1 1 1 1 1 Setting -45 45 1
41053 41053 Z2/Zp Tilt Angle 30 30 G2 1 1 1 1 1 1 1 1 Setting -45 45 1
41054 41054 Fwd Zone Chg Del 30 31 G2 1 1 1 1 1 1 1 1 Setting 0 0,1 0,1
41055 41055 Vmem Time 30 32 G2 1 1 1 1 1 1 1 1 Setting 0 10 0,01
41056 41056 Earth I Detect 30 33 G2 1 1 1 1 1 1 1 1 Setting 0*I1 0.1*I1 0.01*I1
41057 41057 kZm Mutual Comp 30 35 G2 1 1 1 1 1 1 1 1 Setting 0 7 0,01
41058 41058 kZm Angle 30 36 G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41060 41060 Program Mode 31 1 G106 1 1 1 1 1 1 1 1 Setting 0 1 1
41061 41061 Standard Mode 31 2 G107 1 1 1 1 1 1 1 1 Setting 0 6 1
41062 41062 Fault Type 31 3 G115 1 1 1 1 1 1 1 1 Setting 0 2 1
41063 41063 Trip Mode 31 4 G114 1 1 1 1 1 1 Setting 0 2 1
41064 41064 Sig. Send Zone 31 5 G108 1 1 1 1 1 1 1 1 Setting 0 3 1
41065 41065 DistCR 31 6 G109 1 1 1 1 1 1 1 1 Setting 0 5 1
41066 41066 Tp 31 7 G2 1 1 1 1 1 1 1 1 Setting 0 1 0.002
41067 41067 tReversal Guard 31 8 G2 1 1 1 1 1 1 1 1 Setting 0 0.15 0.002
41068 41068 Unblocking Logic 31 9 G113 1 1 1 1 1 1 1 1 Setting 0 2 1
41069 41069 TOR-SOTF Mode 31 0A G118 1 1 1 1 1 1 1 1 Setting 0 127 1
41070 41070 SOFT Delay 31 0B G2 1 1 1 1 1 1 1 1 Setting 10 3600 1
41071 41071 Z1Ext On Chan.Fail 31 0C G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41072 41072 WI :Mode Status 31 0E G116 1 1 1 1 1 1 1 1 Setting 0 3 1
41073 41073 WI : Single Pole Trip 31 0F G37 1 1 1 1 1 1 Setting 0 1 1
41074 41074 WI : V< Thres. 31 10 G2 1 1 1 1 1 1 1 1 Setting 10 70 5
41075 41075 WI : Trip Time Delay 31 11 G2 1 1 1 1 1 1 1 1 Setting 0 1 0.002
41076 41076 PAP : TeleTrip Enable 31 12 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41077 41077 PAP : Trip Delayed Enable 31 13 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41078 41078 PAP : P1 31 14 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41079 41079 PAP : 1P Trip Time Delay 31 15 G2 1 1 1 1 1 1 1 1 Setting 0,1 1,5 0,1
41080 41080 PAP : P2 31 16 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41081 41081 PAP : P3 31 17 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41082 41082 PAP : 3P Trip Delay 31 18 G2 1 1 1 1 1 1 1 1 Setting 1 12 0,1
41083 41083 PAP : Residual Current 31 19 G2 1 1 1 1 1 1 1 1 Setting 0.2*I1 1*I1 0.01*I1
41084 41084 PAP : K 31 1A G2 1 1 1 1 1 1 1 1 Setting 0.5*V1 1*V1 0.05*V1
41085 41085 LoL: Mode Status 31 1C G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41086 41086 LoL. Chan. Fail 31 1D G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41087 41087 LoL: I< 31 1E G2 1 1 1 1 1 1 1 1 Setting 0.05*I1 1*I1 0.05*I1
41088 41088 LoL: Window 31 1F G2 1 1 1 1 1 1 1 1 Setting 0.01 0.1 0.01
41150 41150 DR 32 1 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41151 41151 DX 32 2 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1.01*V1/I
41152 41152 IN > Status 32 3 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41153 41153 IN > (% Imax) 32 4 G2 1 1 1 1 1 1 1 1 Setting 10 100 1
41154 41154 I2 > Status 32 5 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41155 41155 I2 > (% Imax) 32 6 G2 1 1 1 1 1 1 1 1 Setting 10 100 1
41156 41156 Imax Line > Status 32 7 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41157 41157 Imax Line > 32 8 G2 1 1 1 1 1 1 1 1 Setting 1*I1 20*I1 0.01*I1
41158 41158 Delta I Status 32 9 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41159 41159 Unblocking Time-Delay 32 0A G2 1 1 1 1 1 1 1 1 Setting 0 30 0.1
41160 41160 Blocking Zones 32 0B G119 1 1 1 1 1 1 1 1 Setting 0 15 1
41161 41161 Out Of Step 32 0C G1 1 1 1 1 1 1 1 1 Setting 1 255 1
41162 41162 Stable Swing 32 0D G1 1 1 1 1 1 1 1 1 Setting 1 255
41250 41250 I>1 Function 35 1 G43 1 1 1 1 1 1 1 1 Setting 0 10 1
41251 41251 I>1 Directional 35 2 G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41252 41252 I>1 VTS Block 35 3 G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41253 41253 I>1 Current Set 35 4 G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 4.0*I1 0.01*I1
41254 41254 I>1 Time Delay 35 5 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41255 41255 I>1 Time Delay VTS 35 6 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41256 41256 I>1 TMS 35 7 G2 1 1 1 1 1 1 1 1 Setting 0.025 1.2 0.025
41257 41257 I>1 Time Dial 35 8 G2 1 1 1 1 1 1 1 1 Setting 0.5 15 0.1
41258 41258 I>1 Reset Char 35 9 G60 1 1 1 1 1 1 1 1 Setting 0 1 1
41259 41259 I>1 tRESET 35 0A G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41260 41260 I>2 Function 35 0B G43 1 1 1 1 1 1 1 1 Setting 0 10 1
41261 41261 I>2 Directional 35 0C G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41262 41262 I>2 VTS Block 35 0D G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41263 41263 I>2 Current Set 35 0E G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 4.0*I1 0.01*I1
41264 41264 I>2 Time Delay 35 0F G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41265 41265 I>2 Time Delay VTS 35 10 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41266 41266 I>2 TMS 35 11 G2 1 1 1 1 1 1 1 1 Setting 0.025 1.2 0.025
41267 41267 I>2 Time Dial 35 12 G2 1 1 1 1 1 1 1 1 Setting 0.5 15 0.1
41268 41268 I>2 Reset Char 35 13 G60 1 1 1 1 1 1 1 1 Setting 0 1 1
41269 41269 I>2 tRESET 35 14 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41270 41270 I>3 Status 35 15 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41271 41271 I>3 Current Set 35 16 G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 32*I1 0.01*I1
41272 41272 I>3 Time Delay 35 17 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41273 41273 I>4 Status 35 18 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41274 41274 I>4 Current Set 35 19 G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 32*I1 0.01*I1
41275 41275 I>4 Time Delay 35 1A G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41300 41300 I2>1 Function 36 1 G43 1 1 1 1 1 1 1 1 Setting 0 10 1
41301 41301 I2>1 Directional 36 2 G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41302 41302 I2>1 VTS Block 36 3 G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41303 41303 I2>1 Current Set 36 4 G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 4*I1 0.01*I1
41304 41304 I2>1 Time Delay 36 5 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41305 41305 I2>1 Time Delay VTS 36 6 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41306 41306 I2>1 TMS 36 7 G2 1 1 1 1 1 1 1 1 Setting 0.025 1.2 0,005
41307 41307 I2>1 Time Dial 36 8 G2 1 1 1 1 1 1 1 1 Setting 0,01 100 0,01
41308 41308 I2>1 Reset Char 36 9 G60 1 1 1 1 1 1 1 1 Setting 0 1 1
41309 41309 I2>1 tRESET 36 0A G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41310 41310 I2>2 Function 36 0B G43 1 1 1 1 1 1 1 1 Setting 0 10 1
41311 41311 I2>2 Directional 36 0C G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41312 41312 I2>2 VTS Block 36 0D G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41313 41313 I2>2 Current Set 36 0E G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 4*I1 0.01*I1
41314 41314 I2>2 Time Delay 36 0F G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41315 41315 I2>2 Time Delay VTS 36 10 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41316 41316 I2>2 TMS 36 11 G2 1 1 1 1 1 1 1 1 Setting 0.025 1.2 0,005
41317 41317 I2>2 Time Dial 36 12 G2 1 1 1 1 1 1 1 1 Setting 0,01 100 0,01
41318 41318 I2>2 Reset Char 36 13 G60 1 1 1 1 1 1 1 1 Setting 0 1 1
41319 41319 I2>2 tRESET 36 14 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41320 41320 I2>3 Status 36 15 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41321 41321 I2>3 Directional 36 16 G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41322 41322 I2>3 VTS Block 36 17 G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41323 41323 I2>3 Current Set 36 18 G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 32*I1 0.01*I1
41324 41324 I2>3 Time Delay 36 19 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41325 41325 I2>3 Time Delay VTS 36 1A G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41326 41326 I2>4 Status 36 1B G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41327 41327 I2>4 Directional 36 1C G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41328 41328 I2>4 VTS Block 36 1D G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41329 41329 I2>4 Current Set 36 1E G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 32*I1 0.01*I1
41330 41330 I2>4 Time Delay 36 1F G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41325 41325 I2>4 Time Delay VTS 36 1A G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41332 41332 I2> Char Angle 36 21 G2 1 1 1 1 1 1 1 1 Setting -95 95 1
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 87

Modbus Address Col Row Group Cell Min Max Step


Start End Modbus P441AG P441BG P442AG P442BG P444AG P444BG P444AH P444BH type
41350 41350 Broken Conductor 37 1 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41351 41351 I2/I1 Setting 37 2 G2 1 1 1 1 1 1 1 1 Setting 0.2 1 0.01
41352 41352 I2/I1 Time Delay 37 3 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.1
41353 41353 I2/I1 Trip 37 4 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41400 41400 IN>1 Function 38 1 G43 1 1 1 1 1 1 1 1 Setting 0 10 1
41401 41401 IN>1 Directional 38 2 G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41402 41402 IN>1 VTS Block 38 3 G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41403 41403 IN>1 Current Set 38 4 G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 4.0*I1 0.01*I1
41404 41404 IN>1 Time Delay 38 5 G2 1 1 1 1 1 1 1 1 Setting 0 200 0.01
41405 41405 IN>1 Time Delay VTS 38 6 G2 1 1 1 1 1 1 1 1 Setting 0 200 0.01
41406 41406 IN>1 TMS 38 7 G2 1 1 1 1 1 1 1 1 Setting 0.025 1.2 0.025
41407 41407 IN>1 Time Dial 38 8 G2 1 1 1 1 1 1 1 1 Setting 0.5 15 0.1
41408 41408 IN>1 Reset Char 38 9 G60 1 1 1 1 1 1 1 1 Setting 0 1 1
41409 41409 IN>1 tRESET 38 0A G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41410 41410 IN>2 Status 38 0B G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41411 41411 IN>2 Directional 38 0C G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41412 41412 IN>2 VTS Block 38 0D G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41413 41413 IN>2 Current Set 38 0E G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 32*I1 0.01*I1
41414 41414 IN>2 Time Delay 38 0F G2 1 1 1 1 1 1 1 1 Setting 0 200 0.01
41415 41415 IN>2 Time Delay VTS 38 10 G2 1 1 1 1 1 1 1 1 Setting 0 200 0.01
41416 41416 IN>2 TMS 38 11 G2 1 1 1 1 1 1 1 1 Setting 0.025 1.2 0,005
41417 41417 IN>2 Time Dial 38 12 G2 1 1 1 1 1 1 1 1 Setting 0.5 15 0.1
41418 41418 IN>2 Reset Char 38 13 G60 1 1 1 1 1 1 1 1 Setting 0 1 1
41419 41419 IN>2 tRESET 38 14 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41420 41420 IN>3 Status 38 15 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41421 41421 IN>3 Directional 38 16 G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41422 41422 IN>3 VTS Block 38 17 G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41423 41423 IN>3 Current Set 38 18 G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 32*I1 0.01*I1
41424 41424 IN>3 Time Delay 38 19 G2 1 1 1 1 1 1 1 1 Setting 0 200 0.01
41425 41425 IN>3 Time Delay VTS 38 1A G2 1 1 1 1 1 1 1 1 Setting 0 200 0.01
41426 41426 IN>4 Status 38 1B G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41427 41427 IN>4 Directional 38 1C G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41428 41428 IN>4 VTS Block 38 1D G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41429 41429 IN>4 Current Set 38 1E G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 32*I1 0.01*I1
41430 41430 IN>4 Time Delay 38 1F G2 1 1 1 1 1 1 1 1 Setting 0 200 0.01
41431 41431 IN>4 Time Delay VTS 38 20 G2 1 1 1 1 1 1 1 1 Setting 0 200 0.01
41432 41432 IN> Char Angle 38 22 G2 1 1 1 1 1 1 1 1 Setting -95 95 1
41433 41433 Polarisation 38 23 G46 1 1 1 1 1 1 1 1 Setting 0 1 1
41450 41450 Channel Aided DEF Status 39 1 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41451 41451 Polarisation 39 2 G46 1 1 1 1 1 1 1 1 Setting 0 1 1
41452 41452 V> Voltage Set 39 3 G2 1 1 1 1 1 1 1 1 Setting 0.5 20 0.01
41453 41453 IN Forward 39 4 G2 1 1 1 1 1 1 1 1 Setting 0.05*I1 4*I1 0.01*I1
41454 41454 Time Delay 39 5 G2 1 1 1 1 1 1 1 1 Setting 0 10 0.1
41455 41455 Scheme Logic 39 6 G112 1 1 1 1 1 1 1 1 Setting 0 2 1
41456 41456 Tripping 39 7 G48 1 1 1 1 1 1 Setting 0 1 1
41457 41457 Tp 39 8 G2 1 1 1 1 1 1 1 1 Setting 0 2 0,002
41458 41458 IN Rev Factor 39 9 G2 1 1 1 1 1 1 1 1 Setting 0,1 1 0,1
41501 41501 Characteristic 3A 1 G67 1 1 1 1 1 1 1 1 Setting 0 1 1
41502 41502 Thermal Trip 3A 2 G2 1 1 1 1 1 1 1 1 Setting 0 1 1
41503 41503 Thermal Alarm 3A 3 G2 1 1 1 1 1 1 1 1 Setting 0 1 1
41504 41504 Time Constant 1 3A 4 G2 1 1 1 1 1 1 1 1 Setting 0 1 1
41505 41505 Time Constant 2 3A 5 G2 1 1 1 1 1 1 1 1 Setting 0 1 1
41550 41550 VN>1 Function 3B 1 G43 1 1 1 1 1 1 1 1 Setting 0 2 1
41551 41551 VN>1 Voltage Set 3B 2 G2 1 1 1 1 1 1 1 1 Setting 1 80 1
41552 41552 VN>1 Time Delay 3B 3 G2 1 1 1 1 1 1 1 1 Setting 0 100 0,1
41553 41553 VN>1 TMS 3B 4 G2 1 1 1 1 1 1 1 1 Setting 0,5 100 0,5
41554 41554 VN>1 tReset 3B 5 G2 1 1 1 1 1 1 1 1 Setting 0 100 0,1
41555 41555 VN>2 Status 3B 6 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41556 41556 VN>2 Voltage Set 3B 7 G2 1 1 1 1 1 1 1 1 Setting 1 80 1
41557 41557 VN>2 Time Delay 3B 8 G2 1 1 1 1 1 1 1 1 Setting 0 100 0,1
41600 41600 Zero Seq. Power Status 3C 1 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41601 41601 K Time Delay Factor 3C 1 G2 1 1 1 1 1 1 1 1 Setting 0 2 0,2
41602 41602 Basis Time Delay 3C 1 G2 1 1 1 1 1 1 1 1 Setting 0 10 0,01
41603 41603 Residual Current 3C 1 G2 1 1 1 1 1 1 1 1 Setting 0.05*I1 1 0,01
41604 41604 Residual Power 3C 1 G2 1 1 1 1 1 1 1 1 Setting 0,3 0,6 0,03
41949 41949 V< & V> MODE 42 1 G121 1 1 1 1 1 1 1 1 Setting 0 15 1
41950 41950 V< Measur't Mode 42 3 G47 1 1 1 1 1 1 1 1 Setting 0 1 1
41951 41951 V<1 Function 42 4 G23 1 1 1 1 1 1 1 1 Setting 0 2 1
41952 41952 V<1 Voltage Set 42 5 G2 1 1 1 1 1 1 1 1 Setting 10 120 1
41953 41953 V<1 Time Delay 42 6 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41954 41954 V<1 TMS 42 7 G2 1 1 1 1 1 1 1 1 Setting 0.5 100 0.5
41955 41955 V<2 Status 42 8 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41956 41956 V<2 Voltage Set 42 9 G2 1 1 1 1 1 1 1 1 Setting 10 120 1
41957 41957 V<2 Time Delay 42 0A G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41958 41958 V> Measur't Mode 42 0C G47 1 1 1 1 1 1 1 1 Setting 0 1 1
41959 41959 V>1 Function 42 0D G23 1 1 1 1 1 1 1 1 Setting 0 2 1
41960 41960 V>1 Voltage Set 42 0E G2 1 1 1 1 1 1 1 1 Setting 60 185 1
41961 41961 V>1 Time Delay 42 0F G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41962 41962 V>1 TMS 42 10 G2 1 1 1 1 1 1 1 1 Setting 0.5 100 0.5
41963 41963 V>2 Status 42 11 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41964 41964 V>2 Voltage Set 42 12 G2 1 1 1 1 1 1 1 1 Setting 60 185 1
41965 41965 V>2 Time Delay 42 13 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
42049 42052 Date/Time 1 G12 4 4 4 4 4 4 4 4 Setting
42100 42100 CB Fail 1 Status 45 2 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
42101 42101 CB Fail 1 Timer 45 3 G2 1 1 1 1 1 1 1 1 Setting 0 10 0.005
42102 42102 CB Fail 2 Status 45 4 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
42103 42103 CB Fail 2 Timer 45 5 G2 1 1 1 1 1 1 1 1 Setting 0 10 0.005
42104 42104 CBF Non I Reset 45 6 G68 1 1 1 1 1 1 1 1 Setting 0 2 1
42105 42105 CBF Ext Reset 45 7 G68 1 1 1 1 1 1 1 1 Setting 0 2 1
42106 42106 I < Current Set 45 9 G2 1 1 1 1 1 1 1 1 Setting 0.05*I1 3.2*I1 0.1*I1
42150 42150 VTS Time Delay 46 2 G2 1 1 1 1 1 1 1 1 Setting 1 20 1
42151 42151 VTS I2> & I0> Inhibit 46 3 G2 1 1 1 1 1 1 1 1 Setting 0 1.0*I1 0.01*I1
42152 42152 CTS Status 46 8 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
42153 42153 CTS VN< Inhibit 46 9 G2 1 1 1 1 1 1 1 1 Setting 0.5 22 0.5
42154 42154 CTS IN> Set 46 0A G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 4*I1 0.01*I1
42155 42155 CTS Time Delay 46 0B G2 1 1 1 1 1 1 1 1 Setting 0 10 1
42156 42156 CVTS Status 46 0C G37 1 1 1 1 1 1 1 1 Setting 0 0 1
42157 42157 CVTS VN> 46 0D G2 1 1 1 1 1 1 1 1 Setting 0,01 0,1 0,01
42158 42158 CVTS Time Delay 46 0E G2 1 1 1 1 1 1 1 1 Setting 0 300 1
42250 42250 C/S Check Schem. for A/R 48 1 G103 1 1 1 1 Setting 0 7 1
42251 42251 C/S Check Schem. for Man CB 48 2 G103 1 1 1 1 Setting 0 7 1
42252 42252 V< Dead Line 48 3 G2 1 1 1 1 Setting 5 30 1
42253 42253 V> Live Line 48 4 G2 1 1 1 1 Setting 30 120 1
42254 42254 V< Dead Bus 48 5 G2 1 1 1 1 Setting 5 30 1
42255 42255 V> Live Bus 48 6 G2 1 1 1 1 Setting 30 120 1
42256 42256 Diff Voltage 48 7 G2 1 1 1 1 Setting 0.5 40 0.1
42257 42257 Diff Frequency 48 8 G2 1 1 1 1 Setting 0.02 1 0.01
42258 42258 Diff Phase 48 9 G2 1 1 1 1 Setting 5 90 2.5
42259 42259 Bus-Line Delay 48 0A G2 1 1 1 1 Setting 0.1 2 0.1
42300 42300 1P Trip Mode 49 2 G101 1 1 1 1 1 1 Setting 0 3 1
42301 42301 3P Trip Mode 49 3 G102 1 1 1 1 1 1 1 1 Setting 0 3 1
42302 42302 1P Rcl - Dead Time 1 49 4 G2 1 1 1 1 1 1 Setting 0.1 5 0.01
42303 42303 3P Rcl - Dead Time 1 49 5 G2 1 1 1 1 1 1 1 1 Setting 0.1 60 0.01
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 88

Modbus Address Col Row Group Cell Min Max Step


Start End Modbus P441AG P441BG P442AG P442BG P444AG P444BG P444AH P444BH type
42304 42304 Dead Time 2 49 6 G2 1 1 1 1 1 1 1 1 Setting 1 3600 1
42305 42305 Dead Time 3 49 7 G2 1 1 1 1 1 1 1 1 Setting 1 3600 1
42306 42306 Dead Time 4 49 8 G2 1 1 1 1 1 1 1 1 Setting 1 3600 1
42307 42307 Reclaim Time 49 9 G2 1 1 1 1 1 1 1 1 Setting 1 600 1
42308 42308 Reclose Time Delay 49 0A G2 1 1 1 1 1 1 1 1 Setting 0.1 10 0.1
42309 42309 Discrimination Time 49 0B G2 1 1 1 1 1 1 1 1 Setting 0,1 5 0,01
42310 42310 A/R Inhbit Wind 49 0C G2 1 1 1 1 1 1 1 1 Setting 1 3600 1
42311 42311 C/S on 3P Rcl DT1 49 0D G37 1 1 1 1 1 1 1 1 Setting 0 1 1
42312 41313 Block A/R 49 0F G117 2 2 2 2 2 2 2 2 Setting 0 524287 1
42400 42407 Opto Input 1 4A 1 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42408 42415 Opto Input 2 4A 2 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42416 42423 Opto Input 3 4A 3 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42424 42431 Opto Input 4 4A 4 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42432 42439 Opto Input 5 4A 5 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42440 42447 Opto Input 6 4A 6 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42448 42455 Opto Input 7 4A 7 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42456 42463 Opto Input 8 4A 8 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42464 42471 Opto Input 9 4A 9 G3 8 8 8 8 8 8 Setting 32 163 1
42472 42479 Opto Input 10 4A 0A G3 8 8 8 8 8 8 Setting 32 163 1
42480 42487 Opto Input 11 4A 0B G3 8 8 8 8 8 8 Setting 32 163 1
42488 42495 Opto Input 12 4A 0C G3 8 8 8 8 8 8 Setting 32 163 1
42496 42503 Opto Input 13 4A 0D G3 8 8 8 8 8 8 Setting 32 163 1
42504 42511 Opto Input 14 4A 0E G3 8 8 8 8 8 8 Setting 32 163 1
42512 42519 Opto Input 15 4A 0F G3 8 8 8 8 8 8 Setting 32 163 1
42520 42527 Opto Input 16 4A 10 G3 8 8 8 8 8 8 Setting 32 163 1
42528 42535 Opto Input 17 4A 11 G3 8 8 8 8 Setting 32 163 1
42536 42543 Opto Input 18 4A 12 G3 8 8 8 8 Setting 32 163 1
42544 42551 Opto Input 19 4A 13 G3 8 8 8 8 Setting 32 163 1
42552 42559 Opto Input 20 4A 14 G3 8 8 8 8 Setting 32 163 1
42560 42567 Opto Input 21 4A 15 G3 8 8 8 8 Setting 32 163 1
42568 42575 Opto Input 22 4A 16 G3 8 8 8 8 Setting 32 163 1
42576 42583 Opto Input 23 4A 17 G3 8 8 8 8 Setting 32 163 1
42584 42591 Opto Input 24 4A 18 G3 8 8 8 8 Setting 32 163 1
42600 42607 Relay 1 4B 1 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42608 42615 Relay 2 4B 2 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42616 42623 Relay 3 4B 3 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42624 42631 Relay 4 4B 4 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42632 42639 Relay 5 4B 5 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42640 42647 Relay 6 4B 6 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42648 42655 Relay 7 4B 7 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42656 42663 Relay 8 4B 8 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42664 42671 Relay 9 4B 9 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42672 42679 Relay 10 4B 0A G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42680 42687 Relay 11 4B 0B G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42688 42695 Relay 12 4B 0C G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42696 42703 Relay 13 4B 0D G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42704 42711 Relay 14 4B 0E G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42712 42719 Relay 15 4B 0F G3 8 8 8 8 8 8 Setting 32 163 1
42720 42727 Relay 16 4B 10 G3 8 8 8 8 8 8 Setting 32 163 1
42728 42735 Relay 17 4B 11 G3 8 8 8 8 8 8 Setting 32 163 1
42736 42743 Relay 18 4B 12 G3 8 8 8 8 8 8 Setting 32 163 1
42744 42751 Relay 19 4B 13 G3 8 8 8 8 8 8 Setting 32 163 1
42752 42759 Relay 20 4B 14 G3 8 8 8 8 8 8 Setting 32 163 1
42760 42767 Relay 21 4B 15 G3 8 8 8 8 8 8 Setting 32 163 1
42768 42775 Relay 22 4B 16 G3 8 8 8 8 Setting 32 163 1
42776 42783 Relay 23 4B 17 G3 8 8 8 8 Setting 32 163 1
42784 42791 Relay 24 4B 18 G3 8 8 8 8 Setting 32 163 1
42792 42799 Relay 25 4B 19 G3 8 8 8 8 Setting 32 163 1
42800 42807 Relay 26 4B 1A G3 8 8 8 8 Setting 32 163 1
42808 42815 Relay 27 4B 1B G3 8 8 8 8 Setting 32 163 1
42816 42823 Relay 28 4B 1C G3 8 8 8 8 Setting 32 163 1
42824 42831 Relay 29 4B 1D G3 8 8 8 8 Setting 32 163 1
42832 42839 Relay 30 4B 1E G3 8 8 8 8 Setting 32 163 1
42840 42847 Relay 31 4B 1F G3 8 8 8 8 Setting 32 163 1
42848 42855 Relay 32 4B 20 G3 8 8 8 8 Setting 32 163 1
42856 42855 Relay 33 4B 21 G3 8 8 Setting 32 163 1
42864 42863 Relay 34 4B 22 G3 8 8 Setting 32 163 1
42872 42871 Relay 35 4B 23 G3 8 8 Setting 32 163 1
42880 42879 Relay 36 4B 24 G3 8 8 Setting 32 163 1
42888 42887 Relay 37 4B 25 G3 8 8 Setting 32 163 1
42896 42895 Relay 38 4B 26 G3 8 8 Setting 32 163 1
42904 42903 Relay 39 4B 27 G3 8 8 Setting 32 163 1
42912 42911 Relay 40 4B 28 G3 8 8 Setting 32 163 1
42920 42919 Relay 41 4B 29 G3 8 8 Setting 32 163 1
42928 42927 Relay 42 4B 2A G3 8 8 Setting 32 163 1
42936 42935 Relay 43 4B 2B G3 8 8 Setting 32 163 1
42944 42943 Relay 44 4B 2C G3 8 8 Setting 32 163 1
42952 42951 Relay 45 4B 2D G3 8 8 Setting 32 163 1
42960 42959 Relay 46 4B 2E G3 8 8 Setting 32 163 1
43000 44999 Repeat of Group 1 columns/rows 50 00
45000 46999 Repeat of Group 1 columns/rows 70 00
47000 48999 Repeat of Group 1 columns/rows 90 00
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Part E: IEC870-5-103 (VDEW) Interoperability Guide


Model Number
ASDU COT INF FUN Description GI Interpretation
P441 P442 P444G P444H

System Functions(Monitor)

8 10 0 128 End of General Interrogration * * *


6 8 0 128 Time Syncronisation * * *
5 3 2 128 Reset FCB * * *
5 4 3 128 Reset CU * * *
5 5 4 128 Start/Restart * * *
5 6 5 128 Power On * * *

Note: Identification message in ASDU 5: ALSTOM P44x Software ref i.e. ALSTOM P444 3.0

Status Indications
1 1,7,9,11,12,20,21 16 128 Auto-recloser active * * * * DDB_PRT_AR_ENABLE
1 1,7,9,11,12,20,21 17 Tele-protection active
1 1,7,9,11,12,20,21 18 Protection active
1 1,7,9,11,12,20,21 19 128 LED Reset * * * RESET_INDICATIONS
1 9,11 20 Monitor direction blocked
1 9,11 21 128 Test mode * * * * DDB_ALARM_PROT_DISABLED
1 9,11 22 Local parameter setting
1 1,7,9,11,12,20,21 23 128 Characteristic 1 * * * * PG1 Changed
1 1,7,9,11,12,20,21 24 128 Characteristic 2 * * * * PG2 Changed
1 1,7,9,11,12,20,21 25 128 Characteristic 3 * * * * PG3 Changed
1 1,7,9,11,12,20,21 26 128 Characteristic 4 * * * * PG4 Changed
1 1,7,9,11 27 128 Auxillary input 1 * * * * DDB_OPTO_ISOLATOR_1
1 1,7,9,11 28 128 Auxillary input 2 * * * * DDB_OPTO_ISOLATOR_2
1 1,7,9,11 29 128 Auxillary input 3 * * * * DDB_OPTO_ISOLATOR_3
1 1,7,9,11 30 128 Auxillary input 4 * * * * DDB_OPTO_ISOLATOR_4

Supervision Indications
1 1,7,9 32 Measurand supervision I
1 1,7,9 33 Measurand supervision V
1 1,7,9 35 Phase sequence supervision
1 1,7,9 36 128 Trip circuit supervision * * * * DDB_ALARM_CTS
1 1,7,9 37 I>> back-up supervision
1 1,7,9 38 128 VT fuse failure * * * * DDB_ALARM_VTS_SLOW
1 1,7,9 39 128 Teleprotection disturbed * * * * DDB_ALARM_COS
1 1,7,9 46 Group warning
1 1,7,9 47 Group alarm

Earth Fault Indications


1 1,7,9 48 128 Earth Fault L1 * * * * DDB_PRT_DEF_START_AN
1 1,7,9 49 128 Earth Fault L2 * * * * DDB_PRT_DEF_START_BN
1 1,7,9 50 128 Earth Fault L3 * * * * DDB_PRT_DEF_START_CN
1 1,7,9 51 128 Earth Fault Fwd * * * * DDB_PRT_DEF_FWD
1 1,7,9 52 128 Earth Fault Rev * * * * DDB_PRT_DEF_REV

Fault Indications

2 1,7,9 64 128 Start /pickup L1 * * * * DDB_PRT_DIST_START_A


2 1,7,9 65 128 Start /pickup L2 * * * * DDB_PRT_DIST_START_B
2 1,7,9 66 128 Start /pickup L3 * * * * DDB_PRT_DIST_START_C
2 1,7,9 67 128 Start /pickup N * * * * DDB_PRT_DIST_START_N
2 1,7 68 128 General Trip * * * DDB_PRT_ANY_TRIP
2 1,7 69 128 Trip L1 * * * DDB_PRT_DIST_TRIP_A
2 1,7 70 128 Trip L2 * * * DDB_PRT_DIST_TRIP_B
2 1,7 71 128 Trip L3 * * * DDB_PRT_DIST_TRIP_C
2 1,7 72 Trip I>> (backup)
4 1,7 73 128 Fault Location in ohms * * *
2 1,7 74 128 Fault forward * * * DDB_PRT_DIST_FWD
2 1,7 75 128 Fault reverse * * * DDB_PRT_DIST_REV
2 1,7 76 128 Teleprotection signal sent * * * DDB_PRT_CARRIER_SEND
1 1,7 77 128 Teleprotection signal received * * * DDB_PRT_UNB_CR
2 1,7 78 128 Zone 1 * * * DDB_PRT_Z1
2 1,7 79 128 Zone 2 * * * DDB_PRT_Z2
2 1,7 80 128 Zone 3 * * * DDB_PRT_Z3
2 1,7 81 128 Zone 4 * * * DDB_PRT_Z4
2 1,7 82 128 Zone 5 * * * DDB_PRT_ZP
2 1,7 83 128 Zone 6 * * * DDB_PRT_ZQ
2 1,7,9 84 128 General Start * * * * DDB_PRT_ANY_START
2 1,7 85 128 Breaker Failure * * * DDB_ALARM_BREAKER_FAIL
2 1,7 86 Trip measuring system L1
2 1,7 87 Trip measuring system L2
2 1,7 88 Trip measuring system L3
2 1,7 89 Trip measuring system E
2 1,7 90 128 Trip I> * * * DDB_PRT_I_SUP_1_TRIP
2 1,7 91 128 Trip I>> * * * DDB_PRT_I_SUP_2_TRIP
2 1,7 92 128 Trip IN> * * * DDB_PRT_IN_SUP1_TRIP
2 1,7 93 128 Trip IN>> * * * DDB_PRT_IN_SUP2_TRIP

Auto-Reclose Indications (Monitor)


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Part E: IEC870-5-103 (VDEW) Interoperability Guide


1 1,7 128 128 CB 'on' by A/R * * * DDB_PRT_AR_CLOSE
1 1,7 129 CB 'on' by long time A/R
1 1,7,9 130 128 AR blocked * * * * DDB_PRT_AR_LOCKOUT

Measurands (Monitor)
3,1 2,7 144 128 Measurand I
3,2 2,7 145 128 Measurands I,V
3,3 2,7 146 128 Measurands I,V,P,Q
3,4 2,7 147 128 Measurands IN,VEN
9 2,7 148 128 Measurands IL1,2,3,VL1,2,3,P,Q,f * * *

Generic Functions(Monitor)
10 42,43 240 128 Read Headings
10 42,43 241 128 Read attributes of all entries of a group
10 42,43 243 128 Read directory of entry
10 1,2,7,9,11,12,42,43 244 128 Real attribute of entry
10 10 245 128 End of GGI
10 41,44 249 128 Write entry with confirm
10 40,41 250 128 Write entry with execute
10 40 251 128 Write entry aborted

System Functions (Control)


7 9 0 Init General Interrogation * * *
6 8 Time Syncronisation * * *

General Commands
20 20 16 128 Auto-recloser on/off * * *
20 20 17 Teleprotection on/off
20 20 18 Protection on/off
20 20 19 128 LED Reset * * *
20 20 23 128 Activate characteristic 1 * * *
20 20 24 128 Activate characteristic 2 * * *
20 20 25 128 Activate characteristic 3 * * *
20 20 26 128 Activate characteristic 4 * * *

Generic Functions
21 42 240 254 Read headings of all defined groups
21 42 241 254 Read single attribute of all entries of a group
21 42 243 254 Read directory of single entry
21 42 244 254 Read attribute of sngle entry
21 9 245 254 Generic General Interrogation (GGI)
10 40 248 254 Write entry
10 40 249 254 Write with confirm
10 40 250 254 Write with execute
10 40 251 254 Write entry abort

Non Standard Actual Channel for disturbance recorder in monitor direction


TYP ASDU COT ACC FUN Description GI 2 3 4G 4H
27,30,31 31 245 128 Private channel for frequency * * *

Non Standard Information numbers in monitor direction


TYP ASDU COT INF FUN Description GI 2 3 4G 4H DDB Element Name Ordinal
1 1,7,9 0 130 * * * * DDB_OUTPUT_RELAY_1 0
1 1,7,9 1 130 * * * * DDB_OUTPUT_RELAY_2 1
1 1,7,9 2 130 * * * * DDB_OUTPUT_RELAY_3 2
1 1,7,9 3 130 * * * * DDB_OUTPUT_RELAY_4 3
1 1,7,9 4 130 * * * * DDB_OUTPUT_RELAY_5 4
1 1,7,9 5 130 * * * * DDB_OUTPUT_RELAY_6 5
1 1,7,9 6 130 * * * * DDB_OUTPUT_RELAY_7 6
1 1,7,9 7 130 * * * * DDB_OUTPUT_RELAY_8 7
1 1,7,9 8 130 * * * * DDB_OUTPUT_RELAY_9 8
1 1,7,9 9 130 * * * * DDB_OUTPUT_RELAY_10 9
1 1,7,9 10 130 * * * * DDB_OUTPUT_RELAY_11 10
1 1,7,9 11 130 * * * * DDB_OUTPUT_RELAY_12 11
1 1,7,9 12 130 * * * * DDB_OUTPUT_RELAY_13 12
1 1,7,9 13 130 * * * * DDB_OUTPUT_RELAY_14 13
1 1,7,9 14 130 * * * * DDB_OUTPUT_RELAY_15 14
1 1,7,9 15 130 * * * * DDB_OUTPUT_RELAY_16 15
1 1,7,9 16 130 * * * * DDB_OUTPUT_RELAY_17 16
1 1,7,9 17 130 * * * * DDB_OUTPUT_RELAY_18 17
1 1,7,9 18 130 * * * * DDB_OUTPUT_RELAY_19 18
1 1,7,9 19 130 * * * * DDB_OUTPUT_RELAY_20 19
1 1,7,9 20 130 * * * * DDB_OUTPUT_RELAY_21 20
1 1,7,9 21 130 * * * DDB_OUTPUT_RELAY_22 21
1 1,7,9 22 130 * * * DDB_OUTPUT_RELAY_23 22
1 1,7,9 23 130 * * * DDB_OUTPUT_RELAY_24 23
1 1,7,9 24 130 * * * DDB_OUTPUT_RELAY_25 24
1 1,7,9 25 130 * * * DDB_OUTPUT_RELAY_26 25
1 1,7,9 26 130 * * * DDB_OUTPUT_RELAY_27 26
1 1,7,9 27 130 * * * DDB_OUTPUT_RELAY_28 27
1 1,7,9 28 130 * * * DDB_OUTPUT_RELAY_29 28
1 1,7,9 29 130 * * * DDB_OUTPUT_RELAY_30 29
1 1,7,9 30 130 * * * DDB_OUTPUT_RELAY_31 30
1 1,7,9 31 130 * * * DDB_OUTPUT_RELAY_32 31
1 1,7,9 32 130 * * DDB_OUTPUT_RELAY_33 32
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Part E: IEC870-5-103 (VDEW) Interoperability Guide


1 1,7,9 33 130 * * DDB_OUTPUT_RELAY_34 33
1 1,7,9 34 130 * * DDB_OUTPUT_RELAY_35 34
1 1,7,9 35 130 * * DDB_OUTPUT_RELAY_36 35
1 1,7,9 36 130 * * DDB_OUTPUT_RELAY_37 36
1 1,7,9 37 130 * * DDB_OUTPUT_RELAY_38 37
1 1,7,9 38 130 * * DDB_OUTPUT_RELAY_39 38
1 1,7,9 39 130 * * DDB_OUTPUT_RELAY_40 39
1 1,7,9 40 130 * * DDB_OUTPUT_RELAY_41 40
1 1,7,9 41 130 * * DDB_OUTPUT_RELAY_42 41
1 1,7,9 42 130 * * DDB_OUTPUT_RELAY_43 42
1 1,7,9 43 130 * * DDB_OUTPUT_RELAY_44 43
1 1,7,9 44 130 * * DDB_OUTPUT_RELAY_45 44
63 130 DDB_OUTPUT_RELAY_64
1 1,7,9,11 27 128 Opto 1 * * * * DDB_OPTO_ISOLATOR_1 64
1 1,7,9,11 28 128 Opto 2 * * * * DDB_OPTO_ISOLATOR_2 65
1 1,7,9,11 29 128 Opto 3 * * * * DDB_OPTO_ISOLATOR_3 66
1 1,7,9,11 30 128 Opto 4 * * * * DDB_OPTO_ISOLATOR_4 67
1 1,7,9,11 68 130 * * * * DDB_OPTO_ISOLATOR_5 68
1 1,7,9,11 69 130 * * * * DDB_OPTO_ISOLATOR_6 69
1 1,7,9,11 70 130 * * * * DDB_OPTO_ISOLATOR_7 70
1 1,7,9,11 71 130 * * * * DDB_OPTO_ISOLATOR_8 71
1 1,7,9,11 72 130 * * * * DDB_OPTO_ISOLATOR_9 72
1 1,7,9,11 73 130 * * * * DDB_OPTO_ISOLATOR_10 73
1 1,7,9,11 74 130 * * * * DDB_OPTO_ISOLATOR_11 74
1 1,7,9,11 75 130 * * * * DDB_OPTO_ISOLATOR_12 75
1 1,7,9,11 76 130 * * * * DDB_OPTO_ISOLATOR_13 76
1 1,7,9,11 77 130 * * * * DDB_OPTO_ISOLATOR_14 77
1 1,7,9,11 78 130 * * * * DDB_OPTO_ISOLATOR_15 78
1 1,7,9,11 79 130 * * * * DDB_OPTO_ISOLATOR_16 79
1 1,7,9,11 80 130 * * * DDB_OPTO_ISOLATOR_17 80
1 1,7,9,11 81 130 * * * DDB_OPTO_ISOLATOR_18 81
1 1,7,9,11 82 130 * * * DDB_OPTO_ISOLATOR_19 82
1 1,7,9,11 83 130 * * * DDB_OPTO_ISOLATOR_20 83
1 1,7,9,11 84 130 * * * DDB_OPTO_ISOLATOR_21 84
1 1,7,9,11 85 130 * * * DDB_OPTO_ISOLATOR_22 85
1 1,7,9,11 86 130 * * * DDB_OPTO_ISOLATOR_23 86
95 130 DDB_OPTO_ISOLATOR_32 95
96 130 DDB_UNUSED_96 96
97 130 DDB_UNUSED_97 97
98 130 DDB_UNUSED_98 98
99 130 DDB_UNUSED_99 99
1 1,7 100 130 DDB_INP_TRIP_LED 100
1 1,7 101 130 DDB_INP_TZQ_TIMER_BLOCK 101
1 1,7 102 130 DDB_INP_OVEU0_TIMER_BLOCK_1 102
1 1,7 103 130 DDB_INP_OVEU0_TIMER_BLOCK_2 103
1 1,7 104 130 DDB_INP_52A_A 104
1 1,7 105 130 DDB_INP_52B_A 105
1 1,7 106 130 DDB_INP_52A_B 106
1 1,7 107 130 DDB_INP_52B_B 107
1 1,7 108 130 DDB_INP_52A_C 108
1 1,7 109 130 DDB_INP_52B_C 109
1 1,7 110 130 DDB_INP_SPAR 110
1 1,7 111 130 DDB_INP_TPAR 111
1 1,7 112 130 DDB_INP_AR_INTERNAL 112
1 1,7 113 130 DDB_INP_AR_CYCLE_1P 113
1 1,7 114 130 DDB_INP_AR_CYCLE_3P 114
1 1,7 115 130 DDB_INP_AR_CLOSING 115
1 1,7 116 130 DDB_INP_RECLAIM 116
1 1,7 117 130 DDB_INP_BAR 117
1 1,7 118 130 DDB_INP_CTL_CHECK_SYNCH 118
1 1,7 119 130 DDB_INP_CB_HEALTHY 119
1 1,7 120 130 DDB_INP_BLK_PROTECTION 120
1 1,7 121 130 DDB_INP_TRP_3P 121
1 1,7 122 130 DDB_INP_CB_MAN 122
1 1,7 123 130 DDB_INP_CB_TRIP_MAN 123
1 1,7 124 130 DDB_INP_DISC 124
1 1,7 125 130 DDB_INP_PROTA 125
1 1,7 126 130 DDB_INP_PROTB 126
1 1,7 127 130 DDB_INP_PROTC 127
1 1,7 128 130 DDB_INP_CR 128
1 1,7 129 130 DDB_INP_CR_DEF 129
1 1,7 130 130 DDB_INP_COS 130
1 1,7 131 130 DDB_INP_COS_DEF 131
1 1,7 132 130 DDB_INP_Z1X_EXT 132
1 1,7 133 130 DDB_INP_MCB_VTS_BUS 133
1 1,7 134 130 DDB_INP_MCB_VTS_LINE 134
1 1,7 135 130 DDB_INP_SBEF_TIMER_BLOCK_1 135
1 1,7 136 130 DDB_INP_SBEF_TIMER_BLOCK_2 136
1 1,7 137 130 DDB_INP_DEF_TIMER_BLOCK 137
1 1,7 138 130 DDB_INP_PHOC_TIMER_BLOCK_1 138
1 1,7 139 130 DDB_INP_PHOC_TIMER_BLOCK_2 139
1 1,7 140 130 DDB_INP_PHOC_TIMER_BLOCK_3 140
1 1,7 141 130 DDB_INP_PHOC_TIMER_BLOCK_4 141
1 1,7 142 130 DDB_INP_NPS_TIMER_BLOCK_1 142
1 1,7 143 130 DDB_INP_UNDU_TIMER_BLOCK_1 143
1 1,7 144 130 DDB_INP_UNDU_TIMER_BLOCK_2 144
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Part E: IEC870-5-103 (VDEW) Interoperability Guide


1 1,7 145 130 DDB_INP_OVEU_TIMER_BLOCK_1 145
1 1,7 146 130 DDB_INP_OVEU_TIMER_BLOCK_2 146
1 1,7 147 130 DDB_INP_DISTANCE_TIMER_BLOCK 147
1 1,7 148 130 DDB_INP_CB_RESET_LOCKOUT 148
1 1,7 149 130 DDB_INP_CB_RESET_ALL_VALUES 149
1 1,7 150 130 DDB_INP_RESET_RELAYS_LEDS 150
1 1,7 151 130 DDB_INP_STUB_BUS 151
1 1,7 152 130 DDB_INP_TRIP_A_USER 152
1 1,7 153 130 DDB_INP_TRIP_B_USER 153
1 1,7 154 130 DDB_INP_TRIP_C_USER 154
1 1,7 155 130 DDB_INP_ZSP_TIMER_BLOCK 155
1 1,7 156 130 DDB_INP_PAP_TELETRIP_REC 156
1 1,7 157 130 DDB_INP_PAP_TELETRIP_HEALT 157
1 1,7 158 130 DDB_INP_PAP_TIMER_BLOCK 158
1 1,7 159 130 DDB_INP_SBEF_TIMER_BLOCK_3 159
1 1,7 160 130 DDB_INP_SBEF_TIMER_BLOCK_4 160
1 1,7 161 130 DDB_INP_RESET_THERMAL 161
173 130 DDB_ALARM_UNUSED0 173
1 1,7,9 174 130 * * * * * DDB_ALARM_GENERAL 174
1 9,11 21 128 Test mode * * * * * DDB_ALARM_PROT_DISABLED 175
1 1,7,9 176 130 * * * * * DDB_ALARM_F_OUT_OF_RANGE 176
1 1,7,9 38 128 VT fuse failure * * * * * DDB_ALARM_VTS_SLOW 177
1 1,7,9 36 128 Trip circuit supervision * * * * * DDB_ALARM_CTS 178
2 1,7,9 85 128 Breaker Failure * * * * DDB_ALARM_BREAKER_FAIL 179
1 1,7,9 180 130 * * * * * DDB_ALARM_I_BROK_MAINT 180
1 1,7,9 181 130 * * * * * DDB_ALARM_I_BROK_LOCKOUT 181
1 1,7,9 182 130 * * * * * DDB_ALARM_CB_OPS_MAINT 182
1 1,7,9 183 130 * * * * * DDB_ALARM_CB_OPS_LOCKOUT 183
1 1,7,9 184 130 * * * * * DDB_ALARM_CB_OP_TIME_MAINT 184
1 1,7,9 185 130 * * * * * DDB_ALARM_CB_OP_TIME_LOCKOUT 185
1 1,7,9 186 130 * * * * * DDB_ALARM_PRE_LOCKOUT 186
1 1,7,9 187 130 * * * * * DDB_ALARM_EFF_LOCKOUT 187
1 1,7,10 188 130 * * * * * DDB_LOCKOUT_ALARM 188
1 1,7,9 189 130 * * * * * DDB_ALARM_CB_STATUS 189
1 1,7,9 190 130 * * * * * DDB_ALARM_CB_FAIL_TRIP 190
1 1,7,9 191 130 * * * * * DDB_ALARM_CB_FAIL_CLOSE 191
1 1,7,9 192 130 * * * * * DDB_ALARM_CB_CONTROL_UNHEALTHLY 192
1 1,7,9 193 130 * * * * * DDB_ALARM_NO_CHECK_SYNC_CONTROL 193
1 1,7,9 194 130 * * * * * DDB_ALARM_AR_LOCKOUT_MAX_SHOTS 194
1 1,7,9 195 130 * * * * * DDB_ALARM_SG_OPTO_INVALID 195
1 1,7,9 196 130 * * * * * DDB_ALARM_CB_FAIL_AR 196
1 1,7,9 197 130 * * * * * DDB_ALARM_UNDER_V_1 197
1 1,7,9 198 130 * * * * * DDB_ALARM_UNDER_V_2 198
1 1,7,9 199 130 * * * * * DDB_ALARM_OVER_V_1 199
1 1,7,9 200 130 * * * * * DDB_ALARM_OVER_V_2 200
1 1,7,9 39 128 Teleprotection disturbed * * * * * DDB_ALARM_COS 201
1 1,7,9 202 130 * * * * * DDB_ALARM_BROKEN_COND 202
1 1,7,9 203 130 * * * * * DDB_ALARM_CVTS 203
1 1,7,9 204 130 * * * * * DDB_ALARM_NOPRESENTS_DATAS_ACQ 204
1 1,7,9 205 130 * * * * * DDB_ALARM_VALIDITY_FAILURE_ACQ 205
1 1,7,9 206 130 * * * * * DDB_ALARM_MODE_TEST_ACQ 206
1 1,7,9 207 130 * * * * * DDB_ALARM_NOTSYNCHRO_DATAS_ACQ 207
1 1,7,9 208 130 * * * * * DDB_ALARM_USER1 208
1 1,7,9 209 130 * * * * * DDB_ALARM_USER2 209
1 1,7,9 210 130 * * * * * DDB_ALARM_USER3 210
1 1,7,9 211 130 * * * * * DDB_ALARM_USER4 211
1 1,7,9 222 130 DDB_ALARM_UNUSED222 222
1 1,7 128 128 CB 'on' by A/R * * * * DDB_PRT_AR_CLOSE 223
1 1,7,9 224 130 * * * * * DDB_PRT_AR_1POLE_IN_PROG 224
1 1,7,9 225 130 * * * * * DDB_PRT_AR_3POLE_IN_PROG 225
226 130 DDB_PRT_AR_1ST_CYCLE_IN_PROG 226
227 130 DDB_PRT_AR_234TH_CYCLE_IN_PROG 227
1 1,7,9 228 130 * * * * * DDB_PRT_AR_TRIP_3PH 228
1 1,7,9 229 130 * * * * * DDB_PRT_AR_RECLAIM 229
1 1,7,9 230 130 * * * * * DDB_PRT_AR_DISCRIM 230
1 1,7,9,11,12,20,21 16 128 Auto-recloser active * * * * * DDB_PRT_AR_ENABLE 231
1 1,7,9 232 130 * * * * * DDB_PRT_AR_1PAR_ENABLE 232
1 1,7,9 233 130 * * * * * DDB_PRT_AR_3PAR_ENABLE 233
1 1,7,9 130 128 AR blocked * * * * * DDB_PRT_AR_LOCKOUT 234
1 1,7,9 235 130 * * * * DDB_PRT_AR_FORCE_SYNC 235
1 1,7,9 236 130 * * * * * DDB_PRT_SYNC 236
237 130 DDB_PRT_DEAD_LINE 237
238 130 DDB_PRT_LIVE_LINE 238
239 130 DDB_PRT_DEAD_BUS 239
240 130 DDB_PRT_LIVE_BUS 240
2 241 130 * * * * * DDB_PRT_CONTROL_CLOSE_IN_PROG 241
2 1,7,9 76 128 Teleprotectioon signal sent * * * * DDB_PRT_CARRIER_SEND 242
1 1,7,9 77 128 Teleprotection signal received * * * * DDB_PRT_UNB_CR 243
2 1,7,9 74 128 Fault forward * * * * DDB_PRT_DIST_FWD 244
2 1,7,9 75 128 Fault reverse * * * * DDB_PRT_DIST_REV 245
2 1,7,9 69 128 Trip L1 * * * * DDB_PRT_DIST_TRIP_A 246
2 1,7,9 70 128 Trip L2 * * * * DDB_PRT_DIST_TRIP_B 247
2 1,7,9 71 128 Trip L3 * * * * DDB_PRT_DIST_TRIP_C 248
2 1,7,9 64 128 Start/Pickup L1 * * * * * DDB_PRT_DIST_START_A 249
2 1,7,9 65 128 Start/Pickup L2 * * * * * DDB_PRT_DIST_START_B 250
2 1,7,9 66 128 Start/Pickup L3 * * * * * DDB_PRT_DIST_START_C 251
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1 1,7,9 252 130 * * * * DDB_PRT_DIST_CR_ACC 252
1 1,7,9 253 130 * * * * DDB_PRT_DIST_CR_PERM 253
1 1,7,9 254 130 * * * * DDB_PRT_DIST_CR_BLOCK 254
2 1,7,9 78 128 Zone 1 * * * * DDB_PRT_Z1 255
2 1,7,9 0 131 * * * * DDB_PRT_Z1X 256
2 1,7,9 79 128 Zone 2 * * * * DDB_PRT_Z2 257
2 1,7,9 80 128 Zone 3 * * * * DDB_PRT_Z3 258
2 1,7,9 81 128 Zone 4 * * * * DDB_PRT_Z4 259
2 1,7,9 82 128 Zone 5 * * * * DDB_PRT_Zp 260
5 131 DDB_PRT_T1 261
6 131 DDB_PRT_T2 262
7 131 DDB_PRT_T3 263
8 131 DDB_PRT_T4 264
9 131 DDB_PRT_TZP 265
2 1,7,9 10 131 * * * * DDB_PRT_WI_TRIP_A 266
2 1,7,9 11 131 * * * * DDB_PRT_WI_TRIP_B 267
2 1,7,9 12 131 * * * * DDB_PRT_WI_TRIP_C 268
2 1,7,9 13 131 * * * * * DDB_PRT_POWER_SWING 269
1 1,7,9 14 131 * * * * * DDB_PRT_REVERSAL_GUARD 270
2 1,7,9 15 131 * * * * * DDB_PRT_DEF_CARRIER_SEND 271
1 1,7,9 16 131 * * * * * DDB_PRT_UNB_CR_DEF 272
1 1,7,9 52 128 Earth Fault Rev * * * * * DDB_PRT_DEF_REV 273
1 1,7,9 51 128 Earth Fault Fwd * * * * * DDB_PRT_DEF_FWD 274
1 1,7,9 48 128 Earth Fault L1 * * * * * DDB_PRT_DEF_START_AN 275
1 1,7,9 49 128 Earth Fault L2 * * * * * DDB_PRT_DEF_START_BN 276
1 1,7,9 50 128 Earth Fault L3 * * * * * DDB_PRT_DEF_START_CN 277
2 1,7,9 22 131 * * * * DDB_PRT_DEF_TRIP_A 278
2 1,7,9 23 131 * * * * DDB_PRT_DEF_TRIP_B 279
2 1,7,9 24 131 * * * * DDB_PRT_DEF_TRIP_C 280
2 1,7,9 92 128 Trip IN> * * * * DDB_PRT_IN_SUP_1_TRIP 281
2 1,7,9 93 128 Trip IN>> * * * * DDB_PRT_IN_SUP_2_TRIP 282
2 1,7,9 27 131 * * * * * DDB_PRT_IN_SUP_1_PICK_UP 283
2 1,7,9 28 131 * * * * * DDB_PRT_IN_SUP_2_PICK_UP 284
1 1,7,9 29 131 * * * * * DDB_PRT_UNDER_V_ANY_PICK_UP_A 285
1 1,7,9 30 131 * * * * * DDB_PRT_UNDER_V_ANY_PICK_UP_B 286
1 1,7,9 31 131 * * * * * DDB_PRT_UNDER_V_ANY_PICK_UP_C 287
2 1,7,9 32 131 * * * * * DDB_PRT_UNDER_V_1_PICK_UP 288
2 1,7,9 33 131 * * * * * DDB_PRT_UNDER_V_2_PICK_UP 289
2 1,7,9 34 131 * * * * DDB_PRT_UNDER_V_1_TRIP 290
2 1,7,9 35 131 * * * * DDB_PRT_UNDER_V_2_TRIP 291
1 1,7,9 36 131 * * * * * DDB_PRT_OVER_V_ANY_PICK_UP_A 292
1 1,7,9 37 131 * * * * * DDB_PRT_OVER_V_ANY_PICK_UP_B 293
1 1,7,9 38 131 * * * * * DDB_PRT_OVER_V_ANY_PICK_UP_C 294
2 1,7,9 39 131 * * * * * DDB_PRT_OVER_V_1_PICK_UP 295
2 1,7,9 40 131 * * * * * DDB_PRT_OVER_V_2_PICK_UP 296
2 1,7,9 41 131 * * * * DDB_PRT_OVER_V_1_TRIP 297
2 1,7,9 42 131 * * * * DDB_PRT_OVER_V_2_TRIP 298
2 1,7,9 43 131 * * * * * DDB_PRT_I2_SUP_PICK_UP_1 299
2 1,7,9 44 131 * * * * DDB_PRT_I2_SUP_TRIP_1 300
1 1,7,9 45 131 * * * * * DDB_PRT_I_SUP_ANY_PICK_UP_A 301
1 1,7,9 46 131 * * * * * DDB_PRT_I_SUP_ANY_PICK_UP_B 302
1 1,7,9 47 131 * * * * * DDB_PRT_I_SUP_ANY_PICK_UP_C 303
2 1,7,9 48 131 * * * * * DDB_PRT_I_SUP_1_PICK_UP 304
2 1,7,9 49 131 * * * * * DDB_PRT_I_SUP_2_PICK_UP 305
2 1,7,9 50 131 * * * * * DDB_PRT_I_SUP_3_PICK_UP 306
2 1,7,9 51 131 * * * * * DDB_PRT_I_SUP_4_PICK_UP 307
2 1,7,9 90 128 Trip I> * * * * DDB_PRT_I_SUP_1_TRIP 308
2 1,7,9 91 128 Trip I>> * * * * DDB_PRT_I_SUP_2_TRIP 309
2 1,7,9 54 131 * * * * DDB_PRT_I_SUP_3_TRIP 310
2 1,7,9 55 131 * * * * DDB_PRT_I_SUP_4_TRIP 311
1 1,7,9 56 131 * * * * * DDB_PRT_SOTF_ENABLE 312
1 1,7,9 57 131 * * * * * DDB_PRT_I_TOR_ENABLE 313
2 1,7,9 58 131 * * * * * DDB_PRT_TOC_START_A 314
2 1,7,9 59 131 * * * * * DDB_PRT_TOC_START_B 315
2 1,7,9 60 131 * * * * * DDB_PRT_TOC_START_C 316
2 1,7,9 84 128 General Start * * * * * DDB_PRT_ANY_START 317
62 131 DDB_PRT_1PH 318
63 131 DDB_PRT_2PH 319
64 131 DDB_PRT_3PH 320
2 1,7,9 68 128 General Trip * * * * DDB_PRT_ANY_TRIP 321
2 1,7,9 66 131 * * * * DDB_PRT_ANY_INTERNAL_TRIP_A 322
2 1,7,9 67 131 * * * * DDB_PRT_ANY_INTERNAL_TRIP_B 323
2 1,7,9 68 131 * * * * DDB_PRT_ANY_INTERNAL_TRIP_C 324
2 1,7,9 69 131 * * * * DDB_PRT_ANY_TRIP_A 325
2 1,7,9 70 131 * * * * DDB_PRT_ANY_TRIP_B 326
2 1,7,9 71 131 * * * * DDB_PRT_ANY_TRIP_C 327
2 1,7,9 72 131 * * * * DDB_PRT_1P_TRIP 328
2 1,7,9 73 131 * * * * DDB_PRT_3P_TRIP 329
2 1,7,9 74 131 * * * * DDB_PRT_BROKEN_CONDUCTOR_TRIP 330
2 1,7,9 75 131 * * * * DDB_PRT_LOSS_OF_LOAD_TRIP 331
2 1,7,9 76 131 * * * * DDB_PRT_SOTF_TOR_TRIP 332
2 1,7,9 77 131 * * * * DDB_PRT_TBF1_TRIP_3PH 333
2 1,7,9 78 131 * * * * DDB_PRT_TBF2_TRIP_3PH 334
79 131 DDB_PRT_CONTROL_TRIP 335
80 131 DDB_PRT_CONTROL_CLOSE 336
81 131 DDB_PRT_VTS_FAST 337
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1 1,7,9 82 131 * * * * * DDB_PRT_CB_AUX_A 338
1 1,7,9 83 131 * * * * * DDB_PRT_CB_AUX_B 339
1 1,7,9 84 131 * * * * * DDB_PRT_CB_AUX_C 340
1 1,7,9 85 131 * * * * * DDB_PRT_ANY_POLE_DEAD 341
1 1,7,9 86 131 * * * * * DDB_PRT_ALL_POLE_DEAD 342
87 131 DDB_PRT_DIR_AV_WIT_FILT 343
88 131 DDB_PRT_DIR_AM_WIT_FILT 344
89 131 DDB_PRT_CVMR 345
90 131 DDB_PRT_CROSS_COUNTRY 346
2 1,7,9 91 131 * * * * * DDB_PRT_ZSP_START 347
2 1,7,9 92 131 * * * * DDB_PRT_ZSP_TRIP 348
1 1,7,9 93 131 DDB_PRT_Z1_WIT_FILT 349
1 1,7,9 94 131 DDB_PRT_OUT_OF_STEP 350
1 1,7,9 95 131 DDB_PRT_STABLE_SWING 351
1 1,7,9 96 131 DDB_PRT_OUT_OF_STEP_CONF 352
1 1,7,9 97 131 DDB_PRT_STABLE_SWING_CONF 353
2 1,7,9 67 128 Start/Pickup N * * * * * DDB_PRT_DIST_START_N 354
2 1,7,9 99 131 * * * * DDB_PRT_IN_SUP_3_TRIP 355
2 1,7,9 100 131 * * * * DDB_PRT_IN_SUP_4_TRIP 356
2 1,7,9 101 131 * * * * * DDB_PRT_IN_SUP_3_PICK_UP 357
2 1,7,9 102 131 * * * * * DDB_PRT_IN_SUP_4_PICK_UP 358
2 1,7,9 103 131 * * * * DDB_PRT_PAP_TRIP_A 359
2 1,7,9 104 131 * * * * DDB_PRT_PAP_TRIP_B 360
2 1,7,9 105 131 * * * * DDB_PRT_PAP_TRIP_C 361
2 1,7,9 106 131 * * * * DDB_PRT_PAP_TRIP_IN 362
2 1,7,9 107 131 * * * * * DDB_PRT_PAP_START_A 363
2 1,7,9 108 131 * * * * * DDB_PRT_PAP_START_B 364
2 1,7,9 109 131 * * * * * DDB_PRT_PAP_START_C 365
1 1,7,9 110 131 DDB_PRT_PAP_PRES_IN 366
1 1,7,9 111 131 DDB_PRT_PAP_PRE_START 367
1 1,7,9 112 131 DDB_PRT_TRACE_TRIG_OK 368
2 1,7,9 113 131 * * * * * DDB_PRT_THERMAL_OVERL_ALARM 369
171 131 DDB_UNUSED427 427
172 131 DDB_UNUSED428 428
173 131 DDB_UNUSED429 429
174 131 DDB_UNUSED430 430
175 131 DDB_UNUSED431 431
176 131 DDB_UNUSED432 432
177 131 DDB_UNUSED433 433
178 131 DDB_UNUSED434 434
179 131 DDB_UNUSED435 435
180 131 DDB_TIMERIN_1 436
181 131 DDB_TIMERIN_2 437
182 131 DDB_TIMERIN_3 438
183 131 DDB_TIMERIN_4 439
184 131 DDB_TIMERIN_5 440
185 131 DDB_TIMERIN_6 441
186 131 DDB_TIMERIN_7 442
187 131 DDB_TIMERIN_8 443
188 131 DDB_TIMERIN_9 444
189 131 DDB_TIMERIN_10 445
190 131 DDB_TIMERIN_11 446
191 131 DDB_TIMERIN_12 447
192 131 DDB_TIMERIN_13 448
193 131 DDB_TIMERIN_14 449
194 131 DDB_TIMERIN_15 450
195 131 DDB_TIMERIN_16 451
196 131 DDB_TIMEROUT_1 452
197 131 DDB_TIMEROUT_2 453
198 131 DDB_TIMEROUT_3 454
199 131 DDB_TIMEROUT_4 455
200 131 DDB_TIMEROUT_5 456
201 131 DDB_TIMEROUT_6 457
202 131 DDB_TIMEROUT_7 458
203 131 DDB_TIMEROUT_8 459
204 131 DDB_TIMEROUT_9 460
205 131 DDB_TIMEROUT_10 461
206 131 DDB_TIMEROUT_11 462
207 131 DDB_TIMEROUT_12 463
208 131 DDB_TIMEROUT_13 464
209 131 DDB_TIMEROUT_14 465
210 131 DDB_TIMEROUT_15 466
211 131 DDB_TIMEROUT_16 467
212 131 DDB_FAULT_RECORD_TRIG 468
1 1,7,9 213 131 * * * * * DDB_PLAT_BATTERY_FAIL_ALARM 469
1 1,7,9 214 131 * * * * * DDB_PLAT_FIELD_VOLT_FAIL_ALARM 470
1 1,7,9 215 131 * * * * * DDB_REAR_COMMS_FAIL_ALARM_66 471
216 131 DDB_GOOSE_IED_MISSING_ALARM_67 472
217 131 DDB_ECARD_NOT_FITTED_ALARM_68 473
218 131 DDB_NIC_NOT_RESPONDING_69 474
219 131 DDB_NIC_FATAL_ERROR_70 475
220 131 DDB_NIC_SOFTWARE_RELOAD_71 476
221 131 DDB_INVALID_NIC_TCP_IP_CONFIG_72 477
222 131 DDB_INVALID_NIC_OSI_CONFIG_73 478
223 131 DDB_NIC_LINK_FAIL_74 479
224 131 DDB_SOFTWARE_MISMATCH_ALARM_75 480
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225 131 DDB_NIC_IP_ADDRESS_CONFLICT_76 481
1 1,7,9 226 131 * * * * * DDB_INTERMICOM_LOOPBACK_ALARM_77 482
1 1,7,9 227 131 * * * * * DDB_INTERMICOM_MESSAGE_ALARM_78 483
1 1,7,9 228 131 * * * * * DDB_INTERMICOM_DCD_ALARM_79 484
1 1,7,9 229 131 * * * * * DDB_INTERMICOM_CHANNEL_ALARM_80 485
1 1,7,9 230 131 * * * * * DDB_BACKUP_SETTING_ALARM_81 486
231 131 DDB_ALARM_UNUSED_487 487
232 131 DDB_ALARM_UNUSED_488 488
233 131 DDB_ALARM_UNUSED_489 489
234 131 DDB_ALARM_UNUSED_490 490
235 131 DDB_ALARM_UNUSED_491 491
236 131 DDB_ALARM_UNUSED_492 492
237 131 DDB_ALARM_UNUSED_493 493
238 131 DDB_ALARM_UNUSED_494 494
239 131 DDB_ALARM_UNUSED_495 495
240 131 DDB_ALARM_UNUSED_496 496
241 131 DDB_ALARM_UNUSED_497 497
242 131 DDB_ALARM_UNUSED_498 498
243 131 DDB_ALARM_UNUSED_499 499
31 132 DDB_GOOSEOUT_32 543
32 132 DDB_GOOSEIN_1 544
33 132 DDB_GOOSEIN_2 545
34 132 DDB_GOOSEIN_3 546
35 132 DDB_GOOSEIN_4 547
36 132 DDB_GOOSEIN_5 548
37 132 DDB_GOOSEIN_6 549
38 132 DDB_GOOSEIN_7 550
39 132 DDB_GOOSEIN_8 551
40 132 DDB_GOOSEIN_9 552
41 132 DDB_GOOSEIN_10 553
42 132 DDB_GOOSEIN_11 554
43 132 DDB_GOOSEIN_12 555
44 132 DDB_GOOSEIN_13 556
45 132 DDB_GOOSEIN_14 557
46 132 DDB_GOOSEIN_15 558
47 132 DDB_GOOSEIN_16 559
48 132 DDB_GOOSEIN_17 560
49 132 DDB_GOOSEIN_18 561
50 132 DDB_GOOSEIN_19 562
51 132 DDB_GOOSEIN_20 563
52 132 DDB_GOOSEIN_21 564
53 132 DDB_GOOSEIN_22 565
54 132 DDB_GOOSEIN_23 566
55 132 DDB_GOOSEIN_24 567
56 132 DDB_GOOSEIN_25 568
57 132 DDB_GOOSEIN_26 569
58 132 DDB_GOOSEIN_27 570
59 132 DDB_GOOSEIN_28 571
60 132 DDB_GOOSEIN_29 572
61 132 DDB_GOOSEIN_30 573
62 132 DDB_GOOSEIN_31 574
63 132 DDB_GOOSEIN_32 575
64 132 * * * * DDB_INTERIN_1 576
65 132 * * * * DDB_INTERIN_2 577
66 132 * * * * DDB_INTERIN_3 578
67 132 * * * * DDB_INTERIN_4 579
68 132 * * * * DDB_INTERIN_5 580
69 132 * * * * DDB_INTERIN_6 581
70 132 * * * * DDB_INTERIN_7 582
71 132 * * * * DDB_INTERIN_8 583
72 132 * * * * DDB_INTEROUT_1 584
73 132 * * * * DDB_INTEROUT_2 585
74 132 * * * * DDB_INTEROUT_3 586
75 132 * * * * DDB_INTEROUT_4 587
76 132 * * * * DDB_INTEROUT_5 588
77 132 * * * * DDB_INTEROUT_6 589
78 132 * * * * DDB_INTEROUT_7 590
79 132 * * * * DDB_INTEROUT_8 591
80 132 DDB_UNUSED_592 592
81 132 DDB_UNUSED_593 593
82 132 DDB_UNUSED_594 594
83 132 DDB_UNUSED_595 595
84 132 DDB_UNUSED_596 596
85 132 DDB_UNUSED_597 597
86 132 DDB_UNUSED_598 598
95 132 DDB_UNUSED_607 607
1 9,11,12,20,21 96 132 Control Input 1 * * * * DDB_CTRL_IP_1 608
1 9,11,12,20,21 97 132 Control Input 2 * * * * DDB_CTRL_IP_2 609
1 9,11,12,20,21 98 132 Control Input 3 * * * * DDB_CTRL_IP_3 610
1 9,11,12,20,21 99 132 Control Input 4 * * * * DDB_CTRL_IP_4 611
1 9,11,12,20,21 100 132 Control Input 5 * * * * DDB_CTRL_IP_5 612
1 9,11,12,20,21 101 132 Control Input 6 * * * * DDB_CTRL_IP_6 613
1 9,11,12,20,21 102 132 Control Input 7 * * * * DDB_CTRL_IP_7 614
1 9,11,12,20,21 103 132 Control Input 8 * * * * DDB_CTRL_IP_8 615
1 9,11,12,20,21 104 132 Control Input 9 * * * * DDB_CTRL_IP_9 616
1 9,11,12,20,21 105 132 Control Input 10 * * * * DDB_CTRL_IP_10 617
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1 9,11,12,20,21 106 132 Control Input 11 * * * * DDB_CTRL_IP_11 618
1 9,11,12,20,21 107 132 Control Input 12 * * * * DDB_CTRL_IP_12 619
1 9,11,12,20,21 108 132 Control Input 13 * * * * DDB_CTRL_IP_13 620
1 9,11,12,20,21 109 132 Control Input 14 * * * * DDB_CTRL_IP_14 621
1 9,11,12,20,21 110 132 Control Input 15 * * * * DDB_CTRL_IP_15 622
1 9,11,12,20,21 111 132 Control Input 16 * * * * DDB_CTRL_IP_16 623
1 9,11,12,20,21 112 132 Control Input 17 * * * * DDB_CTRL_IP_17 624
1 9,11,12,20,21 113 132 Control Input 18 * * * * DDB_CTRL_IP_18 625
1 9,11,12,20,21 114 132 Control Input 19 * * * * DDB_CTRL_IP_19 626
1 9,11,12,20,21 115 132 Control Input 20 * * * * DDB_CTRL_IP_20 627
1 9,11,12,20,21 116 132 Control Input 21 * * * * DDB_CTRL_IP_21 628
1 9,11,12,20,21 117 132 Control Input 22 * * * * DDB_CTRL_IP_22 629
1 9,11,12,20,21 118 132 Control Input 23 * * * * DDB_CTRL_IP_23 630
1 9,11,12,20,21 119 132 Control Input 24 * * * * DDB_CTRL_IP_24 631
1 9,11,12,20,21 120 132 Control Input 25 * * * * DDB_CTRL_IP_25 632
1 9,11,12,20,21 121 132 Control Input 26 * * * * DDB_CTRL_IP_26 633
1 9,11,12,20,21 122 132 Control Input 27 * * * * DDB_CTRL_IP_27 634
1 9,11,12,20,21 123 132 Control Input 28 * * * * DDB_CTRL_IP_28 635
1 9,11,12,20,21 124 132 Control Input 29 * * * * DDB_CTRL_IP_29 636
1 9,11,12,20,21 125 132 Control Input 30 * * * * DDB_CTRL_IP_30 637
1 9,11,12,20,21 126 132 Control Input 31 * * * * DDB_CTRL_IP_31 638
1 9,11,12,20,21 127 132 Control Input 32 * * * * DDB_CTRL_IP_32 639
1 1,7,9 128 132 * * * DDB_OUTPUT_TRI_LED_1_RED 640
1 1,7,10 129 132 * * * DDB_OUTPUT_TRI_LED_1_GRN 641
1 1,7,11 130 132 * * * DDB_OUTPUT_TRI_LED_2_RED 642
1 1,7,12 131 132 * * * DDB_OUTPUT_TRI_LED_2_GRN 643
1 1,7,13 132 132 * * * DDB_OUTPUT_TRI_LED_3_RED 644
1 1,7,14 133 132 * * * DDB_OUTPUT_TRI_LED_3_GRN 645
1 1,7,15 134 132 * * * DDB_OUTPUT_TRI_LED_4_RED 646
1 1,7,16 135 132 * * * DDB_OUTPUT_TRI_LED_4_GRN 647
1 1,7,17 136 132 * * * DDB_OUTPUT_TRI_LED_5_RED 648
1 1,7,18 137 132 * * * DDB_OUTPUT_TRI_LED_5_GRN 649
1 1,7,19 138 132 * * * DDB_OUTPUT_TRI_LED_6_RED 650
1 1,7,20 139 132 * * * DDB_OUTPUT_TRI_LED_6_GRN 651
1 1,7,21 140 132 * * * DDB_OUTPUT_TRI_LED_7_RED 652
1 1,7,22 141 132 * * * DDB_OUTPUT_TRI_LED_7_GRN 653
1 1,7,23 142 132 * * * DDB_OUTPUT_TRI_LED_8_RED 654
1 1,7,24 143 132 * * * DDB_OUTPUT_TRI_LED_8_GRN 655
1 1,7,25 144 132 * * * DDB_OUTPUT_TRI_LED_9_RED 656
1 1,7,26 145 132 * * * DDB_OUTPUT_TRI_LED_9_GRN 657
1 1,7,27 146 132 * * * DDB_OUTPUT_TRI_LED_10_RED 658
1 1,7,28 147 132 * * * DDB_OUTPUT_TRI_LED_10_GRN 659
1 1,7,29 148 132 * * * DDB_OUTPUT_TRI_LED_11_RED 660
1 1,7,30 149 132 * * * DDB_OUTPUT_TRI_LED_11_GRN 661
1 1,7,31 150 132 * * * DDB_OUTPUT_TRI_LED_12_RED 662
1 1,7,32 151 132 * * * DDB_OUTPUT_TRI_LED_12_GRN 663
1 1,7,33 152 132 * * * DDB_OUTPUT_TRI_LED_13_RED 664
1 1,7,34 153 132 * * * DDB_OUTPUT_TRI_LED_13_GRN 665
1 1,7,35 154 132 * * * DDB_OUTPUT_TRI_LED_14_RED 666
1 1,7,36 155 132 * * * DDB_OUTPUT_TRI_LED_14_GRN 667
1 1,7,37 156 132 * * * DDB_OUTPUT_TRI_LED_15_RED 668
1 1,7,38 157 132 * * * DDB_OUTPUT_TRI_LED_15_GRN 669
1 1,7,39 158 132 * * * DDB_OUTPUT_TRI_LED_16_RED 670
1 1,7,40 159 132 * * * DDB_OUTPUT_TRI_LED_16_GRN 671
1 1,7,41 160 132 * * * DDB_OUTPUT_TRI_LED_17_RED 672
1 1,7,42 161 132 * * * DDB_OUTPUT_TRI_LED_17_GRN 673
1 1,7,43 162 132 * * * DDB_OUTPUT_TRI_LED_18_RED 674
1 1,7,44 163 132 * * * DDB_OUTPUT_TRI_LED_18_GRN 675
1 1,7,45 164 132 * * * * DDB_FN_KEY_1 676
1 1,7,46 165 132 * * * * DDB_FN_KEY_2 677
1 1,7,47 166 132 * * * * DDB_FN_KEY_3 678
1 1,7,48 167 132 * * * * DDB_FN_KEY_4 679
1 1,7,49 168 132 * * * * DDB_FN_KEY_5 680
1 1,7,50 169 132 * * * * DDB_FN_KEY_6 681
1 1,7,51 170 132 * * * * DDB_FN_KEY_7 682
1 1,7,52 171 132 * * * * DDB_FN_KEY_8 683
1 1,7,53 172 132 * * * * DDB_FN_KEY_9 684
1 1,7,54 173 132 * * * * DDB_FN_KEY_10 685
174 132 DDB_UNUSED_686 686
175 132 DDB_UNUSED_687 687
176 132 DDB_UNUSED_688 688
177 132 DDB_UNUSED_689 689
178 132 DDB_UNUSED_690 690
179 132 DDB_UNUSED_691 691
180 132 DDB_UNUSED_692 692
181 132 DDB_UNUSED_693 693
182 132 DDB_UNUSED_694 694
183 132 DDB_UNUSED_695 695
184 132 DDB_UNUSED_696 696
185 132 DDB_UNUSED_697 697
186 132 DDB_UNUSED_698 698
187 132 DDB_UNUSED_699 699
188 132 DDB_OUTPUT_CON_1 700
189 132 DDB_OUTPUT_CON_2 701
190 132 DDB_OUTPUT_CON_3 702
191 132 DDB_OUTPUT_CON_4 703
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Part E: IEC870-5-103 (VDEW) Interoperability Guide


192 132 DDB_OUTPUT_CON_5 704
193 132 DDB_OUTPUT_CON_6 705
194 132 DDB_OUTPUT_CON_7 706
195 132 DDB_OUTPUT_CON_8 707
196 132 DDB_OUTPUT_CON_9 708
197 132 DDB_OUTPUT_CON_10 709
198 132 DDB_OUTPUT_CON_11 710
199 132 DDB_OUTPUT_CON_12 711
200 132 DDB_OUTPUT_CON_13 712
201 132 DDB_OUTPUT_CON_14 713
202 132 DDB_OUTPUT_CON_15 714
203 132 DDB_OUTPUT_CON_16 715
204 132 DDB_OUTPUT_CON_17 716
205 132 DDB_OUTPUT_CON_18 717
206 132 DDB_OUTPUT_CON_19 718
207 132 DDB_OUTPUT_CON_20 719
208 132 DDB_OUTPUT_CON_21 720
209 132 DDB_OUTPUT_CON_22 721
210 132 DDB_OUTPUT_CON_23 722
211 132 DDB_OUTPUT_CON_24 723
212 132 DDB_OUTPUT_CON_25 724
213 132 DDB_OUTPUT_CON_26 725
214 132 DDB_OUTPUT_CON_27 726
215 132 DDB_OUTPUT_CON_28 727
216 132 DDB_OUTPUT_CON_29 728
217 132 DDB_OUTPUT_CON_30 729
218 132 DDB_OUTPUT_CON_31 730
219 132 DDB_OUTPUT_CON_32 731
220 132 DDB_OUTPUT_CON_33 732
221 132 DDB_OUTPUT_CON_34 733
222 132 DDB_OUTPUT_CON_35 734
223 132 DDB_OUTPUT_CON_36 735
224 132 DDB_OUTPUT_CON_37 736
225 132 DDB_OUTPUT_CON_38 737
226 132 DDB_OUTPUT_CON_39 738
227 132 DDB_OUTPUT_CON_40 739
228 132 DDB_OUTPUT_CON_41 740
229 132 DDB_OUTPUT_CON_42 741
230 132 DDB_OUTPUT_CON_43 742
231 132 DDB_OUTPUT_CON_44 743
232 132 DDB_OUTPUT_CON_45 744
233 132 DDB_OUTPUT_CON_46 745
234 132 DDB_OUTPUT_CON_47 746
235 132 DDB_OUTPUT_CON_48 747
236 132 DDB_OUTPUT_CON_49 748
237 132 DDB_OUTPUT_CON_50 749
238 132 DDB_OUTPUT_CON_51 750
239 132 DDB_OUTPUT_CON_52 751
240 132 DDB_OUTPUT_CON_53 752
241 132 DDB_OUTPUT_CON_54 753
242 132 DDB_OUTPUT_CON_55 754
243 132 DDB_OUTPUT_CON_56 755
244 132 DDB_OUTPUT_CON_57 756
245 132 DDB_OUTPUT_CON_58 757
246 132 DDB_OUTPUT_CON_59 758
247 132 DDB_OUTPUT_CON_60 759
248 132 DDB_OUTPUT_CON_61 760
249 132 DDB_OUTPUT_CON_62 761
250 132 DDB_OUTPUT_CON_63 762
251 132 DDB_OUTPUT_CON_64 763
252 132 DDB_UNUSED_764 764
253 132 DDB_UNUSED_765 765
254 132 DDB_UNUSED_766 766
255 132 DDB_UNUSED_767 767
251 132 DDB_UNUSED_768 768
252 132 DDB_UNUSED_769 769
253 132 DDB_UNUSED_770 770
254 132 DDB_UNUSED_771 771
255 132 DDB_UNUSED_772 772
0 133 DDB_UNUSED_773 773
1 133 DDB_UNUSED_774 774
2 133 DDB_UNUSED_775 775
3 133 DDB_UNUSED_776 776
4 133 DDB_UNUSED_777 777
5 133 DDB_UNUSED_778 778
6 133 DDB_UNUSED_779 779
7 133 DDB_UNUSED_780 780
8 133 DDB_UNUSED_781 781
9 133 DDB_UNUSED_782 782
10 133 DDB_UNUSED_783 783
11 133 DDB_UNUSED_784 784
12 133 DDB_UNUSED_785 785
13 133 DDB_UNUSED_786 786
14 133 DDB_UNUSED_787 787
15 133 DDB_UNUSED_788 788
16 133 DDB_UNUSED_789 789
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Part E: IEC870-5-103 (VDEW) Interoperability Guide


17 133 DDB_UNUSED_790 790
18 133 DDB_UNUSED_791 791
19 133 DDB_UNUSED_792 792
20 133 DDB_UNUSED_793 793
21 133 DDB_UNUSED_794 794
22 133 DDB_UNUSED_795 795
23 133 DDB_UNUSED_796 796
24 133 DDB_UNUSED_797 797
25 133 DDB_UNUSED_798 798
26 133 DDB_UNUSED_799 799
27 133 DDB_UNUSED_800 800
28 133 DDB_UNUSED_801 801
29 133 DDB_UNUSED_802 802
30 133 DDB_UNUSED_803 803
31 133 DDB_UNUSED_804 804
32 133 DDB_UNUSED_805 805
33 133 DDB_UNUSED_806 806
34 133 DDB_UNUSED_807 807
35 133 DDB_UNUSED_808 808
36 133 DDB_UNUSED_809 809
37 133 DDB_UNUSED_810 810
38 133 DDB_UNUSED_811 811
39 133 DDB_UNUSED_812 812
40 133 DDB_UNUSED_813 813
41 133 DDB_UNUSED_814 814
42 133 DDB_UNUSED_815 815
43 133 DDB_UNUSED_816 816
44 133 DDB_UNUSED_817 817
45 133 DDB_UNUSED_818 818
46 133 DDB_UNUSED_819 819
47 133 DDB_UNUSED_820 820
48 133 DDB_UNUSED_821 821
49 133 DDB_UNUSED_822 822
50 133 DDB_UNUSED_823 823
51 133 DDB_UNUSED_824 824
52 133 DDB_UNUSED_825 825
53 133 DDB_UNUSED_826 826
54 133 DDB_UNUSED_827 827
55 133 DDB_UNUSED_828 828
56 133 DDB_UNUSED_829 829
57 133 DDB_UNUSED_830 830
58 133 DDB_UNUSED_831 831
59 133 DDB_UNUSED_832 832
60 133 DDB_UNUSED_833 833
61 133 DDB_UNUSED_834 834
62 133 DDB_UNUSED_835 835
63 133 DDB_UNUSED_836 836
64 133 DDB_UNUSED_837 837
65 133 DDB_UNUSED_838 838
66 133 DDB_UNUSED_839 839
67 133 DDB_UNUSED_840 840
68 133 DDB_UNUSED_841 841
69 133 DDB_UNUSED_842 842
70 133 DDB_UNUSED_843 843
71 133 DDB_UNUSED_844 844
72 133 DDB_UNUSED_845 845
73 133 DDB_UNUSED_846 846
74 133 DDB_UNUSED_847 847
75 133 DDB_UNUSED_848 848
76 133 DDB_UNUSED_849 849
77 133 DDB_UNUSED_850 850
78 133 DDB_UNUSED_851 851
79 133 DDB_UNUSED_852 852
80 133 DDB_UNUSED_853 853
81 133 DDB_UNUSED_854 854
82 133 DDB_UNUSED_855 855
83 133 DDB_UNUSED_856 856
84 133 DDB_UNUSED_857 857
85 133 DDB_UNUSED_858 858
86 133 DDB_UNUSED_859 859
87 133 DDB_UNUSED_860 860
88 133 DDB_UNUSED_861 861
89 133 DDB_UNUSED_862 862
90 133 DDB_UNUSED_863 863
91 133 DDB_UNUSED_864 864
92 133 DDB_UNUSED_865 865
93 133 DDB_UNUSED_866 866
94 133 DDB_UNUSED_867 867
95 133 DDB_UNUSED_868 868
96 133 DDB_UNUSED_869 869
97 133 DDB_UNUSED_870 870
98 133 DDB_UNUSED_871 871
99 133 DDB_UNUSED_872 872
100 133 DDB_UNUSED_873 873
101 133 DDB_UNUSED_874 874
102 133 DDB_UNUSED_875 875
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Part E: IEC870-5-103 (VDEW) Interoperability Guide


103 133 DDB_UNUSED_876 876
104 133 DDB_UNUSED_877 877
105 133 DDB_UNUSED_878 878
106 133 DDB_UNUSED_879 879
107 133 DDB_UNUSED_880 880
108 133 DDB_UNUSED_881 881
109 133 DDB_UNUSED_882 882
110 133 DDB_UNUSED_883 883
111 133 DDB_UNUSED_884 884
112 133 DDB_UNUSED_885 885
113 133 DDB_UNUSED_886 886
114 133 DDB_UNUSED_887 887
115 133 DDB_UNUSED_888 888
116 133 DDB_UNUSED_889 889
117 133 DDB_UNUSED_890 890
118 133 DDB_UNUSED_891 891
119 133 DDB_UNUSED_892 892
120 133 DDB_UNUSED_893 893
121 133 DDB_UNUSED_894 894
122 133 DDB_UNUSED_895 895
123 133 DDB_UNUSED_896 896
124 133 DDB_UNUSED_897 897
125 133 DDB_UNUSED_898 898
126 133 DDB_UNUSED_899 899
127 133 DDB_UNUSED_900 900
128 133 DDB_UNUSED_901 901
129 133 DDB_UNUSED_902 902
130 133 DDB_UNUSED_903 903
131 133 DDB_UNUSED_904 904
132 133 DDB_UNUSED_905 905
133 133 DDB_UNUSED_906 906
134 133 DDB_UNUSED_907 907
135 133 DDB_UNUSED_908 908
136 133 DDB_UNUSED_909 909
137 133 DDB_UNUSED_910 910
138 133 DDB_UNUSED_911 911
139 133 DDB_UNUSED_912 912
140 133 DDB_UNUSED_913 913
141 133 DDB_UNUSED_914 914
142 133 DDB_UNUSED_915 915
143 133 DDB_UNUSED_916 916
144 133 DDB_UNUSED_917 917
145 133 DDB_UNUSED_918 918
146 133 DDB_UNUSED_919 919
147 133 DDB_UNUSED_920 920
148 133 DDB_UNUSED_921 921
149 133 DDB_UNUSED_922 922
150 133 DDB_PSLINT_1 923
151 133 DDB_PSLINT_2 924
152 133 DDB_PSLINT_3 925
153 133 DDB_PSLINT_4 926
154 133 DDB_PSLINT_5 927
155 133 DDB_PSLINT_6 928
156 133 DDB_PSLINT_7 929
157 133 DDB_PSLINT_8 930
158 133 DDB_PSLINT_9 931
159 133 DDB_PSLINT_10 932
160 133 DDB_PSLINT_11 933
161 133 DDB_PSLINT_12 934
162 133 DDB_PSLINT_13 935
163 133 DDB_PSLINT_14 936
164 133 DDB_PSLINT_15 937
165 133 DDB_PSLINT_16 938
166 133 DDB_PSLINT_17 939
167 133 DDB_PSLINT_18 940
168 133 DDB_PSLINT_19 941
169 133 DDB_PSLINT_20 942
170 133 DDB_PSLINT_21 943
171 133 DDB_PSLINT_22 944
172 133 DDB_PSLINT_23 945
173 133 DDB_PSLINT_24 946
174 133 DDB_PSLINT_25 947
175 133 DDB_PSLINT_26 948
176 133 DDB_PSLINT_27 949
177 133 DDB_PSLINT_28 950
178 133 DDB_PSLINT_29 951
179 133 DDB_PSLINT_30 952
180 133 DDB_PSLINT_31 953
181 133 DDB_PSLINT_32 954
182 133 DDB_PSLINT_33 955
183 133 DDB_PSLINT_34 956
184 133 DDB_PSLINT_35 957
185 133 DDB_PSLINT_36 958
186 133 DDB_PSLINT_37 959
187 133 DDB_PSLINT_38 960
188 133 DDB_PSLINT_39 961
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Part E: IEC870-5-103 (VDEW) Interoperability Guide


189 133 DDB_PSLINT_40 962
190 133 DDB_PSLINT_41 963
191 133 DDB_PSLINT_42 964
192 133 DDB_PSLINT_43 965
193 133 DDB_PSLINT_44 966
194 133 DDB_PSLINT_45 967
195 133 DDB_PSLINT_46 968
196 133 DDB_PSLINT_47 969
197 133 DDB_PSLINT_48 970
198 133 DDB_PSLINT_49 971
199 133 DDB_PSLINT_50 972
200 133 DDB_PSLINT_51 973
201 133 DDB_PSLINT_52 974
202 133 DDB_PSLINT_53 975
203 133 DDB_PSLINT_54 976
204 133 DDB_PSLINT_55 977
205 133 DDB_PSLINT_56 978
206 133 DDB_PSLINT_57 979
207 133 DDB_PSLINT_58 980
208 133 DDB_PSLINT_59 981
209 133 DDB_PSLINT_60 982
210 133 DDB_PSLINT_61 983
211 133 DDB_PSLINT_62 984
212 133 DDB_PSLINT_63 985
213 133 DDB_PSLINT_64 986
214 133 DDB_PSLINT_65 987
215 133 DDB_PSLINT_66 988
216 133 DDB_PSLINT_67 989
217 133 DDB_PSLINT_68 990
218 133 DDB_PSLINT_69 991
219 133 DDB_PSLINT_70 992
220 133 DDB_PSLINT_71 993
221 133 DDB_PSLINT_72 994
222 133 DDB_PSLINT_73 995
223 133 DDB_PSLINT_74 996
224 133 DDB_PSLINT_75 997
225 133 DDB_PSLINT_76 998
226 133 DDB_PSLINT_77 999
227 133 DDB_PSLINT_78 1000
228 133 DDB_PSLINT_79 1001
229 133 DDB_PSLINT_80 1002
230 133 DDB_PSLINT_81 1003
231 133 DDB_PSLINT_82 1004
232 133 DDB_PSLINT_83 1005
233 133 DDB_PSLINT_84 1006
234 133 DDB_PSLINT_85 1007
235 133 DDB_PSLINT_86 1008
236 133 DDB_PSLINT_87 1009
237 133 DDB_PSLINT_88 1010
238 133 DDB_PSLINT_89 1011
239 133 DDB_PSLINT_90 1012
240 133 DDB_PSLINT_91 1013
241 133 DDB_PSLINT_92 1014
242 133 DDB_PSLINT_93 1015
243 133 DDB_PSLINT_94 1016
244 133 DDB_PSLINT_95 1017
245 133 DDB_PSLINT_96 1018
246 133 DDB_PSLINT_97 1019
247 133 DDB_PSLINT_98 1020
248 133 DDB_PSLINT_99 1021
249 133 DDB_PSLINT_100 1022
250 133 DDB_PSLINT_101 1023
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Part E: IEC870-5-103 (VDEW) Interoperability Guide

Private Range Information numbers in Control Direction


ASDU COT Display Text (English) odel Number DDB Signal Description DDB
TYPE No. 1 2 3 4H 6 Ordinal
20 20 96 132 Control Input 1 * * * DDB_CTRL_IP_1 608
20 20 97 132 Control Input 2 * * * DDB_CTRL_IP_2 609
20 20 98 132 Control Input 3 * * * DDB_CTRL_IP_3 610
20 20 99 132 Control Input 4 * * * DDB_CTRL_IP_4 611
20 20 100 132 Control Input 5 * * * DDB_CTRL_IP_5 612
20 20 101 132 Control Input 6 * * * DDB_CTRL_IP_6 613
20 20 102 132 Control Input 7 * * * DDB_CTRL_IP_7 614
20 20 103 132 Control Input 8 * * * DDB_CTRL_IP_8 615
20 20 104 132 Control Input 9 * * * DDB_CTRL_IP_9 616
20 20 105 132 Control Input 10 * * * DDB_CTRL_IP_10 617
20 20 106 132 Control Input 11 * * * DDB_CTRL_IP_11 618
20 20 107 132 Control Input 12 * * * DDB_CTRL_IP_12 619
20 20 108 132 Control Input 13 * * * DDB_CTRL_IP_13 620
20 20 109 132 Control Input 14 * * * DDB_CTRL_IP_14 621
20 20 110 132 Control Input 15 * * * DDB_CTRL_IP_15 622
20 20 111 132 Control Input 16 * * * DDB_CTRL_IP_16 623
20 20 112 132 Control Input 17 * * * DDB_CTRL_IP_17 624
20 20 113 132 Control Input 18 * * * DDB_CTRL_IP_18 625
20 20 114 132 Control Input 19 * * * DDB_CTRL_IP_19 626
20 20 115 132 Control Input 20 * * * DDB_CTRL_IP_20 627
20 20 116 132 Control Input 21 * * * DDB_CTRL_IP_21 628
20 20 117 132 Control Input 22 * * * DDB_CTRL_IP_22 629
20 20 118 132 Control Input 23 * * * DDB_CTRL_IP_23 630
20 20 119 132 Control Input 24 * * * DDB_CTRL_IP_24 631
20 20 120 132 Control Input 25 * * * DDB_CTRL_IP_25 632
20 20 121 132 Control Input 26 * * * DDB_CTRL_IP_26 633
20 20 122 132 Control Input 27 * * * DDB_CTRL_IP_27 634
20 20 123 132 Control Input 28 * * * DDB_CTRL_IP_28 635
20 20 124 132 Control Input 29 * * * DDB_CTRL_IP_29 636
20 20 125 132 Control Input 30 * * * DDB_CTRL_IP_30 637
20 20 126 132 Control Input 31 * * * DDB_CTRL_IP_31 638
20 20 127 132 Control Input 32 * * * DDB_CTRL_IP_32 639
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Part F: DNP3.0 Database


DNP Data Source
Table Source DDB Name Index Col Row Class Include In 1 2 3 4 5 Desription in
/* Output Relay Status virtual
Object 01 */ points P442 P442C P444G P444H P444C device profile
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_1 0 2 * * * * * * 0 0 0 0 0 Output Relay 1
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_2 1 2 * * * * * * 1 1 1 1 1 Output Relay 2
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_3 2 2 * * * * * * 2 2 2 2 2 Output Relay 3
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_4 3 2 * * * * * * 3 3 3 3 3 Output Relay 4
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_5 4 2 * * * * * * 4 4 4 4 4 Output Relay 5
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_6 5 2 * * * * * * 5 5 5 5 5 Output Relay 6
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_7 6 2 * * * * * * 6 6 6 6 6 Output Relay 7
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_8 7 2 * * * * * * 7 7 7 7 7 Output Relay 8
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_9 8 2 * * * * * * 8 8 8 8 8 Output Relay 9
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_10 9 2 * * * * * * 9 9 9 9 9 Output Relay 10
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_11 10 2 * * * * * * 10 10 10 10 10 Output Relay 11
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_12 11 2 * * * * * * 11 11 11 11 11 Output Relay 12
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_13 12 2 * * * * * * 12 12 12 12 12 Output Relay 13
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_14 13 2 * * * * * * 13 13 13 13 13 Output Relay 14
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_15 14 2 * * * * * * 14 14 14 14 14 Output Relay 15
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_16 15 2 * * * * * * 15 15 15 15 15 Output Relay 16
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_17 16 2 * * * * * * 16 16 16 16 16 Output Relay 17
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_18 17 2 * * * * * * 17 17 17 17 17 Output Relay 18
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_19 18 2 * * * * * 18 18 18 18 Output Relay 19
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_20 19 2 * * * * * 19 19 19 19 Output Relay 20
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_21 20 2 * * * * * 20 20 20 20 Output Relay 21
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_22 21 2 * * * * 21 21 21 Output Relay 22
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_23 22 2 * * * * 22 22 22 Output Relay 23
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_24 23 2 * * * * 23 23 23 Output Relay 24
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_25 24 2 * * * * 24 24 24 Output Relay 25
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_26 25 2 * * * * 25 25 25 Output Relay 26
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_27 26 2 * * * * 26 26 26 Output Relay 27
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_28 27 2 * * * * 27 27 27 Output Relay 28
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_29 28 2 * * * * 28 28 28 Output Relay 29
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_30 29 2 * * * * 29 29 29 Output Relay 30
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_31 30 2 * * * * 30 30 30 Output Relay 31
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_32 31 2 * * * * 31 31 31 Output Relay 32
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_33 32 2 * * * 32 32 Output Relay 33
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_34 33 2 * * * 33 33 Output Relay 34
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_35 34 2 * * 34 Output Relay 35
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_36 35 2 * * 35 Output Relay 36
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_37 36 2 * * 36 Output Relay 37
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_38 37 2 * * 37 Output Relay 38
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_39 38 2 * * 38 Output Relay 39
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_40 39 2 * * 39 Output Relay 40
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_41 40 2 * * 40 Output Relay 41
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_42 41 2 * * 41 Output Relay 42
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_43 42 2 * * 42 Output Relay 43
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_44 43 2 * * 43 Output Relay 44
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_45 44 2 * * 44 Output Relay 45
BIN_IP_SRCS_RELAYS DDB_OUTPUT_RELAY_46 45 2 * * 45 Output Relay 46
/* Opto Isolator Status
*/
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_1 0 2 * * * * * * 21 18 32 46 34 Opto Isolator 1
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_2 1 2 * * * * * * 22 19 33 47 35 Opto Isolator 2
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_3 2 2 * * * * * * 23 20 34 48 36 Opto Isolator 3
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_4 3 2 * * * * * * 24 21 35 49 37 Opto Isolator 4
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_5 4 2 * * * * * * 25 22 36 50 38 Opto Isolator 5
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_6 5 2 * * * * * * 26 23 37 51 39 Opto Isolator 6
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_7 6 2 * * * * * * 27 24 38 52 40 Opto Isolator 7
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_8 7 2 * * * * * * 28 25 39 53 41 Opto Isolator 8
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_9 8 2 * * * * * * 29 26 40 54 42 Opto Isolator 9
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_10 9 2 * * * * * * 30 27 41 55 43 Opto Isolator 10
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_11 10 2 * * * * * * 31 28 42 56 44 Opto Isolator 11
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_12 11 2 * * * * * * 32 29 43 57 45 Opto Isolator 12
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_13 12 2 * * * * * * 33 30 44 58 46 Opto Isolator 13
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_14 13 2 * * * * * * 34 31 45 59 47 Opto Isolator 14
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_15 14 2 * * * * * * 35 32 46 60 48 Opto Isolator 15
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_16 15 2 * * * * * * 36 33 47 61 49 Opto Isolator 16
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_17 16 2 * * * * 48 62 50 Opto Isolator 17
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_18 17 2 * * * * 49 63 51 Opto Isolator 18
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_19 18 2 * * * * 50 64 52 Opto Isolator 19
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_20 19 2 * * * * 51 65 53 Opto Isolator 20
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_21 20 2 * * * * 52 66 54 Opto Isolator 21
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_22 21 2 * * * * 53 67 55 Opto Isolator 22
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_23 22 2 * * * * 54 68 56 Opto Isolator 23
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_24 23 2 * * * * 55 69 57 Opto Isolator 24
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_25 24 2 * Opto Isolator 25
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_26 25 2 * Opto Isolator 26
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_27 26 2 * Opto Isolator 27
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_28 27 2 * Opto Isolator 28
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_29 28 2 * Opto Isolator 29
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_30 29 2 * Opto Isolator 30
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_31 30 2 * Opto Isolator 31
BIN_IP_SRCS_OPTOS DDB_OPTO_ISOLATOR_32 31 2 * Opto Isolator 32
/* Alarm Indications
*/

BIN_IP_SRCS_ALARM DDB_ALARM_GENERAL 2 2 * * * * * * 37 34 56 70 58 Setting Group Via Opto Invalid


BIN_IP_SRCS_ALARM DDB_ALARM_PROT_DISABLED 3 2 * * * * * * 38 35 57 71 59 Protection Disabled
BIN_IP_SRCS_ALARM DDB_ALARM_F_OUT_OF_RANGE 4 2 * * * * * * 39 36 58 72 60 Frequency Out Of Range
BIN_IP_SRCS_ALARM DDB_ALARM_VTS_SLOW 5 2 * * * * * * 40 37 59 73 61 VT Fail Alarm
BIN_IP_SRCS_ALARM DDB_ALARM_CTS 6 2 * * * * * * 41 38 60 74 62 CT Fail Alarm
BIN_IP_SRCS_ALARM DDB_ALARM_BREAKER_FAIL 7 2 * * * * * * 42 39 61 75 63 CB Fail Alarm
Broken Current Maintenance
BIN_IP_SRCS_ALARM DDB_ALARM_I_BROK_MAINT 8 2 * * * * * * 43 40 62 76 64 Alarm
Broken Current Lockout Alarm
BIN_IP_SRCS_ALARM DDB_ALARM_I_BROK_LOCKOUT 9 2 * * * * * * 44 41 63 77 65
Number of CB Operations
BIN_IP_SRCS_ALARM DDB_ALARM_CB_OPS_MAINT 10 2 * * * * * * 45 42 64 78 66 Maintenance Alarm
Number of CB Operations
BIN_IP_SRCS_ALARM DDB_ALARM_CB_OPS_LOCKOUT 11 2 * * * * * * 46 43 65 79 67 Lockout Alarm
CB Operation Time
BIN_IP_SRCS_ALARM DDB_ALARM_CB_OP_TIME_MAINT 12 2 * * * * * * 47 44 66 80 68 Maintenance Alarm
CB Operation Time Lockout
BIN_IP_SRCS_ALARM DDB_ALARM_CB_OP_TIME_LOCKOUT 13 2 * * * * * * 48 45 67 81 69 Alarm
BIN_IP_SRCS_ALARM DDB_ALARM_PRE_LOCKOUT 14 2 * * * * * * 49 46 68 82 70 Pre Lockout Alarm
Excessive Fault Frequency
BIN_IP_SRCS_ALARM DDB_ALARM_EFF_LOCKOUT 15 2 * * * * * * 50 47 69 83 71 Lockout Alarm
BIN_IP_SRCS_ALARM DDB_LOCKOUT_ALARM 16 2 * * * * * * 51 48 70 84 72 Lockout Alarm
BIN_IP_SRCS_ALARM DDB_ALARM_CB_STATUS 17 2 * * * * * * 52 49 71 85 73 CB Status Alarm
BIN_IP_SRCS_ALARM DDB_ALARM_CB_FAIL_TRIP 18 2 * * * * * * 53 50 72 86 74 Manual CB Failed to Trip
BIN_IP_SRCS_ALARM DDB_ALARM_CB_FAIL_CLOSE 19 2 * * * * * * 54 51 73 87 75 Manual CB Failed to Close
CB Not Healthy for Manual
BIN_IP_SRCS_ALARM DDB_ALARM_CB_CONTROL_UNHEALTHLY 20 2 * * * * * * 55 52 74 88 76 Close
DDB_ALARM_NO_CHECK_SYNC_CONTRO CB No Check Sync for Manual
BIN_IP_SRCS_ALARM L 21 2 * * * * * * 56 53 75 89 77 Close
Auto Recloser Lockout
BIN_IP_SRCS_ALARM DDB_ALARM_AR_LOCKOUT_MAX_SHOTS 22 2 * * * * * * 57 54 76 90 78
Setting Group Via Opto Invalid
BIN_IP_SRCS_ALARM DDB_ALARM_SG_OPTO_INVALID 23 2 * * * * * * 58 55 77 91 79
CB No Check Sync for A/R
BIN_IP_SRCS_ALARM DDB_ALARM_CB_FAIL_AR 24 2 * * * * * * 59 56 78 92 80 Close
BIN_IP_SRCS_ALARM DDB_ALARM_UNDER_V_1 25 2 * * * * * * 60 57 79 93 81 Undervoltage V<1 alarm
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 103

Part F: DNP3.0 Database


DNP Data Source
Table Source DDB Name Index Col Row Class Include In 1 2 3 4 5 Desription in
/* Output Relay Status virtual
Object 01 */ points P442 P442C P444G P444H P444C device profile
BIN_IP_SRCS_ALARM DDB_ALARM_UNDER_V_2 26 2 * * * * * * 61 58 80 94 82 Undervoltage V<2 alarm
BIN_IP_SRCS_ALARM DDB_ALARM_OVER_V_1 27 2 * * * * * * 62 59 81 95 83 Overvoltage V<1 alarm
BIN_IP_SRCS_ALARM DDB_ALARM_OVER_V_2 28 2 * * * * * * 63 60 82 96 84 Overvoltage V<2 alarm
BIN_IP_SRCS_ALARM DDB_ALARM_COS 29 2 * * * * * * 64 61 83 97 85 Carrier Out Of Service Alarm
BIN_IP_SRCS_ALARM DDB_ALARM_BROKEN_COND 30 2 * * * * * * 65 62 84 98 86 Broken Conductor Alarm
Capacitive Voltage
BIN_IP_SRCS_ALARM DDB_ALARM_CVTS 31 2 * * * * * * 66 63 85 99 87 Transformer Alarm
Not conventionnal CT Datas
BIN_IP_SRCS_ALARM DDB_ALARM_NOPRESENTS_DATAS_ACQ 32 2 * * * * * * 67 64 86 100 88 Alarm
Not conventionnal CT Validity
BIN_IP_SRCS_ALARM DDB_ALARM_VALIDITY_FAILURE_ACQ 33 2 * * * * * * 68 65 87 101 89 Alarm
Not conventionnal Mode Test
BIN_IP_SRCS_ALARM DDB_ALARM_MODE_TEST_ACQ 34 2 * * * * * * 69 66 88 102 90 Alarm
Not conventionnal Synchro
BIN_IP_SRCS_ALARM DDB_ALARM_NOTSYNCHRO_DATAS_ACQ 35 2 * * * * * * 70 67 89 103 91 Alarm
User Definable Alarm 1 (Self
BIN_IP_SRCS_ALARM DDB_ALARM_USER1 36 2 * * * * * * 71 68 90 104 92 Reset)
User Definable Alarm 2 (Self
BIN_IP_SRCS_ALARM DDB_ALARM_USER2 37 2 * * * * * * 72 69 91 105 93 Reset)
User Definable Alarm 3 (Self
BIN_IP_SRCS_ALARM DDB_ALARM_USER3 38 2 * * * * * * 73 70 92 106 94 Reset)
User Definable Alarm 4 (Self
BIN_IP_SRCS_ALARM DDB_ALARM_USER4 39 2 * * * * * * 74 71 93 107 95 Reset)
User Definable Alarm 5 (Self
BIN_IP_SRCS_ALARM DDB_ALARM_USER5 40 2 * * * * * * 75 72 94 108 96 Reset)
/* Miscellaneous Indications
*/
BIN_IP_SRCS_ALARM /*Battery Fail*/ 64 2 * * * * * * 76 73 95 109 97 Battery Status
BIN_IP_SRCS_ALARM /*Field voltage fail* 65 2 * * * * * * 77 74 96 110 98 Field Voltage Fai
BIN_IP_SRCS_ALARM /*2nd rear comms failure* 66 2 * * * * * * 78 75 97 111 99 2nd rear comms failure
BIN_IP_SRCS_ALARM /*Backup Setting Fail*/ 81 2 * * * * * * 79 76 98 112 100 Backup Settings Fai
BIN_IP_SRCS_ALARM /*Bad DNP Settings*/ 82 2 * * * * * * 80 77 99 113 101 Bad DNP Settings
BIN_IP_SRCS_PLATFORM DNPEV_PLAT_BIN_IP_IRIG_B 2 * * * * * * 81 78 100 114 102 IRIG-B Startus
/* Protection Events
*/
BIN_IP_SRCS_PROTECTION DDB_PRT_AR_CLOSE 2 * * * * * * 82 79 101 115 103 A/R Close
BIN_IP_SRCS_PROTECTION DDB_PRT_AR_1POLE_IN_PROG 2 * * * * * * 83 80 102 116 104 A/R 1P In Prog
BIN_IP_SRCS_PROTECTION DDB_PRT_AR_3POLE_IN_PROG 2 * * * * * * 84 81 103 117 105 A/R 3P In Prog
BIN_IP_SRCS_PROTECTION DDB_PRT_AR_1ST_CYCLE_IN_PROG 2 * * * * * * 85 82 104 118 106 A/R 1st In Prog
BIN_IP_SRCS_PROTECTION DDB_PRT_AR_234TH_CYCLE_IN_PROG 2 * * * * * * 86 83 105 119 107 A/R 234 In Prog
BIN_IP_SRCS_PROTECTION DDB_PRT_AR_TRIP_3PH 2 * * * * * * 87 84 106 120 108 A/R Trip 3P
BIN_IP_SRCS_PROTECTION DDB_PRT_AR_RECLAIM 2 * * * * * * 88 85 107 121 109 A/R Reclaim
BIN_IP_SRCS_PROTECTION DDB_PRT_AR_DISCRIM 2 * * * * * * 89 86 108 122 110 AR Discrim.
BIN_IP_SRCS_PROTECTION DDB_PRT_AR_ENABLE 2 * * * * * * 90 87 109 123 111 A/R Enable
BIN_IP_SRCS_PROTECTION DDB_PRT_AR_1PAR_ENABLE 2 * * * * * * 91 88 110 124 112 A/R SPAR Enable
BIN_IP_SRCS_PROTECTION DDB_PRT_AR_3PAR_ENABLE 2 * * * * * * 92 89 111 125 113 A/R TPAR Enable
BIN_IP_SRCS_PROTECTION DDB_PRT_AR_LOCKOUT 2 * * * * * * 93 90 112 126 114 A/R Lockout
BIN_IP_SRCS_PROTECTION DDB_PRT_AR_FORCE_SYNC 2 * * * * * * 94 91 113 127 115 A/R Force Sync.
BIN_IP_SRCS_PROTECTION DDB_PRT_SYNC 2 * * * * * * 95 92 114 128 116 Check Synch. OK
BIN_IP_SRCS_PROTECTION DDB_PRT_DEAD_LINE 2 * * * * * * 96 93 115 129 117 V< Dead Line
BIN_IP_SRCS_PROTECTION DDB_PRT_LIVE_LINE 2 * * * * * * 97 94 116 130 118 V> Live Line
BIN_IP_SRCS_PROTECTION DDB_PRT_DEAD_BUS 2 * * * * * * 98 95 117 131 119 V< Dead Bus
BIN_IP_SRCS_PROTECTION DDB_PRT_LIVE_BUS 2 * * * * * * 99 96 118 132 120 V> Live Bus
BIN_IP_SRCS_PROTECTION DDB_PRT_CONTROL_CLOSE_IN_PROG 2 * * * * * * 100 97 119 133 121 Ctrl Cls In Prog
BIN_IP_SRCS_PROTECTION DDB_PRT_CARRIER_SEND 2 * * * * * * 101 98 120 134 122 DIST Sig. Send
BIN_IP_SRCS_PROTECTION DDB_PRT_UNB_CR 2 * * * * * * 102 99 121 135 123 DIST UNB CR
BIN_IP_SRCS_PROTECTION DDB_PRT_DIST_FWD 2 * * * * * * 103 100 122 136 124 DIST Fwd
BIN_IP_SRCS_PROTECTION DDB_PRT_DIST_REV 2 * * * * * * 104 101 123 137 125 DIST Rev
BIN_IP_SRCS_PROTECTION DDB_PRT_DIST_TRIP_A 2 * * * * * * 105 102 124 138 126 DIST Trip A
BIN_IP_SRCS_PROTECTION DDB_PRT_DIST_TRIP_B 2 * * * * * * 106 103 125 139 127 DIST Trip B
BIN_IP_SRCS_PROTECTION DDB_PRT_DIST_TRIP_C 2 * * * * * * 107 104 126 140 128 DIST Trip C
BIN_IP_SRCS_PROTECTION DDB_PRT_DIST_START_A 2 * * * * * * 108 105 127 141 129 DIST Start A
BIN_IP_SRCS_PROTECTION DDB_PRT_DIST_START_B 2 * * * * * * 109 106 128 142 130 DIST Start B
BIN_IP_SRCS_PROTECTION DDB_PRT_DIST_START_C 2 * * * * * * 110 107 129 143 131 DIST Start C
BIN_IP_SRCS_PROTECTION DDB_PRT_DIST_CR_ACC 2 * * * * * * 111 108 130 144 132 DIST Sch. Accel.
BIN_IP_SRCS_PROTECTION DDB_PRT_DIST_CR_PERM 2 * * * * * * 112 109 131 145 133 DIST Sch. Perm.
BIN_IP_SRCS_PROTECTION DDB_PRT_DIST_CR_BLOCK 2 * * * * * * 113 110 132 146 134 DIST Sch. Block.
BIN_IP_SRCS_PROTECTION DDB_PRT_Z1 2 * * * * * * 114 111 133 147 135 Z1
BIN_IP_SRCS_PROTECTION DDB_PRT_Z1X 2 * * * * * * 115 112 134 148 136 Z1X
BIN_IP_SRCS_PROTECTION DDB_PRT_Z2 2 * * * * * * 116 113 135 149 137 Z2
BIN_IP_SRCS_PROTECTION DDB_PRT_Z3 2 * * * * * * 117 114 136 150 138 Z3
BIN_IP_SRCS_PROTECTION DDB_PRT_Z4 2 * * * * * * 118 115 137 151 139 Z4
BIN_IP_SRCS_PROTECTION DDB_PRT_Zp 2 * * * * * * 119 116 138 152 140 Zp
BIN_IP_SRCS_PROTECTION DDB_PRT_T1 2 * * * * * * 120 117 139 153 141 T1
BIN_IP_SRCS_PROTECTION DDB_PRT_T2 2 * * * * * * 121 118 140 154 142 T2
BIN_IP_SRCS_PROTECTION DDB_PRT_T3 2 * * * * * * 122 119 141 155 143 T3
BIN_IP_SRCS_PROTECTION DDB_PRT_T4 2 * * * * * * 123 120 142 156 144 T4
BIN_IP_SRCS_PROTECTION DDB_PRT_TZP 2 * * * * * * 124 121 143 157 145 Tzp
BIN_IP_SRCS_PROTECTION DDB_PRT_WI_TRIP_A 2 * * * * * * 125 122 144 158 146 WI Trip A
BIN_IP_SRCS_PROTECTION DDB_PRT_WI_TRIP_B 2 * * * * * * 126 123 145 159 147 WI Trip B
BIN_IP_SRCS_PROTECTION DDB_PRT_WI_TRIP_C 2 * * * * * * 127 124 146 160 148 WI Trip C
BIN_IP_SRCS_PROTECTION DDB_PRT_POWER_SWING 2 * * * * * * 128 125 147 161 149 Power Swing
BIN_IP_SRCS_PROTECTION DDB_PRT_REVERSAL_GUARD 2 * * * * * * 129 126 148 162 150 Reversal Guard
BIN_IP_SRCS_PROTECTION DDB_PRT_DEF_CARRIER_SEND 2 * * * * * * 130 127 149 163 151 DEF Sig. Send
BIN_IP_SRCS_PROTECTION DDB_PRT_UNB_CR_DEF 2 * * * * * * 131 128 150 164 152 DEF UNB CR
BIN_IP_SRCS_PROTECTION DDB_PRT_DEF_REV 2 * * * * * * 132 129 151 165 153 DEF Rev
BIN_IP_SRCS_PROTECTION DDB_PRT_DEF_FWD 2 * * * * * * 133 130 152 166 154 DEF Fwd
BIN_IP_SRCS_PROTECTION DDB_PRT_DEF_START_AN 2 * * * * * * 134 131 153 167 155 DEF Start A
BIN_IP_SRCS_PROTECTION DDB_PRT_DEF_START_BN 2 * * * * * * 135 132 154 168 156 DEF Start B
BIN_IP_SRCS_PROTECTION DDB_PRT_DEF_START_CN 2 * * * * * * 136 133 155 169 157 DEF Start C
BIN_IP_SRCS_PROTECTION DDB_PRT_DEF_TRIP_A 2 * * * * * * 137 134 156 170 158 DEF Trip A
BIN_IP_SRCS_PROTECTION DDB_PRT_DEF_TRIP_B 2 * * * * * * 138 135 157 171 159 DEF Trip B
BIN_IP_SRCS_PROTECTION DDB_PRT_DEF_TRIP_C 2 * * * * * * 139 136 158 172 160 DEF Trip C
BIN_IP_SRCS_PROTECTION DDB_PRT_IN_SUP_1_TRIP 2 * * * * * * 140 137 159 173 161 IN>1 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_IN_SUP_2_TRIP 2 * * * * * * 141 138 160 174 162 IN>2 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_IN_SUP_1_PICK_UP 2 * * * * * * 142 139 161 175 163 IN>1 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_IN_SUP_2_PICK_UP 2 * * * * * * 143 140 162 176 164 IN>2 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_UNDER_V_ANY_PICK_UP_A 2 * * * * * * 144 141 163 177 165 V< Start Any A
BIN_IP_SRCS_PROTECTION DDB_PRT_UNDER_V_ANY_PICK_UP_B 2 * * * * * * 145 142 164 178 166 V< Start Any B
BIN_IP_SRCS_PROTECTION DDB_PRT_UNDER_V_ANY_PICK_UP_C 2 * * * * * * 146 143 165 179 167 V< Start Any C
BIN_IP_SRCS_PROTECTION DDB_PRT_UNDER_V_1_PICK_UP 2 * * * * * * 147 144 166 180 168 V<1 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_UNDER_V_2_PICK_UP 2 * * * * * * 148 145 167 181 169 V<2 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_UNDER_V_1_TRIP 2 * * * * * * 149 146 168 182 170 V<1 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_UNDER_V_2_TRIP 2 * * * * * * 150 147 169 183 171 V<2 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V_ANY_PICK_UP_A 2 * * * * * * 151 148 170 184 172 V> Start Any A
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V_ANY_PICK_UP_B 2 * * * * * * 152 149 171 185 173 V> Start Any B
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V_ANY_PICK_UP_C 2 * * * * * * 153 150 172 186 174 V> Start Any C
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V_1_PICK_UP 2 * * * * * * 154 151 173 187 175 V>1 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V_2_PICK_UP 2 * * * * * * 155 152 174 188 176 V>2 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V_1_TRIP 2 * * * * * * 156 153 175 189 177 V>1 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V_2_TRIP 2 * * * * * * 157 154 176 190 178 V>2 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_I2_SUP_PICK_UP_1 2 * * * * * * 158 155 177 191 179 I2>1 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_I2_SUP_TRIP_1 2 * * * * * * 159 156 178 192 180 I2>1 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_I_SUP_ANY_PICK_UP_A 2 * * * * * * 160 157 179 193 181 I> Start Any A
BIN_IP_SRCS_PROTECTION DDB_PRT_I_SUP_ANY_PICK_UP_B 2 * * * * * * 161 158 180 194 182 I> Start Any B
BIN_IP_SRCS_PROTECTION DDB_PRT_I_SUP_ANY_PICK_UP_C 2 * * * * * * 162 159 181 195 183 I> Start Any C
BIN_IP_SRCS_PROTECTION DDB_PRT_I_SUP_1_PICK_UP 2 * * * * * * 163 160 182 196 184 I>1 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_I_SUP_2_PICK_UP 2 * * * * * * 164 161 183 197 185 I>2 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_I_SUP_3_PICK_UP 2 * * * * * * 165 162 184 198 186 I>3 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_I_SUP_4_PICK_UP 2 * * * * * * 166 163 185 199 187 I>4 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_I_SUP_1_TRIP 2 * * * * * * 167 164 186 200 188 I>1 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_I_SUP_2_TRIP 2 * * * * * * 168 165 187 201 189 I>2 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_I_SUP_3_TRIP 2 * * * * * * 169 166 188 202 190 I>3 Trip
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 104

Part F: DNP3.0 Database


DNP Data Source
Table Source DDB Name Index Col Row Class Include In 1 2 3 4 5 Desription in
/* Output Relay Status virtual
Object 01 */ points P442 P442C P444G P444H P444C device profile
BIN_IP_SRCS_PROTECTION DDB_PRT_I_SUP_4_TRIP 2 * * * * * * 170 167 189 203 191 I>4 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_SOTF_ENABLE 2 * * * * * * 171 168 190 204 192 SOTF Enable
BIN_IP_SRCS_PROTECTION DDB_PRT_I_TOR_ENABLE 2 * * * * * * 172 169 191 205 193 TOR Enable
BIN_IP_SRCS_PROTECTION DDB_PRT_TOC_START_A 2 * * * * * * 173 170 192 206 194 TOC Start A
BIN_IP_SRCS_PROTECTION DDB_PRT_TOC_START_B 2 * * * * * * 174 171 193 207 195 TOC Start B
BIN_IP_SRCS_PROTECTION DDB_PRT_TOC_START_C 2 * * * * * * 175 172 194 208 196 TOC Start C
BIN_IP_SRCS_PROTECTION DDB_PRT_ANY_START 2 * * * * * * 176 173 195 209 197 Any Start
BIN_IP_SRCS_PROTECTION DDB_PRT_1PH 2 * * * * * * 177 174 196 210 198 1ph Fault
BIN_IP_SRCS_PROTECTION DDB_PRT_2PH 2 * * * * * * 178 175 197 211 199 2ph Fault
BIN_IP_SRCS_PROTECTION DDB_PRT_3PH 2 * * * * * * 179 176 198 212 200 3ph Fault
BIN_IP_SRCS_PROTECTION DDB_PRT_ANY_TRIP 2 * * * * * * 180 177 199 213 201 Any Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_ANY_INTERNAL_TRIP_A 2 * * * * * * 181 178 200 214 202 Any Int. Trip A
BIN_IP_SRCS_PROTECTION DDB_PRT_ANY_INTERNAL_TRIP_B 2 * * * * * * 182 179 201 215 203 Any Int. Trip B
BIN_IP_SRCS_PROTECTION DDB_PRT_ANY_INTERNAL_TRIP_C 2 * * * * * * 183 180 202 216 204 Any Int. Trip C
BIN_IP_SRCS_PROTECTION DDB_PRT_ANY_TRIP_A 2 * * * * * * 184 181 203 217 205 Any Trip A
BIN_IP_SRCS_PROTECTION DDB_PRT_ANY_TRIP_B 2 * * * * * * 185 182 204 218 206 Any Trip B
BIN_IP_SRCS_PROTECTION DDB_PRT_ANY_TRIP_C 2 * * * * * * 186 183 205 219 207 Any Trip C
BIN_IP_SRCS_PROTECTION DDB_PRT_1P_TRIP 2 * * * * * * 187 184 206 220 208 1P Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_3P_TRIP 2 * * * * * * 188 185 207 221 209 3P Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_BROKEN_CONDUCTOR_TRIP 2 * * * * * * 189 186 208 222 210 Brk.Conduct.Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_LOSS_OF_LOAD_TRIP 2 * * * * * * 190 187 209 223 211 Loss. Load Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_SOTF_TOR_TRIP 2 * * * * * * 191 188 210 224 212 SOTF/TOR Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_TBF1_TRIP_3PH 2 * * * * * * 192 189 211 225 213 tBF1 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_TBF2_TRIP_3PH 2 * * * * * * 193 190 212 226 214 tBF2 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_CONTROL_TRIP 2 * * * * * * 194 191 213 227 215 Control Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_CONTROL_CLOSE 2 * * * * * * 195 192 214 228 216 Control Close
BIN_IP_SRCS_PROTECTION DDB_PRT_VTS_FAST 2 * * * * * * 196 193 215 229 217 VTS Fast
BIN_IP_SRCS_PROTECTION DDB_PRT_CB_AUX_A 2 * * * * * * 197 194 216 230 218 CB Aux A
BIN_IP_SRCS_PROTECTION DDB_PRT_CB_AUX_B 2 * * * * * * 198 195 217 231 219 CB Aux B
BIN_IP_SRCS_PROTECTION DDB_PRT_CB_AUX_C 2 * * * * * * 199 196 218 232 220 CB Aux C
BIN_IP_SRCS_PROTECTION DDB_PRT_ANY_POLE_DEAD 2 * * * * * * 200 197 219 233 221 Any Pole Dead
BIN_IP_SRCS_PROTECTION DDB_PRT_ALL_POLE_DEAD 2 * * * * * * 201 198 220 234 222 All Pole Dead
BIN_IP_SRCS_PROTECTION DDB_PRT_DIR_AV_WIT_FILT 2 * * * * * * 202 199 221 235 223 DIST Fwd No Filt
BIN_IP_SRCS_PROTECTION DDB_PRT_DIR_AM_WIT_FILT 2 * * * * * * 203 200 222 236 224 DIST Rev No Filt
BIN_IP_SRCS_PROTECTION DDB_PRT_CVMR 2 * * * * * * 204 201 223 237 225 DIST Convergency
BIN_IP_SRCS_PROTECTION DDB_PRT_CROSS_COUNTRY 2 * * * * * * 205 202 224 238 226 Cross Count. Flt
BIN_IP_SRCS_PROTECTION DDB_PRT_ZSP_START 2 * * * * * * 206 203 225 239 227 ZSP Start
BIN_IP_SRCS_PROTECTION DDB_PRT_ZSP_TRIP 2 * * * * * * 207 204 226 240 228 ZSP Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_Z1_WIT_FILT 2 * * * * * * 208 205 227 241 229 Z1 Not Filtered
BIN_IP_SRCS_PROTECTION DDB_PRT_OUT_OF_STEP 2 * * * * * * 209 206 228 242 230 Out Of Step
BIN_IP_SRCS_PROTECTION DDB_PRT_STABLE_SWING 2 * * * * * * 210 207 229 243 231 S. Swing
BIN_IP_SRCS_PROTECTION DDB_PRT_OUT_OF_STEP_CONF 2 * * * * * * 211 208 230 244 232 Out Of Step Conf
BIN_IP_SRCS_PROTECTION DDB_PRT_STABLE_SWING_CONF 2 * * * * * * 212 209 231 245 233 S. Swing Conf
BIN_IP_SRCS_PROTECTION DDB_PRT_DIST_START_N 2 * * * * * * 213 210 232 246 234 Dist Start N
BIN_IP_SRCS_PROTECTION DDB_PRT_IN_SUP_3_TRIP 2 * * * * * * 214 211 233 247 235 IN>3 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_IN_SUP_4_TRIP 2 * * * * * * 215 212 234 248 236 IN>4 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_IN_SUP_3_PICK_UP 2 * * * * * * 216 213 235 249 237 IN>3 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_IN_SUP_4_PICK_UP 2 * * * * * * 217 214 236 250 238 IN>4 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_PAP_TRIP_A 2 * * * * * * 218 215 237 251 239 PAP Trip A
BIN_IP_SRCS_PROTECTION DDB_PRT_PAP_TRIP_B 2 * * * * * * 219 216 238 252 240 PAP Trip B
BIN_IP_SRCS_PROTECTION DDB_PRT_PAP_TRIP_C 2 * * * * * * 220 217 239 253 241 PAP Trip C
BIN_IP_SRCS_PROTECTION DDB_PRT_PAP_TRIP_IN 2 * * * * * * 221 218 240 254 242 PAP Trip IN
BIN_IP_SRCS_PROTECTION DDB_PRT_PAP_START_A 2 * * * * * * 222 219 241 255 243 PAP Start A
BIN_IP_SRCS_PROTECTION DDB_PRT_PAP_START_B 2 * * * * * * 223 220 242 256 244 PAP Start B
BIN_IP_SRCS_PROTECTION DDB_PRT_PAP_START_C 2 * * * * * * 224 221 243 257 245 PAP Start C
BIN_IP_SRCS_PROTECTION DDB_PRT_PAP_PRES_IN 2 * * * * * * 225 222 244 258 246 PAP Pres IN
BIN_IP_SRCS_PROTECTION DDB_PRT_PAP_PRE_START 2 * * * * * * 226 223 245 259 247 PAP Pre Start
BIN_IP_SRCS_PROTECTION DDB_PRT_TRACE_TRIG_OK 2 * * * * * * 227 224 246 260 248 Trace Trig OK
BIN_IP_SRCS_PROTECTION DDB_PRT_THERMAL_OVERL_ALARM 2 * * * * * * 228 225 247 261 249 Thermal Alarm
BIN_IP_SRCS_PROTECTION DDB_PRT_THERMAL_OVERL_TRIP 2 * * * * * * 229 226 248 262 250 Trip Thermal
BIN_IP_SRCS_PROTECTION DDB_PRT_UNDER_V1_PICK_UP_A 2 * * * * * * 230 227 249 263 251 V<1 Start A
BIN_IP_SRCS_PROTECTION DDB_PRT_UNDER_V1_PICK_UP_B 2 * * * * * * 231 228 250 264 252 V<1 Start B
BIN_IP_SRCS_PROTECTION DDB_PRT_UNDER_V1_PICK_UP_C 2 * * * * * * 232 229 251 265 253 V<1 Start C
BIN_IP_SRCS_PROTECTION DDB_PRT_UNDER_V2_PICK_UP_A 2 * * * * * * 233 230 252 266 254 V<2 Start A
BIN_IP_SRCS_PROTECTION DDB_PRT_UNDER_V2_PICK_UP_B 2 * * * * * * 234 231 253 267 255 V<2 Start B
BIN_IP_SRCS_PROTECTION DDB_PRT_UNDER_V2_PICK_UP_C 2 * * * * * * 235 232 254 268 256 V<2 Start C
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V1_PICK_UP_A 2 * * * * * * 236 233 255 269 257 V>1 Start A
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V1_PICK_UP_B 2 * * * * * * 237 234 256 270 258 V>1 Start B
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V1_PICK_UP_C 2 * * * * * * 238 235 257 271 259 V>1 Start C
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V2_PICK_UP_A 2 * * * * * * 239 236 258 272 260 V>2 Start A
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V2_PICK_UP_B 2 * * * * * * 240 237 259 273 261 V>2 Start B
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V2_PICK_UP_C 2 * * * * * * 241 238 260 274 262 V>2 Start C
BIN_IP_SRCS_PROTECTION DDB_PRT_I2_SUP_PICK_UP_2 2 * * * * * * 242 239 261 275 263 I2>2 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_I2_SUP_PICK_UP_3 2 * * * * * * 243 240 262 276 264 I2>3 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_I2_SUP_PICK_UP_4 2 * * * * * * 244 241 263 277 265 I2>4 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_I2_SUP_TRIP_2 2 * * * * * * 245 242 264 278 266 I2>2 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_I2_SUP_TRIP_3 2 * * * * * * 246 243 265 279 267 I2>3 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_I2_SUP_TRIP_4 2 * * * * * * 247 244 266 280 268 I2>4 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V0_1_PICK_UP 2 * * * * * * 248 245 267 281 269 VN>1 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V0_2_PICK_UP 2 * * * * * * 249 246 268 282 270 VN>2 Start
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V0_1_TRIP 2 * * * * * * 250 247 269 283 271 VN>1 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_OVER_V0_2_TRIP 2 * * * * * * 251 248 270 284 272 VN>2 Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_ANY_INTERNAL_TRIP 2 * * * * * * 252 249 271 285 273 Any Internal Trip
BIN_IP_SRCS_PROTECTION DDB_PRT_ZQ 2 * * * * * * 253 250 272 286 274 Zp
BIN_IP_SRCS_PROTECTION DDB_PRT_TZQ 2 * * * * * * 254 251 273 287 275 TZp
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_1 2 * * * * * * 255 252 274 288 276 Virtual Input 1
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_2 2 * * * * * * 256 253 275 289 277 Virtual Input 2
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_3 2 * * * * * * 257 254 276 290 278 Virtual Input 3
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_4 2 * * * * * * 258 255 277 291 279 Virtual Input 4
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_5 2 * * * * * * 259 256 278 292 280 Virtual Input 5
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_6 2 * * * * * * 260 257 279 293 281 Virtual Input 6
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_7 2 * * * * * * 261 258 280 294 282 Virtual Input 7
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_8 2 * * * * * * 262 259 281 295 283 Virtual Input 8
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_9 2 * * * * * * 263 260 282 296 284 Virtual Input 9
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_10 2 * * * * * * 264 261 283 297 285 Virtual Input 10
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_11 2 * * * * * * 265 262 284 298 286 Virtual Input 11
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_12 2 * * * * * * 266 263 285 299 287 Virtual Input 12
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_13 2 * * * * * * 267 264 286 300 288 Virtual Input 13
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_14 2 * * * * * * 268 265 287 301 289 Virtual Input 14
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_15 2 * * * * * * 269 266 288 302 290 Virtual Input 15
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_16 2 * * * * * * 270 267 289 303 291 Virtual Input 16
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_17 2 * * * * * * 271 268 290 304 292 Virtual Input 17
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_18 2 * * * * * * 272 269 291 305 293 Virtual Input 18
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_19 2 * * * * * * 273 270 292 306 294 Virtual Input 19
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_20 2 * * * * * * 274 271 293 307 295 Virtual Input 20
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_21 2 * * * * * * 275 272 294 308 296 Virtual Input 21
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_22 2 * * * * * * 276 273 295 309 297 Virtual Input 22
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_23 2 * * * * * * 277 274 296 310 298 Virtual Input 23
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_24 2 * * * * * * 278 275 297 311 299 Virtual Input 24
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_25 2 * * * * * * 279 276 298 312 300 Virtual Input 25
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_26 2 * * * * * * 280 277 299 313 301 Virtual Input 26
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_27 2 * * * * * * 281 278 300 314 302 Virtual Input 27
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_28 2 * * * * * * 282 279 301 315 303 Virtual Input 28
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_29 2 * * * * * * 283 280 302 316 304 Virtual Input 29
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_30 2 * * * * * * 284 281 303 317 305 Virtual Input 30
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_31 2 * * * * * * 285 282 304 318 306 Virtual Input 31
BIN_IP_SRCS_PROTECTION DDB_GOOSEIN_32 2 * * * * * * 286 283 305 319 307 Virtual Input 32
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_1 2 * * * * * * 287 284 306 320 308 Virtual Output 1
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_2 2 * * * * * * 288 285 307 321 309 Virtual Output 2
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_3 2 * * * * * * 289 286 308 322 310 Virtual Output 3
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_4 2 * * * * * * 290 287 309 323 311 Virtual Output 4
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_5 2 * * * * * * 291 288 310 324 312 Virtual Output 5
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_6 2 * * * * * * 292 289 311 325 313 Virtual Output 6
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_7 2 * * * * * * 293 290 312 326 314 Virtual Output 7
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_8 2 * * * * * * 294 291 313 327 315 Virtual Output 8
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 105

Part F: DNP3.0 Database


DNP Data Source
Table Source DDB Name Index Col Row Class Include In 1 2 3 4 5 Desription in
/* Output Relay Status virtual
Object 01 */ points P442 P442C P444G P444H P444C device profile
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_9 2 * * * * * * 295 292 314 328 316 Virtual Output 9
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_10 2 * * * * * * 296 293 315 329 317 Virtual Output 10
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_11 2 * * * * * * 297 294 316 330 318 Virtual Output 11
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_12 2 * * * * * * 298 295 317 331 319 Virtual Output 12
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_13 2 * * * * * * 299 296 318 332 320 Virtual Output 13
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_14 2 * * * * * * 300 297 319 333 321 Virtual Output 14
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_15 2 * * * * * * 301 298 320 334 322 Virtual Output 15
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_16 2 * * * * * * 302 299 321 335 323 Virtual Output 16
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_17 2 * * * * * * 303 300 322 336 324 Virtual Output 17
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_18 2 * * * * * * 304 301 323 337 325 Virtual Output 18
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_19 2 * * * * * * 305 302 324 338 326 Virtual Output 19
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_20 2 * * * * * * 306 303 325 339 327 Virtual Output 20
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_21 2 * * * * * * 307 304 326 340 328 Virtual Output 21
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_22 2 * * * * * * 308 305 327 341 329 Virtual Output 22
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_23 2 * * * * * * 309 306 328 342 330 Virtual Output 23
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_24 2 * * * * * * 310 307 329 343 331 Virtual Output 24
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_25 2 * * * * * * 311 308 330 344 332 Virtual Output 25
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_26 2 * * * * * * 312 309 331 345 333 Virtual Output 26
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_27 2 * * * * * * 313 310 332 346 334 Virtual Output 27
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_28 2 * * * * * * 314 311 333 347 335 Virtual Output 28
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_29 2 * * * * * * 315 312 334 348 336 Virtual Output 29
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_30 2 * * * * * * 316 313 335 349 337 Virtual Output 30
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_31 2 * * * * * * 317 314 336 350 338 Virtual Output 31
BIN_IP_SRCS_PROTECTION DDB_GOOSEOUT_32 2 * * * * * * 318 315 337 351 339 Virtual Output 32
/* Protection Events
*/ 2
BIN_IP_SRCS_PROTECTION DDB_FN_KEY_1 2 * * * * * * 319 316 338 352 340 Fn Key 1
BIN_IP_SRCS_PROTECTION DDB_FN_KEY_2 2 * * * * * * 320 317 339 353 341 Fn Key 2
BIN_IP_SRCS_PROTECTION DDB_FN_KEY_3 2 * * * * * * 321 318 340 354 342 Fn Key 3
BIN_IP_SRCS_PROTECTION DDB_FN_KEY_4 2 * * * * * * 322 319 341 355 343 Fn Key 4
BIN_IP_SRCS_PROTECTION DDB_FN_KEY_5 2 * * * * * * 323 320 342 356 344 Fn Key 5
BIN_IP_SRCS_PROTECTION DDB_FN_KEY_6 2 * * * * * * 324 321 343 357 345 Fn Key 6
BIN_IP_SRCS_PROTECTION DDB_FN_KEY_7 2 * * * * * * 325 322 344 358 346 Fn Key 7
BIN_IP_SRCS_PROTECTION DDB_FN_KEY_8 2 * * * * * * 326 323 345 359 347 Fn Key 8
BIN_IP_SRCS_PROTECTION DDB_FN_KEY_9 2 * * * * * * 327 324 346 360 348 Fn Key 9
BIN_IP_SRCS_PROTECTION DDB_FN_KEY_10 2 * * * * * * 328 325 347 361 349 Fn Key 10

Pulse On Trip

Virtual Points
Pulse On Nul
CROB Type

Include In
Latch Off
Latch On

Pulse On
Close
Object 10 Object Name Col Row P442 P442C P444G P444H P444C

/* Activate setting groups *


0 Activate setting group 1 0xFF 0x01 Single Allow Allow Allow Allow Allow * * * * * *
1 Activate setting group 2 0xFF 0x02 Single Allow Allow Allow Allow Allow * * * * * *
2 Activate setting group 3 0xFF 0x03 Single Allow Allow Allow Allow Allow * * * * * *
3 Activate setting group 4 0xFF 0x04 Single Allow Allow Allow Allow Allow * * * * * *
/* Controls
*/
4 Trip CB 0xFF 0x10 Single Allow Allow Allow Allow Allow * * * * * *
5 CB Close 0xFF 0x11 Single Allow Allow Allow Allow Allow * * * * * *
6 Reset Indication 0x01 0xFF Single Allow Allow Allow Allow Allow * * * * * *
7 Reset Demand 0x03 0x25 Single Allow Allow Allow Allow Allow * * * * * *
8 Reset Therma 0x04 0x03 Single Allow Allow Allow Allow Allow * * * * * *
9 Reset CB datas 0x06 0x08 Single Allow Allow Allow Allow Allow * * * * * *
10 Reset Total A/R 0x06 0x0B Single Allow Allow Allow Allow Allow * * * * * *
11 Clear Event Log 0x0B 0x01 Single Allow Allow Allow Allow Allow * * * * * *
12 Clear Fault Log 0x0B 0x02 Single Allow Allow Allow Allow Allow * * * * * *
13 Clear Maintenance Log 0x0B 0x03 Single Allow Allow Allow Allow Allow * * * * * *
14 Contact Test 0x0F 0x11 Single Allow Allow Allow Allow Allow * * * * * *
15 Test LEDs 0x0F 0x12 Single Allow Allow Allow Allow Allow * * * * * *
16 Autoreclose Test - 3 phase 0xFF 0x12 Single Allow Allow Allow Allow Allow * * * * * *
17 Autoreclose Test - Phase A 0xFF 0x13 Single Allow Allow Allow Allow Allow * * * * * *
18 Autoreclose Test - Phase B 0xFF 0x14 Single Allow Allow Allow Allow Allow * * * * * *
19 Autoreclose Test - Phase C 0xFF 0x15 Single Allow Allow Allow Allow Allow * * * * * *
20 Lockout Reset 0x10 0x11 Single Allow Allow Allow Allow Allow * * * * * *
/* Control Virtual Input Status
*/
21 DDB_CTRL_IP_1 0x12 0x02 Paired Reject Allow Allow Allow Allow * * * * * *
22 DDB_CTRL_IP_2 0x12 0x03 Paired Reject Allow Allow Allow Allow * * * * * *
23 DDB_CTRL_IP_3 0x12 0x04 Paired Reject Allow Allow Allow Allow * * * * * *
24 DDB_CTRL_IP_4 0x12 0x05 Paired Reject Allow Allow Allow Allow * * * * * *
25 DDB_CTRL_IP_5 0x12 0x06 Paired Reject Allow Allow Allow Allow * * * * * *
26 DDB_CTRL_IP_6 0x12 0x07 Paired Reject Allow Allow Allow Allow * * * * * *
27 DDB_CTRL_IP_7 0x12 0x08 Paired Reject Allow Allow Allow Allow * * * * * *
28 DDB_CTRL_IP_8 0x12 0x09 Paired Reject Allow Allow Allow Allow * * * * * *
29 DDB_CTRL_IP_9 0x12 0x0A Paired Reject Allow Allow Allow Allow * * * * * *
30 DDB_CTRL_IP_10 0x12 0x0B Paired Reject Allow Allow Allow Allow * * * * * *
31 DDB_CTRL_IP_11 0x12 0x0C Paired Reject Allow Allow Allow Allow * * * * * *
32 DDB_CTRL_IP_12 0x12 0x0D Paired Reject Allow Allow Allow Allow * * * * * *
33 DDB_CTRL_IP_13 0x12 0x0E Paired Reject Allow Allow Allow Allow * * * * * *
34 DDB_CTRL_IP_14 0x12 0x0F Paired Reject Allow Allow Allow Allow * * * * * *
35 DDB_CTRL_IP_15 0x12 0x10 Paired Reject Allow Allow Allow Allow * * * * * *
36 DDB_CTRL_IP_16 0x12 0x11 Paired Reject Allow Allow Allow Allow * * * * * *
37 DDB_CTRL_IP_17 0x12 0x12 Paired Reject Allow Allow Allow Allow * * * * * *
38 DDB_CTRL_IP_18 0x12 0x13 Paired Reject Allow Allow Allow Allow * * * * * *
39 DDB_CTRL_IP_19 0x12 0x14 Paired Reject Allow Allow Allow Allow * * * * * *
40 DDB_CTRL_IP_20 0x12 0x15 Paired Reject Allow Allow Allow Allow * * * * * *
41 DDB_CTRL_IP_21 0x12 0x16 Paired Reject Allow Allow Allow Allow * * * * * *
42 DDB_CTRL_IP_22 0x12 0x17 Paired Reject Allow Allow Allow Allow * * * * * *
43 DDB_CTRL_IP_23 0x12 0x18 Paired Reject Allow Allow Allow Allow * * * * * *
44 DDB_CTRL_IP_24 0x12 0x19 Paired Reject Allow Allow Allow Allow * * * * * *
45 DDB_CTRL_IP_25 0x12 0x1A Paired Reject Allow Allow Allow Allow * * * * * *
46 DDB_CTRL_IP_26 0x12 0x1B Paired Reject Allow Allow Allow Allow * * * * * *
47 DDB_CTRL_IP_27 0x12 0x1C Paired Reject Allow Allow Allow Allow * * * * * *
48 DDB_CTRL_IP_28 0x12 0x1D Paired Reject Allow Allow Allow Allow * * * * * *
49 DDB_CTRL_IP_29 0x12 0x1E Paired Reject Allow Allow Allow Allow * * * * * *
50 DDB_CTRL_IP_30 0x12 0x1F Paired Reject Allow Allow Allow Allow * * * * * *
51 DDB_CTRL_IP_31 0x12 0x20 Paired Reject Allow Allow Allow Allow * * * * * *
52 DDB_CTRL_IP_32 0x12 0x21 Paired Reject Allow Allow Allow Allow * * * * * *
/* Record Control - Uncompressed Disturbance
Recorder */
53 Clear Disturbance Records 0x0B 0x30 Single Allow Allow Allow Allow Allow * * * * * *
Include In
Virtual
Points

Object 20 Object Name Col Row Class Frozen 1 2 3 4 5


Desription in device profile

0 CB A Operations 0x06 0x01 3 Allow Freeze * * * * * * CB A Operations

1 CB B Operations 0x06 0x02 3 Allow Freeze * * * * * * CB B Operations

2 CB C Operations 0x06 0x03 3 Allow Freeze * * * * * * CB C Operations

3 Total 1P Reclosures 0x06 0x09 3 Allow Freeze * * * * * * Total 1P Reclosures

4 Total 3P Reclosures 0x06 0x0A 3 Allow Freeze * * * * * * Total 3P Reclosures


X
Total IA Broken (where x is
5 Total IA Broken 0x06 0x04 3 Allow Freeze * * * * * * configurable between 1 – 2)
Total IBX Broken (where x is
6 Total IB Broken 0x06 0x05 3 Allow Freeze * * * * * * configurable between 1 – 2)
X
Total IB Broken (where x is
7 Total IC Broken 0x06 0x06 3 Allow Freeze * * * * * * configurable between 1 – 2)
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 106

Part F: DNP3.0 Database

Include In
Virtual
Points
Deadb Scaling
Object 30 Source Object Name Col Row Class 1 2 3 4 5 Desription in device profile
and factor index

/* Active group
*/
0 Active group 0x00 0x0E 3 1 Null * * * * * * Active Group
/* Measurements 1
*/
Phase IA Magnitude
* * *
1 IA Magnitude 0x02 0x01 3 0,005 Currents * * *
IA Phase Angle
* * *
2 IA Phase Angle 0x02 0x02 3 0,01 Phase Angles * * *
Phase IB Magnitude
* * *
3 IB Magnitude 0x02 0x03 3 0,005 Currents * * *
IB Phase Angle
* * *
4 IB Phase Angle 0x02 0x04 3 0,01 Phase Angles * * *
Phase IC Magnitude
* * *
5 IC Magnitude 0x02 0x05 3 0,005 Currents * * *
IC Phase Angle
* * *
6 IC Phase Angle 0x02 0x06 3 0,01 Phase Angles * * *
Phase IN Derived Magnitude
* * *
7 IN Derived Magnitude 0x02 0x09 3 0,005 Currents * * *
IN Derived Angle
* * *
8 IN Derived Phase Angle 0x02 0x0A 3 0,01 Phase Angles * * *
Phase I1 Magnitude
* * *
9 I1 Magnitude 0x02 0x0D 3 0,005 Currents * * *
Phase I2 Magnitude
* * *
10 I2 Magnitude 0x02 0x0E 3 0,005 Currents * * *
Phase I0 Magnitude
* * *
11 I0 Magnitude 0x02 0x0F 3 0,005 Currents * * *
Phase VAB Magnitude
* * *
12 VAB Magnitude 0x02 0x14 3 0,01 Voltages * * *
VAB Phase Angle
* * *
13 VAB Phase Angle 0x02 0x15 3 0,01 Phase Angles * * *
Phase VBC Magnitude
* * *
14 VBC Magnitude 0x02 0x16 3 0,01 Voltages * * *
VBC Phase Angle
* * *
15 VBC Phase Angle 0x02 0x17 3 0,01 Phase Angles * * *
Phase VCA Magnitude
* * *
16 VCA Magnitude 0x02 0x18 3 0,01 Voltages * * *
VCA Phase Angle
* * *
17 VCA Phase Angle 0x02 0x19 3 0,01 Phase Angles * * *
Phase VAN Magnitude
* * *
18 VAN Magnitude 0x02 0x1A 3 0,01 Voltages * * *
VAN Phase Angle
* * *
19 VAN Phase Angle 0x02 0x1B 3 0,01 Phase Angles * * *
Phase VBN Magnitude
* * *
20 VBN Magnitude 0x02 0x1C 3 0,01 Voltages * * *
VBN Phase Angle
* * *
21 VBN Phase Angle 0x02 0x1D 3 0,01 Phase Angles * * *
Phase VCN Magnitude
* * *
22 VCN Magnitude 0x02 0x1E 3 0,01 Voltages * * *
VCN Phase Angle
* * *
23 VCN Phase Angle 0x02 0x1F 3 0,01 Phase Angles * * *
Phase VN Magnitude
* * *
24 VN Derived Magnitude 0x02 0x22 3 0,01 Voltages * * *
VN Angle
* * *
25 VN Derived Phase Angle 0x02 0x23 3 0,01 Phase Angles * * *
Phase V1 Magnitude
* * *
26 V1 Magnitude 0x02 0x24 3 0,01 Voltages * * *
Phase V2 Magnitude
* * *
27 V2 Magnitude 0x02 0x25 3 0,01 Voltages * * *
Phase V0 Magnitude
* * *
28 V0 Magnitude 0x02 0x26 3 0,01 Voltages * * *
29 Frequency 0x02 0x2A 3 0,01 Frequency * * * * * * Frequency
Phase C/S Voltage Magnitude
30 C/S Voltage Magnitude 0x02 0x2B 3 0,01 Voltages * * * * * *
C/S Voltage Angle
31 C/S Voltage Phase Angle 0x02 0x2C 3 0,01 Phase Angles * * * * * *
Phase C/S Bus-Line Angle
32 IM Magnitude 0x02 0x2F 3 0,005 Currents * * * * * *
Phase C/S Bus-Line Angle
33 IM Magnitude 0x02 0x30 3 0,01 Currents * * * * * *
/* Measurements 2
*/
34 A Phase Watts 0x03 0x01 3 0,01 Power * * * * * * A Phase Watts
35 B Phase Watts 0x03 0x02 3 0,01 Power * * * * * * B Phase Watts
36 C Phase Watts 0x03 0x03 3 0,01 Power * * * * * * C Phase Watts
37 A Phase VArs 0x03 0x04 3 0,01 Power * * * * * * A Phase VArs
38 B Phase VArs 0x03 0x05 3 0,01 Power * * * * * * B Phase VArs
39 C Phase VArs 0x03 0x06 3 0,01 Power * * * * * * C Phase VArs
40 A Phase VA 0x03 0x07 3 0,01 Power * * * * * * A Phase VA
41 B Phase VA 0x03 0x08 3 0,01 Power * * * * * * B Phase VA
42 C Phase VA 0x03 0x09 3 0,01 Power * * * * * * C Phase VA
43 3 Phase Watts 0x03 0x0A 3 0,01 Power * * * * * * 3 Phase Watts
44 3 Phase VArs 0x03 0x0B 3 0,01 Power * * * * * * 3 Phase VArs
45 3 Phase VA 0x03 0x0C 3 0,01 Power * * * * * * 3 Phase VA
3Ph Power Factor
* * *
46 Zero Sequence Power 0x03 0x0D 3 0,01 Power Factor * * *
3Ph Power Factor
* * *
47 3Ph Power Factor 0x03 0x0E 3 0,01 Power Factor * * *
APh Power Factor
* * *
48 APh Power Factor 0x03 0x0F 3 0,01 Power Factor * * *
BPh Power Factor
* * *
49 BPh Power Factor 0x03 0x10 3 0,01 Power Factor * * *
CPh Power Factor
* * *
50 CPh Power Factor 0x03 0x11 3 0,01 Power Factor * * *
51 3Ph W Fix Demand 0x03 0x16 3 0,01 Null * * * * * * 3Ph W Fix Demand
52 3Ph VArs Fix Dem 0x03 0x17 3 0,01 Null * * * * * * 3Ph W Peak Demand
53 3Ph W Peak Demand 0x03 0x20 3 0,01 Null * * * * * * 3Ph VAr Peak Demand
54 3Ph VArs Peak Demand 0x03 0x21 3 0,01 Null * * * * * * 3Ph VAr Peak Demand
/* Measurements 1 Slip Frequency
*/
55 Slip Frequency 0x02 0x31 3 0,01 Frequency * * * * * * Slip Frequency
/* Measurements 3
*/
56 Thermal State 0x04 0x02 3 0,1 Percentage * * * * * * Highest Phase Current
/* Measurements Addendum
*/
57 Fault Location (%) 0x01 0x14 3 10 Percentage * * * * * * Fault Location (%)
Courier Data Base P44x/EN GC/F65

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1. PROGRAMMABLE LOGIC (PSL)


1.1 Overview
The purpose of the programmable scheme logic (PSL) is to allow the relay user to configure
an individual protection scheme to suit their own particular application. This is achieved
through the use of programmable logic gates and delay timers.
The input to the PSL is any combination of the status of opto inputs. It is also used to assign
the mapping of functions to the opto inputs and output contacts, the outputs of the protection
elements, e.g. protection starts and trips, and the outputs of the fixed protection scheme
logic. The fixed scheme logic provides the relay’s standard protection schemes. The PSL
itself consists of software logic gates and timers. The logic gates can be programmed to
perform a range of different logic functions and can accept any number of inputs. The timers
are used either to create a programmable delay, and/or to condition the logic outputs, e.g. to
create a pulse of fixed duration on the output regardless of the length of the pulse on the
input. The outputs of the PSL are the LEDs on the front panel of the relay and the output
contacts at the rear.
The execution of the PSL logic is event driven; the logic is processed whenever any of its
inputs change, for example as a result of a change in one of the digital input signals or a trip
output from a protection element. Also, only the part of the PSL logic that is affected by the
particular input change that has occurred is processed. This reduces the amount of
processing time that is used by the PSL; even with large, complex PSL schemes the relay
trip time will not lengthen.
This system provides flexibility for the user to create their own scheme logic design.
However, it also means that the PSL can be configured into a very complex system, hence
setting of the PSL is implemented through the PC support package MiCOM S1 Studio.

1.2 MiCOM S1 or MiCOM S1 Studio Px40 PSL editor

1.2.1 Micom S1 V2

To access the Px40 PSL Editor Menu, click on.

1.2.2 MiCOM S1 Studio


To access the MiCOM S1 Studio V3 Px40 PSL Editor double click on the PSL file on the
Explorer or click PSL Editor (Px40) from Tools Menu

Click - Px10 PSL editor

Double click - PSL file

P0855ENa
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1.2.3 PSL Editor


The PSL Editor module enables you to connect to any MiCOM device front port, Rear port
with courier protocol and Ethernet port with tunnelled courier protocol, retrieve and edit its
Programmable Scheme Logic files and send the modified file back to a MiCOM Px40 device.

1.3 How to use MiCOM Px40 PSL editor


With the MiCOM Px40 PSL Module you can:

• Start a new PSL diagram

• Extract a PSL file from a MiCOM Px40 IED

• Open a diagram from a PSL file

• Add logic components to a PSL file

• Move components in a PSL file

• Edit link of a PSL file

• Add link to a PSL file

• Highlight path in a PSL file

• Use a conditioner output to control logic

• Download PSL file to a MiCOM Px40 IED

• Print PSL files

• View DDB numbering for the signals


For a detailed discussion on how to use these functions, please refer to PSL Editor online
help or S1 Users manual.
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1.4 Warnings
Before the scheme is sent to the relay checks are done. Various warning messages may be
displayed as a result of these checks.
The Editor first reads in the model number of the connected relay, and then compares it with
the stored model number. A "wildcard" comparison is employed. If a model mismatch occurs
then a warning will be generated before sending commences. Both the stored model number
and that read-in from the relay are displayed along with the warning; the onus is on you to
decide if the settings to be sent are compatible with the connected relay. Wrongly ignoring
the warning could lead to undesired behaviour in the relay.
If there are any potential problems of an obvious nature then a list will be generated. The
types of potential problems that the program attempts to detect are:

• One or more gates, LED signals, contact signals, and/or timers have their outputs
linked directly back to their inputs. An erroneous link of this sort could lock up the
relay, or cause other more subtle problems to arise.

• Inputs to Trigger (ITT) exceed the number of inputs. A programmable gate has its ITT
value set to greater than the number of actual inputs; the gate can never activate.
Note that there is no lower ITT value check. A 0-value does not generate a warning.

• Too many gates. There is a theoretical upper limit of 256 gates in a scheme, but the
practical limit is determined by the complexity of the logic. In practice the scheme
would have to be very complex, and this error is unlikely to occur.

• Too many links. There is no fixed upper limit to the number of links in a scheme.
However, as with the maximum number of gates, the practical limit is determined by
the complexity of the logic. In practice the scheme would have to be very complex,
and this error is unlikely to occur.
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1.5 Toolbar and commands


There are a number of toolbars available for easy navigation and editing of PSL.

1.5.1 Standard tools

• For file management and printing.

Blank Scheme Create a blank scheme based on a relay model.


:

Default Configuration Create a default scheme based on a relay model.


:

Open Open an existing diagram.


:

Save Save the active diagram.


:

Print Display the Windows Print dialog, enabling you to print the
: current diagram.

Undo Undo the last action.


:

Redo Redo the previously undone action.


:

Redraw Redraw the diagram.


:

Number of DDBs Display the DDB numbers of the links.


:
Calculate unique number based on both the function and
Calculate CRC : layout of the logic.
Compare current file with another stored on disk.
Compare Files :

Select Enable the select function. While this button is active, the
: mouse pointer is displayed as an arrow. This is the default
mouse pointer. It is sometimes referred to as the selection
pointer.
Point to a component and click the left mouse button to select
it. Several components may be selected by clicking the left
mouse button on the diagram and dragging the pointer to
create a rectangular selection area.

1.5.2 Alignment tools

• To snap logic elements into horizontally or vertically aligned groupings.

Align Top Align all selected components so the top of each is level with
: the others.

Align Middle Align all selected components so the middle of each is level
: with the others.

Align Bottom Align all selected components so the bottom of each is level
: with the others.
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Align Left Align all selected components so the leftmost point of each is
: level with the others.

Align Centre Align all selected components so the centre of each is level
: with the others.

Align Right Align all selected components so the rightmost point of each
: is level with the others.

1.5.3 Drawing Tools

• To add text comments and other annotations, for easier reading of PSL schemes.

Rectangle When selected, move the mouse pointer to where you want
: one of the corners to be hold down the left mouse button and
move it to where you want the diagonally opposite corner to
be. Release the button. To draw a square hold down the
SHIFT key to ensure height and width remain the same.

Ellipse When selected, move the mouse pointer to where you want
: one of the corners to be hold down the left mouse button and
move until the ellipse is the size you want it to be. Release
the button. To draw a circle hold down the SHIFT key to
ensure height and width remain the same.

Line When selected, move the mouse pointer to where you want
: the line to start, hold down left mouse, move to the position of
the end of the line and release button. To draw horizontal or
vertical lines only hold down the SHIFT key.

Polyline When selected, move the mouse pointer to where you want
: the polyline to start and click the left mouse button. Now
move to the next point on the line and click the left button.
Double click to indicate the final point in the polyline.

Curve When selected, move the mouse pointer to where you want
: the polycurve to start and click the left mouse button. Each
time you click the button after this a line will be drawn, each
line bisects its associated curve. Double click to end. The
straight lines will disappear leaving the polycurve. Note:
whilst drawing the lines associated with the polycurve, a
curve will not be displayed until either three lines in
succession have been drawn or the polycurve line is
complete.

Text When selected, move the mouse pointer to where you want
: the text to begin and click the left mouse button. To change
the font, size or colour, or text attributes select Properties
from the right mouse button menu.

Image When selected, the Open dialog is displayed, enabling you to


: select a bitmap or icon file. Click Open, position the mouse
pointer where you want the image to be and click the left
mouse button.
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1.5.4 Nudge tools

• To move logic elements.

The nudge tool buttons enable you to shift a selected component a single unit in the selected
direction, or five pixels if the SHIFT key is held down.
As well as using the tool buttons, single unit nudge actions on the selected components can
be achieved using the arrow keys on the keyboard.

Nudge Up Shift the selected component(s) upwards by one unit. Holding


: down the SHIFT key while clicking on this button will shift the
component five units upwards.

Nudge Down Shift the selected component(s) downwards by one unit.


: Holding down the SHIFT key while clicking on this button will
shift the component five units downwards.

Nudge Left Shift the selected component(s) to the left by one unit.
: Holding down the SHIFT key while clicking on this button will
shift the component five units to the left.

Nudge Right Shift the selected component(s) to the right by one unit.
: Holding down the SHIFT key while clicking on this button will
shift the component five units to the right.

1.5.5 Rotation tools

• Tools to spin, mirror and flip.

Free Rotate Enable the rotation function. While rotation is active


: components may be rotated as required. Press the ESC key
or click on the diagram to disable the function.

Rotate Left Rotate the selected component 90 degrees to the left.


:

Rotate Right Rotate the selected component 90 degrees to the right.


:

Flip Horizontal Flip the component horizontally.


:

Flip Vertical Flip the component vertically.


:
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1.5.6 Structure tools

• To change the stacking order of logic components.

The structure toolbar enables you to change the stacking order of components.

Bring to Front Bring the selected components in front of all other


: components.

Send to Back Bring the selected components behind all other components.
:

Bring Forward Bring the selected component forward one layer.


:

Send Backward Send the selected component backwards one layer.


:

1.5.7 Zoom and pan tools

• For scaling the displayed screen size, viewing the entire PSL, or zooming to a
selection.

Zoom In Increases the Zoom magnification by 25%.


:

Zoom Out Decreases the Zoom magnification by 25%.


:

Zoom Enable the zoom function. While this button is active, the
: mouse pointer is displayed as a magnifying glass. Right-
clicking will zoom out and left-clicking will zoom in. Press
the ESC key to return to the selection pointer. Click and
drag to zoom in to an area.

Zoom to Fit Display at the highest magnification that will show all the
: diagram’s components.

Zoom to Selection Display at the highest magnification that will show the
: selected component(s).

Pan Enable the pan function. While this button is active, the
: mouse pointer is displayed as a hand. Hold down the left
mouse button and drag the pointer across the diagram to
pan. Press the ESC key to return to the selection pointer.

1.5.8 Logic symbols

This toolbar provides icons to place each type of logic element into the scheme diagram. Not
all elements are available in all devices. Icons will only be displayed for those elements
available in the selected device.

Link reate a Link between two logic symbols.


:C

Opto Signal Create an Opto Signal:


:

Input Signal Create an Input Signal.


:
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Output Signal Create an Output Signal.


:
Create an input signal to logic to receive a GOOSE
GOOSE in : message transmitted from another IED. Used in either
UCA2.0 or IEC 61850 GOOSE applications only.
Create an output signal from logic to transmit a GOOSE
GOOSE out : message to another IED. Used in either UCA2.0 or IEC
61850 GOOSE applications only.
Create an input signal to logic that receives an
Integral Tripping in : InterMiCOM message transmitted from another IED.
Create an output signal from logic that transmits an
Integral Tripping out : InterMiCOM message to another IED.
Create an input signal to logic that can be operated from
Control in : an external command.
Create a Function Key input signal.
Function Key :
Create a Fault Record Trigger.
Trigger Signal :

LED Signal or Create an LED Signal. Icon shown is dependent upon


: capability of LED’s i.e. mono-colour or tri-colour.

Contact Signal Create a Contact Signal.


:
Create an LED Conditioner. Icon shown is dependent
LED Conditioner or : upon capability of LED’s i.e. mono-colour or tri-colour.

Contact Conditioner Create a Contact Conditioner.


:

Timer Create a Timer.


:
Create an AND Gate.
AND Gate :

OR Gate Create an OR Gate.


:

Programmable Gate Create a Programmable Gate.


:

1.6 PSL logic signals properties


The logic signal toolbar is used for the selection of logic signals.
Performing a right-mouse click on any logic signal will open a context sensitive menu and
one of the options for certain logic elements is the Properties… command. Selecting the
Properties option will open a Component Properties window, the format of which will vary
according to the logic signal selected.
Properties of each logic signal, including the Component Properties windows, are shown in
the following sub-sections:
Signal properties menu
The Signals List tab is used for the selection of logic signals.
The signals listed will be appropriate to the type of logic symbol being added to the diagram.
They will be of one of the following types:
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1.6.1 Link properties


Links form the logical link between the output of a signal, gate or condition and the input to
any element.
Any link that is connected to the input of a gate can be inverted via its properties window. An
inverted link is indicated with a “bubble” on the input to the gate. It is not possible to invert a
link that is not connected to the input of a gate.

Rules for Linking Symbols

Links can only be started from the output of a signal, gate, or conditioner, and can only be
ended on an input to any element.
Since signals can only be either an input or an output then the concept is somewhat
different. In order to follow the convention adopted for gates and conditioners, input signals
are connected from the left and output signals to the right. The Editor will automatically
enforce this convention.
A link attempt will be refused where one or more rules would otherwise be broken. A link will
be refused for the following reasons:

• An attempt to connect to a signal that is already driven. The cause of the refusal may
not be obvious, since the signal symbol may appear elsewhere in the diagram. Use
“Highlight a Path” to find the other signal.

• An attempt is made to repeat a link between two symbols. The cause of the refusal
may not be obvious, since the existing link may be represented elsewhere in the
diagram.

1.6.2 Opto signal properties


Opto Signal
Each opto input can be selected and used for programming in PSL. Activation of the opto
input will drive an associated DDB signal.
For example activating opto input L1 will assert DDB 032 in the PSL.

1.6.3 Input signal properties


Input Signal
Relay logic functions provide logic output signals that can be used for programming in PSL.
Depending on the relay functionality, operation of an active relay function will drive an
associated DDB signal in PSL.
For example DDB 1142 will be asserted in the PSL should the active terminal1 earth fault ,
stage 1 protection operate/trip.
T1 IN>1 Trip
DDB #1142
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1.6.4 Output signal properties


Output Signal
Relay logic functions provide logic input signals that can be used for programming in PSL.
Depending on the relay functionality, activation of the output signal will drive an associated
DDB signal in PSL and cause an associated response to the relay function
For example, if DDB 651 is asserted in the PSL, it will block the terminal1 earth function
stage 1 timer.
T1 IN>1 TimeBlk
DDB #651

1.6.5 GOOSE input signal properties


GOOSE In
The Programmable Scheme Logic interfaces with the GOOSE Scheme Logic (see PSL
Editor online help or S1 Users manual for more details) by means of 32 Virtual inputs. The
Virtual Inputs can be used in much the same way as the Opto Input signals.
The logic that drives each of the Virtual Inputs is contained within the relay’s GOOSE
Scheme Logic file. It is possible to map any number of bit-pairs, from any subscribed device,
using logic gates onto a Virtual Input (see S1 Users manual for more details).
For example DDB 832 will be asserted in PSL should virtual input 1 operate.

1.6.6 GOOSE output signal properties


GOOSE Out
The Programmable Scheme Logic interfaces with the GOOSE Scheme Logic by means of
32 Virtual outputs.
It is possible to map virtual outputs to bit-pairs for transmitting to any published devices (see
PSL Editor online help or S1 Users manual for more details).
For example if DDB 865 is asserted in PSL, Virtual Output 32 and its associated mappings
will operate.

1.6.7 Control in signal properties


Control In
There are 32 control inputs which can be activated via the relay menu, ‘hotkeys’ or via rear
communications. Depending on the programmed setting i.e. latched or pulsed, an associated
DDB signal will be activated in PSL when a control input is operated.
For example operate control input 1 to assert DDB 800 in the PSL.
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1.6.8 Function key properties


Function Key
Each function key can be selected and used for programming in PSL. Activation of the
function key will drive an associated DDB signal and the DDB signal will remain active
depending on the programmed setting i.e. toggled or normal. Toggled mode means the DDB
signal will remain latched or unlatched on key press and normal means the DDB will only be
active for the duration of the key press.
For example operate function key 1 to assert DDB 712 in the PSL.

1.6.9 Fault recorder trigger properties


Fault Record Trigger
The fault recording facility can be activated, by driving the fault recorder trigger DDB signal.
For example assert DDB 144 to activate the fault recording in the PSL.

1.6.10 LED signal properties


LED
All programmable LEDs will drive associated DDB signal when the LED is activated.
For example DDB 652 will be asserted when LED 7 is activated.

1.6.11 Contact signal properties


Contact Signal
All relay output contacts will drive associated DDB signal when the output contact is
activated.
For example DDB 009 will be asserted when output R10 is activated.

1.6.12 LED conditioner properties


LED Conditioner
1. Select the LED name from the list (only shown when inserting a new symbol).
2. Configure the LED output to be Red, Yellow or Green.
Configure a Green LED by driving the Green DDB input.
Configure a RED LED by driving the RED DDB input.
Configure a Yellow LED by driving the RED and GREEN DDB inputs simultaneously.
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3. Configure the LED output to be latching or non-latching.

1.6.13 Contact conditioner properties


Each contact can be conditioned with an associated timer that can be selected for pick up,
drop off, dwell, pulse, pick-up/drop-off, straight-through, or latching operation.
“Straight-through” means it is not conditioned in any way whereas “latching” is used to create
a sealed-in or lockout type function.

1. Select the contact name from the Contact Name list (only shown when inserting a new
symbol).
2. Choose the conditioner type required in the Mode tick list.
3. Set the Pick-up Time (in milliseconds), if required.
4. Set the Drop-off Time (in milliseconds), if required.
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1.6.14 Timer properties


Each timer can be selected for pick up, drop off, dwell, pulse or pick-up/drop-off operation.

1. Choose the operation mode from the Timer Mode tick list.
2. Set the Pick-up Time (in milliseconds), if required.
3. Set the Drop-off Time (in milliseconds), if required.

1.6.15 Gate properties


A Gate may be an AND, OR, programmable gate or SR Latch .
An AND gate requires that all inputs are TRUE for the output to be TRUE.

An OR gate requires that one or more input is TRUE for the output to be TRUE.

A Programmable gate requires that the number of inputs that are TRUE is equal to or
greater than its ‘Inputs to Trigger’ setting for the output to be TRUE.

Three variants of the SR latch gate are available. They are:

• Standard – no input dominant

• Set Input Dominant

• Reset Input Dominant


The output of the gate, Q is latched, i.e. its state is non-volatile upon power cycle.
The inversions of the input and output signals are supported.
The state of Q is reset when a new PSL is downloaded to the relay or when the active
setting group is changed. The maximum number of SR Latch gates is 64.
The evaluation of the Q state is carried out after all the DDB changes have completed, i.e. at
the end of the protection cycle and synchronised with protection task. Hence there is an
inherent delay of a protection cycle in processing every one of the SR gates and the delay
increases if the SR gates are connected one after another.
The user has to be aware that if there is a timer before the SR gate, then an additional delay
of a protection cycle will be incurred before the Q state is changed.
The logic operations of the three variants of the gate are depicted in the diagram below:
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Standard
S R Q
S 1 0 1
Q 0 1 0
R 0 0 no change / last state
1 1 no change / last state

Set Input Dominant

S R Q
1 0 1
SD
Q 0 1 0
R 0 0 no change / last state
1 1 1

Reset Input Dominant


S R Q
S 1 0 1
Q 0 1 0
RD 0 0 no change / last state
1 1 0
P0737ENa

1. Select the Gate type AND, OR, or Programmable.


2. Set the number of inputs to trigger when Programmable is selected.
3. Select if the output of the gate should be inverted using the Invert Output check box. An
inverted output is indicated with a "bubble" on the gate output.
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2. MiCOM PX40 GOOSE EDITOR

To access to Px40 GOOSE Editor menu click on


The implementation of UCA2.0 Generic Object Orientated Substation Events (GOOSE) sets
the way for cheaper and faster inter-relay communications. UCA2.0 GOOSE is based upon
the principle of reporting the state of a selection of binary (i.e. ON or OFF) signals to other
devices. In the case of Px40 relays, these binary signals are derived from the Programmable
Scheme Logic Digital Data Bus signals. UCA2.0 GOOSE messages are event-driven. When
a monitored point changes state, e.g. from logic 0 to logic 1, a new message is sent.
GOOSE Editor enables you to connect to any UCA 2.0 MiCOM Px40 device via the Courier
front port, retrieve and edit its GOOSE settings and send the modified file back to a MiCOM
Px40 device.

Menu and Toolbar


The menu functions
The main functions available within the Px40 GOOSE Editor menu are:

• File

• Edit

• View

• Device
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File menu

Open…
Displays the Open file dialogue box, enabling you to locate and open an existing GOOSE
configuration file.
Save
Save the current file.
Save As…
Save the current file with a new name or in a new location.
Print…
Print the current GOOSE configuration file.
Print Preview
Preview the hardcopy output with the current print setup.
Print Setup…
Display the Windows Print Setup dialogue box allowing modification of the printer settings.
Exit
Quit the application.
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Edit menu

Rename…
Rename the selected IED.
New Enrolled IED…
Add a new IED to the GOOSE configuration.
New Virtual Input…
Add a new Virtual Input to the GOOSE In mapping configuration.
New Mapping…
Add a new bit-pair to the Virtual Input logic.
Delete Enrolled IED
Remove an existing IED from the GOOSE configuration.
Delete Virtual Input
Delete the selected Virtual Input from the GOOSE In mapping configuration.
Delete Mapping
Remove a mapped bit-pair from the Virtual Input logic.
Reset Bitpair
Remove current configuration from selected bit-pair.
Delete All
Delete all mappings, enrolled IED’s and Virtual Inputs from the current GOOSE configuration
file.
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View menu

Toolbar
Show/hide the toolbar.
Status Bar
Show/hide the status bar.
Properties…
Show associated properties for the selected item.
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Device menu

Open Connection
Display the Establish Connection dialog, enabling you to send and receive data from the
connected relay.
Close Connection
Closes active connection to a relay.
Send to Relay
Send the open GOOSE configuration file to the connected relay.
Receive from Relay
Extract the current GOOSE configuration from the connected relay.
Communications Setup
Displays the Local Communication Settings dialogue box, enabling you to select or configure
the communication settings.
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The toolbar

Open
Opens an existing GOOSE configuration file.

Save
Save the active document.

Print
Display the Print Options dialog, enabling you to print the current configuration.

View Properties
Show associated properties for the selected item.
How to Use the GOOSE Editor
The main functions available within the GOOSE Editor module are:

• Retrieve GOOSE configuration settings from an IED

• Configure GOOSE settings

• Send GOOSE configuration settings to an IED

• Save IED GOOSE setting files

• Print IED GOOSE setting files


Retrieve GOOSE configuration settings from an IED
1. Open a connection to the required device by selecting Open Connection from the
Device menu. Refer to Section 2.1.1.6 & 2.1.1.7 for details on configuring the IED
communication settings.
2. Enter the device address in the Establish Connection dialogue box.
3. Enter the relay password.
4. Extract the current GOOSE configuration settings from the device by selecting Receive
from Relay from the Device menu.
2.1 Configure GOOSE settings
The GOOSE Scheme Logic editor is used to enrol devices and also to provide support for
mapping the Digital Data Bus signals (from the Programmable Scheme Logic) onto the
UCA2.0 GOOSE bit-pairs.
If the relay is interested in data from other UCA2.0 GOOSE devices, their "Sending IED"
names are added as ’enrolled’ devices within the GOOSE Scheme Logic. The GOOSE
Scheme Logic editor then allows the mapping of incoming UCA2.0 GOOSE message bit-
pairs onto Digital Data Bus signals for use within the Programmable Scheme Logic.
UCA2.0 GOOSE is normally disabled in the MiCOM Px40 products and is enabled by
downloading a GOOSE Scheme Logic file that is customised.
2.2 Device naming
Each UCA2.0 GOOSE enabled device on the network transmits messages using a unique
"Sending IED" name.
Select Rename from the Edit menu to assign the "Sending IED" name to the device.
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2.3 Enrolling IED’s


Enrolling a UCA2.0 GOOSE device is done through the Px40s GOOSE Scheme Logic. If a
relay is interested in receiving data from a device, the "Sending IED" name is simply added
to the relays list of ’interested devices’.
Select New Enrolled IED from the Edit menu and enter the GOOSE IED name (or "Sending
IED" name) of the new device.
Enrolled IED’s have GOOSE In settings containing DNA (Dynamic Network Announcement)
and User Status bit-pairs. These input signals can be configured to be passed directly
through to the Virtual Input gates or be set to a forced or default state before processing by
the Virtual Input logic.

The signals in the GOOSE In settings of enrolled IED’s are mapped to Virtual Inputs by
selecting New Mapping from the Edit menu. Refer to section below for use of these signals
in logic.
2.4 GOOSE In settings
Virtual inputs
The GOOSE Scheme Logic interfaces with the Programmable Scheme Logic by means of
32 Virtual Inputs. The Virtual Inputs are then used in much the same way as the Opto Input
signals.
The logic that drives each of the Virtual Inputs is contained within the relay’s GOOSE
Scheme Logic file. It is possible to map any number of bit-pairs, from any enrolled device,
using logic gates onto a Virtual Input.
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The following gate types are supported within the GOOSE Scheme Logic:

Gate Type Operation


The GOOSE Virtual Input will only be logic 1 (i.e. ON) when all bit-
AND
pairs match the desired state.
The GOOSE Virtual Input will be logic 1 (i.e. ON) when any bit-pair
OR
matches its desired state.
The GOOSE Virtual Input will only be logic 1 (i.e. ON) when the
PROGRAMMABLE
majority of the bit-pairs match their desired state.

To add a Virtual Input to the GOOSE logic configuration, select New Virtual Input from the
Edit menu and configure the input number. If required, the gate type can be changed once
input mapping to the Virtual Input has been made.
Mapping
GOOSE In signals from enrolled IED’s are mapped to logic gates by selection of the required
bit-pair from either the DNA or User Status section of the inputs.

The value required for a logic 1 or ON state is specified in the State box. The input can be
inverted by checking Input Inversion (equivalent to a NOT input to the logic gate).
GOOSE Out settings
The structure of information transmitted via UCA2.0 GOOSE is defined by the ’Protection
Action’ (PACT) common class template, defined by GOMFSE (Generic Object Models for
Substation and Feeder Equipment).
A UCA2.0 GOOSE message transmitted by a Px40 relay can carry up to 96 Digital Data Bus
signals, where the monitored signals are characterised by a two-bit status value, or "bit-pair".
The value transmitted in the bit-pair is customisable although GOMFSE recommends the
following assignments:

Bit-Pair Value Represents


00 A transitional or unknown state
01 A logical 0 or OFF state
10 A logical 1 or ON state
11 An invalid state

The PACT common class splits the contents of a UCA2.0 GOOSE message into two main
parts; 32 DNA bit-pairs and 64 User Status bit-pairs.
The DNA bit-pairs are intended to carry GOMSFE defined protection scheme information,
where supported by the device. MiCOM Px40 implementation provides full end-user
flexibility, as it is possible to assign any Digital Data Bus signal to any of the 32 DNA bit-
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 23/28

pairs. The User Status bit pairs are intended to carry all ‘user-defined’ state and control
information. As with the DNA, it is possible to assign any Digital Data Bus signal to these bit-
pairs.

To ensure full compatibility with third party UCA2.0 GOOSE enabled products, it is
recommended that the DNA bit-pair assignments are as per the definition given in GOMFSE.
Send GOOSE configuration settings to an IED
1. Open a connection to the required device by selecting Open Connection from the
Device menu. Refer to Section 2.1.1.6 & 2.1.1.7 for details on configuring the IED
communication settings.
2. Enter the device address in the Establish Connection dialogue box.
3. Enter the relay password.
4. Send the current GOOSE configuration settings to the device by selecting Send to
Relay from the Device menu.
Save IED GOOSE setting files
Select Save or Save As from the File menu.
Print IED GOOSE setting files
1. Select Print from the File menu.
2. The Print Options dialogue is displayed allowing formatting of the printed file to be
configured.
3. Click OK after making required selections.
P44x/EN GC/F65 Courier Data Base

Page 24/28 MiCOM P441, P442 & P444

3. DEFAULT PROGRAMMABLE SCHEME LOGIC (PSL)

Example - MICOM P444 46 outputs - Programmable Logic

Input-Opto Couplers

DIST. Chan Recv


DDB #128

Opto Label 01 DEF. Chan Recv


DDB #064 DDB #129

DIST. COS
DDB #130

Opto Label 02 DEF. COS


DDB #065 DDB #131

Opto Label 03 MCB/VTS Main


DDB #066 DDB #134

Opto Label 04 BAR


DDB #067 DDB #117

Opto Label 05 CB Healthy


DDB #068 DDB #119

Opto Label 06 Man. Close CB


DDB #069 DDB #122

Opto Label 07 Reset Lockout


DDB #070 DDB #148

TPAR Enable
DDB #111

Opto Label 08
DDB #071
&
SPAR Enable
DDB #110
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 25/28

Output Contact

Trip Z1

Z1 0
DDB #255 Relay Label 01
& Straight
0
DDB #000

DIST Trip A
DDB #246

DIST Trip B
DDB #247 1
DIST Trip C
Dist Aided Trip
DDB #248

0
Relay Label 10
& Straight
0
DDB #009
DIST UNB CR
DDB #243

Z1
DDB #255

Z1X
DDB #256

Z2
DDB #257

Zp
DDB #260 1
Z3
DDB #258

Z4
DDB #259 Led

Z1
DDB #255 LED 5
1 Latching DDB #100
Z1X
DDB #256

Trip A
0
Any Trip A Relay Label 02
DDB #325 Straight DDB #001
0

Trip B
0
Any Trip B Relay Label 03
DDB #326 Straight DDB #002
0

Trip C
0
Any Trip C Relay Label 04
DDB #327 Straight DDB #003
0

Signal Send (Dist + DEF)


DIST Sig. Send
DDB #242 0
Relay Label 05
1 Straight
0
DDB #004
DEF Sig. Send
DDB #271
P44x/EN GC/F65 Courier Data Base

Page 26/28 MiCOM P441, P442 & P444

Output Contact

General Start
0
Relay Label 06
Straight DDB #005
0
Any Start
DDB #317

Led General Start

LED 4
20 Latching DDB #099

Dwell
0
Starting Fault Recorder
Fault_REC_TRIG
Any Trip
DDB #321
1 DDB #468

General trip
0
Any Trip Relay Label 07
DDB #321 Straight DDB #006
0

General Alarm
0
General Alarm Relay Label 08
DDB #174 Straight DDB #007
0

IN>2 Trip
DDB #282

IN>3 Trip
DDB #355 Trip DEF + SBEF
0
DEF Trip A Relay Label 09
DDB #278 1 Straight
0
DDB #008

DEF Trip B
DDB #279

DEF Trip C
DDB #280

AR Lockout
0
A/R Lockout Relay Label 11
DDB #234 Straight DDB #010
0

AR in Progress
A/R 1P In Prog
DDB #224
0
Relay Label 12

A/R 3P In Prog
1 Straight
0
DDB #011

DDB #225

AR Close
0
A/R Close Relay Label 13
DDB #223 Straight DDB #012
0

Power Swing
0
Power Swing Relay Label 14
DDB #269 Straight DDB #013
0
Courier Data Base P44x/EN GC/F65

MiCOM P441, P442 & P444 Page 27/28

Leds Front Panel

Trip A

Any Trip A LED 1


DDB #325 Latching DDB #096

Trip B

Any Trip B LED 2


DDB #326 Latching DDB #097

Trip C

Any Trip C LED 3


DDB #327 Latching DDB #098

Forward

DIST Fwd LED 6


DDB #244 Latching DDB #101

Reverse

DIST Rev LED 7


DDB #245 Latching DDB #102

A/R Enable

A/R Enable Non - LED 8


DDB #231 DDB #103
Latching
P44x/EN GC/F65 Courier Data Base

Page 28/28 MiCOM P441, P442 & P444

BLANK PAGE
Menu Content Tables P44x/EN HI/F65

MiCOM P441/P442 & P444)

MENU CONTENT TABLES


Menu Content Tables P44x/EN HI/F65

MiCOM P441/P442 & P444) Page 1/10

Description Plant Reference 0.000 V 0.000 W 16:26:14


MiCOM  AREVA  0.000 A 50.00Hz  0.000 Var  18 Mar 2004



 System Data View Records Measurements 1 Measurements 2 Measurements 3 CB Condition  CB Control  Date and Time 
    

 Configuration  CT and VT ratios  Record control  Disturb Recorder  Measure't setup  Communications  Commission tests  CB monitor setup 

 Opto config  Control Input  CTRL I/P config  Intermicom comms  Intermicom conf  Function keys  Ethernet NCIT  IED Configurator 

Distance Distance schemes Power swing Back-up I> NEG sequence O/C Broken conductor Earth fault O/C
 CTRL I/P label      group 1  group 1  group 1

group 1 group 1 group 1 group 1

Residual
Aided D.E.F Thermal overload Zero seq. Power Volt protection CB Fail & I< System check Autoreclose
   overvoltage      
group 1 group 1 group 1 group 1 Group 1 group 1 group 1
group 1

Input labels Output labels


   PSL DATA 
group 1 group 1

Notes:
This Menu Content table is given for complete menu enabled (i.e. if the corresponding option in the configuration menu is enabled). Some options or menu could not
appear according to the installation.
Group 1 is shown on the menu map, Groups 2, 3 and 4 are identical to Group 1 and therefore omitted.
P44x/EN HI/F65 Menu Content Tables

Page 2/10 MiCOM P441/P442 & P444

SYSTEM DATA VIEW RECORDS MEASUREMENTS 1 MEASUREMENTS 2

Language Select Event IA Magnitude VAN Magnitude A Phase Watts


English [0…256] 0 0A 0V 0 W

Password Menu Cell Ref IA Phase Angle VAN Phase Angle B Phase Watts
o o
XXXX (From Record) 0 0 0 W

Description Time & Date IB Magnitude VBN Magnitude C Phase Watts


MiCOM (From Record) 0A 0V 0 W

Plant Reference Event Text IB Phase Angle VBN Phase Angle A Phase VArs
o
AREVA 0 0o 0 Var

Model Number Event Value IC Magnitude VCN Magnitude B Phase VArs


P442311B1M0300J 0A 0V 0 Var

Serial Number Select Fault IC Phase Angle VCN Phase Angle C Phase VArs
o o
123456A [0…4] 0 0 0 0 Var

Frequency Active Group IN Derived Mag VN Derived Mag A Phase VA


50 0 0A 0V 0 VA

Comms Level Select Maintenance IN Derived Angle VN Derived Ang B Phase VA


o o
2 [0…0] 0 0 0 0 VA

Relay Address Alarm Status 1 Reset Indication I1 Magnitude V1 Magnitude C Phase VA


255 0000000000000000 No 0A 0V 0 VA

Plant Status Relay Status 1 I2 Magnitude V2 Magnitude 3 Phase Watts


0000000000000000 0000000000000000 0A 0V 0 W

Control Status Alarm Status 1 I0 Magnitude V0 Magnitude 3 Phase VArs


0000000000000000 0000000000000000 0A 0V 0 Var

Active Group Alarm Status 2 VAB Magnitude Frequency 3 Phase VA


1 0000000000000000 0V 0 0 VA

CB Trip/Close Alarm Status 3 VAB Phase Angle C/S Voltage Mag Zero Seq Power
o
No Operation 0000000000000000 0 0V 0

Software Ref. 1 Access Level VBC Magnitude C/S Voltage Ang 3Ph Power Factor
o
C2.6 2 0V 0 0

Software Ref.2 Password Control VBC Phase Angle IM Magnitude APh Power Factor
o
C2.6 2 0 0A 0

Opto I/P Status Password Level 1 VCA Magnitude IM Angle BPh Power Factor
o
0001100100001000 **** 0V 0 0

Relay Status 1 Password Level 2 VCA Phase Angle Slip Frequency CPh Power Factor
o
0000000000000000 **** 0 50 Hz 0 Wh
Menu Content Tables P44x/EN HI/F65

MiCOM P441/P442 & P444) Page 3/8

MEASUREMENTS 3 CB CONDITION CB CONTROL DATE and TIME CONFIGURATION

Thermal Status CB A Operations CB Control by Date Restore Defaults Aided D.E.F


0.00 % 0 Opto + Rem + Local 01 June 2005 No Operation Enabled

Reset Thermal CB B Operations Close Pulse Time Time Setting Group Volt Protection
No 0 0.5 ms 16:25:53 Select via Menu Disabled

CB C Operations Trip Pulse Time IRIG-B Sync Active Settings CB Fail & I<
0 0.5 ms Disabled Group 1 Enabled

Total IA Broken Man Close Delay IRIG-B Status Save Changes Supervision
0A 10 s 0 No Operation Enabled

Total IB Broken Healthy Window Battery Status Copy From System Checks
0A 5s Healthy Group 1 Disabled

Total IC Broken C/S Window Battery Alarm Copy to Thermal Overload


0A 5s Enabled No Operation Disabled

CB Operate Time A/R Single Pole SNTP Status Setting Group 1 Residual O/V NVD
0s Disabled Enabled Disabled

Reset CB Data A/R Three Pole LocalTime Enable Setting Group 2 Internal A/R
No Disabled Fixed Disabled Disabled

Total 1P Reclose LocalTime Offset Setting Group 3 Input Labels


0 0 Disabled Visible

Total 3P Reclose DST Enable Setting Group 4 Output Labels


0 Enabled Disabled Visible

Reset Total A/R DST Offset Dist. Protection CT & VT Ratios


No 60.00 min Enabled Visible

DST End Month DST Start Power-Swing Record Control


October Last Enabled Invisible

3 Ph W Fix Dem DST End Mins DST Start Day Back-Up I> Disturb Recorder
0 Wh 60.00 min Sunday Disabled Invisible

3Ph Vars Fix Dem RP1 Time Zone DST Start Month Neg Sequence O/C Measure't Setup
0 Varh Local March Disabled Invisible

3Ph W Peak Dem RP2 Time Zone DST Start Mins Broken Conductor Comms Settings
0 Wh Local 60.00 min Disabled Visible

3Ph VArs Peak Dem DNPOE Time Zone DST End Earth Fault Prot Commission Tests
0 Varh Local Last Zero Seq. Power Invisible
Earth Fault O/C
Reset Demand Tunnel Time Zone DST End Day Disabled Setting Values
No Local Sunday Secondary
P44x/EN HI/F65 Menu Content Tables

Page 4/10 MiCOM P441/P442 & P444

CT AND VT RATIOS RECORD CONTROL DISTURB RECORDER MEASURE'T SETUP COMMUNICATIONS

Main VT Primary Clear Events Duration Default Display RP1 Protocol


110.0 V No 1.500 s Description Courier

Main VT Sec'y Clear Faults Trigger Position Local Values RP1 Address
110.0 V No 33.30 % Secondary 255

C/S VT Primary Clear Maint Trigger Mode Remote Values RP1 Address
110.0 V No Single Primary 1

C/S VT Secondary Alarm Event Analog Channel 1 Measurement Ref RP1 Address
110.0 V Enabled VA VA 1

Phase CT Primary Relay O/P Event Analog Channel 2 Measurement Mode RP1 Address
1A Enabled VB 0 1

Phase CT Sec'y Opto Input Event Analog Channel 3 Demand Interval RP1 Inactiv Timer
1A Enabled VC 30.00 mins 15.00 mins

Mcomp CT Primary System event Analog Channel 4 Distance Unit Baud Rate
1A Enabled VN Kilometres 19200 bits/s

Mcomp CT Sec'y Fault Rec Event Analog Channel 5 Fault Location Baud Rate
1A Enabled IA Distance 19200 bits/s

C/S Input Maint Rec Event Analog Channel 6 Baud Rate


A-N Enabled IB 19200 bits/s

Control inputs Main VT Location Protection Event Analog Channel 7 Parity


Visible Line Enabled IC None

Ctrl I/P Config CT Polarity Clear Dist -Recs Analog Channel 8 Parity
Visible Line Decs No IN None

Ctrl I/P Labels DDB element 31 - 0 Digital Input 1 Measure't Period


Visible 1111111111111111 Relay Label 01 10

Direct Access DDB element 63 - 32 Input 1 Trigger Physical Link


Enabled 1111111111111111 No Trigger RS485

InterMicom Time Sync


Disabled Disabled

Ethernet NCIT DDB element1022-332 Digital Input 32 CS103 Blocking


Visible 1111111111111111 Not used Disabled

Function key Input 32 Trigger RP1 Status


Visible No trigger

LCD Contrast
11
Menu Content Tables P44x/EN HI/F65

MiCOM P441/P442 & P444) Page 5/8

COMMISSION CB MONITOR
OPTO CONFIG CONTROL INPUT CTRL I/P CONFIG
TESTS SETUP

Opto I/P Status Broken I^ Global Nominal V Ctrl I/P Status Hotkey Enabled
0001011001000011 2 24-27V 0000000000000000 111--111--111

Relay Status 1 I^ Maintenance Opto Filter Cntl Ctrl Input 1 Control Input 1
0001011001000011 Alarm Disabled 11111111111 No Operation Latched

Test Port Status I^ Maintenance Opto Input 1 Ctrl Command 1


00010110 1.000 KA 24-27V Set/Reset

LED Status I^ Lockout Ctrl Input 32


00010110 Alarm Disabled No Operation

Monitor Bit 1 I^ Lockout Opto Input 32 Ctrl Command 32


Relay Label 01 2.000 KA 24-27V Set/Reset

N° CB Ops Maint
Alarm Disabled
Monitor Bit 8
RP1 Port Config Relay Label 08 N° CB Ops Maint
K Bus 10
Test Mode
RP1 Comms Mode Disabled N° CB Ops Lock
IEC60870 FT1.2 Alarm Disabled
Test Pattern 1
RP1 Baud Rate 0 N° CB Ops Lock
19200 bits/s 20
Test Pattern 2
Scale Value 0 CB Time Maint
IEC61850 Alarm Disabled
Contact Test
Message Gap (ms) No Operation CB Time Maint
0 100.0 ms
Test LEDs
NIC Protocol No Operation CB Time Lockout
IEC64850 Alarm Disabled
Autoreclose Test
NIC MAC Address No Operation CB Time Lockout
200.0 ms
Red LED Status
NIC Tunl Timeout Fault Freq Lock
5 min Alarm Disabled
Green LED Status
NIC Link Report Fault Freq Count
Alarm 10
DDB 31-00
NIC Link Timeout Fault Freq Time Reset Lockout by
60s 3.600 Ks CB Close

Lockout Reset Man Close RstDly


DDB 1023-992 No 5s
P44x/EN HI/F65 Menu Content Tables

Page 6/10 MiCOM P441/P442 & P444

INTERMICOM IED
INTERMICOM CONF FUNCTION KEYS ETHERNET NCIT CTRL I/P LABEL
COMMS CONFIGURATOR

IM Input Status IM Msg Alarm Lvl Kn Key Status Physical link Switch Conf.Bank Control Input 1
25 Electrical No Action Control Input 1

IM Output Status IM1 Cmd Type Fn Key 1 Antialiasing Fil Active Conf.Name
Direct Unlocked Disabled

Source Address IM1 Fallback Mode Fn Key 1 Mode Merge Unit Delay Active Conf.Rev Control Input 32
1 Default Toggled 0 Control Input 32

Received Address IM1 Default Value Fn Key 1 Label L.N. Arrangement Inact.Conf.Name
2 0 Function key 1 LN1

Baud rate IM1 FrameSyncTim Logic Node 1 Inact.Conf.Rev


9600 1,5 Logical Node 1

Remove Device Fn Key 10 Logic Node 1B IP PARAMETERS


Px30 Unlocked Logical Node 2

Ch Statistics IM8 Cmd Type Fn Key 10 Mode Logic Node 2 IP Address


Invisible Direct Toggled Logical Node 3

Rx Direct Count IM8 Fallback Mode Fn Key 10 Label Logic Node 2B Subnet mask
Default Function key 1 Logical Node 4

Rx Block Count IM8 Default Value Synchro Alarm Gateway IEC61850 SCL
0 0

Rx NewDataCount IM8 FrameSyncTim IP PARAMETERS IED Name


1,5

Rx ErroredCount IP address IEC61850 Goose

Lost Messages Message status Subnet mask GolD

Elapsed Time Channel Status Gateway GoENA


Disabled

Reset Statistics IM H/W Status SNTP PARAM- Test Mode


no ETERS Disabled

Ch Diagnostics Loopback Mode SNTP Server 1 VOP Test Patern


Invisible Disabled 0x00000000

Data CD Status Test Pattern SNTP Server 2 Ignore Test Flag


256 No

FrameSync Status Loopback Status


Menu Content Tables P44x/EN HI/F65

MiCOM P441/P442 & P444) Page 7/8

DISTANCE DISTANCE SCHEMES POWER-SWING


GROUP 1 GROUP 1 GROUP 1

Line Setting R2Ph Zone Q - Direct Program Mode WI: Single Pole Delta R
Group 1 20 Ω Directional Fwd Standard Scheme Disabled 500 mΩ

Line Length tZ2 kZq Res Comp Standard Mode WI : V< Thres. Delta X
100 km / Miles 200 ms 1.000 Basic + Z1X 45 V 500 mΩ

Line Impedance kZ3/4 Res Comp kZq Angle Fault Type WI : Trip Time Delay IN > Status
12 Ω 1.000 0° Both Enabled 60 ms Enabled

Line Angle kZ3/4 Angle Zq Trip Mode PAP: Tele Trip En IN > (% Imax)
70 ° 0° 27 Ω Force 3 Poles Disabled 40 %

Zone Setting Z3 RqG Sig. Send Zone PAP: Del. Trip En I2 > Status
Group 1 30 Ω 27 Ω None Disabled Enabled

Zone Status R3G - R4G RqPh DistCR PAP: P1 I2 > (% Imax)


110110 30 Ω 27 Ω None Disabled 30 %

kZ1 Res Comp R3Ph - R4Ph tZq Tp PAP: 1P Time Del Imax Line > Status
1.000 30 Ω 0,5 σ 20.0 ms 500 ms Enabled

kZ1 Angle tZ3 OTHER PARA- tReversal Guard PAP: P2 Imax Line>
0° 600 ms METERS 20.0 ms Disabled 3.000 A

Z1 Z4 Serial Comp Line Unblocking Logic PAP: P3 Delta I Status


10 Ω 40 Ω Disabled None Disabled Enabled

Z1X tZ4 Overlap Z Mode TOR-SOTF Mode PAP 3P Time Del Unblocking Delay
15 Ω 1.000 s Disabled 00000000110000 2.000 s 30.0 s

R1G Zone P - Direct. Z1m Tilt Angle SOFT Delay PAP: IN Thres Blocking Zones
10 Ω Directional Fwd o
0° 110 s 500.0 mA 00000

R1Ph kZp Res Comp Z1p Tilt Angle Z1Ext Fail PAP; K (%Un) Out Of Step
10 Ω 1.000 0° Disabled 0.500 1

tZ1 kZp Angle Z2/Zp/Zq Tilt Angle Weak Infeed Loss Of Load Stable Swing
0s 0° 0° Group 1 Group 1 1

kZ2 Res Comp Zp Fwd Z Chgt Delay WI :Mode Status LoL: Mode Status
1.000 25 Ω 30.00 ms Disabled/PAP/Trip Echo Disabled

kZ2 Angle RpG Umem Validity LoL. Chan. Fail


0° 25 Ω 10 s Disabled

Z2 RpPh Earth Detect kZm Mutual Comp LoL: I<


20 Ω 25 Ω 0.05*I1 s 0 500 mA

R2G tZp Fault Locator kZm Angle LoL: Window


20 Ω 400 ms Group 1 0° 40ms
P44x/EN HI/F65 Menu Content Tables

Page 8/10 MiCOM P441/P442 & P444

BROKEN
BACK-UP I> NEG SEQUENCE O/C EARTH FAULT O/C
CONDUCTOR
GROUP 1 GROUP 1 GROUP 1
GROUP1

I>1 Function I2>1 Function Broken Conductor IN>1 Function


DT DT Enabled DT

I>1 Directional I2>1 Directional I2/I1 Setting IN>1 Directional


Directional Fwd Non-Directional 0,2 Directional Fwd

I>1 VTS Block I2>1 VTS Block I2>2 Time Dial I2/I1 Time Delay IN>1 VTS Block
Non-Directional Block 1 60 s Non-Directional

I>1 Current Set I2>1 Current Set I2>2 Reset Char I2/I1 Trip IN>1 Current Set
1.500 A 200 mA Disabled 200.0 mA

I>1 Time Delay VTS I2>1 Time Delay I2>2 tRESET IN>1 Time Delay
1.000 s 10 s 1s

I>1 TMS I2>1 Time Delay VTS I2>3 Status IN>1 Time Delay VTS
1 200 ms 0.2 s

I>1 Time Dial I2>1 TMS I2>3 Directional IN>1 TMS


7 1 1

I>1 Reset Char I2>1 Time Dial I2>3 VTS Block IN>1 Time Dial
DT 1 7

I>1 tRESET I2>1 Rest Char I2>3 Current Set IN>1 Reset Char
0s DT DT

I>2 Function I2>1 treset I2>3 Time Delay IN>1 tRESET


DT 0s 0s

I>2 Directional I>2 tRESET I2>2 Function I2>4 Status IN>2 Function
Non-Directional 0s DT Enabled

I>2 VTS Block I>3 Status I2>2 Directional I2>4 Directional IN>2 Directional
Non-Directional Enabled Non Directional Non-Directional

I>2 Current Set I>3 Current Set I2>2 VTS Block I2>4 VTS Block IN>2 VTS Block
2A 3A Block Non-Directional

I>2 Time Delay VTS I>3 Time Delay I2>2 Current Set I2>4 VTS Block IN>2 Current Set
2s 3s 200 mA 300.0 mA

I>2 TMS I>4 Status I2>2 Time Delay I2>4 Time Delay IN>2 Time Delay VTS
1 Disabled 10 s 2.0 s

I>2 Time Dial I>4 Current Set I2>2 Time Delay VTS I2>4 Time Delay VTS Idem for
7 4A 200 ms IN>3 & IN>4

I>2 Reset Char I>4 Time Delay I2>2 TMS I2> Char Angle IN> Char Angle
DT 4s 1 -45
Menu Content Tables P44x/EN HI/F65

MiCOM P441/P442 & P444) Page 9/8

RESIDUAL
AIDED D.E.F. THERMAL OVERLOAD ZERO SEQ. POWER VOLT PROTECTION CB FAIL & I<
OVERVOLTAGE
GROUP 1 GROUP 1 GROUP1 GROUP 1 GROUP 1
GROUP1

Channel Aided DEF Status Characteristic VN>1 Function Zero Seq. Power st. V< & V> MODE BREAKER FAIL
Enabled Simple/Dual DT Enabled 0000 GROUP 1

Polarisation Thermal Trip VN>1 Volatge Set K Time Delay Factor UNDER VOLTAGE CB Fail 1 Status
Zero Sequence 1.000 A 5V 0.00 s GROUP 1 Enabled

V> Voltage Set Thermal Alarm VN>1 Time Delay Basis Time Delay V< Measur't Mode CB Fail 1 Timer
1.0 V 70.0% 5s 1.00 s Phase-Neutral 200.0 ms

IN Forward Time Constant 1 VN>1 TMS Residual Current V<1 Function CB Fail 2 Status
100.0 mA 10.00 1 100.0 mA DT Disabled

Time Delay Time Constant 2 VN>1 tRESET Residual Power V<1 Voltage Set CB Fail 2 Timer
0s 5.00 0 0.5 mVA 50.0 V 0.4

Scheme Logic VN>2 Status V<1 Time Delay CBF Non I Reset
Shared Enabled 10.0 s CB Open & I<

Tripping VN>2 Voltage Set V<1 TMS CBF Ext Reset


Three Phase 10 V 1 CB Open & I<

Tp VN>2 Time Delay V<2 Status Under Current I<


20.00 ms 10 s Disabled GROUP 1

IN Rev Factor V<2 Voltage Set I < Current Set


0.600 38.0 V 50.00 mA

V<2 Time Delay


5.0 s

OVERVOLTAGE
GROUP 1

V> Measur't Mode


Phase-Neutral

V>1 Function
DT

V>1 Voltage Set


75.0 V

V>1 Time Delay


10.0 s

V>1 TMS V>2 Voltage Set


1 90.0 V

Polarisation V>2 Status V>2 Time Delay


Zero Sequence Enabled 500.0 ms
P44x/EN HI/F65 Menu Content Tables

Page 10/10 MiCOM P441/P442 & P444

SUPERVISION SYSTEM CHECK AUTORECLOSE INPUT LABELS OUTPUT LABELS


PSL DATA
GROUP 1 GROUP 1 GROUP 1 GROUP 1 GROUP 1

VT SUPERVISION C/S Check Schem A/R AUTORECLOSE MODE Opto Input 1 Relay 1 Grp 1 PSL Ref idem for GROUP
GROUP 1 7 GROUP 1 Opto Label 01 Relay Label 01 2, 3 & 4

VTS Time Delay C/S check Schem Man CB 1P Trip Mode P441/2/4 P441/2/4 26 May 2005
5.0 s 111 1/3 11:21:14:441

VTS I2> & I0> Inhibit V< Dead Line 3P Trip Mode Opto Input 8 Relay 14 Grp 1 PSL ID
50.0 mA 13.0 V 3/3 Opto Label 08 Relay Label 14 -481741114

Detect 3P V> Live Line 1P - Dead Time 1 P442/4 P442/4 Grp 2 PSL Ref
Disabled 32.0 V 1.0 s

Threshold 3P V< Dead Bus 3P - Dead Time 1 Opto Input 16 Relay 21


30.0 V 13.0 V 1.0 Opto Label 16 Relay Label 21

Delta I> V> Live Bus Dead Time 2 P444 P444 Idem for group 3 & 4
100.0 mA 32.0 V 60.0 s

CT SUPERVISION Diff Voltage Dead Time 3 Opto Input 24 Relay 32


GROUP 1 6.50 V 180.0 s Opto Label 24 Relay Label 32

CTS Status Diff Frequency Dead Time 4 P444 with


Disabled 50.00 mHz 180.0 s Option

CTS VN< Inhibit Diff Phase Reclaim Time Relay 46


1.0 V 20° 180.0 s Relay Label 46

CTS IN> Set Bus-Line Delay Close Pulse Time


100.0 mA 200.0 ms 100.0 ms

CTS Time Delay Discrimination Time


5.0 s 5.0 s

CVT SUPERVISION A/R Inhbit Wind


GROUP 1 5.0 s

CVTS Status C/S on 3P Rcl DT1


Disabled Enabled

CVTS VN> AUTORECLOSE LOCKOUT


1.0 V GROUP 1

CVTS Time Delay Block A/R


100.0 s 1111111……111
Hardware / Software-Version P44x/EN VC/F65

MiCOM P441/P442 & P444

HARDWARE / SOFTWARE
VERSION HISTORY AND
COMPATIBILITY
(Note: Includes versions released and supplied to customers only)
Hardware / Software- P44x/EN VC/F65
Version

MiCOM P441/P442 & P444 Page 1/12

Relay type: P441/P442 & P444

Backward Compatibility
Software Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch A2.x: First Model – P441/P442 (P444 not available) – Modbus/Kbus/IEC103 – 4 languages – Optos 48Vcc (Hardware=A)
Documentation: TG 1.1671-C & OG 1.1671-B
VDEW-ModBus-Kbus cells/CBaux/IRIGB/WeakInfeed/Reset No compatibility with branch
03 10/2000 V1.09
IDMT/SyncCheck/AR Led A1.x (model 02)
A2.6 VDEW-ModBus-Kbus cells/CBaux/IRIGB/ WeakInfeed/Reset
04 10/2000 IDMT/ SyncCheck/AR Led V2.0 03 03 03
New S1 version
No compatibility with branch
03 04/2001 Freq out of range (major correction)- 1/3 pole AR logic - VTS V1.10
A1.x (model 02)
A2.7
Frequency out of range (major correction)- 1/3 pole AR logic
04 04/2001 V2.0 03 03 03
A New S1 version
A2.8 04 07/2001 Communication improvement / Floc with 5Amp / IrigB V2.0 03 03 03
3P fault in Power Swing/SOTF logic/CB Fail/Ext. Trip + 5
A2.9 04 01/ 2002 ms/Z1-Z2 measure for small characteristic /SOTF-TOR / U-I V2.0 03 03 03
prim sec
EEPROM correction/RCA angle/DEF correction/New general
A2.10 04 05/2002 V2.0 03 03 03
distance Trip equation (Block scheme) / Fault Locator
Last A2.x branch version: Retrip CB/Ffailure/31th December for
DRec/Disturbance compressed function and communication
A2.11 04 09/2003 V2.0 03 03 03
correction/Voltage memory/DEF/Ext Csync/P.Phase ref
Csync/Sync live-live/2UN Vref Sync/Z1 & Arg<55°

Note: Software version / hardware version / model number can be found by setting in “system data” with MiCOM S1 or LCD front panel.
P44x/EN VC/F65 Hardware / Software-Version

Page 2/12 MiCOM P441/P442 & P444

Relay type: P441/P442 & P444

Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch A3.x : P444 model with 24optos/32 outputs (Omron) – Universal optos – Italian Language – DNP3
Documentation: TG 1.1671-C & OG 1.1671-B
P444/DNP3/NCIT/universal input/5 languages
Italian model 4050A for P444
No compatibility with branch
A3.0 05 05/2001 P441/P442 models 050A (48Vcc) or 050B (Universal optos) V2.02 + patch
A2.x (model 03 or 04)
DDB with 1022cells/Discrimination timer in AR/New DDB
distance cells/DEFlogic/SOTF timer/Broken Conductor/Com.
SOTF-TOR/Z4 block Pswing/CB Fail/IEC103 disturbance/U-I 05
A3.1 A or B 06 12/2001 Prim-sec/Kms-Miles/3P fault in Power Swing/Z1-Z2 measure for V2.02 + patch N/A 05
for P441/442 (Same DDB)
small charateristic/Ext Trip+5msec/New settings

EEPROM correction/New general distance Trip equation (Block 05


A3.2 06 05/2002 V2.02 + patch N/A 05
scheme)/RCA angle/IEC 103 correction/Fault Loc/DEF P selec (Same DDB)
A
for P444 Retrip CB/Ffailure/31th December for Drec/Disturbance
(compressed or not compressed) and communication correction 05
A3.3 06 09/2003 / Voltage memory / DEF/ Ext Chksync/P.Phase ref Chksync / V2.02 + patch N/A 05
Sync live-live / I broken Cond./ Px4X with Px3x in IEC103/2UN (Same DDB)
Vref Sync/Z1 & Ang<55°
Last A3.x branch version: Time sync cell in ModBus/ Optos
06 10/2003 tagging in event/ CB close DNP3/ Status opto with setting V2.02 + patch 05 N/A 05
A3.4 (same DDB)
group/ Im displayed in Measurement mode/ IEC 103

Note: Software version / hardware version / model number can be found by setting in “system data” with MiCOM S1 or LCD front panel.
Hardware / Software- P44x/EN VC/F65
Version

MiCOM P441/P442 & P444 Page 3/12

Relay type: P441/P442 & P444

Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch A4.x : Second Rear Port - more alarms - new application feature
Documentation: P44x/EN T/B22
Second rear port/Slip frequency/Retrip CB/VTS phase
selec/PPGround phase selection/Extraction PSL/Serial Cmp
A4.0 07 09/2002 V2.05 + patch
Line/New DDB cells/Overlap Z/ Rev with X4 limit/Winfeed/Floc
in IEC /Dead time2/I Bk conduct.
A4.1 07 12/ 2002 Bi phase ground & phase selection/Synchro VT bus side V2.07
Voltage memory improvement/compliant IEC103 with Px3x
A4.3 07 04/ 2003 V2.07
/DEF/Pswing & glitchZ
Synchro check function improvement/Tripping time stability for
A4.4 07 08/2003 Z2 fault/Problem of battery alarm when IEC103 communication V2.07
A or B resolved
for P441/442 Disturbance (compressed or not compressed) and No compatibility with branch
communication correction / DEF/ Ext Csync/P.Phase ref Csync A3.x (model 05 or 06)
A4.5 07 09/2003 / Sync live-live / I broken Cond./ Px4X with Px3x in V2.07
A
for P444 IEC103/Battery Alarm IEC 103/31th December for Drec/2UN
Vref Sync/Z1 & Arg<55°/Zn-Zn+1 with +30msec
Timesync cell in ModBus/Synchro TP bus/Optos taging in
event/Dynamic management Bus-Line for checksync /ModBus
A4.8 07 09/2004 correction /DNP3/Frequency tracking/Directionnal with V2.07
Deltas&Classical are computed in parallel (No delay between
the algorithms)
Last A4.x branch version: DNP3 with S1/ ModBus/ CB close
A4.9 07 05/2005 DNP3/ Floc with evolving fault/ Status opto with setting group/ V2.07
Im displayed in Measurement mode/ VTS alarm using V2
Note 1: Software version / hardware version / model number can be found by setting in “system data” with MiCOM S1 or LCD front panel.
Note 2: Version A4.2 - A4.4 – A4.6 – A4.7 not distributed
P44x/EN VC/F65 Hardware / Software-Version

Page 4/12 MiCOM P441/P442 & P444

Relay type: P441/P442 & P444

Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch B1.x : New Hardware Platform (Coprocessor Board 150MHz-2nd rear port-Triptime= 1,1Cycle - 48 samples/T) & New functions (32N & 59N)
Documentation: P44x/EN T/E33
New platform/model 080C/coprocessor board at 150 MHz/PW
B1.0 08 12/2002 (32N)/CVTS (59N) new functions/ Px4X with Px3x in IEC103 / V2.09 No compatibility with branch A.x
Retrip CB/Ffu/31st December for Drec/I Brok.cond./DEF polar.
Synchrocheck ext correction & PPhase ref & L-Live / 32N
V2.09 +
B1.1 09 07/2003 correction / Line angle<55° / Voltage memory / Power swing & 08 08 08
patch*
Z glitch
Disturbance compressed & not compressed function and
V2.09 +
B1.2 09 09/2003 communication correction/2UN Vref Sync/Zn-Zn+1 with 08 08 08
patch*
+30msec

C Synchro TP bus/Optos taging in event/ZSP angle/Dynamic V2.09 +


B1.3 09 07/2004 08 08 08
management Bus-Line for checksync patch*
V2.09 +
B1.4 09 09/2004 New plateform /Timesync cell in ModBus /DNP3 08 08 08
patch*
CB close command is applied 2 time from DNP3 V2.09 +
B1.5 09 11/2004 08 08 08
Fault location-Settings group by opto-DNP3 & model N° patch*
32N corrected (5Amp) - V2.09 +
B1.6 09 04/2005 08 08 08
Primary measurement & Im patch*
V2.09 +
B1.7 09 06/2005 Last B1.x branch version: ModBus/ VTS alarm using V2 08 08 08
patch*

Note: Software version / hardware version / model number can be found by setting in “system data” with MiCOM S1 or LCD front panel.

• Patch 09 is included with MiCOM S1 version V2.11


Hardware / Software- P44x/EN VC/F65
Version

MiCOM P441/P442 & P444 Page 5/12

Relay type: P441/P442 & P444

Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch C1.x : New Hardware Platform (New CPU Board 150MHz + Coprocessor Board 150MHz-2nd rear port-Triptime= 1,1Cycle - 48 samples/T) &
Functions as B1.4+ New Distance Features
Documentation: P44x/EN T/E44
New platform/model 20G or 20H/Cpu board at 150 MHz/Fast
trip board/46 output-P444 model 20H/Pswing for China
V2.09 +
Distance feature: timer from Zn to Zn-1/Tilt settable in
patch*
Z1Z2Zp/Output “Phaseground detection”/PAP (Winfeed for RTE
C1.0 20 04/2004
G France)/Drec not compressed with 24 samples by cycle/Control or
for P441/442 input/InterMicom/Tp in DEF/DEF timer from 2 to No compatibility with branch A.x
V2.10
100msec/3rd&4th IN>/Internal trace by Zgraph
G-H Relay-opto event log/Z4Zp indication/ No compatibility with branch B.x
for P444
V2.09 +
Last C1.x branch version:UCA2 / InterMicom with patch*
C1.1 20 12/2004 UCA2/Timesync cell in ModBus/Synchro TP bus/Optos taging
or
in event/Dynamic management Bus-Line for checksync
V2.10
P44x/EN VC/F65 Hardware / Software-Version

Page 6/12 MiCOM P441/P442 & P444

Relay type: P441/P442 & P444

Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch C2.x : Idem C1.x with UCA2 (Ethernet optical support) & new function (49+NCIT)
Documentation: P44x/EN T/E44
New platform- NCIT/ Thermal Overload as P540/ Synchro TP No compatibility with branch A.x
bus/ Optos tagging in event/ ZSP angle/ Dynamic management
C2.0 30 08/2004 No compatibility with branch B.x
Bus-Line for checksync/ DEF Reverse sensitivity/ Time sync
input/ ZSP start/ Ethernet module NCIT 61850-9-2 No compatibility with branch C1

C2.1 30 09/2004 Timer 0/DNP3 correction 30 30 30

C2.2 30 10/2004 InterMicom/ DEF primary scale/ AREVA name in UCA2 V2.10 + 30 30 30
patch*
Phase select. PPground/ Reset IN dead/ DNP3 & CB Close/
C2.5 30 11/2004 30 30 30
Floc/ Opto& setting group selection/ DNP3 or

G-J Primary measurement & Im - Error during flash with optical V2.11
C2.6 for P441/442 30 05/2005 fiber/ Floc&Broken currents new cells in DNP3-E2.0 official 30 30 30
platform with NCIT

G-J-H UCA2 no longer supported (from that version onwards)/ Add


for P444 phase voltage inversion detection in Voltage Transformer
C2.7 30 07/2005 30 30 30
Supervision (V2 presence without I0 and I2)./
Add IEC61870-5-103 Generic Services
P0 time delay/ NCIT sampling/Extended mode with DRec/
C2.8 30 02/2006 OpticFiber with KBus model/ Tilt angle & K0/ Reset latch DDB& 30 30 30
LEDs
DNP3/ PreTrigger in DRec/ Tilt angle & K0/ C264 compatibility V2.12 + patch
C2.9 30 03/2006 30 30 30
in DNP3/ Reset VTS 3phases
Add Chinese HMI (First implementation, will become standard
C2.10c 30 05/2006 30 30 30
in next version)
Hardware / Software- P44x/EN VC/F65
Version

MiCOM P441/P442 & P444 Page 7/12

Relay type: P441/P442 & P444

Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Last C2.x branch version:
Zone reset&overlap/ WeakInfeed Echo+DEF/ Control Inp/
C2.11 30 052007 V2.14 30 30 30
Z1ext+Tilt/ Selfcheck Output board/ DRec & 5Amp/ Start D &
Phase Selection/ Timer&Thermal Protec 5Amp

Note 1: Software version / hardware version / model number can be found by setting in “system data” with MiCOM S1 or LCD front panel.

Note 2: Version C2.3 --- C2.4 not distributed

Note 3: Patch 20 & 30 are included with MiCOM S1 version V2.11


P44x/EN VC/F65 Hardware / Software-Version

Page 8/12 MiCOM P441/P442 & P444

Relay type: P441/P442 & P444

Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch C3.x : Idem C2.x with new communication protocol (IEC 61850-8-1) / UCA2 not supported – Model J only (Dual optos managed by default)
Documentation: P44x/EN T/G54
Add IEC 61850-8-1 protocol / Zone reset&overlap/ WeakInfeed
Echo+DEF/ Control Inp/ 2nd Sync +NCIT/ 21-67N activated
C3.7 31 12/2006 V2.12 + Patch
separately/ 67N&Blocking Scheme/ Floc&measurement with
high harmonic/ Hysteresis at 2% for V> &V<
No compatibility with branch Ax.x
C3.8 J 31 02/2007 Z1ext+Tilt/ Selfcheck Output board/ NCIT acquisition No compatibility with branch Bx.x
for P441 Start ∆ & Phase Selection/ Timer&Thermal Protec 5Amp/ KEMA No compatibility with branch C1.x
C3.9 for P442 31 06/2007
& Floc for 61850-8-1 No compatibility with branch C2.x
for P444
V2.14 + Patch
C3.10 31 02/2008 State change & Time stamping
Last C3.x branch version:
C3.11 31 03/2008 Phase select & PPGnd fault /DEF & Negative polarisation/
61850-8-1
Hardware / Software- P44x/EN VC/F65
Version

MiCOM P441/P442 & P444 Page 9/12

Relay type: P441/P442 & P444

Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch C4.x : Idem C3.x with new features (cells and DDB)
Documentation: P44x/EN T/G54

C4.0 35 04/2007 Start ∆ & Phase Selection/ Add new DDB (Dist. Block/V>-V< ) V2.14 + Patch No compatibility with branch Ax.x
J
No compatibility with branch Bx.x
for P441 No compatibility with branch C1.x
for P442 Last C4.x branch version: Timer&Thermal Protec 5Amp/ KEMA
C4.1 35 10/2007 V2.14 + Patch
for P444 & Floc for 61850-8-1 No compatibility with branch C2.x
No compatibility with branch C3.x
P44x/EN VC/F65 Hardware / Software-Version

Page 10/12 MiCOM P441/P442 & P444

Relay type: P441/P442 & P444

Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch C5.x : Idem C3.x with new features (cells and DDB)
Documentation: P44x/EN T/G54
Phase selec & PPGnd fault/ DEF & Negative polarisation/
Conventional algo & 1PGnd fault/ Fault report/ Cont Input label/ No compatibility with branch Ax.x
RGuard/ IN> 2nd stage/ IDMT TMS steps/ New DDB: Internal
C5.0 J 36 05/2007 trip+trip LED/ DRec default settings/ SOTF-TOR/ I>4&StubB/ V2.14 + Patch No compatibility with branch Bx.x
VMemory settable/ CT polarity/ I2>/ VR>/ DNP3/ New Zone Q/ No compatibility with branch C1.x
for P441
PSwing RLim/ Channel aided scheme/ I0 setting/ PSL graphic No compatibility with branch C2.x
for P442
improved
for P444 No compatibility with branch C3.x
Last C5.x branch version: State&time stamp/ IEC 61850-8-1/
No compatibility with branch C4.x
C5.1 36 04/2008 DNP3 over Ethernet/ Courier&Group/ I2&Dist start/ WeakInfeed V2.14 + Patch
TAC received extented
Hardware / Software- P44x/EN VC/F65
Version

MiCOM P441/P442 & P444 Page 11/12

Relay type: P441/P442 & P444

Backward Compatibility
Software- Hardware Model Date of S1
Full Description of changes Menu
version version number issue Compatibility Setting
PSL Text
Files
Files
Branch C5.x : Idem C3.x with new HW suffix K: extended buttons, high break contacts, tri colors LEDs…
Documentation: P44x/EN T/G54
HW suffix K/ Start D & Phase Selection/ New DDB cells V> No compatibility with branch Ax.x
D1.0 K 40 02/2007 V2.14 + Patch
&V<&independent distance scheme
for P442 No compatibility with branch Bx.x
for P444 Last D1.x branch version: Timer&Thermal Protec 5Amp/ KEMA No compatibility with branch Cx.x
D1.1 40 04/2008 V2.14 + Patch
& Floc for 61850-8-1
Last D2.x branch version: The following features are added:
- reverse guard detection
- Second stage of IN> earth overcurrent with DT or IDMT,
- IDMT step size for TMS from 0.025 to 0.005
- Extension from 4 In to 10 In the maximum setting range for
the 2 first stages
- Labels for disturbance records modified,
- “SOFT I>3 Enabled” TOR/SOTF mode creation,
- “Trip LED” menu added in DDB No compatibility with branch Ax.x
K 40 - voltage memory validity settable from 0s to 10s (step 0.01s) V2.14 + Patch No compatibility with branch Bx.x
D2.0 for P442 11/2008 - CT connection can be modified by software
for P444 45 - Negative sequence overcurrent protection enhanced, S1 Studio No compatibility with branch Cx.x
- Residual overvoltage enhanced No compatibility with branch D1.x
- DNP3 serial added
- Zone Q added
- resistance limits for power swing = R1, R2, RP, RQ, R3/R4)
- Channel aided trip modification
- Channel-aided distance schemes: trip after receipt of signal
from remote end protection and Tp instead of T1.
- New settings for I0 threshold
- InterMiCom Interrupt integration
P44x/EN VC/F65 Hardware / Software-Version

Page 12/12 MiCOM P441/P442 & P444

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Publication: P44x/EN T/F65

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