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INTERNATIONAL CONFERENCE ON SMART GRID TECHNOLOGY (INCETS16)

A High-Efficiency Single-Phase
Transformer-less HB-ZVR Photovoltaic
Inverter Topology
Vishal V. N. 1, Divyalal R. K.2
P.G. Student, Department of Electrical engineering, Govt. college of engineering Kannur, Kerala, India1
Associate Professor, Department of Electrical engineering, Govt. college of engineering Kannur, Kerala, India 2

ABSTRACT: Present scenario research is done on photo-voltaic inverters with transformer-less topologies to attain
high efficiency. Grid-tied inverters are the key components of distributed generation system as an effective interface
between renewable energy sources and utility. Recently transformer-less inverter is having great demand for low-
voltages in single-phase grid-tied photovoltaic system as it is having higher efficiency, lower cost, smaller size and
weight when compared to inverter with transformer. In this paper H-5 bridge topology is used with a new ac bypass
circuit consisting of a diode rectifier and a switch with clamping to the dc midpoint is used, which will ultimately
reduce the losses and improves the overall efficiency of the transformer.

KEYWORDS: PV inverter, transformer less inverter.

I. INTRODUCTION
Photovoltaic(PV) inverters had become more widespread within nowadays world. These grid-connected
inverters convert the available direct current supplied by the PV panels and feed it into the utility grid. Currently two
main topology groups used in the case of grid-connected PV systems which is with and without galvanic isolation
inverters. Galvanic isolation is used in the dc, in form of a high-frequency dc-dc transformer or on the grid side in the
form of a big bulky ac transformer [1]. Both of these solutions offer the safety and advantage of galvanic isolation, but
the efficiency of the whole system is decreased due to power losses in these extra components. In case of transformer-
less, the efficiency PV system can be increased by a range of 1%2%. The most important advantages of transformer-
less PV systems is its higher efficiency and smaller size and weight compared to the PV systems having galvanic
isolation. The efficiency of the commercial PV panels is around 15-20% [2]. It is very important that the power
produced by these panels is not wasted, by using inefficient power electronics systems. The efficiency and reliability of
both single-phase and three phase PV inverter systems can be improved using transformer less topologies, but new
problems related to leakage current and safety need to be dealt with.

II TRANSFORMERLESS TOPOLOGIES

A. HB with Unipolar Switching topology

Most single-phase H-Bridge inverters are using unipolar switching, which improves the injected current quality of
the inverter, and it is done by modulating the output voltage to three levels with twice its switching frequency. This
type of modulation will reduce the stress on the output filter and obviously it decreases the losses in the inverter. The
positive active vector is applied to the load by turning on S1 and S4, as shown in Fig. I(a). The negative active vector is
done by the same way, but here, S2 and S3 are turned on, as shown in Fig. I(b), the zero-voltage state is attained by
short circuiting the output of the inverter as in the case of the unipolar switching pattern. This type of topology and
modulation technique, the high frequency common-mode voltage, which is measured across CGPV, will ultimately
lead to very high leakage ground current, which make it unsafe and not usable for transformer-less photovoltaic
applications [4].

B. HERIC topology

The topology, shown in Fig. I(c) combines the benefits of the three-level output voltage of unipolar modulation with
the reduced common-mode voltage. In this way, the overall efficiency of the inverter can be increased, without
compromising the common-mode nature of entire system [5]. The zero-voltage state is attained using the bidirectional
switch shown with a grey background in Fig. I(c). This bidirectional switch is made using insulated-gate bipolar

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INTERNATIONAL CONFERENCE ON SMART GRID TECHNOLOGY (INCETS16)

transistors (IGBTs) and two diodes S5 and S6. During the positive half-wave of the load voltage, S6 is in on condition
and which is used during the freewheeling period of S1 and S4. On the other hand, during the negative half-wave, S5 is
in on condition and which is used during the freewheeling period of S2 and S3. In this way, S5 or S6 switch as shown in
Fig. I(d), are used to develop a zero-voltage state by short-circuiting the output of the inverter, and during this period
the PV is separated from the grid, as S1S4 or S2S3 are turned off. Injection of reactive power to the grid and variable
common mode voltage is the major disadvantage of heric topology [6].

(a) (b)

(c) (d)

Fig I. a) HB-Unipolar topology: switches S1 and S4 for positive voltage. b) HB-Unipolar topology: switches S1 and S3
on for positive voltage. c)HERIC topology: switches S1 and S4 during positive half-wave. d) HERIC topology: switch
S6 on during positive half-wave.

III. H-BRIDGE ZERO VOLTAGE STAGE RECTIFIER TOPOLOGY

One of the best methodology for generating the zero voltage state can be done using a bidirectional switch using
one IGBT and one diode rectifier bridge. And this topology is detailed in Fig.2, which shows the bidirectional switch,
as an auxiliary component shown in grey background. The bidirectional switch is clamped to the midpoint of the DC-
link capacitors which is used to fix the potential of the photovoltaic array during the zero voltage period, during this
period T1-T4 and T2-S3 are open.

Fig. 2

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INTERNATIONAL CONFERENCE ON SMART GRID TECHNOLOGY (INCETS16)

Here we used an extra diode to protect the lower DC-link capacitor from short-circuiting [7]. During the positive half
wave, switches T1-T4 are used for supplying a positive voltage to the load. The zero voltage state is attained by turning
ON T5 during which the switches T1-T4 are turned OFF. The gate signal for switch T5 is the complementary gate signal
of switches T1-T4, and here a small dead time is given to avoid short-circuiting of the input capacitor [8]. During the
positive half-wave, switches S1 and S4 are used for supplying a positive voltage to the load, as shown in Fig. 2.

Fig. 3

The zero-voltage state is attained by turning on the switch S5, during that period the switches S1 and S4 are
turned off, as shown in Fig. 3 [9]. The gate signal for S5 is the complementary gate signal of S1 and S4, and here a
small dead time is given to avoid short-circuiting of the input capacitor. By using S5, grid current is allowed to flow in
both directions. In this way the inverter can also feed reactive power to the grid [10].

Fig. 4

During the negative half-wave of the load voltage, switches S2 and S3 are used for supplying a positive
voltage to the load and switch S5 is controlled by using the complementary signal of switches S2 and S3 and it
generates the zero voltage state, by short-circuiting the outputs of the inverter and clamping them to the midpoint of the
dc-link. During the dead-time, which is attained between the active state and the zero state, there will be a short period
when the freewheeling current finds a suitable path through the antiparallel diodes to the input capacitor during which
all the other switches are turned off. This is shown in Fig. 4 and leads to less losses, compared to the HERIC topology,
where the freewheeling current finds its alternate path through the bidirectional switch, which is switch S5 or S6,
depending upon the sign of the current [11].

IV. EXPERIMENTAL RESULTS

The output voltage of the inverter has three levels, taking into account of the freewheeling part during dead-time.
The load current ripple is found very small and the frequency is equal to the switching frequency. The simulation
parameters are: Vdc = 350 V, filter inductor = 3 mH, filter capacitor = 10 F, F(sw) = 8 kHz, and dead-time = 2.5 s.
The input voltage given is 350v dc. Initially gate pulse is given to the switches S 1-S4 during one half and in the other
half gate pulse is given to the switches S 2-S3 and the complimentary pulse is given to switch S 5.

Copyright to IJIRSET DOI:10.15680/IJIRSET. 1113


INTERNATIONAL CONFERENCE ON SMART GRID TECHNOLOGY (INCETS16)

A. Mat-lab simulation

Fig. 5

B. Waveforms

(a) (b)

(b) (d)

Fig 6. a) Output voltage and current with filter. b) output voltage without filter. c) Switching sequence of HB-ZVR
topology. d) THD analysis.

Fig.5 shows the mat-lab simulation of the circuit. Fig.6 show the various waveforms in which fig.6(a) and (b)shows
the output voltage with and without filter. Fig. 6(c) shows the switching pulse generation and Fig. 6(b) shows the
THD analysis. In Fig.6(b) switching pulse generated for the switches S 1-S4, S2-S3 and the third waveform shows the
complimentary pulse which is given to the switch S 5. Fig. 6(d) shows the harmonics is very less.

Copyright to IJIRSET DOI:10.15680/IJIRSET. 1114


INTERNATIONAL CONFERENCE ON SMART GRID TECHNOLOGY (INCETS16)

C) Hardware simulation using Proteus ver.8

(a) (b)

(c)
Fig. 7. a) hardware simulation using proteus ver. 8. b) Switching pulse generated for switches S1-S4, S2-S3 and
complimentary pulse for switch S5. c) output voltage waveform.

Fig.7(a) shows the hardware simulation done by using the software Proteus professional ver. 8. In the given hardware
simulation the microcontroller used is Atmega-32, using which 3 signals are generated which is given to the gate of
switches S1-S4, Switches S2-S3 and the complimentary is pulse given to the switch S 5. Switches used are MOSFET
IRF540.

V. CONCLUSION

Simulated the circuit using Mat-lab 2013 and Proteus Professional Ver.8 and discussed various waveforms.
Transformer-less inverters have much better efficiency, when compared to the inverters provided with galvanic
isolation. On the other hand, when the transformer is removed, the generated common-mode voltage of the inverter
topologies mostly influences the ground leakage current through the parasitic capacitance of the photovoltaic. In the
case of Bipolar PWM which generates a constant common-mode voltage, but it has a major disadvantage of very low
efficiency, due to its two level output voltage. On the other hand, the unipolar PWM modulation, even though having
an output 3 voltage level, the generated common-mode voltage will have very high-frequency components, which will
finally result to very high ground leakage currents. This paper has introduced a transformer-less topology and an
alternative solution for the bidirectional switch, is used to generate the zero-voltage state. So the common-mode voltage
variation is made constant by using of the HB-ZVR topology and its high efficiency make it the most attractive solution
for transformer-less photovoltaic applications.

Copyright to IJIRSET DOI:10.15680/IJIRSET. 1115


INTERNATIONAL CONFERENCE ON SMART GRID TECHNOLOGY (INCETS16)

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Copyright to IJIRSET DOI:10.15680/IJIRSET. 1116

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