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ECOM 3310 ECE Department

Computer Architecture, Design and Organization Faculty of Engineering

Midterm Exam IUG
Spring 06-07
9.Apr.2006 Dr. M. Mikki
Duration: 60 minutes Eng. Said Marouf

Question 1)
a) Translate the following C code into MIPS. Please comment your code.
Assume x is $s0; y is $s1; A is $a0 and points to integers; B is $a1 and points to
unsigned char.
You will lose points for assembler syntax errors.

1) x = (y > 7)? x + 2 : x 3;


2) x = (x + (y + 5)) & 0xFF;


3) A[x+3] = B[x+2] | 0x10

b) MIPS has several addressing modes, list all types of these addressing modes.

Question 2)
a) Write a procedure, bfind, in MIPS assembly language. The procedure should take a
single argument that is a pointer to a null-terminated string in register $a0. The bfind
procedure should locate the first b character in the string and return its address in
register $v0. If there are no bs in the string, then bfind should return a pointer to the
null character at the end of the string. For example, if the argument to bfind points to
the string rabbit, then the return value will be a pointer to the third character of the

.data bfind:
string:.asciiz"hello" loop:
.text lb$t0,($a0)
.globlmain beq$t0,98,find
main: add$a0,$a0,1
la$a0,string bloop
jalbfind find:
move$a0,$v0 bend
li$v0,1 nullisfound:
syscall move$v0,$a0

li$v0,10 end:
syscall jr$ra

b) How can you modify the answer of part a, so the program will count the number of b
characters in the string, and store their corresponding addresses into an array.
(Show modifications, or rewrite the program)
Question 3)
The following program tries to copy words from the address in register $a0 to the
address in register $a1, counting the number of words copied in register $v0. The
program stops copying when it finds a word equal to 0. You do not have to preserve the
contents of registers $v1, $a0, and $a1. This terminating word should be copied but not
loop: lw $v1,0($a0)
addi $v0,$v0,1
sw $v1,0($a1)
addi $a0,$a0,1
addi $a1,$a1,1
bne $v1,$zero,loop

There are multiple bugs in the MIPS program; fix them and turn in a bug-free version.
(Show changes clearly)


Question 4)
A flow-control instruction is one that affects the program sequence, i.e., it changes the
contents of the Program Counter register. Examples of flow-control programming
constructs include conditional and "goto" statements. Give one instance of a flow-control
instruction for each of the three MIPS instruction formats (R, I and J). Provide a rank that
shows the order of each type in terms of the range it can address (small to large). Mention
how many bits of each instruction are reserved for the destination address. Based on the
instruction format, give reasons for such bit limitations.
Order by Number of
Instruction Addressing Complete Instruction Bits in the
Drawing and Reasons
Type Range (put Example Addressing
1, 2 or 3)* Field
Only 5 bits are used because only 32
R-type JR $ra
Instruction 1 Or JALR $ra 5 (32) registers are available to keep the
absolute address jumped to. (25=32)
Here the only operand is the label
J-type J label
Instruction 2 Or JAL label 26 (address) so we need 6 bits for the
opcode and 26 are left as an address
We need a 6b opcode, a 5b $S1, a5b
I-type BEQ $S1, $S2, label
Instruction 3 Or BNE $S1, $S2, label 16 $S2 and the remaining 16b are for
the address.
* 1 for the least range and 3 for the highest range.
Question 5)
After loading the assembly program shown below into PCSPIM we get the figure shown
below, according to the program code and the figure below, answer the following
la $a0,string2
jal bfind
string : .asciiz "hello"
string2: .asciiz "Find me\n"

a) After executing the instruction la $a0, string2 the value of $a0 =

b) After executing the instruction jal bfind the value of $ra = _____________.
c) The program starts at address _____________.
d) string is loaded to address _____________, where string2 is loaded to address
e) Explain why PCSPIM translated li $v0,1 to ori $2, $0, $2, and how both
instructions are the same.

f) Explain what each part of a text segment line means.

Question 5)
As you know, a decoder is a device that has n inputs, 2n outputs and, if the value
represented by the input lines is k, then the kth output line is asserted. Build using logic
gates a device, similar to a decoder, that has 2 inputs (in0 and in1) and 4 outputs (out0
out3) and when the value of the input lines is k, all the lines of the output numbered 0
through K are asserted (i.e. set to 1). For example, if the value of the input lines is 2,
then output lines 0, 1, and 2 would be asserted.

Question 5)
Modify the 1-bit ALU covered in class (supporting AND, OR, +, and -) to implement
an XOR (exclusive OR) operation. Draw the entire ALU, adding the fewest possible
gates. Use the available op code 11 to select the XOR operation.
(NOTE: you have to construct the solution without using an XOR gate).

Good Luck

1. What happens if an operation creates a number that can not be represented in a

specified format? (One word)

Overflow or underflow or exception (accept any one of the 3)

2. Below is a circuit that adds two 4-bit twos-complement numbers, A and B to

produce a 4-bit twos complement result S. To the circuit below, add the
additional circuitry to detect overflow and label the output OVF.

B0 A3 B2 A2 B1 A1 B0 A0

C4 C3 C3 C2 C2 C1 C1 C0

S0 S0 S0 S0

Question 4
Suppose that you have already written a MIPS function with the following

int sum(int A[], int first, int last).

This function calculates the sum of the elements of A starting with element first and
ending with element last. Write a fragment of MIPS assembly language which calls
this function and uses it to calculate the average of all values in A. You may assume
that the size of the array A is N.

la $a0, A # First parameter is address of array element 0
lw $a1, $zero # Second parameter: index of elem at low end of range
lw $a2, N # Third parameter: index of last elem to sum
addi $a2, $a2, -1 # N was size: index of last element is N-1
jal sum # Call the sum function
move $t0, $v0 # Save the return value in $t0
lw $t1, N # Load size of array into $t1
div $t2, $t0, $t1 # This form of div is provided as a pseudoinstruction.
Question Twelve
assume that the contents of registers and memory is as indicated below. You should tell
all the changes to registers and memory caused by the given instruction. For instance, an
answer might be, "After the instruction is executed, register 6 will contain 25, and
memory locations 44 to 47 contain 20.

Treat each question separtately, that is, the memory and registers always start as shown

Registers (This shows the contents of the first 8 registers. The values are expressed in

0 8 28 16 44 36 20 20
Reg 0 Reg 1 Reg 2 Reg 3 Reg 4 Reg 5 Reg 6 Reg 7

Memory (This shows the contents of the first 64 Bytes of main memory, where each 4-
Byte word is shown as a decimal number.)

20 16 12 8 4 0 24 32
Bytes 0 to 3 4 to 7 8 to 11 12 to 15 16 to 19 20 to 23 24 to 27 28 to 31

3148 24 0 4 44 17 16 12
Bytes 32 to 35 36 to 39 40 to 43 44 to 47 48 to 51 52 to 55 56 to 59 60 to 63
1. For the MIPS assembly instruction sw $4,8($2),
(a) Write the machine instruction in binary (yes, I want you to write out 32 0's and
1's.) The charts inside the back cover of the textbook should help. Please note that
the order of the operands in assembly code is different from the order in machine
(b) Tell how registers and/or memory would be changed.
2. For the MIPS instruction add $2,$0,$1,
(a) Write the instruction in binary, and
(b) Tell how registers and/or memory would be changed.

3. For the MIPS instruction addi $6,$5,-4,

(a) Write the instruction in binary, and
(b) Tell how registers and/or memory would be changed.

Briefly discuss the difference between Big Endian and Little Endian

1. Why is this 16-bit limitation needed (based on the instruction format)

With 32 bits total in the instruction format, there is no more than 16 bits of space for a constant.

2. Why are the operands for arithmetic instructions sign-extended, but not so those for logical

Convenience the range -32K to 32K is more versatile than 0 to 64K this eliminates the need
for a subi instruction.

3. The pseudoinstruction la rd, imm (load address) is assembled into a lui (load upper
immediate) instruction followed by an ori (or immediate) instruction.

4. Why are two instructions necessary

Address constants are usually larger than 16 bits, so you need to load a 32-bit constant.

5. Why does the lui instruction precede the ori instruction?

You want to set both halves of the word, and lui zeroes the lower half, thus undoing your work.
Ori lets the top half of the word alone, so you can set first top, then bottom.

6. Why cant an addi be used in place of the ori?

addi causes sign extension, and give the wrong result if its argument is negative.

7. Assume a move rs, imm pseudoinstruction exists. It is similar but not identical to the la
instruction. Explain the difference between it and the la.

la load effective address loads an address, which the assembler calculates at assemble time (not
run) by looking at its symbol table (determined by the .data segment of the program). The move
or li is the same except it uses the numerical value of the constant rather than the looked-up

Part (a) (2 marks) Suppose in a MIPS processor that $s0contains 0xb000_0000, $s1
0x9a00_0000and that the instruction
is executed. What bit pattern does the instruction leave in $s1? (To get full marks you must show
you obtained your answer.)
Part b. (3 marks) Briefly define the term overflow as it is applied to integer addition. Did
occur in the instruction of part (a)? Show how you decided whether overflow occurred.
Part c. (3 marks) Briefly define the term wraparound as it is applied to integer addition. Did
occur in the instruction of part (a)? Show how you decided whether wraparound occurred.