KURIKULUM ITERA PROGRAM SARJANA

Program Studi Sarjana Teknik Elektro

Jurusan Sains
Institut Teknologi Sumatera

Silabus dan Satuan Acara Pengajaran (SAP)

Kode Matakuliah: Bobot sks: Semester: Unit Penanggung Jawab: Sifat:
EL2103 3 3 Prodi S1 Teknik Elektro Wajib
Sistem Digital
Nama Matakuliah
Digital System

[Uraian ringkas silabus matakuliah dalam Bahasa Indonesia (maksimum 30 kata)]

Silabus Ringkas Fundamentals of digital logic design. Covers combinational and sequential logic circuits, programmable logic devices, hardware
description languages, and computer-aided design (CAD) tools. Laboratory component introduces simulation and synthesis
software and hands-on hardware design

[Uraian lengkap silabus matakuliah dalam Bahasa Indonesia (maksimum 100 kata)]
The following topics will be covered:
1. Digital systems: digital computers and digital systems; binary, octal and hexadecimal number systems; complements;
signed binary numbers; decimal and binary codes; introduction to binary logic
2. Boolean algebra: basic definitions, theorems and properties of Boolean algebra; Boolean functions;standard forms of
Boolean functions; logic operations
3. Simplification of Boolean functions: Karnaugh map method; dont care condition; NAND and NOR
4. implementation; KMAP_MEV; Quine-McCluskey
5. Combinational circuits: analysis and design procedures; adders, subtractors, multilevel NAND/NOR circuits and code
Silabus Lengkap
conversion; transistor switches and practical design considerations
6. MSI and PLD devices: magnitude comparators, decoders, encoders, multiplexers, read-only memory (ROM),
Programmable Logic Array (PLA), and Programmable Array Logic (PAL)
7. Analysis of synchronous sequential circuits: flip-flops; analysis of clocked sequential circuits; statereduction and
assignment
8. Design of sequential circuits: flip-flop excita tion tables, design procedures, counter designs
9. Analysis and design of Asynchronous sequential circuit: fundamental mode; pulse mode; race; hazard; incompletey
specified machine; state assigment; state reduction
10. Registers, counters and memory devices: shift registers, ripple counters, synchronous counters, timing
11. sequences, and Random Access Memory (RAM)
1. Be able to represent and manipulate numbers in the binary two's complement number system, and convert numbers between
different positional number systems. Be able to do negation and addition in the twos complement number system, and detect
overflow.
2. Carry out transformations of Boolean algebra expressions, using the theorems of Boolean algebra and Karnaugh maps. The
student can find the minimal sum-of-products (SOP) and product-of-sums (POS) expressions, and create a corresponding
circuit from AND, OR, NAND, and NOR gates.
3. The student will be able to analyze the functional and electrical behavior of digital CMOS circuits, including noise margins,
Luaran (Outcomes) allowable fan-in/out, and power dissipation. Given an NMOS or CMOS circuit diagram, the student can determine its logic
function, using switch models for the transistors. The student can map simple functions onto programmable logic devices
manually.
4. The student can analyze and design digital systems of moderate complexity using contemporary technology methods,
including programmable logic devices and CAD tools. The student can use standard combinational and sequential digital
building blocks including adders, multiplexers, decoders, encoders, and registers.
5. The student can analyze and design both synchronous and asynchronous state machines.
6. The student will be able to write proper lab reports, communicating their objectives, approach, observations, and conclusions
EL1200R Introduction to Circuit Analysis Prasyarat
Matakuliah Terkait EL2106 Struktur Diskrit Bersamaan
EL2104 Digital System Laboratory Bersamaan
Kegiatan Penunjang [Praktikum, kerja lapangan, dsb.]
S. Brown and Z. Vranesic: Fundamentals of Digital Logic and VHDL Design, 3rd Edition McGraw-Hill, 2009
Donald D. Givone, Digital Principles and Design, McGraw-Hill, 2002
Pustaka J. M. Yarborough, Digital Logic Application and Design, West Publishing Co, St. Paul, 1997
V. P. Nelson, H. T. Nagle, B. D. Carroll, and D. Irwin, Digital Logic Circuit Analysis and Design, Prentice Hall, Englewood
Cliffs, 1995
Panduan Penilaian [Termasuk jenis dan bentuk penilaian]

Catatan Tambahan
Mg# Topik Sub Topik Capaian Belajar Mahasiswa Sumber Materi
Introduction 1. Identify some contributors to
digital logic and relate their
achievements to the knowledge
area.
2. Explain why Boolen logic is
important to this subject. (S. Brown and Z. Vranesic)
1
3. Articulate why gates are the Chapter 1
fundamental elements of a
digital system.
4. Describe how electrical
engineering uses or benefits
from digital logic.
Boolean Algebra + Logic 1. Derive and manipulate
Circuit switching functions that form
the basis of digital circuits.
2. Apply digital system design
principles and techniques.
3. Model and simulate a digital
system using schematic
diagrams. (S. Brown and Z. Vranesic)
4. Model and simulate a digital Chapter 2
system using a hardware
description language, such as
VHDL or Verilog.
5. Understand timing issues in
digital systems and know how
to study these via digital circuit
simulation.
Boolean Algebra + Logic 1. Derive and manipulate
Circuit switching functions that form
the basis of digital circuits.
2. Apply digital system design
principles and techniques.
3. Model and simulate a digital
system using schematic
diagrams. (S. Brown and Z. Vranesic)
2
4. Model and simulate a digital Chapter 2
system using a hardware
description language, such as
VHDL or Verilog.
5. Understand timing issues in
digital systems and know how
to study these via digital circuit
simulation.
Implementation 1. Realize switching functions with
Technology networks of logic gates.
2. Explain and apply fundamental
characteristics of relevant
electronic technologies, such as
propagation delay, fan-in, fan- (S. Brown and Z. Vranesic)
out, and power dissipation and Chapter 3
noise margin.
3. Utilize programmable devices
such as FPGAs and PLDs to
implement digital system
designs.
Implementation 1. Realize switching functions with
Technology networks of logic gates.
2. Explain and apply fundamental
characteristics of relevant
electronic technologies, such as
propagation delay, fan-in, fan- (S. Brown and Z. Vranesic)
3
out, and power dissipation and Chapter 3
noise margin.
3. Utilize programmable devices
such as FPGAs and PLDs to
implement digital system
designs.
Optimized 1. Derive and manipulate
Implementation of Logic switching functions that form
Functions - KMAP the basis of digital circuits. (S. Brown and Z. Vranesic)
2. Reduce switching functions to Chapter 4
simplify circuits used to realize
them.
4 Optimized 1. Derive and manipulate (S. Brown and Z. Vranesic)
 Implementation of Logic switching functions that form Chapter 4
Functions - KMAP the basis of digital circuits.
2. Reduce switching functions to
simplify circuits used to realize
them.
Optimized 1. Derive and manipulate
Implementation of Logic switching functions that form
Functions - MEV the basis of digital circuits. (S. Brown and Z. Vranesic)
2. Reduce switching functions to Chapter 4
simplify circuits used to realize
them.
Optimized 1. Derive and manipulate
Implementation of Logic switching functions that form
Functions - MEV the basis of digital circuits. (S. Brown and Z. Vranesic)
5
2. Reduce switching functions to Chapter 4
simplify circuits used to realize
them.
Optimized 1. Derive and manipulate
Implementation of Logic switching functions that form
Functions - Quine the basis of digital circuits. (S. Brown and Z. Vranesic)
McCluskey 2. Reduce switching functions to Chapter 4
simplify circuits used to realize
them.
Optimized 1. Derive and manipulate
Implementation of Logic switching functions that form
Functions - Quine the basis of digital circuits. (S. Brown and Z. Vranesic)
6
McCluskey 2. Reduce switching functions to Chapter 4
simplify circuits used to realize
them.
Number Representation & 1. Work with binary number (S. Brown and Z. Vranesic)
7
Arithmetic Circuit systems and arithmetic. Chapter 5
Midterm Exam (S. Brown and Z. Vranesic)
8
Chapter 1-4
Combinational Circuit 1. Analyze and explain uses of
Building Blocks small- and medium-scale logic
functions as building blocks.
2. Analyze and design (S. Brown and Z. Vranesic)
combinational logic networks in Chapter 6
a hierarchical, modular
approach, using standard and
custom logic functions.
Combinational Circuit 1. Analyze and explain uses of
Building Blocks small- and medium-scale logic
functions as building blocks.
2. Analyze and design (S. Brown and Z. Vranesic)
9
combinational logic networks in Chapter 6
a hierarchical, modular
approach, using standard and
custom logic functions.
Sequential Circuit 1. Contrast the difference between
Elements a memory element and a
register.
2. Indicate some uses for
sequential logic.
3. Design and describe the
operation of basic memory
elements.
4. Analyze circuits containing (S. Brown and Z. Vranesic)
basic memory elements. Chapter 7
5. Apply the concepts of basic
timing issues, including
clocking, timing constrains, and
propagation delays during the
design process.
6. Analyze and design functional
building blocks and timing
concepts of digital systems.
Sequential Circuit 1. Contrast the difference between
Elements a memory element and a
register.
2. Indicate some uses for
sequential logic.
(S. Brown and Z. Vranesic)
10 3. Design and describe the
operation of basic memory Chapter 7
elements.
4. Analyze circuits containing
basic memory elements.
5. Apply the concepts of basic
 timing issues, including
clocking, timing constrains, and
propagation delays during the
design process.
6. Analyze and design functional
building blocks and timing
concepts of digital systems.
Synchronous State 7. Analyze the behaviour of
Machine synchronous machines.
8. Design synchronous sequential
(S. Brown and Z. Vranesic)
machines.
9. Reduce the number of states to Chapter 8
simplify circuits used to realize
them.
Synchronous State 1. Analyze the behaviour of
Machine synchronous machines.
2. Design synchronous sequential
(S. Brown and Z. Vranesic)
11 machines.
3. Reduce the number of states to Chapter 8
simplify circuits used to realize
them.
Synchronous State 1. Analyze the behaviour of
Machine synchronous machines.
2. Design synchronous sequential
(S. Brown and Z. Vranesic)
12 machines.
3. Reduce the number of states to Chapter 8
simplify circuits used to realize
them.
Asynchronous State 1. Analyze the behaviour of
Machine asynchronous machines.
2. Design asynchronous sequential
machines.
3. Reduce the number of states to
(S. Brown and Z. Vranesic)
13 simplify circuits used to realize
them. Chapter 9
4. Apply state assignment to
eliminate race.
5. Apply hazard elimination
technique.
Asynchronous State 1. Analyze the behaviour of
Machine asynchronous machines.
2. Design asynchronous sequential
machines.
3. Reduce the number of states to
(S. Brown and Z. Vranesic)
14 simplify circuits used to realize
them. Chapter 9
4. Apply state assignment to
eliminate race.
5. Apply hazard elimination
technique.
Asynchronous State 1. Analyze the behaviour of
Machine asynchronous machines.
2. Design asynchronous sequential
machines.
3. Reduce the number of states to
(S. Brown and Z. Vranesic)
15 simplify circuits used to realize
them. Chapter 9
4. Apply state assignment to
eliminate race.
5. Apply hazard elimination
technique.
Final Exam All