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LCD TV
SERVICE MANUAL
CHASSIS : LC12C

MODEL : 32LW5500 32LW5500-CA

42LW5500 42LW5500-CA
47LW5500 47LW5500-CA

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67002332 (1109-REV00) Printed in China

 CONTENTS

CONTENTS ..............................................................................................1

SAFETY PRECAUTIONS .........................................................................2

SPECIFICATION .......................................................................................5

ADJUSTMENT INSTRUCTION .............................................................. 8

EXPLODED VIEW ..................................................................................28

SVC. SHEET ...............................................................................................

Copyright C 2011 LG Electronics.Inc.All right reserved. -1- LGE Internal Use Only
Only for training and service purposes
 SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)

An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1W), keep the resistor 10mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
AC Volt-meter

always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical Good Earth Ground
shock. such as WATER PIPE,
To Instruments CONDUIT etc.
0.15uF
Leakage Current Cold Check(Antenna Cold Check) exposed
METALLIC PARTS
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC 1.5 Kohm/10W
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1M and 5.2M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright C 2011 LG Electronics.Inc.All right reserved. -2- LGE Internal Use Only
Only for training and service purposes
 SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.
2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10% (by volume) Acetone and 90% (by
volume) isopropyl alcohol (90%-99% strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
Copyright C 2011 LG Electronics.Inc.All right reserved.
Only for training and service purposes
unit under test.
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500F to 600F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
bristle (0.5 inch, or 1.25cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500F to 600F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500F to 600F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
-3- LGE Internal Use Only
 IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as
possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Copyright C 2011 LG Electronics.Inc.All right reserved. -4-
Only for training and service purposes
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
LGE Internal Use Only
 SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range
This specification is applied to the LCD TV used LC12C chassis.

2. Requirement for Test

Each part is tested as below without special appointment.
1) Temperature: 25 C 5 C(77 F 9 F), CST: 40 C 5 C
2) Relative Humidity : 65 % 10 %
3) Power Voltage: Standard input voltage (AC 100-240 V~ 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
BOM.
5) The receiver must be operated for about 5 minutes prior to the adjustment.

3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC :CE, IEC

4. Module General Specification

No. Item Specification Remark
1 Display Screen Device 32,42,47Wide Color Display Module LCD
2 Aspect Ratio 16:9
3 LCD Module LC320EUF-SDF3 32LW5500-CA
LC420EUF-SDF1/ LC420EUF-SDF2 42LW5500-CA
LC470EUF-SDF1/ LC470EUF-SDF2 47LW5500-CA
4 Operating Environment Temp. : 0 deg ~ 50 deg
Humidity : 20 % ~ 90 %
5 Storage Environment Temp. : -20 deg ~ 60 deg
Humidity : 10 ~ 90 %
6 Input Voltage AC 100-240V~, 50 / 60Hz
7 Power Consumption Power on (White)
32LGD Typ : 69.7W
42LGD Typ : 90.5W
47LGD Typ : 90W
8 Outline Dimension 32LGD 698.40(H) x 392.85 (V) x 10.8(B) / 24.0 mm (D)
42LGD 968.4(H) x 564.0(V) x 10.8(B) / 22.9mm(D)
47LGD 1078.6(H) x 626.0(V) x 10.8(B) / 22.9mm (D)
8 Pixel Pitch 32LGD 0.36375 mm x 0.36375 mm x RGB
42LGD 0.4845 mm x 0.4845 mm x RGB
47LGD 0.5415 mm x 0.5415 mm x RGB
9 Back Light Edge LED
10 Color depth 10Bit(D), 1.06 Billion colors
11 Surface treatment Hard coating(2H), Anti-glare treatment of the front
polarizer (Haze 10%)

Copyright C 2011 LG Electronics.Inc.All right reserved. -5- LGE Internal Use Only
Only for training and service purposes
5. Component Video Input (Y, CB/PB, CR/PR)
Specification
No. Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.5 60 HDTV 1080p

6. RGB (PC)
Specification
No. Proposed Remarks
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA Input 848*480 60 Hz, 852*480 60 Hz
-> 640*480 60 Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1280*768 47.78 59.87 79.5 WXGA
6. 1360*768 47.72 59.8 84.75 WXGA
7. 1920*1080 66.587 59.93 138.625 WUXGA FHD model

Copyright C 2011 LG Electronics.Inc.All right reserved. -6- LGE Internal Use Only
Only for training and service purposes
7. HDMI Input
(1) DTV Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 /45 59.94 /60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P

(2) PC Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP
5. 1280*768 47.78 59.87 79.5 WXGA HDCP
6. 1360*768 47.72 59.8 84.75 WXGA HDCP
7. 1280*1024 63.595 60.0 108.875 SXGA HDCP/FHD model
8. 1920*1080 67.5 60.00 138.625 WUXGA HDCP/FHD model

Copyright C 2011 LG Electronics.Inc.All right reserved. -7- LGE Internal Use Only
Only for training and service purposes
 ADJUSTMENT INSTRUCTION

1. Application range
Module Local
Chassis Model Name Remark
type dimming

LC12C 32/42/47LW5500-CA Edge LED O 1 point W/B adjustment

1.1 This spec sheet is applied all of the LCD TV with LC12C chassis.

1.2 Main manufacturing type

SET ( o )
CKD ( o )
SKD ( o )

2. Specification
2.1 Because this is not a hot chassis, it is not necessary to use an isolation transformer.
However, the use of isolation transformer will help protect test instrument.

2.2 Adjustment must be done in the correct order.

2.3 The adjustment must be performed in the circumstance of 25 5 C of temperature and

6510% of relative humidity if there is no specific designation.

2.4 The input voltage of the receiver must keep 100~240V, 50/60Hz.

2.5 At first worker must turn on the SET by using Power Only Key.

2.6 The receiver must be operated for about 5 minutes prior to the adjustment when module
is in the circumstance of over 15

In case of keeping module is in the circumstance of 0C, it should be placed in the

circumstance of above 15C for 2 hours

In case of keeping module is in the circumstance of below -20C, it should be

placed in the circumstance of above 15C for 3 hours,.

Caution) When still image is displayed for a period of 20 minutes or longer (especially where
W/B scale is strong. Digital pattern 13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.

Copyright C 2011 LG Electronics.Inc.All right reserved. -8- LGE Internal Use Only
Only for training and service purposes
3. Adjustment items

3.1 Main PCB check process

MAC Address Download
Adjust 480i Comp1
Adjust 1920*1080p Comp1, RGB
EDID/DDC download

Above adjustment items can be also performed in Final Assembly if needed. Both
Board-level and Final assembly adjustment items can be check using In-Star Menu
1.ADJUST CHECK.

3.2 Final assembly adjustment

White Balance adjustment
RS-232C functionality check
PING Test
Local Dimming Function Check
Factory Option setting per destination
Ship-out mode setting (In-Stop)

3.3 Etc
Ship-out mode
Service Option Default
USB Download(S/W Update, Option, Service only)
ISP Download (Option)

4. Automatic Adjustment

4.1 MAC Address

4.1.1 Equipment & Condition
Play file: Serial.exe
MAC Address edit
Input Start / End MAC address

Copyright C 2011 LG Electronics.Inc.All right reserved. -9- LGE Internal Use Only
Only for training and service purposes
 4.1.2 Download method
4.1.2.1 Communication Port connection

PCBA PC(RS-232C)

RS-232C Port

Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port

4.1.2.2 MAC Address Download

Com 1,2,3,4 and 115200(Baudrate)

Port connection button click(1)

Load button click(2) for MAC Address write.

Start MAC Address write button(3)

Check the OK Or NG
4.2 LAN PORT (Automatic IP)
4.2.1 Equipment & Condition
Each other connection to LAN Port of IP Hub and Jig

Copyright C 2011 LG Electronics.Inc.All right reserved. - 10 - LGE Internal Use Only

Only for training and service purposes
 4.3.1. Equipment setting
1) Play the LAN Port Test PROGRAM.
2) Input IP set up for an inspection to Test
Program.
*IP Number : 12.12.2.2

4.3.2. LAN PORT inspection (PING TEST)

1) Play the LAN Port Test Program.
2) connect each other LAN Port Jack.
3) Play Test (F9) button and confirm OK Message.
4) remove LAN CABLE

4.4 Model name & Serial number Download

4.4.1 Model name & Serial number D/L
Press Power on key of service remocon.(Baud rate : 115200 bps)
Connect RS232 Signal Cable to RS-232 Jack.
Write Serial number by use RS-232.

Must check the serial number at Instart menu.

Copyright C 2011 LG Electronics.Inc.All right reserved. - 11 - LGE Internal Use Only

Only for training and service purposes
 5. Manual Adjustment
5.1 White Balance Adjustment
5.1.1 Overview
W/B adj. Objective & How-it-works
- Objective: To reduce each Panels W/B deviation
- How-it-works: When R/G/B gain in the OSD is at 192, it means the panel is at its Full Dynamic
Range. In order to prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find the desired value.
-Adj. condition : normal temperature
1) Surrounding Temperature: 255
2) Warm-up time: About 5 Min
3) Surrounding Humidity: 20% ~ 80%

5.1.2 Equipment
1) Color Analyzer: CA-210 (LED Module : CH 14)
2) Adj. Computer(During auto adj., RS-232C protocol is needed)
3) Adjust Remocon
4) Video Signal Generator MSPG-925F 720p/216-Gray(Model:217, Pattern:78)
Only when internal pattern is not available
Color Analyzer Matrix should be calibrated using CS-1000

5.1.3 Equipment connection MAP

Color Analyzer
Probe RS-232C

Computer
RS-232C
RS-232C

Pattern Generator
Signal
Source
If TV internal pattern is used, not needed

5.1.4 Adj. Command (Protocol)

<Command Format>
START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS A
STOP

Copyright C 2011 LG Electronics.Inc.All right reserved. - 12 - LGE Internal Use Only

Only for training and service purposes
- LEN: Number of Data Byte to be sent
- CMD: Command
- VAL: FOS Data value
- CS: Checksum of sent data
- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]

RS-232C Command used during auto-adj.

RS-232C COMMAND Explanation
[CMD ID DATA]
wb 00 00 Begin White Balance adj.
wb 00 10 Gain adj.(internal white pattern)
wb 00 1f Gain adj. completed
wb 00 20 Offset adj.(internal white pattern)
wb 00 2f Offset adj. completed
wb 00 ff End White Balance adj.
(internal pattern disappears )
Ex) wb 00 00 -> Begin white balance auto-adj.
wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f -> Gain adj. complete
*(wb 00 20(start), wb 00 2f(endc)) -> Off-set adj.
wb 00 ff ->End white balance auto adj.

Copyright C 2011 LG Electronics.Inc.All right reserved. - 13 - LGE Internal Use Only

Only for training and service purposes
 Adj. Map
Adj. item Command Data Range Default Details
(lower caseASCII) (Hex.) (Decimal)
CMD1 CMD2 MIN MAX
Cool R Gain j g 00 C0 TBD
G Gain j h 00 C0 TBD
B Gain j i 00 C0 TBD
R Cut TBD
G Cut TBD
B Cut TBD
Medium R Gain j a 00 C0 TBD
G Gain j b 00 C0 TBD
B Gain j c 00 C0 TBD
R Cut TBD
G Cut TBD
B Cut TBD
Warm R Gain j d 00 C0 TBD
G Gain j e 00 C0 TBD
B Gain j f 00 C0 TBD
R Cut TBD
G Cut TBD

5.1.5 Adj. method

5.1.5.1 Auto adj. method

1) Set TV in adj. mode using ADJ key
2) Zero calibrate probe then place it on the center of the Display
3) Connect Cable(RS-232C)
4) Select mode in adj. Program and begin adj.
5) When adj. is complete (OK Sing), check adj. status pre mode
(Warm, Medium, Cool)
6) Remove probe and RS-232C cable to complete adj.

W/B Adj. must begin as start command wb 00 00 , and finish as end command wb 00 ff,
and Adj. offset if need

Copyright C 2011 LG Electronics.Inc.All right reserved. - 14 - LGE Internal Use Only

Only for training and service purposes
 5.1.5.2 Manual adj. method
1) Set TV in Adj. mode using ADJ key
2) Zero Calibrate the probe of Color Analyzer, then place it on the center of LCD module within
10cm of the surface..
3) Press ADJ key EZ adjust using adj. R/C 7. White-Balance then press the cursor to the
right (KEY ).
(When KEY( ) is pressed 216 Gray internal pattern will be displayed)
4) One of R Gain / G Gain / B Gain should be fixed at 192, and the rest will be lowered to meet
the desired value.
5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of color temperature.

If internal pattern is not available, use RF input. In EZ Adj. menu 7.White Balance, you can
select one of 2 Test-pattern: ON, OFF. Default is inner(ON). By selecting OFF, you can
adjust using RF signal in 216 Gray pattern.

Adj. condition and cautionary items

1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to isolate adj. area into dark surrounding.
2) Probe location
- PDP: Color Analyzer (CA-100, CA-100+, CA210) probe should be firmly attached to the
Module

- LCD: Color Analyzer (CA-210) probe should be within 10cm and perpendicular of the
module surface (80~ 100)
3) Aging time
- After Aging Start, Keep the Power ON status during 5 Minutes.
- In case of LCD, Back-light on should be checked using no signal or Full-white pattern.

5.1.6 Reference (White Balance Adj. coordinate and color temperature)

Luminance: 216 Gray
Standard color coordinate and temperature using CS-1000 (over 26 inch)
Coordinate
Mode Temp uv
x y
Cool 0.269 0.273 13000K 0.0000
Medium 0.285 0.293 9300K 0.0000
Warm 0.313 0.329 6500K 0.0000
Standard color coordinate and temperature using CA-210(CH 14)

Coordinate
Mode Temp uv
x y
Cool 0.2690.002 0.2730.002 13000K 0.0000
Medium 0.2850.002 0.2930.002 9300K 0.0000
Warm 0.3130.002 0.3290.002 6500K 0.0000

Copyright C 2011 LG Electronics.Inc.All right reserved. - 15 - LGE Internal Use Only

Only for training and service purposes
 1) Edge LED Models : LV5500/LV4500/LW6500/LW5500/LV2500
Aging time Cool Medium Warm
GP3 (Min) x y x y x y
269 273 285 293 313 329
1 0-2 279 288 295 308 319 338
2 3-5 278 286 294 306 318 336
3 6-9 277 285 293 305 317 335
4 10-19 276 283 292 303 316 333
5 20-35 274 280 290 300 314 330
6 36-49 272 277 288 297 312 327
7 50-79 271 275 287 295 311 325
8 80-149 270 274 286 294 310 324
9 Over 150 269 273 285 293 309 323

5.1.7 Local Dimming Inspection (Optional)

Edge LED models with local dimming
1) Press TILT key of the Adj. R/C and check moving patterns. The black bar patterns moves from
bottom to top.
If local dimming function does not work, a whole screen shows full white.

5.2 EYE-Q function check

Step 1) Turn on TV
Step 2) Press EYE key of Adj. R/C
Step 3) Cover the Eye Q II sensor on the front of the using your hand and wait for 6 seconds
Step 4) Confirm that R/G/B value is lower than 10 of the Raw Data (Sensor data, Back light ) . If after
6 seconds, R/G/B value is not lower than 10, replace Eye Q II sensor
Step 5) Remove your hand from the Eye Q II sensor and wait for 6 seconds
Step 6) Confirm that ok pop up.
If change is not seen, replace Eye Q II sensor

Copyright C 2011 LG Electronics.Inc.All right reserved. - 16 - LGE Internal Use Only

Only for training and service purposes
 5.3 Option selection per country

5.3.1 Overview
Option selection is only done for models in Non-USA North America due to rating
Applied model: LC12C Chassis applied None USA model (CHINA ,HONGKONG)

5.3.2 Method
1) Press ADJ key on the Adj. R/C, then select Country Group Menu(TBD)
2) Depending on destination, select KR or US, then on the lower Country option, select US,
CA, MX. Selection is done using +, - KEY(TBD)

5.4 Tool Option selection

Method: Press Adj. key on the Adj. R/C, then select Tool option.

Model Tool 1 Tool 2 Tool 3 Tool 4 Tool 5 Tool 6

42LW6500-CA(HK) 33030 5461 3327 17577 47701 729
47LW6500-CA(HK) 33032 5461 3327 17577 47701 729
55LW6500-CA(HK) 33035 5461 3327 17577 47701 729
47LW6500-CA(CN) 33032 5461 3263 17569 48721 729
55LW6500-CA(CN) 33035 5461 3263 17569 48721 729

Model Tool 1 Tool 2 Tool 3 Tool 4 Tool 5 Tool 6

42LW5500-CA(CN) 33014 5461 3263 17569 15953 729
47LW5500-CA(CN) 33016 5461 3263 17569 15953 729
55LW5500-CA(CN) 33019 5461 3263 17569 15953 729
32LW5500-CA(HK) 33012 5461 3327 17577 14933 729
42LW5500-CA(HK) 33014 5461 3327 17577 14933 729
47LW5500-CA(HK) 33016 5461 3327 17577 14933 729
55LW5500-CA(HK) 33019 5461 3327 17577 14933 729

6. GND and Internal Pressure check

6.1 Method
1) GND & Internal Pressure auto-check preparation
- Check that Power Cord is fully inserted to the SET.
(If loose, re-insert)

Copyright C 2011 LG Electronics.Inc.All right reserved. - 17 - LGE Internal Use Only

Only for training and service purposes
 2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.

- If OK, Good lamp will lit up and the stopper will allow the pallet to move on to next process.

6.2 Checkpoint
TEST voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
TEST time: 1 second
TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLE METAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE & NEUTRAL
LEAKAGE CURRENT: At 0.5mArms

7. Audio

No Item Min Typ Max Unit Remark

1.
Audio practical max 9.0 10.0 12.0 W
EQ Off
Output, L/R
AVL Off
(Distortion=10%
8.5 8.9 9.8 Vrm
Clear Voice
max Output)
s
Off

2.
Speaker (8 10.0 15.0 W EQ On
Impedance) AVL On
Clear Voice
On

Copyright C 2011 LG Electronics.Inc.All right reserved. - 17 - LGE Internal Use Only

Only for training and service purposes
 Measurement condition:
1. RF input: Mono, 1KHz sine wave signal, 100% Modulation
2. CVBS, Component: 1KHz sine wave signal 0.5Vrms
3. RGB PC: 1KHz sine wave signal 0.7Vrms

-----<<<8. Magic Romocon Test

- Equipment: RF-Remote Controller for Test, IR-KEY-CODE Remote Controller for Test.

- should have enough Battery Power of RF-Remote Controller before test.

(Recommend: changing new Battery for each LOT.)

- Test Method

a) Push Mute (Start Key) on the controller to pair the TV SET.

b) Push OK Key on the controller, check whether the cursor appears on the screen.

c) Push Vol+(STOP) on the controller, cancel the paring.

>>>>>----
9. 3D Function test
(Pattern Generator MSHG-600 or MSPG-6100 HDMI 1.4 Supported Equipment
, HDMI mode No. 872 , pattern No. 83)
1) Input 3D test pattern.
(HDMI mode No. 872, Pattern No. 83)

2) After automatically display 3D OSD, push the OK Key.

3) Check the pattern such as in the following Fig2 without having to wear glasses.

Copyright C 2011 LG Electronics.Inc.All right reserved. - 19 - LGE Internal Use Only

Only for training and service purposes
 9. Ship-out mode check (In-stop) (Not Fixed)
After final inspection, press In-Stop key of the Adj. R/C and check that the unit goes to Stand-
by mode.

10. Ship-out condition

No Item Condition Remark

1
Channel Auto Tuning Quick

Manual Tuning DTV

Programe Edit DTV

Cable DTV Setting

2
Picture Aspect Ratio 16:9

Picture Wizard

Energy saving Off

Picture Mode Vivid

Backlight 100

Contrast 95

Brightness 50

Sharpness 70

Color 70

Tint 0

Colour Temp C50

Advanced Control Dynamic Contrast High

Dynamic Colour High

Clear White High

Skin Colour 0

Noise Reduction Medium

Digital Noise Reduction Medium

Gamma Medium

Black Level Auto

Eye Care Low

Real Cinema On

Color Gamut Wide

Copyright C 2011 LG Electronics.Inc.All right reserved. - 20 - LGE Internal Use Only

Only for training and service purposes
 No Item Condition Remark

xvYCC Off

Picture Reset

TrueMotion Low

Screen Resolution Differ according

to resolution.

Auto Config

Position

Size Vary with the

result from doing

Auto Config

Phase Vary with the

result from doing

Auto Config

Reset

LED Local On

Dimming
3 Off
Audio Auto Volume Auto

Volume

Clear Voice II Off Clear

Voice

Balance 0 Balance

Sound Mode Standard Sound

Infinite Sound(Off) Mode

Treble 50

Bass 50

Reset

Digital Audio Out PCM

TV Speaker On

DTV Audio Setting Auto

4
Time Clock Manual

Copyright C 2011 LG Electronics.Inc.All right reserved. - 21 - LGE Internal Use Only

Only for training and service purposes
 11. USB S/W Download (option, Service only)
1. Put the USB Stick to the USB socket
2. Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is Low, it didnt work.
But your downloaded version is High, USB data is automatically detecting
3. Show the message Copying files from memory

4. Updating is staring.

5. Updating Completed, The TV will restart automatically

6. If your TV is turned on, check your updated version and Tool option. (explain the Tool
option, next stage)
* If downloading version is more high than your TV have, TV can lost all channel data. In

this case, you have to channel recover. if all channel data is cleared, you didnt have
a DTV/ATV test on production line.

* After downloading, have to adjust TOOL OPTION again.

1. Push "IN-START" key in service remote controller.

2. Select "Tool Option 1" and Push OK button.

3. Punch in the number. (Each model has their number.)

Copyright C 2011 LG Electronics.Inc.All right reserved. - 22 - LGE Internal Use Only

Only for training and service purposes
 12. Preset CH Information
If you turn on TV by pushing the POWER ON or P-ONLY key, TV catch the channel 10
DTV, 1 CADTV, 12 ATV and
2 CATV channels on line condition. Pr.2~4 of CADTV will be updated after changing
channel to CADTV channel 1.
DTV Ch name is displayed below initially, but if you do channel tuning just one time,
you can see DTV Ch name.
Total = 25(+3) Channels
DTV : MUX No. in ( ) is used for Hong Kong DTV.

MUX Pr. Name CH information Factory

1(82) J2 SD 16 : 9 576i P/T
15 (23) 2(83) Interactive Information SD 16 : 9 576i P/T
3(85) High Definition Jade HD 16 : 9 1080i P/T
P/T
4(900) CCTV-1 SD 4:3 576i
LGEND
P/T
5(901) CCTV-2 SD 4:3 576i
LGEND
P/T
6(902) CCTV- SD 4:3 576i
LGEND
16 (24)
P/T
7(903) CCTV- SD 4:3 576i
LGEND
P/T
8(904) BTV-1 SD 4:3 576i
LGEND
P/T
9(905) CETV-3 SD 4:3 576i
LGEND
10(906 P/T
20 (28) CCTV HD 16 : 9 1080i
) LGEND

CADTV : MUX No. in ( ) is used for Hong Kong DTV.

MUX Pr. Name CH information Factory

1 CCTV-4 SD 4:3 576i LGEND
2 CCTV-9 SD 4:3 576i LGEND
55 (63)
3 CCTV F SD 4:3 576i LGEND
4 CCTV E SD 4:3 576i LGEND

Copyright C 2011 LG Electronics.Inc.All right reserved. - 23 - LGE Internal Use Only

Only for training and service purposes
 (Pr.2~4 of CADTV will be updated automatically after changing channel to Pr.1)
ATV

Pr System Band Name CH Freq. Factory

1 NTSC M V/UHF US-04 C 04 67.25 P/T LGEND
2 NTSC M CABLE J-01 S 67 91.25 P/T LGEND
3 NTSC M V/UHF US-13 C 13 211.25 P/T LGEND
4 NTSC M Cable US-14 C 14 471.25 P/T LGEND
5 NTSC M V/UHF US-63 C 63 765.25 P/T LGEND
6 NTSC M CABLE - S 15 127.25 LGEND
7 PAL DK V/UHF D-10 C 10 200.25 P/T LGEND
8 PAL DK V/UHF D-36 C 36 695.25 P/T LGEND
9 C34
10 PAL I V/UHF I-11 C 11 231.25 P/T
11 PAL I V/UHF I-41 C 41 631.25 P/T
12 S39 807.25

CATV

Pr System Band Name CH Freq. Factory

1 PAL DK V/UHF - C 02 57.75 LGEND

Copyright C 2011 LG Electronics.Inc.All right reserved. - 24 - LGE Internal Use Only

Only for training and service purposes
 HDMI1 In
HDMI_ARC

D0/1/2+/-, HDMI_HPD_1,CK+/-_HDMI1
DDC_SCL1/SDA1
(JK703)
HDMI2 In
HDMI_RX0+/-, D0/1/2+/-, HDMI_HPD_2,CK+/-_HDMI1

Only for training and service purposes

CN: TDFR-C056D,TU2202
C056D,TU2202
TDFR-C056D,TU2202
CN:TDFR-
Tuner RX1+/-,RX2+/-,CLK+/- DDC_SCL2/SDA2
(refer to page 3)
IC701 (JK701)
HK: TDFR-C256D,TU2202
C256D,TU2202
TDFR-C256D,TU2202
HK:TDFR- HDMI
SWITCH HDMI3 In
HDMI_SCL/SDA D0/1/2+/-, HDMI_HPD_3,CK+/-_HDMI1
SII9287B
EEPROM
EEPROM DSUB_H/V SYNC DDC_SCL3/SDA3
(JK702)
(( IC801)
IC801)

Copyright C 2011 LG Electronics.Inc.All right reserved.

DSUB_R/G/B+, DSUB_DET, D0/1/2+/-, HDMI_HPD_4,CK+/-_HDMI1 HDMI4 In
RGB In DDC_SCL4/SDA4
(JK804) RGB_DDC_SCL/SDA
(JK704)
NEC_
NEC_Micom
Micom EEPROM _SCL/SDA
PC (JK801) PC _R/L _IN EEPROM
EEPROM
Audio EEPROM
EEPROM UPD78F0514
UPD78F0514 (( IC601)
IC601)
(( IC802)
IC802) High
High Chassis
Chassis IC602
IC602 RS232C
RS232C IC
IC

- 25 -
AP2191D
AP2191 DSG
AP2191DSG WIFI_DM/DP BCM35230
BCM35230 NEC_TXD/RXD
USB MAX3232CDR
MAX3232CDR RS232C (JK805)
(IC5501
(IC 5501))
(IC5501) SIDE_USB_OCD2 NEC_ISP_TX/RX
(Side) (IC101
(IC10 1)
(IC101) BCM_RX/TX IC803
IC803
AP2191D
AP2191 DSG
AP2191DSG SIDE_USB_DM/DP
(JK5501/2) (IC5502
(IC 5502))
(IC5502) SIDE_USB_OCD1
Wireless_DET,Wireless_PWR_EN
SPDIF JK802 SPDIF_OUT Wireless _SCL/SDA
Wireless (JK1001)
AV2_CBVS_IN, AV2_CVBS_DET ; AV2_L/R_IN (SCL2/SDA2_3.3V)
CVBS JK1104
AV1_CBVS_IN, AV1_CVBS_DET ,AV1_L/R_IN
CVBS GenderJK1102

COMP1_Y/Pb/Pr, COMP1_DET
Comp GenderJK1101
SC/COMP2_R/L_IN, SC_DET/COMP2_DET M_RF Module_ reset
Comp JK1105
SC/R_CIMP2_Pr,SC/B_COMP2_Pb,SC/G_COMP2_Y M_Remote_RX / TX
EPHY_RDN/RDP P1302
ETHERNET DC/DD_MREMOTE,3D_GPIO_0/1/2,3D_SYNC_RF
Block diagram for W5500 M/B_Input

LAN M_ Remocon
(JK1401)
EPHY_ACTIVITY / LINK, EPHY_TDP/TDP

LGE Internal Use Only

 Debugger NEC_ISP_TX/RX,OCD1A/B,FLMD0,MINCOM_RESET
Debugger
P601
P601
SPI_DO/CS/SCLK/DI SPI
SPI FLASH
FLASH
(( IC5202,2M)
IC5202,2M)

Only for training and service purposes

FRC_RESET

LVDS_TXA/B [0-4] N/P, LED

LED Driving
Driving B/D
B/D
Power
Power B/D
B/D INV_CTL,RL_ON
TXA/B/C/D [0-4] N/P, LGE7303C LVDS_TXA/B CLKN/CLKP P3501(51PIN)
P502 LGE7303C P3501(51PIN)
P502 TXA/B/C/D CLKN/CLKP
IC5201
IC5201 LED
KEY1/2 ,IR LVDS_TXC/D [0-4] N/P, LED Driving
Driving B/D
B/D
LVDS_TXC/D CLKN/CLKP P3502(41PIN)

Copyright C 2011 LG Electronics.Inc.All right reserved.

IR LED_R/Buzz SOC_ Reset P3502(41PIN)
IR && KEY
KEY NEC_Micom
NEC_Micom
P901
P901 IC602
IC602
SCL2/SDA2_3.3V FRC_DQU/DQL[0-7] FRC_A[0-13],FRC_BA0/1/2,FRC_MCLK/CLE/MCLKB
LED_B/LG LOGO (DDR3_DQU/DQL[0-7]) DDR3_A[0-13],DDR3_BA0/1/2,DDR3_MCLK

DDR3
DDR3
S/T_SCL/SDA High (( IC5301)
High Chassis
Chassis IC5301)

- 26 -
EEPROM_SCL/SDA BCM35230
BCM35230
EEPROM
EEPROM
(IC601)
(IC601) (IC101
(IC10 1)
(IC101)
HP_L/R_OUT_N/P Earphone
Earphone AMP
AMP
DDR_AADDR01/23_CLK/CLKb, HP_L/ROUT
IC804
IC804 HP JK803
DDR
DDR
(( IC401,IC402)
IC401,IC402) DDR_DQ[0-7]/[8-15]/[16-23]/[24-31]
SCL1/SDA1_3.3V
Woofer
Woofer
AUD_LRCH/LRCK/SCK, AMP_Mute SPK_Woofer +/- Woofer
Woofer
NVRAM
NVRAM SDA/SCL1_3.3V NTP-
NTP-7400L
NTP-7400L
AUD_MASTER_CLK P1802
P1802
1M,
1M, IC103
((1M, IC10 3)
IC103) IC1801
IC1801

NAND _ WEb/ALE/CLE
NAND
NAND FLASH
FLASH
NAND_DATA[0-7] SCL1/SDA1_3.3V SPK_L+/-
Audio PWM
8Gbit,
bit, IC102
((8Gbit, IC10 2)
IC102) Audio AMP
AMP Speaker
AUD_LRCH/LRCK/SCK, AMP_Mute LPF SPK_R+/-
NTP-
NTP-7400L
NTP-7400L P1801
AUD_MASTER_CLK
IC1802
IC1802
Block diagram for LW5500 M/B_Output

LGE Internal Use Only

Only for training and service purposes
TU_CVBS/SIF,

S2_ Reset,IF_AGC_MAIN,TU_RESET,RF_SWITCH/BOOSTER_CTL
High Chassis

SCL0/SDA0_3.3V (for ATV)

Copyright C 2011 LG Electronics.Inc.All right reserved.

FE_TS_DATA[0-7],IF_P/N_MAIN

CI_DATA[0-7] IC1903
IC1903 NAND_DATA[0-7]
TDFR-
TDFR-C056D
TDFR-C056D High
High Chassis
Chassis
buffer
buffer
__

- 27 -
CI_ADDR[2-14] BCM35230
BCM35230
TU2202
TU2202
(H/NIM
(H/NIM for
forCN)
CN) (IC101
(IC10 1)
TU_TS_SYNC,TU_TS_CLK,TU_TS_VAL CI
CISlot
Slot
(IC101)
PCM_ADDR[2/3/4/7/9/
IC1905
IC1905 CI_ADDR[2/3/4/7/9/
P1901
P1901
P1901 11/12/13]
Buffer
11/12/13]
Buffer
Buffer
LNB_OUT IC2301 TS_VAL_ERR
IC2301 IC1904
IC1904
LNB_TX,TU_TS_VAL/ERR /CI_CD1/CD2 CI_DET
(DVB-
(DVB -S, OPT)
(DVB-S, OPT) CI_DET
CI_DET
LNB_INT
SCL3/SDA3_3.3V
Block diagram Tuner(GP3)

LGE Internal Use Only

 EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

710
700
400
521

910
540
LV2

900
530
LV1

810

AG1
A10
200

A5

A21
A2
120
511
300

501
510

Copyright C 2011 LG Electronics.Inc.All right reserved. - 28 - LGE Internal Use Only

Only for training and service purposes
 NAND FLASH MEMORY 8Gbit 16Gbit Boot ROM Device Select - (FA4,FAD7,FAD2,FAD1) Strap Setting
+3.3V_Normal
+3.3V_Normal
+3.3V_Normal 0000: ST Micro M25P or compatible Serial Flash
IC102-*1
TH58DVG4S0ETA20 0010: 8-bit 512Mbit 512B page SLC NAND Flash devices
IC102 0100: 8-bit 128, 256Mbit 512B page SLC NAND Flash devices
TC58DVG3S0ETA00 0110: 8-bit 1Gbit 2KB page SLC NAND Flash devices
R113 R117 R122 R127 R154 R157 R160 R164 R167 R170 R175 R177 R179 R181 R183 R187 R192
10K 10K 10K 10K 1000: 8-bit 2Gbit, 4Gbit, 8Gbit 2KB page SLC NAND Flash devices 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K
NC_1 NC_26 OPT OPT 1010: 8-bit 16Gbit, 32Gbit 4KB page SLC NAND Flash devices (O) OPT OPT OPT OPT OPT OPT OPT OPT OPT OPT
1 DEV_NAND_16Gbit 48 CI_ADDR[4]
NC_1 NC_28 0001: 8-bit 8/16/32Gbit 2KB page MLC NAND Flash devices
1 NAND_8Gbit 48 NC_2 NC_25 NAND_DATA[7] 0011: 8-bit 16/32Gbit 4KB page MLC NAND Flash devices NAND_DATA[0]
2 47
NC_2 NC_27 NAND_DATA[2] 0101: 8-bit 32Gbit 8KB page MLC NAND Flash devices

2.7K
2 47 NC_3 NC_24 CI_ADDR[7]
0111: 3B dual IO Serial Flash
3 46 NAND_DATA[1] 1001: NAND_DATA[6]
NC_3 NC_26 BB dual IO Serial Flash
3 46 NC_4 NC_23 R114 R118 R123 R128 1011: fast Serail Flash > 50Mhz
4 45 10K 10K 10K 10K CI_ADDR[6]
NC_4 NC_25 NAND_DATA[0-7] OPT OPT 1100: OneNAND Flash (always 16-bit)
4 45 NC_5 I/O8 NAND_CLE
R107 1110: Reserved
5 44 NAND_DATA[4]
NC_5 I/O8 1101, 1111: Reserved
5 44 NAND_DATA[7] RY/BY2 I/O7 CI_ADDR[9]
16Gbit 6 43
R149 0 NC_6 I/O7 CI_ADDR[11]
6 43 NAND_DATA[6] RY/BY1 I/O6
7 42 CI_ADDR[12]
RY/BY I/O6
NAND_RBb 7 42 NAND_DATA[5] RE I/O5 CI_ADDR[13]
8 41
RE I/O5 CI_ADDR[8]
NAND_REb 8 41 NAND_DATA[4] CE1 NC_22
CE NC_24
9 40 NAND ECC (FA3, FA2, FALE) NAND_DATA[3]
NAND_CEb 9 40 CE2 PSL NAND_DATA[5]
16Gbit 16Gbit 10 39 +3.3V_Normal
NC_7 PSL 0
NAND_CEb2 R148 0 10 39 R151 NC_6 NC_21 R155 R158 R161 R165 R168 R171 R176 R178 R180 R182 R184 R188 R193
11 38 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K
NC_8 NC_23
C102 11 38 VCC_1 VCC_2 OPT OPT OPT
4700pF 12 37 R111 R115 R119
VCC_1 VCC_2 +3.3V_Normal 10K 10K 10K
12 37 VSS_1 VSS_2 OPT 000 = ECC disabled
C101 13 36 OPT
VSS_1 VSS_2 C104 10uF CI_ADDR[3] 001 = ECC 1-bit repair
0.1uF 13 36 NC_7 NC_20
10V 010 = ECC 4-bit BCH (O)
14 35 CI_ADDR[2]
NC_9 NC_22 011 = ECC 8-bit BCH, 27 byte spare
14 35 C103 NC_8 NC_19 NAND_ALE 100 = ECC 12-bit BCH, 27 byte spare
0.1uF 15 34
NC_10 NC_21 R112 R116 R120 101 = ECC 8-bit BCH, 16 byte spare NAND_DATA[0]:
15 34 CLE NC_18 10K 10K 10K 110, 111 = Reservedd 0: System is LITTLE endian (O) CI_ADDR[9],CI_ADDR[11],CI_ADDR[12],CI_ADDR[13]
16 33 OPT TVM Crystal oscillator bias/gain control
CLE NC_20 1: System is BIG endian
NAND_CLE 16 33 ALE I/O4 0000: 210uA
17 32
ALE I/O4 CI_ADDR[7]: 0001: 390uA
NAND_ALE 17 32 NAND_DATA[3] WE I/O3 0: Disable EDID automatic Downloading from Flash (O) 0010: 570uA
18 31
WE I/O3 1: Enable EDID automatic Downloading from Flash 0011: 730uA
NAND_WEb 18 31 NAND_DATA[2] WP I/O2 0100: 890uA (O)
19 30
WP I/O2 NAND_DATA[6] : 0111: 1290uA
Write Protection +3.3V_Normal 19 30 NAND_DATA[1] NC_9 I/O1 0: Disable OSC clock output on chip Pin (O) 1000: 1416uA
20 29
NC_11 I/O1 1: Enable OSC clock output on chip pin. 1111: 2196uA
- High : Normal Operation 20 29 NAND_DATA[0] NC_10 NC_17 DUAL COMPONENT 0101, 0110, 1001, 1010, 1011, 1100, 1101, 1110: Reserved
R103
4.7K

- Low : Write Protection 21 28

OPT

NC_12 NC_19 CI_ADDR[6]:

21 28 NC_11 NC_16 0: Host MIPS run at 500 MHz (O) CI_ADDR[8]:
NC_13 NC_18
22 27 IC102 1ST : EAN61000101 2ND : T-TH58DVG4S0ETA20 1: Host MIPS run at 250 MHz 0: RESETOUTb (in On/Off only) stay asserted until software releases them.
22 27 NC_12 NC_15 1: Fix amount of delay for de-assertion on RESETOUTb (in On/IOff only)
FLASH_WP 23 26
NC_14 NC_17 NAND_CLE: at end of RESETb pulse (O)
23 26 NC_13
24 25
NC_14 IC102-*1 0: Differential Oscillators TVM not bypassed (O)
NC_15 NC_16 1: Differential Oscillators TVM bypassed NAND_DATA[3]:
24 25 0: MIPS will boot from external flash (O)
NAND_DATA[4]: 1: MIPS will boot from ROM
0: 27MHz TVM Crystal Frequency
1: 54MHz TVM Crystal Frequency (O) NAND_DATA[5]:
0: FLASH MODE (O)
1: BSC_SLAVE(BBS) MODE

BCM_NVM_256K
IC103-*1
+3.3V_Normal
NVRAM AT24C256C-SSHL-T

A0
1 8
VCC

A1 WP
R196 2 7
IC101 10K A2 SCL
LGE35230(BCM35230KFSBG) +3.3V_Normal 3 6

RGB_DDC_SDA GND SDA

4 5

S
B
D
NON_BCM_CAP
B5 AE27 BCM_NVM_1M
HDMI_CLK- HDMI0_CLKN TXOUT0_L0N TXB4P Q101 IC101

4.7K

4.7K
IC103 +3.3V_Normal

OPT
R173

R174
C5 AE28
HDMI_CLK+ HDMI0_CLKP TXOUT0_L0P TXB4N BSS83 G LGE35230(BCM35230KFSBG) M24M01-HRMN6TP
AF27
TXOUT0_L1N TXB3P NAND_DATA[0-7]
A4 AF28
HDMI_RX0- HDMI0_D0N TXOUT0_L1P TXB3N C118 NC VCC
B4 AG27 NON_BCM_CAP 1 8 Write Protection
HDMI_RX0+ HDMI0_D0P TXOUT0_L2N TXBCLKP 0.1uF AG6 AB1 NAND_DATA[7]
AG28 16V 54MHz_XTAL_P TVM_XTALIN FAD_7 R169
TXOUT0_L2P TXBCLKN AB3 NAND_DATA[6] 0 E1 WP - Low : Normal Operation
+3.3V_Normal A3 AE26 FAD_6 2 7
HDMI_RX1- HDMI0_D1N TXCLK_LN TXB2P AF6 AC1 NAND_DATA[5] A8h - High : Write Protection
B3 AF26 54MHz_XTAL_N TVM_XTALOUT FAD_5
HDMI_RX1+ HDMI0_D1P TXCLK_LP TXB2N AC2 NAND_DATA[4] E2 SCL
AH27 +3.3V_Normal FAD_4 3 6 R190 33
TXB1P AC3 SCL3_3.3V
TXOUT0_L3N

4.7K
NAND_DATA[3]

OPT
R172
A2 AG26 FAD_3
R101 R105 R104 R195 HDMI_RX2- HDMI0_D2N TXOUT0_L3P TXB1N V5 AD2 NAND_DATA[2] VSS SDA
B2 AF25 LNB_INT IRRXDA FAD_2 4 5 R191 33
4.7K 4.7K 4.7K 4.7K HDMI_RX2+ TXB0P AD3 SDA3_3.3V
HDMI0_D2P TXOUT0_L4N NAND_DATA[1]
AE25 R198 FAD_1
TXOUT0_L4P TXB0N 10K AE2 NAND_DATA[0]
FAD_0
AB4
W2 FP_IN0
CEC RGB_DDC_SCL Y4
AH26
S
B
D

FP_IN1
TXOUT0_U0N TXA4P AG1
V4 AG25 FALE NAND_ALE
DDC0_SCL TXOUT0_U0P TXA4N Q102 AA4 AF1
W4 AE24 SPARE_ADC1 FCEB_0 NAND_CEb
DDC0_SDA TXOUT0_U1N TXA3P BSS83 Y5 AC5
AD24 SPARE_ADC2 FCEB_1 NAND_CEb2 X101-*2
G

TXOUT0_U1P TXA3N AE6

V3
V2
HDMI0_HTPLG_IN TXOUT0_U2N
AH25
AF24
TXACLKP
TXACLKN
C119 SC_ID
AB2
FS_IN1
FCEB_2
FCEB_3
AG5
/CI_CE1
/CI_CE2
54MHz X-TAL X-TAL_1
1
54MHz
4
GND_2

HDMI0_HTPLG_OUT TXOUT0_U2P 0.1uF AB5 GND_1 X-TAL_2

AE23 16V FS_IN2
TXCLK_UN TXA2P 2 3
D13 AD23 C113
HDMI_ARC HDMI0_ARC TXCLK_UP TXA2N AF3 12pF CRYSTAL_BCM_KDS
E6 AG24 NFWPB FLASH_WP R185 0 EAW58239604
HDMI0_RESREF TXOUT0_U3N TXA1P U3 AG2 54MHz_XTAL_N
AF23 VGA_SDA FWE NAND_WEb DAISHINKU CORPORATION.
TXA1N +3.3V_Normal U2 AE3 50V
R106 TXOUT0_U3P 3 2
AC22 VGA_SCL FRD NAND_REb X-TAL_2 GND_1 X101-*1
3K TXOUT0_U4N TXA0P AA5 R189 54MHz
AD22 FRDYB /PCM_WAIT 4 1 X-TAL_1 GND_2
TXOUT0_U4P TXA0N GND_2 X-TAL_1 1M
1 4
Y2 54MHz OPT
BCM_RX RDA X101 GND_1 X-TAL_2
BBS CONNECT R121 R126 R129 R131 Y1 AF2 R186 0 2 3
CI_ADDR[2-14] 54MHz_XTAL_P
AG23 1.2K 1.2K 1.2K 1.2K BCM_TX TDA FA_0 NAND_CLE C114 CRYSTAL_BCM_Sunny
TXOUT1_L0N TXD4P +3.3V_Normal AE1 12pF CRYSTAL_BCM_Lihom
AH23 P101 FA_1 NAND_RBb EAW58812611 EAW60763703
TXD4N 33 AA3 AC4 50V
TXOUT1_L0P SDA0_3.3V R135 CI_ADDR[2] SUNNY ELECTRONICS CORPORATION LIHOM CO., LTD.
AE22 TJC2508-4A BSCDATAA FA_2
TXOUT1_L1N TXD3P R136 33 AA2 AD5 CI_ADDR[3]
AE21 SCL0_3.3V BSCCLKA FA_3
TXOUT1_L1P TXD3N AD4 CI_ADDR[4]
AF22 FA_4
TXOUT1_L2N TXDCLKP VCC H3 AE4 CI_ADDR[5]
AH22 1 SCL2_3.3V RDB/GPIO FA_5
TXOUT1_L2P TXDCLKN C106 R109 R110 H2 AE5 CI_ADDR[6]
AG22 1.5K 1.5K SDA2_3.3V TDB/GPIO FA_6
TXCLK1_LN TXD2P 4.7uF AD6
AF21 CI_ADDR[7]
SCL R199 22 FA_7
TXCLK1_LP TXD2N 2 H4 AH3 CI_ADDR[8]
AG21 R197 22 BSC_S_SCL FA_8
TXOUT1_L3N TXD1P H5 AF4 CI_ADDR[9]
AF20 BSC_S_SDA FA_9
TXOUT1_L3P TXD1N SDA AH4 CI_ADDR[10]
AD21 3 +3.3V_Normal FA_10
TXOUT1_L4N TXD0P C107 C108 C109 C110 AG4 CI_ADDR[11]
AC21 33pF 33pF 33pF 33pF FA_11
TXOUT1_L4P TXD0N R141 4.7K F25 AF5 CI_ADDR[12]
GND 50V 50V 50V 50V NMIB FA_12
4 DVB_S DVB_S AG3 CI_ADDR[13] +3.3V_Normal
FA_13
W5 AH2 CI_ADDR[14]
AG20 DVB_S Option: apply EU Satellite model PCM_5V_CTL POWER_CTRL FA_14
TXOUT1_U0N TXC4P AH5
AH20 5V_HDMI_1 OPT FA_15
TXOUT1_U0P TXC4N R142 22 U5 R146 10K R147 R150 R153 R156 R159 R162 R166
AD19 AON_HSYNC 1K 1K 1K 1K 1K 1K 1K
TXOUT1_U1N TXC3P 5V_HDMI_2 U4
AE19 R143 22
AON_VSYNC
TXOUT1_U1P TXC3N OPT AD15
AF19 FOR HDMI STANDARD 5V_HDMI_3 TRSTB
TXOUT1_U2N TXCCLKP APPLY ONLY WHEN CONNECT TO PULL-UP GPIO OPT W3 AF14
AH19 R144 22
AON_GPIO_36 TDI/GPIO
TXOUT1_U2P TXCCLKN R130 5V_HDMI_4 R145 22 W1 AH14
AE18 OPT 2K AON_GPIO_37 TDO R163
TXCLK1_UN TXC2P OPT AD14 1K
AD18 +3.3V_Normal TMS/GPIO
TXCLK1_UP TXC2N AB6 AG14
AG19 AON_RESETOUTB TCK/GPIO
TXOUT1_U3N TXC1P R132 4.7K Y6 AC16
AF18 TVM_BYPASS DINT/GPIO L/R_SYNC_DINT
TXOUT1_U3P TXC1N
AG18 R139 0 L/R_SYNC_DINT
TXOUT1_U4N TXC0P SRST
AF17
TXOUT1_U4P TXC0N +3.3V_Normal +3.3V_Normal Y3 AH7
SOC_RESET RESETB AVS_VFB For L/R sync GPIO
G24 AG7
RESETOUTB AVS_VSENSE
AD7 SRST
AC18 R194 R124 AVS_RESETB
LT0VCAL_MONITOR 2.7K 1K J6 AF7
AH16 OPT TMODE AVS_NDRIVE_1
GPIO_BL_ON W6 AH8
AG16 R108 10K TESTEN AVS_PDRIVE_1
BL_PWM/GPIO A_DIM +3.3V_Normal
R125
C105 1K
2.2uF C111 0.01uF F7 C6
10V VDAC_VREG VDAC_1 DTV/MNT_V_OUT
E7 D7
C112 0.1uF VDAC_RBIAS VDAC_2
R140
560
1%

BCM REFRENCE is 562ohm

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230 2010.09.18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN & NAND FLASH 1
 POWER 2.5V
+2.5V_BCM35230 ADAC_AVDD25 CORE 0.9V
+2.5V_BCM35230 AADC_AVDD25
+0.9V_CORE HDMI_AVDD +0.9V_CORE USB_AVDD +0.9V_CORE VAFE2_DVDD
L202 L205 L209
BLM18PG121SN1D BLM18PG121SN1D L214 L219
+3.3V_Normal
BLM18PG121SN1D BLM18PG121SN1D BLM18PG121SN1D
+0.9V_CORE +0.9V_CORE
NFM18PS105R0J NFM18PS105R0J C249 C253 C256 C258
C233 C204 10uF 10uF 0.1uF 0.1uF C280 C284 C285 C288 C292 C296 C299
C261 C263 C267 C271 C274 22uF 22uF 4.7uF 0.1uF
6.3V 6.3V 10V 10V 10uF 4.7uF 0.1uF 0.01uF 22uF 0.1uF 4.7uF 0.1uF
C225 C221 C223 C247 10V
BCM_FRC/URSA5
0.22uF 0.1uF 0.01uF IN OUT IN OUT 22uF
6.3V

S_TUNER
T2_TUNER
FRC2/URSA5

GND GND

R254

R256

R257
R253

R255

PHM
R251

R252

OLED
R250

FHD

1K

1K

1K
1K

1K
1K

1K
1K

+2.5V_BCM35230 EPHY_VDD25 +2.5V_BCM35230

+0.9V_CORE PLL_AUD_AVDD +0.9V_CORE VAFE3_DVDD +0.9V_CORE PLL_MAIN_AVDD
L203
BLM18PG121SN1D L210 L215 L217
NFM18PS105R0J +3.3V_Normal BLM18PG121SN1D BLM18PG121SN1D BLM18PG121SN1D
MODEL_OPT_0 C244 C259 C260 C262 C266 C270 C272
6.3V C251 C252 C255
0.1uF 4.7uF 0.1uF 10uF 4.7uF 10uF 4.7uF 0.1uF 0.01uF C277 C281 C294 C297
MODEL_OPT_1 16V 10V 10V 4.7uF 0.1uF C287 C290 4.7uF 0.1uF
C232 C234 C236 C238 IN OUT C248 4.7uF 0.1uF
MODEL_OPT_2 4.7uF 0.1uF 0.1uF 4.7uF 10uF
10V 10V GND 10V
MODEL_OPT_3
MODEL_OPT_4
+2.5V_BCM35230 VAFE2_VDD25
MODEL_OPT_5 +0.9V_CORE PLL_MIPS_AVDD
L206 +0.9V_CORE PLL_VAFE_AVDD
+1.5V_DDR
MODEL_OPT_6 BLM18PG121SN1D L211 L218
BLM18PG121SN1D BLM18PG121SN1D
MODEL_OPT_7
NO_FRC/BCM_FRC

NO_FRC/FRC2

NO_T2_TUNER

NO_S_TUNNER
C295 C298
C203 C205 C207 C209 C211 C213 C215 C220 C222 C265 C269 C279 C282 4.7uF 0.1uF

NO_PHM
R260

R265
R261

10uF 10uF 4.7uF 4.7uF 0.1uF 0.1uF 0.01uF 0.1uF 0.01uF 4.7uF 0.1uF 4.7uF 0.1uF
R262

R263

R264

R266

R267
LCD

OPT
HD

10V 10V
1K

1K
10V 10V
1K

1K

1K

1K

1K

1K
+2.5V_BCM35230 VAFE3_VDD25 +2.5V_BCM35230 PLL_VAFE_AVDD25
L204 L207
BLM18PG121SN1D BLM18PG121SN1D

C254 C257 C264 C268 POWER 3.3V

C250
4.7uF 4.7uF 0.1uF 4.7uF 0.1uF
MODEL OPTION 10V +3.3V_Normal USB_AVDD33 +3.3V_Normal HDMI_AVDD33
BCM L212 L216
external
NO_FRC internal LG FRC2 BLM18PG121SN1D BLM18PG121SN1D
URSA5
FRC
C283
MODEL_OPT_0 0 0 1 1 C291 C293
0.1uF
4.7uF 0.1uF
MODEL_OPT_1 0 1 0 1

HIGH LOW IC101

+0.9V_CORE LGE35230(BCM35230KFSBG)
MODEL_OPT_2 FHD HD
+3.3V_Normal VDAC_AVDD33
MODEL_OPT_3 OLED LCD NON_BCM_CAP
L213
V12 K10 BLM18PG121SN1D
MODEL_OPT_4 DDR speed 1333 1600 VDDC_1 VSS_1
V7 K11
VDDC_2 VSS_2
MODEL_OPT_5 T2 Tuner Support Not Support M10 K12
VDDC_3 VSS_3 C286 C289
N10 L12 4.7uF 0.1uF
MODEL_OPT_6 S Tuner Support Not Support VDDC_4 VSS_4
P10 M12
VDDC_5 VSS_5
MODEL_OPT_7 PHM Enable Disable R10 N12
VDDC_6 VSS_6
T10 P12
VDDC_7 VSS_7
U10 R12
VDDC_8 VSS_8
V10 T12
close to soc VDDC_9 VSS_9
W10 U12
IC101 C217 V13
VDDC_10 VSS_10
W12
LGE35230(BCM35230KFSBG) 16V
L11
VDDC_11 VSS_11
K13
0.1uF 100
Non_CHB R241 +3.3V_Normal VDDC_12 VSS_12
M11 L13
IF_P VDDC_13 VSS_13 IC101
NON_BCM_CAP R212 L201 N11 M13
F26 C17 1K C218
100 P11
VDDC_14 VSS_14
N13
LGE35230(BCM35230KFSBG)
EPHY_VREF VI_IFP0 0.1uF R242 BLM18PG121SN1D
D26 B17 16V VDDC_15 VSS_15 AADC_AVDD25
EPHY_RDAC VI_IFM0 IF_N R11 P13
R211 D15 VDDC_16 VSS_16 NON_BCM_CAP
VDDR_AGC +3.3V_Normal T11 R13
6.04K F27 VDDC_17 VSS_17 F19 F20
EPHY_TDP EPHY_TDP C229 U11 T13 AADC_AVDD25 AADC_AVSS
F28 B16 closed to soc VDDC_18 VSS_18 ADAC_AVDD25
0.1uF V11 U13
EPHY_TDN EPHY_TDN AGC_SDM_2
E27 A16 R213 2K VDDC_19 VSS_19 D25 G22
EPHY_RDP EPHY_RDP AGC_SDM_1 IF_AGC R233 R234 W11 W16 ADACA_AVDD25 ADACA_AVSS
E26 C216 0.01uF 1.2K 1.2K VDDC_20 VSS_20 D24 G21
EPHY_RDN EPHY_RDN V14 K14 ADACC_AVDD25 ADACC_AVSS
A15 VDDC_21 VSS_21 E24 F22
GPIO_0 SDA1_3.3V L18 L14 ADACD_AVDD25 ADACD_AVSS
C16 VDDC_22 VSS_22 EPHY_VDD25
GPIO_1 SCL1_3.3V M18 M14
F5 G28 VDDC_23 VSS_23 F24 F23
USB_MONCDR GPIO_2 3D_SYNC C227 C231 N18 N14 EPHY_BVDD25 EPHY_AVSS
+3.3V_Normal E5 G26 33pF 33pF NON_NTP VDDC_24 VSS_24 E25
USB_RREF GPIO_3 NON_NTP P18 P14 EPHY_AVDD25
C201 R210 50V 50V VDDC_25 VSS_25
100pF 4.87K +3.3V_Normal R18 R14
1% C2 VDDC_26 VSS_26 HDMI_AVDD
OPT SIDE_USB_DM USB_PORT1DN T18 T14
R287 D1 W14 VDDC_27 VSS_27
10K SIDE_USB_DP USB_PORT1DP PCI_VIO_0 U18 U14 HDMI_AVDD33
W15 VDDC_28 VSS_28 D5 F6
WIFI PCI_VIO_1 V18 K15 HDMI0_AVDD HDMI0_AVSS_1
E1 W13 VDDC_29 VSS_29 D4 G6
SIDE_USB_OCD1 USB_PWRFLT_1/GPIO PCI_VIO_2 W18 L15 +2.5V_BCM35230 HDMI0_AVDD33 HDMI0_AVSS_2
D2 VDDC_30 VSS_30
SIDE_USB_CTL1 USB_PWRON_1/GPIO V15 M15
VDDC_31 VSS_31 AE20 AB22
R286 L19 N15 LT0VDD25_1 LT0VSS_1
10K B1 J5 R280 VDDC_32 VSS_32 AD20 AB21
WIFI_DM USB_PORT2DN GPIO_4 M_REMOTE_RX M19 P15 LT0VDD25_2 LT0VSS_2
WIFI C1 R5 22 VDDC_33 VSS_33 AC20 AB19
WIFI_DP USB_PORT2DP GPIO_5 MODEL_OPT_0 N19 R15 +2.5V_BCM35230 LT0VDD25_3 LT0VSS_3
V6 VDDC_34 VSS_34 AB20 AC19
GPIO_6 CI_DET P19 T15 LT0VDD25_4 LT0VSS_4
C3 H6 VDDC_35 VSS_35 AB18
SIDE_USB_OCD2 USB_PWRFLT_2/GPIO GPIO_7 M_RFModule_RESET R19 U15 LT0VSS_5
C4 AE15 VDDC_36 VSS_36 C275 AB17
SIDE_USB_CTL2 USB_PWRON_2/GPIO GPIO_70 EPHY_ACTIVITY T19 K16 LT0VSS_6
AF15 VDDC_37 VSS_37 0.1uF AC17
GPIO_71 EPHY_LINK U19 L16 OPT LT0VSS_7
PCM_TS_DATA[0-7] AG15 R214 22 +3.3V_Normal VDDC_38 VSS_38
GPIO_72 DTV_ATV_SELECT V19 M16
M4 AF16 R215 22 VDDC_39 VSS_39 USB_AVDD D14 SPDIF_IN_AVDD25 F15
PCM_TS_CLK TCLKA/GPIO GPIO_73 RF_SWITCH_CTL_2 +1.5V_DDR W19 N16
L5 AD16 R281 22 VDDC_40 VSS_40 SPDIF_IN_AVSS
PCM_TS_DATA[0] R240 V16 P16
TDATA_0/GPIO GPIO_74 MODEL_OPT_1 USB_AVDD33
PCM_TS_DATA[1] M5 AE16 R282 22 2.7K VDDC_41 VSS_41 E4 G7
TDATA_1/GPIO GPIO_75 MODEL_OPT_2 V17 R16 USB_AVDD USB_AVSS_1
PCM_TS_DATA[2] L6 AG17 R216 22 Place Cap VDDC_42 VSS_42 VDAC_AVDD33 D3 G8
TDATA_2/GPIO GPIO_76 MODEL_OPT_3 Very close to R22 Ball T16 USB_AVDD33 USB_AVSS_2
PCM_TS_DATA[3] N3 AH17 R228 22 VSS_43
TDATA_3/GPIO GPIO_77 PWM_DIM L10 U16
PCM_TS_DATA[4] N1 AE17 R230 22 MLG1005S22NJT POR_VDD VSS_44 VAFE2_DVDD D6 G9
TDATA_4/GPIO GPIO_78 L/DIM0_VS K17 VDAC_AVDD33 VDAC_AVSS
PCM_TS_DATA[5] N2 AD17 BCM_L/DIM C224 C226 VSS_45 VAFE2_VDD25
OPT TDATA_5/GPIO GPIO_79 INSTANT_MODE L220 L17
R201 0 PCM_TS_DATA[6] M3 1uF 0.1uF VSS_46 D18 G20
TDATA_6/GPIO L22 M17 VAFE2_DVDD VAFE2_VSS_1
M2 25V 16V VDDR1_1 VSS_47 E17 E18
PCM_TS_DATA[7] OPT OPT AA28 N17
TDATA_7/GPIO Place as close as possible to the pad VAFE2_AVDD25_1 VAFE2_VSS_2
L4 AB13 +3.3V_Normal VDDR1_2 VSS_48 C212 C214 D16 G18
PCM_TS_SYNC TSTRTA/GPIO PCI_AD05 V28 P17 VAFE2_AVDD25_2 VAFE2_VSS_3
N4 AC15 VDDR1_3 VSS_49 VAFE3_DVDD 390pF 390pF D17 G17
R28 R17

URSA_RESET

FRC2_RESET
PCM_TS_VAL TVLDA/GPIO PCI_AD06 50V 50V VAFE2_DVDD25 VAFE2_VSS_4
AB12 VDDR1_4 VSS_50 F18

R232-*1
FE_TS_DATA[0-7] F/NIM_EU_CN PCI_AD07 M28 T17 VAFE3_VDD25 VAFE2_VSS_5
R202 K6 AB11 VDDR1_5 VSS_51 D9 G16
J28 U17

4.7K
TU_TS_CLK

4.7K
R232
0 TCLKD/GPIO PCI_AD08 VAFE3_DVDD VAFE2_VSS_6
FE_TS_DATA[0] J4 AE14 R231-*1 0 VDDR1_6 VSS_52 D8 F16
TDATD_0/GPIO PCI_AD09/GPIO SC_DET/COMP2_DET K23 W17 VAFE3_AVDD25_1 VAFE2_VSS_7
FE_TS_DATA[1] R203 0 F/NIM_EU_CN K5 AG13 VDDR1_7 VSS_53 E8
TDATD_1/GPIO PCI_AD10/GPIO CHB_RESET FRC2_RESET M22 K18 C208 C210 VAFE3_AVDD25_2
F/NIM_EU_CN J2 AH13 VDDR1_8 VSS_54 use only for A0/B0 chip F9 G13
FE_TS_DATA[2] R204 0 R231 100 FRC_RESET T22 K19 390pF 390pF
TDATD_2/GPIO PCI_AD11/GPIO VAFE3_AVDD25_3 VAFE3_VSS_1
FE_TS_DATA[3] R205 0 F/NIM_EU_CN J3 AF13 VDDR1_9 VSS_55 C210-*1 50V 50V E9 G12
TDATD_3/GPIO PCI_AD12/GPIO TW9910_RESET URSA_RESET T23 H7 VAFE3_DVDD25 VAFE3_VSS_2
VDDR1_10 VSS_56 220pF BCM_C0
FE_TS_DATA[4] R206 0 F/NIM_EU_CN K2 AE13 F8 F12
TDATD_4/GPIO PCI_AD13/GPIO AV2_CVBS_DET Place Cap U22 G14 50V POR_VDD25 VAFE3_VSS_3
FE_TS_DATA[5] R207 0 F/NIM_EU_CN K1 AD12 R218 22 Very close to R22 Ball VDDR1_11 VSS_57 PLL_AUD_AVDD G11
TDATD_5/GPIO PCI_AD14/GPIO RF_BOOSTER_CTL Y22 AB16 BCM_A0/B0 VAFE3_VSS_4
F/NIM_EU_CN K3 AF12 VDDR1_12 VSS_58 Place as close as possible to the pad G10
FE_TS_DATA[6] R208 0 DSUB_DET C242 R7 PLL_MAIN_AVDD
TDATD_6/GPIO PCI_AD15/GPIO VAFE3_VSS_5
FE_TS_DATA[7] R209 0 F/NIM_EU_CN L1 AG10 0.1uF VSS_59 G25 F10
TDATD_7/GPIO PCI_AD16/GPIO PCM_RST R22 M6 PLL_AUD_AVDD VAFE3_VSS_6
CHBO_TS_CLK L3 AF10 DDR_LDO_VDDO VSS_60 PLL_MIPS_AVDD K4
TU_TS_SYNC R220 22 MODEL_OPT_4 AB23 PLL_VAFE_AVDD
CHBO_TS_SERIAL TSTRTD/GPIO PCI_AD17/GPIO PLL_MAIN_AVDD
L2 AE10 +3.3V_Normal VSS_61 AD25
TS_VAL_ERR TVLDD/GPIO PCI_AD18/GPIO DC_MREMOTE P7 PLL_MIPS_AVDD
CHBO_TS_SYNC AD10 VSS_62 PLL_VAFE_AVDD25 D11 AD26
PCI_AD19/GPIO DD_MREMOTE G15 W7 PLL_MIPS_AVSS
CHBO_TS_VAL_ERR AE9 VDDR3_1 VSS_63 D12 PLL_VAFE_AVDD
PCM_MDI[0-7] R221 22 BCM_L/DIM L/DIM0_MOSI H22 J7
PCI_AD20/GPIO +0.9V_CORE PLL_VAFE_AVDD25
P4 AE8 R222 22 BCM_L/DIM VDDR3_2 VSS_64
PCM_MCLKI MPEG_CLK/GPIO PCI_AD21/GPIO L/DIM0_SCLK G23 N7
PCM_MDI[0] T2 AC10 VDDR3_3 VSS_65 AE7 AC7
MPEG_D_0/GPIO PCI_AD22 AB9 AB10 TVM_OSC_AVDD TVM_OSC_AVSS
PCM_MDI[1] R3 AC11 VDDR3_4 VSS_66 C273
MPEG_D_1/GPIO PCI_AD23 K7 AC23 C276 +3.3V_Normal
PCM_MDI[2] R2 AC8 VDDR3_5 VSS_67 C202 C206 0.1uF 0.01uF U6
MPEG_D_2/GPIO PCI_AD24 AB15 AC6 AUX_AVDD33
P3 AB8 VDDR3_6 VSS_68 390pF 390pF OPT
PCM_MDI[3] L7 G19 50V 50V
MPEG_D_3/GPIO PCI_AD25
PCM_MDI[4] P2 VDDR3_7 VSS_69
MPEG_D_4/GPIO AB14 AA22
PCM_MDI[5] P1 AC14 VDDR3_8 VSS_70 C278
MPEG_D_5/GPIO PCI_CBE00 M7 J23
R6 AG12 VDDR3_9 VSS_71 0.1uF
PCM_MDI[6] R283 COMP1_DET N6 J22
MPEG_D_6/GPIO PCI_CBE01/GPIO 22
PCM_MDI[7] N5 AH10 VDDR3_10 VSS_72
MPEG_D_7/GPIO PCI_CBE02/GPIO MODEL_OPT_5 P6 K22
T4 AB7 VDDR3_11 VSS_73
PCM_MISTRT MPEG_SYNC/GPIO PCI_CBE03 +0.9V_CORE J25 Place as close as possible to the pad
P5 VSS_74
PCM_MIVAL_ERR MPEG_DATA_EN/GPIO N22
AG11 R223 22 VSS_75
PCI_DEVSELB/GPIO 3D_GPIO_0 +3.3V_Normal AA6 N23
AD11 R284 22 AON_VDDC_1 VSS_76
PCI_FRAMEB/GPIO MODEL_OPT_6 AA7 M25
R4 AE11 R224 22 AON_VDDC_2 VSS_77
MCIF_RESET/GPIO PCI_IRDYB/GPIO MODEL_OPT_7 Y7 P22
U1 AD13 AON_POR_VDD VSS_78
MCIF_SCLK/GPIO PCI_PAR/GPIO R25
T3 AE12 R235 100 VSS_79
MCIF_SCTL/GPIO PCI_PERRB/GPIO ERROR_OUT U7 V22
T1 AC12 R225 0 OPT AON_VDDR3 VSS_80
/PCM_IRQA MCIF_SDI/GPIO PCI_REQ1B W22
T5 AC13 R226 22 VSS_81
MCIF_SDO/GPIO PCI_SERRB/GPIO RF_SWITCH_CTL T7 W23
AH11 R285 22 AON_VDDR10_1 VSS_82
PCI_STOPB/GPIO 3D_GPIO_1 T6 V25
AF11 R227 22 AON_VDDR10_2 VSS_83
PCI_TRDYB/GPIO 3D_GPIO_2 AA25
VSS_84

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN POWER 2 50
 DSUB_R+ C320 0.1uF
INCM_R C321 0.1uF
R311
36 IC101
LGE35230(BCM35230KFSBG)
DSUB_G+ C327 0.1uF
C328 0.1uF NON_BCM_CAP
INCM_G B6
R317 VI_R
36 A6
VI_INCM_R
C7
VI_G
A7

DSUB_B+ C322 0.1uF B7

C8
VI_INCM_G
VI_B
BCM35230_with_CAP_220pF
INCM_B C323 0.1uF
VI_INCM_B
R312 IC101-*1
36 C13
DSUB_HSYNC HSYNC_IN
LGE35230
A13
DSUB_VSYNC VSYNC_IN
COMP1_Y
C9
COMP1_Pr C329
C330
0.1uF
0.1uF A9
VI_Y1 VIDEO INCM B6
BCM_CAP
A6
VI_R
COMP1_Pb VI_PR1
B9 VI_INCM_R
C331 0.1uF C7
VI_PB1 VI_G
C332 0.1uF B8 A7
VI_INCM_COMP1 VI_INCM_G
B7
Run Along DSUB_R Trace VI_B
C333 0.1uF C11 Near P801 INCM_R C8
VI_SC_R1 VI_INCM_B
C334 0.1uF A10
VI_SC_G1 Run Along DSUB_G Trace
C335 0.1uF B10 Near P801 INCM_G C13
VI_SC_B1 HSYNC_IN
C336 0.1uF C10 A13
VI_INCM_SC1 Run Along DSUB_B Trace VSYNC_IN
INCM_VID_COMP1 Near P801 INCM_B
R310 D10
0 SC_FB C9
VI_FB_1/GPIO Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace VI_Y1
F13 Near JK1101 INCM_VID_COMP1 A9
VI_FS1 VI_PR1
B9
Run Along AV2_CVBS Trace VI_PB1
A12 Near JK1104 INCM_VID_AV2 B8
SC_R/COMP2_Pr VI_SC_R2 VI_INCM_COMP1
C12
SC_G/COMP2_Y VI_SC_G2 Run Along TUNER_CVBS_IF_P Trace
B12 Near TU2101/2
TU2201/2/3
INCM_TUNER C11
SC_B/COMP2_Pb VI_SC_B2 VI_SC_R1
B11 A10
VI_INCM_SC2 Run Along AV1_CVBS Trace VI_SC_G1
Near JK1102 INCM_VID_AV1 B10
E12 VI_SC_B1
JK1103 Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN/SC R,G,B Trace C10
VI_FB_2/GPIO Near INCM_VID_SC/COMP2 VI_INCM_SC1
E14 JK2501
VI_FS2
D10
E15 VI_FB_1/GPIO
F13
INCM_VID_SC/COMP2 VI_L1 VI_FS1
R318 F17
0 VI_C1_1
E16 A12
VI_INCM_LC1_1 VI_SC_R2
SC_CVBS_IN F14 C12
VI_C1_2 VI_SC_G2
INCM_VID_SC E11 B12
C303 0.1uF VI_INCM_LC1_2 VI_SC_B2
AV2_CVBS_IN B11
INCM_VID_AV2 C304 0.1uF C18 VI_INCM_SC2
NON_EU VI_CVBS1
R303 R325 0 B18
36 TU_CVBS C325 0.1uF E12
VI_INCM_CVBS1 VI_FB_2/GPIO
C326 0.1uF A18 E14
EU INCM_TUNER VI_CVBS2 VI_FS2
R306 R316 C19
R325-*1 VI_INCM_CVBS2
75 36 A19
10 1% E15
OPT VI_CVBS3 VI_L1
B19 F17
VI_INCM_CVBS3 VI_C1_1
C317 0.1uF C20 E16
AV1_CVBS_IN VI_CVBS4 VI_INCM_LC1_1
C318 0.1uF B20 F14
INCM_VID_AV1 VI_INCM_CVBS4 VI_C1_2
R304 +2.5V_BCM35230 E11
36 E19 VI_INCM_LC1_2
VI_SIF1_1
D19 C18
R313 VI_INCM_SIF1_1 VI_CVBS1
10K E10 B18
VI_SIF1_2 VI_INCM_CVBS1
C319 0.1uF F11 A18
TU_SIF VI_INCM_SIF1_2 VI_CVBS2
C19
R305 R314 +2.5V_BCM35230 VI_INCM_CVBS2
240 12K A19
OPT VI_CVBS3
B19
R319 VI_INCM_CVBS3
10K C20
OPT VI_CVBS4
B20
C324 0.1uF VI_INCM_CVBS4
INCM_SIF
R315 R320 E19
120 12K VI_SIF1_1
OPT OPT D19
VI_INCM_SIF1_1
E10
VI_SIF1_2
F11
VI_INCM_SIF1_2

IC101
LGE35230(BCM35230KFSBG)

NON_BCM_CAP
B15 AF8 R326 100
SPDIF_INC_P I2SSCK_OUTA/GPIO AUD_SCK
C15 AF9 R327 100
+3.3V_Normal SPDIF_INC_N I2SWS_OUTA/GPIO AUD_LRCK
AG9 R328 100
I2SSD_OUTA0/GPIO AUD_LRCH
C14 AC9 R329 100
SPDIF_IND_P I2SSOSCK_OUTA/GPIO AUD_MASTER_CLK
B14 AD8
SPDIF_IND_N I2SSD_OUTA1/GPIO TU_RESET_SUB C337 C338 C339 C340
R301 R302 AD9 22pF 22pF
I2SSD_OUTA2/GPIO 22pF 33pF
1.2K 1.2K G4
M_REMOTE_TX OPT OPT OPT OPT
I2SSCK_IN/GPIO
F4 E2
SCL3_3.3V I2SWS_IN I2SSCK_OUTC/GPIO HP_DET
G5 F2
SDA3_3.3V I2SSD_IN/GPIO I2SWS_OUTC/GPIO AV1_CVBS_DET
C301 C302 E3
I2SSD_OUTC/GPIO TU_RESET
33pF 33pF F3
50V 50V I2SSOSCK_OUTC/GPIO
C305 1uF 10V C25
PC_L_IN AADC_LINE_L1
C306 1uF 10V B24 G2
PC_R_IN AADC_LINE_R1 I2SSCK_OUTD/GPIO SC_RE1
C307 1uF 10V A24 G3
INCM_AUD_PC AADC_INCM1 I2SWS_OUTD/GPIO SC_RE2
I2SSD_OUTD/GPIO
G1
/RST_HUB AUDIO INCM
C308 1uF 10V E22 H1
PHONE JACK AV1_L_IN AADC_LINE_L2 I2SSOSCK_OUTD/GPIO S2_RESET
C309 1uF 10V E23
AV1_R_IN AADC_LINE_R2
C310 1uF 10V D23
INCM_AUD_AV1 AADC_INCM2
B13 Route Between AV1_L_IN & AV1_R_IN Trace
C24
SPDIF_OUTA/GPIO SPDIF_OUT Near JK1102 R321 0 INCM_AUD_AV1
AV2_L_IN C311 1uF 10V
AADC_LINE_L3
C312 1uF 10V C23 AG8 Route Between SC/COMP2_L_IN & SC/COMP2_R_IN Trace
AV2_R_IN AADC_LINE_R3 AUDMUTE_0/GPIO Near JK1103 R322 0
B23 E13 INCM_AUD_SC/COMP2
C313 1uF 10V JK2501
INCM_AUD_AV2 AADC_INCM3 AUDMUTE_1
R323 0 Route Between AV2_L_IN & AV2_R_IN Trace
E21 C28 Near JK1104 INCM_AUD_AV2
SC/COMP2_L_IN C314 1uF 10V HP_LOUT_N
AADC_LINE_L4 ADAC_AL_N
C315 1uF 10V D21 C27 Route Between PC_L_IN & PC_R_IN Trace
SC/COMP2_R_IN
D22
AADC_LINE_R4 ADAC_AL_P HP_LOUT_P Near JK801 R324 0 INCM_AUD_PC
INCM_AUD_SC/COMP2 C316 1uF 10V
AADC_INCM4
D28
ADAC_AR_N HP_ROUT_N
B22 D27
AADC_LINE_L5 ADAC_AR_P HP_ROUT_P
C22
AADC_LINE_R5
A22 C26
AADC_INCM5 ADAC_CL_N SCART1_Lout_N Near TU2101/2
TU2201/2/3
Route Along With TUNER_SIF_IF_N
INCM_SIF
A27
ADAC_CL_P SCART1_Lout_P
F21
AADC_LINE_L6
D20 B27
AADC_LINE_R6 ADAC_CR_N SCART1_Rout_N
E20 B28
AADC_INCM6 ADAC_CR_P SCART1_Rout_P

A21 B25
AADC_LINE_L7 ADAC_DL_N
C21 A25
AADC_LINE_R7 ADAC_DL_P
B21
AADC_INCM7
A26
ADAC_DR_N
B26
ADAC_DR_P

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN AUDIO/VIDEO 3 50
 DUAL COMPONENT

IC401,IC402 1ST : EAN61667501, 2ND : EAN61570701

IC401-*1
1ST : T-K4B2G1646B_HCK0, 2ND : T-H5TQ2G63BFR-PBC
IC402-*1
DDR STRAP
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
+1.5V_DDR +1.5V_DDR
NFM18PS105R0J
NFM18PS105R0J
JEDEC Types : DDR_DQ[0:4] C410 C432
R401 R403 R405 R407 R409 6.3V 6.3V
4.7K 4.7K 4.7K 4.7K 4.7K 00001 : DDR3-1333H (CasL=9)
OPT 10101 : DDR3-1600K (CasL=11) (O) C403 C405 C407 C417 C421 C423 C425
DDR_1333 DDR_1333 IN OUT IN OUT
2.2uF 10uF 2.2uF 470pF 2.2uF 10uF 10uF
GND GND

DDR_DQ[10] +1.5V_DDR +1.5V_DDR

DDR_DQ[9] NFM18PS105R0J NFM18PS105R0J
DDR_DQ[7] C402 C433
+1.5V_DDR 6.3V 6.3V
DDR_DQ[8]
DDR_DQ[6] C412 C426
IN OUT 1uF IN OUT 1uF
DDR_DQ[5]
GND GND

R402 R432 R404 R406 R408 R410 C453 C454 C455

4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 1uF 1uF 1uF
OPT OPT OPT OPT OPT 6.3V
Bus Width : DDR_DQ[10] 6.3V 6.3V
0 - 16b
1 - 32b (O)
Chip Width : DDR_DQ[8]
0 - 8b
1 - 16b (O)
Chip Size : DDR_DQ[6:5]
00 - 4Gbit
01 - 2Gbit (O)
+1.5V_DDR
10 - 1Gbit +1.5V_DDR
11 - 512Mbit +1.5V_DDR
IC401 IC402
R422 R430
K4B2G1646C R416 K4B2G1646C 4.99K 4.7K
4.99K 1% OPT
1% R429
82
DDR_RESETb
N3 DDR_1333_SS M8 N3 DDR_1333_SS M8 R423
DDR_AA0 A0 VREFCA C415 R417 DDR_AA0 A0 VREFCA C435 4.99K C442
IC101 P7 4.99K P7 0.01uF 1% 100pF
DDR_AA1 A1 0.01uF 1% DDR_AA1 A1
LGE35230(BCM35230KFSBG) P3 P3
DDR_AA2 A2 DDR_AA2 A2 R428
N2 H1 N2 H1 82
DDR_DQ[0-7] NON_BCM_CAP DDR_AA3 A3 VREFDQ DDR_VREFA DDR_AA3 A3 VREFDQ C436 DDR_VREFA
P8 C416 P8 DDR_CKE
DDR01_AA4 A4 0.01uF DDR23_AA4 A4 0.01uF C437 R431
DDR_DQ[0] U26 V23 P2 P2 4.7K
DDR_DQA_0 DDR_ADA_0 DDR_AA0 DDR01_AA5 A5 DDR23_AA5 A5 100pF
R26 AB27 R8 L8 OPT
DDR_DQ[1] DDR_DQA_1 DDR_AA1 R8 L8 R415 240 DDR23_AA6 R421 240
DDR_ADA_1 DDR01_AA6 A6 ZQ A6 ZQ
DDR_DQ[2] U27 Y23 R2 R2 1% +1.5V_DDR
DDR_DQA_2 DDR_ADA_2 DDR_AA2 DDR_AA7 A7 1% +1.5V_DDR DDR_AA7 A7
DDR_DQ[3] R27 Y26 T8 T8
DDR_DQA_3 DDR_ADA_3 DDR_AA3 DDR_AA8 A8 DDR_AA8 A8
DDR_DQ[4] V27 R3 B2 R3 B2
DDR_DQA_4 DDR_AA9 A9 VDD_1 DDR_AA9 A9 VDD_1 DDR_AA13 R424 56
DDR_DQ[5] P26 AB26 L7 D9 L7 D9
DDR_DQA_5 DDR_ADA_4 DDR01_AA4 DDR_AA10 A10/AP VDD_2 DDR_AA10 A10/AP VDD_2 DDR_AA14 R425 56 OPT
DDR_DQ[6] U25 Y24 R7 G7 R7 G7
DDR_DQ[8-15] DDR_DQA_6 DDR_ADA_5 DDR01_AA5 DDR_AA11 A11 VDD_3 C438 1uF
P27 AC26 DDR_AA11 A11 VDD_3 N7 K2
DDR_DQ[7] DDR01_AA6 N7 K2 DDR_AA12 AR401 56
DDR_DQA_7 DDR_ADA_6 DDR_AA12 A12/BC VDD_4 A12/BC VDD_4 DDR_AA2
DDR_DQ[8] R24 T3 K8 T3 K8
DDR_DQA_8 DDR_AA13 A13 VDD_5 C404 0.1uF
N24 AB24 DDR_AA13 A13 VDD_5 N1 DDR_AA11
DDR_DQ[9] DDR23_AA4 N1
DDR_DQA_9 DDR_ADA_ALT_4 VDD_6 VDD_6 DDR_AA3
DDR_DQ[10] T25 AC25 M7 N9 M7 N9
DDR_DQA_10 DDR_ADA_ALT_5 DDR23_AA5 NC_5 VDD_7 DDR_AA7 C406 0.1uF
M23 AC24 NC_5 VDD_7 R1
DDR_DQ[11] DDR23_AA6 R1 AR402 56
DDR_DQA_11 DDR_ADA_ALT_6 VDD_8 VDD_8
DDR_DQ[12] R23 M2 R9 M2 R9
DDR_DQA_12 DDR_BAA0 BA0 VDD_9 DDR_BAA0 BA0 VDD_9 DDR_AA9
DDR_DQ[13] N25 AB25 N8 N8 C450 0.1uF
DDR_DQA_13 DDR_ADA_7 DDR_AA7 DDR_BAA1 BA1 DDR_BAA1 BA1 DDR_AA8
DDR_DQ[14] T24 AD28 M3 M3
DDR_DQ[16-23] DDR_DQA_14 DDR_ADA_8 DDR_AA8 DDR_BAA2 BA2 C408 0.1uF
N26 Y25 DDR_BAA2 BA2 A1 DDR_AA0
DDR_DQ[15] DDR_AA9 A1 AR403 56
DDR_DQA_15 DDR_ADA_9 VDDQ_1 VDDQ_1 DDR_AA1
DDR_DQ[16] L26 AA27 J7 A8 J7 A8 C439
DDR_DQA_16 DDR_ADA_10 DDR_AA10 DDR01_CLK DDR23_CLK CK VDDQ_2 DDR_BAA0 1uF
H27 AC27 CK VDDQ_2 K7 C1
DDR_DQ[17] DDR_AA11 K7 C1 DDR23_CLKb
DDR_DQA_17 DDR_ADA_11 DDR01_CLKb CK VDDQ_3 CK VDDQ_3 DDR_BAA2
DDR_DQ[18] L27 AA26 K9 C9 K9 C9
DDR_DQA_18 DDR_ADA_12 DDR_AA12 DDR_CKE R418 R419 DDR_CKE CKE VDDQ_4 DDR_BAA1 C409 0.1uF
J26 AA24 R412 R413 CKE VDDQ_4 D2
DDR_DQ[19] DDR_AA13 56 56 D2 56 56 AR404 56
DDR_DQA_19 DDR_ADA_13 VDDQ_5 1% 1% VDDQ_5 DDR_AA10
DDR_DQ[20] M27 AD27 1% 1% +1.5V_DDR L2 E9 +1.5V_DDR L2 E9 C451 0.1uF
DDR_DQA_20 DDR_ADA_14 DDR_AA14 CS VDDQ_6 CS VDDQ_6 DDR_AA12
DDR_DQ[21] G27 K1 F1 R420 10K K1 F1
DDR_DQA_21 C401 R414 10K ODT VDDQ_7 C419 ODT VDDQ_7 DDR_WEb
DDR_DQ[22] M26 Y27 J3 H2 1000pF J3 H2
DDR_DQ[24-31] DDR_DQA_22 DDR_BAA_0 DDR_BAA0 1000pF DDR_RASb RAS VDDQ_8 C411 0.1uF
H26 AB28 DDR_RASb RAS VDDQ_8 K3 H9
DDR_DQ[23] DDR_BAA1 K3 H9 DDR_CASb AR405 56
DDR_DQA_23 DDR_BAA_1 DDR_CASb CAS VDDQ_9 CAS VDDQ_9 DDR23_AA6
DDR_DQ[24] L23 W24 L3 L3 C440
DDR_DQA_24 DDR_BAA_2 DDR_BAA2 DDR_WEb DDR_WEb WE DDR23_AA4 1uF
H25 WE J1
DDR_DQ[25] J1
DDR_DQA_25 NC_1 NC_1 DDR23_AA5
DDR_DQ[26] L24 V24 T2 J9 T2 J9
DDR_DQA_26 DDR_RASA_N DDR_RASb DDR_RESETb RESET NC_2 DDR_RESETb RESET NC_2
DDR_DQ[27] J24 W25 L1 L1 AR406 56 C452 0.1uF
DDR_DQA_27 DDR_CASA_N DDR_CASb NC_3 NC_3 DDR01_AA6
DDR_DQ[28] M24 V26 L9 L9
DDR_DQA_28 DDR_WEA_N DDR_WEb NC_4 NC_4 DDR01_AA4
DDR_DQ[29] H23 F3 T7 F3 T7
DDR_DQA_29 DDR_QS0 DQSL NC_6 DDR_AA14 DDR_QS2 DQSL NC_6 DDR_AA14 DDR01_AA5
DDR_DQ[30] L25 U24 G3 G3
DDR_DQA_30 DDR_CKEA DDR_CKE DDR_QS0b DQSL DDR_QS2b DQSL R426 56
DDR_DQ[31] H24 DDR_CASb
DDR_DQA_31 R427 56 C441 1uF
W27 C7 A9 C7 A9 DDR_RASb
DDR_DM[0-3] DDR_CKA01_P DDR01_CLK DDR_QS1 DQSU VSS_1 DDR_QS3 DQSU VSS_1
W28 B7 B3 B7 B3
DDR_CKA01_N DDR01_CLKb DDR_QS1b DQSU VSS_2 DDR_QS3b DQSU VSS_2
DDR_DM[0] T26 E1 E1
DDR_DMA_0 VSS_3 VSS_3
DDR_DM[1] P25 N28 E7 G8 E7 G8
DDR_DMA_1 DDR_CKA23_P DDR23_CLK DDR_DM[0] DML VSS_4 DDR_DM[2] DML VSS_4
DDR_DM[2] J27 N27 D3 J2 D3 J2
DDR_DMA_2 DDR_CKA23_N DDR23_CLKb DDR_DQ[0-7] DDR_DM[1] DMU VSS_5 DDR_DQ[16-23] DDR_DM[3] DMU VSS_5
DDR_DM[3] K24 J8 J8
DDR_DMA_3 VSS_6 VSS_6
U23 E3 M1 DDR_DQ[16] E3 M1
DDR_VREFA DDR_VREFA DDR_DQ[0] DQL0 DQL0 VSS_7
VSS_7 F7 M9
DDR_DQ[1] F7 M9 DDR_DQ[17] DQL1
DQL1 VSS_8 VSS_8
T27 AA23 F2 P1 DDR_DQ[18] F2 P1
DDR_QS0 DDR_DQSA_P_0 DDR_RST_N DDR_RESETb DDR_DQ[2] DQL2 VSS_9
T28 DQL2 VSS_9 F8 P9
DDR_QS0b DDR_DQ[3] F8 P9 DDR_DQ[19]
DQL3
DDR_DQSA_N_0 DQL3 VSS_10 VSS_10
W26 R411 240 H3 T1 DDR_DQ[20] H3 T1 IC401-*1 IC402-*1
DDR_ZQ DDR_DQ[4] DQL4 VSS_11 K4B2G1646C-HCK0
P24 DQL4 VSS_11 H8 T9 K4B2G1646C-HCK0
DDR_QS1 1% DDR_DQ[5] H8 T9 DDR_DQ[21]
DQL5
DDR_DQSA_P_1 DQL5 VSS_12 VSS_12 DDR_1600_SS
P23 G2 DDR_DQ[22] G2 N3 DDR_1600_SS M8
N3
A0 VREFCA
M8
DDR_QS1b DDR_DQSA_N_1 DDR_DQ[6] DQL6 A0 VREFCA P7
DQL6 H7 P7
A1 P3
A1

DDR_DQ[7] H7 DDR_DQ[24-31] DDR_DQ[23]

DQL7
P3
A2 N2
A2
H1
K27 DDR_DQ[8-15] DQL7 B1 N2
A3 VREFDQ
H1
P8
A3 VREFDQ

DDR_QS2 DDR_DQSA_P_2 B1 VSSQ_1

P8
A4 P2
A4

K28 VSSQ_1 D7 B9 P2
A5 R8
A5
L8
DDR_QS2b DDR_DQ[8] D7 B9 DDR_DQ[24]
DQU0
R8 L8 A6 ZQ
DDR_DQSA_N_2 DQU0 VSSQ_2 VSSQ_2 R2
A6 ZQ R2
A7
C3 D1 DDR_DQ[30] C3 D1 T8
A7 T8
A8
DDR_DQ[14] DQU1 VSSQ_3 A8 R3 B2
K25 DQU1 VSSQ_3 C8 D8 R3
A9 VDD_1
B2
L7
A9 VDD_1
D9
DDR_QS3 DDR_DQ[13] C8 D8 DDR_DQ[29]
DQU2
L7 D9 A10/AP VDD_2
DDR_DQSA_P_3 DQU2 VSSQ_4 VSSQ_4 R7
A10/AP VDD_2
G7
R7
A11 VDD_3
G7
K26 C2 E2 DDR_DQ[28] C2 E2 N7
A11 VDD_3
K2
N7
A12/BC VDD_4
K2
DDR_QS3b DDR_DQSA_N_3 DDR_DQ[12] DQU3 VSSQ_5 A12/BC VDD_4 T3 K8
DQU3 VSSQ_5 A7 E8 T3
A13 VDD_5
K8 A13 VDD_5
N1
DDR_DQ[9] A7 E8 DDR_DQ[25]
DQU4
N1 VDD_6
DQU4 VSSQ_6 VSSQ_6 M7
VDD_6
N9
M7
NC_5 VDD_7
N9

A2 F9 DDR_DQ[26] A2 F9 NC_5 VDD_7

R1 VDD_8
R1
DDR_DQ[10] DQU5 VSSQ_7 VDD_8 M2 R9
DQU5 VSSQ_7 B8 G1 M2
BA0 VDD_9
R9
N8
BA0 VDD_9

DDR_DQ[15] B8 G1 DDR_DQ[31]
DQU6
N8 BA1
IC401-*2 IC401-*3 DQU6 VSSQ_8 VSSQ_8 M3
BA1 M3
BA2
IC402-*2 IC402-*3 A3 G9 DDR_DQ[27] A3 G9 BA2 A1
NT5CB128M16BP-CG NT5CB128M16BP-CG NT5CB128M16BP-DI NT5CB128M16BP-DI DDR_DQ[11] DQU7 VSSQ_9 VDDQ_1
A1
J7
VDDQ_1
A8
DQU7 VSSQ_9 J7
CK VDDQ_2
A8
K7
CK VDDQ_2
C1
K7 C1 CK VDDQ_3
DDR_1333_NANYA DDR_1333_NANYA DDR_1600_NANYA CK VDDQ_3 K9 C9
N3 M8 N3 M8 DDR_1600_NANYA K9 C9 CKE VDDQ_4
N3 M8 N3 M8 CKE VDDQ_4 D2
A0 VREFCA A0 VREFCA A0 VREFCA D2 VDDQ_5
P7 P7 P7 A0 VREFCA L2 E9
A1 A1 P7 VDDQ_5
P3 A1 P3 A1 L2 E9 CS VDDQ_6
P3 P3 CS VDDQ_6 K1 F1
A2 A2 A2 K1 F1 ODT VDDQ_7
N2 H1 N2 H1 N2 H1 A2 J3 H2
A3 VREFDQ A3 VREFDQ N2 H1 ODT VDDQ_7
P8 A3 VREFDQ P8 A3 VREFDQ J3 H2 RAS VDDQ_8
P8 P8 RAS VDDQ_8 K3 H9
A4 A4 A4 K3 H9 CAS VDDQ_9
P2 P2 P2 A4 L3
A5 A5 P2 CAS VDDQ_9
R8 L8 A5 R8 L8 A5 L3 WE
R8 L8 R8 L8 WE J1
A6 ZQ A6 ZQ A6 ZQ J1 NC_1
R2 R2 R2 A6 ZQ T2 J9
A7 A7 R2 NC_1
T8 A7 T8 A7 T2 J9 RESET NC_2
T8 T8 RESET NC_2 L1
A8 A8 A8 L1 NC_3
R3 B2 R3 B2 R3 B2 A8 L9
A9 VDD_1 A9 VDD_1 R3 B2 NC_3
L7 D9 A9 VDD_1 L7 D9 A9 VDD_1 L9 NC_4
L7 D9 L7 D9 NC_4 F3 T7
A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 F3 T7 DQSL NC_6
R7 G7 R7 G7 R7 G7 A10/AP VDD_2 G3
A11 VDD_3 A11 VDD_3 R7 G7 DQSL NC_6
N7 K2 A11 VDD_3 N7 K2 A11 VDD_3 G3 DQSL
N7 K2 N7 K2 DQSL
A12 VDD_4 A12 VDD_4 A12 VDD_4
T3 K8 T3 K8 T3 K8 A12 VDD_4 C7 A9
NC_6 VDD_5 NC_6 VDD_5 T3 K8
N1 NC_6 VDD_5 N1 NC_6 VDD_5 C7 A9 DQSU VSS_1
N1 N1 DQSU VSS_1 B7 B3
VDD_6 VDD_6 VDD_6 B7 B3 DQSU VSS_2
M7 N9 M7 N9 M7 N9 VDD_6 E1
NC_5 VDD_7 NC_5 VDD_7 M7 N9 DQSU VSS_2
R1 NC_5 VDD_7 R1 NC_5 VDD_7 E1 VSS_3
R1 R1 VSS_3 E7 G8
VDD_8 VDD_8 VDD_8 E7 G8 DML VSS_4
M2 R9 M2 R9 M2 R9 VDD_8 D3 J2
BA0 VDD_9 BA0 VDD_9 M2 R9 DML VSS_4
N8 BA0 VDD_9 N8 BA0 VDD_9 D3 J2 DMU VSS_5
N8 N8 DMU VSS_5 J8
BA1 BA1 BA1 J8 VSS_6
M3 M3 M3 BA1 E3 M1
BA2 BA2 M3 VSS_6
A1 BA2 A1 BA2 E3 M1 DQL0 VSS_7
A1 A1 DQL0 VSS_7 F7 M9
VDDQ_1 VDDQ_1 VDDQ_1 F7 M9 DQL1 VSS_8
J7 A8 J7 A8 J7 A8 VDDQ_1 F2 P1
CK VDDQ_2 CK VDDQ_2 J7 A8 DQL1 VSS_8
K7 C1 CK VDDQ_2 K7 C1 CK VDDQ_2 F2 P1 DQL2 VSS_9
K7 C1 K7 C1 DQL2 VSS_9 F8 P9
CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 F8 P9 DQL3 VSS_10
K9 C9 K9 C9 K9 C9 CK VDDQ_3 H3 T1
CKE VDDQ_4 CKE VDDQ_4 K9 C9 DQL3 VSS_10
D2 CKE VDDQ_4 D2 CKE VDDQ_4 H3 T1 DQL4 VSS_11
D2 D2 DQL4 VSS_11 H8 T9
VDDQ_5 VDDQ_5 VDDQ_5 H8 T9 DQL5 VSS_12
L2 E9 L2 E9 L2 E9 VDDQ_5 G2
CS VDDQ_6 CS VDDQ_6 L2 E9 DQL5 VSS_12
K1 F1 CS VDDQ_6 K1 F1 CS VDDQ_6 G2 DQL6
K1 F1 K1 F1 DQL6 H7
ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 H7 DQL7
J3 H2 J3 H2 J3 H2 ODT VDDQ_7 B1
RAS VDDQ_8 RAS VDDQ_8 J3 H2 DQL7
K3 H9 RAS VDDQ_8 K3 H9 RAS VDDQ_8 B1 VSSQ_1
K3 H9 K3 H9 VSSQ_1 D7 B9
CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 D7 B9 DQU0 VSSQ_2
L3 L3 L3 CAS VDDQ_9 C3 D1
WE WE L3 DQU0 VSSQ_2
J1 WE J1 WE C3 D1 DQU1 VSSQ_3
J1 J1 DQU1 VSSQ_3 C8 D8
NC_1 NC_1 NC_1 C8 D8 DQU2 VSSQ_4
T2 J9 T2 J9 T2 J9 NC_1 C2 E2
RESET NC_2 RESET NC_2 T2 J9 DQU2 VSSQ_4
L1 RESET NC_2 L1 RESET NC_2 C2 E2 DQU3 VSSQ_5
L1 L1 DQU3 VSSQ_5 A7 E8
NC_3 NC_3 NC_3 A7 E8 DQU4 VSSQ_6
L9 L9 L9 NC_3 A2 F9
NC_4 NC_4 L9 DQU4 VSSQ_6
F3 T7 NC_4 F3 T7 NC_4 A2 F9 DQU5 VSSQ_7
F3 T7 F3 T7 DQU5 VSSQ_7 B8 G1
DQSL NC_7 DQSL NC_7 DQSL NC_7 B8 G1 DQU6 VSSQ_8
G3 G3 G3 DQSL NC_7 A3 G9
DQSL DQSL G3 DQU6 VSSQ_8
DQSL DQSL A3 G9 DQU7 VSSQ_9
DQU7 VSSQ_9
C7 A9 C7 A9 C7 A9
DQSU VSS_1 DQSU VSS_1 C7 A9
B7 B3 DQSU VSS_1 B7 B3 DQSU VSS_1
B7 B3 B7 B3
DQSU VSS_2 DQSU VSS_2 DQSU VSS_2
E1 E1 E1 DQSU VSS_2
VSS_3 VSS_3 E1
E7 G8 VSS_3 E7 G8 VSS_3
E7 G8 E7 G8
DML VSS_4 DML VSS_4 DML VSS_4
D3 J2 D3 J2 D3 J2 DML VSS_4
DMU VSS_5 DMU VSS_5 D3 J2
J8 DMU VSS_5 J8 DMU VSS_5
J8 J8
VSS_6 VSS_6 VSS_6
E3 M1 E3 M1 E3 M1 VSS_6
DQL0 VSS_7 DQL0 VSS_7 E3 M1
F7 M9 DQL0 VSS_7 F7 M9 DQL0 VSS_7
F7 M9 F7 M9
DQL1 VSS_8 DQL1 VSS_8 DQL1 VSS_8
F2 P1 F2 P1 F2 P1 DQL1 VSS_8
DQL2 VSS_9 DQL2 VSS_9 F2 P1
F8 P9 DQL2 VSS_9 F8 P9 DQL2 VSS_9
F8 P9 F8 P9
DQL3 VSS_10 DQL3 VSS_10 DQL3 VSS_10
H3 T1 H3 T1 H3 T1 DQL3 VSS_10
DQL4 VSS_11 DQL4 VSS_11 H3 T1
H8 T9 DQL4 VSS_11 H8 T9 DQL4 VSS_11
H8 T9 H8 T9
DQL5 VSS_12 DQL5 VSS_12 DQL5 VSS_12
G2 G2 G2 DQL5 VSS_12
DQL6 DQL6 G2
H7 DQL6 H7 DQL6
H7 H7
DQL7 DQL7 DQL7
B1 B1 B1 DQL7
VSSQ_1 VSSQ_1 B1
D7 B9 VSSQ_1 D7 B9 VSSQ_1
D7 B9 D7 B9
DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2
C3 D1 C3 D1 C3 D1 DQU0 VSSQ_2
DQU1 VSSQ_3 DQU1 VSSQ_3 C3 D1
C8 D8 DQU1 VSSQ_3 C8 D8 DQU1 VSSQ_3
C8 D8 C8 D8
DQU2 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4
C2 E2 C2 E2 C2 E2 DQU2 VSSQ_4
DQU3 VSSQ_5 DQU3 VSSQ_5 C2 E2
A7 E8 DQU3 VSSQ_5 A7 E8 DQU3 VSSQ_5
A7 E8 A7 E8
DQU4 VSSQ_6 DQU4 VSSQ_6 DQU4 VSSQ_6
A2 F9 A2 F9 A2 F9 DQU4 VSSQ_6
DQU5 VSSQ_7 DQU5 VSSQ_7 A2 F9
B8 G1 DQU5 VSSQ_7 B8 G1 DQU5 VSSQ_7
B8 G1 B8 G1
DQU6 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8
A3 G9 A3 G9 A3 G9 DQU6 VSSQ_8
DQU7 VSSQ_9 DQU7 VSSQ_9 A3 G9
DQU7 VSSQ_9 DQU7 VSSQ_9

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN DDR 4 50
 NEC MICOM

FLMD0
GND

+3.5V_ST

10K
47K
C602 C603 R641
50V 50V MICOM_DOWNLOAD

OPT

R639
13pF 13pF 0

R637
X601

For Debug 10MHz

15pF

15pF

WIRELESS_PWR_EN
C606

C607
P601 +3.5V_ST

WIRELESS_DET
12505WS-12A00

MICOM_RESET
1 X602
+3.5V_ST

2
MICOM_RESET 32.768KHz
3 R615 22
NEC_ISP_Tx R642 +3.5V_ST
10Mhz Crystal
4 4.7M
R617 22 OPT
5 NEC_ISP_Rx

47K
6

7
OCD1A
8

P122/X2/EXCLK/OCD0B

R644
9
OCD1B GND SW1
+3.5V_ST
10
JTP-1127WEM
2 1

22

P120/INTP0/EXLVI
R621 22

270K
11
FLMD0

OPT
C608

R645
P124/XT2/EXCLKS
0.1uF

0.1uF
12
4 3
R606 10K 16V

P121/X1/OCD0A
13

R643
C604
0.1uF

C605

P123/XT1
R607 10K +3.5V_ST R647 20K
NEC_ISP_Rx
R610 10K 1/16W

FLMD0

RESET
NEC_ISP_Tx 1%

REGC

1/16W
R646
VDD
VSS

P40
P41

20K

1%
R626 4.7K

R628 4.7K

48
47
46
45
44
43
42
41
40
39
38
37
R629 22
P60/SCL0 1 36 P140/PCL/INTP6 RL_ON
SCL2_3.3V

R630 22
P61/SDA0 2 35 P00/TI000
SDA2_3.3V SCART_MUTE
P62/EXSCL0 3 34 P01/TI010/TO00 R648 10K C
EDID_WP

EEPROM for Micom EEPROM_SCL

P63 P130 B Q601

4 33 2SC3052
EEPROM_SDA
P33/TI51/TO51/INTP4 IC602 P20/ANI0 E
+3.5V_ST HDMI_CEC
R631 22
5 32 R649 0

OPT
P75 6 uPD78F0514 31 ANI1/P21
POWER_ON/OFF2_1 MODEL1_OPT_3
IC601 P74 ANI2/P22
M24C16-WMN6T AMP_MUTE 7 30 MODEL1_OPT_2
P73/KR3 NEC_MICOM ANI3/P23
MODEL1_OPT_0 8 29 POWER_ON/OFF1
NC/E0 VCC
1 8 R632 22 P72/KR2 9 28 ANI4/P24
R601

SOC_RESET MICOM_DOWNLOAD
47K

NC/E1
2 7
WC P71/KR1 10 27 ANI5/P25
INV_CTL SIDE_HP_MUTE

NC/E2 SCL R619

P70/KR0 11 26 ANI6/P26
3 6 EEPROM_SCL MODEL1_OPT_1 KEY2
R633
22
22 P32/INTP3/OCD1B 12 25 ANI7/P27
VSS SDA R616 OCD1B KEY1
4 5 EEPROM_SDA OPT
22

13
14
15
16
17
18
19
20
21
22
23
24
S/T_SCL

R627
4.7K

P31/INTP2/OCD1A
P30/INTP1
P17/TI50/TO50
P16/TOH1/INTP5
P15/TOH0
P14/RXD6
P13/TXD6
P12/SO10
P11/SL10/RXD0
P10/SCK10/TXD0
AVREF
AVSS
+3.5V_ST

+3.5V_ST

MODEL OPTION

PIN NAME

C609 1uF
PIN NO. HIGH LOW
MICOM MODEL OPTION MODEL_OPT_0 8
10YEAR_TOOL
(10 SENSOR)
11YEAR_TOOL
(11 SENSOR)

MODEL_OPT_1 11 I2C_LED PWM_LED

+3.5V_ST
MODEL_OPT_2 30 TOUCH_KEY TACT_KEY

MODEL_OPT_3
10K

10K

10K

10K

31 PDP/3D LCD/OLED
10YEAR_TOOL
TOUCH_KEY

I2C LED
PDP/3D

OPT
R611

R613

R622

R624

LCD PDP OLED 3D

R604 100
AMP_RESET_N

10K
MODEL1_OPT_0 MODEL_OPT_3

22
R605 100 0 1 0 1 +3.5V_ST
PANEL_CTL MODEL1_OPT_1
R602 100
INSTANT_MODE MODEL1_OPT_2
R603 100
MODEL1_OPT_3

R638

R640
LOW LOW_SMALL TBD HIGH
10K

10K

10K

10K
11YEAR_TOOL

R636
LCD/OLED

TACT_KEY

PWM_LED

4.7K
MODEL_OPT_1 0 0 1 1
R612

R614

R623

R625

MODEL_OPT_2 0 1 0 1

LED_R/BUZZ
LED_B/LG_LOGO
POWER_DET

IR

NEC_ISP_Tx

NEC_TXD
NEC_ISP_Rx

POWER_ON/OFF2_2

NEC_RXD
OCD1A
S/T_SDA

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MICOM 6 50
 DUAL COMPONENT

D707,D708
D710,D711 1ST : 0DD184009AA 2ND : 0DSIH00028A
BODY_SHIELD
D713 1ST : T-BAT54_SUZHO, 2ND : 0DSON00138A
5V_HDMI_1 GND 5V_HDMI_4
BODY_SHIELD
HDMI_HPD_1 HDMI_HPD_4
20 20
VR706 R728 HP_DET VR708 R729
HP_DET 10V 1K
10V 1K R727
19 R737 19 OPT OPT
5V 0 C714 OPT OPT 5V 0 C717
0.1uF 18 0.1uF
18 VR703 GND R735 VR707 OPT 16V
OPT
17
GND R730
3.6K 10V
OPT
16V
OPT 17
3.6K
OPT
10V
OPT OPT * HDMI CEC
DDC_DATA OPT DDC_DATA
DDC_SDA_1 DDC_SDA_4
16 16
DDC_CLK DDC_CLK
DDC_SCL_1 15 DDC_SCL_4
15
NC
ARC
14 14
CE_REMOTE CE_REMOTE
CEC_REMOTE CEC_REMOTE
13 13 +3.3V_Normal +3.3V_HDMI
CK- CK-
CK-_HDMI1 12
CK-_HDMI4 +3.5V_ST
12 HDMI_ARC CK_GND
CK_GND ARC L701

EAG62611201
EAG62611201

11 11 BLM18PG121SN1D
CK+ CK+
10 R775 10 CK+_HDMI4
CK+_HDMI1
C730 150 D0-
D0- 0.1uF 9
9 D0-_HDMI1 D0-_HDMI4 C720
D0_GND R754 C718 C719
D0_GND 0.1uF

G
8 R776 8 27K 10uF 10uF
16V
D0+ 63.4 D0+
7 7 D0+_HDMI4
D0+_HDMI1
D1- D1- R741
6 6 D1-_HDMI4

D
B
S
D1-_HDMI1 D713 Q710 120K
D1_GND D1_GND BSS83
5 5 BAT54_SUZHO
D1+ D1+
4 4 D1+_HDMI4
D1+_HDMI1
D2- D2-
3 CEC_REMOTE HDMI_CEC
3 D2-_HDMI1 D2-_HDMI4
D2_GND D2_GND
2 2
D2+ D2+
1 1 D2+_HDMI4
D2+_HDMI1

JK703 RSD-105156-100
RSD-105156-100 JK704

HDMI1 HDMI4
+3.3V_HDMI

+5V_Normal +5V_Normal
5V_HDMI_1 5V_HDMI_2

A2

A1

A2

A1
BODY_SHIELD 5V_HDMI_2
C707 C706 C711 C713
HDMI_HPD_2 D707 D710 10uF 10uF 0.1uF 0.1uF
20 10V 10V 16V 16V HDMI1 HDMI S/W OUTPUT

C
HP_DET VR704 R736

D2-_HDMI1

D1+_HDMI1

D1-_HDMI1

D0+_HDMI1

D0-_HDMI1

CK+_HDMI1

CK-_HDMI1
D2+_HDMI1

HDMI_CLK-

HDMI_RX0-

HDMI_RX0+

HDMI_RX1-

HDMI_RX1+

HDMI_RX2-

HDMI_RX2+
HDMI_CLK+
10V 1K
19 R725 C701 C703 C712
5V 0 C715 OPT OPT
10uF 0.1uF 0.1uF
0.1uF R713 R715 R720 R723
18 VR701 OPT 10V 16V 16V
GND R740 16V 4.7K 4.7K 4.7K
3.6K 10V 4.7K
OPT OPT
17 OPT
DDC_DATA
DDC_SDA_2 DDC_SDA_1 DDC_SDA_2
16
DDC_CLK
15 DDC_SCL_2 DDC_SCL_1 DDC_SCL_2
NC
14
CE_REMOTE
CEC_REMOTE
13
CK-
CK-_HDMI2
12
CK_GND
EAG62611201

11
CK+ +5V_Normal
10 +5V_Normal
CK+_HDMI2 5V_HDMI_3 5V_HDMI_4
D0-
9 D0-_HDMI2
D0_GND
A2

A1

A2

A1
8

TPWR_CI2CA
D0+
7 D0+_HDMI2 D708 D711
D1-
C

[EP]GND

VCC33_3
6 D1-_HDMI2
D1_GND

R0X2P
R0X2N
R0X1P
R0X1N
R0X0P
R0X0N
R0XCP
R0XCN
5 R777 OPT R780 33

TXCN
TXCP
TX0N
TX0P
TX1N
TX1P
TX2N
TX2P
4.7K SCL1_3.3V
D1+ R714 R716 R721 R724
4 D1+_HDMI2 4.7K 4.7K
4.7K 4.7K
3
D2- OPT R781 33 SDA1_3.3V
D2-_HDMI2 DDC_SDA_4
D2_GND
DDC_SDA_3

72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
2 DDC_SCL_4
D2+ R778
1 D2+_HDMI2 DDC_SCL_3 HDMI2 R1XCN 1 54 CSCL 33
SCL3_3.3V
CK-_HDMI2
R1XCP 2 53 CSDA
SDA3_3.3V
CK+_HDMI2 THERMAL
R1X0N 3 73 52 INT R779
33
JK701 D0-_HDMI2
R1X0P 4 51 CEC_D
RSD-105156-100
HDMI2 EDID Pull-up D0+_HDMI2
R1X1N CEC_A +5V_Normal
D1-_HDMI2
5 50
R1X1P 6 49 R4PWR5V R706
C710
D1+_HDMI2
R1X2N DSCL4 0
D2-_HDMI2
7 IC701 48 1uF
5V_HDMI_4
R1X2P DSDA4 10V
D2+_HDMI2
8 SII9287B 47
R717
VCC33_1 9 46 R3PWR5V 10

RSVD_1 10 45 CBUS_HPD3
HDMI_HPD_4 1/16W
HDMI3 R2XCN 11 44 DSCL3 C705 R711
5V_HDMI_3 CK-_HDMI3 DDC_SCL_4 1K 5V_HDMI_3
BODY_SHIELD 1uF
R2XCP 12 43 DSDA3 1%
HDMI_HPD_3
CK+_HDMI3 DDC_SDA_4 R718
20 R2X0N R2PWR5V 10
HP_DET VR705 R726
D0-_HDMI3
13 42
1K
19 R731 10V
OPT
R2X0P 14 41 CBUS_HPD2
5V 0 C716 OPT HDMI_HPD_3 1/16W
D0+_HDMI3
0.1uF R2X1N DSCL2 C702 R705
18
GND R739 VR702 OPT 16V D1-_HDMI3
15 40 1K
10V DDC_SCL_3 1uF
3.6K OPT R2X1P DSDA2 1%
17
DDC_DATA OPT OPT
D1+_HDMI3
16 39
DDC_SDA_3
DDC_SDA_3 R2X2N SBVCC
16
DDC_CLK 17 38
D2-_HDMI3
15 DDC_SCL_3 R2X2P 18 37 MICOM_VCC33
NC D2+_HDMI3
C708

19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
14
CE_REMOTE 1uF
CEC_REMOTE
13
CK-
CK-_HDMI3

R3XCN
R3XCP
R3X0N
R3X0P
R3X1N
R3X1P
R3X2N
R3X2P
VCC33_2
RSVD_2
DSDA0
DSCL0
CBUS_HPD0
R0PWR5V
DSDA1
DSCL1
CBUS_HPD1
R1PWR5V
12
CK_GND
5V_HDMI_2
EAG62611201

11
CK+
10 R712
CK+_HDMI3 10
D0-
9 D0-_HDMI3
D0_GND
8 1/16W
C709 R707
D0+ 1K
7 D0+_HDMI3 1uF
1%
D1-
6 D1-_HDMI3
D1_GND 5V_HDMI_1
5
D1+ R708
4 D1+_HDMI3 10
D2-
3 D2-_HDMI3
D2_GND 1/16W
2 C704 R703
D2+ 1uF 1K
1 D2+_HDMI3 1%

DDC_SDA_1

DDC_SCL_1

DDC_SDA_2

DDC_SCL_2
HDMI_HPD_1

HDMI_HPD_2
D2+_HDMI4
CK-_HDMI4

CK+_HDMI4

D0-_HDMI4

D0+_HDMI4

D1-_HDMI4

D2-_HDMI4
D1+_HDMI4
JK702
RSD-105156-100

HDMI3
HDMI4

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 7 31
 RGB/ PC AUDIO/ SPDIF/ EARPHONE/ RS232C

DUAL COMPONENT

RGB PC D810
KDS184
A2
+5V_Normal
EARPHON JACK D804,D805,D806
D807,D808,D813
D814
1ST : EAH39491601, 2ND : EAH33945901
C
A1 D810 1ST : 0DD184009AA, 2ND : 0DSIH00028A
JK803
+3.3V_Normal KJA-PH-0-0177
+5V_Normal
Q801 1ST : 0TRIY80001A, 2ND : 0TR387500AA
GND 5
IC801
74F08D R822
R814 R815 R817 IC805 1ST : EAN61151201, 2ND : EAN61130001
IC802 2.7K L 4
2.7K 2.7K 10K HP_LOUT
D0A VCC AT24C02BN-SH-T
1 14

A0 VCC
DETECT 3
D0B D3B 1 8 HP_DET
DSUB_VSYNC 22 R801 2 13 1K R821
A1 WP
Q0 D3A
2 7
EDID_WP R 1
3 12 HP_ROUT
A2 SCL R848 22
DSUB_HSYNC 22 R802 3 6
RGB_DDC_SCL
R850 0 D1A
4 11
Q3 EAG61030001
GND SDA R847 22
4 5
OPT RGB_DDC_SDA OPT
R851 0 D1B D2B R852 0 R825 0
5 10
C809 C810 SPK_R+_HOTEL
OPT OPT
Q1 D2A R853 0 18pF 18pF OPT
6 9
50V 50V R826 0
OPT SPK_R-_HOTEL
GND Q2
7 8

R807 C807 D809

10K D804 22pF
50V 5.6V
OPT 30V
OPT

+3.3V_Normal

R808 C808
D811 EARPHONE AMP
D805 22pF 5.6V L803
10K
30V 50V OPT 120-ohm
OPT
BLM18PG121SN1D
LPF READEY
BLM15BD121SN1 (For H/P Noise Improvement)
L806 C822 C824

ESD_CERADIODE
10uF 0.1uF
10V 16V

D808-*1
DSUB_B+ R868 L804
ESD_COMMON 0 BG2012B080TF

5.6V
C830 D808 HP_LOUT
R812 30V
47pF C828
75 Close to the IC C821
50V 0.22uF
1uF
10V
10V

OUTL

SGND

VDD
+3.3V_Normal

EN
R837
BLM15BD121SN1 C825 100K
C816 16 15 14 13 2.2uF OPT
L807 1uF R842 OPT
ESD_CERADIODE
+3.3V_Normal INL- HPVDD 10V
10V 4.7K R843
1 12
DSUB_G+ D806-*1 HP_LOUT_N 0
ESD_COMMON C817
5.6V

C831 D806 R819 1uF C

R811 10K 10V INL+ CPP R844
47pF 30V 2 11
75 HP_LOUT_P Q801 B 1K
50V C818 IC804 C826 2SC3052 SIDE_HP_MUTE
1uF TPA6132A2 2.2uF
10V INR+ PGND 10V
DSUB_DET 3 10 E
1K R820 HP_ROUT_P
C819
1uF

ESD_COMMON
10V INR- CPN
4 EAN60724701 9
BLM15BD121SN1 HP_ROUT_N
D812
L808 5.6V D812-*1
ESD_CERADIODE

5.6V 5 6 7 8

4.7K
R827
D807-*1

DSUB_R+ ESD_CERADIODE

4.7K
R823

OUTR

G0

G1

HPVSS
ESD_COMMON
C832
5.6V

R813 D807
75 47pF 30V
50V
R869 L805
0 BG2012B080TF

OPT
R828
OPT
R824
HP_ROUT
C823 C829
2.2uF 0.22uF
11 10V

12

13

14

10
15
10V
6

1
7

2
8

3
9

5
Closed to JACK 11

12

13

14

15

16
16
10
6

RS232C
1

5
JK804
SLIM-15F-D-2 10
5

9
0 R838
IR_OUT 4
IR_OUT
8

PC AUDIO +3.5V_ST
100 R833 JP809

7
3

JP810
100 R834
JK801 2

ESD_COMMON
KJA-PH-0-0177 D814

ESD_COMMON
5 GND 6
IC803 30V
D813
R866 MAX3232CDR 1
4 L 22 30V
PC_L_IN
D801

ESD_CERADIODE

ESD_CERADIODE
3 DETECT C801 C804 0.1uF C812 C1+ VCC
AMOTECH R804 1 16 SPG09-DB-009
5.6V 560pF 560pF

D813-*1

D814-*1
470K
ESD_COMMON 50V 50V JK805

5.6V

5.6V
1 R V+ GND
0.1uF C813 2 15

C1- DOUT1
3 14
R867
22
PC_R_IN C2+ RIN1
0.1uF C814 4 13
+3.5V_ST
D802
C802 C805
AMOTECH R805 C2- ROUT1
470K 560pF 560pF 5 12
5.6V 50V 50V
ESD_COMMON
R860 R861
0.1uF C815 V- DIN1
6 11 4.7K 4.7K
OPT OPT
DOUT2 DIN2
7 10
R862
0
RIN2 ROUT2

SPDIF OUT +3.3V_Normal

JK802
2F11TC1-EM52-4F

VIN
8

EAN41348201
9
R863
0
BCM_RX

A NEC_RXD
Fiber Optic

R864
0
VCC B BCM_TX
R806
2.7K R865
R803 0
0 GND C NEC_TXD
SPDIF_OUT
D803 C803 4
30V 0.1uF
16V
SHIELD

OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230 2010.10.21
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. COMMON JACK 8 58
 DUAL COMPONENT

Q901,Q902,Q903
Q904,Q905,Q906 1ST : 0TRIY80001A 2ND : 0TR387500AA
D903,D904
D905,D906 1ST : EAH42720601, 2ND : EAH60994401

+3.5V_ST

IR & KEY
IR_12P IR_15P
EEPROM_SCL R933
100 P902 P901
R919 R920 12507WR-12L 12507WR-15L
10K 10K D905
1% 1% CDS3C05HDMI1
5.6V
EEPROM_SCL
R915 1 1
+3.5V_ST 100
KEY1 R934
EEPROM_SDA 100 EEPROM_SDA
R916 D902 2 2
+3.5V_ST 100 5.6V
R903 KEY2 D906
47K AMOTECH CDS3C05HDMI1
C901 C903 GND
5.6V 3 3
0.1uF 0.1uF
R905 +3.5V_ST D901
IR
47K 5.6V KEY1
R904 AMOTECH 4 4
Q901 C 10K +3.5V_ST
B R909
2SC3052
E 3.3K KEY2
R908 OPT 5 5
C 47K
L901
B
BLM18PG121SN1D
Q902 E 3.5V
2SC3052 6 6

R928 1.5K GND

C902 C904 C905 7 7
0.1uF 0.1uF 1000pF LED_B/LG_LOGO
R902 16V 16V 50V
0 OPT OPT LED_B/LOGO
OPT 8 8

IR
9 9
D907
C911 5.6V
100pF AMOTECH GND
+3.5V_ST +3.3V_Normal 50V 10 10
COMMERCIAL L902
BLM18PG121SN1D
3.3V
+3.5V_ST 11 11
R911
47K
R906 COMMERCIAL_EU C912 C913 R929 LED_R/BUZZ
22 0.1uF 0.1uF LED_R/BUZZ 12 12
IR_OUT R917 16V 16V
47K 1.5K
COMMERCIAL ESD_ATSC ESD_ATSC
R913 COMMERCIAL 13 GND
Q903 C 10K 13
2SC3052 B
COMMERCIAL_EU E R921 S/T_SCL R935
100 S/T_SCL
COMMERCIAL_EU C 47K 14
B
Q905 E COMMERCIAL
2SC3052 ST_SDA
D903 15
COMMERCIAL CDS3C05HDMI1
5.6V
COMMERCIAL_US 16
R910 R936
0 S/T_SDA 100
.

D904
CDS3C05HDMI1
5.6V

WIRELESS +3.5V_ST

R912
47K
+3.5V_ST
Zener Diode is
R907 WIRELESS
22
R918
IR_PASS
WIRELESS
C
R914
47K
WIRELESS
close to wafer
Q904 10K
2SC3052 B
WIRELESS E WIRELESS R922
C 47K
B
Q906 E WIRELESS
2SC3052
WIRELESS

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR/KEY 9 50
WIRELESS READY MODEL

DUAL COMPONENT

D1001,D1002 1ST : EAH42720601 2ND : EAH60994401

Q1001 1ST : EBK61012601, 2ND : 0TRDI80002A

Q1002 1ST : EBK60752501, 2ND : EBK61011501

JK1001
KJA-PH-3-0168

Wireless power VCC(24V/20V/17V)_1

1
WIRELESS

VCC(24V/20V/17V)_2
2
VCC(24V/20V/17V)_3
3
VCC(24V/20V/17V)_4
4
VCC(24V/20V/17V)_1
+24V 5
VCC(24V/20V/17V)_1
6
DETECT
+3.3V_Normal 7
INTERRUPT
R1002 C1002 8
22K 2.2uF GND_1
WIRELESS WIRELESS
S R1008 9
10K RESET
G WIRELESS 10
R1003 Q1002 R1007 1K GND_2
L1001 11
2.2K AO3407A D WIRELESS_DET
MLB-201209-0120P-N2 WIRELESS I2C_SCL
WIRELESS WIRELESS 12
C WIRELESS WIRELESS_SCL
R1001 I2C_SDA
WIRELESS_PWR_EN 10K B WIRELESS_SDA 13
WIRELESS Q1001 C1004 GND_3
MMBT3904(NXP) 14
WIRELESS 10uF
E UART_RX
35V 15
WIRELESS UART_TX
16
GND_4
17
IR
IR_PASS 18
GND_5
19

CDS3C05HDMI1

CDS3C05HDMI1
GND_6 20

WIRELESS

WIRELESS
D1001

D1002
21

5.6V

5.6V
SHIELD

Wireless I2C connection with I2C_1

Address : 0X20
R1005 33
WIRELESS_SCL SCL2_3.3V
WIRELESS
R1006 33
WIRELESS_SDA SDA2_3.3V
WIRELESS

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. WIRELESS 10 50
 CVBS 1 PHONE JACK
+3.3V_Normal CVBS2 REAR JACK
AV2
R1141
22
R1112
2.7K AV2_R_IN
R1113 D1109
1K AMOTECH R1116 C1118 C1123
AV1_CVBS_DET 5.6V AV2 470K 560pF 560pF
AV2 50V 50V
AV2 AV2 AV2
D1105
5.6V R1142
22
AV2_L_IN
JK1102
D1110
KJA-PH-1-0177 C1119
AMOTECH R1117 C1124
5 M5_GND 5.6V 470K 560pF
AV2 560pF
JK1104 AV2 50V 50V
R1136 AV2
10 PPJ233-01 AV2
4 M4
AV1_CVBS_IN AV2_JACK [RD]E-LUG
5C
ZD1115
3 M3_DETECT 5.1V
R1109 C1106 [RD]O-SPRING AV2
47pF 4C R1140
ZD1116 75 10
1 M1 5.1V 50V AV2_CVBS_IN
1% [RD]CONTACT
3C ZD1101 C1120
AV2 R1118
6 M6 5.1V AV2 75 47pF
4B [WH]C-LUG 50V
JACK_PACK ZD1102
AV2 5.1V AV2
R1143 JK1105
22 3A [YL]CONTACT
PPJ238-01
AV1_L_IN
6C [RD1]E-LUG
[YL]O-SPRING +3.3V_Normal
R1110 4A
D1107 C1107 C1109
470K [RD1]O-SPRING
5.6V 560pF 560pF 5C
5A [YL]E-LUG
50V 50V R1128
4C [RD1]CONTACT 2.7K
AV2
AV2_CVBS_DET
5B [WH1]O-SPRING
R1129
1K
D1111 AV2
R1144 4A [YL1]CONTACT
AV2
22 5.6V
AV1_R_IN
5A [YL1]O-SPRING

D1108 R1111
5.6V 470K C1108 C1110 [YL1]E-LUG
6A
560pF 560pF
50V 50V
6H [RD2]E-LUG

5H [RD2]O-SPRING_2

4H [RD2]CONTACT

5G [WH2]O-SPRING
COMP2 REAR JACK
5F [RD2]O-SPRING_1

7F [RD2]E-LUG-S

5E [BL2]O-SPRING

7E [BL2]E-LUG-S

4D [GN2]CONTACT

5D [GN2]O-SPRING
COMP2
BLM18PG121SN1D R1131
L1103 22
6D [GN2]E-LUG SC/COMP2_R_IN
COMP2 COMP2
R1122
D1112 470K C1121
C1113 560pF
5.6V 560pF 50V
50V COMP2
COMP2 COMP2 COMP2
BLM18PG121SN1D R1132
L1104 22
SC/COMP2_L_IN
COMP2 COMP2 COMP2
D1113 COMP2 C1122
COMPONENT 1 PHONE JACK 5.6V
R1123
470K
C1114
560pF
50V
560pF
50V
COMP2
COMP2 L1109
CM2012FR27KT
R1119 R1133
0 10 SC_R/COMP2_Pr
COMP2_Pr COMP2_Pr

+3.3V_Normal ZD1103
COMP2 5.1V COMP2 COMP2 C1115 C1128
R1124 27pF 27pF
ZD1104 75
COMP2 5.1V 50V 50V
R1105
2.7K
COMP2
R1114 L1108
1K R1120 R1134 CM2012FR27KT
COMP1_DET 0 10
COMP2_Pb
COMP2_Pb SC_B/COMP2_Pb
ZD1105 COMP2 COMP2 C1116 C1129
COMP2 5.1V
D1101 R1125 27pF 27pF
5.6V 75
ZD1106 50V 50V
JK1101 COMP2 5.1V
KJA-PH-1-0177 L1107-*1
CM2012FR10KT
5 M5_GND COMP2
L1110 L1107
R1137 CM2012FR10KT R1121 CM2012FR27KT COMP_NON_EU
R1135
4 M4 10 0 10
COMP1_Y COMP2_Y SC_G/COMP2_Y
COMP2_Y
ZD1117 ZD1107 COMP2 COMP_NON_EU COMP_EU COMP_NON_EU
3 M3_DETECT 5.1V R1106 C1102 C1125 COMP2 5.1V COMP2 C1117 C1130
75 47pF 47pF R1126 C1117-*1 C1130-*1
75 47pF 27pF 27pF 47pF
ZD1110 50V 50V ZD1108
1 M1 1% 50V 50V 50V 50V
5.1V COMP2 5.1V
COMP_EU COMP_EU
L1111
6 M6 R1138 CM2012FR27KT
10 +3.3V_Normal FOR EMI
COMP1_Pb

C1103 C1126 COMP2

ZD1111
27pF 27pF R1127
5.1V R1107
75 50V 50V 2.7K 1K R1130
ZD1112 SC_DET/COMP2_DET
5.1V 1%

COMP2 COMP2
L1112 D1114
R1139 CM2012FR27KT
10 5.6V
COMP1_Pr
ZD1113 C1104 C1127
5.1V R1108 27pF 27pF
75
50V 50V
ZD1114
1%
5.1V
FOR EMI

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. COMP/AV 11 50
 TI solution M_REMOTE OPTION

+3.3V_Normal +3.3V_Normal

P1302
12507WR-12L
L1303
M_REMOTE 120-ohm
3.3V M_REMOTE
1

GND
2
R1321 R1322 R1323
M_REMOTE
R1315 2.7K 2.7K 2.7K
RX 100
3 M_REMOTE_RX M_REMOTE M_REMOTE M_REMOTE
M_REMOTE
R1316
TX 100
4 M_REMOTE_TX
M_REMOTE
R1317
RESET 100
5 M_RFModule_RESET
M_REMOTE
R1318
DC 100
6 DC_MREMOTE
M_REMOTE
R1319
DD 100
7 DD_MREMOTE

GND
8
3D_M_REMOTE
R1320
GPIO_0 22
9 3D_GPIO_0
3D_M_REMOTE
R1324
GPIO_1 22
10 3D_GPIO_1
3D_M_REMOTE
R1325
GPIO_2 22
11 3D_GPIO_2
3D_M_REMOTE
R1326
3D_SYNC 22
12 3D_SYNC_RF

13

ALL M_REMOTE OPTION

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M_REMOCON 13 50
 Ethernet Block D1401,D1402
D1403,D1404
DUAL COMPONENT

1ST : EAH42720601 2ND : EAH60994401

D1405,D1406

+2.5V_BCM35230

L1401
MLB-201209-0120P-N2
JK1401
XRJH-01A-4-DA7-180-LG(B) C1401
0.1uF
16V

R1
1

R2
2
EPHY_TDP

R3
3
EPHY_TDN

R4
4
EPHY_RDP

R5
5
EPHY_RDN

R6
6 D1401 D1402 D1404 D1406
5.5V 5.5V 5.5V 5.5V
R7 LAN_ESD LAN_ESD LAN_ESD LAN_ESD
7

R8
8

R9
9

R10[GND]
10
+3.3V_Normal

R11
11

YL_C
D1
EPHY_ACTIVITY

YL_A R1401 240

D2

GN_C
D3
EPHY_LINK

GN_A R1402 240

D4
D1403 D1405
5V 5V
12
LAN_ESD LAN_ESD

SHIELD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. ETHERNET 14 50
 DUAL COMPONENT +3.3V_Normal AMP_RESET_N

C1834
1000pF
Q1801 1ST : 0TRIY80001A 2ND : 0TR387500AA 50V

50V
L1803
+24V_AMP

22000pF
BLM18PG121SN1D

C1837
OPT
AUD_MASTER_CLK R1851
3.3

+24V_AMP OPT
+24V
C1881

OUT1A_2
OUT1A_1
PVDD1_3
PVDD1_2
PVDD1_1
C1842 C1846 C1848
0.1uF 0.1uF 10uF 0.01uF

VDD_IO

GND_IO

/RESET

PGND1A
C1832 C1883 50V 50V 35V 50V

CLK_I

BST1A
0.1uF 10uF
L1801

[EP]
10V SPK_L+
MLB-201209-0120P-N2 16V
D1805

AD
1N4148W R1823 R1834
12 12 L1810
100V 10.0uH C1877 R1839
OPT OPT 0.1uF
OPT C1819 C1825 4.7K
C1801 C1802 C1810 C1814 10uF 0.1uF C1863 50V
0.1uF 0.1uF 390pF NRS6045T100MMGK
50V 50V 10uF 0.1uF 10V 16V 50V C1871
10V 16V 0.47uF
L1811

48
47
46
45
44
43
42
41
40
39
38
37
C1806
1000pF
50V
10.0uH 50V
SPEAKER_L
C1804 C1864 C1878
100pF R1815 AGND_PLL 1 36 OUT1B_2 D1806
390pF
50V
NRS6045T100MMGK 0.1uF
50V
R1840
50V 3.3K 1N4148W R1824 R1832 4.7K
AVDD_PLL 2 35 OUT1B_1 100V
OPT
12 12
THERMAL SPK_L-
DVDD_PLL 3 49 34 PGND1B C1853
22000pF
P1801 P1801-*1
LF 4 33 BST1B 50V
SMAW250-H04R TJC2508-4A

DGND_PLL IC1802 VDR1

5 32
OPT
C1820
10uF
GND_1 6 NTP-7400L 31 VCC_5 SPK_L+
4 4
C1826
10V 0.1uF
16V DGND 7 30 GND_2 SPK_L-
3 3

DVDD 8 29 VDR2
C1856 C1858 C1868 SPK_R+
2 2
SDATA 9 28 BST2A 1uF
25V
1uF
25V
1uF
25V
AUD_LRCH
SPK_R-
WCK 10 27 PGND2A C1854
1 1
AUD_LRCK 22000pF
50V
BCK 11 26 OUT2A_2 SPK_WAFER_ANGLE SPK_WAFER_STRIGHT
AUD_SCK

R1807 100 SDA 12 25 OUT2A_1

SDA3_3.3V

13
14
15
16
17
18
19
20
21
22
23
24
R1808 100
SCL3_3.3V
C1811 C1815
+3.5V_ST
NTP

NTP

33pF 33pF
50V 50V SPK_R+

SCL
/FAULT
MONITOR0
MONITOR1
MONITOR2
BST2B
PGND2B
OUT2B_1
OUT2B_2
PVDD2_1
PVDD2_2
PVDD2_3
+24V_AMP D1807 R1825 R1833
R1802 1N4148W 12 L1806
10K 12
100V 10.0uH
C1879 R1841
R1816 OPT
C1865 NRS6045T100MMGK 0.1uF 4.7K
C 100 C1807 390pF C1872 50V
50V 0.47uF
R1801 B Q1801
1000pF C1840 C1844 C1850
L1807
10.0uH
50V
SPEAKER_R
AMP_MUTE 50V C1866
10K 2SC3052 0.1uF 0.1uF 10uF 390pF
50V 50V 50V NRS6045T100MMGK C1880 R1842
E 35V D1808
C1838 1N4148W R1826 R1830 0.1uF 4.7K
22000pF 100V 12 12 50V
OPT
AMP_MUTE_HOTEL 50V
R1803 SPK_R-
0
SUB_MUTE
OPT

WOOFER AMP. +3.3V_Normal AMP_RESET_N

WOOFER
C1833
WOOFER 1000pF
L1802 50V WOOFER
WOOFER

50V
BLM18PG121SN1D R1818
+24V_AMP

22000pF
C1835
10K OPT
AUD_MASTER_CLK R1852
3.3

WOOFER WOOFER OPT

WOOFER C1882

OUT1A_2
OUT1A_1
PVDD1_3
PVDD1_2
PVDD1_1
WOOFER C1841 C1845 C1847
WOOFER 0.1uF 0.1uF 10uF 0.01uF
VDD_IO

GND_IO

/RESET

PGND1A
C1831 C1884 50V 50V 35V 50V
CLK_I

BST1A
0.1uF 10uF
[EP]

10V SPK_WOOFER_L+
16V
D1801 WOOFER WOOFER L1808 WOOFER
AD

1N4148W R1819 R1831

WOOFER
100V 12 12 10.0uH WOOFER R1835
OPT WOOFER C1873
OPT WOOFER C1816 C1822 OPT WOOFER 0.1uF 4.7K
C1812 C1859 NRS6045T100MMGK 50V
C1808 10uF 0.1uF 390pF WOOFER
10uF 0.1uF 10V 16V 50V C1869
WOOFER 10V 16V 0.47uF
48
47
46
45
44
43
42
41
40
39
38
37
C1805
WOOFER 1000pF
50V WOOFER
L1809
10.0uH WOOFER
50V
WOOFER WOOFER
WOOFER_L
C1803 WOOFER C1860 C1874
100pF R1814 AGND_PLL 1 36 OUT1B_2 D1802
390pF
50V
NRS6045T100MMGK
0.1uF
50V
R1836
50V 3.3K 1N4148W WOOFER WOOFER 4.7K
R1820 R1828
AVDD_PLL 2 35 OUT1B_1 OPT
100V 12 12
THERMAL SPK_WOOFER_L-
DVDD_PLL 3 49 34 PGND1B WOOFER
C1851
WOOFER 22000pF P1802
LF 4 33 BST1B 50V SMAW250-05

DGND_PLL 5
IC1801 32 VDR1 WOOFER
SPK_WOOFER_R- 1
OPT
C1817
10uF
WOOFER GND_1 6 NTP-7400L 31 VCC_5
C1823
10V 0.1uF 2
16V DGND 7 30 GND_2 SPK_WOOFER_R+

DVDD 8 29 VDR2 WOOFER WOOFER WOOFER

3
C1855 C1857 C1867
SDATA 9 28 BST2A 1uF
25V
1uF
25V
1uF
25V 4
AUD_LRCH SPK_WOOFER_L-
WOOFER
WCK 10 27 PGND2A C1852
AUD_LRCK 22000pF 5
50V SPK_WOOFER_L+
BCK 11 26 OUT2A_2
AUD_SCK
WOOFER
R1811 100 SDA 12 25 OUT2A_1
SDA3_3.3V
WOOFER
13
14
15
16
17
18
19
20
21
22
23
24

R1812 100
SCL3_3.3V
NTP_WOOFER

NTP_WOOFER

C1809 C1813
33pF 33pF
50V 50V SPK_WOOFER_R+
SCL
/FAULT
MONITOR0
MONITOR1
MONITOR2
BST2B
PGND2B
OUT2B_1
OUT2B_2
PVDD2_1
PVDD2_2
PVDD2_3

+24V_AMP WOOFER WOOFER

D1803 R1821 R1829
1N4148W 12 12 L1804 WOOFER WOOFER
100V 10.0uH WOOFER
C1875 R1837
OPT WOOFER
C1861 NRS6045T100MMGK WOOFER 0.1uF 4.7K
390pF C1870 50V
WOOFER WOOFER WOOFER 50V 0.47uF
C1839 C1843 C1849 WOOFER
L1805
10.0uH WOOFER
50V
WOOFER_R
0.1uF 0.1uF 10uF C1862
390pF WOOFER WOOFER
WOOFER WOOFER 50V 50V 50V NRS6045T100MMGK C1876 R1838
R1817 35V D1804
C1836 WOOFER WOOFER
SUB_MUTE 1N4148W R1822 R1827 0.1uF 4.7K
100 WOOFER
C1829
22000pF 100V 12 12 50V
50V OPT
1000pF
50V SPK_WOOFER_R-

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AUDIO[NEO] 18 50
 DUAL COMPONENT

Q1901 1ST : 0TRIY80001A 2ND : 0TR387500AA

Q1902 1ST : EBK60752501, 2ND : EBK61011501

IC1904 1ST : 0ISTLPH062A, 2ND : EAN40055001

PCM_MDI[0-7] CI_MDI[0-7]
Close to BCM35230
PCM_MDI[0] R1909 22 OPT CI_MDI[0]
R1910 CI_MDI[1]
PCM_MDI[1] 22 OPT

BCM INT Demod PCM_MDI[2] AR1903 22 OPT CI_MDI[2]

PCM_MDI[3] CI_MDI[3] +5V_CI_ON
PCM_MDI[4] CI_MDI[4]
CI_MDI[5]
PCM_MDI[5]
R1915 22 OPT CI_MDI[6]
PCM_MDI[6]
R1916 22 OPT CI_MDI[7] C1904 C1905
PCM_MDI[7] R1932 R1933 CI_DATA[0-7]
0.1uF 10uF
10V 10K 10K
CI P1901
FE_TS_DATA[0-7] CI CI OPT
10067972-000LF CI R1946
10K
FE_TS_DATA[0] GND GND /PCM_CE1
R1901 22 CI 35 1 OPT
FE_TS_DATA[1] +5V_CI_ON R1937 62 /CI_DET1 36 2 DAT3 CI_DATA[3]
R1902 22 CI /CI_CD1
CI TS_OUT3 37 3 DAT4 CI_DATA[4]
FE_TS_DATA[2] CI_TS_DATA[3]
R1903 22 CI TS_OUT4 DAT5 CI_DATA[5]
CI_TS_DATA[4] 38 4
FE_TS_DATA[3] TS_OUT5 DAT6 +5V_CI_ON
R1904 22 CI R1971 R1972 39 5 CI_DATA[6]
CI_TS_DATA[5]
FE_TS_DATA[4] 10K 10K TS_OUT6 40 6 DAT6 CI_DATA[7]
R1905 22 CI CI_TS_DATA[6]
CI CI TS_OUT7 /CARD_EN1 CI R1956 22 R1973
FE_TS_DATA[5] 22 CI CI_TS_DATA[7] 41 7
R1906 10K
R1976 22 CI CARD_EN2 42 8 ADDR10 CI R1962 22 CI_ADDR[10]
FE_TS_DATA[6] R1907 22 CI /PCM_IORD CI_ADDR[10] CI
R1974 22 CI VS1 43 9 /O_EN CI R1963 22
FE_TS_DATA[7] /PCM_IOWR /PCM_OE
R1908 22 CI IORD 44 10 ADDR11 CI R1957 22 PCM_ADDR[11]
PCM_ADDR[11] +5V_CI_ON
CI_MDI[0-7] IOWR 45 11 ADDR10 CI R1958 22 PCM_ADDR[9]
PCM_ADDR[9]
TS_IN_SYN 46 12 ADDR8 CI R1959 22 CI_ADDR[8]
BCM INT Demod Close to BCM35230 22
CI_ADDR[8]
R1968 R1975
CI_MDI[0] TS_IN0 47 13 ADDR13 CI R1960 PCM_ADDR[13]
R1917 22 OPT PCM_ADDR[13] 10K 10K
PCM_MISTRT CI_MISTRT CI_MDI[1] TS_IN1 ADDR14 CI R1961 22 CI_ADDR[14]
48 14 CI_ADDR[14] CI CI CI
R1918 22 OPT CI_MDI[2] TS_IN2 R1964 22
PCM_MIVAL_ERR CI_MIVAL_ERR 49 15 /WR_EN
/PCM_WE
PCM_MCLKI R1919 22 OPT CI_MDI[3] TS_IN3 50 16 /IRQA R1967 22 CI
CI_MCLKI /PCM_IRQA
VCC 51 17 VCC C1910 0.1uF C1913
CI
0 VPP R1944 0 CI 0.1uF
R1977 +5V_CI_ON R1936 52 18 VPP 16V
Close to Tuner CI_MDI[4] OPT TS_IN4 OPT
10K 53 19 TS_IN_VAL
R1920 22 CI OPT CI_MDI[5] TS_IN5 54 20 TS_IN_CLK
NIM_TS_SYNC
CI_MDI[6] TS_IN6 ADDR12 CI R1947 22 PCM_ADDR[12]
R1921 22 CI R1929 R1930 55 21 PCM_ADDR[12]
NIM_VAL_ERR CI R1948
10K 10K CI_MDI[7] TS_IN7 56 22 ADDR7 22 PCM_ADDR[7]
R1922 22 CI PCM_ADDR[7]
NIM_TS_CLK OPT OPT TS_OUT_CLK ADDR6 CI R1949 22 CI_ADDR[6]
CI_TS_CLK 57 23 CI_ADDR[6]
R1927 22 CI CI_RESET ADDR5 CI R1950 22 CI_ADDR[5]
PCM_RST 58 24 CI_ADDR[5]
R1928 22 CI CI_WAIT ADDR4 CI R1951 22 PCM_ADDR[4]
/PCM_WAIT 59 25 PCM_ADDR[4]
R1934 10K OPT INPACK ADDR3 CI R1952 22 PCM_ADDR[3]
60 26 PCM_ADDR[3]
REG CI R1953 22
CI TS INPUT R1935 0 CI 61 27 ADDR2 PCM_ADDR[2]
PCM_ADDR[2]
TS_OUT_VAL ADDR1 CI R1954 22 CI_ADDR[1]
CI_TS_VAL 62 28 CI_ADDR[1]
TS_OUT_SYN ADDR0 CI R1955 22 CI_ADDR[0]
CI_TS_SYNC 63 29 CI_ADDR[0]
TS_OUT0 64 30 DAT0 CI_DATA[0]
CI_TS_DATA[0]
TS_OUT1 65 31 DAT1 CI_DATA[1] +5V_CI_ON
CI_TS_DATA[1]
TS_OUT2 66 32 DAT2 CI_DATA[2]
CI_TS_DATA[2]
PCM_TS_DATA[0-7] Close to CI Slot CI_TS_DATA[0-7]
/CI_CD2 R1938 CI 62 /CI_DET2 67 33 /IO_BIT R1945 10K
PCM_TS_DATA[0] AR1901 100 CI GND 68 34 GND OPT
CI_TS_DATA[0]
PCM_TS_DATA[1]
CI_TS_DATA[1] G2 69 G1
PCM_TS_DATA[2]
CI_TS_DATA[2]
PCM_TS_DATA[3]
CI_TS_DATA[3]

PCM_TS_DATA[4] AR1902 100 CI CI_TS_DATA[4]

PCM_TS_DATA[5] CI_TS_DATA[5] CI_MIVAL_ERR
PCM_TS_DATA[6] CI_TS_DATA[6] CI_MCLKI
PCM_TS_DATA[7] CI_MISTRT
CI_TS_DATA[7]

Close to CI Slot
R1923 220 CI
PCM_TS_CLK CI_TS_CLK
R1924 100 CI
PCM_TS_VAL CI_TS_VAL
R1925 100 CI CI POWER ENABLE CONTROL
PCM_TS_SYNC CI_TS_SYNC OE DIR CI_DATA NAND_DATA +3.3V_CI
C1916
12pF L L OUTPUT INPUT +5V_CI_ON
+5V_Normal
50V L H INPUT OUTPUT Q1902 L1902
OPT H X Z Z 0.1uF AO3407A BLM18PG121SN1D
CI TS OUTPUT OPT C1903

D
CI
16V
IC1903 R1931 22 CI C1906 CI CI
NAND_REb R1969
R1926 22 CI 74LVC245A OPT 0.1uF C1912 CI C1914 10K
/CI_EN1

G
NAND_DATA[0-7] 16V 0.1uF
R1943 C1909 0.1uF CI
VCC
20 1
DIR CI 16V
CI 22K 4.7uF 16V
CI_DATA[0-7] R1940
OE
19 2
A0 NAND_DATA[0] 16V
AR1904 100 CI 10K OPT
CI_DATA[0] B0
18 3
A1 NAND_DATA[1] OPT
CI_DATA[1]
B1
17 4
A2 NAND_DATA[2]
CI_DATA[2]
B2 A3 NAND_DATA[3] R1987
16 5
2.2K
B3
15 6
A4 NAND_DATA[4] CI
CI_DATA[3] R1980 100 CI C
B4
14 7
A5 NAND_DATA[5] R1942
CI_DATA[4] AR1905 100 CI 4.7K B Q1901
B5 A6 NAND_DATA[6] PCM_5V_CTL
CI_DATA[5] 13 8 2SC3052
CI CI
CI_DATA[6] B6
12 9
A7 NAND_DATA[7] E
CI_DATA[7] B7
11 10
GND
+5V_CI_ON
+3.3V_CI
+3.3V_CI
CI R1970 NAND F/M Data
22
IC1901
CI 74LVC125APW

C1901
1OE VCC 0.1uFOPT IC1902 3,3V_CI POWER
/CI_CE1 1 14 74AHC08PW +3.3V_CI
16V OPT
C1902
1A 4OE 0.1uF
NAND_REb 2 13 1A VCC
/CI_CE2 /CI_CE1 1 CI 14 16V
C1915 R1985 +3.3V_Normal +3.3V_CI
CI 9
1Y 4A OPT IC1905
/PCM_OE 3 12 NAND_WEb 1B 4B
0.1uF 10K
/CI_CE2 2 13 NAND_RBb 74LVC245A
16V CI
CI
2OE 4Y CI 45
4 11 1Y 4A VCC DIR
/PCM_IOWR /CI_EN1 3 12 20 1
L1901
R1986 22 OE
19 2
A0
BLM18PG121SN1D
2A 3OE /CI_EN1 CI_ADDR[2]
NAND_WEb 5 10 2A 4Y CI
/CI_EN1 4 11 CI_ADDR[1] B0
18 3
A1
PCM_ADDR[2] CI_ADDR[3] CI
2Y 3A B1 A2
CI 15 6 9 2B 3B PCM_ADDR[3] 17 4
CI_ADDR[4]
/PCM_WE NAND_REb 5 10 NAND_CLE B2 A3
CI C1907 CI C1908
16 5
GND 3Y PCM_ADDR[4] CI_ADDR[7] 0.1uF 0.1uF
7 8 CI 44 /PCM_IORD 2Y 3A
/PCM_CE1 CI 7 6 9 PCM_ADDR[7]
B3
15 6
A4
CI_ADDR[9]
B4 A5
14 7
GND 3Y PCM_ADDR[9] CI_ADDR[11]
7 8 CI_ADDR[0] B5 A6
13 8
PCM_ADDR[11] CI_ADDR[12]
B6 A7
12 9
PCM_ADDR[12] CI_ADDR[13]
B7 GND
11 10
PCM_ADDR[13]

CI DETECT

+3.3V_CI

+3.3V_CI +3.3V_CI
R1939 R1941
10K 10K IC1904
CI CI 74LVC1G32GW

B 1 5 VCC
CI CONTROL INTERFACE /CI_CD2 CI

A 2 C1911 R1966
/CI_CD1 OPT 0.1uF CI 10K
GND 3 4 Y
16V

CI
GND
R1965
CI_DET
47

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230 2010.11.11
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. CI 19 58
 DUAL COMPONENT
OPTION TABLE H/NIM & F/NIM & T/C/S2 Combo Tuner
IC2204 1ST:T-AP2114H(EAN61573601) / 2ND:T-TJ3940S (EAN61573501)
H/NIM H/NIM H/NIM F/NIM_CN F/NIM_Brazil DVB-T/C/S2
F/NIM_T/C F/NIM_T2
(AU,Latin) (Brazil,Taiwan) (China) (Brazil) (Eu,Aisa)
(EU) NON_DVB_S: use H/NIM and F/NIM

Non_DVB_S Non_DVB_S Non_DVB_S Non_DVB_S Non_DVB_S Non_DVB_S Non_DVB_S DVB_S DVB_S: use DVB-T/C/S2 combo Tuner

H/NIM: use H/NIM

H/NIM H/NIM H/NIM F/NIM F/NIM F/NIM F/NIM F/NIM
F/NIM: use F/NIM and DVB-T/C/S2 combo Tuner
BOOSTER BOOSTER BOOSTER BOOSTER BOOSTER BOOSTER BOOSTER SCART
SCART: use Scart Jack +5V_TU
RF_SW_CTL RF_SW_CTL RF_SW_CTL
CN : use China F/NIM
SCART SCART SCART CN
ERROR & VALID PIN
BOOSTER: use BOOSTER_CTL BOOSTER

EU_F/NIM RF_SW_CTL: use RF_SWITCH_CTL

L2201 <EU, China, Brazil,S2> R2263
EU_F/NIM BLM18PG121SN1D 0
CN_F/NIM_BR CN_F/NIM_BR TC_S_F/NIM: use EU_DVB-T/C F/NIM
TC_S_F/NIM TC_S_F/NIM TC_S_F/NIM DVB_T2/CN_F/NIM_BR
CN_F/NIM_BR: use F/NIM(China, BRZIL)
IC2203
EU_F/NIM: use EU_F/NIM BOOSTER NL17SZ08DFT2G
+3.3V_TU
R2231 BOOSTER
R2242
0
BOOSTER 10K R2258
R2209 TU_TS_VAL 0 IN_B VCC
RF_SWITCH_CTL Q2202 1 5
0 RF_SW_CTL MMBT3906(NXP) C2271
E DVB_TC/TCS_F/NIM
0.1uF
C2203 R2235 TU_TS_ERR IN_A 16V
close to TUNER 2
RF_SW_CTL 0.1uF OPT
B 2.2K
AU_ASIA_TUNER_V EU_F/NIM_DVB_TC_V EU_F/NIM_DVB_TCS_V 16V BOOSTER C R2269
C R2246 GND OUT_Y 0
TU2201 TU2202 TU2203 Q2203
2SC3052
B 10K
RF_BOOSTER_CTL
3 4
DVB_TC/TCS_F/NIM
TS_VAL_ERR

+5V_TU C2234 BOOSTER

TDTJ-S131D TDFR-G156D TDFQ-G031D L2205 0.01uF
50V
E

1uH close to TUNER BOOSTER DVB_TC/TCS_F/NIM

C2222 NON_DVB_S
C2225
100pF 0.1uF
16V
ANT_PWR NC_1 NC_1 50V
NON_DVB_S NON_DVB_S +3.3V_S2_TU close to TUNER
1 1 1 +5V_TU R2266
NC_1 BST_CNTL NC_2 BOOSTER Tuner to CI Slot 0
2 2 2 0 R2234 TS_VAL_ERR NIM_VAL_ERR
L2206-*1 L2210-*1 470
R2206 C2284 C2286 DVB_S R2267
C2285 DVB_S R2237
+B1[5V] +B1[5V] NC_3 100pF 0.1uF 10uF 0 0 DVB_S 82 +5V_TU 0
3 3 3 TU_TS_SYNC NIM_TS_SYNC
50V 16V 6.3V TU_SIF
DVB_S DVB_S DVB_S close to TUNER C2235 E DVB_S R2268
RF_AGC NC_2[RF_AGC] S2_TU[3.3V] DVB_S
R2277 L2206 DVB_S 0
4 4 4 270nH NON_DVB_S TU_TS_CLK NIM_TS_CLK
C2201 B
0 0.1uF
MOPLL_AS NC_3 NC_4 0.1uF
SCL0_3.3V R2230 Q2201 R2243
5 5 5 16V close to TUNER L2210 16V 4.7K
C MMBT3906(NXP) 0
R2250
OPT 270nH NON_DVB_S 1K R2252 R2253
DVB_S DVB_S NON_DVB_S 220 220
SCL SCLT TU_SCL +1.8V_TU SDA0_3.3V
OPT
6 6 6 C2219 C2221 C2202 C2211
62pF 62pF 20pF 20pF OPT 0
SDA SDAT TU_SDA 50V 50V 50V TU_CVBS
7 7 7 NON_DVB_S50V
NON_DVB_S NON_DVB_S NON_DVB_S R2248
Max 1.5A
C2204 C2208 E
100pF 0.1uF 0
NC_2 NC_4 T_1.8V 50V
8 8 8 16V
DVB_S DVB_S R2249 B Q2204
1K +5V_TU +1.25V_TU (EU)
R2251 MMBT3906(NXP)
SIF SIF T_SIF OPT
C +1.23V_TU (CN)
9 9 9
R2291
NC_3 NC_5 NC_5 75
close to TUNER R2255 +1.25V_TU
10 10 10 OPT
R2247
R2254
200 200
+3.3V_TU IC2208
0 SCART SCART
VIDEO VIDEO T_CVBS AP2132MP-2.5TRG1 [EP]
+3.3V_TU SCART
11 11 11
+1.25V_TU ATV_OUT R2212
GND GND GND_1 1 8
20K R2
E 1%
12 12 12
+3.3V_TU

THERMAL
C2215 PG GND
CN C2205 C2220 CN R2233 R2210
+B2[1.2V] +B2[1.2V] TD_1.2V C2218 C2210 C2214 R2229 100K POWER_ON/OFF2_1 R2213
B 10K

9
10uF 100pF 1000pF 4700pF Q2205 2 7 11K
13 13 13 0.1uF 100uF 100

NON_CN
50V 50V CN 50V CN C2217 TU_RESET MMBT3906(NXP) 1% R1
16V 16V 16V CN C2231 +2.5V_TU C SCART EN ADJ R2214
+B3[3.3V] +B3[3.3V] T_3.3V C2227 C2238 11K
10uF 100pF 0.1uF 0.1uF
14 14 14 3 6 1%

R2211
50V 16V 16V EU_F/NIM
16V

OPT 10K
0 VIN VOUT
RESET RESET T_TU_RESET R2240 C2289 C2291
15 15 15 H/NIM
0 10uF
0.1uF
OPT
4 2A 5
R2214-*1
10K
IF_AGC_CNTL +B4[2.5V] NC_6
R2241
IF_AGC OPTION:SCART 16V
+5V_Normal
VCTRL NC
1/16W
C2213
16 16 16 0.1uF EU_F/NIM EAN61387601 1% C2290
F/NIM 16V R2215 CN
DIF_1[N] SCL TD_SCL 10uF
R2204 0 close to Tuner 22
17 17 17 SCL1_3.3V 16V
R2216
DIF_2[P] SDA TD_SDA R2205
F/NIM
0 close to TUNER 22 OPT
18 18 18 SDA1_3.3V C2292
close to IF line 1uF
H/NIM
ERR T/C/S2_ERROR R2293 0
19 19 C2237 C2241
19 R2292H/NIM
0 18pF 18pF
SYNC T/C/S2_SYNC 50V
20 20 OPT 50V
OPT Vout=0.6*(1+R1/R2)
SHIELD
VALID T/C/S2_VALID IF_N
21 21
MCL T/C/S2_MCL
22 22 IF_P
TAIWAN_BR_V
TU2201-*1
LATIN_TUNER_H
TU2201-*2
AU_ASIA_H/NIM_H
TU2201-*3
D0 T/C/S2_D0
TDTR-T056F TDVJ-H031F TDTJ-S101D 23 23
AR2200 47
1
RF_S/W_CTL
1
ANT_PWR[OPT]
1
ANT_PWR D1 T/C/S2_D1 TU_TS_ERR +3.3V_TU +2.5V_TU
BST_CNTL BST_CNTL NC_1 24 24 FE_TS_DATA[0-7]
2 2 2
+B[5V] +B +B1[5V]
TU_TS_SYNC
3 3 3

4
NC_1[RF_AGC]
4
NC[RF_AGC]
4
RF_AGC D2 T/C/S2_D2 TU_TS_VAL
IC2204
5
NC_2
5
AS
5
MOPLL_AS 25 25 TU_TS_CLK AR2200-*1 AR2200-*2
SCL SCL SCL 0 33 AP2114H-2.5TRG1
6 6 6
EU_F/NIM CN DVB_S
7
SDA
7
SDA
7
SDA D3 T/C/S2_D3
8
NC_3
8
NC(IF_TP)
8
NC_2 26 26 VIN VOUT
9
SIF
9
SIF
9
SIF 3 2
10
NC_4
10
NC
10
NC_3 D4 T/C/S2_D4 1
11
VIDEO
11
VIDEO
11
VIDEO 27 27 R2270
GND GND GND GND 1
12 12 12
AR2201 C2268 EU_F/NIM
13
+B2[1.26V]
13
1.2V
13
+B2[1.2V] D5 T/C/S2_D5 47 OPT 0.1uF
14
+B3[3.3V]
14
3.3V
14
+B3[3.3V] 28 28 FE_TS_DATA[1] 16V C2276 C2279
15
RESET
15
RESET
15
RESET AR2201-*1 AR2201-*2 10uF 0.1uF
IF_AGC_CNTL IF_AGC_CNTL IF_AGC D6 T/C/S2_D6 FE_TS_DATA[0] 0 33
16 16 16
CN 10V 16V
17
DIF_1[N]
17
DIF_1
17
DIF_1[N] 29 29 FE_TS_DATA[3] DVB_S EU_F/NIM EU_F/NIM
DIF_2[P] DIF_2 DIF_2[P]
18 18 18 FE_TS_DATA[2]
D7 T/C/S2_D7
19 19 19
30 30 L2209 EU_F/NIM
SHIELD SHIELD SHIELD
31
S2_1.25V BLM18PG121SN1D
120-ohm
+1.25V_TU AR2202
31 47
DVB_S C2223 C2226 C2230 FE_TS_DATA[5]
S2_RESET 100pF 0.1uF 10uF FE_TS_DATA[4] AR2202-*1 AR2202-*2
SHIELD 32 50V 16V 10V 0 33 Max 217mA
FE_TS_DATA[6] CN
DVB_S DVB_S DVB_S DVB_S
S2_3.3V +3.3V_S2_LNB
33 +3.3V_TU
EU_F/NIM_DVB_T2_V
TU2202-*1
CN_VERTICAL_ALTOBEAM
TU2202-*2
CN_HORIZONTAL_ALTOBEAM
TU2202-*3
CN_VERTIAL_LG3911
TU2202-*4
CN_HORIZONTAL_LG3911
TU2202-*5
DVB_TCS_H

R2203
R2208 +1.8V_TU
TU2203-*1 2.2K EU_F/NIM
TDFR-G256D TDFR-C256D TDFR-C236D TDFR-C056D TDFR-C036D TDFQ-G001D
S2_F22 R2202 100 DVB_S IC2202 +3.3V_TU +3.3V_S2_LNB
51 LNB_TX S2_RESET
1
NC_1
1
RF_S/W_CNTL
1
RF_S/W_CNTL
1
RF_S/W_CNTL
1
RF_S/W_CNTL 1
NC_1 34 DVB_S C2207 AZ1117BH-1.8TRE1
2
NC_2 0.1uF L2204
BST_CNTL BST_CNTL BST_CNTL BST_CNTL BST_CNTL 1/16W DVB_S
2
+B1[5V]
2
+B1[+5V]
2
+B1[+5V]
2
+B1[+5V]
2
+B1[+5V]
3
NC_3

S2_TU[3.3V]
S2_SCL 5%DVB_S MLB-201209-0120P-N2
3 3 3 3 3 4
35 R2283 0 R2226 IN OUT
NC_2[RF_AGC] NC[RF_AGC] NC[RF_AGC] NC[RF_AGC] NC[RF_AGC] NC_4
FE_TS_DATA[7] R2226-*1 R2226-*2 3 DVB_S 2
4 4 4 4 4 5
TU_SCL
47 0 33
NC_3 NC_1 NC_1 NC_1 NC_1 6 DVB_S
5
SCLT
5
SCLT
5
SCLT
5
SCLT
5
SCLT 7
TU_SDA
S2_SDA EU_F/NIM
1 R2298
OPT
C2242 DVB_S C2245 C2248
6 6 6 6 6
8
T_1.8V
36 R2284 0 CN DVB_S 1 0.1uF 10uF 0.1uF
7
SDAT
7
SDAT
7
SDAT
7
SDAT
7
SDAT T_SIF ADJ/GND +3.3V_S2_DE
9
DVB_S 10V DVB_S
NC_4 NC_2 NC_2 NC_2 NC_2 10
NC_5 DVB_S +3.3V_S2_DE
8
SIF
8
SIF
8
SIF
8
SIF
8
SIF 11
T_CVBS GND_2 DVB_S
9

10
NC_5
9

10
NC_3
9

10
NC_3
9

10
NC_3
9

10
NC_3 12
GND_1

TD_1.2V
37 Close to the tuner L2202
13
VIDEO VIDEO VIDEO VIDEO VIDEO T_3.3
C2224 C2228 C2232 C2287 C2288 MLB-201209-0120P-N2
11
GND
11
GND
11
GND
11
GND
11
GND
14

15
T_TU_RESET S2_LNB 100pF 0.1uF 10uF 10uF 0.1uF
12

13
+B2[1.2V]
12

13
+B2[1.2V]
12

13
+B2[1.2V]
12

13
+B2[1.2V]
12

13
+B2[1.2V] 16
NC_6 38 50V
DVB_S
16V
DVB_S
10V
DVB_S 10V 16V
+B3[3.3V] +B3[3.3V] +B3[3.3V] +B3[3.3V] +B3[3.3V] 17
TD_SCL
DVB_S DVB_S DVB_S C2243 C2246
14 14 14 14 14 TD_SDA
RESET RESET RESET RESET RESET
18
T/C/S2_ERROR
10uF 0.1uF
15 15 15 15 15 19
39 +3.3V_S2_TU 10V
16
+B4[2.5V]
16
NC_4
16
NC_4
16
NC_4
16
NC_4 20
T/C/S2_SYNC
DVB_S DVB_S
T/C/S2_VALID
SCL SCL SCL SCL SCL 21
17 17 17 17 17
22
T/C/S2_MCL Surge protectioin L2203
SDA SDA SDA SDA SDA
18 18 18 18 18
23
T/C/S2_D0 Close to Tuner #38 pin MLB-201209-0120P-N2
ERR ERR ERR ERR ERR T/C/S2_D1
19 19 19 19 19 24
SYNC SYNC SYNC SYNC SYNC T/C/S2_D2
25
20

21
VALID
20

21
VALID
20

21
VALID
20

21
VALID
20

21
VALID 26
T/C/S2_D3 SHIELD DVB_S C2244 C2247
MCL MCL MCL MCL MCL 27
T/C/S2_D4
LNB_OUT 10uF 0.1uF
22 22 22 22 22 T/C/S2_D5 C2209 C2212 D2201 R2207 16V
D0 D0 D0 D0 D0
28
C2206 10V
23 23 23 23 23 29
T/C/S2_D6
33pF 33pF 3.0SMCJ20A(suzhougrande) 2.2K
D1 D1 D1 D1 D1 T/C/S2_D7 1000pF DVB_S DVB_S
24 24 24 24 24 30
S2_1.25V
OPT DVB_S DVB_S DVB_S
25
D2
25
D2
25
D2
25
D2
25
D2 31
S2_RESET
50V 6432
32
26
D3
26
D3
26
D3
26
D3
26
D3
33
S2_3.3V DVB_S
D4 D4 D4 D4 D4 S2_F22
27 27 27 27 27 34
D5 D5 D5 D5 D5 S2_SCL
28
D6
28
D6
28
D6
28
D6
28
D6
35

36
S2_SDA +5V_Normal +5V_TU +3.3V_Normal +3.3V_TU
29 29 29 29 29
37
GND_2 CHBO_TS_CLK
D7 D7 D7 D7 D7
30 30 30 30 30 S2_LNB
31 31 31 31 31 38

39
CHBO_TS_SERIAL L2208 L2207
SHIELD SHIELD SHIELD SHIELD SHIELD
SHIELD CHBO_TS_SYNC MLB-201209-0120P-N2 MLB-201209-0120P-N2
CHBO_TS_VAL_ERR
C2258 C2252 C2260 C2262 C2216 C2249 C2255 C2259 C2261
TU_RESET_SUB 22uF 0.1uF 22uF 0.1uF 22uF 0.1uF 22uF 0.1uF 0.1uF
16V 16V 16V 16V 16V 16V 16V 16V 16V
RF_SWITCH_CTL_2 CN
TW9910_RESET

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER SINGLE 22
 DVB-S2 LNB Part Allegro
(Option:LNB)

D2301
LNB SMAB34 D2304
SMAB34

2A 40V 40V
LNB
3A
+12V_LNB
C2307 C2302 C2324 C2305
0.01uF 1uF 68uF 68uF
50V 50V 35V 35V LNB
LNB LNB LNB LNB L2301
33UH
SP-7850_33 C2311 C2312 DCDC_GND and A_GND are connected
close to Boost pin(#1)
10uF 0.1uF
2.4A
25V 50V DCDC_GND and A_GND are connected in pin#27
close to VIN pin(#25)
LNB LNB
DCDC_GND DCDC_GND PCB_GND and A_GND are connected
D2302 DCDC_GND
US1M(suzhou) A_GND
LNB_OUT
1000V
C2303 D2303 Input trace widths should be sized to conduct at least 3A
LNB SMAB34
0.1uF 40V
LNB 50V LNB
C2301
0.22uF
Ouput trace widths should be sized to conduct at least 2A
25V

GNDLX
[EP]

NC_9
A_GND

LNB

VIN

BFI

BFO
LX
A_GND

28

27

26

25

24

23

22
A_GND
BOOST 1 21 NC_8
C2304 0.1uF THERMAL
VCP 2 20 NC_7
29
LNB C2306 22000pF TCAP BFC
3 19
LNB NC_1 IC2301 NC_6
4 18
A8290SETTR-T
TDO 5 LNB 17 NC_5 A_GND
A_GND
R2313 R2314
EXTM 6 16 NC_4 0 0
LNB_TX
TDI 7
10
15 NC_3
11

12

13

14
8

+3.3V_Normal
GND

VREG

SDA

ADD

SCL

NC_2

IRQ
DCDC_GND
A_GND A_GND

R2304
Max 1.3A
4.7K
R2301 33

R2302 33

LNB
R2303 0

+12V +12V_LNB
LNB

LNB

LNB
0.22uF

L2302
BLM18PG121SN1D
27pF

27pF
LNB

OPT

OPT

LNB
C2308

C2309

C2310

A_GND
LNB_INT
SDA1_3.3V

SCL1_3.3V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
BCM35230 2010.11.02
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
LNB 23 57
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
 DUAL COMPONENT
Q2502,Q2503
Q2504,Q2506 1ST : 0TRIY80001A 2ND : 0TR387500AA
Q2507,Q2508

Q2501 1ST : EBK61012701, 2ND : EBK58172301

Q2505 1ST : 0TRIH80004A, 2ND : EBK61012501, 3RD : 0TR102009AM

D2513 1ST : T-BAT54_SUZHO, 2ND : 0DSON00138A

Full Scart(18 Pin Gender) +3.3V_Normal IN CASE OF SMALL= 15V

+5V_Normal

+12V
R2514
10K CLOSE TO JUNCTION
EU
EU
R2525 L2506
SC_DET/COMP2_DET EU
1K EU R2545
EU E EU EU EU
D2511 MMBT3906(NXP) C2525 C2526 10K
R2536
5.6V Q2501 470 0.1uF 0.1uF
50V 50V DTV_ATV_SELECT
B
IC2502
C EU EU NLASB3157DFT2G
EU Q2502 R2537
R2577 C2511 R2522 C 2SC3052 47K
10 R2532
SC_CVBS_IN 390 B EU SELECT B1
C2524 6 1 ATV_OUT
D2501 0 EU
EU C2536 EU 0.1uF 47uF
5.5V R2504 47pF EU
EU E 16V
EU 75 50V CLOSE TO SOC VCC GND
1% EU 5 2
SHIELD EU R2533
390 L2507
19 Gain=1+Rf/Rg EU A B0 120-ohm
Rf EU R2538 4 3
Rg DTV/MNT_V_OUT
AV_DET JP2501 75 R2513 R2535 15K
180 BLM18PG121SN1D
18 D2502 +3.3V_Normal NON_DTV_OUT
EU C2532 C2534 R2551
COM_GND EU
5.5V C2515 180pF 180pF 75
17 L2507-*1
JP2502 EU 100uF 50V 50V 1%

R2580
SYNC_IN 0
16V +3.3V_Normal OPT OPT EU
16

10K
EU
SYNC_OUT JP2503 DVT_OUT
Selece = High ==> A = B1
15

R2579
SYNC_GND SC_FB CLOSE TO SOC

10K
EU Selece = Low ==> A = B0

EU
14 C EU
R2581
RGB_IO JP2504 1K B Q2510
13
2SC3052
R_OUT JP2505 OPT EU
D2503 EU C
12 R2506 EU E
R2578
R_GND 30V 75 10K
1% B Q2509
11
2SC3052
G_OUT JP2506
10 E
G_GND
0 EU R2515
9 COMP2_Pr
ID JP2507 D2504
R2507
8 5.5V 75
B_OUT JP2508 1%
EU EU
7
AUDIO_L_IN
6
B_GND JP2509 0 EU R2516
5 COMP2_Y
AUDIO_GND D2505 EU
4 5.5V R2508
AUDIO_L_OUT D2513
JP2510 EU 75 1%
3 30V
AUDIO_R_IN REC_8
JP2511
2
AUDIO_R_OUT 0 EU R2517 EU
EU
COMP2_Pb
1 R2539
D2506 9.1K
JP2512 EU
5.5V R2509 SC_ID
EU 75 1/16W
1% OPT 1%
EU
DA1R018H91E CLOSE TO JUNCTION D2512 R2542
30V 1K C2528
JK2501 1% 1uF
EU 10V
EU
C2537

10K/1K to match ADC Full-Scale range

1uF
25V

22 EU R2530 (1% of accruacy)

SC/COMP2_L_IN
EU

D2507
5.6V EU C2509
R2510 C2516
OPT 470K 560pF
50V 100pF
EU 50V
EU
C2538
1uF
25V

22 EU R2531 CLOSE TO SOC

SC/COMP2_R_IN CLOSE TO JACK
EU

EU
D2508 R2511 C2510 TP2501
5.6V 470K 560pF INCM_VID_SC C2533
OPT CLOSE TO JUNCTION C2517
50V 0.1uF R2549
100pF
EU 16V 36
50V
EU

BLM18PG121SN1D
L2508
DTV/MNT_L_OUT
D2509 EU EU EU
5.6V C2518 C2522
OPT 1000pF 4700pF
50V

BLM18PG121SN1D
L2509
DTV/MNT_R_OUT
D2510 EU EU
EU C2523
5.6V C2519 4700pF
OPT 1000pF 0 R2534 AUDIO_R
50V HOTEL_OPT

AUD_OUT >> EU/CHINA_HOTEL_OPT IC2501 +12V

5.6K R2573 LM324D [SCART AUDIO MUTE] [SCART PIN 8]
AUD_OUT AUD_OUT
1K R2519 OUT1 OUT4
DTV/MNT_L_OUT 1 14
AUD_OUT
+12V AUD_OUT
C2513 AUD_OUT IN1- IN4-
10uF 33K R2526 2 13 OPT
16V C2535
AUD_OUT R2558
AUD_OUT 6800pF C2520 R2528 10K C
SCART1_Lout_N 33pF OPT
L2501 50V 10K IN1+ 3 12
IN4+
R2552
AUD_OUT +3.5V_ST 4.7K B OPT
AUD_OUT Q2508
SCART1_Lout_P 5.6K R2570
OPT 2SC3052
VCC VEE/GND
AUD_OUT 4 11 R2561 E
DTV/MNT_L_OUT
12K
EU OPT C
IN2+ IN3+ Q2503 R2548 R2556
5 10 REC_8
2SC3052 EU EU 10K 1K B
SC_RE1
C2501 R2543 RT1P141C-T112
Q2505 EU OPT
0.1uF AUD_OUT IN2- IN3- 2K Q2507
33K R2527 6 9 E 2SC3052
50V SCART1_Rout_P 5.6K R2571
AUD_OUT SCART_MUTE
AUD_OUT AUD_OUT R2529
10K DTV/MNT_R_OUT 3 1
5.6K R2572 AUD_OUT OUT2 OUT3 C
SCART1_Rout_N 7 8
R2518 AUD_OUT C2521 EU OPT
AUD_OUT 33pF Q2504 2 B Q2506
1K SC_RE2
2SC3052 EU 2SC3052
DTV/MNT_R_OUT OPT
R2544
C2514 AUD_OUT 2K R2557 E
10uF 1K
R2524 6800pF
16V
50V
CLOSE TO soc AUD_OUT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SCART 25
 NON CHB

TS Output
CHBO_TS_SERIAL
CHBO_TS_CLK
CHBO_TS_VAL_ERR
CHBO_TS_SYNC

CHB_RESET

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. NON CHB 28 50
 DUAL COMPONENT

China Hotel Option Q2901 1ST : EBK61012601 2ND : 0TRDI80002A

+24V_AMP
P2901
12505WS-09A00

CN_HOTEL
R2904 0
1
CN_HOTEL
C2901
0.1uF
CN_HOTEL 2

AUDIO_R 3

+3.3V_Normal
4
CN_HOTEL
R2903 0 5
AMP_RESET_N
R2902
10K
CN_HOTEL
AMP_MUTE_HOTEL 6
C
Q2901
R2901 200 B MMBT3904(NXP) 7
AMP_MUTE_HOTEL CN_HOTEL
CN_HOTEL
E
8
SPK_R+_HOTEL

9
SPK_R-_HOTEL

10

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
CHINA HOTEL 29
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
 LVDS LOCAL DIMMING
P3501
[51Pin LVDS OUTPUT Connector]
FI-RE51S-HFK-A [41Pin LVDS OUTPUT Connector]

NC [To LED DRIVER] +3.3V_FRC

1 R3512 33
2D/3D_CTL
NC LGD_2D/3D_CTRL
2
LVDS_SEL
NC P3503
3 +3.3V_Normal 12507WR-08L R3509
10K
NC +3.3V_Normal
4 OPT
NC R3511 1
5
3.3K PLACE SERIAL RESISTORS CLOSE TO URSA4
AUO_65_MIRROR R3501 R3510
6 AUO_65_MIRROR
3.3K 10K
LVDS_SEL P3502 2
7 LVDS_SEL_HIGH
FI-RE41S-HFK-A
NC
8 R3502 3 R3506 33
M0_SCLK
NC 10K
9 LVDS_SEL_LOW NC
L/DIM_ENABLE 1
10 4
NC
2 R3514 33
GND 2D/3D_CTL
11 NC AUO_2D/3D_CTRL
3 5 R3507 33
RA0N M0_MOSI
12 NC
LVDS_TXA0N
RA0P 4
13 NC 6 R3504 0
LVDS_TXA0P SCL2_3.3V
RA1N 5
14 LPB_42/47/55
LVDS_TXA1N NC
RA1P 6 R3505 0
15 7 SDA2_3.3V
LVDS_TXA1P NC
RA2N 7 LPB_42/47/55
16 NC
LVDS_TXA2N R3508 33
RA2P 8 8 L_VS
17 GND
LVDS_TXA2P
GND 9
18 9
RC0N R3513
RACLKN 10 LVDS_TXC0N 4.7K
19 RC0P
LVDS_TXACLKN
RACLKP 11 LVDS_TXC0P
20 RC1N
LVDS_TXACLKP
GND 12 LVDS_TXC1N
21 RC1P
RA3N 13 LVDS_TXC1P
22 RC2N
LVDS_TXA3N
RA3P 14 LVDS_TXC2N
23 RC2P
LVDS_TXA3P
RA4N 15 LVDS_TXC2P
24 GND
LVDS_TXA4N
RA4P 16
25 RCCLKN
LVDS_TXA4P
GND 17 LVDS_TXCCLKN
26 RCCLKP
BIT_SEL BIT_SEL 18 LVDS_TXCCLKP
27 GND
RB0N 19
28 R3503 RC3N
LVDS_TXB0N
RB0P 10K 20 LVDS_TXC3N
29 RC3P
LVDS_TXB0P BIT_SEL_LOW
RB1N 21 LVDS_TXC3P
30 RC4N
LVDS_TXB1N
RB1P 22 LVDS_TXC4N
31 RC4P
LVDS_TXB1P
RB2N 23 LVDS_TXC4P
32 GND
LVDS_TXB2N
RB2P 24
33
GND
LVDS_TXB2P
25
GND NON USED L/DIMMING
34
RBCLKN 26
RD0N
LVDS_TXD0N
(FOR EDGE_LED)
35 LVDS_TXBCLKN RD0P
RBCLKP 27 LVDS_TXD0P
36 RD1N
LVDS_TXBCLKP
GND 28 LVDS_TXD1N
37 RD1P
RB3N 29 LVDS_TXD1P L/DIM0_MOSI
38 LVDS_TXB3N RD2N
RB3P 30 LVDS_TXD2N L/DIM0_SCLK
39 LVDS_TXB3P RD2P
31 L/DIM0_VS
RB4N LVDS_TXD2P
40 LVDS_TXB4N GND
RB4P 32 M1_MOSI
41 LVDS_TXB4P RDCLKN M1_SCLK
GND 33 LVDS_TXDCLKN
42 M2_MOSI
RDCLKP
GND 34 LVDS_TXDCLKP M2_SCLK
43 GND M3_MOSI
GND 35
44 M3_SCLK
PANEL_VCC RD3N
GND 36 LVDS_TXD3N
45 RD3P
GND 37 LVDS_TXD3P
46 RD4N
L3501 38
NC LVDS_TXD4N
47 MLB-201209-0120P-N2 RD4P
VLCD 39 LVDS_TXD4P
48 GND
VLCD 40
49 GND
VLCD 41
50 C3501 C3502 C3503
VLCD 10uF 1000pF 0.1uF
51 25V 50V 50V 42
OPT
GND
52

GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230 2010. 10. 20
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Interface block 35 58
 VDDC10 +1.5V_FRC_DDR +1.5V_FRC_DDR
+1.26V_FRC VDDC10 [SPI FLASH(2Mbit)] +3.3V_FRC
L5205
CIC21J501NE

C5201 C5210 C5211 C5243 C5225 C5228 C5213 C5244 C5231 C5232 C5234 C5247
0.1uF 22uF 22uF 0.22uF 0.1uF 0.1uF 0.1uF 0.22uF 0.1uF 0.1uF 0.1uF 1uF
10V 10V 6.3V 6.3V 6.3V IC5202
R5244 R5246 W25X20BVSNIG
PLACE TERMINATION RESISTORS CLOSE TO URSA5 4.7K 10K

TXBCLKP
TXBCLKN

TXACLKP
TXACLKN
CS VCC
1 8

TXB2P

TXA1P

TXA4N
TXB0P
TXB0N
TXB1P
TXB1N

TXB2N
TXB3P
TXB3N
TXB4P
TXB4N

TXA0P
TXA0N

TXA1N
TXA2P
TXA2N
TXA3P
TXA3N
TXA4P
+1.26V_FRC DVDD_DDR_1V SPI_CS

L5201 R5245 DO HOLD R5252

CIC21J501NE 2 7
SPI_DO
33 3.3K
C5202 C5246 C5206 WP CLK
R5224 R5230
0.1uF 22uF 0.1uF 3 6 SPI_SCLK

13pF

13pF
10V 100 100
R5225 R5231 GND DIO
4 5 SPI_DI
Place Close to Bead 100 100

C5241

C5242
24MHz
DVDD_DDR_1V

X5201
R5226 R5232
+3.3V_FRC VDD33 VDD33 (VDDP)
100 100 URSA5_FLASH_WINBOND_2M

AVDD_LVDS_3.3V
L5202 R5227 R5233

GPIO[1]
3D_SYNC
GPIO[8]
+1.5V_FRC_DDR
CIC21J501NE
100 100 1M

L_VS
R5237

VDD33
C5203 C5207 C5214 C5219 C5245

AVDD_PLL
R5228 R5234
0.1uF 0.1uF 0.1uF 0.1uF 0.22uF IC5202-*1

AVDD33

VDDC10
6.3V 100 100 MX25L2006EM1I-12G, HF

0.1uF C5240

0
R5229 R5235
CS VCC

33
100 100 1 8

R5236

0
0
0
+3.3V_FRC AVDD33 AVDD33 SO/SIO1 HOL

R5238

R5239
R5240
R5241
R5242
2 7

L5206
CIC21J501NE WP SCL
3 6

F10
G10
F11
F12
G11
G12

K10

L10

M10

N10
N11
P10
P11

R13

T13
U15
R14

T14

U14
U13
R12
E11

R10
T11

R11
U11
F4
F5

D4
D5
E4
E5

M5

L4
L5

K9

M4
N4
N5

M9

N9

R2
R3
R4
R5
T4
U4
U3
T3
T2
U2
T1
R1

R6
R7
R8
R9
T8
U8
U7
T7
T6
U6
U5
T5

J1
J2

P9

K2
K1

P8

N2
M1
N1
N3
M3

L1
M2
L2
K3
L3
C5233 C5236 C5238 C5239 GND SI/S
0.1uF 0.1uF 0.1uF 0.1uF 4 5

AVDD_1
AVDD_2

AVDD_DDR_C_1
AVDD_DDR_C_2
AVDD_DDR_D_1
AVDD_DDR_D_2
AVDD_DDR_D_3
AVDD_DDR_D_4

AVDD_LVDS3.3V_1
AVDD_LVDS3.3V_2
AVDD_LVDS3.3V_3
AVDD_LVDS3.3V_4

AVDD_MPLL3.3V

AVDD_LPLL3.3V
AVDD_PLL3.3V

AVDDL_MOD1.26V

DVDD_DDR_1.26V
DVDD_HF1.26V

VD33_1
VD33_2
VD33_3

VDDC_1.26V_1
VDDC_1.26V_2
VDDC_1.26V_3
VDDC_1.26V_4
VDDC_1.26V_5
VDDC_1.26V_6
VDDC_1.26V_7

RXBCLKP
RXBCLKN
RXB0P
RXB0N
RXB1P
RXB1N
RXB2P
RXB2N
RXB3P
RXB3N
RXB4P
RXB4N

RXACLKP
RXACLKN
RXA0P
RXA0N
RXA1P
RXA1N
RXA2P
RXA2N
RXA3P
RXA3N
RXA4P
RXA4N

XTALO
XTALI

GPIO0/(UART_RX/S_PIF_DA0)
GPIO1
GPIO2/(S_PIF_CLK)
GPIO3/(LTD_DA1)
GPIO4/(LTD_DE)
GPIO5/(LTD_CLK)
GPIO6/(LTD_DA0)
GPIO7(3D_FLAG)
GPIO8
GPIO9/(UART_TX/S_PIF_DA1)
GPIO10/(S_PIF_FC)
GPIO11/(S_PIF_CS)
VSYNC_LIKE

M_S_PIF_CLK
M_S_PIF_CS
M_S_PIF_DA0
M_S_PIF_DA1
M_S_PIF_FC

S_M_PIF_CLK
S_M_PIF_CS
S_M_PIF_DA0
S_M_PIF_DA1
S_M_PIF_FC

SOFT_RST_L
SOFT_RST_R

OP_SYNC_L
OP_SYNC_R
URSA5_FLASH_MACRONIX_2M
FRC_A[0-13]
+3.3V_FRC AVDD_PLL AVDD_PLL FRC_A[0] P14 C8
DDR3_A0/DDR2_NC TXA0P/GCLK6/BLUE[7] LVDS_TXA0P
FRC_A[1] G15 C9
L5203 DDR3_A1/DDR2_A8 TXA0N/GCLK5/BLUE[6] LVDS_TXA0N
CIC21J501NE FRC_A[2] N14 B8
DDR3_A2/DDR2_NC TXA1P/OPT_N/LK3/BLUE[9] LVDS_TXA1P
FRC_A[3] L15 A8
C5204 C5208 C5215 C5217 DDR3_A3/DDR2_A10 TXA1N/FLK/BLUE[8] LVDS_TXA1N
FRC_A[4] H15 A7
0.1uF 0.1uF 10uF 0.1uF DDR3_A4/DDR2_A2 TXA2P/GREEN[1] LVDS_TXA2P
FRC_A[5] L14 B7
6.3V DDR3_A5/DDR2_A3 TXA2N/OPT_P/LK2/GREEN[0] LVDS_TXA2N
FRC_A[6] G14 C6
DDR3_A6/DDR2_A4 TXACLKP/RLV0N/GREEN[3] LVDS_TXACLKP
FRC_A[7] N12 C7
DDR3_A7/DDR2_A5 TXACLKN/RLV0P/GREEN[2] LVDS_TXACLKN
FRC_A[8] G13 B6
+3.3V_FRC AVDD_LVDS_3.3V AVDD_LVDS_3.3V DDR3_A8/DDR2_A6 TXA3P/RLV1N/GREEN[5] LVDS_TXA3P
FRC_A[9] N13 A6
DDR3_A9/DDR2_A9 TXA3N/RLV1P/GREEN[4] LVDS_TXA3N
L5204 FRC_A[10] H14 A5
CIC21J501NE DDR3_A10/DDR2_RASZ TXA4P/RLV2N/GREEN[7] LVDS_TXA4P
FRC_A[11] F15 B5
DDR3_A11/DDR2_A11 TXA4N/RLV2P/GREEN[6] LVDS_TXA4N
FRC_A[12] H13
C5205 C5209 C5216 C5220 C5223 C5227 DDR3_A12/DDR2_A0
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF FRC_A[13] P13 C4
DDR3_A13/DDR2_A12 TXB0P/RLV3N/GREEN[9] LVDS_TXB0P
C5
TXB0N/RLV3P/GREEN[8] LVDS_TXB0N
M12 B4
FRC_BA0 DDR3_BA0/DDR2_BA2 TXB1P/RLVCLKN/RED[1] LVDS_TXB1P
H12 A4
FRC_BA1 DDR3_BA1/DDR2_CASZ TXB1N/RLVCLKP/RED[0] LVDS_TXB1N
L13 A3
FRC_BA2 DDR3_BA2/DDR2_A1 TXB2P/RLV4P/RED[3]/EPI_A3P LVDS_TXB2P
B3
TXB2N/RLV4N/RED[2]/EPI_A3N LVDS_TXB2N
F16 C2
FRC_MCLK DDR3_MCLK/DDR2_MCLK TXBCLKP/RLV5N/RED[5]/EPI_A2P LVDS_TXBCLKP
GPIO1 : HI => B8/94, LOW => B4/98 F17 C3
FRC_MCLKB DDR3_MCLKZ/DDR2_MCLKZ TXBCLKN/RLV5P/RED[4]/EPI_A2N LVDS_TXBCLKN
CHIP_CONF : {GPIO8, PWM1, PWM0} J13 B2
FRC_CKE DDR3_CKE/DDR2_ODT TXB3P/RLV6N/RED[7]/EPI_A1P LVDS_TXB3P
CHIP_CONF = 3d5 : boot from interal SRAM A2
TXB3N/RLV6P/RED[6]/EPI_A1N/ LVDS_TXB3N
CHIP_CONF = 3d6 : boot from EEPROM K12 C1
FRC_ODT DDR3_ODT/DDR2_CKE TXB4P/RLV7N/RED[9]/EPI_A0P LVDS_TXB4P
CHIP_CONF = 3d7 : boot from SPI Flash L12 B1
FRC_RASB DDR3_RASZDDR2_WEZ TXB4N/RLV7P/RED[8]/EPI_A0N LVDS_TXB4N
K13
FRC_CASB DDR3_CASZ/DDR2_BA1
K14 C16
URSA5 CONFIGURATION
+3.3V_FRC
FRC_WEB

M14
DDR3_WEZ/DDR2_BA0
IC5201 TXC0P/SOE
TXC0N/POL
B17
B16
LVDS_TXC0P
LVDS_TXC0N
FRC_DDR3_RESETB DDR3_RESET/DDR2_A7 TXC1P/GSP_R LVDS_TXC1P
A16

FRC_DQSL
N16
DDR3_DQSL/DDR2_DQSL
LGE7303C TXC1N/GSP/VST
TXC2P/GOE/GCLK1
A15
LVDS_TXC1N
LVDS_TXC2P
10K

R5211 10K

R5215 10K

M17 B15
10K

FRC_DQSU DDR3_DQSU/DDR2_DQSU TXC2N/GSC/GCLK3 LVDS_TXC2N

C14
OPT

TXCCLKP/LLV0N LVDS_TXCCLKP
M16 C15
R5207
R5203

FRC_DQSLB DDR3_DQSBL/DDR2_DQSBL TXCCLKN/LLV0P LVDS_TXCCLKN

M15 B14
FRC_DQSUB DDR3_DQSBU/DDR2_DQSBU TXC3P/LLV1N LVDS_TXC3P
A14
PWM0 TXC3N/LLV1P LVDS_TXC3N
J15 A13
PWM1 FRC_DML DDR3_DQML/DDR2_DQU5 TXC4P/LLV2N LVDS_TXC4P
FRC_DQL[0-7] R16 B13
FRC_DMU DDR3_DQMU/DDR2_DQU4 TXC4N/LLV2P LVDS_TXC4N
GPIO[8]
FRC_DQL[0] R17 C12
GPIO[1] DDR3_DQL0/DDR2_DQU3 TXD0P/LLV3N LVDS_TXD0P
FRC_DQL[1] H17 C13
R5204 OPT10K

R5208 OPT10K

10K

10K

DDR3_DQL1/DDR2_DQL0 TXD0N/LLV3P LVDS_TXD0N

FRC_DQL[2] R15 B12
DDR3_DQL2/DDR2_DQL6 TXD1P/LLVCLKN LVDS_TXD1P
OPT

FRC_DQL[3] J17 A12

DDR3_DQL3/DDR2_DQL7 TXD1N/LLVCLKP LVDS_TXD1N
R5216

FRC_DQL[4] T17 A11

R5212

DDR3_DQL4/DDR2_DQL3 TXD2P/LLV4N/EPI_B3P LVDS_TXD2P

FRC_DQL[5] H16 B11
DDR3_DQL5/DDR2_DQL2 TXD2N/LLV4P/EPI_B3N LVDS_TXD2N
FRC_DQL[6] T15 C10
DDR3_DQL6/DDR2_DQL1 TXDCLKP/LLV5N/BLUE[1]/EPI_B2P LVDS_TXDCLKP
FRC_DQL[7] G16 C11
DDR3_DQL7/DDR2_DQL5 TXDCLKN/LLV5P/BLUE[0]/EPI_B2N LVDS_TXDCLKN
B10
TXD3P/LLV6N/BLUE[3] LVDS_TXD3P
FRC_DQU[0] K15 A10
DDR3_DQU0/DDR2_DQU7 TXD3N/LLV6P/BLUE[2]/EPI_B1N LVDS_TXD3N
FRC_DQU[1] N15 A9
DDR3_DQU1/DDR2_DQML TXD4P/LLV7N/BLUE[5]/EPI_B0P LVDS_TXD4P
FRC_DQU[2] K17 B9
DDR3_DQU2/DDR2_DQU2 TXD4N/LLV7P/BLUE[4]/EPI_B0N LVDS_TXD4N
URSA5 H/W OPTION FRC_DQU[3] P17
+3.3V_FRC DDR3_DQU3/DDR2_DQU6
FRC_DQU[4] L17
DDR3_DQU4/DDR2_NC
FRC_DQU[5] P16 D10
L/DIM_EDGE_32/37

DDR3_DQU5/DDR2_DQU1 MOD_GPIO0/VDD_ODD/HSYNC URSA_MODEL_OPT_0

FRC_DQU[6] K16 D11
LVDS_EXT_URSA5

DDR3_DQU6/DDR2_DQU0 MOD_GPIO1/VDD_EVEN/VSYNC URSA_MODEL_OPT_1

R5209 10K

R5213 10K

R5217 10K
R5205 10K

FRC_DQU[7] P15 D12

DDR3_DQU7/DDR2_DQMU MOD_GPIO2/PWM13/GCLK4/LCK URSA_MODEL_OPT_2
D13
OPT

OPT

MOD_GPIO3/PWM14/GCLK2/LDE 2D/3D_CTL
FRC_DQU[0-7] F14
DDR3_NC/DDR2_A13 R5253 3D-SG 33
+3.3V_FRC T16 3D_SYNC_RF
DDR3_NC/DDR2_DQL4
U12 R5250 33
URSA_MODEL_OPT_0 PWM0/SCAN_BLK1 PWM0
R5220 4.7K OPT T12 R5251 33
URSA_MODEL_OPT_1 PWM1/SCAN_BLK2 PWM1
D14
URSA_MODEL_OPT_2 R5221 4.7K OPT I2CM_SCL
L/DIM_EDGE_42/47/55

D15 G3
2D/3D_CTL I2CM_SDA LPLL_FBCLK
33 R5222 P1 E17
LVDS_S7M-PLUS

SCL2_+3.3V_URSA I2CS_SCL LPLL_OUTCLK

R5218 OPT 10K

P2 H3
10K

33 R5223
10K

10K

SDA2_+3.3V_URSA I2CS_SDA LPLL_REFIN

MODEL OPTION

TESTPIN_1
TESTPIN_2
TESTPIN_3
TESTPIN_4
TESTPIN_5
TESTPIN_6
TESTPIN_7
TESTPIN_8
HW_RESET
R5210 OPT

M0_SCLK
M0_MOSI
M1_SCLK
M1_MOSI
M2_SCLK
M2_MOSI
M3_SCLK
M3_MOSI
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72

SPI_CK
SPI_CZ
SPI_DI
SPI_DO
PIN NAME PIN NO.
R5206

HIGH LOW
R5214

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9

NC
MODEL_OPT_0 D10 L/DIM_10BLOCK L/DIM_16BLOCK
D6
D7
D8
D9
E6
E7
E8
E9
E10
E16
F3
F6
F7
F8
F9
G1
G2
G4
G5
G6
G7
G8
G9
G17
H1
H2
H4
H5
H6
H7
H8
H9
H10
H11
J4
J5
J6
J7
J8
J9
J10
J11
J12
J14
J16
K4
K5
K6
K7
K8
K11
L6
L7
L8
L11
L16
M6
M7
M8
M11
M13
N6
N7
N8
N17
P3
P4
P5
P6
P7
P12
U16

L9

J3
D1
D2
D3
E1
E2
E3
F1
F2

C17
D16
D17
E15
E14
E13
E12
F13

T9
33 U10
33 U9
T10
MODEL_OPT_1 D11 RESERVED RESERVED

33
MODEL_OPT_2 D12 LVDS_EXT_URSA5 LVDS_S7M_PLUS
NON USED
MODEL_OPT_3 D13 RESERVED RESERVED BCM35230 LVDS CHC/D

R5247
R5248

R5249
TXC0N
Debugging for URSA5 TXC0P
TXC1N
P5201 +3.3V_FRC
Q5202 TXC1P
12507WR-04L

SPI_SCLK
AO3407A

SPI_DI
M0_SCLK
M0_MOSI
M1_SCLK
M1_MOSI
M2_SCLK
M2_MOSI
M3_SCLK

SPI_CS

SPI_DO
M3_MOSI
TXC2N

D
TXC2P
URSA5_DEBUG
TXCCLKN
1 SW5201 C5212 URSA5_UO2_RESET
JS2235S R5255 TXCCLKP

G
22K 4.7uF
R5219 16V TXC3N
URSA5_UO2_RESET
10K URSA5_UO2_RESET TXC3P
2
OPT TXC4N
1 6 SDA2_3.3V
URSA5_DEBUG SCL2_3.3V
R5258 R5259 TXC4P
3 R5201 22 0 0 R5262
SCL2_+3.3V_DB URSA5_MP 2.2K TXD0N
URSA5_MP 2 5
SCL2_+3.3V_URSA SDA2_+3.3V_URSA URSA5_UO2_RESET TXD0P
URSA5_DEBUG R5260 R5261 C
R5202 22 URSA5_DEBUG TXD1N
4 0 0 R5254
SDA2_+3.3V_DB OPT OPT 4.7K
3 4 B Q5201 TXD1P
SCL2_+3.3V_DB SDA2_+3.3V_DB FRC_RESET 2SC3052
5 URSA5_UO2_RESET TXD2N
URSA5_UO2_RESET
R5256 E TXD2P
10K
OPT TXDCLKN
TXDCLKP
TXD3N
TXD3P
R5243 33
TXD4N
URSA5_UO3_RESET
TXD4P
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MStar URSA5 2010. 08.18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FRC block 52 55
 +1.5V_FRC_DDR

Close to DDR Pin

R5301
1K
1% +1.5V_FRC_DDR
+1.5V_FRC_DDR
MVREFCA DDR3 1.5V De-Cap Place near Memory
R5302
1K
1% C5301
0.1uF

0.1uF
C5305
C5303 C5304

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
C5306

C5307

C5308

C5309

C5310

C5311

C5312

C5313

C5314
0.1uF 22uF
16V 10V
+1.5V_FRC_DDR Place the serail damping resistors
Place Close to DDR Pin in the middle of DRAM pattern
R5303
1K
1%
MVREFDQ
R5311 22
R5304 FRC_DMU DDR3_DMU AR5306
1K
1%
C5302
NON 21:9 Cinema(1600MHz) R5312 22
FRC_DQL[4]
FRC_DQL[6]
DDR3_DQL[4]
DDR3_DQL[6]
0.1uF FRC_DQSL DDR3_DQSL
FRC_DQL[2] DDR3_DQL[2]
IC5301 FRC_DQL[0] DDR3_DQL[0]
H5TQ1G63DFR-PBC DDR3_A[0-13] R5313 22
FRC_DQSLB DDR3_DQSLB 22

IC5301-*1 R5314 22
M8 N3 DDR3_A[0] FRC_DQSU DDR3_DQSU AR5307
H5TQ1G63DFR-RDC MVREFCA VREFCA A0
DDR3_A[1]
P7 FRC_DQU[5] DDR3_DQU[5]
A1
21:9 Cinema(1866MHz) P3 DDR3_A[2] R5315 22 FRC_DQU[3] DDR3_DQU[3]
A2 FRC_DQSUB DDR3_DQSUB
H1 N2 DDR3_A[3] FRC_DQU[7] DDR3_DQU[7]
N3 M8 MVREFDQ VREFDQ A3
A0 VREFCA P8 DDR3_A[4] FRC_DQU[1] DDR3_DQU[1]
P7 A4 R5316 22
A1 P2 DDR3_A[5] FRC_DML DDR3_DML 22
P3 R5305 A5
A2 L8 R8 DDR3_A[6]
N2 H1 ZQ A6
A3 VREFDQ 240 R2 DDR3_A[7] R5317 22
P8 A7 FRC_ODT DDR3_ODT AR5308
A4 1% T8 DDR3_A[8]
P2 A8 FRC_DQU[4] DDR3_DQU[4]
A5 B2 R3 DDR3_A[9]
R8 L8 VDD_1 A9 R5318 22 FRC_DQU[6] DDR3_DQU[6]
A6 ZQ D9 L7 DDR3_A[10] FRC_RASB DDR3_RASB
R2 VDD_2 A10/AP FRC_DQU[2] DDR3_DQU[2]
A7 G7 R7 DDR3_A[11]
T8 VDD_3 A11 FRC_DQU[0] DDR3_DQU[0]
A8 K2 N7 DDR3_A[12] R5319 22
R3 B2 VDD_4 A12/BC FRC_CKE DDR3_CKE 22
A9 VDD_1 K8 T3 DDR3_A[13] Place Close to DDR Pin
L7 D9 VDD_5 A13
A10/AP VDD_2 N1
R7 G7 VDD_6 R5320 22
A11 VDD_3 N9 M7 FRC_MCLK DDR3_MCK AR5309
N7 K2 VDD_7 A15 R5309
A12/BC VDD_4 R1 56 FRC_DQL[3] DDR3_DQL[3]
T3 K8 VDD_8 DDR3_MCK
NC_6 VDD_5 R9 M2 R5321 22 FRC_DQL[1] DDR3_DQL[1]
N1 VDD_9 BA0 DDR3_BA0 R5310 FRC_MCLKB DDR3_MCKB
VDD_6 N8 FRC_DQL[5] DDR3_DQL[5]
M7 N9 BA1 DDR3_BA1 56
NC_5 VDD_7 M3 C5315 DDR3_MCKB FRC_DQL[7] DDR3_DQL[7]
R1 BA2 DDR3_BA2 R5322 22
VDD_8 A1 DDR3_MCK 0.01uF FRC_DDR3_RESETB DDR3_RESETB 22
M2 R9 VDDQ_1

R5307
BA0 VDD_9 A8 J7 25V

OPT
150
N8 VDDQ_2 CK
BA1 C1 K7 AR5301
M3 VDDQ_3 CK
BA2 C9 K9 DDR3_MCKB FRC_A[10] DDR3_A[10]
A1 VDDQ_4 CKE
VDDQ_1 D2 DDR3_CKE FRC_BA1 DDR3_BA1
J7 A8 VDDQ_5
CK VDDQ_2 +1.5V_FRC_DDR E9 L2 FRC_A[12] DDR3_A[12]
K7 C1 VDDQ_6 CS
CK VDDQ_3 F1 K1 FRC_A[4] DDR3_A[4]
K9 C9 VDDQ_7 ODT DDR3_ODT
CKE VDDQ_4 H2 J3 22
D2 VDDQ_8 RAS DDR3_RASB +1.5V_FRC_DDR
VDDQ_5 H9 K3
L2 E9 VDDQ_9 CAS DDR3_CASB
CS VDDQ_6 L3
K1 F1 WE DDR3_WEB AR5302
ODT VDDQ_7 J1 R5308 0
J3 H2 NC_1 FRC_A[6] DDR3_A[6]
RAS VDDQ_8 J9 T2
K3 H9 NC_2 RESET DDR3_RESETB FRC_A[8] DDR3_A[8]
CAS VDDQ_9 L1
L3 NC_3 FRC_A[1] DDR3_A[1]
WE L9
J1 NC_4 FRC_A[11] DDR3_A[11]
NC_1 T7 F3
T2 J9 NC_6 DQSL DDR3_DQSL 22
RESET NC_2 G3
L1 DQSL DDR3_DQSLB
NC_3
L9
NC_4 A9 C7 AR5303
F3 T7 VSS_1 DQSU DDR3_DQSU
DQSL NC_7 B3 B7 FRC_A[0] DDR3_A[0]
G3 VSS_2 DQSU DDR3_DQSUB
DQSL E1 FRC_A[2] DDR3_A[2]
VSS_3
G8 E7 FRC_A[13] DDR3_A[13]
C7 A9 VSS_4 DML DDR3_DML
DQSU VSS_1 J2 D3 DDR3_DQL[0-7] FRC_A[9] DDR3_A[9]
B7 B3 VSS_5 DMU DDR3_DMU
DQSU VSS_2 J8 22
E1 VSS_6
VSS_3 M1 E3 DDR3_DQL[0]
E7 G8 VSS_7 DQL0
DML VSS_4 M9 F7 DDR3_DQL[1]
D3 J2 VSS_8 DQL1 AR5304
DMU VSS_5 P1 F2 DDR3_DQL[2]
J8 VSS_9 DQL2
VSS_6 P9 F8 DDR3_DQL[3]
E3 M1 VSS_10 DQL3 FRC_A[7] DDR3_A[7]
DQL0 VSS_7 T1 H3 DDR3_DQL[4]
F7 M9 VSS_11 DQL4 FRC_A[5] DDR3_A[5]
DQL1 VSS_8 T9 H8 DDR3_DQL[5]
F2 P1 VSS_12 DQL5 FRC_A[3] DDR3_A[3]
DQL2 VSS_9 G2 DDR3_DQL[6]
F8 P9 DQL6 22
DQL3 VSS_10 H7 DDR3_DQL[7]
H3 T1 DQL7
DQL4 VSS_11 B1
H8 T9 VSSQ_1
DQL5 VSS_12 B9 D7 DDR3_DQU[0] AR5305
G2 VSSQ_2 DQU0
DQL6 D1 C3 DDR3_DQU[1] FRC_BA2 DDR3_BA2
H7 VSSQ_3 DQU1
DQL7 D8 C8 DDR3_DQU[2] FRC_BA0 DDR3_BA0
B1 VSSQ_4 DQU2
VSSQ_1 E2 C2 DDR3_DQU[3] FRC_WEB DDR3_WEB
D7 B9 VSSQ_5 DQU3
DQU0 VSSQ_2 E8 A7 DDR3_DQU[4] FRC_CASB DDR3_CASB
C3 D1 VSSQ_6 DQU4
DQU1 VSSQ_3 F9 A2 DDR3_DQU[5] 22
C8 D8 VSSQ_7 DQU5
DQU2 VSSQ_4 G1 B8 DDR3_DQU[6]
C2 E2 VSSQ_8 DQU6
DQU3 VSSQ_5 G9 A3 DDR3_DQU[7]
A7 E8 VSSQ_9 DQU7
DQU4 VSSQ_6
A2 F9
DQU5 VSSQ_7
B8 G1
DQU6 VSSQ_8 DDR3_DQU[0-7]
A3 G9
DQU7 VSSQ_9

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MStar URSA5 2010. 08.18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
DDR3 4Mbit 53 55
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
 CORE +1.26V_FRC TYPICAL 980mA
+3.3V_FRC
+1.5V_FRC TYPICAL 350mA +1.5V_FRC_DDR
+12V +3.3V_FRC

IC5401 +1.26V_FRC
R5405 IC5403
AOZ1072AI 10K
L5403 AP7173-SPG-13 HF(DIODES)
POWER_ON/OFF2_2
L5402 3.6uH R5409 OPT10K
NR8040T3R6N [EP]
CIC21J501NE PGND LX_2
1 8 1 8 R1

THERMAL
IN OUT R5414
VIN LX_1 4.3K
2 7 R5406 1%

9
3.3K 2 7
C5406 C5407 R5404 1%
0.1uF 1uF 20K PG FB
AGND
3 2A 6
EN 10V
OPT
R5407
R1
3 6 R5415
3.9K C5412 C5414 3.9K
C5402 C5404 1% 22uF 22uF VCC SS 1%
10uF 10uF FB COMP 10V 10V R5413
25V 25V 4 5 C5410 10K 4 5 R2
R5402 C5408 100pF C5419 R5416 C5420 C5421
20K 3300pF 50V EN GND 560pF 1K 10uF 10uF
Placed on SMD-TOP 50V 1% 16V 16V
OPT EAN41406705
C5416 C5417
10uF 0.1uF
16V 16V C5418
R5408 1uF
12K 10V
1% R2

Vout=(1+R1/R2)*0.8 Vout=0.6*(1+R1/R2)

+1.5V of DDR&URSA5 uses same power line

+3.3V_FRC
+12V
TYPICAL 300mA

L5401
CIC21J501NE

+3.3V_FRC

IC5402
AOZ1072AI-3
L5404
3.6uH
PGND LX_2 NR8040T3R6N
1 8

VIN LX_1
2 7 R5410
C5405 27K
1%
0.1uF R5403
AGND
3 2A 6
EN 10K POWER_ON/OFF2_2
R5411
R1
C5413
22uF
C5415
22uF
4.3K 10V 10V
C5401 C5403 1%
10uF 10uF FB COMP
25V 25V 4 5
C5411
R5401 C5409
20K 2200pF 100pF
EAN60922902 50V
OPT

R5412
10K
1% R2

Vout=0.8*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MStar URSA5 2010. 08.18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR URSA5 Power Block 54 55
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
 USB / DVR Ready

+3.3V_Normal

IC5501 +5V_USB
AP2191DSG
R5501
L5501 NC 8 1 GND 4.7K
MLB-201209-0120P-N2 OPT
OUT_2 7 2 IN_1
120-ohm OUT_1 6 3 IN_2
C5505 R5502
C5501 FLG 5 C5502
100uF 10uF 4 EN 2.7K
16V 0.1uF
10V SIDE_USB_CTL2
3AU04S-305-ZC-(LG)
JK5501
SIDE_USB_OCD2
1
USB DOWN STREAM

WIFI_DM
RCLAMP0502BA
3

WIFI_DP

D5501 D5502
4

D5505

CDS3C05HDMI1 CDS3C05HDMI1
OPT

5.6V
5

5.6V

COMMON JP FOR WIFI MODEL

USB JP1201

JP1202

JP1203
+3.3V_Normal

JP1204

IC5502 +5V_USB
AP2191DSG

L5502 R5503
NC 8 1 GND
MLB-201209-0120P-N2 4.7K
OUT_2 7 OPT
2 IN_1
120-ohm OUT_1 6 3 IN_2
C5506 R5504
FLG 5 2.7K C5504
100uF C5503 4 EN
16V 10uF 0.1uF
3AU04S-305-ZC-(LG) 10V SIDE_USB_CTL1
JK5502

SIDE_USB_OCD1
1
USB DOWN STREAM

SIDE_USB_DM
RCLAMP0502BA
3

SIDE_USB_DP

D5503 D5504
D5506
4

CDS3C05HDMI1 CDS3C05HDMI1
OPT

5.6V 5.6V
5

/RST_HUB

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230 2010. 10. 20
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
USB (NON WIFI) 55
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
THE CRITICAL COMPONENTS IN THE
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
THE

SMD GASKET
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES M1
M1-*3 M1-*2 M1-*1

SMD GASKET 4.5T

SMD GASKET 6.5T

SMD GASKET 5.0T

SMD GASKET 5.5T
MDS62110206 MDS62110204 MDS62110210 MDS62110208
GASKET_6.5T GASKET_5.5T GASKET_5.0T GASKET_4.5T

M2-*3 M2-*2 M2-*1 M2

MDS62110206 MDS62110204 MDS62110210 MDS62110208

GASKET_6.5T GASKET_5.5T GASKET_5.0T GASKET_4.5T

M3-*3 M3-*2 M3-*1 M3

MDS62110206 MDS62110210 MDS62110208
MDS62110204
GASKET_6.5T GASKET_5.0T GASKET_4.5T
GASKET_5.5T

M4-*3 M4-*2 M4-*1 M4

MDS62110206 MDS62110204 MDS62110210 MDS62110208

GASKET_6.5T GASKET_5.5T GASKET_5.0T GASKET_4.5T

M5-*3 M5-*2 M5-*1 M5

MDS62110206 MDS62110204 MDS62110210 MDS62110208

GASKET_6.5T GASKET_5.5T GASKET_5.0T GASKET_4.5T
SYMBOL MARK OF THE SCHEMETIC.

M6-*1 M6
M6-*3 M6-*2
MDS62110206 MDS62110210 MDS62110208
MDS62110204
GASKET_6.5T GASKET_5.0T GASKET_4.5T
GASKET_5.5T
M7-*3 M7-*1 M7

MDS62110206 M7-*2 MDS62110210 MDS62110208

GASKET_6.5T MDS62110204 GASKET_5.0T GASKET_4.5T
GASKET_5.5T
M8-*1 M8
M8-*3
M8-*2 MDS62110208
MDS62110206 MDS62110210
MDS62110204 GASKET_5.0T GASKET_4.5T
GASKET_6.5T
GASKET_5.5T
M9-*3 M9-*1 M9
MDS62110206 M9-*2 MDS62110210 MDS62110208
GASKET_6.5T GASKET_5.0T GASKET_4.5T
MDS62110204
GASKET_5.5T
M10-*3 M10-*1 M10

MDS62110206 M10-*2 MDS62110210 MDS62110208

GASKET_6.5T GASKET_5.0T GASKET_4.5T
MDS62110204
M11-*3 GASKET_5.5T M11-*1 M11
MDS62110206 M11-*2 MDS62110210 MDS62110208
GASKET_6.5T GASKET_5.0T GASKET_4.5T
MDS62110204
GASKET_5.5T
M12-*3 M12-*1 M12

MDS62110206 M12-*2 MDS62110210 MDS62110208

GASKET_6.5T GASKET_5.0T GASKET_4.5T
MDS62110204
GASKET_5.5T

GASKET3.5T_HEATSINK M1-*6 M1-*4

SMD GASKET 8.5T

SMD GASKET 9.5T

SMD GASKET 7.5T

M1-*5
MDS62110213 MDS61887710 MDS62110205
GASKET_9.5T MDS62110209 GASKET_7.5T
M20
GASKET_8.5T
M2-*6 M2-*5 M2-*4
GASKET3.5T_HEATSINK MDS61887710 MDS62110209 MDS62110205
GASKET_9.5T GASKET_8.5T GASKET_7.5T
MDS62110213
M21 M3-*6 M3-*4
MDS61887710 M3-*5 MDS62110205
GASKET_9.5T MDS62110209 GASKET_7.5T
GASKET3.5T_HEATSINK GASKET_8.5T
MDS62110213 M4-*6
M4-*4
M22 MDS61887710 M4-*5
MDS62110205
GASKET_9.5T MDS62110209 GASKET_7.5T
GASKET_8.5T
GASKET3.5T_HEATSINK M5-*6 M5-*4
MDS62110213 MDS61887710 M5-*5 MDS62110205
GASKET_9.5T GASKET_7.5T
M23 MDS62110209
GASKET_8.5T
M6-*6
M6-*4
M6-*5
MDS61887710 MDS62110205
GASKET_9.5T MDS62110209 GASKET_7.5T
GASKET_8.5T
M7-*6 M7-*4
MDS61887710 M7-*5 MDS62110205
GASKET_9.5T GASKET_7.5T
MDS62110209
GASKET_8.5T
M8-*6
M8-*4
MDS61887710 M8-*5 MDS62110205
GASKET_9.5T GASKET_7.5T
MDS62110209
GASKET_8.5T
M9-*6 M9-*4
MDS61887710 M9-*5 MDS62110205
GASKET_9.5T GASKET_7.5T
MDS62110209
M10-*6 GASKET_8.5T
M10-*4
MDS61887710 MDS62110205
M10-*5
GASKET_9.5T GASKET_7.5T
MDS62110209
M11-*6 GASKET_8.5T M11-*4
MDS61887710 M11-*5 MDS62110205
GASKET_9.5T GASKET_7.5T
MDS62110209
M12-*6 GASKET_8.5T
M12-*4
SMD GASKET

MDS61887710 MDS62110205
M12-*5
GASKET_9.5T GASKET_7.5T
BCM35230

MDS62110209
GASKET_8.5T
2010. 09. 18
56
56
 DUAL COMPONENT +12V

FROM LIPS & POWER B/D Q501,Q504,

Q505,Q506 1ST : 0TRIY80001A 2ND : 0TR387500AA L511
PANEL_POWER TYP 1450mA
+3.5V_ST 12V_PANEL
RT1P141C-T112 MLB-201209-0120P-N2
Q502 1ST : 0TRIH80004A, 2ND : EBK61012501, 3RD : 0TR102009AM
Q502
C551 PANEL_VCC
Q507 C550 0.1uF
R508 1 3 1ST : EBK60752501, 2ND : EBK61011501 0.01uF 50V
4.7K NORMAL_26~55 50V
R502 C Q507
2 P502
+24V AO3407A
RL_ON 10K
B Q501
FW20020-24S IC502,IC503 1ST : EAN61151001, 2ND : EAN60670101

D
2SC3052

5V_PANEL

PANEL_DISCHARGE_REG
R558-*1

12V_PANEL12V_PANEL
R558

PANEL_DISCHARGE_REG
C560
10K
C552

OPT 1uF
25V
E L504
PWR ON 1 2 24V 10uF
MLB-201209-0120P-N2

22K
G

1/8W

1/8W
24V 24V 25V C563

R575

R576
2K

2K
3 4
GND GND 0.1uF
+3.5V_ST 5 6
L503 C519
OS Module OPT R555 50V

5V_PANEL
R559-*1

R559
1.8K
GND 7 8 GND 0.1uF
MLB-201209-0120P-N2 22K
3.5V 3.5V 50V

2.7K
9 10
3.5V 11 12 3.5V
C508 POWER_16_URSA_SCAN OPT
GND GND R574 0 C
0.1uF 13 14 L_VS R532 R554
GND GND/V-sync R573 0 100 POWER_18_INV_CTL 10K B Q506
16V 15 16 L/DIM0_VS
12V INV ON POWER_16_BCM_SCAN INV_CTL_18 2SC3052
17 18 INV_CTL_18 R533 POWER_18_A_DIM
12V A.DIM A_DIM C
19 20 A_DIM_20 0 R553 R557 E
+12V 12V 21 22 P.DIM1 47K B Q505 22K
PWM_DIM_22 POWER_20_A_DIM PANEL_CTL
L501 GND/P.DIM2 Err OUT 2SC3052
MLB-201209-0120P-N2 23 24 R531 0 A_DIM
A_DIM_20
SLIM_32~55 POWER_20_PWM_DIM E

POWER_16_GND
ERROR_OUT_24 PWM_DIM
C506 R538 0
25

R518
0.1uF
50V SMAW200-H24S2 +3.3V_Normal

0
P501
ERROR_OUT_PULL_UP
R523
4.7K

+3.5V_ST
ERROR_OUT +3.3V_Normal
#16/#20/#23
LD - GND OR USE
R529 0
POWER_20_ERROR_OUT R546
1K
R551
OPT
+1.5V_DDR Max 800mA
POWER_22_A_DIM 10K
LE(N.L.D.) - OPEN R535 0 A_DIM
PWM_DIM_22
LE(L.D.) - USE POWER_22_PWM_DIM R543
C
R547 +3.5V_ST
PWM_DIM INV_CTL
R526 0 R540 0 6.8K B 10K IC508
NON_OPC/NON_IOP +1.5V_DDR
R527 0 OPT Q504 AP7173-SPG-13 HF(DIODES)
2SC3052 L517
E R552
BLM18PG121SN1D [EP]
POWER_24_PWM_DIM 10K
OPT

Power_DET ERROR_OUT_24
POWER_24_INV_CTL IN
1 8
OUT

POWER_24_GND
100 R537

THERMAL
0
PG FB
R1

9
+12V +3.5V_ST 2 7
R517 ERROR_OUT
100K +3.5V_ST R541 0
R595

R524
POWER_24_ERROR_OUT
VCC SS 4.3K
PD_+12V PD_+3.5V R522 3 6 1%
R512 R515 10K C594 C591
2.7K 0 IC503
NCP803SN293
OPT R591
1.5A 22uF 0.1uF
1% 5% POWER_ON/OFF1 10K EN GND C593 10V 16V
<OS MODULE PIN MAP> 4 5
560pF
R593
R520 POWER_DET 3.9K
VCC RESET 100 50V 1%
3 2 R2
1 PIN No LGD CMO(09) AUO SHARP C590 R592
C580 10uF 1K
PD_+12V 0.1uF 1%
GND 10V
R513 16V
1.21K ESD INV_ON A-DIM INV_ON
18 INV_ON
1% C520
0.1uF
16V V4:VBR-A
20 V5:NC NC Err_out Err_out
PD_+18.5_20_24V
+24V R516 22 PWM_DIM PWM_DIM A-DIM PWM_DIM
100K

PD_+18.5V PD_+18.5_20_24V
not to RESET at 8kV ESD
24
Err_out
LED:GND INV_ON PWM_DIM GND Vout=0.8*(1+R1/R2)
PD_+20V
R510-*4 R510-*3 PD_24V IC502
5.6K 4.7K R510 NCP803SN293
1% 1% 8.2K
1% R519
CHECK PWR/MODULE PIN MAP
VCC 3 2 RESET 100 15V-->3.6V
20V-->3.5V
PD_+20V PD_+18.5V 1 PD_+18.5_20_24V
R511-*4 R511-*3
PD_24V C581 24V-->3.48V
1.3K
1%
1.21K
R511
1.5K
0.1uF
16V
GND
12V-->3.58V
ST_3.5V-->3.5V
+5V_Normal MAX 1A
1% 1% PD_+18.5_20_24V
+12V +3.3V_NORMAL MAX 2.8A
+5V_Normal
+12V IC507
L507
AOZ1073AIL-3
IC505
BLM18PG121SN1D [EP]PGND TPS54425PWPR +3.3V_Normal L516
+0.9V_CORE_BCM35230 VIN2 VO
L514
BLM18PG121SN1D
PGND
1 8
LX_2 3.6uH

14 1 NR8040T3R6N
VIN LX_1

THERMAL
+12V 2 7

R570
R534

1%
51K
15
VIN1 VFB 10K
13 2
C501
10uF
C502
10uF
C535
0.1uF 1% Placed on SMD-TOP AGND
3
3A 6
EN POWER_ON/OFF2_1
R1
C568
22uF
C570
22uF
16V 16V 50V R562 10V 16V

3.6K
L502 VBST VREG5 C546 R566

1%
0

R571
OPT OPT 12 3 10K
BLM18PG121SN1D Max 7350 mA R2 10uF
FB COMP R564 12K
1/10W C512 16V
5% SW2
4A SS
1uF
25V R530
4 5
C557
OPT
C559
C511 11 4 33K 0.1uF C565
Placed on SMD-TOP 1% 2200pF 100pF
0.1uF R521 C595 16V
50V 22pF 50V
SW1 GND 0 R1
10 5 50V OPT
R509 C514 R525
3300pF 330
100K 1%
PGND2 PG 50V
C503 C505 9 6
10uF 10uF

R572
16V 16V

1%
10K
PGND1 EN R514 10K
8 7
C537
POWER_ON/OFF2_2
R2
0.1uF +3.3V_Normal
OPT
Vout=0.8*(1+R1/R2) Switching freq: 500K
POWER_ON/OFF2_2 Q503
AON7430
L508
2uH

R503
D 5 4

3
G

S_3
C517
22uF
10V
C518
22uF
10V +12V
+5V_USB+WIFI MAX 1.9A
1K
IC501
TPS40192DRCR EP_GND
C504
100pF
2 S_2
Vout=0.8*(1+R1/R2) L513 +5V_USB
+0.9V_CORE
50V ENABLE HDRV 1 S_1 CIC21J501NE
1 10 R577 4.7 L505 IC506

+2.5V_BCM35230 MP8706EN-C247-LF-Z
THERMAL

0.9V_CORE_FB +2.5V_BCM35230
Max 960 mA
11

FB SW
0.47uF

2 9 1uH OPT
OPT
C515

R504 C510 C522 C524 C525

25V

C523 IN GND
2K 0.01uF 22uF 22uF 47uF 10uF IC504 1 8
50V COMP BOOT
3 8 10V 10V 10V 10V AP2132MP-2.5TRG1 [EP] C528

R549
OPT

1%
33K
C509 50V 1uF C529
220pF G 4 5 D +3.5V_ST SW_1 VCC C530 C532 C534 C536
2 7 50V 100pF 100pF 22uF 0.1uF 0.1uF
VDD LDRV
+3.3V_Normal 4 7 R578 4.7 C521 50V 50V 10V 16V 16V
4.7uF

1 8 R1
3A R542
C516

S_3 3 10uF OPT

10V

OPT SW_2 FB 10K

THERMAL

TEST R507 PG GND R544 25V 3 6

120-ohm

10K OPT PGD BP5 R528 18K R2

5 6 POWER_ON/OFF2_1 10K C526
L506

S_2 2 2 7 1%
0.1uF POWER_ON/OFF2_1
C513 BST EN/SYNC

R550
6.2K
C507 0.1uF EN ADJ R545

1%
4 5
1000pF 16V S_1 1 56K R1
50V R506 3 6 1% R539 R548
330 22 10K
R536

EAN31346002
R2
10K

AON7200 VIN VOUT

R505 C533
Q508
C527 0.1uF
OPT
4 2A 5
6.8K 10uF +5V_Normal L509
VCTRL NC C538 C539
1% R1 0.9V_CORE_FB 3.6uH
6.3V EAN61387601 47uF 10uF
10V 6.3V
R501 NR8040T3R6N
12K
1%
R2 Vout=(1+R1/R2)*0.8
Vout=0.591*(1+R1/R2) Switching freq: 600K C531
1uF
OPT

Vout=0.6*(1+R1/R2) Vout=0.8*(1+R1/R2)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER 5 58