Abstract  This paper presents a design of a Multi inverter, and the cascaded Hbridge inverter. All the
Carrier Pulse Width Modulation (MCPWM) Strategy for an topologies have the same property of reducing the
eleven level inverter. The emergence of multilevel inverters harmonics [5].The flying capacitor inverter topology is
(MLI) has increased since the last decade. They are suitable tedious to realize, because every capacitor voltage is
for high voltage and high power applications, due to their
different from the other ,therefore charging becomes
ability to synthesize waveforms with a better harmonic
difficult [3 ]. The clamped inverter which is
spectrum. Numerous topologies have been introduced and
widely studied, for utility and drive applications. Multilevel
commonly known as a neutral clamped converter is not
inverters are commonly modulated, by using multicarrier preferred because it has the problem of DC link voltage
pulse width modulation techniques, such as phaseshifted unbalancing [3 ].
multicarrier modulation, and levelshifted multicarrier
modulation. Amongst these, the levelshifted multicarrier The cascaded inverter has the disadvantage of
modulation technique produces the best harmonic separate DC source but circuit layout is compact and the
performance. This work studies a multilevel inverter with voltage sharing problem is absent .Hence it is easy to
equal DC sources, using the level shifting MCPWM
expand. It is applicable in high power motor drive and
technique. By applying this concept, harmonics can be
HVDC [1][5].
eliminated, and in the output voltage, the Total Harmonic
Distortion (THD) can be improved. A procedure to achieve
the appropriate level shifting is presented in this paper. This paper presents a control technique to the multi
level cascaded inverter so that its harmonic content is
Keywords MultiCarrier Pulse Width Modulation reduced and hence voltage is effectively used. Level
(MCPWM), Total Harmonic Distortion (THD), MultiLevel shifting is a wellestablished emerging modulation and
Inverters (MLI). control technique that has been designed and discussed.
5
In the phase opposition disposition (POD) the
,L:'.,,'::"_:":::,:
::::
= :S:::='
,:
:
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 carriers above the reference point, are out of phase with
Figure 2: An eleven level multilevel inverter output.
those below zero, by 180.
Figure 3 : Modulation strategies for multilevel inverters. Figure 5: Carrier arrangements for APOD.
In the carrierbased multilevel modulation, each In the phase disposition (PD), all the carriers are
level in a phase requires a carrier of its own. For the in phase across all the bands. This gives rise to the lowest
SCRBI, this means that every module has its own carrier, harmonic in the higher modulation indices, when
which is compared with the reference voltage. Carrier compared to the other disposition method.
510
2012 International Conference on Computing, Electronics and Electrical Technologies [ICCEET]
The level shifted multicarrier modulation offers Table 1 Switching strategy for eleven level
better harmonic attenuation, but also offers an unequal
device condition.
S S S S S S S S S S
Output
IV SIMULATION RESULTS 1 2 3 4 5 6 7 8 9 10
5 Vdc 1 0 1 0 1 0 1 0 1 0
The feasibility of the proposed PWM strategy has
been investigated and verified through computer 1 0 1 0 I 0 1 0 0 0
4Vdc
simulation results, for both multilevel inverter and multi 1 0 0 0 1 0 1 0 I 0
carrier PWM inverter, for an eleven level cascaded H 1 0 1 0 1 0 0 0 0 0
Bridge inverter. 3Vdc
1 0 0 0 I 0 1 0 0 0
1 0 1 0 0 0 0 0 0 0
A. MULTILEVEL INVERTER
2Vdc 1 0 0 0 1 0 0 0 0 0
1rvYv1
100
M
'
00
;;';
0 ,,;
, co
Figure
,;;o.;
o.ooc;oc;
ooc
; o.;;"
oo
8: Eleven level output for R load.
FFT analysis
I
200
_.1 400
600
8
1000
Frequency (Hz)
511
2012 International Conference on Computing, Electronics and Electrical Technologies [ICCEET]
r;;;J
WI
 ..
:
:"" t

6
 
 , 
Figure 11: Subsystem representation of MCPWM

B i!1 80f+i Trigonom Etric
Fundion
 Constant
. ___ t "I
512
2012 International Conference on Computing, Electronics and Electrical Technologies [ICCEET]
REFERENCES
6
1461.
Figure 14: FFT analysis for MCPWM for R load. 4. Grath and Holmes, "Multicarrier PWM strategies for
multilevel inverters," IEEE Trans. Ind. Electron., vol.
49, no. 4, pp. 858867, Aug. 2002
V CONCLUSION
9. Sakly, Delarue, and Bausiere, "Rejection of
undesirable effectsof input
DCvoltage ripple in
It is easy to conclude that the multilevel inverter h
singlephasePWM inverters," in Proc. 5t Eur. Conf.
research and development activities are experiencing an on Power Electronics and Applications, Sep. 1316,
explosive rate of growth. A trend of having more and more 1993,vol. 4, pp. 6570.
multilevel inverters is obvious. Detailed circuit simulation
was conducted to verify the inverter operation. The 10. Thoegersen .Blaabjerg, and Pedersen, "Improved
research and development is extended to areas such as modulation techniques for PWM drives," IEEE
high voltage high power semiconductor devices, sensors, Trans. Ind. Electron., vol. 44,no. 1, pp. 8795,
and high speed DSPs. Also, the behavior of the eleven Feb. 1997.
513
2012 International Conference on Computing, Electronics and Electrical Technologies [ICCEET]
514
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