High Speed, Low Noise

Video Op Amp
Data Sheet AD829
FEATURES CONNECTION DIAGRAM
High speed OFFSET NULL 1
AD829 8 OFFSET NULL

120 MHz bandwidth, gain = 1 IN 2 7 +VS

+IN 3 OUTPUT
230 V/s slew rate
6

VS 4 TOP VIEW 5 CCOMP

90 ns settling time to 0.1% (Not to Scale)

00880-001
Ideal for video applications
0.02% differential gain Figure 1. 8-Lead PDIP (N), CERDIP (Q), and SOIC (R)
0.04 differential phase

OFFSET

OFFSET
NULL

NULL
Low noise

NC

NC

NC
3 2 1 20 19
1.7 nV/Hz input voltage noise
1.5 pA/Hz input current noise NC 4 18 NC

IN 5 17 +V
Excellent dc precision NC 6
AD829
TOP VIEW 16 NC

1 mV maximum input offset voltage (over temperature) +IN 7 (Not to Scale) 15 OUTPUT

NC 8 14 NC
0.3 V/C input offset drift
Flexible operation 9 10 11 12 13

NC
V
NC
CCOMP
NC

00880-002
Specified for 5 V to 15 V operation NC = NO CONNECT
3 V output swing into a 150 load
Figure 2. 20-Terminal LCC
External compensation for gains 1 to 20
5 mA supply current Operating as a traditional voltage feedback amplifier, the AD829
Available in tape and reel in accordance with EIA-481A standard provides many of the advantages that a transimpedance amplifier
offer. A bandwidth >50 MHz can be maintained for a range of
GENERAL DESCRIPTION gains through the replacement of the external compensation
The
"% is a low noise (1.7 nV/Hz), high speed op amp with capacitor. The AD829 and the transimpedance amplifier are both
custom compensation that provides the user with gains of 1 to 20 unity-gain stable and provide similar voltage noise performance
while maintaining a bandwidth >50 MHz. Its 0.04 differential (1.7 nV/Hz); however, the current noise of the AD829
phase and 0.02% differential gain performance at 3.58 MHz and (1.5 pA/Hz) is less than 10% of the noise of transimpedance
4.43 MHz, driving reverse-terminated 50 or 75 cables, makes amplifiers. The inputs of the AD829 are symmetrical.
it ideally suited for professional video applications. The AD829
PRODUCT HIGHLIGHTS
achieves its 230 V/s uncompensated slew rate and 750 MHz
gain bandwidth while requiring only 5 mA of current from 1. The input voltage noise of 2 nV/Hz, current noise of
power supplies. 1.5 pA/Hz, and 50 MHz bandwidth for gains of 1 to 20
make the AD829 an ideal preamp.
The external compensation pin of the AD829 gives it
2. A differential phase error of 0.04 and a 0.02% differential
exceptional versatility. For example, compensation can be
gain error, at the 3.58 MHz NTSC, 4.43 MHz PAL, and
selected to optimize the bandwidth for a given load and power
SECAM color subcarrier frequencies, make the op amp an
supply voltage. As a gain-of-2 line driver, the 3 dB bandwidth
outstanding video performer for driving reverse-terminated
can be increased to 95 MHz at the expense of 1 dB of peaking.
50 and 75 cables to 1 V (at their terminated end).
Its output can also be clamped at its external compensation pin.
3. The AD829 can drive heavy capacitive loads.
The AD829 exhibits excellent dc performance. It offers a minimum 4. Performance is fully specified for operation from 5 V
open-loop gain of 30 V/mV into loads as low as 500 , a low input to 15 V supplies.
voltage noise of 1.7 nV/Hz, and a low input offset voltage of 1 mV 5. The AD829 is available in PDIP, CERDIP, and small outline
maximum. Common-mode rejection and power supply rejection packages. Chips and MIL-STD-883B parts are also available.
ratios are both 120 dB. The 8-lead SOIC is available for the extended temperature
This op amp is also useful in multichannel, high speed data range (40C to +125C).
conversion where its fast (90 ns to 0.1%) settling time is important.
In such applications, the AD829 serves as an input buffer for 8-bit to
10-bit ADCs and as an output I/V converter for high speed DACs.

Rev. I
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com
Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 2011 Analog Devices, Inc. All rights reserved.
AD829* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017

COMPARABLE PARTS REFERENCE MATERIALS

View a parametric search of comparable parts. Product Selection Guide
High Speed Amplifiers Selection Table
EVALUATION KITS Tutorials
Universal Evaluation Board for Single High Speed MT-032: Ideal Voltage Feedback (VFB) Op Amp
Operational Amplifiers
MT-033: Voltage Feedback Op Amp Gain and Bandwidth
MT-047: Op Amp Noise
DOCUMENTATION
MT-048: Op Amp Noise Relationships: 1/f Noise, RMS
Application Notes Noise, and Equivalent Noise Bandwidth
AN-402: Replacing Output Clamping Op Amps with Input MT-049: Op Amp Total Output Noise Calculations for
Clamping Amps Single-Pole System
AN-417: Fast Rail-to-Rail Operational Amplifiers Ease MT-052: Op Amp Noise Figure: Don't Be Misled
Design Constraints in Low Voltage High Speed Systems
MT-053: Op Amp Distortion: HD, THD, THD + N, IMD,
AN-581: Biasing and Decoupling Op Amps in Single SFDR, MTPR
Supply Applications
MT-056: High Speed Voltage Feedback Op Amps
Data Sheet
MT-058: Effects of Feedback Capacitance on VFB and CFB
AD829: High Speed, Low Noise Video Op Amp Data Sheet Op Amps
AD829: Military Data Sheet MT-060: Choosing Between Voltage Feedback and
User Guides Current Feedback Op Amps
UG-135: Evaluation Board for Single, High Speed
Operational Amplifiers (8-Lead SOIC and Exposed Paddle) DESIGN RESOURCES
AD829 Material Declaration
TOOLS AND SIMULATIONS PCN-PDN Information
Analog Filter Wizard Quality And Reliability
Analog Photodiode Wizard Symbols and Footprints
Power Dissipation vs Die Temp
VRMS/dBm/dBu/dBV calculators DISCUSSIONS
AD829 SPICE Macro-Model View all AD829 EngineerZone Discussions.

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AD829 Data Sheet

TABLE OF CONTENTS
Features .............................................................................................. 1
General Description ......................................................................... 1
Connection Diagram ....................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Characteristics .............................................................. 5
Test Circuits ..................................................................................... 11
Theory of Operation ...................................................................... 12
Externally Compensating the AD829...................................... 12
Shunt Compensation ................................................................. 12
Current Feedback Compensation ............................................ 13
Low Error Video Line Driver ................................................... 15
High Gain Video Bandwidth, 3-Op-Amp Instrumentation
Amplifier ..................................................................................... 16

Metallization Photo ...................................................................... 5 Outline Dimensions ....................................................................... 17

ESD Caution .................................................................................. 5 Ordering Guide .......................................................................... 19

Typical Performance Characteristics ............................................. 6

REVISION HISTORY
10/11Rev. H to Rev. I
Change to Table 2 ............................................................................. 5
4/09Rev. G to Rev. H
Changes to Features.......................................................................... 1
Changes to Quiescent Current Parameter, Table 1 ...................... 4
Changes to Table 2 ............................................................................ 5
Added Thermal Characteristics Section and Table 3 .................. 5
Updated Outline Dimensions ....................................................... 17
Changes to Ordering Guide .......................................................... 19
2/03Rev. E to Rev. F
Renumbered Figures ......................................................... Universal
Changes to Product Highlights .......................................................1
Changes to Specifications .................................................................2
Changes to Absolute Maximum Ratings ........................................4
Changes to Ordering Guide .............................................................4
Updated Outline Dimensions ....................................................... 13

4/04Rev. F to Rev. G
Added Figure 1; Renumbered Sequentially .................................. 4
Changes to Ordering Guide ............................................................ 5
Updated Table I ............................................................................... 11
Updated Figure 15 .......................................................................... 12
Updated Figure 16 .......................................................................... 13
Updated Outline Dimensions ....................................................... 14

Rev. I | Page 2 of 20
Data Sheet AD829

SPECIFICATIONS
TA = 25C and VS = 15 V dc, unless otherwise noted.

Table 1.
AD829JR AD829AR AD829AQ/AD829S
Parameter Conditions VS Min Typ Max Min Typ Max Min Typ Max Unit
INPUT OFFSET VOLTAGE tMIN to tMAX 5 V, 0.2 1 0.2 1 0.1 0.5 mV
15 V
1 1 0.5 mV
Offset Voltage Drift 5 V, 0.3 0.3 0.3 V/C
15 V
INPUT BIAS CURRENT 5 V, 3.3 7 3.3 7 3.3 7 A
15 V
tMIN to tMAX 8.2 9.5 9.5 A
INPUT OFFSET CURRENT 5 V, 50 500 50 500 50 500 nA
15 V
tMIN to tMAX 500 500 500 nA
Offset Current Drift 5 V, 0.5 0.5 0.5 nA/C
15 V
OPEN-LOOP GAIN VO = 2.5 V, 5 V 30 65 30 65 30 65 V/mV
RL = 500
RL = 150 40 40 40 V/mV
tMIN to tMAX 20 20 20 V/mV
VO = 10 V, 15 V 50 100 50 100 50 100 V/mV
RL = 1 k
RL = 500 85 85 85 V/mV
tMIN to tMAX 20 20 20 V/mV
DYNAMIC PERFORMANCE
Gain Bandwidth Product 5 V 600 600 600 MHz
15 V 750 750 750 MHz
Full Power Bandwidth 1, 2 VO = 2 V p-p, 5 V 25 25 25 MHz
RL = 500
VO = 20 V p-p, 15 V 3.6 3.6 3.6 MHz
RL = 1 k
Slew Rate2 RL = 500 5 V 150 150 150 V/s
RL = 1 k 15 V 230 230 230 V/s
Settling Time to 0.1% AV = 19
2.5 V to 5 V 65 65 65 ns
+2.5 V
10 V step 15 V 90 90 90 ns
Phase Margin2 CL = 10 pF 15 V
RL = 1 k 60 60 60 Degrees
DIFFERENTIAL GAIN ERROR 3 RL = 100 , 15 V 0.02 0.02 0.02 %
CCOMP = 30 pF
DIFFERENTIAL PHASE ERROR3 RL = 100 , 15 V 0.04 0.04 0.04 Degrees
CCOMP = 30 pF
COMMON-MODE REJECTION VCM = 2.5 V 5 V 100 120 100 120 100 120 dB
VCM = 12 V 15 V 100 120 100 120 100 120 dB
tMIN to tMAX 96 96 96 dB
POWER SUPPLY REJECTION VS = 4.5 V 98 120 98 120 98 120 dB
to 18 V
tMIN to tMAX 94 94 94 dB
INPUT VOLTAGE NOISE f = 1 kHz 15 V 1.7 2 1.7 2 1.7 2 nV/Hz
INPUT CURRENT NOISE f = 1 kHz 15 V 1.5 1.5 1.5 pA/Hz

Rev. I | Page 3 of 20
AD829 Data Sheet
AD829JR AD829AR AD829AQ/AD829S
Parameter Conditions VS Min Typ Max Min Typ Max Min Typ Max Unit
INPUT COMMON-MODE 5 V +4.3 +4.3 +4.3 V
VOLTAGE RANGE
3.8 3.8 3.8 V
15 V +14.3 +14.3 +14.3 V
13.8 13.8 13.8 V
OUTPUT VOLTAGE SWING RL = 500 5 V 3.0 3.6 3.0 3.6 3.0 3.6 V
RL = 150 5 V 2.5 3.0 2.5 3.0 2.5 3.0 V
RL = 50 5 V 1.4 1.4 1.4 V
RL = 1 k 15 V 12 13.3 12 13.3 12 13.3 V
RL = 500 15 V 10 12.2 10 12.2 10 12.2 V
Short-Circuit Current 5 V, 32 32 32 mA
15 V
INPUT CHARACTERISTICS
Input Resistance 13 13 13 k
(Differential)
Input Capacitance 5 5 5 pF
(Differential) 4
Input Capacitance 1.5 1.5 1.5 pF
(Common Mode)
CLOSED-LOOP OUTPUT AV = +1, 2 2 2 m
RESISTANCE f = 1 kHz
POWER SUPPLY
Operating Range 4.5 18 4.5 18 4.5 18 V
Quiescent Current 5 V 5 6.5 5 6.5 5 6.5 mA
tMIN to tMAX 8.0 8.0 8.7 mA
15 V 5.3 6.8 5.3 6.8 5.3 6.8 mA
tMIN to tMAX 8.3 9.0 9.0 mA
TRANSISTOR COUNT Number of 46 46 46
transistors
1
Full power bandwidth = slew rate/2 VPEAK.
2
Tested at gain = 20, CCOMP = 0 pF.
3
3.58 MHz (NTSC) and 4.43 MHz (PAL and SECAM).
4
Differential input capacitance consists of 1.5 pF package capacitance plus 3.5 pF from the input differential pair.

Rev. I | Page 4 of 20
Data Sheet AD829

ABSOLUTE MAXIMUM RATINGS

Table 2. METALLIZATION PHOTO
OFFSET NULL OFFSET NULL
Parameter Rating 1 8 +VS
Supply Voltage 18 V 7

Internal Power Dissipation1

8-Lead PDIP (N) 1.3 W
8-Lead SOIC (R) 0.9 W IN
2
OUTPUT
8-Lead CERDIP (Q) 1.3 W 6
20-Terminal LCC (E) 0.8 W
0.054
Differential Input Voltage2 6 V (1.37)
CCOMP
Output Short-Circuit Duration Indefinite 5
Storage Temperature Range
+IN
8-Lead CERDIP (Q) and 20-Terminal LCC (E) 65C to +150C 3 VS
4
8-Lead PDIP (N) and 8-Lead SOIC (R) 65C to +125C
Operating Temperature Range
AD829J 0C to 70C 0.067 (1.70)

00880-003
AD829A 40C to +125C SUBSTRATE CONNECTED TO +VS

AD829S 55C to +125C Figure 3. Metallization Photo; Contact Factory for Latest Dimensions,
Lead Temperature (Soldering, 60 sec) 300C Dimensions Shown in Inches and (Millimeters)
2.5
1
Maximum internal power dissipation is specified so that TJ does not exceed
150C at an ambient temperature of 25C.
MAXIMUM POWER DISSIPATION (W)
2
If the differential voltage exceeds 6 V, external series protection resistors 2.0 PDIP
should be added to limit the input current. LCC

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress 1.5

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational 1.0 CERDIP
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect SOIC
0.5
device reliability.

00880-004
THERMAL CHARACTERISTICS 0
55 45 35 25 15 5 5 15 25 35 45 55 65 75 85 95 105 115 125
Table 3. AMBIENT TEMPERATURE (C)

Package Type JA Unit Figure 4. Maximum Power Dissipation vs. Temperature

8-Lead PDIP (N) 100 (derates at 8.7 mW/C) C/W
8-Lead CERDIP (Q) 110 (derates at 8.7 mW/C) C/W
20-Lead LCC (E) 77 C/W ESD CAUTION
8-Lead SOIC (R) 125 (derates at 6 mW/C) C/W

Rev. I | Page 5 of 20
AD829 Data Sheet

TYPICAL PERFORMANCE CHARACTERISTICS

20 6.0
INPUT COMMON-MODE RANGE (V)

QUIESCENT CURRENT (mA)

15 5.5

+VOUT

10 5.0

VOUT

5 4.5

00880-005

00880-008
0 4.0
0 5 10 15 20 0 5 10 15 20
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)

Figure 5. Input Common-Mode Range vs. Supply Voltage Figure 8. Quiescent Current vs. Supply Voltage

20 5
MAGNITUDE OF THE OUTPUT VOLTAGE (V)

INPUT BIAS CURRENT (A)

15
+VOUT
4

10
VS = 5V, 15V
VOUT

3
5

RL = 1k
00880-006

00880-009
0 2
0 5 10 15 20 60 40 20 0 20 40 60 80 100 120 140
SUPPLY VOLTAGE (V) TEMPERATURE (C)

Figure 6. Output Voltage Swing vs. Supply Voltage Figure 9. Input Bias Current vs. Temperature

30 100
CLOSED-LOOP OUTPUT IMPEDANCE ()

25 15V
OUTPUT VOLTAGE SWING (V p-p)

SUPPLIES 10
AV = 20
20 CCOMP = 0pF
1

15

0.1
10 AV = 1
CCOMP = 68pF

5 5V 0.01
SUPPLIES
00880-007

00880-010

0 0.001
10 100 1k 10k 1k 10k 100k 1M 10M 100M
LOAD RESISTANCE () FREQUENCY (Hz)

Figure 7. Output Voltage Swing vs. Resistive Load Figure 10. Closed-Loop Output Impedance vs. Frequency

Rev. I | Page 6 of 20
Data Sheet AD829
7 120 100
PHASE

100 80
GAIN
QUIESCENT CURRENT (mA)

6 15V

OPEN-LOOP GAIN (dB)

SUPPLIES
80 60

PHASE (Degrees)
1k LOAD
VS = 15V

5 60 GAIN 40
5V
VS = 5V SUPPLIES
500 LOAD
40 20
4

20 0

00880-011

00880-014
CCOMP = 0pF
3 0 20
60 40 20 0 20 40 60 80 100 120 140 100 1k 10k 100k 1M 10M 100M
TEMPERATURE (C) FREQUENCY (Hz)

Figure 11. Quiescent Current vs. Temperature Figure 14. Open-Loop Gain and Phase vs. Frequency

40 105
NEGATIVE
CURRENT LIMIT
SHORT-CIRCUIT CURRENT LIMIT (mA)

100
35
VS = 15V
POSITIVE

OPEN-LOOP GAIN (dB)

CURRENT LIMIT 95
30
VS = 5V
90

25
85

20
80

00880-015
00880-012

VS = 5V

15 75
60 40 20 0 20 40 60 80 100 120 140 10 100 1k 10k
AMBIENT TEMPERATURE (C) LOAD RESISTANCE ()

Figure 12. Short-Circuit Current Limit vs. Ambient Temperature Figure 15. Open-Loop Gain vs. Resistive Load

65 120
VS = 15V
AV = +20 +SUPPLY
CCOMP = 0pF
100
60
3dB BANDWIDTH (MHz)

SUPPLY
80
PSRR (dB)

55

60

50
40
00880-016
00880-013

CCOMP = 0pF

45 20
60 40 20 0 20 40 60 80 100 120 140 1k 10k 100k 1M 10M 100M
TEMPERATURE (C) FREQUENCY (Hz)

Figure 13. 3 dB Bandwidth vs. Temperature Figure 16. Power Supply Rejection Ratio (PSRR) vs. Frequency

Rev. I | Page 7 of 20
AD829 Data Sheet
120 70
VIN = 3V RMS
75 AV = 1
CCOMP = 30pF
100 CL = 100pF
80

85
80 RL = 500
CMRR (dB)

THD (dB)
90

60 95

100
40 RL = 2k
105

00880-020
00880-017
CCOMP = 0pF

20 110
1k 10k 100k 1M 10M 100M 100 300 1k 3k 10k 30k 100k
FREQUENCY (Hz) FREQUENCY (Hz)

Figure 17. Common-Mode Rejection Ratio (CMRR) vs. Frequency Figure 20. Total Harmonic Distortion (THD) vs. Frequency

30 20
VS = 15V VIN = 2.25V RMS
RL = 1k AV = 1 THIRD HARMONIC
25 AV = +20 RL = 250
CCOMP = 0pF 30 CL = 0pF
OUTPUT VOLTAGE (V p-p)

CCOMP = 30pF
20
40
THD (dB)

15
VS = 5V
RL = 500 50
AV = +20
10 SECOND HARMONIC
CCOMP = 0pF

60
5
00880-018

00880-021
0 70
1 10 100 0 500k 1.0M 1.5M 2.0M
INPUT FREQUENCY (MHz) FREQUENCY (Hz)

Figure 18. Large Signal Frequency Response Figure 21. Second and Third THD vs. Frequency

10 5

8
INPUT VOLTAGE NOISE (nV/ Hz)

6 4
OUTPUT SWING FROM 0 TO V

2 3
1% 0.1% ERROR
0 AV = 19
1% 0.1% CCOMP = 0pF
2 2

6 1
00880-022
00880-019

10 0
0 20 40 60 80 100 120 140 160 10 100 1k 10k 100k 1M 10M
SETTLING TIME (ns) FREQUENCY (Hz)

Figure 19. Output Swing and Error vs. Settling Time Figure 22. Input Voltage Noise Spectral Density

Rev. I | Page 8 of 20
Data Sheet AD829
400
AV = +20 20mV 20ns
SLEW RATE 10% TO 90%
350 100%

90

RISE
SLEW RATE (V/s)

300

VS = 15V FALL
250

RISE
200

FALL 10

0%
150

00880-023

00880-028
VS = 5V

100
60 40 20 0 20 40 60 80 100 120 140
TEMPERATURE (C)

Figure 23. Slew Rate vs. Temperature Figure 26. Gain-of-2 Follower Small Signal Pulse Response (See Figure 32)

0.03
2V 50ns

0.02
DIFFERENTIAL PHASE (Degrees)

100%

90
DIFFERENTIAL GAIN (%)

DIFFERENTIAL GAIN 0.01

0.043
0.05
DIFFERENTIAL PHASE
10

0%
0.04
00880-024

00880-030
0.03
5 10 15
SUPPLY VOLTAGE (V)

Figure 24. Differential Phase and Gain vs. Supply Voltage Figure 27. Gain-of-20 Follower Large Signal Pulse Response (See Figure 33)

200mV 50ns 50mV 20ns

100%
90 90

10 10

0% 0%
00880-027

00880-031

Figure 25. Gain-to-2 Follower Large Signal Pulse Response (See Figure 32) Figure 28. Gain-of-20 Follower Small Signal Pulse Response (See Figure 33)

Rev. I | Page 9 of 20
AD829 Data Sheet

200mV 50ns 20mV 20ns

100% 100%

90 90

10 10

0% 0%

00880-033

00880-034
Figure 29. Unity-Gain Inverter Large Signal Pulse Response (See Figure 34) Figure 30. Unity-Gain Inverter Small Signal Pulse Response (See Figure 34)

Rev. I | Page 10 of 20
Data Sheet AD829

TEST CIRCUITS

CCOMP
(EXTERNAL) +VS

5 0.1F
2 7

AD829 6
4
3 + 8
1 0.1F

20k

00880-025
OFFSET VS
NULL
ADJUST

Figure 31. Offset Null and External Shunt Compensation Connections

+15V
CCOMP
0.1F 15pF

50
CABLE 7
HP8130A 50
3 + 5 CABLE TEKTRONIX
5ns RISE TIME 50
TYPE 7A24
50 AD829 6
PREAMP
2 50
4
5pF 300k
0.1F
15V

300k

00880-026
Figure 32. Follower Connection, Gain = 2

+15V

50 0.1F
CABLE 45 100
HP8130A 2 7 FET
5ns RISE TIME PROBE
5 AD829 6 TEKTRONIX
TYPE 7A24
3 + PREAMP
4
1pF 2k
0.1F
15V

105k
00880-029

CCOMP = 0pF

Figure 33. Follower Connection, Gain = 20

5pF

300
+15V
50
CABLE 0.1F
300
HP8130A 7 50
2 CABLE TEKTRONIX
5ns RISE TIME 50
TYPE 7A24
50 AD829 6
PREAMP
5
3 + CCOMP 50
4 15pF

0.1F
00880-032

15V

Figure 34. Unity-Gain Inverter Connection

Rev. I | Page 11 of 20
AD829 Data Sheet

THEORY OF OPERATION
The AD829 is fabricated on the Analog Devices, Inc., proprietary An RC network in the output stage (see Figure 35) completely
complementary bipolar (CB) process, which provides PNP and removes the effect of capacitive loading when the amplifier
NPN transistors with similar fTs of 600 MHz. As shown in compensates for closed-loop gains of 10 or higher. At low
Figure 35, the AD829 input stage consists of an NPN differential frequencies, and with low capacitive loads, the gain from the
pair in which each transistor operates at a 600 A collector current. compensation node to the output is very close to unity. In this case,
This gives the input devices a high transconductance, which in C is bootstrapped and does not contribute to the compensation
turn gives the AD829 a low noise figure of 2 nV/Hz at 1 kHz. capacitance of the device. As the capacitive load increases, a pole
+VS forms with the output impedance of the output stage, which
reduces the gain, and subsequently, C is incompletely
bootstrapped. Therefore, some fraction of C contributes to the
15
compensation capacitance, and the unity-gain bandwidth falls.
As the load capacitance is further increased, the bandwidth
OUTPUT
C
12.5pF
R
500
continues to fall, and the amplifier remains stable.
EXTERNALLY COMPENSATING THE AD829
15
+IN IN

The AD829 is stable with no external compensation for noise

1.2mA
gains greater than 20. For lower gains, two different methods of
VS
frequency compensating the amplifier can be used to achieve
closed-loop stability: shunt and current feedback compensation.
OFFSET NULL CCOMP
00880-035

SHUNT COMPENSATION
Figure 35. Simplified Schematic Figure 36 and Figure 37 show that shunt compensation has an
external compensation capacitor, CCOMP, connected between the
The input stage drives a folded cascode that consists of a fast pair of
compensation pin and ground. This external capacitor is tied in
PNP transistors. These PNPs drive a current mirror that provides a
parallel with approximately 3 pF of internal capacitance at the
differential-input-to-single-ended-output conversion. The high
compensation node. In addition, a small capacitance, CLEAD, in
speed PNPs are also used in the current-amplifying output stage,
parallel with resistor R2, compensates for the capacitance at the
which provides a high current gain of 40,000. Even under heavy
inverting input of the amplifier.
loading conditions, the high fTs of the NPN and PNPs, produced
using the CB process, permit cascading two stages of emitter
CLEAD

followers while maintaining 60 phase margin at closed-loop

R2
bandwidths greater than 50 MHz. 50 +VS
COAX
0.1F
Two stages of complementary emitter followers also effectively
CABLE R1
VIN 2 7

buffer the high impedance compensation node (at the CCOMP pin) 50 AD829 6 VOUT

from the output so that the AD829 can maintain a high dc open-
5
3 + 1k
4 CCOMP

loop gain, even into low load impedances (92 dB into a 150
0.1F
load and 100 dB into a 1 k load). Laser trimming and PTAT
00880-036

VS
biasing ensure low offset voltage and low offset voltage drift,
enabling the user to eliminate ac coupling in many applications. Figure 36. Inverting Amplifier Connection Using External Shunt
Compensation
For added flexibility, the AD829 provides access to the internal +VS
frequency compensation node. This allows users to customize the 50
CABLE 0.1F

frequency response characteristics for a particular application. VIN 3 + 7

AD829 6 VOUT
50
Unity-gain stability requires a compensation capacitance of 68 pF 2
5
R2 1k
4 CCOMP
(Pin 5 to ground), which yields a small signal bandwidth of CLEAD
66 MHz and slew rate of 16 V/s. The slew rate and gain 0.1F
VS
bandwidth product varies inversely with compensation
R1
00880-037

capacitance. Table 4 and Figure 37 show the optimum

compensation capacitance and the resulting slew rate for Figure 37. Noninverting Amplifier Connection Using External Shunt
a desired noise gain. Compensation
For gains between 1 and 20, choose CCOMP to keep the small signal Table 4 gives the recommended CCOMP and CLEAD values, as well
bandwidth relatively constant. The minimum gain that will still as the corresponding slew rates and bandwidth. The capacitor
provide stability depends on the value of the external values were selected to provide a small signal frequency response
compensation capacitance. with <1 dB of peaking and <10% overshoot. For Table 4, 15 V
Rev. I | Page 12 of 20
Data Sheet AD829
supply voltages should be used. Figure 38 is a graphical extension CCOMP is the compensation capacitance.
of Table 4, which shows the slew rate/gain trade-off for lower re is the inverse of the transconductance of the input transistors.
closed-loop gains, when using the shunt compensation scheme. kT/q approximately equals 26 mV at 27C.
100 1k Because both fT and slew rate are functions of the same variables,
the dynamic behavior of an amplifier is limited. Because
2I
CCOMP SLEW RATE Slew Rate =
CCOMP

SLEW RATE (V/s)

CCOMP (pF)

then
10 100
Slew Rate kT
=4
fT q
This shows that the slew rate is only 0.314 V/s for every mega-
VS = 15V hertz of bandwidth. The only way to increase the slew rate is to

00880-038
increase the fT, and that is difficult because of process limitations.
1 10
1 10 100 Unfortunately, an amplifier with a bandwidth of 10 MHz can
NOISE GAIN
only slew at 3.1 V/s, which is barely enough to provide a full
Figure 38. Value of CCOMP and Slew Rate vs. Noise Gain power bandwidth of 50 kHz.
CURRENT FEEDBACK COMPENSATION The AD829 is especially suited to a form of current feedback
Bipolar, nondegenerated, single-pole, and internally compensation that allows for the enhancement of both the full
compensated amplifiers have their bandwidths defined as power bandwidth and the slew rate of the amplifier. The voltage
gain from the inverting input pin to the compensation pin is
1 I
fT = = large; therefore, if a capacitance is inserted between these pins,
2 re C COMP 2 kT C the bandwidth of the amplifier becomes a function of its feed-
COMP
q back resistor and the capacitance. The slew rate of the amplifier
where: is now a function of its internal bias (2I) and the compensation
fT is the unity-gain bandwidth of the amplifier. capacitance.
I is the collector current of the input transistor.

Table 4. Component Selection for Shunt Compensation

Follower Gain Inverter Gain R1 () R2 () CLEAD (pF) CCOMP (pF) Slew Rate (V/s) 3 dB Small Signal Bandwidth (MHz)
1 Open 100 0 68 16 66
2 1 1k 1k 5 25 38 71
5 4 511 2.0 k 1 7 90 76
10 9 226 2.05 k 0 3 130 65
20 19 105 2k 0 0 230 55
25 24 105 2.49 0 0 230 39
100 99 20 2k 0 0 230 7.5

Rev. I | Page 13 of 20
AD829 Data Sheet
Because the closed-loop bandwidth is a function of RF and Figure 42 is an oscilloscope photo of the pulse response of a unity-
CCOMP (see Figure 39), it is independent of the amplifier closed- gain inverter that has been configured to provide a small signal
loop gain, as shown in Figure 41. To preserve stability, the time bandwidth of 53 MHz and a subsequent slew rate of 180 V/s;
constant of RF and CCOMP needs to provide a bandwidth of RF = 3 k and CCOMP = 1 pF. Figure 43 shows the excellent pulse
<65 MHz. For example, with CCOMP = 15 pF and RF = 1 k, the response as a unity-gain inverter, this using component values
small signal bandwidth of the AD829 is 10 MHz. Figure 40 of RF = 1 k and CCOMP = 4 pF.
shows that the slew rate is in excess of 60 V/s. As shown in
Figure 41, the closed-loop bandwidth is constant for gains of 5V 200ns

1 to 4; this is a property of the current feedback amplifiers. 100%

90
RF CCOMP

0.1F
+VS
50
COAX
CABLE R1 7
VIN 2 5

C1* AD829 6 VOUT

10
50 IN4148 RL
3 + 4 1k 0%

00880-042
0.1F
VS

*RECOMMENDED VALUE CCOMP SHOULD NEVER EXCEED

OF CCOMP FOR C1 15pF FOR THIS CONNECTION Figure 42. Large Signal Pulse Response of the Inverting Amplifier Using
00880-039

<7pF 0pF Current Feedback Compensation, CCOMP = 1 pF, RF = 3 k, R1 = 3 k

7pF 15pF

Figure 39. Inverting Amplifier Connection Using Current Feedback

Compensation 10ns

100%

5V 200ns 90

100%

90

10

0%

00880-043
10 20mV
0%

Figure 43. Small Signal Pulse Response of Inverting Amplified Using Current
00880-040

Feedback Compensation, CCOMP = 4 pF, RF = 1 k, R1 = 1 k

Figure 40. Large Signal Pulse Response of Inverting Amplifier Using Current
Feedback Compensation, CCOMP = 15 pF, C1 = 15 pF RF = 1 k, R1 = 1 k

15
GAIN = 4
12
3dB @ 8.2MHz
9
CLOSED-LOOP GAIN (dB)

GAIN = 2
6
3dB @ 9.6MHz
3
GAIN = 1
0
3dB @ 10.2MHz
3

6 VIN = 30dBm
VS = 15V
9 RL = 1k
RF = 1k
00880-041

12 CCOMP = 15pF
C1 = 15pF
15
100k 1M 10M 100M
FREQUENCY (Hz)

Figure 41. Closed-Loop Gain vs. Frequency for the Circuit of Figure 38

Rev. I | Page 14 of 20
Data Sheet AD829
Figure 44 and Figure 45 show the closed-loop frequency +15V
0.1F
response of the AD829 for different closed-loop gains and 50
COAX
different supply voltages. CABLE 7 50
VIN COAX
3 + CABLE
15 50
GAIN = 4 50 AD829 6 VOUT
12
CCOMP = 2pF 2 5 50k
9 4
3pF
CLOSED-LOOP GAIN (dB)

GAIN = 2 CCOMP 2k
6 15V
CCOMP = 3pF
0.1F
3
GAIN = 1
0

00880-046
CCOMP = 4pF 2k
3
Figure 46. Noninverting Amplifier Connection Using Current Feedback
6
Compensation
9 VS = 15V
RL = 1k

00880-044
12 RF = 1k +15V
VIN = 30dBm
0.1F
15
1 10 100
FREQUENCY (MHz) 7 50
VIN COAX
3 +
Figure 44. Closed-Loop Frequency Response for the Inverting Amplifier Using 75 CABLE
Current Feedback Compensation 75 AD829 6 VOUT
2 4 75
5
17 0.1F
30pF 300
15V OPTIONAL
20 CCOMP 2pF TO 7pF
FLATNESS
23 TRIM

00880-047
5V 300
26
OUTPUT LEVEL (dB)

15V
29 Figure 47. Video Line Driver with a Flatness over Frequency Adjustment
32

35
LOW ERROR VIDEO LINE DRIVER
38 The buffer circuit shown in Figure 47 drives a back-terminated
41
VIN = 20dBm
RL = 1k
75 video line to standard video levels (1 V p-p), with 0.1 dB
RF = 1k gain flatness to 30 MHz and with only 0.04 and 0.02% differential
00880-045

44 GAIN = 1
CCOMP = 4pF phase and gain at the 4.43 MHz PAL color subcarrier frequency.
47
1 10 100 This level of performance, which meets the requirements for
FREQUENCY (MHz) high definition video displays and test equipment, is achieved
Figure 45. Closed-Loop Frequency Response vs. Supply for the Inverting using only 5 mA quiescent current.
Amplifier Using Current Feedback Compensation

When a noninverting amplifier configuration using a current

feedback compensation is needed, the circuit shown in Figure 46 is
recommended. This circuit provides a slew rate twice that of the
shunt compensated noninverting amplifier of Figure 47 at the
expense of gain flatness. Nonetheless, this circuit delivers 95 MHz
bandwidth with 1 dB flatness into a back-terminated cable,
with a differential gain error of only 0.01% and a differential
phase error of only 0.015 at 4.43 MHz.

Rev. I | Page 15 of 20
AD829 Data Sheet
HIGH GAIN VIDEO BANDWIDTH, 3-OP-AMP The input amplifiers operate at a gain of 20, while the output
INSTRUMENTATION AMPLIFIER op amp runs at a gain of 5. In this circuit, the main bandwidth
limitation is the gain/bandwidth product of the output amplifier.
Figure 48 shows a 3-op-amp instrumentation amplifier circuit
Extra care should be taken while breadboarding this circuit
that provides a gain of 100 at video bandwidths. At a circuit gain of
because even a couple of extra picofarads of stray capacitance at the
100, the small signal bandwidth equals 18 MHz into a FET probe.
compensation pins of A1 and A2 will degrade circuit bandwidth.
Small signal bandwidth equals 6.6 MHz with a 50 load. The
0.1% settling time is 300 ns.

3pF
5 (G = 20) 2pF TO 8pF
+VIN 3
SETTLING TIME
A1 AC CMR ADJUST
6
AD829
2
1k

2k

1pF 200
2
RG A3
6
210 1pF AD848
200
3 2k
5 (G = 5) INPUT
2k FREQUENCY CMRR
3pF 100Hz 64.6dB
970 1MHz 44.7dB
10MHz 23.9dB
2 DC CMR
A2 ADJUST
AD829 6 50 +15V +VS PIN 7
+VIN 3 10F 0.1F 1F 0.1F
5 (G = 20)
COMM EACH
3pF AMPLIFIER

00880-048
4000 10F 0.1F 1F 0.1F
CIRCUIT GAIN = +1 5
RG 15V VS PIN 4

Figure 48. High Gain Video Bandwidth, 3-Op-Amp In-Amp Circuit

Rev. I | Page 16 of 20
Data Sheet AD829

OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)

8 5
4.00 (0.1574) 6.20 (0.2441)
3.80 (0.1497) 1 5.80 (0.2284)
4

1.27 (0.0500) 0.50 (0.0196)

BSC 45
1.75 (0.0688) 0.25 (0.0099)
0.25 (0.0098) 1.35 (0.0532)
8
0.10 (0.0040) 0
COPLANARITY 0.51 (0.0201)
0.10 1.27 (0.0500)
0.31 (0.0122) 0.25 (0.0098)
SEATING 0.40 (0.0157)
PLANE 0.17 (0.0067)

COMPLIANT TO JEDEC STANDARDS MS-012-AA

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

012407-A
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 49. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body (R-8)
Dimensions shown in millimeters and (inches)

0.400 (10.16)
0.365 (9.27)
0.355 (9.02)

8 5 0.280 (7.11)
0.250 (6.35)
1 0.240 (6.10)
4
0.325 (8.26)
0.310 (7.87)
0.100 (2.54) 0.300 (7.62)
BSC 0.060 (1.52) 0.195 (4.95)
0.210 (5.33) MAX 0.130 (3.30)
MAX 0.115 (2.92)
0.015
0.150 (3.81) (0.38) 0.015 (0.38)
0.130 (3.30) MIN GAUGE
0.115 (2.92) PLANE 0.014 (0.36)
SEATING
PLANE 0.010 (0.25)
0.022 (0.56) 0.008 (0.20)
0.005 (0.13) 0.430 (10.92)
0.018 (0.46) MIN MAX
0.014 (0.36)

0.070 (1.78)
0.060 (1.52)
0.045 (1.14)

COMPLIANT TO JEDEC STANDARDS MS-001

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
070606-A

(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.

Figure 50. 8-Lead Plastic Dual In-Line Package [PDIP]

Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)

Rev. I | Page 17 of 20
AD829 Data Sheet
0.005 (0.13) 0.055 (1.40)
MIN MAX

8 5
0.310 (7.87)
0.220 (5.59)
1 4

0.100 (2.54) BSC

0.405 (10.29) MAX 0.320 (8.13)

0.290 (7.37)
0.200 (5.08) 0.060 (1.52)
MAX 0.015 (0.38)

0.200 (5.08) 0.150 (3.81)

MIN
0.125 (3.18)
0.015 (0.38)
0.023 (0.58) SEATING 15
PLANE 0.008 (0.20)
0.014 (0.36) 0.070 (1.78) 0
0.030 (0.76)

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 51. 8-Lead Ceramic Dual In-Line [CERDIP]

(Q-8)
Dimensions shown in inches and (millimeters)

0.200 (5.08)
0.075 (1.91) REF
0.100 (2.54) REF
0.100 (2.54) REF
0.064 (1.63) 0.095 (2.41) 0.015 (0.38)
0.075 (1.90) MIN
19 3
18 20 4
0.028 (0.71)
0.358 (9.09) 0.358 1
(9.09) 0.011 (0.28) 0.022 (0.56)
0.342 (8.69) BOTTOM
MAX 0.007 (0.18) VIEW
SQ SQ R TYP 0.050 (1.27)
14 8 BSC
0.075 (1.91) 13 9
REF
45 TYP
0.088 (2.24) 0.055 (1.40) 0.150 (3.81)
0.054 (1.37) 0.045 (1.14) BSC
022106-A

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 52. 20-Terminal Ceramic Leadless Chip Carrier [LCC]

(E-20-1)
Dimensions shown in inches and (millimeters)

Rev. I | Page 18 of 20
Data Sheet AD829
ORDERING GUIDE
Model 1 Temperature Range Package Description Package Option
AD829AR 40C to +125C 8-Lead SOIC_N R-8
AD829AR-REEL 40C to +125C 8-Lead SOIC_N R-8
AD829AR-REEL7 40C to +125C 8-Lead SOIC_N R-8
AD829ARZ 40C to +125C 8-Lead SOIC_N R-8
AD829ARZ-REEL 40C to +125C 8-Lead SOIC_N R-8
AD829ARZ-REEL7 40C to +125C 8-Lead SOIC_N R-8
AD829JN 0C to 70C 8-Lead PDIP N-8
AD829JNZ 0C to 70C 8-Lead PDIP N-8
AD829JR 0C to 70C 8-Lead SOIC_N R-8
AD829JR-REEL 0C to 70C 8-Lead SOIC_N R-8
AD829JR-REEL7 0C to 70C 8-Lead SOIC_N R-8
AD829JRZ 0C to 70C 8-Lead SOIC_N R-8
AD829JRZ-REEL 0C to 70C 8-Lead SOIC_N R-8
AD829JRZ-REEL7 0C to 70C 8-Lead SOIC_N R-8
AD829AQ 40C to +125C 8-Lead CERDIP Q-8
AD829SQ 55C to +125C 8-Lead CERDIP Q-8
AD829SQ/883B 55C to +125C 8-Lead CERDIP Q-8
5962-9312901MPA 55C to +125C 8-Lead CERDIP Q-8
AD829SE/883B 55C to +125C 20-Lead LCC E-20-1
5962-9312901M2A 55C to +125C 20-Lead LCC E-20-1
AD829JCHIPS Die
AD829SCHIPS Die
AD829AR-EBZ Evaluation Board
1
Z = RoHS Compliant Part.

Rev. I | Page 19 of 20
AD829 Data Sheet

NOTES

2011 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.
D00880-0-10/11(I)

Rev. I | Page 20 of 20