lmplemeiitatiori of a Genetic Algorithm based
Associative Classifier System (ACS)
Kirk E. Twardowski
Syracuse University
Syracuse, N Y 13244
ketwardo @suvm .acs .syr .cd u
1.0 Abstract
This paper presents the $rst results from the develop-
ment of a Genetic Algorithm Pased Associative
CYassijier System (ACS). Cla.rsi/icr Systems contain
a signi/icant amount of parallelism, particularly in the
area of pattern matching, which is amenable to a
massively parallel hardware implemmtation. One .TUC-
cessfui implementation of a parallel cla.c.ri/ier .system
on the Connection Machine has been reported in [SI,
however advances in VLSI have brought about the re-
ality of massively parallel co-processorsfor pc?r.ronal
computers. The architecture oJ’ tht>se I’C based co-
processors uses Content Addressable Memory for main
memory as opposed to Random Access Memory.
These co-processors, referred to as Associative
Processors, open the door for the use of classifier sys-
tems in real-time applica1ion.r which have space, power
and cost limitations which preclude the t ~ r eof largc,
parallel processors, .such as the Conneclion Machine,
yet require response times which serial processors can’t
achieve. The ACS is a result of mapping [he ir!herenl
parallelism in classijier systems to a program which
executes on a PC based Associative l’rocessor. The
algorithms used to implement the A C S on an Associa-
tive Processor are discussed, and A CS execution times,
measured on hardware are prescntcd.
Keywords: Associative Processing, Genetic A igorithms,
Classifier Systems, and Contant A d d r ~ ~ ~ aMemory.
ble
2.0 Introduction
The processing requirements of classifier systems have
severely limited their application to complex real-time
environments. Real-time environrncnts imply the
existence of deadlines which must be met in order for
the system to function properly. I lowevcr, complex
environments require classificr systems to contain a
48
CH2915-7/90/0000/0048$01.OO Q 1990 IEEE
Authorized licensed use limited to: Chameli Devi Inst of Tech and Management. Downloaded on July 31,2010 at 06:24:18 UTC from IEEE Xplore. Restrictions apply.
I B M/Federal Sector Division
Processor Devclopmcnt
RT 17C, Owego, NY 13827
large collection of niles. T1it:se rules need to br
searched for every input from the environment bcforr
a response can be generated. As the complexity ol
an cnvironment increases so does the number of rule<
the classifier system requires, and likewise the re-
sponse time of the classifier system also increases
As the response time of the system increases, thr
deadlines become more and more difficult to meet
Thus the cnix of the problem faced in designing a
classifier system for a complex real-time environment
is the contradictory goals of environment complexit!
versus real-time deadlines. Fortunately, classifier s y s -
tcms contaiii inherenl parallelism which, if exploited.
could significantly decrease r c y ” time.
’I’hc most timc consuming stcp rcquircd by thr
classifier system is to compare a set of input messages.
reprcsenting thc input stimuli, against the current SCI
qf rules in the system. This would seem to indicatc
that a possible way to increase systcm pcrformancc
would bc to incorporate a hardware based accelcratoi
which could bc used to perform this compare opera-
tion. One such hardware solution is Content Ad
drcssable Mcmory (CAM). 13y using CAM to storc
the entire scl. of rules which make up the classifiei
systcm, the c,omparing of input stimuli against rule\
can be performed rapidly. The C A M also makcs thr
execution tirnc of the search operation independenl
or thc number of rules in the system, because the en-
tire C A M is searched in a single time stcp regardlesy
of thc numbcr rules which it contains. ‘T‘hcrcfore ;I
classifier system desigied to utilize CAM should br
ahlc to meet dii’ficult real-time i:lcadlines which a serial
processor base11 classifier system is unable to meet
Additionally, the CAM basctl system is easily ex-
pandable to more complex tcal-time problem c i o -
mains since its response timc is unrelated to thr
nuniber o f rules which make up the system.
Rcccnt research in the area 0 1 CAM, particularly in
the area of using CAM for A I applications such a<
logic programming, has culminated in the develop-
ment of a commercially ,available CAM based
 processor. This CAM based processor, referred to as
‘The Coherent Processor (CP), has an architecture
which replaces the traditional random-access main
memory with CAM. The CP is designed to plug into
personal computers or engineeringlscientific work-
stations and to function as a hardware accelerator.
By using this associative processor it is now possible
to verify that the response time of a classifier system
which uses CAM will be invariant with respect to the
number of rules in the system.
3.0 Classifier Systems and BOOLE
Classifier Systems, introduced by IIoIland[4], are
adaptive machine learning systems which have a
rule-based message-passing structure. Classifier Sys-
tems learn through thc application of genetic algo-
rithmsC3) to introduce rules into the system and via
credit apportionment to distribute rcward from the
environment. Classifier Systems are meant to operate
in environments which are changing, noisy and give
reward infrequently and usually only after long se-
quences of actions. The system often has goals which
are implicitly and/or inexactly dcfincd and has rcal-
time demands for actions [I].
A classifier system consists of the following major
components: 1) Messages and Classifiers, 2) An Rn-
vironment Interface, 3 ) Rule Discovery, and 4) Credit
Apportionment. Messages are simple bit strings that
are used to either represent information from or
commands to the environment intt:rfaa:. Classifiers
are simple IF-THEN rules with multiple conditions
and an action. Conditions are message pattcrns
which are matched against input messages, while
actions are message patterns for the generation of
output messages. Each classifier has an associated
strength which quantifies the frequency with which a
classifier directly or indirectly led to reward from the
environment. The environment interface consists of
detectors and effectors. Detectors ericode information
from the environment into messages and effectors
modify the environment based on messages. Rule
discovery is used to evolve new classifiers to add to
the system. The most commonly used heuristics for
rule discovery are Genetic Algorithms. Credit ap-
portionment is the means by which the classifier
strengths are updated. The approach which has been
developed is called the bucket brigade algorithm and
is used to distribute reward, as strength, to the chain
of classifiers which led to a corrrct decision. This is
49
Authorized licensed use limited to: Chameli Devi Inst of Tech and Management. Downloaded on July 31,2010 at 06:24:18 UTC from IEEE Xplore. Restrictions apply.
achieved by having aclive classifiers pay a portion of
their strength to classifiers active in the previous cycle
DOOI,B, a simplified version of the standard classifier
systems, was first proposed by Wilson [ 1 I] in his in-
itial studies of machine learning paradigms for auton-
omous robots or ANIMATS. nOO1,E essential11
eliminates the requirement to use the bucket brigadr
algorithm to apportion payofl from the environment,
yet retains all of the aspects of classifier systems which
are essential to machine learning. ROOLE is a systern
which is meant to learn disjunctive Roolean functions
which have bcen shown to be diffcult machinc
learning problems. The function which Wilson and
others have studied is the multiplexer function wherc
there are k address bits (ak)and 2k data bits (dk). Thr
system is to learn to use the address bits to select thc
correct data bit as a response lo an addressldata vec-
tor from the input interface. For a 6-multiplexet
there are 2 address bits and 4 data bits. One iteration
of the B001,E system entails the random generation
of a binary string of length 6, which is presented to
the systetn as an input message. ROOIX is then to
respond with the correct respoiisc; for a correct re-
sponses the system receives a rcward whereas an in-
correct response is penalized. Only the classifiers
which matched the input message and have an action
equal to the response are rewarded or penalizcd.
4.0 The Coherent Processor
The Coherent Processor (CP) [6] is the target
processor for which the Associative Classifier System
was written. The C P is a product of the Syracusc.
University Machine for Associative Computinp
(SUMAC) project ( see [2], 1:7] or [IO]). ‘The main
thrust of this project is to develop an associative ar-
chitccture which is suitable for the high speed exe-
cution of logic programs. As such, many aspects of
the CPs architecture are deiived from the require-
ments of executing logic programs. IIowever the ar-
chitecture which has resulted is quite general in naturc.
and provides the capability to implement many algo-
rithms. Its development has just rccently been com-
pleted and a prototype is in our lab under evaluation
for AI applications. The CP is a Microchannel board
which has been installed in an IDM PS/2 model 70
and operates as a memory mapped 1/0 device. Thr
board contains 4Kx36 words of Content Addressablr
Memory (CAM). The amount of CAM is expanda-
ble by adding additional CA \4 expansion boards to
the system. In addition to tb:: CAM there is a 64K
 byte writable control store (WCS) on the C P which
controls the operation of the CAM. The WCS is
typically loaded at the start of an application with the
microcode to perform the required read, write, search,
and logical CAM operations. ‘The microcode rou-
tines are called as co-processor functions from the
application program.
The heart of the CP is a specially designed V I S 1 chip
which contains the CAM array and support logic.
The support logic processes the match lines from the
CAM array and consists of 5 one bit registers, a
boolean logic unit and a Multiplc Response Resolver
(MRR) per CAM word. The M R R , fed by the
MRReg, guarantees activation of only one CAM row
select at a time by passing only the top most active
bit of the MRReg. A microcode operation,
SelectNext, causes the M R R to reset the topmost
active bit in the MRReg. This allows the MRReg to
be used as a pointer into the CAM array which can
be moved from the top most to thc bottom most ac-
tive word by performing Selcct Nexts.
5.0 Associative Classifier System (ACS)
There are a number of associative algorithms which
are implemented in the ACS with the goal of im-
proving system performance and achieving response
time independent of the number of rules in the sys-
tem. The following sections describe the CAM or-
ganization and algorithms which were developed to
implement the Classifier System and thc Gcnctic Al-
gorithm components of thc ACS.
5.1 Data Structures
Since the conditions of the classifiers include the
Don’t Care character, the CAM was configured in
Quad mode which allows a hardware representation
of the Don’t Care symbol. In Quad mode pairs of
CAM words are linked into quad words which allow
the representation of {O,l,X,N}. For the DOOLX
system the length of each condition is 1 1 bits or less
and the length of each action 1 bit. This made it
possible to let each quad word represent onc rule.
Every classifier in the system has a st rength associated
with it and this strength is also stored in the quad
word, along with the condition/action pair, as an un-
signed integer with a length of 12 bits. Thus the entirc
data structure which makes up the classifier system is
contained within the CAM.
50
Authorized licensed use limited to: Chameli Devi Inst of Tech and Management. Downloaded on July 31,2010 at 06:24:18 UTC from IEEE Xplore. Restrictions apply.
Figure 1 . Format o f an ACS Quad CAM
Word: Quad CAM word is constructed
from a n even/odd pair o f CAM words.
A single quad word in the ACS is structured as shown
in Figure 1 . This allows, with the use of the CP’s
masking capability, for fully associative searchcs to
be performed on either the condition or the strength
field of the classifiers. noth of these searches are re-
quired for the algorithms used in ACS.
5.2 Classifier System
During each iteration the claasifier system must per-
form three major functions: 1’) message matching, 2)
response selection and 3 ) rule strength adjustment.
The messagc matching function is simply a matter of
using the input message as a search argument. This
argument is matched against only the condition field
of the classifiers. This is done by generating a mash
to mask off the action and strength field and shiftinp
the input message so that it is aligned with the con-
dition field. Finally, a C P microcode routine is initi-
ated and executes a search of the CAM.
The response selection phase requires that the rulc5
which were matched in the previous step now be read
from the CAM. This is an undesired step because it
introduces serial processing into the algorithm, sincr
the classifiers can only be read out one at a time
Unfortunately, it is necessary because response se-
lection is bascd on probabilistic weighting of the rel-
ative strengths of the matched classifiers, which
requires that the sum of the strength of all thr
matching classifiers be calculated. Additionally, the
strength adjustment step modifies the strengths ol
each matching classifier thus requiring that all
matching classifiers be read from the CAM. The sc-
lection procedure described bclow could have been
used to speedup the selection step; however, it is no1
compatible with the standard classifier system which
introduces a number of other variables in the selcction
process. Since our goal is to develop a version of
ACS which supports all of the standard classifier sys-
tem algorithm, that approach was not used for thi\
part of ACS. Once the c1as:iliers are read from thr
 CAM, one classifier is selected to post its action as the
output message.
Based on the response from the cnvironment, which
in this case is just an evaluation of thc multiplexer
function to test the correctness of the posted output,
the strength of the rules are updated via the distrib-
ution of reward or penalty. Once the strengths have
been updated the rules are written back to the CAM
array, into the same locations from which they were
read. A copy of the match vector from the message
matching step is maintaincd in one of the response
registers for this purpose. The MRReg is loaded with
the match vector and the MRR is used to sclect the
individual CAM locations to write.
5.3 Genetic Algorithms
In the BOOLE system the genctic algorithms are ini-
tiated once for every iteration, and gencrate a single
rulc; this constant but slow evolving of rules is to hclp
kecp the system stable and reliable, yet adaptivc. For
ROO1 ,E, the selcction of parents and replacements is
the component of the genctic algorithms which rc-
quires the most computational effort. Selection of
parents and replacements is based on thc strengths of
the classifiers in the CAM.
A selection algorithm has bcen dcveloped which
avoids the necessity of reading thc entire contents of
the CAM into host-processor memory to perform a
weighted strength selection. 'The idea is to use a
windowing mechanism, based on classificr strengths,
to reduce the number of classificrs from which to sc-
lect. Once the number of classificrs has heen signif-
icantly decreascd, more serial approachcs can be uscd
to make the selection. First thc maximum and mini-
mum values of the strength ficlds in the CAM are
determined. These searches can each be pcrformcd
in O(n) CAM operations [SI, wherc 11 is the Icngth
of the strength field. Then a random point bctwccn
the minimum and maximum strengths is selected.
This serves as the center for a window, the width of
which is a percentage of the differcnce between the
maximum and minimum strengths. 'Ihe width of the
window, referred to as window size, is a system pa-
rameter and dircctly affects the opcrntion of the ACS.
A between limit search of the CAM is then performed
to locate all strength fields which arc inside thc win-
dow. This search can be pcrformcd in O(2 log(n-1))
CAM operations [SI, wherc n is the width of thc
search window. Several conditions can now have
occurred 1) there are no strength fields inside the
51
Authorized licensed use limited to: Chameli Devi Inst of Tech and Management. Downloaded on July 31,2010 at 06:24:18 UTC from IEEE Xplore. Restrictions apply.
window, 2) there is one strength field in window or.
3 ) multiplc strength fields Lie within the window. For
case 1, a new window is generated. Case 2 selects thc
classifier whose associated strength field is in thc
window. Case 3 requires that one of the classificrs i n
the window be selected; this i y done on a purcly ran-
dom basis by counting the number of matches and
picking a random numbcr, RN, between 1 and thc
number of matches. The classifier is selected by per-
forming R N SelcctNcxt operations on the MRReg
until the MRR is pointing to the selected CAM word
Note that this introduces 2 steps of serial processing
into the sclcction procedure: counting matches and
performing the SelectNext opcrations.
The window size parameter is very critical to the
performance of ACS. both in terms of machinc
learning ability and response time. If the window i.;
to large, then response time is excessive because thcrc
will be a large number of classifiers inside the window
which will have to be processed serially. Also, siner
the serial selection procedure used by ACS is com-
pletely random, the effectiveticss of the strcngths in
influencing parcnt selection would be reduced by too
large a window. This has the effect of limiting thr
systems ability to generate better classifiers, from
known good classifiery, and thus slows the rate at
which learning occurs. Going to the opposite ex-
trcmc, a very sinall window will cause the program to
gcncrate many windows bcfore finding a classificr
This will also increase response timc.
Becausc the optimal valuc cif the window size pa
rametcr is directly reliiled to thc numher of clascifierk
in the system a second sclection proccdurc has re-
cently bccn implcmentetl. Thic approach, the ncaresl
selection (NS) algorithm, is the same as window se-
lcction up to and including the gcneration of a win-
dow ccntcr o r chosen point. This approach fincls thr
smallest strcngl h valuc grcatcr then the chosen poinr
for parent sclcction and the grixtcst strength valuc l e y \
than the chosen point for rcplaccment selection. Thi\
is done by p f o r m i n g a series of searches starting at
the chosen point and moving to an extrema. Thc idea
is to use the search point and the extrema as the initial
bounds on a search area. After every search thr
bounds are adjusted inward until: 1) bounds arc
equal, 2) only one classifier lies betwcen them, or 3 )
no classificrs were bclwcen initial bouncls. Case I
occurs when multiple strengths with thc samc valur
havc been found, in which case the serial sclcction
technique of above is used. Case 2 selects thc
classifier which was locatcd. Case 3 causes a retry of
the selcct ion proced urc.
 lOa
6.0 Results
v)
e,
C
v)

80
ACS results: 1) verify that ACS Icarning ability is e,
v)

equivalent to results which havc been published on K

e
classifier systems solving the 6-multiplexer and 0 - 6-Multiplexer
11-multiplexer problems, and 2) measure response ?! 60
0
L ~ ~ 1 1 -Multiplexer
times for both a CAM and non-CAM version of 0
N
ACS.
40
0 5 10 15 20 25 30
Figure 2 shows the results achieved by ACS for both ~10’
the 6 and 11-multiplexer problems. ‘I‘hcsc results are Trial Number
in the form of a moving avcragc of correct decisions
over the past 50 trials, and duplicates data from pre-
viously published experiments, [ 121 and [SI This Figure 2. ACS Performance on the 6 and
demonstrates that the associativc algorithms which I I -Multiplexer I’rol,lem: Window si7e is
were implemented in the ACS haven’t done anything .001 for both runs. 400 classifiers for the
which negatively impacts the lcarning ability of the 6-multiplexer problcm and 1000
BOOLE system for the two multiplrxor problems classifiers for the 1 1 -mulliplexcr prohlcm.

To measure speedups Ilic set of C routines which
interface to the CI’ was rrwrittc-n to work with an ar-
ray of classifiers in host proceswr mcmory T‘he
modified C routines are not just n direct mapping of
the CAM functions onto a memory array, but wcrc
optimized to use efficient algorithms I:or examplc,
the routine which selects parents was restructured to
use a typical selection algorithm which rcquires that
the strength fields be examined sequentially until a
selection is made. A non-CAM iinplerncntation o f
the window selection tcchniquc described abovc
would have run slower thcn the scgucntial cxamina-
tion approach.
The response time for a single itcration for thc ACS
and the non-CAM ACS for various numbcr of
classifiers are shown in Figure 3 on page 6 Rcsponsc
time includes the input message matching and the
output message generation, as wcll as, the gcnrration
of one new rule via genetic algorithms At first glance
these times are somewhat disappointing bccausc a]-
though the CAM version executes faster, it only does
so by a factor of about 2 and the icsponsc time in-
creases noticeably as the numbcr of classifim in-
creases. There are sevcral factors which account for
the ACS response times bcing slowcr thcn antic-
ipated. The first reason is hardware bawd and results
from running under I’C DOS Due to the design of
the C P interface, the host C codc must switch from
real to protected mode, requiring approximately 30
microseconds of overhead, for each command scnt to
the CP. With 1000 classifiers and 3 window siic of
.001 on the 6 Multiplexor prohlcm thrrr are an avei-
agc of 349 commands sent to the CI’ per iteration, foi.
an overhead of 10.4 milliseconds. As thc number 01’
classifiers increases the numbcr of commands sent tci
thc CI’ increases, particularly the 6-multiplexer prob-
Icm, and hence the impact of the ovcrhcad becomes
more sevcre. The reason the 6-multiplexcr problcm
is likcly to suffcr greater ovcrhcad is explained below.
‘There are versions of the (:I‘ under development
which don’t require this switch. ‘The other rcason is
a result of the DOOI,E system. There isn’t enougli
pattern matching in DOOI,E to takc advantage of t h k ,
capability of t.he CAM. Ilowevcr, a full scalc
classifier systcm which has a message list will have ;I
greater amount of pattern matching. ‘This is bccausc.
each message in the message list needs to be matchal
against each classifier. Thus, the size of the messagc.
list becomes a major factor in the amount of spcedul3
which will be observed betwecn CAM and non-CAhl
classifier system implementations. Additionally.
classifier systems which requit,c morc than 32 bits pc1
condition or have more then one condition pct
classifier would benefit from the CAM row logic.
The row logic can intcgrate the results from multiplr
word matches (CAM items longer than 32 bits) and
from multiple condition matches in parallel across all
classifiers, whelms a non-CA h4 program would haw.
to process this data scrialiy.
’l’he reason that there is an incrcase in response timr
as thc numbcr of classifiers was increased is due to thr
scction of the program which is required to read all
matching cnirics from the CAM. The numbcr ol
matches which occur in the I?OOI,F, system is :I

52

Authorized licensed use limited to: Chameli Devi Inst of Tech and Management. Downloaded on July 31,2010 at 06:24:18 UTC from IEEE Xplore. Restrictions apply.
 I
-
- - Without CAM

a;
- With CAM, Nearest Selection

E
._ --. With CAM, Nearby Selection,,’
+ 0.10 - /
/
a,
v, /

c
0
E 005 ... .- 0

/-.----
,/--
/
E

000 - &--/ :==7

’ I
.
! I

0 500 io00 1500 2000 0 500 1000 1500 2000

Number of Classifiers Number of Classifiers

Figure 3. ACS versus n o n - C A M ACS rcsponse time Figure 4. Execution speed for I I-Mnltiplexer Proh-
for 6-Mnltiplexer Prottlcni lem

function of the problcm size. ‘I’hc avcragc number
of matches is given by:
Matches = P/(2**(2/3 * N))
where N is the number of address and data bits, P is
number of classifiers. ‘This equation assumes that the
DON’T CARE symbol makes up one third of all
symbols. This equation indicates that by trying to
solve a larger multiplexer problem the number of
matches per iteration should dccrcase, thus decreasing
rcsponse time as shown in Figurc 4. Once a largc
enough problem is sclectcd, cnsuring that only a few
classifiers are active per cyclc, the rcsponse time will
increase slowly with respect to thc numbcr of
classifiers.
In both Figure 3 and Figure 4, the effect of the win-
dow size parameter for thc classifier sclcction algo-
rithm is shown. Dccrcasing the size of the window
almost always caused the response titnc to increase,
except cases with small numbers of classifiers. When
the number of classifiers was less than 800 the lowest
value for window size which could be used without
causing the response time to deteriorate was .001.
These figures also show thc pcrformance of the NS
algorithm. On the 6 multiplexor problem the NS al-
gorithm ran a little slower then the window method
using a window size of .001 for grcater then 500
classifiers. This is a result of clistrihuting reward to a
large number of classifiers per cycle causing classifier
strengths to remain small. Thus many classifiers will
share the same strength value which results in the NS
algorithm applying serial selection techniques. This
coupled with the fact that NS rcquires a grcatcr
number of computations is the cause of NS’s slowcr
performance. NS algorithm performance on thc I I
Multiplexor shows that it can achieve the fastest re-
sponse times. This and the fact that thcrc aren’t any
(1) parameters to tune to make the NS algorithm run
optimally makes it the better of the two sclcction al-
gorithms.
Figurc 5 on page 7, shows tile pcrformance of ACS
for the 11 Multiplexor problem when the ovcrheatl
due to 110s mode switching is removcd.
7.0 Conclusions
The associativc algorithms of the ACS for thc Co-
hererit I’rocessor have becn presentcd. It has been
demonstrated that this associative implementation ol
the DOO1,I~ classifier Tystem Icarns as wcll as result..
published for icrial implcmcntations. It has bccn
shown that thr use of an associative processor as :I
co-processor cxn decrease clarisifier system rcsponsc
time, particularly for classificr systems with a largc
numbcr of rules. In fact, when the number of rule4
in the ACS were increased by an order of magnitudr
thc rcsponse time of the system increased only 25”h
aftcr DOS ovcrhead was rt:inovcd. Also, if thc
amount of data transferred Ixtween the associativc
processor and the host is minimized thc rcsponsc limc
can he almost invariant to t t l u number of classifier\
which make up the system. This is the case wheri
there are only a small pcrccntage of classificrs activr
per cyclc, siich as with thc 1 I-Multiplcxcr problem.
for which a speedup of greater then 14 was ohscrved
Ijasecl on thc results from the C A M ACS for thc
I I-multiplexer problem a full scale classifier system i\

53

Authorized licensed use limited to: Chameli Devi Inst of Tech and Management. Downloaded on July 31,2010 at 06:24:18 UTC from IEEE Xplore. Restrictions apply.
 currcntly bcing devcloped to verify if significant
0.05 speedups can be attained because of larger, sophisti-
catcd matching requirements.

ai
E 0.03 -
._ Acknowledgements
c
9) I would like to thank my peers who have helped with
2 0.02 ~

0 this work and whose comments have improvcd thi.

a
2 0.01 - paper. I would particularly like to give thanks t o
Davc Kirk whose comments were invaluable. Crcdil
0.00 must also bc given to Dr. .John Oldfield and Dr. I’ctc~
0 500 1000 1500 2000
Kogge whose cnthusiasm has inspired me. 1 woul(l
Number of Classifiers
likc to acknowledge IBM Owcgo’s contribution ol
resources with which the majority of this research wa\
Figure 5. Adjusted ACS response time for I I Mux performed.
problem

7. Petcr M. Kogge, .John V. Oldfield, Charles

D. Stormon, and Mark R. Di-ule, VIS1 and
References Rule-Based Systems, Syracuse Universit!
1. L. B. Booker, D. E. Goldbcrg, and .I. 11. CASE Center, ‘Tech. Report 8812, 1988.
Holland, “Classifier Systems and (ieneiic
Algorithms,” Artificial Intcllig~ricc.,vol. 40, 8. ‘r. Kolionen, (;bntent-Addre.s.cahl~Mcinorkr
pp. 235-282, 1989. Berlin: Springer-Verlag, 1980.

2. Mark R. Drule, ‘The 1Jsc o f Contcnt- 9. G. G. Robertson, “I’arallel Implementation

Addressable Memory in Executing h g i c
Programs, Syracuse University CAST;, Centcr,
Tech. Report 8813, 1988. Master’s ’I’hesis.
3. J . €1. IIolland, Adclptatiort in Natural and
ArtiJicial S y s t e m Ann Arbor: Iiniversity of
Michigan Press, 1975.
4. J. H. Holland, K. .I. I Iolyoak, R. E. Nishett,
and I). R. Thagard, lnditction .I’rocesses o/
inference, learning, and dircovpry Cambridgc,
MA: MIT Press, 1986.
5. A. Homaifar, I). 1:. Goldbcrg, and C. C.
Carroll, “Doolcan function learning with a
classifier system,” Applications of Artflcial
Intelligence V I , vol. 937, pp. 264-272, 1988.
of Gcnetic Algorithms in a Classifiri
System,” in L. Davis, editor, Gcnetic A l p
rithins arid Sirnulaipd Ann~aling, I ,ondon
I’itmxn Press, 1987.
IO. C h r l e s D. Stormon, An Associative
I’roccssor and Its Application to 1,ogic Pro-
gramming Computation, Syracuse Ilnivcrsit!
CASE Centcr, Tech. Report 881 I , 1988. re-
vised Master’s 7’hcsis.
1I. Stewart W. Wilson, “Knowledge <;ro\+lli i i i
an Artificial Animal,” Proc. of thc 1st lntl
Con(. or1 Geriatic A (gorithnis and Thiw A p
plications, pp. 16-23, 1986.

6. Coherent Research Inc, (loherent I’rocprror 12. Stewart W. \Vilson, “Classifier Systems ancl
Users Guide Ver 2.0 Coherent Research I n r , the Animat Problcm,” Machinp I,rar.ning.
1990. vol. 2, pp. 199-228, 1987.

54

Authorized licensed use limited to: Chameli Devi Inst of Tech and Management. Downloaded on July 31,2010 at 06:24:18 UTC from IEEE Xplore. Restrictions apply.