ISSCC 2016 / SESSION 13 / WIRELESS SYSTEMS / 13.
13.2 A Ku-Band 260mW FMCW Synthetic Aperture Radar
TRX with 1.48GHz BW in 65nm CMOS for Micro-UAVs
Yong Wang, Kai Tang, Ying Zhang, Liheng Lou, Bo Chen,
Supeng Liu, Lei Qiu, Yuanjin Zheng
Nanyang Technological University, Singapore, Singapore
Synthetic aperture radar (SAR) that complements optical imagers with capabilities
to acquire imagery during night and inclement weather is indispensable for remote
sensing, traffic mapping, etc. Recent unmanned aerial vehicles (UAVs) have been
miniaturized to <1m3, providing an inexpensive and flexible platform for SAR
imaging applications. Besides, there is increasing demand on the high resolution
SAR imaging function. For both, it is a requisite to develop a single-chip SAR TRX
with <300mW power consumption, <10mm2 size and <20cm resolution, making
it suitable for payload on micro-UAVs.
FMCW TRXs have been reported for vehicle radars [1,2], motion-detection
sensors, and beam-forming imagers. For payload on a micro-UAV, one issue to
tackle is to suppress RF amplitude ripples. The RF amplitude ripple is an aggregate
of the amplitude fluctuations in VCO outputs and the gain variations of PA and
LNA at different chirping frequencies, which increases dechirped IF sidelobes. A
3dB ripple may induce -7.7dB IF sidelobes when a rectangular window is applied
(ideal peak-sidelobe ratio (PSLR) is -13.5dB) [5]. The poor ripple performance
will impede SARs to distinguish targets that have weak reflections. A strong IF
interference due to ground reflection is another issue. SAR looks sideways when
flying. Facing directly towards the SAR, the underneath ground surface will have
larger radar cross sections than the objects in the target region (Fig. 13.2.1). After
dechirping, a much stronger IF interference is generated at lower frequency fg
compared to the dechirped target frequency at fb. Both the antenna-leakage-
induced IF (close to DC at fa) and the ground-reflection-induced IF at fg require a
high dynamic range ADC and/or high-order BPF in the RX baseband. Moreover,
the change in UAV flight altitude leads to a variation of fb. A tunable chirp rate can
help to maintain fb in a moderate range so as to reduce the required bandwidth
(BW) of the RX baseband and sampling rate of the ADC.
The paper presents an FMCW SAR TRX operating at 15GHz with 1.5GHz chirp
BW. The TX ripple is minimized to be 1.1dB by the proposed saturated driven-
amplifier-power-amplifier (DA-PA). An input-load peak-staggering (ILPS)
technique with parallel-R loading topology is proposed to enhance the LNA gain
flatness (0.51dB ripple). A 12th-order active-RC BPF follows the RX RFFE to
suppress the IF interferences at fg and fa by >50dB and >60dB respectively. The
tunable chirp rate is achieved by a digital-tunable mixed-signal-mode (MSM)
synthesizer that presents <186kHz RMS frequency errors (RMSFEs) at modulation
periods from 1.18 to 10ms. A programmable-gain amplifier (PGA) and a
successive-approximation ADC are integrated to form a complete RX.
For SAR, the range resolution is determined by the chirp BW and chirp linearity.
As a rule of thumb, the ideal chirp with 1GHz BW can attain at best a resolution
of 15cm (c/2B, c: light speed, B: chirp BW). To achieve wideband chirp with good
linearity at low power consumption, the MSM synthesizer is designed as shown
in Fig. 13.2.1. Compared to [1-4], the MSM synthesizer eliminates the requirement
of auxiliary PLL or DDFS and thus saves power and area. The phase of the VCO
output is quantized by the TDC, and then converted into digital words by a
differentiator (1z1), which is then compared with the sawtooth frequency
command word (FCW). The difference, FM, is filtered by an LPF, scrambled by
dynamic element matching (DEM), and finally converted to a current by a primary
IDAC (P-IDAC). Different from the standalone synthesizer in [6], the P-IDAC is
designed to be 15b, and a reference IDAC (R-IDAC) is used to assist digitally
tuning the loop response so that the RMSFEs can be minimized for the chirp-rate
of 0.15 to 1.25MHz/s and 1.5GHz BW.
Figure 13.2.2 shows the DA-PA and RX RFFE. The transconductance-type DAs
provide flatter passband than classical inductive-peaking VCO buffers. Following
that, a three-stage transformer-coupled PA achieves 21dB gain and 14.5dBm
saturated output power. The 3.2dBm DA output saturates the PA so that the TX
output ripple can be minimized. Specifically, the -3dB BW of PA output is extended
to 10GHz, and the simulated overall TX ripple is <0.15dB. Harmonics are well
filtered by the PA, antennas, RX RFFE, and external RF filters; the resulting IFs
are far away from the BPF and PGA passbands.
240 2016 IEEE International Solid-State Circuits Conference
Figure 13.2.3 illustrated the ILPS and the RX baseband. Conventionally, reducing
the LNA gain ripple requires trading off the BW. The proposed ILPS breaks this
trade-off. For the design, the first LNA stage has two inductors: LG in the input
matching network and LLoad in the loading tank. By controlling the values of LG
and LLoad, two peaks can be staggered at two slightly different frequencies. The
series-R loading topology is a popular approach, but the DC current flowing
through the resistor will alter the DC operating points of the LNA due to
temperature drift and process variation. Instead, parallel-R loading is employed
to avoid the drawback. As simulated in Fig. 13.2.3, a parallel resistance of 400
achieves good in-band flatness from 13.5 to 16.5GHz. In this way, two LNAs are
designed to match the response of the Gilbert mixer, attaining 0.37dB simulated
ripple. The 12th-order BPF is composed of six cascaded Biquads. Switched-RC
arrays are used to enable digital control of the passband in a frequency range
from 0.68 to 9.8MHz. The BPF yields 0.5dB ripple and 0dB gain. The PGA consists
of a coarse programmable gain stage (PGS), a fine PGS, and a fixed gain stage
(FGS). The coarse and fine PGSs adopt diode-connected loads and a current-
steering structure, contributing to gain steps of 0.85 dB and 13.6 dB, respectively.
An FGS is used at the last stage to provide a constant output impedance at every
gain setting. With 5dB gain contribution from FGS, the aggregate gain of the PGA
ranges from 5dB to 59dB. For the 10b ADC, 11 conversion cycles are needed with
1b redundancy by using a non-binary DAC array. The unit capacitor is designed
as 0.47fF to save power consumption and area of the DAC array. The ADC
achieves 9.4dB ENOB at 40MHz sampling rate.
The TRX chip was fabricated in a 65nm CMOS process (see Fig. 13.2.7) and
consumes 259.4mW at 1.2V (41mW synthesizer, 136mW PA, 34mW DAs, 27mW
RX RFFE, 15.3mW BPF, 4.8mW PGA, and 1.3mW ADC). The chip is mounted in
a PCB cavity for the testing. The measured spectrum of the TX output is shown
in Fig. 13.2.4, with 9dBm output power (if counting the 4.3dB loss from the PCB,
cable and SMA, the calibrated TX output power is 13.3dBm), 1.1dB ripple,
1.48GHz (9.9%) BW and -90.3dBc/Hz PN at 100kHz offset. Measured on a probe
station, the RX RFFE attains 23.5dB gain, -33dBm IP1dB, 5.6-to-6.3dB DSB NF and
0.51dB ripple. Figure 13.2.4 also shows the frequency responses of the BPF at
two typical setting codes. The BPF is able to suppress fg and fa over 50dB and
60dB, respectively, by placing them in the low-frequency roll-off region. In Fig.
13.2.5, a long cable is used to connect the TX to RX (to introduce a delay) with a
60dB attenuation in between. The delay-line test shows that the dechirped pulse
achieves -12.7dB PSLR. -3dB BW of the mainlobe is measured as 0.34kHz, which
translates to a resolution of 11.2cm. Co-tested with 14dBi horn antennas and an
FPGA, the SAR imaging was conducted by moving the chip prototype system
along a rail on the roof of a building to emulate the UAV flying (Fig. 13.2.5). The
acquired data was processed using Matlab to generate a SAR image with slant
range from 108 to 128m, where two stars are clearly displayed that are obtained
from the two reflectors among the grass backscatters. Figure 13.2.6 summarizes
the performances. The Ku-band is widely used for airborne SARs considering the
detection range, losses at various weather conditions, frequency interferers, etc.,
but few Ku-band FMCW TRX chips were reported. Hence 77GHz [1,2] and X-band
[3,4] TRXs are used for the comparison. The dedicated and complete design of
the SAR TRX makes it well suited for micro-UAV SAR applications.
References:
[1] J. Lee et al., A fully-integrated 77GHz FMCW radar transceiver in 65nm CMOS
Technology, IEEE J. Solid-State Circuits, vol. 45, pp. 27462756, Dec. 2010.
[2] T. Mitomo et al., A 77GHz 90nm CMOS transceiver for FMCW radar
applications, IEEE J. Solid-State Circuits, vol. 45, pp. 928937, Apr. 2010.
[3] S. Wang et al., Design of X-band RF CMOS transceiver for FMCW monopulse
radar, IEEE Trans. Microwave Theory and Techniques, vol. 57, pp. 6170, Jan.
2009.
[4] J. Yu et al., An X-Band Radar Transceiver MMIC with Bandwidth Reduction
in 0.13m SiGe Technology, IEEE J. Solid-State Circuits, vol. 49, pp. 19051915,
Sept. 2014.
[5] Christopher F. Barnes, Synthetic Aperture Radar. Barnes, 2015.
[6] H. Sakurai et al., A 1.5GHz-modulation-range 10ms-modulation-period
180kHz-rms-frequency-error 26MHz-reference mixed-mode FMCW synthesizer
for mm-Wave radar application, ISSCC Dig. Tech. Papers, Feb. 2011.
978-1-4673-9467-3/16/$31.00 2016 IEEE
 ISSCC 2016 / February 2, 2016 / 2:00 PM

Figure 13.2.1: Special issues on TRX for UAV SAR imaging applications, and
block diagram of the TRX chip. Figure 13.2.2: Schematics of the proposed DA-PA and RX RFFE.

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Figure 13.2.3: Simulation of the 1st-stage LNA with ILPS and parallel-R, and Figure 13.2.4: Measured output spectrum and RMS frequency errors of TX, gain
circuit schematics of BPF Biquad cell and PGA. and DSB NF of RX RFFE, and frequency response of BPF.

Figure 13.2.5: Dechirping and sidelobe test using cable-based delay line; and
the emulated UAV SAR setup and acquired image. Figure 13.2.6: Performance summary and comparison with prior art.

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Figure 13.2.7: Micrograph of the fabricated prototype chip and its layout.

2016 IEEE International Solid-State Circuits Conference 978-1-4673-9467-3/16/$31.00 2016 IEEE