Japanese Journal of Applied

Physics

SELECTED TOPICS IN APPLIED PHYSICS Related content

- Electrical and Electroluminescence
Breakdown mechanisms in AlGaN/GaN HEMTs: Characteristics of AlGaN/GaN High
Electron Mobility Transistors Operated in
An overview Sustainable Breakdown Conditions
Matteo Meneghini, Alberto Zanandrea,
Fabiana Rampazzo et al.
To cite this article: Gaudenzio Meneghesso et al 2014 Jpn. J. Appl. Phys. 53 100211 - Reliability and parasitic issues in GaN-
based power HEMTs: a review
G Meneghesso, M Meneghini, I Rossetto
et al.

- Breakdown mechanisms in AlGaN/GaN

View the article online for updates and enhancements. high electron mobility transistors with
different GaN channel thickness values*
Ma Xiao-Hua, Zhang Ya-Man, Wang Xin-
Hua et al.

Recent citations
- Device characteristics of enhancement
mode double heterostructure DH-HEMT
with boron-doped GaN gate cap layer for
full-bridge inverter circuit
A. Mohanbabu et al

- Hot electron assisted vertical

leakage/breakdown in AlGaN/GaN
heterostructures on Si substrates
Anqi Hu et al

- Efficient III-Nitride MIS-HEMT devices with

high- gate dielectric for high-power
switching boost converter circuits
A. Mohanbabu et al

This content was downloaded from IP address 207.237.204.238 on 06/11/2017 at 01:42

Japanese Journal of Applied Physics 53, 100211 (2014) SELECTED TOPICS IN APPLIED PHYSICS
http://dx.doi.org/10.7567/JJAP.53.100211 Progresses and Future Prospects in Nitride Semiconductors

Breakdown mechanisms in AlGaN/GaN HEMTs: An overview

Gaudenzio Meneghesso, Matteo Meneghini, and Enrico Zanoni
Department of Information Engineering, University of Padova, via Gradenigo 6/B 35131 Padova, Italy
E-mail: gauss@dei.unipd.it; matteo.meneghini@dei.unipd.it
Received March 10, 2014; revised April 24, 2014; accepted May 13, 2014; published online September 3, 2014

This paper reviews the physical mechanisms responsible for breakdown current in AlGaN/GaN high electron mobility transistors (HEMTs).
Through a critical comparison between experimental data and previously published results we describe the following mechanisms, which can be
responsible for the increase in drain current at high drain voltage levels, in the off-state: (i) sourcedrain breakdown, due to punch-through effects
and/or to a poor depletion of the buffer; (ii) vertical (drain-bulk) breakdown, which can be particularly prominent when the devices are grown on a
silicon substrate; (iii) breakdown of the gatedrain junction, due either to surface conduction mechanisms or to conduction through the (reverse-
biased) Schottky junction at the gate; (iv) impact ionization triggered by hot electrons, that may induce an increase in drain current due to the
lowering of the barrier for the injection of electrons from the source. 2014 The Japan Society of Applied Physics

exposure to high temperature/power levels, which may

1. Introduction
Thanks to the recent advancements in the growth and
fabrication processes, the performance of high electron
mobility transistors (HEMTs) based on GaN has signi-
cantly improved. The main advantages of using GaN as a
material for the realization of HEMTs are (i) the high sheet
charge density (>1013 cm2) of the two-dimensional elec-
tron gas (2DEG), which results in a low on-resistance of
the transistors; (ii) the high thermal conductivity of GaN
(>2 W cm1 K1), which permits to reach high levels of
power dissipation while keeping the channel temperature
low; (iii) the high breakdown eld (3.3 MV/cm1)), which
allows to fabricate devices with breakdown voltages in the
order of hundreds or thousands of volts, depending on gate
drain spacing and on buffer thickness. These unique features
make GaN an almost perfect material for the manufacturing
of high power transistors: thanks to the recent efforts of the
scientic and industrial communities, GaN-based transistors
with breakdown voltages in excess of 1.51.9 kV have been
recently demonstrated,2,3) thus clearing the way for the
adoption of HEMTs in power electronics. Moreover, thanks
to the low (on-resistance) (device capacitance) product,
GaN-based power HEMTs can reach high switching fre-
quencies (>40 MHz4)), and can therefore be used for the
fabrication of high efciency power conversion systems:
converters with efciencies in excess of 9698% have
already been demonstrated,4,5) thus proving the superiority
of GaN with respect to more conventional semiconductors for
power electronics.
Despite the high performance of GaN-based HEMTs, the
lifetime of these devices can be shorter than expected, due to
the existence of a number of physical mechanisms respon-
sible for device degradation. Recent studies demonstrated
that GaN HEMTs may degrade due to the following proc-
esses: (i) degradation of the gate Schottky junction, induced
by off-state stress.611) This mechanism induces an increase in
the gate leakage current, due to the generation of localized
shunt paths in proximity of the gate edge; (ii) semi-permanent
or permanent degradation due to hot electrons;1214) this
mechanism occurs when the devices are operated in the
on-state, and in most of the cases results in a decrease
in drain current, due to the accumulation of negative charge
close to the gate edge and/or in the gatedrain access
region.15) (iii) delamination of the passivation, due to the
100211-1
result in additional charge trapping and leakage processes.16)
(iv) time-dependent degradation processes,8) due to the
generation of defects within the AlGaN/GaN heterostructure.
Besides these mechanisms, power devices operated at
high drain voltages may show important breakdown (BD)
processes;9,1725) breakdown consists in a rapid increase in
drain current, which occurs in the off-state when the
drain voltage reaches a critical value. Breakdown may
be catastrophic (i.e., induce a sudden failure of the devices);
this typically happens when BD measurements are carried
out in voltage controlled mode, by increasing the drain
voltage until a un-controllable increase in drain current is
triggered. A sustainable breakdown condition can be reached
if the measurements are carried out in current-controlled
mode:25,26) by using this method it is possible to separately
evaluate the contribution of gate, source, and bulk leakage
to the overall BD current, thus extracting information on
the physical origin of breakdown for several operating
conditions.
As can be understood, breakdown represents an important
problem for high power/high voltage HEMTs: for this
reason, over the past years several groups have investigated
the physical origin of BD,9,1725) with the aim of developing
models to explain this phenomenon, and of proposing
technological improvements to increase the robustness of
the devices. This paper reviews the physical mechanisms
responsible for breakdown in GaN-based power transistors:
to this aim, original results are compared with data taken
from the literature. The following, relevant, breakdown
mechanisms are discussed in detail:
: Sourcedrain breakdown, due to short-channel effects,
and/or punch-through.
: The presence of relatively high breakdown current
components at the gate, which can be either related to
the leakage through the Schottky junction, or to surface-
related conduction.
: Vertical breakdown, which can be due to a poor
compensation of the buffer, to the use of a con-
ductive substrate, and can be limited by the adoption
of suitable back barrier or heterostructure congura-
tions.
: Impact ionization mechanisms, that may induce a signi-
cant increase in drain current due to the generation
of electronhole pairs close to the gate.
2014 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 53, 100211 (2014) SELECTED TOPICS IN APPLIED PHYSICS

500 500
2. Experimental methods VG=-3 V VG=-4 V

Drain Current ( A/mm)

Drain Current ( A/mm)

ID ID
The original results described within this paper were obtained 400 400
IG IG
on AlGaN/GaN HEMTs, grown on silicon carbide or on
300 IS 300 IS
silicon substrate by metalorganic chemical vapor deposition
(MOCVD). For the investigation we used both devices 200 200
with single heterostructure and HEMTs with double hetero-
100 100
structure (AlGaN/GaN/AlGaN); gatedrain spacing ranges
between 2 and 10 m, depending on the analyzed set of 0 0
devices. Breakdown was characterized by means of drain
0 50 100 150 200
current vs drain voltage (IDVD) measurements, which were 0 50 100 150 200
Drain Voltage (V) Drain Voltage (V)
carried out in current-controlled mode (as described in
Refs. 25 and 26), to avoid the catastrophic failure of the
devices induced by the measurements. Electroluminescence 500 500
VG=-5 V VG=-6 V
(EL) was also used to investigate the luminescence mech-

Drain Current ( A/mm)

anisms induced by hot electrons when the devices are
operated in sustainable breakdown conditions.
The data collected within this paper were compared to the
results present in the literature, to provide a critical review of
the individual breakdown processes.
3. Results and discussion
3.1 Introductory considerations on sustainable
breakdown measurements: IDVD curves and EL
characterization
Figure 1 reports the typical results of current-controlled
(sustainable) breakdown measurements, carried out at several
gate voltage levels. The measurements were taken on
AlGaN/GaN HEMTs grown on a silicon carbide substrate;
the devices have a gatesource distance of 0.8 m, a gate
drain distance of 4 m, a gate length of 0.5 m, and a gate
width of 100 m. The pinch-off voltage of these devices is
equal to 2.6 V; the measurements were taken by means of a
semiconductor parameter analyzer (Agilent E5260), with gate
voltages between 3 and 6 V. From Fig. 1, several con-
sideration can be made: (i) for all the analyzed gate voltages,
drain current shows a remarkable increase when drainsource
voltage (VDS) becomes higher than VBR = 150 V (breakdown
voltage), indicating the existence of signicant break-
down processes; (ii) for VDS < VBR (i.e., below the break-
down voltage), drain current is almost equal to gate current,
indicating that for moderate VDS levels drain current is
dominated by gatedrain leakage; (iii) when gate voltage is
close to the pinch-off [e.g., in the case VG = 3 V, Fig. 1(a)],
and for VDS > VBR, source current shows a strong increase,
becoming signicantly higher than gate current. As a con-
sequence, breakdown (drain) current almost completely
originates from drainsource leakage. Off-state drainsource
conduction can be due to short-channel effects and/or punch-
through of electrons from the source to the drain, due to the
non-optimized depletion of the channel. These parasitic
conduction processes, and the related remedies, are discussed
in detail in Sect. 3.2. (iv) drainsource sub-threshold leakage
can be almost completely suppressed by going towards more
negative gate voltages [e.g., Fig. 1(d)], thanks to a better
depletion of the buffer. In these conditions, breakdown
(drain) current almost completely originates from gatedrain
leakage. The mechanisms responsible for gatedrain leakage
and breakdown will be discussed in detail in Sect. 3.3.
When operated in sustainable breakdown conditions,
HEMTs can emit a weak luminescence signal. A description
100211-2
Drain Current ( A/mm)
ID ID
400 400
IG IG
IS 300 IS
300
200 200
100 100
0 0
0 50 100 150 200 0 50 100 150 200
Drain Voltage (V) Drain Voltage (V)
Fig. 1. (Color online) Results of current-controlled IDVD measurements
carried out on AlGaN/GaN HEMTs, with varying gate voltage. IS, IG, and ID
represent the source, gate, and drain current respectively. The pinch-off
voltage of the analyzed devices is 2.6 V.
of this mechanism is given in Fig. 2, which reports a false
color image of the distribution of EL on device surface,
together with the corresponding current-controlled IDVD
curves. EL signal is emitted due to the relaxation of energetic
electrons, which are accelerated by the high electric eld.
Several papers discussed the origin of EL in AlGaN/GaN
HEMTs:2732) according to Ref. 32, EL may be generated
either due to intra- or inter-valley transitions (Fig. 3). In
the rst case, the electrons accelerated by the electric eld
reach a high-energy non-equilibrium condition, within the
valley; light emission occurs due to the relaxation of these
hot electrons, via optical transitions which may involve
phonons or ionized impurities. On the other hand, in the
case of inter-valley processes, the accelerated electrons may
acquire enough energy to be injected into the satellite valleys
of the conduction band; this process is favored by the
inelasitic scattering with phonons. These electrons then
relax towards the valley, thus emitting photons (energy
conservation is guaranteed by the interaction with optical
phonons). As shown by the EL micrographs in Fig. 2, under
sustainable breakdown conditions luminescence is emitted in
proximity of localized spots; these regions may correspond
to the presence of defects, where the injection of highly
energetic electrons and thus light emission may be
locally favored.
3.2 Drainsource sub-threshold leakage: physical origin
and remedies
As described in Sect. 3.1, when AlGaN/GaN HEMTs are
operated in the off-state, with a gate voltage relatively close
2014 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 53, 100211 (2014) SELECTED TOPICS IN APPLIED PHYSICS

500 VG=-6 V
VG=-5.5 V
VG=-5 V

Source Current ( A/mm)

400 VG=-4.5 V
VG=-4 V
I=600 A/mm 300
VG=-3.5 V
VG=-3 V

(a) 200
Decreasing VGS
Drain
100

Gate 0

-20 0 20 40 60 80 100 120 140 160 180 200

800
Drain Voltage (V)
Drain Current ( A/mm)

600
Fig. 4. (Color online) Variation of drainsource (sub-threshold) leakage
with varying gate voltage, on a device with LGD = 4 m submitted to current-
400 controlled breakdown measurements. The pinch-off voltage of this device is
2.6 V.

200

VGS=-6V, (b)
0
0 50 100 150 200
Drain-Source Voltage (V)

Fig. 2. (Color online) (a) EL micrograph taken on a device operated in

sustainable breakdown conditions at a current of 600 A/mm, with a gate
voltage of 6 V; (b) IDVD measurements taken on the same devices with a
gate voltage of 6 V, in current controlled mode. Solid lines are guides to the
eye.

Conduction band
Inter-valley
Intra-valley
Fig. 5. Equally spaced contours of the magnitude of the current density,
calculated for a device with gate length 0.17 m, with VG = 6 V and
VDS = 20 V. Material boundaries are marked by solid lines, with the
exception of the GaN/AlGaN interface, which is marked with a ne dashed
line. The gate bias is sufcient to prevent conduction in the channel beneath
the gate; however, the combination of high VDS and poor carrier connement
beneath the channel (which arises from the low NA = ND of 1.5 1016 cm3)
allows current to ow deep into the GaN buffer. In the channel beyond the
Valence band gate, the current density is up to a factor of 100 higher than in the current
loop beneath the gate. However, the contours in the channel are very closely
spaced, because the channel is narrow, and appear as a solid black line in the
-valley
gure. 2006 IEEE. Reprinted with permission from Ref. 20.

Fig. 3. (Color online) Mechanisms responsible for hot-carrier

electroluminescence in AlGaN/GaN HEMTs according to the model
proposed in Ref. 32.
to the pinch-off voltage, breakdown current is dominated
by drainsource (sub-threshold) leakage [see the case in
Fig. 1(a)]. Drainsource leakage is strongly dependent on the
voltage applied to the gate during the sustainable breakdown
measurements [Figs. 1(a)1(d)]: Fig. 4 gives a more quanti-
tative description of the inuence of gate-bias on the drain
source breakdown current in AlGaN/GaN HEMTs (same
devices as in Fig. 1). For a drain bias of 160 V, drainsource
current is almost completely suppressed by changing the gate
voltage from 3 to 6 V (the pinch-off of this device is
2.6 V), i.e., by improving the depletion of the buffer with
more negative gate voltages. These effects are particularly
prominent on short-channel devices (with gate length
100211-3
LG < 1 m), and are usually ascribed to a poor depletion of
the region under the gate, which results in current ow within
the GaN bulk.20,21,25) Uren et al.21) provided an extensive
description of this process, by characterizing HEMTs with
a 30 nm Al0.25Ga0.75N barrier and with gate length in the
range 0.170.27 m; they demonstrated that at high drain
voltages current ows in a loop deep within the GaN, far
from the AlGaN/GaN heterointerface (see Ref. 21 and
Fig. 5). High drain voltages can overwhelm the conning
potential required for HEMT operation:21) this mechanism is
usually referred to as drain induced barrier lowering (DIBL)
or punch-through, and can be partly avoided by varying the
density of doping in the buffer (see Ref. 21 for details).
Punch-through current components can be effectively
reduced through the adoption of a double heterostructure
conguration, as widely discussed in Refs. 22, 24, and 34:
in this case, an AlGaN backbarrier is placed below the
2014 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 53, 100211 (2014) SELECTED TOPICS IN APPLIED PHYSICS

-3
10

-4 Single
10
heterostructure
Drain Current (A/mm)

-5
10

-6 Double
10 heterostructure

LGD=1m
-7
10
LGD=2m
-8 LGD=3m
10
LGD=4m
-9
10
0 20 40 60 80 100 120 140 160 180 200
Drain-Source Voltage (V)

Fig. 6. (Color online) Current-controlled IDVD curves measured on

devices with single (lines) and double (lines with symbols) heterostructure
devices.
Fig. 8. Negative gate leakage current, IG, vs the gatedrain voltage as a
function of the temperature. The curves were measured at 20, 70, 100, 130,
160, and 200 C. Copyright 2002 AIP Publishing LLC. Reprinted with
(a) (b) permission from Ref. 17.

value increases linearly with the gatedrain distance (as

extensively described in Ref. 33). Bidimensional simulations
(see Fig. 7 and Ref. 24) indicate that the use of a double
heterostructure can signicantly improve the depletion of
the buffer, thus reducing the electron density and limiting
the punch through current components. The thickness of
the GaN channel region must be carefully optimized with the
aim of achieving both a high electron density in the 2DEG,
and a good connement of the electrons in the channel.

3.3 Gate-related breakdown current components

Fig. 7. (Color online) Electron density in HEMT devices with (a) GaN
buffer layer (single heterostructure, SH), and (b) with Al0.1Ga0.9N buffer
layer (double heterostructure, DH). Simulations were done with VG = 6 V
and VDS = 30 V. 2009 Wiley-VCH Verlag GmbH & Co. KGaA.
Reproduced with permission from Ref. 24.
channel region, whose thickness is limited to few tens of
nanometers. A typical comparison of the breakdown proper-
ties of single- and double-heterostructure (SH and DH,
respectively) devices is shown in Fig. 6, for devices with
increasing gatedrain distance. The SH HEMTs have a 20 nm
AlGaN barrier (with a 23% indium content), on top of
a 2400 nm GaN buffer layer; in the case of DH HEMTs,
the heterostructure consists in a 1840 Al5Ga95N buffer, a
thin (15 nm) GaN channel layer, and an AlGaN barrier
layer (thickness: 20 nm, Al content: 23%). The results in
Fig. 6 indicate that independently of the gatedrain
distance the devices with single heterostructure show a
soft-breakdown, related to the existence of high drainsource
punch-through components; this effect is signicantly smaller
for the DH devices, for which the (current-controlled) IDVD
curves show a signicantly higher breakdown voltage, whose
100211-4
When the HEMTs are biased in the off-state, with a high
drain voltage, the gatedrain junction is exposed to a high
reverse-bias. In absence of drainsource leakage (i.e., if
the gate voltage is sufciently low to avoid punch-through
current components, or in the case of DH devices) drain
current is dominated by the reverse leakage of the gate
Schottky junction [see for instance Fig. 1(b)]. Gate break-
down can be due to several mechanisms: Tan et al.17)
discussed the role of surface gatedrain leakage in determin-
ing drain current breakdown. They suggested that surface
states created by defects or contamination may generate
a signicant surface conduction, due to hopping. When the
devices are in pinch-off, with a high drain bias, electrons can
tunnel from the gate to these surface states, thus generating
gatedrain leakage. Breakdown (i.e., a sudden increase in
drain current) is reached due to thermal runaway, when
the power dissipation at device surface exceeds a certain
threshold (see Fig. 8).17) This kind of breakdown mechanism
has a negative temperature coefcient, i.e., breakdown
voltage decreases with increasing temperature. Surface
leakage components can be reduced by adopting advanced
passivation schemes: many groups are currently adopting
in-situ (i.e., MOCVD or MBE) nitride as a passivation
layer;34,35) this allows to reduce the reverse-gate leakage of
several orders of magnitude, thus signicantly improving the
behavior of the devices in breakdown conditions. The role of
surface states in the breakdown process was conrmed also
2014 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 53, 100211 (2014)
Fig. 9. (Color online) Current-controlled breakdown curves measured on
a double heterostructure HEMT with MIS-gate.
by Saito et al.;36) they indicated that the presence of positive
charge (e.g., due to nitrogen vacancies) at the AlGaN layer
surface increases the electric eld over the AlGaN barrier,
thus favoring tunneling and impact ionization processes.
As a consequence, leakage current (breakdown voltage)
increases (decreases) with increasing concentration of
charged defects at the surface of the AlGaN layer.
Even if the surface is carefully optimized, other mecha-
nisms may signicantly contribute to gatedrain leakage
through the AlGaN barrier: the most relevant are defect-
assisted tunneling,37) thermionic emission at the Schottky
gate,37) PooleFrenkel emission,37) and the existence of
leakage paths due to the presence of extended defects.11)
These leakage components can reduce the breakdown voltage
of HEMTs; in general, gate-related leakage can be almost
completely suppressed through the use of a metalinsulator
semiconductor (MIS) scheme as an alternative to the
conventional Schottky-gate structure.38)
3.4 Vertical (bulk-related) breakdown
As described in the previous sections, gate- and source-
related breakdown current components can be signicantly
reduced through the use of optimized device structures, i.e.,
MIS-HEMTs (for lowering gate-induced leakage current) and
double heterostructure devices (for lowering drainsource
punch-through). Devices with high gatedrain spacing can
reach breakdown voltages in excess of 5001000 V. Under
these conditions, vertical (drain-bulk) leakage may become
relevant. Figure 9 reports the current-controlled breakdown
curves measured on a MIS-HEMT with gatedrain spacing
of 10 m; while drainsource and gate current are below the
detection limit, the drain (breakdown) current originates
entirely from vertical leakage.
These current components can be reduced by improving
the insulating properties of the buffer: a simple and effective
approach is to use AlGaN (instead of GaN) for the fabrication
of the buffer layer.39) Since AlGaN has a bandgap higher than
GaN, this results in an increase in the vertical breakdown
voltage. Another possibility is to use thick GaN-buffer layers;
Rowena et al.40) demonstrated that a signicant improvement
of the breakdown voltage can be obtained by increasing
the thickness of the GaN buffer layer on which i-GaN is
grown (Fig. 10). This is partly due to the fact that with
increasing buffer thickness the density of dislocations (in
GaN grown on a thick buffer) shows a signicant decrease.
100211-5
SELECTED TOPICS IN APPLIED PHYSICS
Fig. 10. (Color online) Vertical IV measured across bulk GaN/Si with
bias applied at the top electrode. The breakdown enhancement is small (11%)
for increasing the GaN thickness and large (50%) for increasing the buffer
thickness. 2011 IEEE. Reprinted with permission from Ref. 40.
They demonstrated a breakdown eld of 2.3 MV/cm (very
close to the theoretical value of 3 MV/cm) for epilayers
grown by MOCVD with a total thickness of 5.5 m.
Another promising technique for reducing vertical leakage
has been recently demonstrated for GaN HEMTs grown on
n-SiC substrates.41) The idea is to split the vertical voltage
drop between the nitride layers and the upper layers of the
SiC substrate. Hilt et al.41) proposed to use Ar-implantation
to render isolating the top-most part (some hundreds of
nanometers) of the SiC substrate. The implantation-induced
damage in the SiC crystal is still present after MOCVD
nitride growth; dynamic properties of the HEMTs are not
altered by this procedure. A breakdown voltage of 880 V was
demonstrated with a gatedrain distance of 18 m by means
of this technique.
Lu et al.42) proposed to remove the Si substrate to further
increase the breakdown voltage of the HEMTs; by trans-
ferring the HEMT on an insulating carrier wafer, such as
polycristalline AlN or glass, they demonstrated a signicant
reduction of vertical leakage conduction, and breakdown
voltages in excess of 1500 V, by simply using HEMTs with
a 2 m total epilayer thickness. In case the substrate is
removed, heat dissipation must be optimized through the
use of carrier layers with high thermal conductivity, such as
polycristalline aluminum nitride wafers. A similar approach
was proposed by Herbecq et al.,43) who were able to
demonstrate a breakdown voltage of 1.9 kV (with a buffer
thickness of less than 2 m), after removing the substrate
locally between gate and drain.
Another mechanism which can be responsible for vertical
leakage was proposed in 2010 by Umeda et al.;44) they
suggested that the blocking voltage of the HEMTs can be
limited by the fact that a sheet of electrons is formed at
the interface between GaN and the silicon substrate. This
inversion layer can lead to a signicant leakage current, at
the edges of the devices. They proposed to implant acceptor
atoms in the silicon wafer, to create two p+ regions in
proximity of the edges of the transistor. This allows one
to prevent the ow of electrons towards the edges of
the devices, thus signicantly reducing vertical leakage. The
implanted regions (referred to as channel stoppers) permit
to drastically increase the breakdown voltage; Umeda et al.44)
2014 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 53, 100211 (2014)
(a) (b)
Fig. 11. Electron and hole density proles for a HEMT bias with
VDS = 410 V and VG = 8 V. 2014 Wiley-VCH Verlag GmbH & Co.
KGaA. Reproduced with permission from Ref. 47.
achieved an off-state BDV of 1340 V with a total epitaxial
thickness of GaN of 1.4 m.
More recently, Zhou et al.45) investigated the conduction
mechanisms responsible for vertical leakage and breakdown,
based on temperature-dependent transient backgating meas-
urements. They demonstrated that the vertical leakage is
dominated by space-charge limited current (SSLC); moreover
they showed that the presence of donor and acceptor traps
within the buffer/transition layer can signicantly inuence
the dynamic behavior of the devices under breakdown
conditions.
3.5 Breakdown and impact ionization
Most of the mechanisms described so far (gatedrain leakage,
drainsource punch-through, vertical leakage, etc.) involve
only electrons, which are the majority carriers in the weakly
n-type GaN substrates, and can be injected from the gate,
from the source, or from the bulk. Recent studies19,4649)
suggested that also holes generated through impact ionization
may contribute to the breakdown of AlGaN/GaN HEMTs. A
negative effect of the intrinsic n-type doping of the buffer is
the DIBL; simulations indicate that the height of the barrier
for the injection of electrons from the source to the buffer
decreases with increasing depth. Recent studies46) suggested
that under off state conditions the electrons can be
injected from the source to the high-eld region (gate edge on
the drain side), thus initiating impact ionization in the
channel. This may lead to a strong increase in drain current:
Hanawa et al.,47,48) based on bidimensional simulations, pro-
vided a quantitative description of this effect (see Fig. 11).
They showed that when VDS is close to the breakdown
voltage, impact ionization may occur in the region between
gate and drain; this results in the generation of electron/hole
pairs; as a consequence, the density of holes in the buffer
layer can be very high (>1015 cm3), particularly at the
source side, where also the electron densities are high. The
holes generated by impact ionization can ow into the buffer,
and be captured by deep donors; this leads to a decrease in
the negative space charge in the buffer, and to the reduction
of the barrier for the injection of electrons to the GaN, thus
resulting in a signicant increase in drain current. Typically,
if breakdown is due to impact ionization, VBR has a positive
temperature coefcient:19,49) this is due to the fact that
the electron mean free path, which is limited by phonon
scattering, is shorter at higher temperatures. As a conse-
100211-6
SELECTED TOPICS IN APPLIED PHYSICS
quence, at high temperatures high electric elds are required
to give to the electrons the energy required to reach impact
ionization. In bi-dimensional simulations, the carrier gen-
eration rate due to impact ionization is usually expressed as
n jJn j p jJp j
G ; 1
q
where n and p are the ionization rates for electrons
and holes, Jn and Jp are the electron and hole current
densities, and q is the electron charge. n and p are
expressed as
 
Bn
n An exp  ; 2
jEj
 
Bp
p Ap exp  : 3
jEj
Here E is the electric eld, while An, Bn, Ap, Bp are
coefcients whose values can be deduced from the theoretical
work by Bulutay.50) It is clear that to reduce the contribution
of impact ionization to breakdown it is necessary to limit
the electric eld; this is possible through the use of suitable
source-eld plates, through the optimization of the dielec-
trics,47,48) and through an accurate design of gate head.
It is worth noticing that, although possible at theoretical
level, further work must be done to demonstrate the role
of impact ionization in inducing the breakdown of AlGaN/
GaN HEMTs. In GaAs devices impact ionization can be
easily identied, since it generates a signicant increase in
gate current, and a measurable electroluminescence signal
due to electronhole recombination;51) on the other hand,
in GaN-based transistors the contribution of impact ioniza-
tion to gate current and band-to-band electroluminescence
is signicantly lower, and still has to be extensively
described.
4. Summary
In summary we have described the main mechanisms
responsible for high breakdown current in AlGaN/GaN
based HEMTs. The results described within this paper
demonstrate that breakdown voltage (dened as the drain
voltage required to reach a given drain current level) can be
limited by the presence of a number of leakage mechanisms.
At high drain bias, drain current may show a signicant
increase, due to (i) the punch-through of electrons injected
from the source; (ii) the presence of high gate-leakage current
components, due either to surface conduction, or to the
tunneling of electrons through the AlGaN barrier; (iii)
vertical conduction through the substrate, due to the use of
conductive silicon substrates, to the intrinsic defectiveness of
the buffer layer, or to the parasitic conduction mechanisms
related to the presence of an inversion layer between the
Si substrate and the nitrides; (iv) impact ionization, which
may generate holes, thus locally decreasing the barrier for
the injection of electrons from the source. These breakdown
mechanisms have been discussed based on the data presented
in the literature, and on original results. A hard degradation
occurs due to positive-feedback mechanisms, such as thermal
runaway or avalanche processes, for very high drain voltages.
The results described within this paper indicate that
breakdown current can originate from a number of parasitic
mechanisms, that in most of the cases can be limited
2014 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 53, 100211 (2014)
or totally reduced, through a careful optimization of the
procedures used for growth and processing. Methods for
decreasing the source, gate, or bulk related current compo-
nents are critically discussed in the text.
Acknowledgments
The authors thank Fabiana Rampazzo, Isabella Rossetto,
Davide Bisi, Antonio Stocco, Riccardo Silvestri, Carlo de
Santi, Stefano Dalcanale, for the fruitful discussion. This
work is partially funded by the UE (ENIAC Joint Under-
taking) in the E2CoGaN project (ENIAC-324280), by the
project FP7-ICT-2011-7 (Project No. 287602) HiPoSwitch,
and by the Progetto di Ateneo 2010 Development of
normally off gallium nitride power devices for future green
power applications.
1) S. Hashimoto, K. Akita, T. Tanabe, N. Nakahata, K. Takeda, and H. Amano,
SEI Tech. Rev. 71, 83 (2010).
2) Y. Dora, A. Chakraborty, L. McCarthy, S. Keller, S. P. DenBaars, and U. K.
Mishra, IEEE Electron Device Lett. 27, 713 (2006).
3) M. Ishida, T. Ueda, T. Tanaka, and D. Ueda, IEEE Trans. Electron Devices
60, 3053 (2013).
4) M. Rodriguez, Y. Zhang, and D. Maksimovic, IEEE Trans. Power Electron.
29, 2462 (2014).
5) Y. Wu, M. Jacob-Mitos, M. L. Moore, and S. Heikman, IEEE Electron
Device Lett. 29, 824 (2008).
6) J. Joh, J. A. del Alamo, and J. Jimenez, IEEE Electron Device Lett. 29, 665
(2008).
7) F. Gao, B. Lu, L. Li, S. Kaun, J. S. Speck, C. V. Thompson, and T. Palacios,
Appl. Phys. Lett. 99, 223506 (2011).
8) M. Meneghini, A. Stocco, M. Bertin, D. Marcon, A. Chini, G. Meneghesso,
and E. Zanoni, Appl. Phys. Lett. 100, 033505 (2012).
9) J. Wuer, E. Bahat-Treidel, F. Brunner, E. Cho, O. Hilt, P. Ivo, A. Knauer,
P. Kurpas, R. Lossy, M. Schulz, S. Singwald, M. Weyers, and R.
Zhytnytska, Microelectron. Reliab. 51, 1710 (2011).
10) E. Zanoni, G. Meneghesso, G. Verzellesi, F. Danesin, M. Meneghini, F.
Rampazzo, A. Tazzoli, and F. Zanon, IEDM Tech. Dig., 2007, 2007, p. 381.
11) D. Marcon, G. Meneghesso, T.-L. Wu, S. Stofferls, M. Meneghini, E.
Zanoni, and S. Decoutere, IEEE Trans. Electron Devices 60, 3132 (2013).
12) Y. S. Puzyrev, B. R. Tuttle, R. D. Schrimpf, D. M. Fleetwood, and S. T.
Pantelides, Appl. Phys. Lett. 96, 053505 (2010).
13) M. Meneghini, A. Stocco, R. Silvestri, G. Meneghesso, and E. Zanoni,
Appl. Phys. Lett. 100, 233508 (2012).
14) C. Y. Zhu, F. Zhang, R. A. Ferreyra, V. Avrutin, . zgr, and H. Morko, 43) N. Herbecq, I. Roch-Jeune, N. Rolland, D. Visalli, J. Derluyn, S. Degroote,
Appl. Phys. Lett. 103, 163504 (2013).
15) M. Meneghini, G. Meneghesso, and E. Zanoni, IEEE Trans. Device Mater.
Reliab. 13, 357 (2013).
16) M. Bouya, D. Carisetti, N. Malbert, N. Labat, P. Perdu, J. C. Clment, M.
Bonnet, and G. Pataut, Microelectron. Reliab. 47, 1630 (2007).
17) W. S. Tan, P. A. Houston, P. J. Parbrook, D. A. Wood, G. Hill, and C. R.
Whitehouse, Appl. Phys. Lett. 80, 3207 (2002).
18) M. Micovic, P. Hashimoto, M. Hu, I. Milosavljevic, J. Duvall, P. J.
Willadsen, W.-S. Wong, A. M. Conway, A. Kurdoghlian, P. W. Deelman,
J.-S. Moon, A. Schmitz, and M. J. Delaney, IEDM Tech. Dig., 2004, p. 807.
19) M. Wang and K. J. Chen, IEEE Trans. Electron Devices 57, 1492 (2010).
20) M. Uren, K. J. Nash, R. S. Balmer, T. Martin, E. Morvan, N. Caillas, S. L.
Delage, D. Ducatteau, B. Grimbert, and J. C. De Jaeger, IEEE Trans.
Electron Devices 53, 395 (2006).
100211-7
SELECTED TOPICS IN APPLIED PHYSICS
21) M. Meneghini, D. Bisi, D. Marcon, S. Van Hove, T.-L. Wu, S. Decoutere,
G. Meneghesso, and E. Zanoni, IEEE Trans. Power Electron. 29, 2199
(2014).
22) E. Bahat-Treidel, O. Hilt, F. Brunner, J. Wr, and G. Trnkle, IEEE Trans.
Electron Devices 55, 3354 (2008).
23) J. Kuzmik, G. Pozzovivo, J.-F. Carlin, M. Gonschorek, E. Feltin, N.
Grandjean, G. Strasser, D. Pogany, and E. Gornik, Phys. Status Solidi C 6,
S925 (2009).
24) E. Bahat-Treidel, O. Hilt, F. Brunner, J. Wr, and G. Trnkle, Phys. Status
Solidi C 6, 1373 (2009).
25) M. Meneghini, A. Zanandrea, F. Rampazzo, A. Stocco, M. Bertin, G. Cibin,
D. Pogany, E. Zanoni, and G. Meneghesso, Jpn. J. Appl. Phys. 52, 08JN17
(2013).
26) S. Bahl and J. A. del Alamo, IEEE Trans. Electron Devices 40, 1558 (1993).
27) N. Shigekawa, T. Enoki, T. Furuta, and H. Ito, IEEE Electron Device Lett.
16, 515 (1995).
28) M. Meneghini, A. Stocco, N. Ronchi, F. Rossi, G. Salviati, G. Meneghesso,
and E. Zanoni, Appl. Phys. Lett. 97, 063508 (2010).
29) N. Shigekawa, K. Shiojima, and T. Suemitsu, Appl. Phys. Lett. 79, 1196
(2001).
30) N. Shigekawa, K. Shiojima, and T. Suemitsu, J. Appl. Phys. 92, 531 (2002).
31) M. Meneghini, N. Ronchi, A. Stocco, G. Meneghesso, U. K. Mishra, Y. Pei,
and E. Zanoni, IEEE Trans. Electron Devices 58, 2996 (2011).
32) M. Baeumler, F. Gutle, V. Polyakov, M. Casae, M. Damman, H. Kostanzer,
W. Pletschen, W. Bronner, R. Quay, P. Waltereit, M. Mikulla, O. Ambacher,
F. Bourgeois, R. Behtash, K. Riepe, P. J. Van Der Wel, J. Klappe, and T.
Rodle, J. Electron. Mater. 39, 756 (2010).
33) G. Meneghesso, A. Zanandrea, A. Stocco, I. Rossetto, C. De Santi, F.
Rampazzo, M. Meneghini, E. Zanoni, E. Bahat-Treidel, O. Hilt, P. Ivo, and
J. Wuer, Proc. IEEE Int. Reliability Physics Symp., 2013, 6531983.
34) B. Heying, I. P. Smorchkova, R. Cofe, V. Gambin, Y. C. Chen, W. Sutton,
T. Lam, M. Kahr, K. S. Sikorski, and M. Wojtowicz, Electron. Lett. 43, 779
(2007).
35) M. Germain, K. Cheng, J. Derluyn, S. Degroote, J. Das, A. Lorenz, D.
Marcon, M. Van Hove, M. Leys, and G. Borghs, Phys. Status Solidi C 5,
2010 (2008).
36) W. Saito, M. Kuraguchi, Y. Takada, K. Tsuda, I. Omura, and T. Ogura, IEEE
Trans. Electron Devices 52, 159 (2005).
37) S. Turuvekere, N. Karumuri, A. A. Rahman, A. Bhattacharya, A. DasGupta,
and N. DasGupta, IEEE Trans. Electron Devices 60, 3157 (2013).
38) M. Van Hove, S. Boulay, S. R. Bahl, S. Stoffels, X. Kang, D. Wellekens, K.
Geens, A. Delabie, and S. Decoutere, IEEE Electron Device Lett. 33, 667
(2012).
39) D. Visalli, M. Van Hove, J. Derluyn, S. Degroote, M. Leys, K. Cheng, M.
Germain, and G. Borghs, Jpn. J. Appl. Phys. 48, 04C101 (2009).
40) I. B. Rowena, S. L. Selvaraj, and T. Egawa, IEEE Electron Device Lett. 32,
1534 (2011).
41) O. Hilt, P. Kotara, F. Brunner, A. Knauer, R. Zhytnytska, and J. Wr, IEEE
Trans. Electron Devices 60, 3084 (2013).
42) B. Lu and T. Palacios, IEEE Electron Device Lett. 31, 951 (2010).
M. Germain, and F. Medjdoub, Appl. Phys. Express 7, 034103 (2014).
44) H. Umeda, A. Suzuki, Y. Anda, M. Ishida, T. Ueda, T. Tanaka, and D. Ueda,
IEDM Tech. Dig., 2010, 20.5.1.
45) C. Zhou, Q. Jiang, S. Huang, and K. J. Chen, IEEE Electron Device Lett.
33, 1132 (2012).
46) M. Wang and K. J. Chen, IEDM Tech. Dig., 2008, p. 1.
47) H. Hanawa and K. Horio, Phys. Status Solidi A 211, 784 (2014).
48) H. Hanawa, H. Onodera, A. Nakajima, and K. Horio, IEEE Trans. Electron
Devices 61, 769 (2014).
49) Y. Ohno, T. Nakao, S. Kishimoto, K. Maezawa, and T. Mizutani, Appl.
Phys. Lett. 84, 2184 (2004).
50) C. Bulutay, Semicond. Sci. Technol. 17, L59 (2002).
51) E. Zanoni, M. Manfredi, S. Bigliardi, A. Paccagnella, P. Pisoni, C. Tedesco,
and C. Canali, IEEE Trans. Electron Devices 39, 1849 (1992).
2014 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 53, 100211 (2014) SELECTED TOPICS IN APPLIED PHYSICS

Matteo Meneghini received the Laurea degree Gaudenzio Meneghesso received the B.S. degree in
(summa cum laude) in electronics engineering, with electronic engineering, working on the failure
a thesis on the electrical and optical characterization mechanism induced by hot electrons in MSFET and
of gallium nitride light-emitting diodes (LEDs), and HEMTs, and the Ph. D. degree in electrical and
the Ph. D. degree in the optimization of GaN-based telecommunication engineering from the University
LED and laser structures from the University of of Padova, Padova, Italy, in 1992 and 1997,
Padova, Padova, Italy, in 2004 and 2008, respec- respectively. In 1995, he was with the University of
tively. He is currently assistant professor with the Twente, Enschede, The Netherlands, with a Human
Department of Information Engineering, University Capital and Mobility fellowship (within the
of Padova. He has been involved in several national SUSTAIN Network) working on the dynamic
and European projects on GaN LEDs and high-electron mobility transistors behavior of protection structures against electrostatic discharge (ESD). Since
(HEMTs). He is currently engaged in the electrooptical characterization and 2011, he has been a Full Professor with the Department of Information
modeling of the performance and reliability of InGaN LEDs and lasers and in Engineering, University of Padova. He has published about 600 technical
the characterization of power HEMTs and E-mode transistors. He published papers, of which more than 60 are invited papers and eight have won Best
more than 200 journal and conference proceedings papers and presented Paper Awards at the 1996, 1999, 2007, and 2009 European Symposium on
several invited presentations. His current research interests include the Reliability of Electron Devices, Failure Physics and Analysis (ESREF) and at
characterization, reliability, and simulation of compound semiconductor the 2006 Electrical Overstress/Electrostatic Discharge Symposium. His
devices. He was a recipient of the Carlo Offelli Award for Best Young research interests include electrical characterization, modeling, and reliability
Researcher from the Department of Information Engineering (DEI), of microwave and optoelectronic devices on IIIV and IIIN; electrical
University of Padova, in 2008. He was also a recipient of Best Paper Awards characterization, modeling, and reliability of RF MEMS switches for
at the European Symposium on Reliability of Electron Devices, Failure recongurable antenna arrays; development of ESD protection structures for
Physics and Analysis (ESREF), in 2009 and 2012, and at the International CMOS and SmartPower integrated circuits; and the characterization and
Workshop on Nitrides, in 2012. He is a member of the IEEE International reliability of organic semiconductor devices. Dr. Meneghesso was the
Electron Device Meeting committee, of the Solid State Device Research recipient of the Italian Telecom award for his thesis work in 1993. For several
Conference (ESSDERC) 2013 and 2014 Technical Program Committee and years, he has served on the Executive Committee of the IEEE International
of the technical subcommittees of the ESREF. Electron Devices Meeting as the European Arrangements Chair in 2006 and
2007. He has been serving on the Technical Program Committee (TPC) of the
Enrico Zanoni was born in Verona, Italy, in 1956. IEEE International Reliability Physics Symposium since 2005 and on the
He received the Laurea degree in physics (cum Management Committee since 2009. He is in the Steering Committee of
laude) from the University of Modena and Reggio several international conferences, including the European Solid-State Device
Emilia, Modena, Italy, in 1982, after a student Research Conference, the ESREF, the Workshop on Compound Semi-
internship with the S. Carlo Foundation, Modena. conductor Devices and Integrated Circuits (WOCSDICE), and the European
During 19851988, he was an Assistant Professor Workshop on Heterostructure Technology (HETECH), and has been serving
with the Faculty of Engineering, University of Bari, on the TPC of several international conferences. Since 2007, he has been an
Bari, Italy. From 1988 to 1993, he frequently visited Associate Editor of the IEEE ELECTRON DEVICES LETTERS for the
the U.S. and established research collaborations with compound semiconductor devices area. He has been nominated to IEEE
Bell Laboratories; Hughes Research Laboratories; Fellow Class 2013, with the following citation: for contributions to the
IBM T. J. Watson Research Center; Massachusets Institute of Technology, reliability physics of compound semiconductor devices. In 2010, he joined
Cambridge, MA, USA; TRW (currently, Northrop Grumman); University of the Administrative Committee of the IEEE Electron Devices Society.
California, Santa Barbara, CA, USA; and many other industrial and academic
laboratories. During 19961997, he was a Full Professor of industrial
electronics with the University of Modena and Reggio Emilia. He is currently
with the University of Padova, Padua, Italy, where he was an Assistant
Professor during 19881992, an Associate Professor of electronics during
19921993, a Full Professor of microelectronics during 19931996, and has
been a Full Professor of digital electronics with the Department of
Information Engineering since 1997. He has been a Representative of the
University of Padova for the European project MANPOWER and
Manufacturable Power Monolithic Microwave Integrated Circuits for
Microwave Systems Applications, a European Coordinator for the subproject
Reliability of the European project EUREKA PROMETHEUS (automotive
electronics), a Principal Investigator of the European project Procedures for
the early phase evaluation of reliability of electronic components by the
development of European Committee for Electrotechnical Standardization
(CENELEC) Electronic Components Committee rules on qualication and
reliability of integrated circuits, and a European Coordinator of the
subproject Reliability of the European Defence Agency project Key
Organization for Research on Integrated Circuits in GaN Technology. He is
nationally or locally responsible for several Italian research projects, such as
the Italian Space Agency, the Italian Research Ministry Projects, and the
Italian National Council of Research. He is the author or coauthor of
approximately 450 papers in refereed international journals and conference
roceedings, including more than 35 invited papers. His microelectronics
group is composed of ve professors, three assistant professors, and, on
average, 15 Ph. D. students and two postdoctoral researchers. This research
group publishes approximately 80 papers each year on a wide range of
research topics, including analog and RF signal CMOS design, biochip
development, the analysis of radiation hardness, and the reliability of
electronic devices and circuits. His research interests include microelec-
tronics, particularly concerning the design, characterization, reliability, and
failure analysis of electronic devices and circuits.

100211-8 2014 The Japan Society of Applied Physics