SN65518, SN75518

VACUUM FLUORESCENT DISPLAY DRIVERS

SLDS004B MARCH 1983 REVISED MAY 1990

Each Device Drives 32 Lines N PACKAGE

60-V Output Voltage Swing Capability (TOP VIEW)

25-mA Output Source Current Capability

VCC2 VCC1

1 40
High-Speed Serially Shifted Data Input SERIAL OUT 2 39 DATA IN
Latches on All Driver Outputs Q32 3 38 Q1
Q31 4 37 Q2
description Q30 5 36 Q3
Q29 6 35 Q4
The SN65518 and SN75518 are monolithic
Q28 7 34 Q5
BIDFET integrated circuits designed to drive a
Q27 8 33 Q6
dot matrix or segmented vacuum fluorescent
Q26 9 32 Q7
display.
Q25 10 31 Q8
Each device consists of a 32-bit shift register, 32 Q24 11 30 Q9
latches, and 32 output AND gates. Serial data is Q23 12 29 Q10
entered into the shift register on the low-to-high Q22 13 28 Q11
transition of CLOCK. While LATCH ENABLE is Q21 14 27 Q12
high, parallel data is transferred to the output Q20 15 26 Q13
buffers through a 32-bit latch. Data present in the Q19 16 25 Q14
latch during the high-to-low transition of LATCH Q18 17 24 Q15
ENABLE is latched. When STROBE is low, all Q Q17 18 23 Q16
outputs are enabled. When STROBE is high, all Q 19 22
STROBE LATCH ENABLE
outputs are low. 20 21
GND CLOCK
Serial data output from the shift register may be
used to cascade additional devices. This output is FN PACKAGE
(TOP VIEW)
not affected by LATCH ENABLE or STROBE.

SERIAL OUT
The SN65518 is characterized for operation from

DATA IN
40C to 85C. The SN75518 is characterized for

VCC2
VCC1
operation from 0C to 70C.
Q30
Q31
Q32
NC

Q1
Q2
Q3
6 5 4 3 2 1 44 43 42 41 40
Q29 7 39 Q4
Q28 8 38 Q5
Q27 9 37 Q6
Q26 10 36 Q7
Q25 11 35 Q8
Q24 12 34 Q9
Q23 13 33 Q10
Q22 14 32 Q11
Q21 15 31 Q12
Q20 16 30 Q13
Q19 17 29 NC
18 19 20 21 22 23 24 25 26 27 28
Q18
Q17

LATCH ENABLE
Q16
Q15
Q14
NC

NC
STROBE
GND
CLOCK

NC No internal connection
BIDFET Bipolar, double-diffused, N-channel and P-channel MOS transistors on same chip. This is a patented process.

PRODUCTION DATA information is current as of publication date. Copyright 1990, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 DALLAS, TEXAS 75265 41

SN65518, SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS004B MARCH 1983 REVISED MAY 1990

logic symbol

CMOS/ VAC
FLUOR DISP
19 EN3
STROBE

LATCH 22 C2
ENABLE
SRG32
21 C1/
CLOCK
39 38
DATA IN 2D 3 Q1
37
2D 3 Q2

23
2D 3 Q16
18
2D 3 Q17

4 Q31
2D 3
2D 3 3 Q32
2
SERIAL OUT

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the N package.

logic diagram (positive logic)

STROBE

LATCH
ENABLE
Shift
Register Latches
DATA IN 1D C2
R1 Q1
C1 2D LC1
CLOCK

1D C2
R2 Q2
C1 2D LC2
28 Stages
(Q3 thru Q30)
Not Shown
1D C2
R31 Q31
C1 2D LC31

1D C2
R32 Q32
C1 2D LC32

SERIAL OUT

42 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

 SN65518, SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS004B MARCH 1983 REVISED MAY 1990

FUNCTION TABLE
CONTROL INPUTS OUTPUTS
SHIFT REGISTERS LATCHES
FUNCTION LATCH
CLOCK STROBE R1 THRU R32 LC1 THRU LC32 SERIAL Q1 THRU Q32
ENABLE
X X Load and shift Determined by
Load R32 Determined by STROBE
No X X No change LATCH ENABLE
X L X As determined Stored data
Latch R32 Determined by STROBE
X H X above New data
X X H As determined Determined by All L
Strobe R32
X X L above LATCH ENABLE LC1 thru LC32, respectively
H = high level, L = low level, X = irrelevant, = low-to-high-level transition.
R32 and the serial output take on the state of R31, R31 takes on the state of R30, ... R2 takes on the state of R1, and R1 takes on the state of
the data input.
New data enter the latches while LATCH ENABLE is high. These data are stored while LATCH ENABLE is low.

typical operating sequence

CLOCK

DATA IN Valid Irrelevant

SR Invalid Valid
Contents

LATCH
ENABLE

Latch Previously Stored Data New Data Valid

Contents

STROBE

Q Outputs Valid

POST OFFICE BOX 655303 DALLAS, TEXAS 75265 43

SN65518, SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS004B MARCH 1983 REVISED MAY 1990

schematic of inputs and outputs

EQUIVALENT OF EACH INPUT TYPICAL OF ALL Q OUTPUTS TYPICAL OF SERIAL OUTPUT

VCC1 VCC2 VCC1

Input Output Output

GND GND GND

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
Supply voltage, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC1
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA: SN65518 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40C to 85C
SN75518 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Case temperature for 10 seconds: FN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package . . . . . . . . . . . . . . . . . . . . . 260C
NOTE 1: Voltage values are with respect to network ground terminal.

DISSIPATION RATING TABLE

TA 25C DERATING FACTOR TA = 70C TA = 85C
PACKAGE
POWER RATING ABOVE TA = 25C POWER RATING POWER RATING
FN 1700 mW 13.6 mW/C 1088 mW 884 mW
N 1250 mW 10.0 mW/C 800 mW 650 mW

44 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

 SN65518, SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS004B MARCH 1983 REVISED MAY 1990

recommended operating conditions, TA = 25C (unless otherwise noted)

MIN MAX UNIT
Supply voltage, VCC1 4.5 15 V
Supply voltage, VCC2 0 60 V
VCC1 = 4.5 V 3.5
High level input voltage,
High-level voltage VIH (see Figure 1) V
VCC1 = 15 V 12
Low-level input voltage, VIL (see Figure 1) 0.3 0.8 V
High-level output current, IOH 25 mA
Low-level output current, IOL 2 mA
VCC1 = 10 V to 15 V 0 5
frequency fclock
Clock frequency, l k (see Figure 2) MHz
VCC1 = 4.5 V 0 1
VCC1 = 10 V to 15 V 100
Pulse duration,
duration CLOCK high,
high tw(CKH)
(CKH) ns
VCC1 = 4.5 V 500
VCC1 = 10 V to 15 V 100
Pulse duration,
duration CLOCK low,
low tw(CKL)
(CKL) ns
VCC1 = 4.5 V 500
VCC1 = 10 V to 15 V 75
time DATA IN before CLOCK, tsu
Setup time, ns
VCC1 = 4.5 V 150
VCC1 = 10 V to 15 V 75
time DATA IN after CLOCK, th
Hold time, ns
VCC1 = 4.5 V 150
SN65518 40 85
free air temperature,
Operating free-air temperature TA C
SN75518 0 70

electrical characteristics over recommended ranges of operating free-air temperature and VCC1,
VCC2 = 60 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIK Input clamp voltage II = 12 mA 1.5 V
Q outputs IOH = 25 mA 57.5 58
VOH High level output voltage
High-level V
SERIAL OUT VCC1 = 5 V, IOH = 20 A 4.5 4.9 5
Q outputs IOL = 1 mA 5
VOL Low level output voltage
Low-level V
SERIAL OUT IOL = 20 A 0.06 0.8
IIH High-level input current VCC1 = 15 V, VI = 15 V 0.1 1 A
IIL Low-level input current VCC1 = 15 V, VI = 0 V 0.1 1 A
VCC1 = 4.5 V 1.8 4
ICC1 Supply current mA
VCC1 = 15 V 2 5
SN65518 Outputs high, TA = 40C 12
ICC2 Supply current SN65518, Outputs high, TA = 0C to MAX 7 10 mA
SN75518 Outputs low 0.01 0.5
All typical values are at TA = 25C.

POST OFFICE BOX 655303 DALLAS, TEXAS 75265 45

SN65518, SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS004B MARCH 1983 REVISED MAY 1990

switching characteristics, VCC2 = 60 V, CL = 50 pF, TA = 25C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN MAX UNIT
VCC1 = 4.5 V CL = 15 pF,, 600
td time CLOCK to DATA OUT
Delay time, ns
VCC1 = 15 V See Figure 4 150
From LATCH ENABLE See Figure 5 1.5
VCC1 = 4
4.5
5V
From STROBE See Figure 6 1
tDHL Delay time
time, high-to-low-level
high to low level Q output s
From LATCH ENABLE See Figure 5 0.5
VCC1 = 15 V
From STROBE See Figure 6 0.5
From LATCH ENABLE See Figure 5 1.5
VCC1 = 4
4.5
5V
From STROBE See Figure 6 1
tDLH Delay time
time, low-to-high-level
low to high level Q output s
From LATCH ENABLE See Figure 5 0.25
VCC1 = 15 V
From STROBE See Figure 6 0.25
VCC1 = 4.5 V 3
tTHL time high-to-low-level
Transition time, high to low level Q output See Figure 6 s
VCC1 = 15 V 1.5
VCC1 = 4.5 V 2.5
tTLH Transition time,
time low-to-high-level
low to high level Q output See Figure 6 s
VCC1 = 15 V 0.75

RECOMMENDED OPERATING CONDITIONS

INPUT VOLTAGE MAXIMUM CLOCK FREQUENCY
vs vs
SUPPLY VOLTAGE VCC1 SUPPLY VOLTAGE VCC1
12 6
TA = Full Range TA = Full Range
max Maximum Clock frequency MHz

10 5
I Input Voltage V

8 4
Minimum VIH
6 3

4 2
VVI

fFmax

2 1
Maximum VIL

0 0
3 5 7 9 11 13 15 4 6 8 10 12 14 16
Supply Voltage, VCC1 V Supply Voltage, VCC1 V

Figure 1 Figure 2

46 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

 SN65518, SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS004B MARCH 1983 REVISED MAY 1990

PARAMETER MEASUREMENT INFORMATION

tw(CKH)
tw(CKH)
VIH VIH
CLOCK 50% CLOCK 50%
50%
VIL VIL

tw(CKL)
td

tsu th VOH
VIH DATA 50%

DATA IN Valid OUTPUT
VOL
VIL

Figure 3. Input Timing Waveforms Figure 4. Data Output Switching Times

3.5 V
3.5 V 1.75 V
LATCH STROBE
50% 0 V
ENABLE
0V
tDLH or tDHL tDLH tDHL
VOH VOH
90% Q Outputs 90%
Q Output 10%
10% VOL VOL
tTLH tTHL

Figure 5. Q Output Switching Times Figure 6. Switching Time Voltage Waveforms

For testing purposes, all input pulses have maximum rise and fall times of 30 ns.

POST OFFICE BOX 655303 DALLAS, TEXAS 75265 47

SN65518, SN75518
VACUUM FLUORESCENT DISPLAY DRIVERS
SLDS004B MARCH 1983 REVISED MAY 1990

48 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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Copyright 1998, Texas Instruments Incorporated