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Code: 12D68101
Q3
Q1
Q4 rout
Q2
L D
3
(a)
(b)
Write a short note on:
High output impedence current mirror.
Bipolar gain stages. O R
4
(a)
Explain:
Digital decimation filter.
U W
T
(b) Continuous time filters.
6
(b)
(a)
N
Consider a CMOS inverter circuit with the following parameters VDD = 3.3 V, VTo,n = 0.6 V,
J
VTo,p = -0.7 v, Kn = 200 2 , Kp = = 800 2 . Calculate the noise margin of the circuit.
7 (a) Draw the mask layout for an 81 nMOS inverter circuit. Both the input and output points
should be on the polysilicon area.
(b) Derive expression for:
(i) Sheet resistance.
(ii) Area capacitance of layers.
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