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Wilkinson Power Divider

Electromagnetics, RF Track (EE4C05)

Andrea Degasperi , Marc Vizcarro i Carretero

OVERVIEW:
Passive circuit that splits an input signal into two equal phase output signals, or combines
two equal-phase signals into one in the opposite direction[1].
P2 0
1
= 0 0
P1 2 0 0
P3
Passive, Reciprocal and 3 Ports Matched.
Lossy when signals from P2 and P3 are different.
Figures of Merit Ideally
Return Losses RL1 = 20log( ) RL1 = RL1 = 0
Coupling CP12 = 20log( ) CP12 = 3
Isolation IL23 = 20log( ) IL23 = IL23 = 0
Ideal Simulation
THE DETAILS:
- 83.372 dB
= 17
= 8
- 3.01 dB
Rogers 3203
- 89.393 dB

BW 2.9 GHz

TECHNOLOGY CHOICE:

-Stripline Stripline CPW

No grounding Cheap and -Stripline 1


=
No multi-layer Simple Losses[2]
= 3.02
= 1 PROPOSED DESIGN:
Rogers = .
3203 = 1.72
= 5.87 -71.422 dB -60.263 dB
= 0.0016
-3.03 dB BW 2.9 GHz

DIMENSIONS
W = 3.483 mm
L = 5.741 mm

SMD PARASITICS:

-71.422 dB -50.055 dB

-3.03 dB BW 2.9 GHz

Due to SMD resistor Isolation between


values availability, two P2- P3 decreases
resistors of 33 and 1
are used.

If the signals introduced in P2 and P3 are not in phase, the Wilkinson Divider fails to
isolate both ports. The next simulation uses ideal couplers to compare both situations.

P2 30 phase shift P2
P3
No phase shift P2 and P3

References
[1] David M. Pozar, Microwave Engineering, 4th Edition, pp 328.
[2] EM Course Slides (EE4C05).

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