10th Jubilee IEEE International Symposium on Applied Computational Intelligence and Informatics May 21-23, 2015 Timioara, Romania

Bidirectional Flyback Inverter with

Low Output Voltage THD
Gheorghe-Daniel Andreescu*, Octavian Cornea**, Nicolae Muntean**, Emil Guran**
* PolitehnicaUniversity of Timisoara, Automation and Applied Informatics Department, Timisoara, Romania
** PolitehnicaUniversity of Timisoara, Electrical Engineering Department, Timisoara, Romania
E-mails: daniel.andreescu@upt.ro, octavian.cornea@upt.ro, nicolae.muntean@upt.ro, emil.guran@upt.ro

AbstractThis paper develops a single-phase voltage source strategy with stability analysis using an average model [9],
inverter mainly containing a high frequency flyback are presented. The simulation results confirm the inverter
bidirectional DC-DC converter - as a previous stage, and a operation with low THD.
full-bridge module. The flyback bidirectional converter
generates a rectified sinusoidal voltage waveform across the II. INVERTER DESCRIPTION
output capacitor. The full bridge transistors switch two
times in one AC period in order to transform the output The proposed inverter circuit and the corresponding
capacitor voltage in an AC waveform. The converter operating states are presented in fig. 1:
ensures also galvanic insulation between input and output,
and a possible high conversion voltage ratio given by I1 T2 I2
transformer. A state-space averaging model for the HF
proposed converter was used for stability analysis and to Tr T3 VOUT T5
design a tracking controller for output capacitor voltage. Vin VC
Digital simulations validate inverter proper operations and C Rou
a low output voltage THD value. t

T1 T4 T6
I. INTRODUCTION a)
Applications in renewable energy systems, T2 I2
uninterruptible power sources, laboratory tests etc., HF
require a sinusoidal AC power source with/without Tr T3 VOUT T5

constant voltage or frequency, and low harmonics [1-3]. Vin VC

These tasks are accomplished by power inverters in C Rou
various configurations, working with PWM strategies and t

using passive filters in order to obtain a quasi-continuous T4 T6

T1
sinusoidal output waveform [4].
b)
When high conversion ratio and galvanic insulation T2
I1 I2
between the input DC voltage and the output AC voltage
are needed, a previous DC-DC conversion stage, working HF
T3 T5
Tr VOUT
at high frequency, is implemented [5, 6].
Vin VC
A full-bridge power inverter with a buck-boost DC-DC C
bidirectional conversion stage is presented in [7]. In later Rout
references, the DC-DC conversion was replaced with a
bidirectional power flow flyback converter to have T1 T4 T6
galvanic insulation and a possible high voltage conversion c)
ratio. This modification led to two novel topologies. T2 I2
The first one is presented in [8], with a lower number of HF
T3 T5
semiconductors, but using a split capacitor cell and double Tr VOUT
value of the operating voltage. Neglecting the higher Vin VC
voltage and the corresponding issues, the major problem C
Rout
of this topology is the imbalance of the energy stored in
the split capacitor cells during the AC conversion, which
T1 T4 T6
causes a high voltage THD depending on load.
The second topology, developed in this paper, solves all d)

these drawbacks by using a single capacitor and a full

Figure 1. The inverter schematics and the operating states:
bridge inverter in the final conversion stage. Being a) and b) ton and toff for T1 during positive alternance;
switched at 50Hz and using high efficiency c) and d) ton and toff for T1 during negative alternance.
semiconductors, these additional transistors do not (T1 and T2 control signals are complementary)
represent a major disadvantage since the THD becomes
very low. Analytical description, including the control

978-1-4799-9911-8/15/$31.00 2015 IEEE 95

G.-Daniel A. et al. Bidirectional Flyback Inverter with Low Output Voltage THD

The operation of this inverter consists in two major The state and output equations during ton, derived from
steps: i) the bidirectional DC-DC conversion produces a the equivalent circuits from fig.3, are:
prescribed full wave rectified sinusoid across the capacitor r1
C; ii) the DC-AC conversion is realized by a full bridge x1 L 0 1
x1
inverter, that operates at the low frequency of the = + L Vin , Vout = x2 . (4)
synthetized sinusoidal waveform. x2 0 1 x2 0

The output voltage (vout), with the amplitude Vpeak, is: RC
The system during the on state is given by the equations
vout = VPeak sin(t ) . (1)
x = A1x + B1Vin; vout = C1x, where:
Thus, the reference voltage across the capacitor C is: r1
v*DC = VPeak sin(t ) . (2) L 0 1
A1 = , B1 = L , C1 = [ 0 1] . (5)
The relation between the input DC voltage (Vin) and the 0 1
voltage across the capacitor C (vDC) is given by: 0
RC
kD
vDC = Vin , (3)
1 D
where k is the transformer ratio and D is the PWM duty-
cycle for transistor T1. T2 uses a complementary control
signal with (1-D) duty cycle.
The proposed inverter configuration requires a
capacitor voltage tracking-control loop having as
reference a full wave rectified sinusoidal function (2).
Figure 4. State-space averaging equivalent circuit during toff
III. AVERAGE MODELS
Average models are a good compromise between The state and output equations during toff, derived from
complexity, computation time and acceptable accuracy for the equivalent circuits from fig.4, are:
simulation and control design in power electronic. Recent r2 + rc 1
researches on this topic are presented in [10-14]. In order x1 k 2 L
kL x1 0
to analyze the inverter stability and to design the capacitor = + Vin , Vout = x2 . (6)
voltage controller, the state-space averaging method x2 1 1 x2 0

(SSAM) is used [9-11]. kC RC
To simplify the computation process, the analysis is The equivalent system during the off state is given by
focused on the flyback converter with its output capacitor the equations x = A2x + B2Vin; vout = C2x, where:
filter. Since the full bridge is neglected, the load resistance
(R) appears in parallel to the output capacitor. Thus, the r1 + rc 1
stability is studied considering the model given in fig.2. k 2 L
kL 0
A2 = , B2 = , C2 = [ 0 1] . (7)
A first step of SSAM is to determine the state variables 1 1 0
and to analyze the circuits during switching states. In the
kC RC
simplified model, the system state variables are: x1 is the
current through the magnetization inductance L and x2 is The average equivalent system in one switching period
the voltage over the output capacitor C, thus x = [x1, x2]T. is x = Ax + BVin, vout = Cx with the matrices obtaining as
a sum of the corresponding above matrices weighted by D
for ton state and by (1-D) for toff state, thus:
A = A1 D + A2 (1-D) (8)
B = B1 D + B2 (1-D) (9)
C = C1 D + C2 (1-D). (10)
The steady-state value X0 is obtained for x = 0:
X0 = (-A-1B)Vin . (11)
Figure 2. Model used for state-space averaging analysis For small variation d of the duty cycle D, considering
Vin constant, the small-signal average equivalent system in
one switching period given by [9] is:
x = Ax + ( A1 A2 ) X 0 + ( B1 B2 ) Vin d (12)

vout = Cx + ( C1 C 2 ) X 0 d , (13)

where x and vout are the small variations of the state and
the output variables, respectively.
The specific transfer function vout (s)/ d (s) is obtained
Figure 3. State-space averaging equivalent circuit during ton from (12-13) using MATLAB tools.

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 10th Jubilee IEEE International Symposium on Applied Computational Intelligence and Informatics May 21-23, 2015 Timioara, Romania

The simplified small-signal state-space averaging

model of the inverter is:
r1 1 D
x1 L D kL x1
= +
x2 1 D 1 x2
kC RC
(14)
r1 1
1
X
L kL 10 + L Vin d a)
1 X 20 0
kC 0

The presented average model is practically used for the
stability analysis employing Bode plots.

IV. STABILITY ANALYSIS AND CONTROL

The stability analysis is based on the average model
presented in section III with the inverter prototype data
listed in Table I. b)

TABLE I. INVERTER PROTOTYPE DATA Figure 5. Bode plots of small-signal transfer functions: a) H1 ( s) and
b) H 2 ( s)
Name Value Unit Specification
Vin 50 V Input voltage
L 20 H Flyback transformer primary winding inductance
Flyback transformer primary winding leakage
L1 1.6 H
inductance
r1 4.5 m Flyback transformer primary winding resistance
Flyback transformer secondary winding leakage
L2 20 H
inductance
Flyback transformer secondary winding
r2 50 m
resistance
C 100 F Filter capacitor
rc 10 m Filter capacitor ESR a)
R 50 Load resistance
k 5 Transformation ratio of the flyback transformer
finv 20 kHz Inverter switching frequency

The following small-signal transfer functions are given

from (14) using MATLAB tools, with inverter data from
Table 1 and the average capacitor voltage of X20 = 200V.
x1 ( s) 4.485 106 s + 1.295 109
H1 ( s ) = = , (15)
d ( s) s 2 + 366.7 s + 6.206 106 b)
4 9
x2 ( s ) 6.662 10 s + 4.972 10 Figure 6. Bode plots of small-signal transfer functions: a) H1 ( s) and
H 2 (s) = = 2 . (16)
d ( s ) s + 366.7 s + 6.206 106 b) H 2 ( s) with added controller transfer function Hc (s)

The system poles are p1,2 = -183 2484i, 0 =2485 rad/s
(396 Hz). A negative zero z1 = -288 appears in the transfer
function (15) and a positive one z2 = 75.103 in the transfer
function (16), that is a system with non-minimum phase.
The Bode plots of both small-signal transfer functions
(15-16) are used for system stability analysis (fig.5). The
first one is stable for unitary feedback and the second
one, corresponding to the control variable, is not.
To boost the phase of the Bode plot of (16) presented
in fig.5b, a phase lead type controller for capacitor
voltage loop is used with the transfer function given by:
d ( s) 0.1s + 500
H C (s) = = , (17)
uc ( s) s + 30000
with zero = 20 = 5000 rad/s (796 Hz) six times lower
than pole = 30000 rad/s (4.78 kHz).
The Bode plots of the small-signal transfer functions
(15-16) with the stabilizer controller (17) are presented in
fig.6. Fig.6b highlights a phase margin of 34 degrees at a
cutting frequency of 2.55 kHz, corresponding to a good
system stability with capacitor voltage feedback-loop.
V. MODEL SIMULATION AND RESULTS
A detailed digital simulation model was realized for the
proposed flyback inverter using PSIM. The power stage
circuit and the control loop are shown in fig.7, with the
parameters of the components listed in Table I. A
prototype is currently under construction with the same
parameters.
The proposed inverter is intended to be used as a
bidirectional interface between a DC buss (a stack of
batteries) and one or more AC loads.

97
G.-Daniel A. et al. Bidirectional Flyback Inverter with Low Output Voltage THD

V V_IC_ V V_IC_filtr
LPF
IGBT_ctrl
IGBT2

20u
IC_ S3 S2

V V31
V V20
V LOAD
Ipri Isec Iout
Vc
V V_IGBT2 r_C_ 1u
Iout 55
A
V Ipri Isec V V_Isec_filtr
Vin
C_
Vin LPF2 V Vout
100u
V V_IGBT1
50
S2 Vout S3
IGBT_ctrl

V Vout_H V Vref V Vref2

0.95
-0.95 325
H(s)

IGBT_ctrl RATE_LIM CONTROLLER_TF

COMP2 Vc

50 FULL BRIDGE CONTROL SIGNALS

325
S2

COMP_
S3

Figure 7. Detailed digital simulation model of the proposed inverter in PSIM: Flyback DC-DC converter with full bridge (up), tracking control system (down)

Vout(V) Vref2 Vout(V) Vref2

400 400
200 200
0 0
-200 -200
-400 -400

VC(V) Vref VC(V) Vref

300 300
200 200
100 100
0 0

Iout(A) Iout(A)
10
4
5
0 0
-4 -5
-10

ip(A) is(A) ip(A) is(A)

200 200
100 100
0 0
-100 -100
0.04 0.05 0.06 0.07 0.08 0.04 0.06 0.08 0.1 0.12 0.14
Time (s) Time (s)

Figure 8. Flyback inverter normal operation: sinusoidal reference Figure 9. Flyback inverter response at step output load variation:
(vref2), output voltage (vout); reference voltage (vref), voltage over C (vc); Pout changes from 175W to 1kW and reverse
output current (iout); primary and secondary transformer currents ip and is
Fig.9 shows the flyback inverter response at load
The proposed inverter configuration requires a variation, the output power being changed from 175W to
capacitor voltage control loop with the HC(s) tracking 1kW and reverse. The system is robust to load variations,
controller (17) having a full wave rectified sinusoid
without oscillations in the inverter waveforms.
function as reference. The simulation was run for a rated
power of 1kW at a 230V/50Hz AC output voltage. VI. CONCLUSION
Simulation results presented in fig.8 show that the voltage
across the capacitor follows closely the full wave rectified This paper develops a single-phase DC-AC flyback
sinusoidal reference. inverter with bidirectional power flow, galvanic
The minimum value of the output voltage (from fig.8) insulation and a possible high ratio voltage gain. The
THD factor of the proposed inverter is 3.75% obtained inverter mainly contains a high frequency flyback DC-
using the presented control strategy. DC converter with tracking output rectified sinusoidal

98
 10th Jubilee IEEE International Symposium on Applied Computational Intelligence and Informatics May 21-23, 2015 Timioara, Romania
voltage, and a full-bridge to obtain AC voltage on load
with continuous waveform and low level of THD =
3.75% within the IEEE standard limit.
The inverter is analyzed in terms of operation and
stability. A state-space averaging model of the DC-DC
flyback converter is developed pointing out a lack of
stability by using Bode plots. As a consequence, a phase-
lead type tracking controller for capacitor voltage loop is
designed to improve the system stability. The detailed
inverter system is implemented in PSIM. The simulation
results prove the inverter normal operations and the
system robustness for a step change of the load.
ACKNOWLEDGMENT
This project was developed through the Partnerships in
priority areas program - PN II, with the support of ANCS,
CNDI - UEFISCDI, project no. 36/2012 and partially
supported by the strategic grant
POSDRU/159/1.5/S/137070 (2014) of the Ministry of
National Education, Romania, co-financed by the
European Social Fund Investing in People, within the
Sectoral Operational Programme Human Resources
Development 2007-2013.
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